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[SCSI] hpsa: Check for dma_mapping_error for all code paths using fill_cmd
[deliverable/linux.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
32#include <linux/seq_file.h>
33#include <linux/init.h>
34#include <linux/spinlock.h>
edd16368
SC		 35#include <linux/compat.h>
36#include <linux/blktrace_api.h>
37#include <linux/uaccess.h>
38#include <linux/io.h>
39#include <linux/dma-mapping.h>
40#include <linux/completion.h>
41#include <linux/moduleparam.h>
42#include <scsi/scsi.h>
43#include <scsi/scsi_cmnd.h>
44#include <scsi/scsi_device.h>
45#include <scsi/scsi_host.h>
667e23d4 46#include <scsi/scsi_tcq.h>
edd16368
SC		 47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
60063497 50#include <linux/atomic.h>
edd16368 51#include <linux/kthread.h>
a0c12413 52#include <linux/jiffies.h>
edd16368
SC		 53#include "hpsa_cmd.h"
54#include "hpsa.h"
55
56/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 57#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368 58#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 59#define HPSA "hpsa"
edd16368
SC		 60
61/* How long to wait (in milliseconds) for board to go into simple mode */
62#define MAX_CONFIG_WAIT 30000
63#define MAX_IOCTL_CONFIG_WAIT 1000
64
65/*define how many times we will try a command because of bus resets */
66#define MAX_CMD_RETRIES 3
67
68/* Embedded module documentation macros - see modules.h */
69MODULE_AUTHOR("Hewlett-Packard Company");
70MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 HPSA_DRIVER_VERSION);
72MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73MODULE_VERSION(HPSA_DRIVER_VERSION);
74MODULE_LICENSE("GPL");
75
76static int hpsa_allow_any;
77module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78MODULE_PARM_DESC(hpsa_allow_any,
79 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 80static int hpsa_simple_mode;
81module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82MODULE_PARM_DESC(hpsa_simple_mode,
83 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 84
85/* define the PCI info for the cards we can control */
86static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
fe0c9610
MM		 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1920},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334d},
7c03b870 111 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 112 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 113 {0,}
114};
115
116MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
117
118/* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
120 * access = Address of the struct of function pointers
121 */
122static struct board_type products[] = {
edd16368
SC		 123 {0x3241103C, "Smart Array P212", &SA5_access},
124 {0x3243103C, "Smart Array P410", &SA5_access},
125 {0x3245103C, "Smart Array P410i", &SA5_access},
126 {0x3247103C, "Smart Array P411", &SA5_access},
127 {0x3249103C, "Smart Array P812", &SA5_access},
128 {0x324a103C, "Smart Array P712m", &SA5_access},
129 {0x324b103C, "Smart Array P711m", &SA5_access},
fe0c9610
MM		 130 {0x3350103C, "Smart Array P222", &SA5_access},
131 {0x3351103C, "Smart Array P420", &SA5_access},
132 {0x3352103C, "Smart Array P421", &SA5_access},
133 {0x3353103C, "Smart Array P822", &SA5_access},
134 {0x3354103C, "Smart Array P420i", &SA5_access},
135 {0x3355103C, "Smart Array P220i", &SA5_access},
136 {0x3356103C, "Smart Array P721m", &SA5_access},
137 {0x1920103C, "Smart Array", &SA5_access},
138 {0x1921103C, "Smart Array", &SA5_access},
139 {0x1922103C, "Smart Array", &SA5_access},
140 {0x1923103C, "Smart Array", &SA5_access},
141 {0x1924103C, "Smart Array", &SA5_access},
142 {0x1925103C, "Smart Array", &SA5_access},
143 {0x1926103C, "Smart Array", &SA5_access},
144 {0x1928103C, "Smart Array", &SA5_access},
145 {0x334d103C, "Smart Array P822se", &SA5_access},
edd16368
SC		 146 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
147};
148
149static int number_of_controllers;
150
a0c12413
SC		 151static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
152static spinlock_t lockup_detector_lock;
153static struct task_struct *hpsa_lockup_detector;
154
10f66018
SC		 155static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
156static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 157static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
158static void start_io(struct ctlr_info *h);
159
160#ifdef CONFIG_COMPAT
161static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
162#endif
163
164static void cmd_free(struct ctlr_info *h, struct CommandList *c);
165static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
166static struct CommandList *cmd_alloc(struct ctlr_info *h);
167static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
a2dac136 168static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 169 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 170 int cmd_type);
171
f281233d 172static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 173static void hpsa_scan_start(struct Scsi_Host *);
174static int hpsa_scan_finished(struct Scsi_Host *sh,
175 unsigned long elapsed_time);
667e23d4
SC		 176static int hpsa_change_queue_depth(struct scsi_device *sdev,
177 int qdepth, int reason);
edd16368
SC		 178
179static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
75167d2c 180static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
edd16368
SC		 181static int hpsa_slave_alloc(struct scsi_device *sdev);
182static void hpsa_slave_destroy(struct scsi_device *sdev);
183
edd16368 184static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 185static int check_for_unit_attention(struct ctlr_info *h,
186 struct CommandList *c);
187static void check_ioctl_unit_attention(struct ctlr_info *h,
188 struct CommandList *c);
303932fd
DB		 189/* performant mode helper functions */
190static void calc_bucket_map(int *bucket, int num_buckets,
191 int nsgs, int *bucket_map);
6f039790 192static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
254f796b 193static inline u32 next_command(struct ctlr_info *h, u8 q);
6f039790
GKH		 194static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
195 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
196 u64 *cfg_offset);
197static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
198 unsigned long *memory_bar);
199static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
200static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
201 int wait_for_ready);
75167d2c 202static inline void finish_cmd(struct CommandList *c);
fe5389c8
SC		 203#define BOARD_NOT_READY 0
204#define BOARD_READY 1
edd16368 205
edd16368
SC		 206static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
207{
208 unsigned long *priv = shost_priv(sdev->host);
209 return (struct ctlr_info *) *priv;
210}
211
a23513e8
SC		 212static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
213{
214 unsigned long *priv = shost_priv(sh);
215 return (struct ctlr_info *) *priv;
216}
217
edd16368
SC		 218static int check_for_unit_attention(struct ctlr_info *h,
219 struct CommandList *c)
220{
221 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
222 return 0;
223
224 switch (c->err_info->SenseInfo[12]) {
225 case STATE_CHANGED:
f79cfec6 226 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 227 "detected, command retried\n", h->ctlr);
228 break;
229 case LUN_FAILED:
f79cfec6 230 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 231 "detected, action required\n", h->ctlr);
232 break;
233 case REPORT_LUNS_CHANGED:
f79cfec6 234 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 235 "changed, action required\n", h->ctlr);
edd16368 236 /*
4f4eb9f1
ST		 237 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
238 * target (array) devices.
edd16368
SC		 239 */
240 break;
241 case POWER_OR_RESET:
f79cfec6 242 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 243 "or device reset detected\n", h->ctlr);
244 break;
245 case UNIT_ATTENTION_CLEARED:
f79cfec6 246 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 247 "cleared by another initiator\n", h->ctlr);
248 break;
249 default:
f79cfec6 250 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 251 "unit attention detected\n", h->ctlr);
252 break;
253 }
254 return 1;
255}
256
852af20a
MB		 257static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
258{
259 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
260 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
261 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
262 return 0;
263 dev_warn(&h->pdev->dev, HPSA "device busy");
264 return 1;
265}
266
edd16368
SC		 267static ssize_t host_store_rescan(struct device *dev,
268 struct device_attribute *attr,
269 const char *buf, size_t count)
270{
271 struct ctlr_info *h;
272 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 273 h = shost_to_hba(shost);
31468401 274 hpsa_scan_start(h->scsi_host);
edd16368
SC		 275 return count;
276}
277
d28ce020
SC		 278static ssize_t host_show_firmware_revision(struct device *dev,
279 struct device_attribute *attr, char *buf)
280{
281 struct ctlr_info *h;
282 struct Scsi_Host *shost = class_to_shost(dev);
283 unsigned char *fwrev;
284
285 h = shost_to_hba(shost);
286 if (!h->hba_inquiry_data)
287 return 0;
288 fwrev = &h->hba_inquiry_data[32];
289 return snprintf(buf, 20, "%c%c%c%c\n",
290 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
291}
292
94a13649
SC		 293static ssize_t host_show_commands_outstanding(struct device *dev,
294 struct device_attribute *attr, char *buf)
295{
296 struct Scsi_Host *shost = class_to_shost(dev);
297 struct ctlr_info *h = shost_to_hba(shost);
298
299 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
300}
301
745a7a25
SC		 302static ssize_t host_show_transport_mode(struct device *dev,
303 struct device_attribute *attr, char *buf)
304{
305 struct ctlr_info *h;
306 struct Scsi_Host *shost = class_to_shost(dev);
307
308 h = shost_to_hba(shost);
309 return snprintf(buf, 20, "%s\n",
960a30e7 310 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 311 "performant" : "simple");
312}
313
46380786 314/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 315static u32 unresettable_controller[] = {
316 0x324a103C, /* Smart Array P712m */
317 0x324b103C, /* SmartArray P711m */
318 0x3223103C, /* Smart Array P800 */
319 0x3234103C, /* Smart Array P400 */
320 0x3235103C, /* Smart Array P400i */
321 0x3211103C, /* Smart Array E200i */
322 0x3212103C, /* Smart Array E200 */
323 0x3213103C, /* Smart Array E200i */
324 0x3214103C, /* Smart Array E200i */
325 0x3215103C, /* Smart Array E200i */
326 0x3237103C, /* Smart Array E500 */
327 0x323D103C, /* Smart Array P700m */
7af0abbc 328 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 329 0x409C0E11, /* Smart Array 6400 */
330 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 331 0x40700E11, /* Smart Array 5300 */
332 0x40820E11, /* Smart Array 532 */
333 0x40830E11, /* Smart Array 5312 */
334 0x409A0E11, /* Smart Array 641 */
335 0x409B0E11, /* Smart Array 642 */
336 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 337};
338
46380786
SC		 339/* List of controllers which cannot even be soft reset */
340static u32 soft_unresettable_controller[] = {
7af0abbc 341 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 342 0x40700E11, /* Smart Array 5300 */
343 0x40820E11, /* Smart Array 532 */
344 0x40830E11, /* Smart Array 5312 */
345 0x409A0E11, /* Smart Array 641 */
346 0x409B0E11, /* Smart Array 642 */
347 0x40910E11, /* Smart Array 6i */
46380786
SC		 348 /* Exclude 640x boards. These are two pci devices in one slot
349 * which share a battery backed cache module. One controls the
350 * cache, the other accesses the cache through the one that controls
351 * it. If we reset the one controlling the cache, the other will
352 * likely not be happy. Just forbid resetting this conjoined mess.
353 * The 640x isn't really supported by hpsa anyway.
354 */
355 0x409C0E11, /* Smart Array 6400 */
356 0x409D0E11, /* Smart Array 6400 EM */
357};
358
359static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 360{
361 int i;
362
363 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 364 if (unresettable_controller[i] == board_id)
365 return 0;
366 return 1;
367}
368
369static int ctlr_is_soft_resettable(u32 board_id)
370{
371 int i;
372
373 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
374 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 375 return 0;
376 return 1;
377}
378
46380786
SC		 379static int ctlr_is_resettable(u32 board_id)
380{
381 return ctlr_is_hard_resettable(board_id) ||
382 ctlr_is_soft_resettable(board_id);
383}
384
941b1cda
SC		 385static ssize_t host_show_resettable(struct device *dev,
386 struct device_attribute *attr, char *buf)
387{
388 struct ctlr_info *h;
389 struct Scsi_Host *shost = class_to_shost(dev);
390
391 h = shost_to_hba(shost);
46380786 392 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 393}
394
edd16368
SC		 395static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
396{
397 return (scsi3addr[3] & 0xC0) == 0x40;
398}
399
400static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
d82357ea 401 "1(ADM)", "UNKNOWN"
edd16368
SC		 402};
403#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
404
405static ssize_t raid_level_show(struct device *dev,
406 struct device_attribute *attr, char *buf)
407{
408 ssize_t l = 0;
82a72c0a 409 unsigned char rlevel;
edd16368
SC		 410 struct ctlr_info *h;
411 struct scsi_device *sdev;
412 struct hpsa_scsi_dev_t *hdev;
413 unsigned long flags;
414
415 sdev = to_scsi_device(dev);
416 h = sdev_to_hba(sdev);
417 spin_lock_irqsave(&h->lock, flags);
418 hdev = sdev->hostdata;
419 if (!hdev) {
420 spin_unlock_irqrestore(&h->lock, flags);
421 return -ENODEV;
422 }
423
424 /* Is this even a logical drive? */
425 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
426 spin_unlock_irqrestore(&h->lock, flags);
427 l = snprintf(buf, PAGE_SIZE, "N/A\n");
428 return l;
429 }
430
431 rlevel = hdev->raid_level;
432 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 433 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 434 rlevel = RAID_UNKNOWN;
435 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
436 return l;
437}
438
439static ssize_t lunid_show(struct device *dev,
440 struct device_attribute *attr, char *buf)
441{
442 struct ctlr_info *h;
443 struct scsi_device *sdev;
444 struct hpsa_scsi_dev_t *hdev;
445 unsigned long flags;
446 unsigned char lunid[8];
447
448 sdev = to_scsi_device(dev);
449 h = sdev_to_hba(sdev);
450 spin_lock_irqsave(&h->lock, flags);
451 hdev = sdev->hostdata;
452 if (!hdev) {
453 spin_unlock_irqrestore(&h->lock, flags);
454 return -ENODEV;
455 }
456 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
457 spin_unlock_irqrestore(&h->lock, flags);
458 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
459 lunid[0], lunid[1], lunid[2], lunid[3],
460 lunid[4], lunid[5], lunid[6], lunid[7]);
461}
462
463static ssize_t unique_id_show(struct device *dev,
464 struct device_attribute *attr, char *buf)
465{
466 struct ctlr_info *h;
467 struct scsi_device *sdev;
468 struct hpsa_scsi_dev_t *hdev;
469 unsigned long flags;
470 unsigned char sn[16];
471
472 sdev = to_scsi_device(dev);
473 h = sdev_to_hba(sdev);
474 spin_lock_irqsave(&h->lock, flags);
475 hdev = sdev->hostdata;
476 if (!hdev) {
477 spin_unlock_irqrestore(&h->lock, flags);
478 return -ENODEV;
479 }
480 memcpy(sn, hdev->device_id, sizeof(sn));
481 spin_unlock_irqrestore(&h->lock, flags);
482 return snprintf(buf, 16 * 2 + 2,
483 "%02X%02X%02X%02X%02X%02X%02X%02X"
484 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
485 sn[0], sn[1], sn[2], sn[3],
486 sn[4], sn[5], sn[6], sn[7],
487 sn[8], sn[9], sn[10], sn[11],
488 sn[12], sn[13], sn[14], sn[15]);
489}
490
3f5eac3a
SC		 491static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
492static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
493static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
494static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
495static DEVICE_ATTR(firmware_revision, S_IRUGO,
496 host_show_firmware_revision, NULL);
497static DEVICE_ATTR(commands_outstanding, S_IRUGO,
498 host_show_commands_outstanding, NULL);
499static DEVICE_ATTR(transport_mode, S_IRUGO,
500 host_show_transport_mode, NULL);
941b1cda
SC		 501static DEVICE_ATTR(resettable, S_IRUGO,
502 host_show_resettable, NULL);
3f5eac3a
SC		 503
504static struct device_attribute *hpsa_sdev_attrs[] = {
505 &dev_attr_raid_level,
506 &dev_attr_lunid,
507 &dev_attr_unique_id,
508 NULL,
509};
510
511static struct device_attribute *hpsa_shost_attrs[] = {
512 &dev_attr_rescan,
513 &dev_attr_firmware_revision,
514 &dev_attr_commands_outstanding,
515 &dev_attr_transport_mode,
941b1cda 516 &dev_attr_resettable,
3f5eac3a
SC		 517 NULL,
518};
519
520static struct scsi_host_template hpsa_driver_template = {
521 .module = THIS_MODULE,
f79cfec6
SC		 522 .name = HPSA,
523 .proc_name = HPSA,
3f5eac3a
SC		 524 .queuecommand = hpsa_scsi_queue_command,
525 .scan_start = hpsa_scan_start,
526 .scan_finished = hpsa_scan_finished,
527 .change_queue_depth = hpsa_change_queue_depth,
528 .this_id = -1,
529 .use_clustering = ENABLE_CLUSTERING,
75167d2c 530 .eh_abort_handler = hpsa_eh_abort_handler,
3f5eac3a
SC		 531 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
532 .ioctl = hpsa_ioctl,
533 .slave_alloc = hpsa_slave_alloc,
534 .slave_destroy = hpsa_slave_destroy,
535#ifdef CONFIG_COMPAT
536 .compat_ioctl = hpsa_compat_ioctl,
537#endif
538 .sdev_attrs = hpsa_sdev_attrs,
539 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 540 .max_sectors = 8192,
3f5eac3a
SC		 541};
542
543
544/* Enqueuing and dequeuing functions for cmdlists. */
545static inline void addQ(struct list_head *list, struct CommandList *c)
546{
547 list_add_tail(&c->list, list);
548}
549
254f796b 550static inline u32 next_command(struct ctlr_info *h, u8 q)
3f5eac3a
SC		 551{
552 u32 a;
254f796b 553 struct reply_pool *rq = &h->reply_queue[q];
e16a33ad 554 unsigned long flags;
3f5eac3a
SC		 555
556 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
254f796b 557 return h->access.command_completed(h, q);
3f5eac3a 558
254f796b
MG		 559 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
560 a = rq->head[rq->current_entry];
561 rq->current_entry++;
e16a33ad 562 spin_lock_irqsave(&h->lock, flags);
3f5eac3a 563 h->commands_outstanding--;
e16a33ad 564 spin_unlock_irqrestore(&h->lock, flags);
3f5eac3a
SC		 565 } else {
566 a = FIFO_EMPTY;
567 }
568 /* Check for wraparound */
254f796b
MG		 569 if (rq->current_entry == h->max_commands) {
570 rq->current_entry = 0;
571 rq->wraparound ^= 1;
3f5eac3a
SC		 572 }
573 return a;
574}
575
576/* set_performant_mode: Modify the tag for cciss performant
577 * set bit 0 for pull model, bits 3-1 for block fetch
578 * register number
579 */
580static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
581{
254f796b 582 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
3f5eac3a 583 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
254f796b
MG		 584 if (likely(h->msix_vector))
585 c->Header.ReplyQueue =
586 smp_processor_id() % h->nreply_queues;
587 }
3f5eac3a
SC		 588}
589
e85c5974
SC		 590static int is_firmware_flash_cmd(u8 *cdb)
591{
592 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
593}
594
595/*
596 * During firmware flash, the heartbeat register may not update as frequently
597 * as it should. So we dial down lockup detection during firmware flash. and
598 * dial it back up when firmware flash completes.
599 */
600#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
601#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
602static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
603 struct CommandList *c)
604{
605 if (!is_firmware_flash_cmd(c->Request.CDB))
606 return;
607 atomic_inc(&h->firmware_flash_in_progress);
608 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
609}
610
611static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
612 struct CommandList *c)
613{
614 if (is_firmware_flash_cmd(c->Request.CDB) &&
615 atomic_dec_and_test(&h->firmware_flash_in_progress))
616 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
617}
618
3f5eac3a
SC		 619static void enqueue_cmd_and_start_io(struct ctlr_info *h,
620 struct CommandList *c)
621{
622 unsigned long flags;
623
624 set_performant_mode(h, c);
e85c5974 625 dial_down_lockup_detection_during_fw_flash(h, c);
3f5eac3a
SC		 626 spin_lock_irqsave(&h->lock, flags);
627 addQ(&h->reqQ, c);
628 h->Qdepth++;
3f5eac3a 629 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 630 start_io(h);
3f5eac3a
SC		 631}
632
633static inline void removeQ(struct CommandList *c)
634{
635 if (WARN_ON(list_empty(&c->list)))
636 return;
637 list_del_init(&c->list);
638}
639
640static inline int is_hba_lunid(unsigned char scsi3addr[])
641{
642 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
643}
644
645static inline int is_scsi_rev_5(struct ctlr_info *h)
646{
647 if (!h->hba_inquiry_data)
648 return 0;
649 if ((h->hba_inquiry_data[2] & 0x07) == 5)
650 return 1;
651 return 0;
652}
653
edd16368
SC		 654static int hpsa_find_target_lun(struct ctlr_info *h,
655 unsigned char scsi3addr[], int bus, int *target, int *lun)
656{
657 /* finds an unused bus, target, lun for a new physical device
658 * assumes h->devlock is held
659 */
660 int i, found = 0;
cfe5badc 661 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 662
263d9401 663 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 664
665 for (i = 0; i < h->ndevices; i++) {
666 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 667 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 668 }
669
263d9401
AM		 670 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
671 if (i < HPSA_MAX_DEVICES) {
672 /* *bus = 1; */
673 *target = i;
674 *lun = 0;
675 found = 1;
edd16368
SC		 676 }
677 return !found;
678}
679
680/* Add an entry into h->dev[] array. */
681static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
682 struct hpsa_scsi_dev_t *device,
683 struct hpsa_scsi_dev_t *added[], int *nadded)
684{
685 /* assumes h->devlock is held */
686 int n = h->ndevices;
687 int i;
688 unsigned char addr1[8], addr2[8];
689 struct hpsa_scsi_dev_t *sd;
690
cfe5badc 691 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 692 dev_err(&h->pdev->dev, "too many devices, some will be "
693 "inaccessible.\n");
694 return -1;
695 }
696
697 /* physical devices do not have lun or target assigned until now. */
698 if (device->lun != -1)
699 /* Logical device, lun is already assigned. */
700 goto lun_assigned;
701
702 /* If this device a non-zero lun of a multi-lun device
703 * byte 4 of the 8-byte LUN addr will contain the logical
704 * unit no, zero otherise.
705 */
706 if (device->scsi3addr[4] == 0) {
707 /* This is not a non-zero lun of a multi-lun device */
708 if (hpsa_find_target_lun(h, device->scsi3addr,
709 device->bus, &device->target, &device->lun) != 0)
710 return -1;
711 goto lun_assigned;
712 }
713
714 /* This is a non-zero lun of a multi-lun device.
715 * Search through our list and find the device which
716 * has the same 8 byte LUN address, excepting byte 4.
717 * Assign the same bus and target for this new LUN.
718 * Use the logical unit number from the firmware.
719 */
720 memcpy(addr1, device->scsi3addr, 8);
721 addr1[4] = 0;
722 for (i = 0; i < n; i++) {
723 sd = h->dev[i];
724 memcpy(addr2, sd->scsi3addr, 8);
725 addr2[4] = 0;
726 /* differ only in byte 4? */
727 if (memcmp(addr1, addr2, 8) == 0) {
728 device->bus = sd->bus;
729 device->target = sd->target;
730 device->lun = device->scsi3addr[4];
731 break;
732 }
733 }
734 if (device->lun == -1) {
735 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
736 " suspect firmware bug or unsupported hardware "
737 "configuration.\n");
738 return -1;
739 }
740
741lun_assigned:
742
743 h->dev[n] = device;
744 h->ndevices++;
745 added[*nadded] = device;
746 (*nadded)++;
747
748 /* initially, (before registering with scsi layer) we don't
749 * know our hostno and we don't want to print anything first
750 * time anyway (the scsi layer's inquiries will show that info)
751 */
752 /* if (hostno != -1) */
753 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
754 scsi_device_type(device->devtype), hostno,
755 device->bus, device->target, device->lun);
756 return 0;
757}
758
bd9244f7
ST		 759/* Update an entry in h->dev[] array. */
760static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
761 int entry, struct hpsa_scsi_dev_t *new_entry)
762{
763 /* assumes h->devlock is held */
764 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
765
766 /* Raid level changed. */
767 h->dev[entry]->raid_level = new_entry->raid_level;
768 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
769 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
770 new_entry->target, new_entry->lun);
771}
772
2a8ccf31
SC		 773/* Replace an entry from h->dev[] array. */
774static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
775 int entry, struct hpsa_scsi_dev_t *new_entry,
776 struct hpsa_scsi_dev_t *added[], int *nadded,
777 struct hpsa_scsi_dev_t *removed[], int *nremoved)
778{
779 /* assumes h->devlock is held */
cfe5badc 780 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 781 removed[*nremoved] = h->dev[entry];
782 (*nremoved)++;
01350d05
SC		 783
784 /*
785 * New physical devices won't have target/lun assigned yet
786 * so we need to preserve the values in the slot we are replacing.
787 */
788 if (new_entry->target == -1) {
789 new_entry->target = h->dev[entry]->target;
790 new_entry->lun = h->dev[entry]->lun;
791 }
792
2a8ccf31
SC		 793 h->dev[entry] = new_entry;
794 added[*nadded] = new_entry;
795 (*nadded)++;
796 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
797 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
798 new_entry->target, new_entry->lun);
799}
800
edd16368
SC		 801/* Remove an entry from h->dev[] array. */
802static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
803 struct hpsa_scsi_dev_t *removed[], int *nremoved)
804{
805 /* assumes h->devlock is held */
806 int i;
807 struct hpsa_scsi_dev_t *sd;
808
cfe5badc 809 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 810
811 sd = h->dev[entry];
812 removed[*nremoved] = h->dev[entry];
813 (*nremoved)++;
814
815 for (i = entry; i < h->ndevices-1; i++)
816 h->dev[i] = h->dev[i+1];
817 h->ndevices--;
818 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
819 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
820 sd->lun);
821}
822
823#define SCSI3ADDR_EQ(a, b) ( \
824 (a)[7] == (b)[7] && \
825 (a)[6] == (b)[6] && \
826 (a)[5] == (b)[5] && \
827 (a)[4] == (b)[4] && \
828 (a)[3] == (b)[3] && \
829 (a)[2] == (b)[2] && \
830 (a)[1] == (b)[1] && \
831 (a)[0] == (b)[0])
832
833static void fixup_botched_add(struct ctlr_info *h,
834 struct hpsa_scsi_dev_t *added)
835{
836 /* called when scsi_add_device fails in order to re-adjust
837 * h->dev[] to match the mid layer's view.
838 */
839 unsigned long flags;
840 int i, j;
841
842 spin_lock_irqsave(&h->lock, flags);
843 for (i = 0; i < h->ndevices; i++) {
844 if (h->dev[i] == added) {
845 for (j = i; j < h->ndevices-1; j++)
846 h->dev[j] = h->dev[j+1];
847 h->ndevices--;
848 break;
849 }
850 }
851 spin_unlock_irqrestore(&h->lock, flags);
852 kfree(added);
853}
854
855static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
856 struct hpsa_scsi_dev_t *dev2)
857{
edd16368
SC		 858 /* we compare everything except lun and target as these
859 * are not yet assigned. Compare parts likely
860 * to differ first
861 */
862 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
863 sizeof(dev1->scsi3addr)) != 0)
864 return 0;
865 if (memcmp(dev1->device_id, dev2->device_id,
866 sizeof(dev1->device_id)) != 0)
867 return 0;
868 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
869 return 0;
870 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
871 return 0;
edd16368
SC		 872 if (dev1->devtype != dev2->devtype)
873 return 0;
edd16368
SC		 874 if (dev1->bus != dev2->bus)
875 return 0;
876 return 1;
877}
878
bd9244f7
ST		 879static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
880 struct hpsa_scsi_dev_t *dev2)
881{
882 /* Device attributes that can change, but don't mean
883 * that the device is a different device, nor that the OS
884 * needs to be told anything about the change.
885 */
886 if (dev1->raid_level != dev2->raid_level)
887 return 1;
888 return 0;
889}
890
edd16368
SC		 891/* Find needle in haystack. If exact match found, return DEVICE_SAME,
892 * and return needle location in *index. If scsi3addr matches, but not
893 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 894 * location in *index.
895 * In the case of a minor device attribute change, such as RAID level, just
896 * return DEVICE_UPDATED, along with the updated device's location in index.
897 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 898 */
899static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
900 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
901 int *index)
902{
903 int i;
904#define DEVICE_NOT_FOUND 0
905#define DEVICE_CHANGED 1
906#define DEVICE_SAME 2
bd9244f7 907#define DEVICE_UPDATED 3
edd16368 908 for (i = 0; i < haystack_size; i++) {
23231048
SC		 909 if (haystack[i] == NULL) /* previously removed. */
910 continue;
edd16368
SC		 911 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
912 *index = i;
bd9244f7
ST		 913 if (device_is_the_same(needle, haystack[i])) {
914 if (device_updated(needle, haystack[i]))
915 return DEVICE_UPDATED;
edd16368 916 return DEVICE_SAME;
bd9244f7 917 } else {
edd16368 918 return DEVICE_CHANGED;
bd9244f7 919 }
edd16368
SC		 920 }
921 }
922 *index = -1;
923 return DEVICE_NOT_FOUND;
924}
925
4967bd3e 926static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 927 struct hpsa_scsi_dev_t *sd[], int nsds)
928{
929 /* sd contains scsi3 addresses and devtypes, and inquiry
930 * data. This function takes what's in sd to be the current
931 * reality and updates h->dev[] to reflect that reality.
932 */
933 int i, entry, device_change, changes = 0;
934 struct hpsa_scsi_dev_t *csd;
935 unsigned long flags;
936 struct hpsa_scsi_dev_t **added, **removed;
937 int nadded, nremoved;
938 struct Scsi_Host *sh = NULL;
939
cfe5badc
ST		 940 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
941 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 942
943 if (!added || !removed) {
944 dev_warn(&h->pdev->dev, "out of memory in "
945 "adjust_hpsa_scsi_table\n");
946 goto free_and_out;
947 }
948
949 spin_lock_irqsave(&h->devlock, flags);
950
951 /* find any devices in h->dev[] that are not in
952 * sd[] and remove them from h->dev[], and for any
953 * devices which have changed, remove the old device
954 * info and add the new device info.
bd9244f7
ST		 955 * If minor device attributes change, just update
956 * the existing device structure.
edd16368
SC		 957 */
958 i = 0;
959 nremoved = 0;
960 nadded = 0;
961 while (i < h->ndevices) {
962 csd = h->dev[i];
963 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
964 if (device_change == DEVICE_NOT_FOUND) {
965 changes++;
966 hpsa_scsi_remove_entry(h, hostno, i,
967 removed, &nremoved);
968 continue; /* remove ^^^, hence i not incremented */
969 } else if (device_change == DEVICE_CHANGED) {
970 changes++;
2a8ccf31
SC		 971 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
972 added, &nadded, removed, &nremoved);
c7f172dc
SC		 973 /* Set it to NULL to prevent it from being freed
974 * at the bottom of hpsa_update_scsi_devices()
975 */
976 sd[entry] = NULL;
bd9244f7
ST		 977 } else if (device_change == DEVICE_UPDATED) {
978 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
edd16368
SC		 979 }
980 i++;
981 }
982
983 /* Now, make sure every device listed in sd[] is also
984 * listed in h->dev[], adding them if they aren't found
985 */
986
987 for (i = 0; i < nsds; i++) {
988 if (!sd[i]) /* if already added above. */
989 continue;
990 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
991 h->ndevices, &entry);
992 if (device_change == DEVICE_NOT_FOUND) {
993 changes++;
994 if (hpsa_scsi_add_entry(h, hostno, sd[i],
995 added, &nadded) != 0)
996 break;
997 sd[i] = NULL; /* prevent from being freed later. */
998 } else if (device_change == DEVICE_CHANGED) {
999 /* should never happen... */
1000 changes++;
1001 dev_warn(&h->pdev->dev,
1002 "device unexpectedly changed.\n");
1003 /* but if it does happen, we just ignore that device */
1004 }
1005 }
1006 spin_unlock_irqrestore(&h->devlock, flags);
1007
1008 /* Don't notify scsi mid layer of any changes the first time through
1009 * (or if there are no changes) scsi_scan_host will do it later the
1010 * first time through.
1011 */
1012 if (hostno == -1 || !changes)
1013 goto free_and_out;
1014
1015 sh = h->scsi_host;
1016 /* Notify scsi mid layer of any removed devices */
1017 for (i = 0; i < nremoved; i++) {
1018 struct scsi_device *sdev =
1019 scsi_device_lookup(sh, removed[i]->bus,
1020 removed[i]->target, removed[i]->lun);
1021 if (sdev != NULL) {
1022 scsi_remove_device(sdev);
1023 scsi_device_put(sdev);
1024 } else {
1025 /* We don't expect to get here.
1026 * future cmds to this device will get selection
1027 * timeout as if the device was gone.
1028 */
1029 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1030 " for removal.", hostno, removed[i]->bus,
1031 removed[i]->target, removed[i]->lun);
1032 }
1033 kfree(removed[i]);
1034 removed[i] = NULL;
1035 }
1036
1037 /* Notify scsi mid layer of any added devices */
1038 for (i = 0; i < nadded; i++) {
1039 if (scsi_add_device(sh, added[i]->bus,
1040 added[i]->target, added[i]->lun) == 0)
1041 continue;
1042 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1043 "device not added.\n", hostno, added[i]->bus,
1044 added[i]->target, added[i]->lun);
1045 /* now we have to remove it from h->dev,
1046 * since it didn't get added to scsi mid layer
1047 */
1048 fixup_botched_add(h, added[i]);
1049 }
1050
1051free_and_out:
1052 kfree(added);
1053 kfree(removed);
edd16368
SC		 1054}
1055
1056/*
1057 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
1058 * Assume's h->devlock is held.
1059 */
1060static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1061 int bus, int target, int lun)
1062{
1063 int i;
1064 struct hpsa_scsi_dev_t *sd;
1065
1066 for (i = 0; i < h->ndevices; i++) {
1067 sd = h->dev[i];
1068 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1069 return sd;
1070 }
1071 return NULL;
1072}
1073
1074/* link sdev->hostdata to our per-device structure. */
1075static int hpsa_slave_alloc(struct scsi_device *sdev)
1076{
1077 struct hpsa_scsi_dev_t *sd;
1078 unsigned long flags;
1079 struct ctlr_info *h;
1080
1081 h = sdev_to_hba(sdev);
1082 spin_lock_irqsave(&h->devlock, flags);
1083 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1084 sdev_id(sdev), sdev->lun);
1085 if (sd != NULL)
1086 sdev->hostdata = sd;
1087 spin_unlock_irqrestore(&h->devlock, flags);
1088 return 0;
1089}
1090
1091static void hpsa_slave_destroy(struct scsi_device *sdev)
1092{
bcc44255 1093 /* nothing to do. */
edd16368
SC		 1094}
1095
33a2ffce
SC		 1096static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1097{
1098 int i;
1099
1100 if (!h->cmd_sg_list)
1101 return;
1102 for (i = 0; i < h->nr_cmds; i++) {
1103 kfree(h->cmd_sg_list[i]);
1104 h->cmd_sg_list[i] = NULL;
1105 }
1106 kfree(h->cmd_sg_list);
1107 h->cmd_sg_list = NULL;
1108}
1109
1110static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1111{
1112 int i;
1113
1114 if (h->chainsize <= 0)
1115 return 0;
1116
1117 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1118 GFP_KERNEL);
1119 if (!h->cmd_sg_list)
1120 return -ENOMEM;
1121 for (i = 0; i < h->nr_cmds; i++) {
1122 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1123 h->chainsize, GFP_KERNEL);
1124 if (!h->cmd_sg_list[i])
1125 goto clean;
1126 }
1127 return 0;
1128
1129clean:
1130 hpsa_free_sg_chain_blocks(h);
1131 return -ENOMEM;
1132}
1133
1134static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1135 struct CommandList *c)
1136{
1137 struct SGDescriptor *chain_sg, *chain_block;
1138 u64 temp64;
1139
1140 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1141 chain_block = h->cmd_sg_list[c->cmdindex];
1142 chain_sg->Ext = HPSA_SG_CHAIN;
1143 chain_sg->Len = sizeof(*chain_sg) *
1144 (c->Header.SGTotal - h->max_cmd_sg_entries);
1145 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1146 PCI_DMA_TODEVICE);
1147 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1148 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1149}
1150
1151static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1152 struct CommandList *c)
1153{
1154 struct SGDescriptor *chain_sg;
1155 union u64bit temp64;
1156
1157 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1158 return;
1159
1160 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1161 temp64.val32.lower = chain_sg->Addr.lower;
1162 temp64.val32.upper = chain_sg->Addr.upper;
1163 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1164}
1165
1fb011fb 1166static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1167{
1168 struct scsi_cmnd *cmd;
1169 struct ctlr_info *h;
1170 struct ErrorInfo *ei;
1171
1172 unsigned char sense_key;
1173 unsigned char asc; /* additional sense code */
1174 unsigned char ascq; /* additional sense code qualifier */
db111e18 1175 unsigned long sense_data_size;
edd16368
SC		 1176
1177 ei = cp->err_info;
1178 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1179 h = cp->h;
1180
1181 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1182 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1183 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1184
1185 cmd->result = (DID_OK << 16); /* host byte */
1186 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1187 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1188
1189 /* copy the sense data whether we need to or not. */
db111e18
SC		 1190 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1191 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1192 else
1193 sense_data_size = sizeof(ei->SenseInfo);
1194 if (ei->SenseLen < sense_data_size)
1195 sense_data_size = ei->SenseLen;
1196
1197 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1198 scsi_set_resid(cmd, ei->ResidualCnt);
1199
1200 if (ei->CommandStatus == 0) {
1201 cmd->scsi_done(cmd);
1202 cmd_free(h, cp);
1203 return;
1204 }
1205
1206 /* an error has occurred */
1207 switch (ei->CommandStatus) {
1208
1209 case CMD_TARGET_STATUS:
1210 if (ei->ScsiStatus) {
1211 /* Get sense key */
1212 sense_key = 0xf & ei->SenseInfo[2];
1213 /* Get additional sense code */
1214 asc = ei->SenseInfo[12];
1215 /* Get addition sense code qualifier */
1216 ascq = ei->SenseInfo[13];
1217 }
1218
1219 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1220 if (check_for_unit_attention(h, cp)) {
1221 cmd->result = DID_SOFT_ERROR << 16;
1222 break;
1223 }
1224 if (sense_key == ILLEGAL_REQUEST) {
1225 /*
1226 * SCSI REPORT_LUNS is commonly unsupported on
1227 * Smart Array. Suppress noisy complaint.
1228 */
1229 if (cp->Request.CDB[0] == REPORT_LUNS)
1230 break;
1231
1232 /* If ASC/ASCQ indicate Logical Unit
1233 * Not Supported condition,
1234 */
1235 if ((asc == 0x25) && (ascq == 0x0)) {
1236 dev_warn(&h->pdev->dev, "cp %p "
1237 "has check condition\n", cp);
1238 break;
1239 }
1240 }
1241
1242 if (sense_key == NOT_READY) {
1243 /* If Sense is Not Ready, Logical Unit
1244 * Not ready, Manual Intervention
1245 * required
1246 */
1247 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1248 dev_warn(&h->pdev->dev, "cp %p "
1249 "has check condition: unit "
1250 "not ready, manual "
1251 "intervention required\n", cp);
1252 break;
1253 }
1254 }
1d3b3609
MG		 1255 if (sense_key == ABORTED_COMMAND) {
1256 /* Aborted command is retryable */
1257 dev_warn(&h->pdev->dev, "cp %p "
1258 "has check condition: aborted command: "
1259 "ASC: 0x%x, ASCQ: 0x%x\n",
1260 cp, asc, ascq);
1261 cmd->result = DID_SOFT_ERROR << 16;
1262 break;
1263 }
edd16368 1264 /* Must be some other type of check condition */
21b8e4ef 1265 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
edd16368
SC		 1266 "unknown type: "
1267 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1268 "Returning result: 0x%x, "
1269 "cmd=[%02x %02x %02x %02x %02x "
807be732 1270 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1271 "%02x %02x %02x %02x %02x]\n",
1272 cp, sense_key, asc, ascq,
1273 cmd->result,
1274 cmd->cmnd[0], cmd->cmnd[1],
1275 cmd->cmnd[2], cmd->cmnd[3],
1276 cmd->cmnd[4], cmd->cmnd[5],
1277 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1278 cmd->cmnd[8], cmd->cmnd[9],
1279 cmd->cmnd[10], cmd->cmnd[11],
1280 cmd->cmnd[12], cmd->cmnd[13],
1281 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1282 break;
1283 }
1284
1285
1286 /* Problem was not a check condition
1287 * Pass it up to the upper layers...
1288 */
1289 if (ei->ScsiStatus) {
1290 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1291 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1292 "Returning result: 0x%x\n",
1293 cp, ei->ScsiStatus,
1294 sense_key, asc, ascq,
1295 cmd->result);
1296 } else { /* scsi status is zero??? How??? */
1297 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1298 "Returning no connection.\n", cp),
1299
1300 /* Ordinarily, this case should never happen,
1301 * but there is a bug in some released firmware
1302 * revisions that allows it to happen if, for
1303 * example, a 4100 backplane loses power and
1304 * the tape drive is in it. We assume that
1305 * it's a fatal error of some kind because we
1306 * can't show that it wasn't. We will make it
1307 * look like selection timeout since that is
1308 * the most common reason for this to occur,
1309 * and it's severe enough.
1310 */
1311
1312 cmd->result = DID_NO_CONNECT << 16;
1313 }
1314 break;
1315
1316 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1317 break;
1318 case CMD_DATA_OVERRUN:
1319 dev_warn(&h->pdev->dev, "cp %p has"
1320 " completed with data overrun "
1321 "reported\n", cp);
1322 break;
1323 case CMD_INVALID: {
1324 /* print_bytes(cp, sizeof(*cp), 1, 0);
1325 print_cmd(cp); */
1326 /* We get CMD_INVALID if you address a non-existent device
1327 * instead of a selection timeout (no response). You will
1328 * see this if you yank out a drive, then try to access it.
1329 * This is kind of a shame because it means that any other
1330 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1331 * missing target. */
1332 cmd->result = DID_NO_CONNECT << 16;
1333 }
1334 break;
1335 case CMD_PROTOCOL_ERR:
256d0eaa 1336 cmd->result = DID_ERROR << 16;
edd16368 1337 dev_warn(&h->pdev->dev, "cp %p has "
256d0eaa 1338 "protocol error\n", cp);
edd16368
SC		 1339 break;
1340 case CMD_HARDWARE_ERR:
1341 cmd->result = DID_ERROR << 16;
1342 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1343 break;
1344 case CMD_CONNECTION_LOST:
1345 cmd->result = DID_ERROR << 16;
1346 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1347 break;
1348 case CMD_ABORTED:
1349 cmd->result = DID_ABORT << 16;
1350 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1351 cp, ei->ScsiStatus);
1352 break;
1353 case CMD_ABORT_FAILED:
1354 cmd->result = DID_ERROR << 16;
1355 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1356 break;
1357 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1358 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1359 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1360 "abort\n", cp);
1361 break;
1362 case CMD_TIMEOUT:
1363 cmd->result = DID_TIME_OUT << 16;
1364 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1365 break;
1d5e2ed0
SC		 1366 case CMD_UNABORTABLE:
1367 cmd->result = DID_ERROR << 16;
1368 dev_warn(&h->pdev->dev, "Command unabortable\n");
1369 break;
edd16368
SC		 1370 default:
1371 cmd->result = DID_ERROR << 16;
1372 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1373 cp, ei->CommandStatus);
1374 }
1375 cmd->scsi_done(cmd);
1376 cmd_free(h, cp);
1377}
1378
edd16368
SC		 1379static void hpsa_pci_unmap(struct pci_dev *pdev,
1380 struct CommandList *c, int sg_used, int data_direction)
1381{
1382 int i;
1383 union u64bit addr64;
1384
1385 for (i = 0; i < sg_used; i++) {
1386 addr64.val32.lower = c->SG[i].Addr.lower;
1387 addr64.val32.upper = c->SG[i].Addr.upper;
1388 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1389 data_direction);
1390 }
1391}
1392
a2dac136 1393static int hpsa_map_one(struct pci_dev *pdev,
edd16368
SC		 1394 struct CommandList *cp,
1395 unsigned char *buf,
1396 size_t buflen,
1397 int data_direction)
1398{
01a02ffc 1399 u64 addr64;
edd16368
SC		 1400
1401 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1402 cp->Header.SGList = 0;
1403 cp->Header.SGTotal = 0;
a2dac136 1404 return 0;
edd16368
SC		 1405 }
1406
01a02ffc 1407 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
eceaae18 1408 if (dma_mapping_error(&pdev->dev, addr64)) {
a2dac136 1409 /* Prevent subsequent unmap of something never mapped */
eceaae18
SK		 1410 cp->Header.SGList = 0;
1411 cp->Header.SGTotal = 0;
a2dac136 1412 return -1;
eceaae18 1413 }
edd16368 1414 cp->SG[0].Addr.lower =
01a02ffc 1415 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1416 cp->SG[0].Addr.upper =
01a02ffc 1417 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1418 cp->SG[0].Len = buflen;
01a02ffc
SC		 1419 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1420 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
a2dac136 1421 return 0;
edd16368
SC		 1422}
1423
1424static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1425 struct CommandList *c)
1426{
1427 DECLARE_COMPLETION_ONSTACK(wait);
1428
1429 c->waiting = &wait;
1430 enqueue_cmd_and_start_io(h, c);
1431 wait_for_completion(&wait);
1432}
1433
a0c12413
SC		 1434static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1435 struct CommandList *c)
1436{
1437 unsigned long flags;
1438
1439 /* If controller lockup detected, fake a hardware error. */
1440 spin_lock_irqsave(&h->lock, flags);
1441 if (unlikely(h->lockup_detected)) {
1442 spin_unlock_irqrestore(&h->lock, flags);
1443 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1444 } else {
1445 spin_unlock_irqrestore(&h->lock, flags);
1446 hpsa_scsi_do_simple_cmd_core(h, c);
1447 }
1448}
1449
9c2fc160 1450#define MAX_DRIVER_CMD_RETRIES 25
edd16368
SC		 1451static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1452 struct CommandList *c, int data_direction)
1453{
9c2fc160 1454 int backoff_time = 10, retry_count = 0;
edd16368
SC		 1455
1456 do {
7630abd0 1457 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1458 hpsa_scsi_do_simple_cmd_core(h, c);
1459 retry_count++;
9c2fc160
SC		 1460 if (retry_count > 3) {
1461 msleep(backoff_time);
1462 if (backoff_time < 1000)
1463 backoff_time *= 2;
1464 }
852af20a 1465 } while ((check_for_unit_attention(h, c) ||
9c2fc160
SC		 1466 check_for_busy(h, c)) &&
1467 retry_count <= MAX_DRIVER_CMD_RETRIES);
edd16368
SC		 1468 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1469}
1470
1471static void hpsa_scsi_interpret_error(struct CommandList *cp)
1472{
1473 struct ErrorInfo *ei;
1474 struct device *d = &cp->h->pdev->dev;
1475
1476 ei = cp->err_info;
1477 switch (ei->CommandStatus) {
1478 case CMD_TARGET_STATUS:
1479 dev_warn(d, "cmd %p has completed with errors\n", cp);
1480 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1481 ei->ScsiStatus);
1482 if (ei->ScsiStatus == 0)
1483 dev_warn(d, "SCSI status is abnormally zero. "
1484 "(probably indicates selection timeout "
1485 "reported incorrectly due to a known "
1486 "firmware bug, circa July, 2001.)\n");
1487 break;
1488 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1489 dev_info(d, "UNDERRUN\n");
1490 break;
1491 case CMD_DATA_OVERRUN:
1492 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1493 break;
1494 case CMD_INVALID: {
1495 /* controller unfortunately reports SCSI passthru's
1496 * to non-existent targets as invalid commands.
1497 */
1498 dev_warn(d, "cp %p is reported invalid (probably means "
1499 "target device no longer present)\n", cp);
1500 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1501 print_cmd(cp); */
1502 }
1503 break;
1504 case CMD_PROTOCOL_ERR:
1505 dev_warn(d, "cp %p has protocol error \n", cp);
1506 break;
1507 case CMD_HARDWARE_ERR:
1508 /* cmd->result = DID_ERROR << 16; */
1509 dev_warn(d, "cp %p had hardware error\n", cp);
1510 break;
1511 case CMD_CONNECTION_LOST:
1512 dev_warn(d, "cp %p had connection lost\n", cp);
1513 break;
1514 case CMD_ABORTED:
1515 dev_warn(d, "cp %p was aborted\n", cp);
1516 break;
1517 case CMD_ABORT_FAILED:
1518 dev_warn(d, "cp %p reports abort failed\n", cp);
1519 break;
1520 case CMD_UNSOLICITED_ABORT:
1521 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1522 break;
1523 case CMD_TIMEOUT:
1524 dev_warn(d, "cp %p timed out\n", cp);
1525 break;
1d5e2ed0
SC		 1526 case CMD_UNABORTABLE:
1527 dev_warn(d, "Command unabortable\n");
1528 break;
edd16368
SC		 1529 default:
1530 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1531 ei->CommandStatus);
1532 }
1533}
1534
1535static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1536 unsigned char page, unsigned char *buf,
1537 unsigned char bufsize)
1538{
1539 int rc = IO_OK;
1540 struct CommandList *c;
1541 struct ErrorInfo *ei;
1542
1543 c = cmd_special_alloc(h);
1544
1545 if (c == NULL) { /* trouble... */
1546 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1547 return -ENOMEM;
edd16368
SC		 1548 }
1549
a2dac136
SC		 1550 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
1551 page, scsi3addr, TYPE_CMD)) {
1552 rc = -1;
1553 goto out;
1554 }
edd16368
SC		 1555 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1556 ei = c->err_info;
1557 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1558 hpsa_scsi_interpret_error(c);
1559 rc = -1;
1560 }
a2dac136 1561out:
edd16368
SC		 1562 cmd_special_free(h, c);
1563 return rc;
1564}
1565
1566static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1567{
1568 int rc = IO_OK;
1569 struct CommandList *c;
1570 struct ErrorInfo *ei;
1571
1572 c = cmd_special_alloc(h);
1573
1574 if (c == NULL) { /* trouble... */
1575 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1576 return -ENOMEM;
edd16368
SC		 1577 }
1578
a2dac136
SC		 1579 /* fill_cmd can't fail here, no data buffer to map. */
1580 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h,
1581 NULL, 0, 0, scsi3addr, TYPE_MSG);
edd16368
SC		 1582 hpsa_scsi_do_simple_cmd_core(h, c);
1583 /* no unmap needed here because no data xfer. */
1584
1585 ei = c->err_info;
1586 if (ei->CommandStatus != 0) {
1587 hpsa_scsi_interpret_error(c);
1588 rc = -1;
1589 }
1590 cmd_special_free(h, c);
1591 return rc;
1592}
1593
1594static void hpsa_get_raid_level(struct ctlr_info *h,
1595 unsigned char *scsi3addr, unsigned char *raid_level)
1596{
1597 int rc;
1598 unsigned char *buf;
1599
1600 *raid_level = RAID_UNKNOWN;
1601 buf = kzalloc(64, GFP_KERNEL);
1602 if (!buf)
1603 return;
1604 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1605 if (rc == 0)
1606 *raid_level = buf[8];
1607 if (*raid_level > RAID_UNKNOWN)
1608 *raid_level = RAID_UNKNOWN;
1609 kfree(buf);
1610 return;
1611}
1612
1613/* Get the device id from inquiry page 0x83 */
1614static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1615 unsigned char *device_id, int buflen)
1616{
1617 int rc;
1618 unsigned char *buf;
1619
1620 if (buflen > 16)
1621 buflen = 16;
1622 buf = kzalloc(64, GFP_KERNEL);
1623 if (!buf)
1624 return -1;
1625 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1626 if (rc == 0)
1627 memcpy(device_id, &buf[8], buflen);
1628 kfree(buf);
1629 return rc != 0;
1630}
1631
1632static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1633 struct ReportLUNdata *buf, int bufsize,
1634 int extended_response)
1635{
1636 int rc = IO_OK;
1637 struct CommandList *c;
1638 unsigned char scsi3addr[8];
1639 struct ErrorInfo *ei;
1640
1641 c = cmd_special_alloc(h);
1642 if (c == NULL) { /* trouble... */
1643 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1644 return -1;
1645 }
e89c0ae7
SC		 1646 /* address the controller */
1647 memset(scsi3addr, 0, sizeof(scsi3addr));
a2dac136
SC		 1648 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1649 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
1650 rc = -1;
1651 goto out;
1652 }
edd16368
SC		 1653 if (extended_response)
1654 c->Request.CDB[1] = extended_response;
1655 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1656 ei = c->err_info;
1657 if (ei->CommandStatus != 0 &&
1658 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1659 hpsa_scsi_interpret_error(c);
1660 rc = -1;
1661 }
a2dac136 1662out:
edd16368
SC		 1663 cmd_special_free(h, c);
1664 return rc;
1665}
1666
1667static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1668 struct ReportLUNdata *buf,
1669 int bufsize, int extended_response)
1670{
1671 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1672}
1673
1674static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1675 struct ReportLUNdata *buf, int bufsize)
1676{
1677 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1678}
1679
1680static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1681 int bus, int target, int lun)
1682{
1683 device->bus = bus;
1684 device->target = target;
1685 device->lun = lun;
1686}
1687
1688static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1689 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1690 unsigned char *is_OBDR_device)
edd16368 1691{
0b0e1d6c
SC		 1692
1693#define OBDR_SIG_OFFSET 43
1694#define OBDR_TAPE_SIG "$DR-10"
1695#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1696#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1697
ea6d3bc3 1698 unsigned char *inq_buff;
0b0e1d6c 1699 unsigned char *obdr_sig;
edd16368 1700
ea6d3bc3 1701 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1702 if (!inq_buff)
1703 goto bail_out;
1704
edd16368
SC		 1705 /* Do an inquiry to the device to see what it is. */
1706 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1707 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1708 /* Inquiry failed (msg printed already) */
1709 dev_err(&h->pdev->dev,
1710 "hpsa_update_device_info: inquiry failed\n");
1711 goto bail_out;
1712 }
1713
edd16368
SC		 1714 this_device->devtype = (inq_buff[0] & 0x1f);
1715 memcpy(this_device->scsi3addr, scsi3addr, 8);
1716 memcpy(this_device->vendor, &inq_buff[8],
1717 sizeof(this_device->vendor));
1718 memcpy(this_device->model, &inq_buff[16],
1719 sizeof(this_device->model));
edd16368
SC		 1720 memset(this_device->device_id, 0,
1721 sizeof(this_device->device_id));
1722 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1723 sizeof(this_device->device_id));
1724
1725 if (this_device->devtype == TYPE_DISK &&
1726 is_logical_dev_addr_mode(scsi3addr))
1727 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1728 else
1729 this_device->raid_level = RAID_UNKNOWN;
1730
0b0e1d6c
SC		 1731 if (is_OBDR_device) {
1732 /* See if this is a One-Button-Disaster-Recovery device
1733 * by looking for "$DR-10" at offset 43 in inquiry data.
1734 */
1735 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1736 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1737 strncmp(obdr_sig, OBDR_TAPE_SIG,
1738 OBDR_SIG_LEN) == 0);
1739 }
1740
edd16368
SC		 1741 kfree(inq_buff);
1742 return 0;
1743
1744bail_out:
1745 kfree(inq_buff);
1746 return 1;
1747}
1748
4f4eb9f1 1749static unsigned char *ext_target_model[] = {
edd16368
SC		 1750 "MSA2012",
1751 "MSA2024",
1752 "MSA2312",
1753 "MSA2324",
fda38518 1754 "P2000 G3 SAS",
edd16368
SC		 1755 NULL,
1756};
1757
4f4eb9f1 1758static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
edd16368
SC		 1759{
1760 int i;
1761
4f4eb9f1
ST		 1762 for (i = 0; ext_target_model[i]; i++)
1763 if (strncmp(device->model, ext_target_model[i],
1764 strlen(ext_target_model[i])) == 0)
edd16368
SC		 1765 return 1;
1766 return 0;
1767}
1768
1769/* Helper function to assign bus, target, lun mapping of devices.
4f4eb9f1 1770 * Puts non-external target logical volumes on bus 0, external target logical
edd16368
SC		 1771 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1772 * Logical drive target and lun are assigned at this time, but
1773 * physical device lun and target assignment are deferred (assigned
1774 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1775 */
1776static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 1777 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 1778{
1f310bde
SC		 1779 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1780
1781 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1782 /* physical device, target and lun filled in later */
edd16368 1783 if (is_hba_lunid(lunaddrbytes))
1f310bde 1784 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
edd16368 1785 else
1f310bde
SC		 1786 /* defer target, lun assignment for physical devices */
1787 hpsa_set_bus_target_lun(device, 2, -1, -1);
1788 return;
1789 }
1790 /* It's a logical device */
4f4eb9f1
ST		 1791 if (is_ext_target(h, device)) {
1792 /* external target way, put logicals on bus 1
1f310bde
SC		 1793 * and match target/lun numbers box
1794 * reports, other smart array, bus 0, target 0, match lunid
1795 */
1796 hpsa_set_bus_target_lun(device,
1797 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1798 return;
edd16368 1799 }
1f310bde 1800 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
edd16368
SC		 1801}
1802
1803/*
1804 * If there is no lun 0 on a target, linux won't find any devices.
4f4eb9f1 1805 * For the external targets (arrays), we have to manually detect the enclosure
edd16368
SC		 1806 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1807 * it for some reason. *tmpdevice is the target we're adding,
1808 * this_device is a pointer into the current element of currentsd[]
1809 * that we're building up in update_scsi_devices(), below.
1810 * lunzerobits is a bitmap that tracks which targets already have a
1811 * lun 0 assigned.
1812 * Returns 1 if an enclosure was added, 0 if not.
1813 */
4f4eb9f1 1814static int add_ext_target_dev(struct ctlr_info *h,
edd16368 1815 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1816 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
4f4eb9f1 1817 unsigned long lunzerobits[], int *n_ext_target_devs)
edd16368
SC		 1818{
1819 unsigned char scsi3addr[8];
1820
1f310bde 1821 if (test_bit(tmpdevice->target, lunzerobits))
edd16368
SC		 1822 return 0; /* There is already a lun 0 on this target. */
1823
1824 if (!is_logical_dev_addr_mode(lunaddrbytes))
1825 return 0; /* It's the logical targets that may lack lun 0. */
1826
4f4eb9f1
ST		 1827 if (!is_ext_target(h, tmpdevice))
1828 return 0; /* Only external target devices have this problem. */
edd16368 1829
1f310bde 1830 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
edd16368
SC		 1831 return 0;
1832
c4f8a299 1833 memset(scsi3addr, 0, 8);
1f310bde 1834 scsi3addr[3] = tmpdevice->target;
edd16368
SC		 1835 if (is_hba_lunid(scsi3addr))
1836 return 0; /* Don't add the RAID controller here. */
1837
339b2b14
SC		 1838 if (is_scsi_rev_5(h))
1839 return 0; /* p1210m doesn't need to do this. */
1840
4f4eb9f1 1841 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
aca4a520
ST		 1842 dev_warn(&h->pdev->dev, "Maximum number of external "
1843 "target devices exceeded. Check your hardware "
edd16368
SC		 1844 "configuration.");
1845 return 0;
1846 }
1847
0b0e1d6c 1848 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368 1849 return 0;
4f4eb9f1 1850 (*n_ext_target_devs)++;
1f310bde
SC		 1851 hpsa_set_bus_target_lun(this_device,
1852 tmpdevice->bus, tmpdevice->target, 0);
1853 set_bit(tmpdevice->target, lunzerobits);
edd16368
SC		 1854 return 1;
1855}
1856
1857/*
1858 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1859 * logdev. The number of luns in physdev and logdev are returned in
1860 * *nphysicals and *nlogicals, respectively.
1861 * Returns 0 on success, -1 otherwise.
1862 */
1863static int hpsa_gather_lun_info(struct ctlr_info *h,
1864 int reportlunsize,
01a02ffc
SC		 1865 struct ReportLUNdata *physdev, u32 *nphysicals,
1866 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1867{
1868 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1869 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1870 return -1;
1871 }
6df1e954 1872 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1873 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1874 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1875 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1876 *nphysicals - HPSA_MAX_PHYS_LUN);
1877 *nphysicals = HPSA_MAX_PHYS_LUN;
1878 }
1879 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1880 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1881 return -1;
1882 }
6df1e954 1883 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1884 /* Reject Logicals in excess of our max capability. */
1885 if (*nlogicals > HPSA_MAX_LUN) {
1886 dev_warn(&h->pdev->dev,
1887 "maximum logical LUNs (%d) exceeded. "
1888 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1889 *nlogicals - HPSA_MAX_LUN);
1890 *nlogicals = HPSA_MAX_LUN;
1891 }
1892 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1893 dev_warn(&h->pdev->dev,
1894 "maximum logical + physical LUNs (%d) exceeded. "
1895 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1896 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1897 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1898 }
1899 return 0;
1900}
1901
339b2b14
SC		 1902u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1903 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1904 struct ReportLUNdata *logdev_list)
1905{
1906 /* Helper function, figure out where the LUN ID info is coming from
1907 * given index i, lists of physical and logical devices, where in
1908 * the list the raid controller is supposed to appear (first or last)
1909 */
1910
1911 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1912 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1913
1914 if (i == raid_ctlr_position)
1915 return RAID_CTLR_LUNID;
1916
1917 if (i < logicals_start)
1918 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1919
1920 if (i < last_device)
1921 return &logdev_list->LUN[i - nphysicals -
1922 (raid_ctlr_position == 0)][0];
1923 BUG();
1924 return NULL;
1925}
1926
edd16368
SC		 1927static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1928{
1929 /* the idea here is we could get notified
1930 * that some devices have changed, so we do a report
1931 * physical luns and report logical luns cmd, and adjust
1932 * our list of devices accordingly.
1933 *
1934 * The scsi3addr's of devices won't change so long as the
1935 * adapter is not reset. That means we can rescan and
1936 * tell which devices we already know about, vs. new
1937 * devices, vs. disappearing devices.
1938 */
1939 struct ReportLUNdata *physdev_list = NULL;
1940 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1941 u32 nphysicals = 0;
1942 u32 nlogicals = 0;
1943 u32 ndev_allocated = 0;
edd16368
SC		 1944 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1945 int ncurrent = 0;
1946 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
4f4eb9f1 1947 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 1948 int raid_ctlr_position;
aca4a520 1949 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 1950
cfe5badc 1951 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1952 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1953 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1954 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1955
0b0e1d6c 1956 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1957 dev_err(&h->pdev->dev, "out of memory\n");
1958 goto out;
1959 }
1960 memset(lunzerobits, 0, sizeof(lunzerobits));
1961
1962 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1963 logdev_list, &nlogicals))
1964 goto out;
1965
aca4a520
ST		 1966 /* We might see up to the maximum number of logical and physical disks
1967 * plus external target devices, and a device for the local RAID
1968 * controller.
edd16368 1969 */
aca4a520 1970 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 1971
1972 /* Allocate the per device structures */
1973 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 1974 if (i >= HPSA_MAX_DEVICES) {
1975 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1976 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1977 ndevs_to_allocate - HPSA_MAX_DEVICES);
1978 break;
1979 }
1980
edd16368
SC		 1981 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1982 if (!currentsd[i]) {
1983 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1984 __FILE__, __LINE__);
1985 goto out;
1986 }
1987 ndev_allocated++;
1988 }
1989
339b2b14
SC		 1990 if (unlikely(is_scsi_rev_5(h)))
1991 raid_ctlr_position = 0;
1992 else
1993 raid_ctlr_position = nphysicals + nlogicals;
1994
edd16368 1995 /* adjust our table of devices */
4f4eb9f1 1996 n_ext_target_devs = 0;
edd16368 1997 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 1998 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 1999
2000 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 2001 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
2002 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 2003 /* skip masked physical devices. */
339b2b14
SC		 2004 if (lunaddrbytes[3] & 0xC0 &&
2005 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 2006 continue;
2007
2008 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 2009 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
2010 &is_OBDR))
edd16368 2011 continue; /* skip it if we can't talk to it. */
1f310bde 2012 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
edd16368
SC		 2013 this_device = currentsd[ncurrent];
2014
2015 /*
4f4eb9f1 2016 * For external target devices, we have to insert a LUN 0 which
edd16368
SC		 2017 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
2018 * is nonetheless an enclosure device there. We have to
2019 * present that otherwise linux won't find anything if
2020 * there is no lun 0.
2021 */
4f4eb9f1 2022 if (add_ext_target_dev(h, tmpdevice, this_device,
1f310bde 2023 lunaddrbytes, lunzerobits,
4f4eb9f1 2024 &n_ext_target_devs)) {
edd16368
SC		 2025 ncurrent++;
2026 this_device = currentsd[ncurrent];
2027 }
2028
2029 *this_device = *tmpdevice;
edd16368
SC		 2030
2031 switch (this_device->devtype) {
0b0e1d6c 2032 case TYPE_ROM:
edd16368
SC		 2033 /* We don't *really* support actual CD-ROM devices,
2034 * just "One Button Disaster Recovery" tape drive
2035 * which temporarily pretends to be a CD-ROM drive.
2036 * So we check that the device is really an OBDR tape
2037 * device by checking for "$DR-10" in bytes 43-48 of
2038 * the inquiry data.
2039 */
0b0e1d6c
SC		 2040 if (is_OBDR)
2041 ncurrent++;
edd16368
SC		 2042 break;
2043 case TYPE_DISK:
2044 if (i < nphysicals)
2045 break;
2046 ncurrent++;
2047 break;
2048 case TYPE_TAPE:
2049 case TYPE_MEDIUM_CHANGER:
2050 ncurrent++;
2051 break;
2052 case TYPE_RAID:
2053 /* Only present the Smartarray HBA as a RAID controller.
2054 * If it's a RAID controller other than the HBA itself
2055 * (an external RAID controller, MSA500 or similar)
2056 * don't present it.
2057 */
2058 if (!is_hba_lunid(lunaddrbytes))
2059 break;
2060 ncurrent++;
2061 break;
2062 default:
2063 break;
2064 }
cfe5badc 2065 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 2066 break;
2067 }
2068 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2069out:
2070 kfree(tmpdevice);
2071 for (i = 0; i < ndev_allocated; i++)
2072 kfree(currentsd[i]);
2073 kfree(currentsd);
edd16368
SC		 2074 kfree(physdev_list);
2075 kfree(logdev_list);
edd16368
SC		 2076}
2077
2078/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2079 * dma mapping and fills in the scatter gather entries of the
2080 * hpsa command, cp.
2081 */
33a2ffce 2082static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 2083 struct CommandList *cp,
2084 struct scsi_cmnd *cmd)
2085{
2086 unsigned int len;
2087 struct scatterlist *sg;
01a02ffc 2088 u64 addr64;
33a2ffce
SC		 2089 int use_sg, i, sg_index, chained;
2090 struct SGDescriptor *curr_sg;
edd16368 2091
33a2ffce 2092 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 2093
2094 use_sg = scsi_dma_map(cmd);
2095 if (use_sg < 0)
2096 return use_sg;
2097
2098 if (!use_sg)
2099 goto sglist_finished;
2100
33a2ffce
SC		 2101 curr_sg = cp->SG;
2102 chained = 0;
2103 sg_index = 0;
edd16368 2104 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2105 if (i == h->max_cmd_sg_entries - 1 &&
2106 use_sg > h->max_cmd_sg_entries) {
2107 chained = 1;
2108 curr_sg = h->cmd_sg_list[cp->cmdindex];
2109 sg_index = 0;
2110 }
01a02ffc 2111 addr64 = (u64) sg_dma_address(sg);
edd16368 2112 len = sg_dma_len(sg);
33a2ffce
SC		 2113 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2114 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2115 curr_sg->Len = len;
2116 curr_sg->Ext = 0; /* we are not chaining */
2117 curr_sg++;
2118 }
2119
2120 if (use_sg + chained > h->maxSG)
2121 h->maxSG = use_sg + chained;
2122
2123 if (chained) {
2124 cp->Header.SGList = h->max_cmd_sg_entries;
2125 cp->Header.SGTotal = (u16) (use_sg + 1);
2126 hpsa_map_sg_chain_block(h, cp);
2127 return 0;
edd16368
SC		 2128 }
2129
2130sglist_finished:
2131
01a02ffc
SC		 2132 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2133 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2134 return 0;
2135}
2136
2137
f281233d 2138static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2139 void (*done)(struct scsi_cmnd *))
2140{
2141 struct ctlr_info *h;
2142 struct hpsa_scsi_dev_t *dev;
2143 unsigned char scsi3addr[8];
2144 struct CommandList *c;
2145 unsigned long flags;
2146
2147 /* Get the ptr to our adapter structure out of cmd->host. */
2148 h = sdev_to_hba(cmd->device);
2149 dev = cmd->device->hostdata;
2150 if (!dev) {
2151 cmd->result = DID_NO_CONNECT << 16;
2152 done(cmd);
2153 return 0;
2154 }
2155 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2156
edd16368 2157 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2158 if (unlikely(h->lockup_detected)) {
2159 spin_unlock_irqrestore(&h->lock, flags);
2160 cmd->result = DID_ERROR << 16;
2161 done(cmd);
2162 return 0;
2163 }
edd16368 2164 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 2165 c = cmd_alloc(h);
edd16368
SC		 2166 if (c == NULL) { /* trouble... */
2167 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2168 return SCSI_MLQUEUE_HOST_BUSY;
2169 }
2170
2171 /* Fill in the command list header */
2172
2173 cmd->scsi_done = done; /* save this for use by completion code */
2174
2175 /* save c in case we have to abort it */
2176 cmd->host_scribble = (unsigned char *) c;
2177
2178 c->cmd_type = CMD_SCSI;
2179 c->scsi_cmd = cmd;
2180 c->Header.ReplyQueue = 0; /* unused in simple mode */
2181 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2182 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2183 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2184
2185 /* Fill in the request block... */
2186
2187 c->Request.Timeout = 0;
2188 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2189 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2190 c->Request.CDBLen = cmd->cmd_len;
2191 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2192 c->Request.Type.Type = TYPE_CMD;
2193 c->Request.Type.Attribute = ATTR_SIMPLE;
2194 switch (cmd->sc_data_direction) {
2195 case DMA_TO_DEVICE:
2196 c->Request.Type.Direction = XFER_WRITE;
2197 break;
2198 case DMA_FROM_DEVICE:
2199 c->Request.Type.Direction = XFER_READ;
2200 break;
2201 case DMA_NONE:
2202 c->Request.Type.Direction = XFER_NONE;
2203 break;
2204 case DMA_BIDIRECTIONAL:
2205 /* This can happen if a buggy application does a scsi passthru
2206 * and sets both inlen and outlen to non-zero. ( see
2207 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2208 */
2209
2210 c->Request.Type.Direction = XFER_RSVD;
2211 /* This is technically wrong, and hpsa controllers should
2212 * reject it with CMD_INVALID, which is the most correct
2213 * response, but non-fibre backends appear to let it
2214 * slide by, and give the same results as if this field
2215 * were set correctly. Either way is acceptable for
2216 * our purposes here.
2217 */
2218
2219 break;
2220
2221 default:
2222 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2223 cmd->sc_data_direction);
2224 BUG();
2225 break;
2226 }
2227
33a2ffce 2228 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2229 cmd_free(h, c);
2230 return SCSI_MLQUEUE_HOST_BUSY;
2231 }
2232 enqueue_cmd_and_start_io(h, c);
2233 /* the cmd'll come back via intr handler in complete_scsi_command() */
2234 return 0;
2235}
2236
f281233d
JG		 2237static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2238
a08a8471
SC		 2239static void hpsa_scan_start(struct Scsi_Host *sh)
2240{
2241 struct ctlr_info *h = shost_to_hba(sh);
2242 unsigned long flags;
2243
2244 /* wait until any scan already in progress is finished. */
2245 while (1) {
2246 spin_lock_irqsave(&h->scan_lock, flags);
2247 if (h->scan_finished)
2248 break;
2249 spin_unlock_irqrestore(&h->scan_lock, flags);
2250 wait_event(h->scan_wait_queue, h->scan_finished);
2251 /* Note: We don't need to worry about a race between this
2252 * thread and driver unload because the midlayer will
2253 * have incremented the reference count, so unload won't
2254 * happen if we're in here.
2255 */
2256 }
2257 h->scan_finished = 0; /* mark scan as in progress */
2258 spin_unlock_irqrestore(&h->scan_lock, flags);
2259
2260 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2261
2262 spin_lock_irqsave(&h->scan_lock, flags);
2263 h->scan_finished = 1; /* mark scan as finished. */
2264 wake_up_all(&h->scan_wait_queue);
2265 spin_unlock_irqrestore(&h->scan_lock, flags);
2266}
2267
2268static int hpsa_scan_finished(struct Scsi_Host *sh,
2269 unsigned long elapsed_time)
2270{
2271 struct ctlr_info *h = shost_to_hba(sh);
2272 unsigned long flags;
2273 int finished;
2274
2275 spin_lock_irqsave(&h->scan_lock, flags);
2276 finished = h->scan_finished;
2277 spin_unlock_irqrestore(&h->scan_lock, flags);
2278 return finished;
2279}
2280
667e23d4
SC		 2281static int hpsa_change_queue_depth(struct scsi_device *sdev,
2282 int qdepth, int reason)
2283{
2284 struct ctlr_info *h = sdev_to_hba(sdev);
2285
2286 if (reason != SCSI_QDEPTH_DEFAULT)
2287 return -ENOTSUPP;
2288
2289 if (qdepth < 1)
2290 qdepth = 1;
2291 else
2292 if (qdepth > h->nr_cmds)
2293 qdepth = h->nr_cmds;
2294 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2295 return sdev->queue_depth;
2296}
2297
edd16368
SC		 2298static void hpsa_unregister_scsi(struct ctlr_info *h)
2299{
2300 /* we are being forcibly unloaded, and may not refuse. */
2301 scsi_remove_host(h->scsi_host);
2302 scsi_host_put(h->scsi_host);
2303 h->scsi_host = NULL;
2304}
2305
2306static int hpsa_register_scsi(struct ctlr_info *h)
2307{
b705690d
SC		 2308 struct Scsi_Host *sh;
2309 int error;
edd16368 2310
b705690d
SC		 2311 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2312 if (sh == NULL)
2313 goto fail;
2314
2315 sh->io_port = 0;
2316 sh->n_io_port = 0;
2317 sh->this_id = -1;
2318 sh->max_channel = 3;
2319 sh->max_cmd_len = MAX_COMMAND_SIZE;
2320 sh->max_lun = HPSA_MAX_LUN;
2321 sh->max_id = HPSA_MAX_LUN;
2322 sh->can_queue = h->nr_cmds;
2323 sh->cmd_per_lun = h->nr_cmds;
2324 sh->sg_tablesize = h->maxsgentries;
2325 h->scsi_host = sh;
2326 sh->hostdata[0] = (unsigned long) h;
2327 sh->irq = h->intr[h->intr_mode];
2328 sh->unique_id = sh->irq;
2329 error = scsi_add_host(sh, &h->pdev->dev);
2330 if (error)
2331 goto fail_host_put;
2332 scsi_scan_host(sh);
2333 return 0;
2334
2335 fail_host_put:
2336 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2337 " failed for controller %d\n", __func__, h->ctlr);
2338 scsi_host_put(sh);
2339 return error;
2340 fail:
2341 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2342 " failed for controller %d\n", __func__, h->ctlr);
2343 return -ENOMEM;
edd16368
SC		 2344}
2345
2346static int wait_for_device_to_become_ready(struct ctlr_info *h,
2347 unsigned char lunaddr[])
2348{
2349 int rc = 0;
2350 int count = 0;
2351 int waittime = 1; /* seconds */
2352 struct CommandList *c;
2353
2354 c = cmd_special_alloc(h);
2355 if (!c) {
2356 dev_warn(&h->pdev->dev, "out of memory in "
2357 "wait_for_device_to_become_ready.\n");
2358 return IO_ERROR;
2359 }
2360
2361 /* Send test unit ready until device ready, or give up. */
2362 while (count < HPSA_TUR_RETRY_LIMIT) {
2363
2364 /* Wait for a bit. do this first, because if we send
2365 * the TUR right away, the reset will just abort it.
2366 */
2367 msleep(1000 * waittime);
2368 count++;
2369
2370 /* Increase wait time with each try, up to a point. */
2371 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2372 waittime = waittime * 2;
2373
a2dac136
SC		 2374 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
2375 (void) fill_cmd(c, TEST_UNIT_READY, h,
2376 NULL, 0, 0, lunaddr, TYPE_CMD);
edd16368
SC		 2377 hpsa_scsi_do_simple_cmd_core(h, c);
2378 /* no unmap needed here because no data xfer. */
2379
2380 if (c->err_info->CommandStatus == CMD_SUCCESS)
2381 break;
2382
2383 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2384 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2385 (c->err_info->SenseInfo[2] == NO_SENSE ||
2386 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2387 break;
2388
2389 dev_warn(&h->pdev->dev, "waiting %d secs "
2390 "for device to become ready.\n", waittime);
2391 rc = 1; /* device not ready. */
2392 }
2393
2394 if (rc)
2395 dev_warn(&h->pdev->dev, "giving up on device.\n");
2396 else
2397 dev_warn(&h->pdev->dev, "device is ready.\n");
2398
2399 cmd_special_free(h, c);
2400 return rc;
2401}
2402
2403/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2404 * complaining. Doing a host- or bus-reset can't do anything good here.
2405 */
2406static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2407{
2408 int rc;
2409 struct ctlr_info *h;
2410 struct hpsa_scsi_dev_t *dev;
2411
2412 /* find the controller to which the command to be aborted was sent */
2413 h = sdev_to_hba(scsicmd->device);
2414 if (h == NULL) /* paranoia */
2415 return FAILED;
edd16368
SC		 2416 dev = scsicmd->device->hostdata;
2417 if (!dev) {
2418 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2419 "device lookup failed.\n");
2420 return FAILED;
2421 }
d416b0c7
SC		 2422 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2423 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2424 /* send a reset to the SCSI LUN which the command was sent to */
2425 rc = hpsa_send_reset(h, dev->scsi3addr);
2426 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2427 return SUCCESS;
2428
2429 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2430 return FAILED;
2431}
2432
6cba3f19
SC		 2433static void swizzle_abort_tag(u8 *tag)
2434{
2435 u8 original_tag[8];
2436
2437 memcpy(original_tag, tag, 8);
2438 tag[0] = original_tag[3];
2439 tag[1] = original_tag[2];
2440 tag[2] = original_tag[1];
2441 tag[3] = original_tag[0];
2442 tag[4] = original_tag[7];
2443 tag[5] = original_tag[6];
2444 tag[6] = original_tag[5];
2445 tag[7] = original_tag[4];
2446}
2447
75167d2c 2448static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
6cba3f19 2449 struct CommandList *abort, int swizzle)
75167d2c
SC		 2450{
2451 int rc = IO_OK;
2452 struct CommandList *c;
2453 struct ErrorInfo *ei;
2454
2455 c = cmd_special_alloc(h);
2456 if (c == NULL) { /* trouble... */
2457 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2458 return -ENOMEM;
2459 }
2460
a2dac136
SC		 2461 /* fill_cmd can't fail here, no buffer to map */
2462 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
2463 0, 0, scsi3addr, TYPE_MSG);
6cba3f19
SC		 2464 if (swizzle)
2465 swizzle_abort_tag(&c->Request.CDB[4]);
75167d2c
SC		 2466 hpsa_scsi_do_simple_cmd_core(h, c);
2467 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2468 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2469 /* no unmap needed here because no data xfer. */
2470
2471 ei = c->err_info;
2472 switch (ei->CommandStatus) {
2473 case CMD_SUCCESS:
2474 break;
2475 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2476 rc = -1;
2477 break;
2478 default:
2479 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2480 __func__, abort->Header.Tag.upper,
2481 abort->Header.Tag.lower);
2482 hpsa_scsi_interpret_error(c);
2483 rc = -1;
2484 break;
2485 }
2486 cmd_special_free(h, c);
2487 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2488 abort->Header.Tag.upper, abort->Header.Tag.lower);
2489 return rc;
2490}
2491
2492/*
2493 * hpsa_find_cmd_in_queue
2494 *
2495 * Used to determine whether a command (find) is still present
2496 * in queue_head. Optionally excludes the last element of queue_head.
2497 *
2498 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2499 * not yet been submitted, and so can be aborted by the driver without
2500 * sending an abort to the hardware.
2501 *
2502 * Returns pointer to command if found in queue, NULL otherwise.
2503 */
2504static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2505 struct scsi_cmnd *find, struct list_head *queue_head)
2506{
2507 unsigned long flags;
2508 struct CommandList *c = NULL; /* ptr into cmpQ */
2509
2510 if (!find)
2511 return 0;
2512 spin_lock_irqsave(&h->lock, flags);
2513 list_for_each_entry(c, queue_head, list) {
2514 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2515 continue;
2516 if (c->scsi_cmd == find) {
2517 spin_unlock_irqrestore(&h->lock, flags);
2518 return c;
2519 }
2520 }
2521 spin_unlock_irqrestore(&h->lock, flags);
2522 return NULL;
2523}
2524
6cba3f19
SC		 2525static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2526 u8 *tag, struct list_head *queue_head)
2527{
2528 unsigned long flags;
2529 struct CommandList *c;
2530
2531 spin_lock_irqsave(&h->lock, flags);
2532 list_for_each_entry(c, queue_head, list) {
2533 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2534 continue;
2535 spin_unlock_irqrestore(&h->lock, flags);
2536 return c;
2537 }
2538 spin_unlock_irqrestore(&h->lock, flags);
2539 return NULL;
2540}
2541
2542/* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2543 * tell which kind we're dealing with, so we send the abort both ways. There
2544 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2545 * way we construct our tags but we check anyway in case the assumptions which
2546 * make this true someday become false.
2547 */
2548static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2549 unsigned char *scsi3addr, struct CommandList *abort)
2550{
2551 u8 swizzled_tag[8];
2552 struct CommandList *c;
2553 int rc = 0, rc2 = 0;
2554
2555 /* we do not expect to find the swizzled tag in our queue, but
2556 * check anyway just to be sure the assumptions which make this
2557 * the case haven't become wrong.
2558 */
2559 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2560 swizzle_abort_tag(swizzled_tag);
2561 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2562 if (c != NULL) {
2563 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2564 return hpsa_send_abort(h, scsi3addr, abort, 0);
2565 }
2566 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2567
2568 /* if the command is still in our queue, we can't conclude that it was
2569 * aborted (it might have just completed normally) but in any case
2570 * we don't need to try to abort it another way.
2571 */
2572 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2573 if (c)
2574 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2575 return rc && rc2;
2576}
2577
75167d2c
SC		 2578/* Send an abort for the specified command.
2579 * If the device and controller support it,
2580 * send a task abort request.
2581 */
2582static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2583{
2584
2585 int i, rc;
2586 struct ctlr_info *h;
2587 struct hpsa_scsi_dev_t *dev;
2588 struct CommandList *abort; /* pointer to command to be aborted */
2589 struct CommandList *found;
2590 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2591 char msg[256]; /* For debug messaging. */
2592 int ml = 0;
2593
2594 /* Find the controller of the command to be aborted */
2595 h = sdev_to_hba(sc->device);
2596 if (WARN(h == NULL,
2597 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2598 return FAILED;
2599
2600 /* Check that controller supports some kind of task abort */
2601 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2602 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2603 return FAILED;
2604
2605 memset(msg, 0, sizeof(msg));
2606 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2607 h->scsi_host->host_no, sc->device->channel,
2608 sc->device->id, sc->device->lun);
2609
2610 /* Find the device of the command to be aborted */
2611 dev = sc->device->hostdata;
2612 if (!dev) {
2613 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2614 msg);
2615 return FAILED;
2616 }
2617
2618 /* Get SCSI command to be aborted */
2619 abort = (struct CommandList *) sc->host_scribble;
2620 if (abort == NULL) {
2621 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2622 msg);
2623 return FAILED;
2624 }
2625
2626 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2627 abort->Header.Tag.upper, abort->Header.Tag.lower);
2628 as = (struct scsi_cmnd *) abort->scsi_cmd;
2629 if (as != NULL)
2630 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2631 as->cmnd[0], as->serial_number);
2632 dev_dbg(&h->pdev->dev, "%s\n", msg);
2633 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2634 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2635
2636 /* Search reqQ to See if command is queued but not submitted,
2637 * if so, complete the command with aborted status and remove
2638 * it from the reqQ.
2639 */
2640 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2641 if (found) {
2642 found->err_info->CommandStatus = CMD_ABORTED;
2643 finish_cmd(found);
2644 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2645 msg);
2646 return SUCCESS;
2647 }
2648
2649 /* not in reqQ, if also not in cmpQ, must have already completed */
2650 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2651 if (!found) {
d6ebd0f7 2652 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
75167d2c
SC		 2653 msg);
2654 return SUCCESS;
2655 }
2656
2657 /*
2658 * Command is in flight, or possibly already completed
2659 * by the firmware (but not to the scsi mid layer) but we can't
2660 * distinguish which. Send the abort down.
2661 */
6cba3f19 2662 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
75167d2c
SC		 2663 if (rc != 0) {
2664 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2665 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2666 h->scsi_host->host_no,
2667 dev->bus, dev->target, dev->lun);
2668 return FAILED;
2669 }
2670 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2671
2672 /* If the abort(s) above completed and actually aborted the
2673 * command, then the command to be aborted should already be
2674 * completed. If not, wait around a bit more to see if they
2675 * manage to complete normally.
2676 */
2677#define ABORT_COMPLETE_WAIT_SECS 30
2678 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2679 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2680 if (!found)
2681 return SUCCESS;
2682 msleep(100);
2683 }
2684 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2685 msg, ABORT_COMPLETE_WAIT_SECS);
2686 return FAILED;
2687}
2688
2689
edd16368
SC		 2690/*
2691 * For operations that cannot sleep, a command block is allocated at init,
2692 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2693 * which ones are free or in use. Lock must be held when calling this.
2694 * cmd_free() is the complement.
2695 */
2696static struct CommandList *cmd_alloc(struct ctlr_info *h)
2697{
2698 struct CommandList *c;
2699 int i;
2700 union u64bit temp64;
2701 dma_addr_t cmd_dma_handle, err_dma_handle;
e16a33ad 2702 unsigned long flags;
edd16368 2703
e16a33ad 2704 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2705 do {
2706 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
e16a33ad
MG		 2707 if (i == h->nr_cmds) {
2708 spin_unlock_irqrestore(&h->lock, flags);
edd16368 2709 return NULL;
e16a33ad 2710 }
edd16368
SC		 2711 } while (test_and_set_bit
2712 (i & (BITS_PER_LONG - 1),
2713 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
e16a33ad
MG		 2714 h->nr_allocs++;
2715 spin_unlock_irqrestore(&h->lock, flags);
2716
edd16368
SC		 2717 c = h->cmd_pool + i;
2718 memset(c, 0, sizeof(*c));
2719 cmd_dma_handle = h->cmd_pool_dhandle
2720 + i * sizeof(*c);
2721 c->err_info = h->errinfo_pool + i;
2722 memset(c->err_info, 0, sizeof(*c->err_info));
2723 err_dma_handle = h->errinfo_pool_dhandle
2724 + i * sizeof(*c->err_info);
edd16368
SC		 2725
2726 c->cmdindex = i;
2727
9e0fc764 2728 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2729 c->busaddr = (u32) cmd_dma_handle;
2730 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2731 c->ErrDesc.Addr.lower = temp64.val32.lower;
2732 c->ErrDesc.Addr.upper = temp64.val32.upper;
2733 c->ErrDesc.Len = sizeof(*c->err_info);
2734
2735 c->h = h;
2736 return c;
2737}
2738
2739/* For operations that can wait for kmalloc to possibly sleep,
2740 * this routine can be called. Lock need not be held to call
2741 * cmd_special_alloc. cmd_special_free() is the complement.
2742 */
2743static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2744{
2745 struct CommandList *c;
2746 union u64bit temp64;
2747 dma_addr_t cmd_dma_handle, err_dma_handle;
2748
2749 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2750 if (c == NULL)
2751 return NULL;
2752 memset(c, 0, sizeof(*c));
2753
2754 c->cmdindex = -1;
2755
2756 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2757 &err_dma_handle);
2758
2759 if (c->err_info == NULL) {
2760 pci_free_consistent(h->pdev,
2761 sizeof(*c), c, cmd_dma_handle);
2762 return NULL;
2763 }
2764 memset(c->err_info, 0, sizeof(*c->err_info));
2765
9e0fc764 2766 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2767 c->busaddr = (u32) cmd_dma_handle;
2768 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2769 c->ErrDesc.Addr.lower = temp64.val32.lower;
2770 c->ErrDesc.Addr.upper = temp64.val32.upper;
2771 c->ErrDesc.Len = sizeof(*c->err_info);
2772
2773 c->h = h;
2774 return c;
2775}
2776
2777static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2778{
2779 int i;
e16a33ad 2780 unsigned long flags;
edd16368
SC		 2781
2782 i = c - h->cmd_pool;
e16a33ad 2783 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2784 clear_bit(i & (BITS_PER_LONG - 1),
2785 h->cmd_pool_bits + (i / BITS_PER_LONG));
2786 h->nr_frees++;
e16a33ad 2787 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 2788}
2789
2790static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2791{
2792 union u64bit temp64;
2793
2794 temp64.val32.lower = c->ErrDesc.Addr.lower;
2795 temp64.val32.upper = c->ErrDesc.Addr.upper;
2796 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2797 c->err_info, (dma_addr_t) temp64.val);
2798 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2799 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2800}
2801
2802#ifdef CONFIG_COMPAT
2803
edd16368
SC		 2804static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2805{
2806 IOCTL32_Command_struct __user *arg32 =
2807 (IOCTL32_Command_struct __user *) arg;
2808 IOCTL_Command_struct arg64;
2809 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2810 int err;
2811 u32 cp;
2812
938abd84 2813 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2814 err = 0;
2815 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2816 sizeof(arg64.LUN_info));
2817 err |= copy_from_user(&arg64.Request, &arg32->Request,
2818 sizeof(arg64.Request));
2819 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2820 sizeof(arg64.error_info));
2821 err |= get_user(arg64.buf_size, &arg32->buf_size);
2822 err |= get_user(cp, &arg32->buf);
2823 arg64.buf = compat_ptr(cp);
2824 err |= copy_to_user(p, &arg64, sizeof(arg64));
2825
2826 if (err)
2827 return -EFAULT;
2828
e39eeaed 2829 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2830 if (err)
2831 return err;
2832 err |= copy_in_user(&arg32->error_info, &p->error_info,
2833 sizeof(arg32->error_info));
2834 if (err)
2835 return -EFAULT;
2836 return err;
2837}
2838
2839static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2840 int cmd, void *arg)
2841{
2842 BIG_IOCTL32_Command_struct __user *arg32 =
2843 (BIG_IOCTL32_Command_struct __user *) arg;
2844 BIG_IOCTL_Command_struct arg64;
2845 BIG_IOCTL_Command_struct __user *p =
2846 compat_alloc_user_space(sizeof(arg64));
2847 int err;
2848 u32 cp;
2849
938abd84 2850 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2851 err = 0;
2852 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2853 sizeof(arg64.LUN_info));
2854 err |= copy_from_user(&arg64.Request, &arg32->Request,
2855 sizeof(arg64.Request));
2856 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2857 sizeof(arg64.error_info));
2858 err |= get_user(arg64.buf_size, &arg32->buf_size);
2859 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2860 err |= get_user(cp, &arg32->buf);
2861 arg64.buf = compat_ptr(cp);
2862 err |= copy_to_user(p, &arg64, sizeof(arg64));
2863
2864 if (err)
2865 return -EFAULT;
2866
e39eeaed 2867 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2868 if (err)
2869 return err;
2870 err |= copy_in_user(&arg32->error_info, &p->error_info,
2871 sizeof(arg32->error_info));
2872 if (err)
2873 return -EFAULT;
2874 return err;
2875}
71fe75a7
SC		 2876
2877static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2878{
2879 switch (cmd) {
2880 case CCISS_GETPCIINFO:
2881 case CCISS_GETINTINFO:
2882 case CCISS_SETINTINFO:
2883 case CCISS_GETNODENAME:
2884 case CCISS_SETNODENAME:
2885 case CCISS_GETHEARTBEAT:
2886 case CCISS_GETBUSTYPES:
2887 case CCISS_GETFIRMVER:
2888 case CCISS_GETDRIVVER:
2889 case CCISS_REVALIDVOLS:
2890 case CCISS_DEREGDISK:
2891 case CCISS_REGNEWDISK:
2892 case CCISS_REGNEWD:
2893 case CCISS_RESCANDISK:
2894 case CCISS_GETLUNINFO:
2895 return hpsa_ioctl(dev, cmd, arg);
2896
2897 case CCISS_PASSTHRU32:
2898 return hpsa_ioctl32_passthru(dev, cmd, arg);
2899 case CCISS_BIG_PASSTHRU32:
2900 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2901
2902 default:
2903 return -ENOIOCTLCMD;
2904 }
2905}
edd16368
SC		 2906#endif
2907
2908static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2909{
2910 struct hpsa_pci_info pciinfo;
2911
2912 if (!argp)
2913 return -EINVAL;
2914 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2915 pciinfo.bus = h->pdev->bus->number;
2916 pciinfo.dev_fn = h->pdev->devfn;
2917 pciinfo.board_id = h->board_id;
2918 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2919 return -EFAULT;
2920 return 0;
2921}
2922
2923static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2924{
2925 DriverVer_type DriverVer;
2926 unsigned char vmaj, vmin, vsubmin;
2927 int rc;
2928
2929 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2930 &vmaj, &vmin, &vsubmin);
2931 if (rc != 3) {
2932 dev_info(&h->pdev->dev, "driver version string '%s' "
2933 "unrecognized.", HPSA_DRIVER_VERSION);
2934 vmaj = 0;
2935 vmin = 0;
2936 vsubmin = 0;
2937 }
2938 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2939 if (!argp)
2940 return -EINVAL;
2941 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2942 return -EFAULT;
2943 return 0;
2944}
2945
2946static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2947{
2948 IOCTL_Command_struct iocommand;
2949 struct CommandList *c;
2950 char *buff = NULL;
2951 union u64bit temp64;
2952
2953 if (!argp)
2954 return -EINVAL;
2955 if (!capable(CAP_SYS_RAWIO))
2956 return -EPERM;
2957 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2958 return -EFAULT;
2959 if ((iocommand.buf_size < 1) &&
2960 (iocommand.Request.Type.Direction != XFER_NONE)) {
2961 return -EINVAL;
2962 }
2963 if (iocommand.buf_size > 0) {
2964 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2965 if (buff == NULL)
2966 return -EFAULT;
b03a7771
SC		 2967 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2968 /* Copy the data into the buffer we created */
2969 if (copy_from_user(buff, iocommand.buf,
2970 iocommand.buf_size)) {
2971 kfree(buff);
2972 return -EFAULT;
2973 }
2974 } else {
2975 memset(buff, 0, iocommand.buf_size);
edd16368 2976 }
b03a7771 2977 }
edd16368
SC		 2978 c = cmd_special_alloc(h);
2979 if (c == NULL) {
2980 kfree(buff);
2981 return -ENOMEM;
2982 }
2983 /* Fill in the command type */
2984 c->cmd_type = CMD_IOCTL_PEND;
2985 /* Fill in Command Header */
2986 c->Header.ReplyQueue = 0; /* unused in simple mode */
2987 if (iocommand.buf_size > 0) { /* buffer to fill */
2988 c->Header.SGList = 1;
2989 c->Header.SGTotal = 1;
2990 } else { /* no buffers to fill */
2991 c->Header.SGList = 0;
2992 c->Header.SGTotal = 0;
2993 }
2994 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2995 /* use the kernel address the cmd block for tag */
2996 c->Header.Tag.lower = c->busaddr;
2997
2998 /* Fill in Request block */
2999 memcpy(&c->Request, &iocommand.Request,
3000 sizeof(c->Request));
3001
3002 /* Fill in the scatter gather information */
3003 if (iocommand.buf_size > 0) {
3004 temp64.val = pci_map_single(h->pdev, buff,
3005 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
3006 c->SG[0].Addr.lower = temp64.val32.lower;
3007 c->SG[0].Addr.upper = temp64.val32.upper;
3008 c->SG[0].Len = iocommand.buf_size;
3009 c->SG[0].Ext = 0; /* we are not chaining*/
3010 }
a0c12413 3011 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 3012 if (iocommand.buf_size > 0)
3013 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3014 check_ioctl_unit_attention(h, c);
3015
3016 /* Copy the error information out */
3017 memcpy(&iocommand.error_info, c->err_info,
3018 sizeof(iocommand.error_info));
3019 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
3020 kfree(buff);
3021 cmd_special_free(h, c);
3022 return -EFAULT;
3023 }
b03a7771
SC		 3024 if (iocommand.Request.Type.Direction == XFER_READ &&
3025 iocommand.buf_size > 0) {
edd16368
SC		 3026 /* Copy the data out of the buffer we created */
3027 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
3028 kfree(buff);
3029 cmd_special_free(h, c);
3030 return -EFAULT;
3031 }
3032 }
3033 kfree(buff);
3034 cmd_special_free(h, c);
3035 return 0;
3036}
3037
3038static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
3039{
3040 BIG_IOCTL_Command_struct *ioc;
3041 struct CommandList *c;
3042 unsigned char **buff = NULL;
3043 int *buff_size = NULL;
3044 union u64bit temp64;
3045 BYTE sg_used = 0;
3046 int status = 0;
3047 int i;
01a02ffc
SC		 3048 u32 left;
3049 u32 sz;
edd16368
SC		 3050 BYTE __user *data_ptr;
3051
3052 if (!argp)
3053 return -EINVAL;
3054 if (!capable(CAP_SYS_RAWIO))
3055 return -EPERM;
3056 ioc = (BIG_IOCTL_Command_struct *)
3057 kmalloc(sizeof(*ioc), GFP_KERNEL);
3058 if (!ioc) {
3059 status = -ENOMEM;
3060 goto cleanup1;
3061 }
3062 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
3063 status = -EFAULT;
3064 goto cleanup1;
3065 }
3066 if ((ioc->buf_size < 1) &&
3067 (ioc->Request.Type.Direction != XFER_NONE)) {
3068 status = -EINVAL;
3069 goto cleanup1;
3070 }
3071 /* Check kmalloc limits using all SGs */
3072 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3073 status = -EINVAL;
3074 goto cleanup1;
3075 }
d66ae08b 3076 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 3077 status = -EINVAL;
3078 goto cleanup1;
3079 }
d66ae08b 3080 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 3081 if (!buff) {
3082 status = -ENOMEM;
3083 goto cleanup1;
3084 }
d66ae08b 3085 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 3086 if (!buff_size) {
3087 status = -ENOMEM;
3088 goto cleanup1;
3089 }
3090 left = ioc->buf_size;
3091 data_ptr = ioc->buf;
3092 while (left) {
3093 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3094 buff_size[sg_used] = sz;
3095 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3096 if (buff[sg_used] == NULL) {
3097 status = -ENOMEM;
3098 goto cleanup1;
3099 }
3100 if (ioc->Request.Type.Direction == XFER_WRITE) {
3101 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3102 status = -ENOMEM;
3103 goto cleanup1;
3104 }
3105 } else
3106 memset(buff[sg_used], 0, sz);
3107 left -= sz;
3108 data_ptr += sz;
3109 sg_used++;
3110 }
3111 c = cmd_special_alloc(h);
3112 if (c == NULL) {
3113 status = -ENOMEM;
3114 goto cleanup1;
3115 }
3116 c->cmd_type = CMD_IOCTL_PEND;
3117 c->Header.ReplyQueue = 0;
b03a7771 3118 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 3119 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3120 c->Header.Tag.lower = c->busaddr;
3121 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3122 if (ioc->buf_size > 0) {
3123 int i;
3124 for (i = 0; i < sg_used; i++) {
3125 temp64.val = pci_map_single(h->pdev, buff[i],
3126 buff_size[i], PCI_DMA_BIDIRECTIONAL);
3127 c->SG[i].Addr.lower = temp64.val32.lower;
3128 c->SG[i].Addr.upper = temp64.val32.upper;
3129 c->SG[i].Len = buff_size[i];
3130 /* we are not chaining */
3131 c->SG[i].Ext = 0;
3132 }
3133 }
a0c12413 3134 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 3135 if (sg_used)
3136 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3137 check_ioctl_unit_attention(h, c);
3138 /* Copy the error information out */
3139 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3140 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
3141 cmd_special_free(h, c);
3142 status = -EFAULT;
3143 goto cleanup1;
3144 }
b03a7771 3145 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 3146 /* Copy the data out of the buffer we created */
3147 BYTE __user *ptr = ioc->buf;
3148 for (i = 0; i < sg_used; i++) {
3149 if (copy_to_user(ptr, buff[i], buff_size[i])) {
3150 cmd_special_free(h, c);
3151 status = -EFAULT;
3152 goto cleanup1;
3153 }
3154 ptr += buff_size[i];
3155 }
3156 }
3157 cmd_special_free(h, c);
3158 status = 0;
3159cleanup1:
3160 if (buff) {
3161 for (i = 0; i < sg_used; i++)
3162 kfree(buff[i]);
3163 kfree(buff);
3164 }
3165 kfree(buff_size);
3166 kfree(ioc);
3167 return status;
3168}
3169
3170static void check_ioctl_unit_attention(struct ctlr_info *h,
3171 struct CommandList *c)
3172{
3173 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3174 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3175 (void) check_for_unit_attention(h, c);
3176}
3177/*
3178 * ioctl
3179 */
3180static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3181{
3182 struct ctlr_info *h;
3183 void __user *argp = (void __user *)arg;
3184
3185 h = sdev_to_hba(dev);
3186
3187 switch (cmd) {
3188 case CCISS_DEREGDISK:
3189 case CCISS_REGNEWDISK:
3190 case CCISS_REGNEWD:
a08a8471 3191 hpsa_scan_start(h->scsi_host);
edd16368
SC		 3192 return 0;
3193 case CCISS_GETPCIINFO:
3194 return hpsa_getpciinfo_ioctl(h, argp);
3195 case CCISS_GETDRIVVER:
3196 return hpsa_getdrivver_ioctl(h, argp);
3197 case CCISS_PASSTHRU:
3198 return hpsa_passthru_ioctl(h, argp);
3199 case CCISS_BIG_PASSTHRU:
3200 return hpsa_big_passthru_ioctl(h, argp);
3201 default:
3202 return -ENOTTY;
3203 }
3204}
3205
6f039790
GKH		 3206static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3207 u8 reset_type)
64670ac8
SC		 3208{
3209 struct CommandList *c;
3210
3211 c = cmd_alloc(h);
3212 if (!c)
3213 return -ENOMEM;
a2dac136
SC		 3214 /* fill_cmd can't fail here, no data buffer to map */
3215 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
64670ac8
SC		 3216 RAID_CTLR_LUNID, TYPE_MSG);
3217 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3218 c->waiting = NULL;
3219 enqueue_cmd_and_start_io(h, c);
3220 /* Don't wait for completion, the reset won't complete. Don't free
3221 * the command either. This is the last command we will send before
3222 * re-initializing everything, so it doesn't matter and won't leak.
3223 */
3224 return 0;
3225}
3226
a2dac136 3227static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 3228 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 3229 int cmd_type)
3230{
3231 int pci_dir = XFER_NONE;
75167d2c 3232 struct CommandList *a; /* for commands to be aborted */
edd16368
SC		 3233
3234 c->cmd_type = CMD_IOCTL_PEND;
3235 c->Header.ReplyQueue = 0;
3236 if (buff != NULL && size > 0) {
3237 c->Header.SGList = 1;
3238 c->Header.SGTotal = 1;
3239 } else {
3240 c->Header.SGList = 0;
3241 c->Header.SGTotal = 0;
3242 }
3243 c->Header.Tag.lower = c->busaddr;
3244 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3245
3246 c->Request.Type.Type = cmd_type;
3247 if (cmd_type == TYPE_CMD) {
3248 switch (cmd) {
3249 case HPSA_INQUIRY:
3250 /* are we trying to read a vital product page */
3251 if (page_code != 0) {
3252 c->Request.CDB[1] = 0x01;
3253 c->Request.CDB[2] = page_code;
3254 }
3255 c->Request.CDBLen = 6;
3256 c->Request.Type.Attribute = ATTR_SIMPLE;
3257 c->Request.Type.Direction = XFER_READ;
3258 c->Request.Timeout = 0;
3259 c->Request.CDB[0] = HPSA_INQUIRY;
3260 c->Request.CDB[4] = size & 0xFF;
3261 break;
3262 case HPSA_REPORT_LOG:
3263 case HPSA_REPORT_PHYS:
3264 /* Talking to controller so It's a physical command
3265 mode = 00 target = 0. Nothing to write.
3266 */
3267 c->Request.CDBLen = 12;
3268 c->Request.Type.Attribute = ATTR_SIMPLE;
3269 c->Request.Type.Direction = XFER_READ;
3270 c->Request.Timeout = 0;
3271 c->Request.CDB[0] = cmd;
3272 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3273 c->Request.CDB[7] = (size >> 16) & 0xFF;
3274 c->Request.CDB[8] = (size >> 8) & 0xFF;
3275 c->Request.CDB[9] = size & 0xFF;
3276 break;
edd16368
SC		 3277 case HPSA_CACHE_FLUSH:
3278 c->Request.CDBLen = 12;
3279 c->Request.Type.Attribute = ATTR_SIMPLE;
3280 c->Request.Type.Direction = XFER_WRITE;
3281 c->Request.Timeout = 0;
3282 c->Request.CDB[0] = BMIC_WRITE;
3283 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 3284 c->Request.CDB[7] = (size >> 8) & 0xFF;
3285 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 3286 break;
3287 case TEST_UNIT_READY:
3288 c->Request.CDBLen = 6;
3289 c->Request.Type.Attribute = ATTR_SIMPLE;
3290 c->Request.Type.Direction = XFER_NONE;
3291 c->Request.Timeout = 0;
3292 break;
3293 default:
3294 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3295 BUG();
a2dac136 3296 return -1;
edd16368
SC		 3297 }
3298 } else if (cmd_type == TYPE_MSG) {
3299 switch (cmd) {
3300
3301 case HPSA_DEVICE_RESET_MSG:
3302 c->Request.CDBLen = 16;
3303 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3304 c->Request.Type.Attribute = ATTR_SIMPLE;
3305 c->Request.Type.Direction = XFER_NONE;
3306 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 3307 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3308 c->Request.CDB[0] = cmd;
21e89afd 3309 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
edd16368
SC		 3310 /* If bytes 4-7 are zero, it means reset the */
3311 /* LunID device */
3312 c->Request.CDB[4] = 0x00;
3313 c->Request.CDB[5] = 0x00;
3314 c->Request.CDB[6] = 0x00;
3315 c->Request.CDB[7] = 0x00;
75167d2c
SC		 3316 break;
3317 case HPSA_ABORT_MSG:
3318 a = buff; /* point to command to be aborted */
3319 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3320 a->Header.Tag.upper, a->Header.Tag.lower,
3321 c->Header.Tag.upper, c->Header.Tag.lower);
3322 c->Request.CDBLen = 16;
3323 c->Request.Type.Type = TYPE_MSG;
3324 c->Request.Type.Attribute = ATTR_SIMPLE;
3325 c->Request.Type.Direction = XFER_WRITE;
3326 c->Request.Timeout = 0; /* Don't time out */
3327 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3328 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3329 c->Request.CDB[2] = 0x00; /* reserved */
3330 c->Request.CDB[3] = 0x00; /* reserved */
3331 /* Tag to abort goes in CDB[4]-CDB[11] */
3332 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3333 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3334 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3335 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3336 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3337 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3338 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3339 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3340 c->Request.CDB[12] = 0x00; /* reserved */
3341 c->Request.CDB[13] = 0x00; /* reserved */
3342 c->Request.CDB[14] = 0x00; /* reserved */
3343 c->Request.CDB[15] = 0x00; /* reserved */
edd16368 3344 break;
edd16368
SC		 3345 default:
3346 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3347 cmd);
3348 BUG();
3349 }
3350 } else {
3351 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3352 BUG();
3353 }
3354
3355 switch (c->Request.Type.Direction) {
3356 case XFER_READ:
3357 pci_dir = PCI_DMA_FROMDEVICE;
3358 break;
3359 case XFER_WRITE:
3360 pci_dir = PCI_DMA_TODEVICE;
3361 break;
3362 case XFER_NONE:
3363 pci_dir = PCI_DMA_NONE;
3364 break;
3365 default:
3366 pci_dir = PCI_DMA_BIDIRECTIONAL;
3367 }
a2dac136
SC		 3368 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
3369 return -1;
3370 return 0;
edd16368
SC		 3371}
3372
3373/*
3374 * Map (physical) PCI mem into (virtual) kernel space
3375 */
3376static void __iomem *remap_pci_mem(ulong base, ulong size)
3377{
3378 ulong page_base = ((ulong) base) & PAGE_MASK;
3379 ulong page_offs = ((ulong) base) - page_base;
088ba34c
SC		 3380 void __iomem *page_remapped = ioremap_nocache(page_base,
3381 page_offs + size);
edd16368
SC		 3382
3383 return page_remapped ? (page_remapped + page_offs) : NULL;
3384}
3385
3386/* Takes cmds off the submission queue and sends them to the hardware,
3387 * then puts them on the queue of cmds waiting for completion.
3388 */
3389static void start_io(struct ctlr_info *h)
3390{
3391 struct CommandList *c;
e16a33ad 3392 unsigned long flags;
edd16368 3393
e16a33ad 3394 spin_lock_irqsave(&h->lock, flags);
9e0fc764
SC		 3395 while (!list_empty(&h->reqQ)) {
3396 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 3397 /* can't do anything if fifo is full */
3398 if ((h->access.fifo_full(h))) {
3399 dev_warn(&h->pdev->dev, "fifo full\n");
3400 break;
3401 }
3402
3403 /* Get the first entry from the Request Q */
3404 removeQ(c);
3405 h->Qdepth--;
3406
edd16368
SC		 3407 /* Put job onto the completed Q */
3408 addQ(&h->cmpQ, c);
e16a33ad
MG		 3409
3410 /* Must increment commands_outstanding before unlocking
3411 * and submitting to avoid race checking for fifo full
3412 * condition.
3413 */
3414 h->commands_outstanding++;
3415 if (h->commands_outstanding > h->max_outstanding)
3416 h->max_outstanding = h->commands_outstanding;
3417
3418 /* Tell the controller execute command */
3419 spin_unlock_irqrestore(&h->lock, flags);
3420 h->access.submit_command(h, c);
3421 spin_lock_irqsave(&h->lock, flags);
edd16368 3422 }
e16a33ad 3423 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 3424}
3425
254f796b 3426static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
edd16368 3427{
254f796b 3428 return h->access.command_completed(h, q);
edd16368
SC		 3429}
3430
900c5440 3431static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 3432{
3433 return h->access.intr_pending(h);
3434}
3435
3436static inline long interrupt_not_for_us(struct ctlr_info *h)
3437{
10f66018
SC		 3438 return (h->access.intr_pending(h) == 0) ||
3439 (h->interrupts_enabled == 0);
edd16368
SC		 3440}
3441
01a02ffc
SC		 3442static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3443 u32 raw_tag)
edd16368
SC		 3444{
3445 if (unlikely(tag_index >= h->nr_cmds)) {
3446 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3447 return 1;
3448 }
3449 return 0;
3450}
3451
5a3d16f5 3452static inline void finish_cmd(struct CommandList *c)
edd16368 3453{
e16a33ad
MG		 3454 unsigned long flags;
3455
3456 spin_lock_irqsave(&c->h->lock, flags);
edd16368 3457 removeQ(c);
e16a33ad 3458 spin_unlock_irqrestore(&c->h->lock, flags);
e85c5974 3459 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
edd16368 3460 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3461 complete_scsi_command(c);
edd16368
SC		 3462 else if (c->cmd_type == CMD_IOCTL_PEND)
3463 complete(c->waiting);
3464}
3465
a104c99f
SC		 3466static inline u32 hpsa_tag_contains_index(u32 tag)
3467{
a104c99f
SC		 3468 return tag & DIRECT_LOOKUP_BIT;
3469}
3470
3471static inline u32 hpsa_tag_to_index(u32 tag)
3472{
a104c99f
SC		 3473 return tag >> DIRECT_LOOKUP_SHIFT;
3474}
3475
a9a3a273
SC		 3476
3477static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3478{
a9a3a273
SC		 3479#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3480#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3481 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3482 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3483 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3484}
3485
303932fd 3486/* process completion of an indexed ("direct lookup") command */
1d94f94d 3487static inline void process_indexed_cmd(struct ctlr_info *h,
303932fd
DB		 3488 u32 raw_tag)
3489{
3490 u32 tag_index;
3491 struct CommandList *c;
3492
3493 tag_index = hpsa_tag_to_index(raw_tag);
1d94f94d
SC		 3494 if (!bad_tag(h, tag_index, raw_tag)) {
3495 c = h->cmd_pool + tag_index;
3496 finish_cmd(c);
3497 }
303932fd
DB		 3498}
3499
3500/* process completion of a non-indexed command */
1d94f94d 3501static inline void process_nonindexed_cmd(struct ctlr_info *h,
303932fd
DB		 3502 u32 raw_tag)
3503{
3504 u32 tag;
3505 struct CommandList *c = NULL;
e16a33ad 3506 unsigned long flags;
303932fd 3507
a9a3a273 3508 tag = hpsa_tag_discard_error_bits(h, raw_tag);
e16a33ad 3509 spin_lock_irqsave(&h->lock, flags);
9e0fc764 3510 list_for_each_entry(c, &h->cmpQ, list) {
303932fd 3511 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
e16a33ad 3512 spin_unlock_irqrestore(&h->lock, flags);
5a3d16f5 3513 finish_cmd(c);
1d94f94d 3514 return;
303932fd
DB		 3515 }
3516 }
e16a33ad 3517 spin_unlock_irqrestore(&h->lock, flags);
303932fd 3518 bad_tag(h, h->nr_cmds + 1, raw_tag);
303932fd
DB		 3519}
3520
64670ac8
SC		 3521/* Some controllers, like p400, will give us one interrupt
3522 * after a soft reset, even if we turned interrupts off.
3523 * Only need to check for this in the hpsa_xxx_discard_completions
3524 * functions.
3525 */
3526static int ignore_bogus_interrupt(struct ctlr_info *h)
3527{
3528 if (likely(!reset_devices))
3529 return 0;
3530
3531 if (likely(h->interrupts_enabled))
3532 return 0;
3533
3534 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3535 "(known firmware bug.) Ignoring.\n");
3536
3537 return 1;
3538}
3539
254f796b
MG		 3540/*
3541 * Convert &h->q[x] (passed to interrupt handlers) back to h.
3542 * Relies on (h-q[x] == x) being true for x such that
3543 * 0 <= x < MAX_REPLY_QUEUES.
3544 */
3545static struct ctlr_info *queue_to_hba(u8 *queue)
64670ac8 3546{
254f796b
MG		 3547 return container_of((queue - *queue), struct ctlr_info, q[0]);
3548}
3549
3550static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3551{
3552 struct ctlr_info *h = queue_to_hba(queue);
3553 u8 q = *(u8 *) queue;
64670ac8
SC		 3554 u32 raw_tag;
3555
3556 if (ignore_bogus_interrupt(h))
3557 return IRQ_NONE;
3558
3559 if (interrupt_not_for_us(h))
3560 return IRQ_NONE;
a0c12413 3561 h->last_intr_timestamp = get_jiffies_64();
64670ac8 3562 while (interrupt_pending(h)) {
254f796b 3563 raw_tag = get_next_completion(h, q);
64670ac8 3564 while (raw_tag != FIFO_EMPTY)
254f796b 3565 raw_tag = next_command(h, q);
64670ac8 3566 }
64670ac8
SC		 3567 return IRQ_HANDLED;
3568}
3569
254f796b 3570static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
64670ac8 3571{
254f796b 3572 struct ctlr_info *h = queue_to_hba(queue);
64670ac8 3573 u32 raw_tag;
254f796b 3574 u8 q = *(u8 *) queue;
64670ac8
SC		 3575
3576 if (ignore_bogus_interrupt(h))
3577 return IRQ_NONE;
3578
a0c12413 3579 h->last_intr_timestamp = get_jiffies_64();
254f796b 3580 raw_tag = get_next_completion(h, q);
64670ac8 3581 while (raw_tag != FIFO_EMPTY)
254f796b 3582 raw_tag = next_command(h, q);
64670ac8
SC		 3583 return IRQ_HANDLED;
3584}
3585
254f796b 3586static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
edd16368 3587{
254f796b 3588 struct ctlr_info *h = queue_to_hba((u8 *) queue);
303932fd 3589 u32 raw_tag;
254f796b 3590 u8 q = *(u8 *) queue;
edd16368
SC		 3591
3592 if (interrupt_not_for_us(h))
3593 return IRQ_NONE;
a0c12413 3594 h->last_intr_timestamp = get_jiffies_64();
10f66018 3595 while (interrupt_pending(h)) {
254f796b 3596 raw_tag = get_next_completion(h, q);
10f66018 3597 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3598 if (likely(hpsa_tag_contains_index(raw_tag)))
3599 process_indexed_cmd(h, raw_tag);
10f66018 3600 else
1d94f94d 3601 process_nonindexed_cmd(h, raw_tag);
254f796b 3602 raw_tag = next_command(h, q);
10f66018
SC		 3603 }
3604 }
10f66018
SC		 3605 return IRQ_HANDLED;
3606}
3607
254f796b 3608static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
10f66018 3609{
254f796b 3610 struct ctlr_info *h = queue_to_hba(queue);
10f66018 3611 u32 raw_tag;
254f796b 3612 u8 q = *(u8 *) queue;
10f66018 3613
a0c12413 3614 h->last_intr_timestamp = get_jiffies_64();
254f796b 3615 raw_tag = get_next_completion(h, q);
303932fd 3616 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3617 if (likely(hpsa_tag_contains_index(raw_tag)))
3618 process_indexed_cmd(h, raw_tag);
303932fd 3619 else
1d94f94d 3620 process_nonindexed_cmd(h, raw_tag);
254f796b 3621 raw_tag = next_command(h, q);
edd16368 3622 }
edd16368
SC		 3623 return IRQ_HANDLED;
3624}
3625
a9a3a273
SC		 3626/* Send a message CDB to the firmware. Careful, this only works
3627 * in simple mode, not performant mode due to the tag lookup.
3628 * We only ever use this immediately after a controller reset.
3629 */
6f039790
GKH		 3630static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3631 unsigned char type)
edd16368
SC		 3632{
3633 struct Command {
3634 struct CommandListHeader CommandHeader;
3635 struct RequestBlock Request;
3636 struct ErrDescriptor ErrorDescriptor;
3637 };
3638 struct Command *cmd;
3639 static const size_t cmd_sz = sizeof(*cmd) +
3640 sizeof(cmd->ErrorDescriptor);
3641 dma_addr_t paddr64;
3642 uint32_t paddr32, tag;
3643 void __iomem *vaddr;
3644 int i, err;
3645
3646 vaddr = pci_ioremap_bar(pdev, 0);
3647 if (vaddr == NULL)
3648 return -ENOMEM;
3649
3650 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3651 * CCISS commands, so they must be allocated from the lower 4GiB of
3652 * memory.
3653 */
3654 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3655 if (err) {
3656 iounmap(vaddr);
3657 return -ENOMEM;
3658 }
3659
3660 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3661 if (cmd == NULL) {
3662 iounmap(vaddr);
3663 return -ENOMEM;
3664 }
3665
3666 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3667 * although there's no guarantee, we assume that the address is at
3668 * least 4-byte aligned (most likely, it's page-aligned).
3669 */
3670 paddr32 = paddr64;
3671
3672 cmd->CommandHeader.ReplyQueue = 0;
3673 cmd->CommandHeader.SGList = 0;
3674 cmd->CommandHeader.SGTotal = 0;
3675 cmd->CommandHeader.Tag.lower = paddr32;
3676 cmd->CommandHeader.Tag.upper = 0;
3677 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3678
3679 cmd->Request.CDBLen = 16;
3680 cmd->Request.Type.Type = TYPE_MSG;
3681 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3682 cmd->Request.Type.Direction = XFER_NONE;
3683 cmd->Request.Timeout = 0; /* Don't time out */
3684 cmd->Request.CDB[0] = opcode;
3685 cmd->Request.CDB[1] = type;
3686 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3687 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3688 cmd->ErrorDescriptor.Addr.upper = 0;
3689 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3690
3691 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3692
3693 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3694 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3695 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3696 break;
3697 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3698 }
3699
3700 iounmap(vaddr);
3701
3702 /* we leak the DMA buffer here ... no choice since the controller could
3703 * still complete the command.
3704 */
3705 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3706 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3707 opcode, type);
3708 return -ETIMEDOUT;
3709 }
3710
3711 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3712
3713 if (tag & HPSA_ERROR_BIT) {
3714 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3715 opcode, type);
3716 return -EIO;
3717 }
3718
3719 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3720 opcode, type);
3721 return 0;
3722}
3723
edd16368
SC		 3724#define hpsa_noop(p) hpsa_message(p, 3, 0)
3725
1df8552a 3726static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3727 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3728{
3729 u16 pmcsr;
3730 int pos;
3731
3732 if (use_doorbell) {
3733 /* For everything after the P600, the PCI power state method
3734 * of resetting the controller doesn't work, so we have this
3735 * other way using the doorbell register.
3736 */
3737 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3738 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3739 } else { /* Try to do it the PCI power state way */
3740
3741 /* Quoting from the Open CISS Specification: "The Power
3742 * Management Control/Status Register (CSR) controls the power
3743 * state of the device. The normal operating state is D0,
3744 * CSR=00h. The software off state is D3, CSR=03h. To reset
3745 * the controller, place the interface device in D3 then to D0,
3746 * this causes a secondary PCI reset which will reset the
3747 * controller." */
3748
3749 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3750 if (pos == 0) {
3751 dev_err(&pdev->dev,
3752 "hpsa_reset_controller: "
3753 "PCI PM not supported\n");
3754 return -ENODEV;
3755 }
3756 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3757 /* enter the D3hot power management state */
3758 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3759 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3760 pmcsr |= PCI_D3hot;
3761 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3762
3763 msleep(500);
3764
3765 /* enter the D0 power management state */
3766 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3767 pmcsr |= PCI_D0;
3768 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3769
3770 /*
3771 * The P600 requires a small delay when changing states.
3772 * Otherwise we may think the board did not reset and we bail.
3773 * This for kdump only and is particular to the P600.
3774 */
3775 msleep(500);
1df8552a
SC		 3776 }
3777 return 0;
3778}
3779
6f039790 3780static void init_driver_version(char *driver_version, int len)
580ada3c
SC		 3781{
3782 memset(driver_version, 0, len);
f79cfec6 3783 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3784}
3785
6f039790 3786static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3787{
3788 char *driver_version;
3789 int i, size = sizeof(cfgtable->driver_version);
3790
3791 driver_version = kmalloc(size, GFP_KERNEL);
3792 if (!driver_version)
3793 return -ENOMEM;
3794
3795 init_driver_version(driver_version, size);
3796 for (i = 0; i < size; i++)
3797 writeb(driver_version[i], &cfgtable->driver_version[i]);
3798 kfree(driver_version);
3799 return 0;
3800}
3801
6f039790
GKH		 3802static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
3803 unsigned char *driver_ver)
580ada3c
SC		 3804{
3805 int i;
3806
3807 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3808 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3809}
3810
6f039790 3811static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3812{
3813
3814 char *driver_ver, *old_driver_ver;
3815 int rc, size = sizeof(cfgtable->driver_version);
3816
3817 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3818 if (!old_driver_ver)
3819 return -ENOMEM;
3820 driver_ver = old_driver_ver + size;
3821
3822 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3823 * should have been changed, otherwise we know the reset failed.
3824 */
3825 init_driver_version(old_driver_ver, size);
3826 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3827 rc = !memcmp(driver_ver, old_driver_ver, size);
3828 kfree(old_driver_ver);
3829 return rc;
3830}
edd16368 3831/* This does a hard reset of the controller using PCI power management
1df8552a 3832 * states or the using the doorbell register.
edd16368 3833 */
6f039790 3834static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3835{
1df8552a
SC		 3836 u64 cfg_offset;
3837 u32 cfg_base_addr;
3838 u64 cfg_base_addr_index;
3839 void __iomem *vaddr;
3840 unsigned long paddr;
580ada3c 3841 u32 misc_fw_support;
270d05de 3842 int rc;
1df8552a 3843 struct CfgTable __iomem *cfgtable;
cf0b08d0 3844 u32 use_doorbell;
18867659 3845 u32 board_id;
270d05de 3846 u16 command_register;
edd16368 3847
1df8552a
SC		 3848 /* For controllers as old as the P600, this is very nearly
3849 * the same thing as
edd16368
SC		 3850 *
3851 * pci_save_state(pci_dev);
3852 * pci_set_power_state(pci_dev, PCI_D3hot);
3853 * pci_set_power_state(pci_dev, PCI_D0);
3854 * pci_restore_state(pci_dev);
3855 *
1df8552a
SC		 3856 * For controllers newer than the P600, the pci power state
3857 * method of resetting doesn't work so we have another way
3858 * using the doorbell register.
edd16368 3859 */
18867659 3860
25c1e56a 3861 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3862 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3863 dev_warn(&pdev->dev, "Not resetting device.\n");
3864 return -ENODEV;
3865 }
46380786
SC		 3866
3867 /* if controller is soft- but not hard resettable... */
3868 if (!ctlr_is_hard_resettable(board_id))
3869 return -ENOTSUPP; /* try soft reset later. */
18867659 3870
270d05de
SC		 3871 /* Save the PCI command register */
3872 pci_read_config_word(pdev, 4, &command_register);
3873 /* Turn the board off. This is so that later pci_restore_state()
3874 * won't turn the board on before the rest of config space is ready.
3875 */
3876 pci_disable_device(pdev);
3877 pci_save_state(pdev);
edd16368 3878
1df8552a
SC		 3879 /* find the first memory BAR, so we can find the cfg table */
3880 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3881 if (rc)
3882 return rc;
3883 vaddr = remap_pci_mem(paddr, 0x250);
3884 if (!vaddr)
3885 return -ENOMEM;
edd16368 3886
1df8552a
SC		 3887 /* find cfgtable in order to check if reset via doorbell is supported */
3888 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3889 &cfg_base_addr_index, &cfg_offset);
3890 if (rc)
3891 goto unmap_vaddr;
3892 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3893 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3894 if (!cfgtable) {
3895 rc = -ENOMEM;
3896 goto unmap_vaddr;
3897 }
580ada3c
SC		 3898 rc = write_driver_ver_to_cfgtable(cfgtable);
3899 if (rc)
3900 goto unmap_vaddr;
edd16368 3901
cf0b08d0
SC		 3902 /* If reset via doorbell register is supported, use that.
3903 * There are two such methods. Favor the newest method.
3904 */
1df8552a 3905 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3906 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3907 if (use_doorbell) {
3908 use_doorbell = DOORBELL_CTLR_RESET2;
3909 } else {
3910 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3911 if (use_doorbell) {
fba63097
MM		 3912 dev_warn(&pdev->dev, "Soft reset not supported. "
3913 "Firmware update is required.\n");
64670ac8 3914 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3915 goto unmap_cfgtable;
3916 }
3917 }
edd16368 3918
1df8552a
SC		 3919 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3920 if (rc)
3921 goto unmap_cfgtable;
edd16368 3922
270d05de
SC		 3923 pci_restore_state(pdev);
3924 rc = pci_enable_device(pdev);
3925 if (rc) {
3926 dev_warn(&pdev->dev, "failed to enable device.\n");
3927 goto unmap_cfgtable;
edd16368 3928 }
270d05de 3929 pci_write_config_word(pdev, 4, command_register);
edd16368 3930
1df8552a
SC		 3931 /* Some devices (notably the HP Smart Array 5i Controller)
3932 need a little pause here */
3933 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3934
fe5389c8 3935 /* Wait for board to become not ready, then ready. */
2b870cb3 3936 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3937 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3938 if (rc) {
fe5389c8 3939 dev_warn(&pdev->dev,
64670ac8
SC		 3940 "failed waiting for board to reset."
3941 " Will try soft reset.\n");
3942 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3943 goto unmap_cfgtable;
3944 }
fe5389c8
SC		 3945 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3946 if (rc) {
3947 dev_warn(&pdev->dev,
64670ac8
SC		 3948 "failed waiting for board to become ready "
3949 "after hard reset\n");
fe5389c8
SC		 3950 goto unmap_cfgtable;
3951 }
fe5389c8 3952
580ada3c
SC		 3953 rc = controller_reset_failed(vaddr);
3954 if (rc < 0)
3955 goto unmap_cfgtable;
3956 if (rc) {
64670ac8
SC		 3957 dev_warn(&pdev->dev, "Unable to successfully reset "
3958 "controller. Will try soft reset.\n");
3959 rc = -ENOTSUPP;
580ada3c 3960 } else {
64670ac8 3961 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3962 }
3963
3964unmap_cfgtable:
3965 iounmap(cfgtable);
3966
3967unmap_vaddr:
3968 iounmap(vaddr);
3969 return rc;
edd16368
SC		 3970}
3971
3972/*
3973 * We cannot read the structure directly, for portability we must use
3974 * the io functions.
3975 * This is for debug only.
3976 */
edd16368
SC		 3977static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3978{
58f8665c 3979#ifdef HPSA_DEBUG
edd16368
SC		 3980 int i;
3981 char temp_name[17];
3982
3983 dev_info(dev, "Controller Configuration information\n");
3984 dev_info(dev, "------------------------------------\n");
3985 for (i = 0; i < 4; i++)
3986 temp_name[i] = readb(&(tb->Signature[i]));
3987 temp_name[4] = '\0';
3988 dev_info(dev, " Signature = %s\n", temp_name);
3989 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3990 dev_info(dev, " Transport methods supported = 0x%x\n",
3991 readl(&(tb->TransportSupport)));
3992 dev_info(dev, " Transport methods active = 0x%x\n",
3993 readl(&(tb->TransportActive)));
3994 dev_info(dev, " Requested transport Method = 0x%x\n",
3995 readl(&(tb->HostWrite.TransportRequest)));
3996 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3997 readl(&(tb->HostWrite.CoalIntDelay)));
3998 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3999 readl(&(tb->HostWrite.CoalIntCount)));
4000 dev_info(dev, " Max outstanding commands = 0x%d\n",
4001 readl(&(tb->CmdsOutMax)));
4002 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
4003 for (i = 0; i < 16; i++)
4004 temp_name[i] = readb(&(tb->ServerName[i]));
4005 temp_name[16] = '\0';
4006 dev_info(dev, " Server Name = %s\n", temp_name);
4007 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
4008 readl(&(tb->HeartBeat)));
edd16368 4009#endif /* HPSA_DEBUG */
58f8665c 4010}
edd16368
SC		 4011
4012static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
4013{
4014 int i, offset, mem_type, bar_type;
4015
4016 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
4017 return 0;
4018 offset = 0;
4019 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
4020 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
4021 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
4022 offset += 4;
4023 else {
4024 mem_type = pci_resource_flags(pdev, i) &
4025 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
4026 switch (mem_type) {
4027 case PCI_BASE_ADDRESS_MEM_TYPE_32:
4028 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
4029 offset += 4; /* 32 bit */
4030 break;
4031 case PCI_BASE_ADDRESS_MEM_TYPE_64:
4032 offset += 8;
4033 break;
4034 default: /* reserved in PCI 2.2 */
4035 dev_warn(&pdev->dev,
4036 "base address is invalid\n");
4037 return -1;
4038 break;
4039 }
4040 }
4041 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
4042 return i + 1;
4043 }
4044 return -1;
4045}
4046
4047/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4048 * controllers that are capable. If not, we use IO-APIC mode.
4049 */
4050
6f039790 4051static void hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 4052{
4053#ifdef CONFIG_PCI_MSI
254f796b
MG		 4054 int err, i;
4055 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
4056
4057 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
4058 hpsa_msix_entries[i].vector = 0;
4059 hpsa_msix_entries[i].entry = i;
4060 }
edd16368
SC		 4061
4062 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 4063 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4064 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 4065 goto default_int_mode;
55c06c71
SC		 4066 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4067 dev_info(&h->pdev->dev, "MSIX\n");
254f796b
MG		 4068 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
4069 MAX_REPLY_QUEUES);
edd16368 4070 if (!err) {
254f796b
MG		 4071 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4072 h->intr[i] = hpsa_msix_entries[i].vector;
edd16368
SC		 4073 h->msix_vector = 1;
4074 return;
4075 }
4076 if (err > 0) {
55c06c71 4077 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 4078 "available\n", err);
4079 goto default_int_mode;
4080 } else {
55c06c71 4081 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 4082 err);
4083 goto default_int_mode;
4084 }
4085 }
55c06c71
SC		 4086 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4087 dev_info(&h->pdev->dev, "MSI\n");
4088 if (!pci_enable_msi(h->pdev))
edd16368
SC		 4089 h->msi_vector = 1;
4090 else
55c06c71 4091 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 4092 }
4093default_int_mode:
4094#endif /* CONFIG_PCI_MSI */
4095 /* if we get here we're going to use the default interrupt mode */
a9a3a273 4096 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 4097}
4098
6f039790 4099static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
e5c880d1
SC		 4100{
4101 int i;
4102 u32 subsystem_vendor_id, subsystem_device_id;
4103
4104 subsystem_vendor_id = pdev->subsystem_vendor;
4105 subsystem_device_id = pdev->subsystem_device;
4106 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4107 subsystem_vendor_id;
4108
4109 for (i = 0; i < ARRAY_SIZE(products); i++)
4110 if (*board_id == products[i].board_id)
4111 return i;
4112
6798cc0a
SC		 4113 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4114 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4115 !hpsa_allow_any) {
e5c880d1
SC		 4116 dev_warn(&pdev->dev, "unrecognized board ID: "
4117 "0x%08x, ignoring.\n", *board_id);
4118 return -ENODEV;
4119 }
4120 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4121}
4122
6f039790
GKH		 4123static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
4124 unsigned long *memory_bar)
3a7774ce
SC		 4125{
4126 int i;
4127
4128 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 4129 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 4130 /* addressing mode bits already removed */
12d2cd47
SC		 4131 *memory_bar = pci_resource_start(pdev, i);
4132 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 4133 *memory_bar);
4134 return 0;
4135 }
12d2cd47 4136 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 4137 return -ENODEV;
4138}
4139
6f039790
GKH		 4140static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
4141 int wait_for_ready)
2c4c8c8b 4142{
fe5389c8 4143 int i, iterations;
2c4c8c8b 4144 u32 scratchpad;
fe5389c8
SC		 4145 if (wait_for_ready)
4146 iterations = HPSA_BOARD_READY_ITERATIONS;
4147 else
4148 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 4149
fe5389c8
SC		 4150 for (i = 0; i < iterations; i++) {
4151 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4152 if (wait_for_ready) {
4153 if (scratchpad == HPSA_FIRMWARE_READY)
4154 return 0;
4155 } else {
4156 if (scratchpad != HPSA_FIRMWARE_READY)
4157 return 0;
4158 }
2c4c8c8b
SC		 4159 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4160 }
fe5389c8 4161 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 4162 return -ENODEV;
4163}
4164
6f039790
GKH		 4165static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4166 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4167 u64 *cfg_offset)
a51fd47f
SC		 4168{
4169 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4170 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4171 *cfg_base_addr &= (u32) 0x0000ffff;
4172 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4173 if (*cfg_base_addr_index == -1) {
4174 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4175 return -ENODEV;
4176 }
4177 return 0;
4178}
4179
6f039790 4180static int hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 4181{
01a02ffc
SC		 4182 u64 cfg_offset;
4183 u32 cfg_base_addr;
4184 u64 cfg_base_addr_index;
303932fd 4185 u32 trans_offset;
a51fd47f 4186 int rc;
77c4495c 4187
a51fd47f
SC		 4188 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4189 &cfg_base_addr_index, &cfg_offset);
4190 if (rc)
4191 return rc;
77c4495c 4192 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 4193 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 4194 if (!h->cfgtable)
4195 return -ENOMEM;
580ada3c
SC		 4196 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4197 if (rc)
4198 return rc;
77c4495c 4199 /* Find performant mode table. */
a51fd47f 4200 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 4201 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4202 cfg_base_addr_index)+cfg_offset+trans_offset,
4203 sizeof(*h->transtable));
4204 if (!h->transtable)
4205 return -ENOMEM;
4206 return 0;
4207}
4208
6f039790 4209static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
cba3d38b
SC		 4210{
4211 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 4212
4213 /* Limit commands in memory limited kdump scenario. */
4214 if (reset_devices && h->max_commands > 32)
4215 h->max_commands = 32;
4216
cba3d38b
SC		 4217 if (h->max_commands < 16) {
4218 dev_warn(&h->pdev->dev, "Controller reports "
4219 "max supported commands of %d, an obvious lie. "
4220 "Using 16. Ensure that firmware is up to date.\n",
4221 h->max_commands);
4222 h->max_commands = 16;
4223 }
4224}
4225
b93d7536
SC		 4226/* Interrogate the hardware for some limits:
4227 * max commands, max SG elements without chaining, and with chaining,
4228 * SG chain block size, etc.
4229 */
6f039790 4230static void hpsa_find_board_params(struct ctlr_info *h)
b93d7536 4231{
cba3d38b 4232 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 4233 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4234 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4235 /*
4236 * Limit in-command s/g elements to 32 save dma'able memory.
4237 * Howvever spec says if 0, use 31
4238 */
4239 h->max_cmd_sg_entries = 31;
4240 if (h->maxsgentries > 512) {
4241 h->max_cmd_sg_entries = 32;
4242 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4243 h->maxsgentries--; /* save one for chain pointer */
4244 } else {
4245 h->maxsgentries = 31; /* default to traditional values */
4246 h->chainsize = 0;
4247 }
75167d2c
SC		 4248
4249 /* Find out what task management functions are supported and cache */
4250 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
b93d7536
SC		 4251}
4252
76c46e49
SC		 4253static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4254{
0fc9fd40 4255 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
76c46e49
SC		 4256 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4257 return false;
4258 }
4259 return true;
4260}
4261
f7c39101
SC		 4262/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4263static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
4264{
4265#ifdef CONFIG_X86
4266 u32 prefetch;
4267
4268 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4269 prefetch |= 0x100;
4270 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4271#endif
4272}
4273
3d0eab67
SC		 4274/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4275 * in a prefetch beyond physical memory.
4276 */
4277static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4278{
4279 u32 dma_prefetch;
4280
4281 if (h->board_id != 0x3225103C)
4282 return;
4283 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4284 dma_prefetch |= 0x8000;
4285 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4286}
4287
6f039790 4288static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 4289{
4290 int i;
6eaf46fd
SC		 4291 u32 doorbell_value;
4292 unsigned long flags;
eb6b2ae9
SC		 4293
4294 /* under certain very rare conditions, this can take awhile.
4295 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4296 * as we enter this code.)
4297 */
4298 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 4299 spin_lock_irqsave(&h->lock, flags);
4300 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4301 spin_unlock_irqrestore(&h->lock, flags);
382be668 4302 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 4303 break;
4304 /* delay and try again */
60d3f5b0 4305 usleep_range(10000, 20000);
eb6b2ae9 4306 }
3f4336f3
SC		 4307}
4308
6f039790 4309static int hpsa_enter_simple_mode(struct ctlr_info *h)
3f4336f3
SC		 4310{
4311 u32 trans_support;
4312
4313 trans_support = readl(&(h->cfgtable->TransportSupport));
4314 if (!(trans_support & SIMPLE_MODE))
4315 return -ENOTSUPP;
4316
4317 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4318 /* Update the field, and then ring the doorbell */
4319 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4320 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4321 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 4322 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 4323 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4324 dev_warn(&h->pdev->dev,
4325 "unable to get board into simple mode\n");
4326 return -ENODEV;
4327 }
960a30e7 4328 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 4329 return 0;
4330}
4331
6f039790 4332static int hpsa_pci_init(struct ctlr_info *h)
77c4495c 4333{
eb6b2ae9 4334 int prod_index, err;
edd16368 4335
e5c880d1
SC		 4336 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4337 if (prod_index < 0)
4338 return -ENODEV;
4339 h->product_name = products[prod_index].product_name;
4340 h->access = *(products[prod_index].access);
edd16368 4341
e5a44df8
MG		 4342 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4343 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4344
55c06c71 4345 err = pci_enable_device(h->pdev);
edd16368 4346 if (err) {
55c06c71 4347 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 4348 return err;
4349 }
4350
5cb460a6
SC		 4351 /* Enable bus mastering (pci_disable_device may disable this) */
4352 pci_set_master(h->pdev);
4353
f79cfec6 4354 err = pci_request_regions(h->pdev, HPSA);
edd16368 4355 if (err) {
55c06c71
SC		 4356 dev_err(&h->pdev->dev,
4357 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 4358 return err;
4359 }
6b3f4c52 4360 hpsa_interrupt_mode(h);
12d2cd47 4361 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 4362 if (err)
edd16368 4363 goto err_out_free_res;
edd16368 4364 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 4365 if (!h->vaddr) {
4366 err = -ENOMEM;
4367 goto err_out_free_res;
4368 }
fe5389c8 4369 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 4370 if (err)
edd16368 4371 goto err_out_free_res;
77c4495c
SC		 4372 err = hpsa_find_cfgtables(h);
4373 if (err)
edd16368 4374 goto err_out_free_res;
b93d7536 4375 hpsa_find_board_params(h);
edd16368 4376
76c46e49 4377 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 4378 err = -ENODEV;
4379 goto err_out_free_res;
4380 }
f7c39101 4381 hpsa_enable_scsi_prefetch(h);
3d0eab67 4382 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 4383 err = hpsa_enter_simple_mode(h);
4384 if (err)
edd16368 4385 goto err_out_free_res;
edd16368
SC		 4386 return 0;
4387
4388err_out_free_res:
204892e9
SC		 4389 if (h->transtable)
4390 iounmap(h->transtable);
4391 if (h->cfgtable)
4392 iounmap(h->cfgtable);
4393 if (h->vaddr)
4394 iounmap(h->vaddr);
f0bd0b68 4395 pci_disable_device(h->pdev);
55c06c71 4396 pci_release_regions(h->pdev);
edd16368
SC		 4397 return err;
4398}
4399
6f039790 4400static void hpsa_hba_inquiry(struct ctlr_info *h)
339b2b14
SC		 4401{
4402 int rc;
4403
4404#define HBA_INQUIRY_BYTE_COUNT 64
4405 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4406 if (!h->hba_inquiry_data)
4407 return;
4408 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4409 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4410 if (rc != 0) {
4411 kfree(h->hba_inquiry_data);
4412 h->hba_inquiry_data = NULL;
4413 }
4414}
4415
6f039790 4416static int hpsa_init_reset_devices(struct pci_dev *pdev)
4c2a8c40 4417{
1df8552a 4418 int rc, i;
4c2a8c40
SC		 4419
4420 if (!reset_devices)
4421 return 0;
4422
1df8552a
SC		 4423 /* Reset the controller with a PCI power-cycle or via doorbell */
4424 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 4425
1df8552a
SC		 4426 /* -ENOTSUPP here means we cannot reset the controller
4427 * but it's already (and still) up and running in
18867659
SC		 4428 * "performant mode". Or, it might be 640x, which can't reset
4429 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 4430 */
4431 if (rc == -ENOTSUPP)
64670ac8 4432 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 4433 if (rc)
4434 return -ENODEV;
4c2a8c40
SC		 4435
4436 /* Now try to get the controller to respond to a no-op */
2b870cb3 4437 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 4438 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4439 if (hpsa_noop(pdev) == 0)
4440 break;
4441 else
4442 dev_warn(&pdev->dev, "no-op failed%s\n",
4443 (i < 11 ? "; re-trying" : ""));
4444 }
4445 return 0;
4446}
4447
6f039790 4448static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
2e9d1b36
SC		 4449{
4450 h->cmd_pool_bits = kzalloc(
4451 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4452 sizeof(unsigned long), GFP_KERNEL);
4453 h->cmd_pool = pci_alloc_consistent(h->pdev,
4454 h->nr_cmds * sizeof(*h->cmd_pool),
4455 &(h->cmd_pool_dhandle));
4456 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4457 h->nr_cmds * sizeof(*h->errinfo_pool),
4458 &(h->errinfo_pool_dhandle));
4459 if ((h->cmd_pool_bits == NULL)
4460 || (h->cmd_pool == NULL)
4461 || (h->errinfo_pool == NULL)) {
4462 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4463 return -ENOMEM;
4464 }
4465 return 0;
4466}
4467
4468static void hpsa_free_cmd_pool(struct ctlr_info *h)
4469{
4470 kfree(h->cmd_pool_bits);
4471 if (h->cmd_pool)
4472 pci_free_consistent(h->pdev,
4473 h->nr_cmds * sizeof(struct CommandList),
4474 h->cmd_pool, h->cmd_pool_dhandle);
4475 if (h->errinfo_pool)
4476 pci_free_consistent(h->pdev,
4477 h->nr_cmds * sizeof(struct ErrorInfo),
4478 h->errinfo_pool,
4479 h->errinfo_pool_dhandle);
4480}
4481
0ae01a32
SC		 4482static int hpsa_request_irq(struct ctlr_info *h,
4483 irqreturn_t (*msixhandler)(int, void *),
4484 irqreturn_t (*intxhandler)(int, void *))
4485{
254f796b 4486 int rc, i;
0ae01a32 4487
254f796b
MG		 4488 /*
4489 * initialize h->q[x] = x so that interrupt handlers know which
4490 * queue to process.
4491 */
4492 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4493 h->q[i] = (u8) i;
4494
4495 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
4496 /* If performant mode and MSI-X, use multiple reply queues */
4497 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4498 rc = request_irq(h->intr[i], msixhandler,
4499 0, h->devname,
4500 &h->q[i]);
4501 } else {
4502 /* Use single reply pool */
4503 if (h->msix_vector || h->msi_vector) {
4504 rc = request_irq(h->intr[h->intr_mode],
4505 msixhandler, 0, h->devname,
4506 &h->q[h->intr_mode]);
4507 } else {
4508 rc = request_irq(h->intr[h->intr_mode],
4509 intxhandler, IRQF_SHARED, h->devname,
4510 &h->q[h->intr_mode]);
4511 }
4512 }
0ae01a32
SC		 4513 if (rc) {
4514 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4515 h->intr[h->intr_mode], h->devname);
4516 return -ENODEV;
4517 }
4518 return 0;
4519}
4520
6f039790 4521static int hpsa_kdump_soft_reset(struct ctlr_info *h)
64670ac8
SC		 4522{
4523 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4524 HPSA_RESET_TYPE_CONTROLLER)) {
4525 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4526 return -EIO;
4527 }
4528
4529 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4530 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4531 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4532 return -1;
4533 }
4534
4535 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4536 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4537 dev_warn(&h->pdev->dev, "Board failed to become ready "
4538 "after soft reset.\n");
4539 return -1;
4540 }
4541
4542 return 0;
4543}
4544
254f796b
MG		 4545static void free_irqs(struct ctlr_info *h)
4546{
4547 int i;
4548
4549 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4550 /* Single reply queue, only one irq to free */
4551 i = h->intr_mode;
4552 free_irq(h->intr[i], &h->q[i]);
4553 return;
4554 }
4555
4556 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4557 free_irq(h->intr[i], &h->q[i]);
4558}
4559
0097f0f4 4560static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
64670ac8 4561{
254f796b 4562 free_irqs(h);
64670ac8 4563#ifdef CONFIG_PCI_MSI
0097f0f4
SC		 4564 if (h->msix_vector) {
4565 if (h->pdev->msix_enabled)
4566 pci_disable_msix(h->pdev);
4567 } else if (h->msi_vector) {
4568 if (h->pdev->msi_enabled)
4569 pci_disable_msi(h->pdev);
4570 }
64670ac8 4571#endif /* CONFIG_PCI_MSI */
0097f0f4
SC		 4572}
4573
4574static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4575{
4576 hpsa_free_irqs_and_disable_msix(h);
64670ac8
SC		 4577 hpsa_free_sg_chain_blocks(h);
4578 hpsa_free_cmd_pool(h);
4579 kfree(h->blockFetchTable);
4580 pci_free_consistent(h->pdev, h->reply_pool_size,
4581 h->reply_pool, h->reply_pool_dhandle);
4582 if (h->vaddr)
4583 iounmap(h->vaddr);
4584 if (h->transtable)
4585 iounmap(h->transtable);
4586 if (h->cfgtable)
4587 iounmap(h->cfgtable);
4588 pci_release_regions(h->pdev);
4589 kfree(h);
4590}
4591
a0c12413
SC		 4592static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4593{
4594 assert_spin_locked(&lockup_detector_lock);
4595 if (!hpsa_lockup_detector)
4596 return;
4597 if (h->lockup_detected)
4598 return; /* already stopped the lockup detector */
4599 list_del(&h->lockup_list);
4600}
4601
4602/* Called when controller lockup detected. */
4603static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4604{
4605 struct CommandList *c = NULL;
4606
4607 assert_spin_locked(&h->lock);
4608 /* Mark all outstanding commands as failed and complete them. */
4609 while (!list_empty(list)) {
4610 c = list_entry(list->next, struct CommandList, list);
4611 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
5a3d16f5 4612 finish_cmd(c);
a0c12413
SC		 4613 }
4614}
4615
4616static void controller_lockup_detected(struct ctlr_info *h)
4617{
4618 unsigned long flags;
4619
4620 assert_spin_locked(&lockup_detector_lock);
4621 remove_ctlr_from_lockup_detector_list(h);
4622 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4623 spin_lock_irqsave(&h->lock, flags);
4624 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4625 spin_unlock_irqrestore(&h->lock, flags);
4626 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4627 h->lockup_detected);
4628 pci_disable_device(h->pdev);
4629 spin_lock_irqsave(&h->lock, flags);
4630 fail_all_cmds_on_list(h, &h->cmpQ);
4631 fail_all_cmds_on_list(h, &h->reqQ);
4632 spin_unlock_irqrestore(&h->lock, flags);
4633}
4634
a0c12413
SC		 4635static void detect_controller_lockup(struct ctlr_info *h)
4636{
4637 u64 now;
4638 u32 heartbeat;
4639 unsigned long flags;
4640
4641 assert_spin_locked(&lockup_detector_lock);
4642 now = get_jiffies_64();
4643 /* If we've received an interrupt recently, we're ok. */
4644 if (time_after64(h->last_intr_timestamp +
e85c5974 4645 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4646 return;
4647
4648 /*
4649 * If we've already checked the heartbeat recently, we're ok.
4650 * This could happen if someone sends us a signal. We
4651 * otherwise don't care about signals in this thread.
4652 */
4653 if (time_after64(h->last_heartbeat_timestamp +
e85c5974 4654 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4655 return;
4656
4657 /* If heartbeat has not changed since we last looked, we're not ok. */
4658 spin_lock_irqsave(&h->lock, flags);
4659 heartbeat = readl(&h->cfgtable->HeartBeat);
4660 spin_unlock_irqrestore(&h->lock, flags);
4661 if (h->last_heartbeat == heartbeat) {
4662 controller_lockup_detected(h);
4663 return;
4664 }
4665
4666 /* We're ok. */
4667 h->last_heartbeat = heartbeat;
4668 h->last_heartbeat_timestamp = now;
4669}
4670
4671static int detect_controller_lockup_thread(void *notused)
4672{
4673 struct ctlr_info *h;
4674 unsigned long flags;
4675
4676 while (1) {
4677 struct list_head *this, *tmp;
4678
4679 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4680 if (kthread_should_stop())
4681 break;
4682 spin_lock_irqsave(&lockup_detector_lock, flags);
4683 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4684 h = list_entry(this, struct ctlr_info, lockup_list);
4685 detect_controller_lockup(h);
4686 }
4687 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4688 }
4689 return 0;
4690}
4691
4692static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4693{
4694 unsigned long flags;
4695
e85c5974 4696 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
a0c12413
SC		 4697 spin_lock_irqsave(&lockup_detector_lock, flags);
4698 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4699 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4700}
4701
4702static void start_controller_lockup_detector(struct ctlr_info *h)
4703{
4704 /* Start the lockup detector thread if not already started */
4705 if (!hpsa_lockup_detector) {
4706 spin_lock_init(&lockup_detector_lock);
4707 hpsa_lockup_detector =
4708 kthread_run(detect_controller_lockup_thread,
f79cfec6 4709 NULL, HPSA);
a0c12413
SC		 4710 }
4711 if (!hpsa_lockup_detector) {
4712 dev_warn(&h->pdev->dev,
4713 "Could not start lockup detector thread\n");
4714 return;
4715 }
4716 add_ctlr_to_lockup_detector_list(h);
4717}
4718
4719static void stop_controller_lockup_detector(struct ctlr_info *h)
4720{
4721 unsigned long flags;
4722
4723 spin_lock_irqsave(&lockup_detector_lock, flags);
4724 remove_ctlr_from_lockup_detector_list(h);
4725 /* If the list of ctlr's to monitor is empty, stop the thread */
4726 if (list_empty(&hpsa_ctlr_list)) {
775bf277 4727 spin_unlock_irqrestore(&lockup_detector_lock, flags);
a0c12413 4728 kthread_stop(hpsa_lockup_detector);
775bf277 4729 spin_lock_irqsave(&lockup_detector_lock, flags);
a0c12413
SC		 4730 hpsa_lockup_detector = NULL;
4731 }
4732 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4733}
4734
6f039790 4735static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
edd16368 4736{
4c2a8c40 4737 int dac, rc;
edd16368 4738 struct ctlr_info *h;
64670ac8
SC		 4739 int try_soft_reset = 0;
4740 unsigned long flags;
edd16368
SC		 4741
4742 if (number_of_controllers == 0)
4743 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4744
4c2a8c40 4745 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4746 if (rc) {
4747 if (rc != -ENOTSUPP)
4748 return rc;
4749 /* If the reset fails in a particular way (it has no way to do
4750 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4751 * a soft reset once we get the controller configured up to the
4752 * point that it can accept a command.
4753 */
4754 try_soft_reset = 1;
4755 rc = 0;
4756 }
4757
4758reinit_after_soft_reset:
edd16368 4759
303932fd
DB		 4760 /* Command structures must be aligned on a 32-byte boundary because
4761 * the 5 lower bits of the address are used by the hardware. and by
4762 * the driver. See comments in hpsa.h for more info.
4763 */
4764#define COMMANDLIST_ALIGNMENT 32
4765 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4766 h = kzalloc(sizeof(*h), GFP_KERNEL);
4767 if (!h)
ecd9aad4 4768 return -ENOMEM;
edd16368 4769
55c06c71 4770 h->pdev = pdev;
a9a3a273 4771 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4772 INIT_LIST_HEAD(&h->cmpQ);
4773 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4774 spin_lock_init(&h->lock);
4775 spin_lock_init(&h->scan_lock);
55c06c71 4776 rc = hpsa_pci_init(h);
ecd9aad4 4777 if (rc != 0)
edd16368
SC		 4778 goto clean1;
4779
f79cfec6 4780 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4781 h->ctlr = number_of_controllers;
4782 number_of_controllers++;
edd16368
SC		 4783
4784 /* configure PCI DMA stuff */
ecd9aad4
SC		 4785 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4786 if (rc == 0) {
edd16368 4787 dac = 1;
ecd9aad4
SC		 4788 } else {
4789 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4790 if (rc == 0) {
4791 dac = 0;
4792 } else {
4793 dev_err(&pdev->dev, "no suitable DMA available\n");
4794 goto clean1;
4795 }
edd16368
SC		 4796 }
4797
4798 /* make sure the board interrupts are off */
4799 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4800
0ae01a32 4801 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4802 goto clean2;
303932fd
DB		 4803 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4804 h->devname, pdev->device,
a9a3a273 4805 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4806 if (hpsa_allocate_cmd_pool(h))
edd16368 4807 goto clean4;
33a2ffce
SC		 4808 if (hpsa_allocate_sg_chain_blocks(h))
4809 goto clean4;
a08a8471
SC		 4810 init_waitqueue_head(&h->scan_wait_queue);
4811 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4812
4813 pci_set_drvdata(pdev, h);
9a41338e
SC		 4814 h->ndevices = 0;
4815 h->scsi_host = NULL;
4816 spin_lock_init(&h->devlock);
64670ac8
SC		 4817 hpsa_put_ctlr_into_performant_mode(h);
4818
4819 /* At this point, the controller is ready to take commands.
4820 * Now, if reset_devices and the hard reset didn't work, try
4821 * the soft reset and see if that works.
4822 */
4823 if (try_soft_reset) {
4824
4825 /* This is kind of gross. We may or may not get a completion
4826 * from the soft reset command, and if we do, then the value
4827 * from the fifo may or may not be valid. So, we wait 10 secs
4828 * after the reset throwing away any completions we get during
4829 * that time. Unregister the interrupt handler and register
4830 * fake ones to scoop up any residual completions.
4831 */
4832 spin_lock_irqsave(&h->lock, flags);
4833 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4834 spin_unlock_irqrestore(&h->lock, flags);
254f796b 4835 free_irqs(h);
64670ac8
SC		 4836 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4837 hpsa_intx_discard_completions);
4838 if (rc) {
4839 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4840 "soft reset.\n");
4841 goto clean4;
4842 }
4843
4844 rc = hpsa_kdump_soft_reset(h);
4845 if (rc)
4846 /* Neither hard nor soft reset worked, we're hosed. */
4847 goto clean4;
4848
4849 dev_info(&h->pdev->dev, "Board READY.\n");
4850 dev_info(&h->pdev->dev,
4851 "Waiting for stale completions to drain.\n");
4852 h->access.set_intr_mask(h, HPSA_INTR_ON);
4853 msleep(10000);
4854 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4855
4856 rc = controller_reset_failed(h->cfgtable);
4857 if (rc)
4858 dev_info(&h->pdev->dev,
4859 "Soft reset appears to have failed.\n");
4860
4861 /* since the controller's reset, we have to go back and re-init
4862 * everything. Easiest to just forget what we've done and do it
4863 * all over again.
4864 */
4865 hpsa_undo_allocations_after_kdump_soft_reset(h);
4866 try_soft_reset = 0;
4867 if (rc)
4868 /* don't go to clean4, we already unallocated */
4869 return -ENODEV;
4870
4871 goto reinit_after_soft_reset;
4872 }
edd16368
SC		 4873
4874 /* Turn the interrupts on so we can service requests */
4875 h->access.set_intr_mask(h, HPSA_INTR_ON);
4876
339b2b14 4877 hpsa_hba_inquiry(h);
edd16368 4878 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
a0c12413 4879 start_controller_lockup_detector(h);
edd16368
SC		 4880 return 1;
4881
4882clean4:
33a2ffce 4883 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4884 hpsa_free_cmd_pool(h);
254f796b 4885 free_irqs(h);
edd16368
SC		 4886clean2:
4887clean1:
edd16368 4888 kfree(h);
ecd9aad4 4889 return rc;
edd16368
SC		 4890}
4891
4892static void hpsa_flush_cache(struct ctlr_info *h)
4893{
4894 char *flush_buf;
4895 struct CommandList *c;
4896
4897 flush_buf = kzalloc(4, GFP_KERNEL);
4898 if (!flush_buf)
4899 return;
4900
4901 c = cmd_special_alloc(h);
4902 if (!c) {
4903 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4904 goto out_of_memory;
4905 }
a2dac136
SC		 4906 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4907 RAID_CTLR_LUNID, TYPE_CMD)) {
4908 goto out;
4909 }
edd16368
SC		 4910 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4911 if (c->err_info->CommandStatus != 0)
a2dac136 4912out:
edd16368
SC		 4913 dev_warn(&h->pdev->dev,
4914 "error flushing cache on controller\n");
4915 cmd_special_free(h, c);
4916out_of_memory:
4917 kfree(flush_buf);
4918}
4919
4920static void hpsa_shutdown(struct pci_dev *pdev)
4921{
4922 struct ctlr_info *h;
4923
4924 h = pci_get_drvdata(pdev);
4925 /* Turn board interrupts off and send the flush cache command
4926 * sendcmd will turn off interrupt, and send the flush...
4927 * To write all data in the battery backed cache to disks
4928 */
4929 hpsa_flush_cache(h);
4930 h->access.set_intr_mask(h, HPSA_INTR_OFF);
0097f0f4 4931 hpsa_free_irqs_and_disable_msix(h);
edd16368
SC		 4932}
4933
6f039790 4934static void hpsa_free_device_info(struct ctlr_info *h)
55e14e76
SC		 4935{
4936 int i;
4937
4938 for (i = 0; i < h->ndevices; i++)
4939 kfree(h->dev[i]);
4940}
4941
6f039790 4942static void hpsa_remove_one(struct pci_dev *pdev)
edd16368
SC		 4943{
4944 struct ctlr_info *h;
4945
4946 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 4947 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 4948 return;
4949 }
4950 h = pci_get_drvdata(pdev);
a0c12413 4951 stop_controller_lockup_detector(h);
edd16368
SC		 4952 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4953 hpsa_shutdown(pdev);
4954 iounmap(h->vaddr);
204892e9
SC		 4955 iounmap(h->transtable);
4956 iounmap(h->cfgtable);
55e14e76 4957 hpsa_free_device_info(h);
33a2ffce 4958 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4959 pci_free_consistent(h->pdev,
4960 h->nr_cmds * sizeof(struct CommandList),
4961 h->cmd_pool, h->cmd_pool_dhandle);
4962 pci_free_consistent(h->pdev,
4963 h->nr_cmds * sizeof(struct ErrorInfo),
4964 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4965 pci_free_consistent(h->pdev, h->reply_pool_size,
4966 h->reply_pool, h->reply_pool_dhandle);
edd16368 4967 kfree(h->cmd_pool_bits);
303932fd 4968 kfree(h->blockFetchTable);
339b2b14 4969 kfree(h->hba_inquiry_data);
f0bd0b68 4970 pci_disable_device(pdev);
edd16368
SC		 4971 pci_release_regions(pdev);
4972 pci_set_drvdata(pdev, NULL);
edd16368
SC		 4973 kfree(h);
4974}
4975
4976static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4977 __attribute__((unused)) pm_message_t state)
4978{
4979 return -ENOSYS;
4980}
4981
4982static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4983{
4984 return -ENOSYS;
4985}
4986
4987static struct pci_driver hpsa_pci_driver = {
f79cfec6 4988 .name = HPSA,
edd16368 4989 .probe = hpsa_init_one,
6f039790 4990 .remove = hpsa_remove_one,
edd16368
SC		 4991 .id_table = hpsa_pci_device_id, /* id_table */
4992 .shutdown = hpsa_shutdown,
4993 .suspend = hpsa_suspend,
4994 .resume = hpsa_resume,
4995};
4996
303932fd
DB		 4997/* Fill in bucket_map[], given nsgs (the max number of
4998 * scatter gather elements supported) and bucket[],
4999 * which is an array of 8 integers. The bucket[] array
5000 * contains 8 different DMA transfer sizes (in 16
5001 * byte increments) which the controller uses to fetch
5002 * commands. This function fills in bucket_map[], which
5003 * maps a given number of scatter gather elements to one of
5004 * the 8 DMA transfer sizes. The point of it is to allow the
5005 * controller to only do as much DMA as needed to fetch the
5006 * command, with the DMA transfer size encoded in the lower
5007 * bits of the command address.
5008 */
5009static void calc_bucket_map(int bucket[], int num_buckets,
5010 int nsgs, int *bucket_map)
5011{
5012 int i, j, b, size;
5013
5014 /* even a command with 0 SGs requires 4 blocks */
5015#define MINIMUM_TRANSFER_BLOCKS 4
5016#define NUM_BUCKETS 8
5017 /* Note, bucket_map must have nsgs+1 entries. */
5018 for (i = 0; i <= nsgs; i++) {
5019 /* Compute size of a command with i SG entries */
5020 size = i + MINIMUM_TRANSFER_BLOCKS;
5021 b = num_buckets; /* Assume the biggest bucket */
5022 /* Find the bucket that is just big enough */
5023 for (j = 0; j < 8; j++) {
5024 if (bucket[j] >= size) {
5025 b = j;
5026 break;
5027 }
5028 }
5029 /* for a command with i SG entries, use bucket b. */
5030 bucket_map[i] = b;
5031 }
5032}
5033
6f039790 5034static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
303932fd 5035{
6c311b57
SC		 5036 int i;
5037 unsigned long register_value;
def342bd
SC		 5038
5039 /* This is a bit complicated. There are 8 registers on
5040 * the controller which we write to to tell it 8 different
5041 * sizes of commands which there may be. It's a way of
5042 * reducing the DMA done to fetch each command. Encoded into
5043 * each command's tag are 3 bits which communicate to the controller
5044 * which of the eight sizes that command fits within. The size of
5045 * each command depends on how many scatter gather entries there are.
5046 * Each SG entry requires 16 bytes. The eight registers are programmed
5047 * with the number of 16-byte blocks a command of that size requires.
5048 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 5049 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 5050 * blocks. Note, this only extends to the SG entries contained
5051 * within the command block, and does not extend to chained blocks
5052 * of SG elements. bft[] contains the eight values we write to
5053 * the registers. They are not evenly distributed, but have more
5054 * sizes for small commands, and fewer sizes for larger commands.
5055 */
d66ae08b
SC		 5056 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
5057 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 5058 /* 5 = 1 s/g entry or 4k
5059 * 6 = 2 s/g entry or 8k
5060 * 8 = 4 s/g entry or 16k
5061 * 10 = 6 s/g entry or 24k
5062 */
303932fd 5063
303932fd
DB		 5064 /* Controller spec: zero out this buffer. */
5065 memset(h->reply_pool, 0, h->reply_pool_size);
303932fd 5066
d66ae08b
SC		 5067 bft[7] = SG_ENTRIES_IN_CMD + 4;
5068 calc_bucket_map(bft, ARRAY_SIZE(bft),
5069 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 5070 for (i = 0; i < 8; i++)
5071 writel(bft[i], &h->transtable->BlockFetch[i]);
5072
5073 /* size of controller ring buffer */
5074 writel(h->max_commands, &h->transtable->RepQSize);
254f796b 5075 writel(h->nreply_queues, &h->transtable->RepQCount);
303932fd
DB		 5076 writel(0, &h->transtable->RepQCtrAddrLow32);
5077 writel(0, &h->transtable->RepQCtrAddrHigh32);
254f796b
MG		 5078
5079 for (i = 0; i < h->nreply_queues; i++) {
5080 writel(0, &h->transtable->RepQAddr[i].upper);
5081 writel(h->reply_pool_dhandle +
5082 (h->max_commands * sizeof(u64) * i),
5083 &h->transtable->RepQAddr[i].lower);
5084 }
5085
5086 writel(CFGTBL_Trans_Performant | use_short_tags |
5087 CFGTBL_Trans_enable_directed_msix,
303932fd
DB		 5088 &(h->cfgtable->HostWrite.TransportRequest));
5089 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 5090 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 5091 register_value = readl(&(h->cfgtable->TransportActive));
5092 if (!(register_value & CFGTBL_Trans_Performant)) {
5093 dev_warn(&h->pdev->dev, "unable to get board into"
5094 " performant mode\n");
5095 return;
5096 }
960a30e7
SC		 5097 /* Change the access methods to the performant access methods */
5098 h->access = SA5_performant_access;
5099 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 5100}
5101
6f039790 5102static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
6c311b57
SC		 5103{
5104 u32 trans_support;
254f796b 5105 int i;
6c311b57 5106
02ec19c8
SC		 5107 if (hpsa_simple_mode)
5108 return;
5109
6c311b57
SC		 5110 trans_support = readl(&(h->cfgtable->TransportSupport));
5111 if (!(trans_support & PERFORMANT_MODE))
5112 return;
5113
254f796b 5114 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
cba3d38b 5115 hpsa_get_max_perf_mode_cmds(h);
6c311b57 5116 /* Performant mode ring buffer and supporting data structures */
254f796b 5117 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
6c311b57
SC		 5118 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5119 &(h->reply_pool_dhandle));
5120
254f796b
MG		 5121 for (i = 0; i < h->nreply_queues; i++) {
5122 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5123 h->reply_queue[i].size = h->max_commands;
5124 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
5125 h->reply_queue[i].current_entry = 0;
5126 }
5127
6c311b57 5128 /* Need a block fetch table for performant mode */
d66ae08b 5129 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 5130 sizeof(u32)), GFP_KERNEL);
5131
5132 if ((h->reply_pool == NULL)
5133 || (h->blockFetchTable == NULL))
5134 goto clean_up;
5135
960a30e7
SC		 5136 hpsa_enter_performant_mode(h,
5137 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 5138
5139 return;
5140
5141clean_up:
5142 if (h->reply_pool)
5143 pci_free_consistent(h->pdev, h->reply_pool_size,
5144 h->reply_pool, h->reply_pool_dhandle);
5145 kfree(h->blockFetchTable);
5146}
5147
edd16368
SC		 5148/*
5149 * This is it. Register the PCI driver information for the cards we control
5150 * the OS will call our registered routines when it finds one of our cards.
5151 */
5152static int __init hpsa_init(void)
5153{
31468401 5154 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 5155}
5156
5157static void __exit hpsa_cleanup(void)
5158{
5159 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 5160}
5161
5162module_init(hpsa_init);
5163module_exit(hpsa_cleanup);
Linux kernel - Deliverables
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