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[SCSI] hpsa: make target and lun match what SCSI REPORT LUNs returns
[deliverable/linux.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
32#include <linux/seq_file.h>
33#include <linux/init.h>
34#include <linux/spinlock.h>
edd16368
SC		 35#include <linux/compat.h>
36#include <linux/blktrace_api.h>
37#include <linux/uaccess.h>
38#include <linux/io.h>
39#include <linux/dma-mapping.h>
40#include <linux/completion.h>
41#include <linux/moduleparam.h>
42#include <scsi/scsi.h>
43#include <scsi/scsi_cmnd.h>
44#include <scsi/scsi_device.h>
45#include <scsi/scsi_host.h>
667e23d4 46#include <scsi/scsi_tcq.h>
edd16368
SC		 47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
60063497 50#include <linux/atomic.h>
edd16368 51#include <linux/kthread.h>
a0c12413 52#include <linux/jiffies.h>
edd16368
SC		 53#include "hpsa_cmd.h"
54#include "hpsa.h"
55
56/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 57#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368 58#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 59#define HPSA "hpsa"
edd16368
SC		 60
61/* How long to wait (in milliseconds) for board to go into simple mode */
62#define MAX_CONFIG_WAIT 30000
63#define MAX_IOCTL_CONFIG_WAIT 1000
64
65/*define how many times we will try a command because of bus resets */
66#define MAX_CMD_RETRIES 3
67
68/* Embedded module documentation macros - see modules.h */
69MODULE_AUTHOR("Hewlett-Packard Company");
70MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 HPSA_DRIVER_VERSION);
72MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73MODULE_VERSION(HPSA_DRIVER_VERSION);
74MODULE_LICENSE("GPL");
75
76static int hpsa_allow_any;
77module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78MODULE_PARM_DESC(hpsa_allow_any,
79 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 80static int hpsa_simple_mode;
81module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82MODULE_PARM_DESC(hpsa_simple_mode,
83 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 84
85/* define the PCI info for the cards we can control */
86static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
7c03b870 102 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 103 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 104 {0,}
105};
106
107MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
108
109/* board_id = Subsystem Device ID & Vendor ID
110 * product = Marketing Name for the board
111 * access = Address of the struct of function pointers
112 */
113static struct board_type products[] = {
edd16368
SC		 114 {0x3241103C, "Smart Array P212", &SA5_access},
115 {0x3243103C, "Smart Array P410", &SA5_access},
116 {0x3245103C, "Smart Array P410i", &SA5_access},
117 {0x3247103C, "Smart Array P411", &SA5_access},
118 {0x3249103C, "Smart Array P812", &SA5_access},
119 {0x324a103C, "Smart Array P712m", &SA5_access},
120 {0x324b103C, "Smart Array P711m", &SA5_access},
9143a961 121 {0x3350103C, "Smart Array", &SA5_access},
122 {0x3351103C, "Smart Array", &SA5_access},
123 {0x3352103C, "Smart Array", &SA5_access},
124 {0x3353103C, "Smart Array", &SA5_access},
125 {0x3354103C, "Smart Array", &SA5_access},
126 {0x3355103C, "Smart Array", &SA5_access},
127 {0x3356103C, "Smart Array", &SA5_access},
edd16368
SC		 128 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
129};
130
131static int number_of_controllers;
132
a0c12413
SC		 133static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
134static spinlock_t lockup_detector_lock;
135static struct task_struct *hpsa_lockup_detector;
136
10f66018
SC		 137static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
138static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 139static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
140static void start_io(struct ctlr_info *h);
141
142#ifdef CONFIG_COMPAT
143static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
144#endif
145
146static void cmd_free(struct ctlr_info *h, struct CommandList *c);
147static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
148static struct CommandList *cmd_alloc(struct ctlr_info *h);
149static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 150static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
151 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 152 int cmd_type);
153
f281233d 154static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 155static void hpsa_scan_start(struct Scsi_Host *);
156static int hpsa_scan_finished(struct Scsi_Host *sh,
157 unsigned long elapsed_time);
667e23d4
SC		 158static int hpsa_change_queue_depth(struct scsi_device *sdev,
159 int qdepth, int reason);
edd16368
SC		 160
161static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
162static int hpsa_slave_alloc(struct scsi_device *sdev);
163static void hpsa_slave_destroy(struct scsi_device *sdev);
164
edd16368 165static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 166static int check_for_unit_attention(struct ctlr_info *h,
167 struct CommandList *c);
168static void check_ioctl_unit_attention(struct ctlr_info *h,
169 struct CommandList *c);
303932fd
DB		 170/* performant mode helper functions */
171static void calc_bucket_map(int *bucket, int num_buckets,
172 int nsgs, int *bucket_map);
7136f9a7 173static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 174static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 175static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
176 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
177 u64 *cfg_offset);
178static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
179 unsigned long *memory_bar);
18867659 180static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 181static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
182 void __iomem *vaddr, int wait_for_ready);
183#define BOARD_NOT_READY 0
184#define BOARD_READY 1
edd16368 185
edd16368
SC		 186static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
187{
188 unsigned long *priv = shost_priv(sdev->host);
189 return (struct ctlr_info *) *priv;
190}
191
a23513e8
SC		 192static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
193{
194 unsigned long *priv = shost_priv(sh);
195 return (struct ctlr_info *) *priv;
196}
197
edd16368
SC		 198static int check_for_unit_attention(struct ctlr_info *h,
199 struct CommandList *c)
200{
201 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
202 return 0;
203
204 switch (c->err_info->SenseInfo[12]) {
205 case STATE_CHANGED:
f79cfec6 206 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 207 "detected, command retried\n", h->ctlr);
208 break;
209 case LUN_FAILED:
f79cfec6 210 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 211 "detected, action required\n", h->ctlr);
212 break;
213 case REPORT_LUNS_CHANGED:
f79cfec6 214 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 215 "changed, action required\n", h->ctlr);
edd16368 216 /*
edd16368
SC		 217 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
218 */
219 break;
220 case POWER_OR_RESET:
f79cfec6 221 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 222 "or device reset detected\n", h->ctlr);
223 break;
224 case UNIT_ATTENTION_CLEARED:
f79cfec6 225 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 226 "cleared by another initiator\n", h->ctlr);
227 break;
228 default:
f79cfec6 229 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 230 "unit attention detected\n", h->ctlr);
231 break;
232 }
233 return 1;
234}
235
236static ssize_t host_store_rescan(struct device *dev,
237 struct device_attribute *attr,
238 const char *buf, size_t count)
239{
240 struct ctlr_info *h;
241 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 242 h = shost_to_hba(shost);
31468401 243 hpsa_scan_start(h->scsi_host);
edd16368
SC		 244 return count;
245}
246
d28ce020
SC		 247static ssize_t host_show_firmware_revision(struct device *dev,
248 struct device_attribute *attr, char *buf)
249{
250 struct ctlr_info *h;
251 struct Scsi_Host *shost = class_to_shost(dev);
252 unsigned char *fwrev;
253
254 h = shost_to_hba(shost);
255 if (!h->hba_inquiry_data)
256 return 0;
257 fwrev = &h->hba_inquiry_data[32];
258 return snprintf(buf, 20, "%c%c%c%c\n",
259 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
260}
261
94a13649
SC		 262static ssize_t host_show_commands_outstanding(struct device *dev,
263 struct device_attribute *attr, char *buf)
264{
265 struct Scsi_Host *shost = class_to_shost(dev);
266 struct ctlr_info *h = shost_to_hba(shost);
267
268 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
269}
270
745a7a25
SC		 271static ssize_t host_show_transport_mode(struct device *dev,
272 struct device_attribute *attr, char *buf)
273{
274 struct ctlr_info *h;
275 struct Scsi_Host *shost = class_to_shost(dev);
276
277 h = shost_to_hba(shost);
278 return snprintf(buf, 20, "%s\n",
960a30e7 279 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 280 "performant" : "simple");
281}
282
46380786 283/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 284static u32 unresettable_controller[] = {
285 0x324a103C, /* Smart Array P712m */
286 0x324b103C, /* SmartArray P711m */
287 0x3223103C, /* Smart Array P800 */
288 0x3234103C, /* Smart Array P400 */
289 0x3235103C, /* Smart Array P400i */
290 0x3211103C, /* Smart Array E200i */
291 0x3212103C, /* Smart Array E200 */
292 0x3213103C, /* Smart Array E200i */
293 0x3214103C, /* Smart Array E200i */
294 0x3215103C, /* Smart Array E200i */
295 0x3237103C, /* Smart Array E500 */
296 0x323D103C, /* Smart Array P700m */
7af0abbc 297 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 298 0x409C0E11, /* Smart Array 6400 */
299 0x409D0E11, /* Smart Array 6400 EM */
300};
301
46380786
SC		 302/* List of controllers which cannot even be soft reset */
303static u32 soft_unresettable_controller[] = {
7af0abbc 304 0x40800E11, /* Smart Array 5i */
46380786
SC		 305 /* Exclude 640x boards. These are two pci devices in one slot
306 * which share a battery backed cache module. One controls the
307 * cache, the other accesses the cache through the one that controls
308 * it. If we reset the one controlling the cache, the other will
309 * likely not be happy. Just forbid resetting this conjoined mess.
310 * The 640x isn't really supported by hpsa anyway.
311 */
312 0x409C0E11, /* Smart Array 6400 */
313 0x409D0E11, /* Smart Array 6400 EM */
314};
315
316static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 317{
318 int i;
319
320 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 321 if (unresettable_controller[i] == board_id)
322 return 0;
323 return 1;
324}
325
326static int ctlr_is_soft_resettable(u32 board_id)
327{
328 int i;
329
330 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
331 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 332 return 0;
333 return 1;
334}
335
46380786
SC		 336static int ctlr_is_resettable(u32 board_id)
337{
338 return ctlr_is_hard_resettable(board_id) ||
339 ctlr_is_soft_resettable(board_id);
340}
341
941b1cda
SC		 342static ssize_t host_show_resettable(struct device *dev,
343 struct device_attribute *attr, char *buf)
344{
345 struct ctlr_info *h;
346 struct Scsi_Host *shost = class_to_shost(dev);
347
348 h = shost_to_hba(shost);
46380786 349 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 350}
351
edd16368
SC		 352static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
353{
354 return (scsi3addr[3] & 0xC0) == 0x40;
355}
356
357static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
358 "UNKNOWN"
359};
360#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
361
362static ssize_t raid_level_show(struct device *dev,
363 struct device_attribute *attr, char *buf)
364{
365 ssize_t l = 0;
82a72c0a 366 unsigned char rlevel;
edd16368
SC		 367 struct ctlr_info *h;
368 struct scsi_device *sdev;
369 struct hpsa_scsi_dev_t *hdev;
370 unsigned long flags;
371
372 sdev = to_scsi_device(dev);
373 h = sdev_to_hba(sdev);
374 spin_lock_irqsave(&h->lock, flags);
375 hdev = sdev->hostdata;
376 if (!hdev) {
377 spin_unlock_irqrestore(&h->lock, flags);
378 return -ENODEV;
379 }
380
381 /* Is this even a logical drive? */
382 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
383 spin_unlock_irqrestore(&h->lock, flags);
384 l = snprintf(buf, PAGE_SIZE, "N/A\n");
385 return l;
386 }
387
388 rlevel = hdev->raid_level;
389 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 390 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 391 rlevel = RAID_UNKNOWN;
392 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
393 return l;
394}
395
396static ssize_t lunid_show(struct device *dev,
397 struct device_attribute *attr, char *buf)
398{
399 struct ctlr_info *h;
400 struct scsi_device *sdev;
401 struct hpsa_scsi_dev_t *hdev;
402 unsigned long flags;
403 unsigned char lunid[8];
404
405 sdev = to_scsi_device(dev);
406 h = sdev_to_hba(sdev);
407 spin_lock_irqsave(&h->lock, flags);
408 hdev = sdev->hostdata;
409 if (!hdev) {
410 spin_unlock_irqrestore(&h->lock, flags);
411 return -ENODEV;
412 }
413 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
414 spin_unlock_irqrestore(&h->lock, flags);
415 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
416 lunid[0], lunid[1], lunid[2], lunid[3],
417 lunid[4], lunid[5], lunid[6], lunid[7]);
418}
419
420static ssize_t unique_id_show(struct device *dev,
421 struct device_attribute *attr, char *buf)
422{
423 struct ctlr_info *h;
424 struct scsi_device *sdev;
425 struct hpsa_scsi_dev_t *hdev;
426 unsigned long flags;
427 unsigned char sn[16];
428
429 sdev = to_scsi_device(dev);
430 h = sdev_to_hba(sdev);
431 spin_lock_irqsave(&h->lock, flags);
432 hdev = sdev->hostdata;
433 if (!hdev) {
434 spin_unlock_irqrestore(&h->lock, flags);
435 return -ENODEV;
436 }
437 memcpy(sn, hdev->device_id, sizeof(sn));
438 spin_unlock_irqrestore(&h->lock, flags);
439 return snprintf(buf, 16 * 2 + 2,
440 "%02X%02X%02X%02X%02X%02X%02X%02X"
441 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
442 sn[0], sn[1], sn[2], sn[3],
443 sn[4], sn[5], sn[6], sn[7],
444 sn[8], sn[9], sn[10], sn[11],
445 sn[12], sn[13], sn[14], sn[15]);
446}
447
3f5eac3a
SC		 448static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
449static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
450static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
451static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
452static DEVICE_ATTR(firmware_revision, S_IRUGO,
453 host_show_firmware_revision, NULL);
454static DEVICE_ATTR(commands_outstanding, S_IRUGO,
455 host_show_commands_outstanding, NULL);
456static DEVICE_ATTR(transport_mode, S_IRUGO,
457 host_show_transport_mode, NULL);
941b1cda
SC		 458static DEVICE_ATTR(resettable, S_IRUGO,
459 host_show_resettable, NULL);
3f5eac3a
SC		 460
461static struct device_attribute *hpsa_sdev_attrs[] = {
462 &dev_attr_raid_level,
463 &dev_attr_lunid,
464 &dev_attr_unique_id,
465 NULL,
466};
467
468static struct device_attribute *hpsa_shost_attrs[] = {
469 &dev_attr_rescan,
470 &dev_attr_firmware_revision,
471 &dev_attr_commands_outstanding,
472 &dev_attr_transport_mode,
941b1cda 473 &dev_attr_resettable,
3f5eac3a
SC		 474 NULL,
475};
476
477static struct scsi_host_template hpsa_driver_template = {
478 .module = THIS_MODULE,
f79cfec6
SC		 479 .name = HPSA,
480 .proc_name = HPSA,
3f5eac3a
SC		 481 .queuecommand = hpsa_scsi_queue_command,
482 .scan_start = hpsa_scan_start,
483 .scan_finished = hpsa_scan_finished,
484 .change_queue_depth = hpsa_change_queue_depth,
485 .this_id = -1,
486 .use_clustering = ENABLE_CLUSTERING,
487 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
488 .ioctl = hpsa_ioctl,
489 .slave_alloc = hpsa_slave_alloc,
490 .slave_destroy = hpsa_slave_destroy,
491#ifdef CONFIG_COMPAT
492 .compat_ioctl = hpsa_compat_ioctl,
493#endif
494 .sdev_attrs = hpsa_sdev_attrs,
495 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 496 .max_sectors = 8192,
3f5eac3a
SC		 497};
498
499
500/* Enqueuing and dequeuing functions for cmdlists. */
501static inline void addQ(struct list_head *list, struct CommandList *c)
502{
503 list_add_tail(&c->list, list);
504}
505
506static inline u32 next_command(struct ctlr_info *h)
507{
508 u32 a;
509
510 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
511 return h->access.command_completed(h);
512
513 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
514 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
515 (h->reply_pool_head)++;
516 h->commands_outstanding--;
517 } else {
518 a = FIFO_EMPTY;
519 }
520 /* Check for wraparound */
521 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
522 h->reply_pool_head = h->reply_pool;
523 h->reply_pool_wraparound ^= 1;
524 }
525 return a;
526}
527
528/* set_performant_mode: Modify the tag for cciss performant
529 * set bit 0 for pull model, bits 3-1 for block fetch
530 * register number
531 */
532static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
533{
534 if (likely(h->transMethod & CFGTBL_Trans_Performant))
535 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
536}
537
538static void enqueue_cmd_and_start_io(struct ctlr_info *h,
539 struct CommandList *c)
540{
541 unsigned long flags;
542
543 set_performant_mode(h, c);
544 spin_lock_irqsave(&h->lock, flags);
545 addQ(&h->reqQ, c);
546 h->Qdepth++;
547 start_io(h);
548 spin_unlock_irqrestore(&h->lock, flags);
549}
550
551static inline void removeQ(struct CommandList *c)
552{
553 if (WARN_ON(list_empty(&c->list)))
554 return;
555 list_del_init(&c->list);
556}
557
558static inline int is_hba_lunid(unsigned char scsi3addr[])
559{
560 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
561}
562
563static inline int is_scsi_rev_5(struct ctlr_info *h)
564{
565 if (!h->hba_inquiry_data)
566 return 0;
567 if ((h->hba_inquiry_data[2] & 0x07) == 5)
568 return 1;
569 return 0;
570}
571
edd16368
SC		 572static int hpsa_find_target_lun(struct ctlr_info *h,
573 unsigned char scsi3addr[], int bus, int *target, int *lun)
574{
575 /* finds an unused bus, target, lun for a new physical device
576 * assumes h->devlock is held
577 */
578 int i, found = 0;
cfe5badc 579 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 580
cfe5badc 581 memset(&lun_taken[0], 0, HPSA_MAX_DEVICES >> 3);
edd16368
SC		 582
583 for (i = 0; i < h->ndevices; i++) {
584 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
585 set_bit(h->dev[i]->target, lun_taken);
586 }
587
cfe5badc 588 for (i = 0; i < HPSA_MAX_DEVICES; i++) {
edd16368
SC		 589 if (!test_bit(i, lun_taken)) {
590 /* *bus = 1; */
591 *target = i;
592 *lun = 0;
593 found = 1;
594 break;
595 }
596 }
597 return !found;
598}
599
600/* Add an entry into h->dev[] array. */
601static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
602 struct hpsa_scsi_dev_t *device,
603 struct hpsa_scsi_dev_t *added[], int *nadded)
604{
605 /* assumes h->devlock is held */
606 int n = h->ndevices;
607 int i;
608 unsigned char addr1[8], addr2[8];
609 struct hpsa_scsi_dev_t *sd;
610
cfe5badc 611 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 612 dev_err(&h->pdev->dev, "too many devices, some will be "
613 "inaccessible.\n");
614 return -1;
615 }
616
617 /* physical devices do not have lun or target assigned until now. */
618 if (device->lun != -1)
619 /* Logical device, lun is already assigned. */
620 goto lun_assigned;
621
622 /* If this device a non-zero lun of a multi-lun device
623 * byte 4 of the 8-byte LUN addr will contain the logical
624 * unit no, zero otherise.
625 */
626 if (device->scsi3addr[4] == 0) {
627 /* This is not a non-zero lun of a multi-lun device */
628 if (hpsa_find_target_lun(h, device->scsi3addr,
629 device->bus, &device->target, &device->lun) != 0)
630 return -1;
631 goto lun_assigned;
632 }
633
634 /* This is a non-zero lun of a multi-lun device.
635 * Search through our list and find the device which
636 * has the same 8 byte LUN address, excepting byte 4.
637 * Assign the same bus and target for this new LUN.
638 * Use the logical unit number from the firmware.
639 */
640 memcpy(addr1, device->scsi3addr, 8);
641 addr1[4] = 0;
642 for (i = 0; i < n; i++) {
643 sd = h->dev[i];
644 memcpy(addr2, sd->scsi3addr, 8);
645 addr2[4] = 0;
646 /* differ only in byte 4? */
647 if (memcmp(addr1, addr2, 8) == 0) {
648 device->bus = sd->bus;
649 device->target = sd->target;
650 device->lun = device->scsi3addr[4];
651 break;
652 }
653 }
654 if (device->lun == -1) {
655 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
656 " suspect firmware bug or unsupported hardware "
657 "configuration.\n");
658 return -1;
659 }
660
661lun_assigned:
662
663 h->dev[n] = device;
664 h->ndevices++;
665 added[*nadded] = device;
666 (*nadded)++;
667
668 /* initially, (before registering with scsi layer) we don't
669 * know our hostno and we don't want to print anything first
670 * time anyway (the scsi layer's inquiries will show that info)
671 */
672 /* if (hostno != -1) */
673 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
674 scsi_device_type(device->devtype), hostno,
675 device->bus, device->target, device->lun);
676 return 0;
677}
678
2a8ccf31
SC		 679/* Replace an entry from h->dev[] array. */
680static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
681 int entry, struct hpsa_scsi_dev_t *new_entry,
682 struct hpsa_scsi_dev_t *added[], int *nadded,
683 struct hpsa_scsi_dev_t *removed[], int *nremoved)
684{
685 /* assumes h->devlock is held */
cfe5badc 686 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 687 removed[*nremoved] = h->dev[entry];
688 (*nremoved)++;
01350d05
SC		 689
690 /*
691 * New physical devices won't have target/lun assigned yet
692 * so we need to preserve the values in the slot we are replacing.
693 */
694 if (new_entry->target == -1) {
695 new_entry->target = h->dev[entry]->target;
696 new_entry->lun = h->dev[entry]->lun;
697 }
698
2a8ccf31
SC		 699 h->dev[entry] = new_entry;
700 added[*nadded] = new_entry;
701 (*nadded)++;
702 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
703 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
704 new_entry->target, new_entry->lun);
705}
706
edd16368
SC		 707/* Remove an entry from h->dev[] array. */
708static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
709 struct hpsa_scsi_dev_t *removed[], int *nremoved)
710{
711 /* assumes h->devlock is held */
712 int i;
713 struct hpsa_scsi_dev_t *sd;
714
cfe5badc 715 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 716
717 sd = h->dev[entry];
718 removed[*nremoved] = h->dev[entry];
719 (*nremoved)++;
720
721 for (i = entry; i < h->ndevices-1; i++)
722 h->dev[i] = h->dev[i+1];
723 h->ndevices--;
724 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
725 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
726 sd->lun);
727}
728
729#define SCSI3ADDR_EQ(a, b) ( \
730 (a)[7] == (b)[7] && \
731 (a)[6] == (b)[6] && \
732 (a)[5] == (b)[5] && \
733 (a)[4] == (b)[4] && \
734 (a)[3] == (b)[3] && \
735 (a)[2] == (b)[2] && \
736 (a)[1] == (b)[1] && \
737 (a)[0] == (b)[0])
738
739static void fixup_botched_add(struct ctlr_info *h,
740 struct hpsa_scsi_dev_t *added)
741{
742 /* called when scsi_add_device fails in order to re-adjust
743 * h->dev[] to match the mid layer's view.
744 */
745 unsigned long flags;
746 int i, j;
747
748 spin_lock_irqsave(&h->lock, flags);
749 for (i = 0; i < h->ndevices; i++) {
750 if (h->dev[i] == added) {
751 for (j = i; j < h->ndevices-1; j++)
752 h->dev[j] = h->dev[j+1];
753 h->ndevices--;
754 break;
755 }
756 }
757 spin_unlock_irqrestore(&h->lock, flags);
758 kfree(added);
759}
760
761static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
762 struct hpsa_scsi_dev_t *dev2)
763{
edd16368
SC		 764 /* we compare everything except lun and target as these
765 * are not yet assigned. Compare parts likely
766 * to differ first
767 */
768 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
769 sizeof(dev1->scsi3addr)) != 0)
770 return 0;
771 if (memcmp(dev1->device_id, dev2->device_id,
772 sizeof(dev1->device_id)) != 0)
773 return 0;
774 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
775 return 0;
776 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
777 return 0;
edd16368
SC		 778 if (dev1->devtype != dev2->devtype)
779 return 0;
edd16368
SC		 780 if (dev1->bus != dev2->bus)
781 return 0;
782 return 1;
783}
784
785/* Find needle in haystack. If exact match found, return DEVICE_SAME,
786 * and return needle location in *index. If scsi3addr matches, but not
787 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
788 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
789 */
790static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
791 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
792 int *index)
793{
794 int i;
795#define DEVICE_NOT_FOUND 0
796#define DEVICE_CHANGED 1
797#define DEVICE_SAME 2
798 for (i = 0; i < haystack_size; i++) {
23231048
SC		 799 if (haystack[i] == NULL) /* previously removed. */
800 continue;
edd16368
SC		 801 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
802 *index = i;
803 if (device_is_the_same(needle, haystack[i]))
804 return DEVICE_SAME;
805 else
806 return DEVICE_CHANGED;
807 }
808 }
809 *index = -1;
810 return DEVICE_NOT_FOUND;
811}
812
4967bd3e 813static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 814 struct hpsa_scsi_dev_t *sd[], int nsds)
815{
816 /* sd contains scsi3 addresses and devtypes, and inquiry
817 * data. This function takes what's in sd to be the current
818 * reality and updates h->dev[] to reflect that reality.
819 */
820 int i, entry, device_change, changes = 0;
821 struct hpsa_scsi_dev_t *csd;
822 unsigned long flags;
823 struct hpsa_scsi_dev_t **added, **removed;
824 int nadded, nremoved;
825 struct Scsi_Host *sh = NULL;
826
cfe5badc
ST		 827 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
828 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 829
830 if (!added || !removed) {
831 dev_warn(&h->pdev->dev, "out of memory in "
832 "adjust_hpsa_scsi_table\n");
833 goto free_and_out;
834 }
835
836 spin_lock_irqsave(&h->devlock, flags);
837
838 /* find any devices in h->dev[] that are not in
839 * sd[] and remove them from h->dev[], and for any
840 * devices which have changed, remove the old device
841 * info and add the new device info.
842 */
843 i = 0;
844 nremoved = 0;
845 nadded = 0;
846 while (i < h->ndevices) {
847 csd = h->dev[i];
848 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
849 if (device_change == DEVICE_NOT_FOUND) {
850 changes++;
851 hpsa_scsi_remove_entry(h, hostno, i,
852 removed, &nremoved);
853 continue; /* remove ^^^, hence i not incremented */
854 } else if (device_change == DEVICE_CHANGED) {
855 changes++;
2a8ccf31
SC		 856 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
857 added, &nadded, removed, &nremoved);
c7f172dc
SC		 858 /* Set it to NULL to prevent it from being freed
859 * at the bottom of hpsa_update_scsi_devices()
860 */
861 sd[entry] = NULL;
edd16368
SC		 862 }
863 i++;
864 }
865
866 /* Now, make sure every device listed in sd[] is also
867 * listed in h->dev[], adding them if they aren't found
868 */
869
870 for (i = 0; i < nsds; i++) {
871 if (!sd[i]) /* if already added above. */
872 continue;
873 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
874 h->ndevices, &entry);
875 if (device_change == DEVICE_NOT_FOUND) {
876 changes++;
877 if (hpsa_scsi_add_entry(h, hostno, sd[i],
878 added, &nadded) != 0)
879 break;
880 sd[i] = NULL; /* prevent from being freed later. */
881 } else if (device_change == DEVICE_CHANGED) {
882 /* should never happen... */
883 changes++;
884 dev_warn(&h->pdev->dev,
885 "device unexpectedly changed.\n");
886 /* but if it does happen, we just ignore that device */
887 }
888 }
889 spin_unlock_irqrestore(&h->devlock, flags);
890
891 /* Don't notify scsi mid layer of any changes the first time through
892 * (or if there are no changes) scsi_scan_host will do it later the
893 * first time through.
894 */
895 if (hostno == -1 || !changes)
896 goto free_and_out;
897
898 sh = h->scsi_host;
899 /* Notify scsi mid layer of any removed devices */
900 for (i = 0; i < nremoved; i++) {
901 struct scsi_device *sdev =
902 scsi_device_lookup(sh, removed[i]->bus,
903 removed[i]->target, removed[i]->lun);
904 if (sdev != NULL) {
905 scsi_remove_device(sdev);
906 scsi_device_put(sdev);
907 } else {
908 /* We don't expect to get here.
909 * future cmds to this device will get selection
910 * timeout as if the device was gone.
911 */
912 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
913 " for removal.", hostno, removed[i]->bus,
914 removed[i]->target, removed[i]->lun);
915 }
916 kfree(removed[i]);
917 removed[i] = NULL;
918 }
919
920 /* Notify scsi mid layer of any added devices */
921 for (i = 0; i < nadded; i++) {
922 if (scsi_add_device(sh, added[i]->bus,
923 added[i]->target, added[i]->lun) == 0)
924 continue;
925 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
926 "device not added.\n", hostno, added[i]->bus,
927 added[i]->target, added[i]->lun);
928 /* now we have to remove it from h->dev,
929 * since it didn't get added to scsi mid layer
930 */
931 fixup_botched_add(h, added[i]);
932 }
933
934free_and_out:
935 kfree(added);
936 kfree(removed);
edd16368
SC		 937}
938
939/*
940 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
941 * Assume's h->devlock is held.
942 */
943static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
944 int bus, int target, int lun)
945{
946 int i;
947 struct hpsa_scsi_dev_t *sd;
948
949 for (i = 0; i < h->ndevices; i++) {
950 sd = h->dev[i];
951 if (sd->bus == bus && sd->target == target && sd->lun == lun)
952 return sd;
953 }
954 return NULL;
955}
956
957/* link sdev->hostdata to our per-device structure. */
958static int hpsa_slave_alloc(struct scsi_device *sdev)
959{
960 struct hpsa_scsi_dev_t *sd;
961 unsigned long flags;
962 struct ctlr_info *h;
963
964 h = sdev_to_hba(sdev);
965 spin_lock_irqsave(&h->devlock, flags);
966 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
967 sdev_id(sdev), sdev->lun);
968 if (sd != NULL)
969 sdev->hostdata = sd;
970 spin_unlock_irqrestore(&h->devlock, flags);
971 return 0;
972}
973
974static void hpsa_slave_destroy(struct scsi_device *sdev)
975{
bcc44255 976 /* nothing to do. */
edd16368
SC		 977}
978
33a2ffce
SC		 979static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
980{
981 int i;
982
983 if (!h->cmd_sg_list)
984 return;
985 for (i = 0; i < h->nr_cmds; i++) {
986 kfree(h->cmd_sg_list[i]);
987 h->cmd_sg_list[i] = NULL;
988 }
989 kfree(h->cmd_sg_list);
990 h->cmd_sg_list = NULL;
991}
992
993static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
994{
995 int i;
996
997 if (h->chainsize <= 0)
998 return 0;
999
1000 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1001 GFP_KERNEL);
1002 if (!h->cmd_sg_list)
1003 return -ENOMEM;
1004 for (i = 0; i < h->nr_cmds; i++) {
1005 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1006 h->chainsize, GFP_KERNEL);
1007 if (!h->cmd_sg_list[i])
1008 goto clean;
1009 }
1010 return 0;
1011
1012clean:
1013 hpsa_free_sg_chain_blocks(h);
1014 return -ENOMEM;
1015}
1016
1017static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1018 struct CommandList *c)
1019{
1020 struct SGDescriptor *chain_sg, *chain_block;
1021 u64 temp64;
1022
1023 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1024 chain_block = h->cmd_sg_list[c->cmdindex];
1025 chain_sg->Ext = HPSA_SG_CHAIN;
1026 chain_sg->Len = sizeof(*chain_sg) *
1027 (c->Header.SGTotal - h->max_cmd_sg_entries);
1028 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1029 PCI_DMA_TODEVICE);
1030 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1031 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1032}
1033
1034static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1035 struct CommandList *c)
1036{
1037 struct SGDescriptor *chain_sg;
1038 union u64bit temp64;
1039
1040 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1041 return;
1042
1043 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1044 temp64.val32.lower = chain_sg->Addr.lower;
1045 temp64.val32.upper = chain_sg->Addr.upper;
1046 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1047}
1048
1fb011fb 1049static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1050{
1051 struct scsi_cmnd *cmd;
1052 struct ctlr_info *h;
1053 struct ErrorInfo *ei;
1054
1055 unsigned char sense_key;
1056 unsigned char asc; /* additional sense code */
1057 unsigned char ascq; /* additional sense code qualifier */
db111e18 1058 unsigned long sense_data_size;
edd16368
SC		 1059
1060 ei = cp->err_info;
1061 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1062 h = cp->h;
1063
1064 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1065 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1066 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1067
1068 cmd->result = (DID_OK << 16); /* host byte */
1069 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1070 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1071
1072 /* copy the sense data whether we need to or not. */
db111e18
SC		 1073 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1074 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1075 else
1076 sense_data_size = sizeof(ei->SenseInfo);
1077 if (ei->SenseLen < sense_data_size)
1078 sense_data_size = ei->SenseLen;
1079
1080 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1081 scsi_set_resid(cmd, ei->ResidualCnt);
1082
1083 if (ei->CommandStatus == 0) {
1084 cmd->scsi_done(cmd);
1085 cmd_free(h, cp);
1086 return;
1087 }
1088
1089 /* an error has occurred */
1090 switch (ei->CommandStatus) {
1091
1092 case CMD_TARGET_STATUS:
1093 if (ei->ScsiStatus) {
1094 /* Get sense key */
1095 sense_key = 0xf & ei->SenseInfo[2];
1096 /* Get additional sense code */
1097 asc = ei->SenseInfo[12];
1098 /* Get addition sense code qualifier */
1099 ascq = ei->SenseInfo[13];
1100 }
1101
1102 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1103 if (check_for_unit_attention(h, cp)) {
1104 cmd->result = DID_SOFT_ERROR << 16;
1105 break;
1106 }
1107 if (sense_key == ILLEGAL_REQUEST) {
1108 /*
1109 * SCSI REPORT_LUNS is commonly unsupported on
1110 * Smart Array. Suppress noisy complaint.
1111 */
1112 if (cp->Request.CDB[0] == REPORT_LUNS)
1113 break;
1114
1115 /* If ASC/ASCQ indicate Logical Unit
1116 * Not Supported condition,
1117 */
1118 if ((asc == 0x25) && (ascq == 0x0)) {
1119 dev_warn(&h->pdev->dev, "cp %p "
1120 "has check condition\n", cp);
1121 break;
1122 }
1123 }
1124
1125 if (sense_key == NOT_READY) {
1126 /* If Sense is Not Ready, Logical Unit
1127 * Not ready, Manual Intervention
1128 * required
1129 */
1130 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1131 dev_warn(&h->pdev->dev, "cp %p "
1132 "has check condition: unit "
1133 "not ready, manual "
1134 "intervention required\n", cp);
1135 break;
1136 }
1137 }
1d3b3609
MG		 1138 if (sense_key == ABORTED_COMMAND) {
1139 /* Aborted command is retryable */
1140 dev_warn(&h->pdev->dev, "cp %p "
1141 "has check condition: aborted command: "
1142 "ASC: 0x%x, ASCQ: 0x%x\n",
1143 cp, asc, ascq);
1144 cmd->result = DID_SOFT_ERROR << 16;
1145 break;
1146 }
edd16368
SC		 1147 /* Must be some other type of check condition */
1148 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1149 "unknown type: "
1150 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1151 "Returning result: 0x%x, "
1152 "cmd=[%02x %02x %02x %02x %02x "
807be732 1153 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1154 "%02x %02x %02x %02x %02x]\n",
1155 cp, sense_key, asc, ascq,
1156 cmd->result,
1157 cmd->cmnd[0], cmd->cmnd[1],
1158 cmd->cmnd[2], cmd->cmnd[3],
1159 cmd->cmnd[4], cmd->cmnd[5],
1160 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1161 cmd->cmnd[8], cmd->cmnd[9],
1162 cmd->cmnd[10], cmd->cmnd[11],
1163 cmd->cmnd[12], cmd->cmnd[13],
1164 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1165 break;
1166 }
1167
1168
1169 /* Problem was not a check condition
1170 * Pass it up to the upper layers...
1171 */
1172 if (ei->ScsiStatus) {
1173 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1174 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1175 "Returning result: 0x%x\n",
1176 cp, ei->ScsiStatus,
1177 sense_key, asc, ascq,
1178 cmd->result);
1179 } else { /* scsi status is zero??? How??? */
1180 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1181 "Returning no connection.\n", cp),
1182
1183 /* Ordinarily, this case should never happen,
1184 * but there is a bug in some released firmware
1185 * revisions that allows it to happen if, for
1186 * example, a 4100 backplane loses power and
1187 * the tape drive is in it. We assume that
1188 * it's a fatal error of some kind because we
1189 * can't show that it wasn't. We will make it
1190 * look like selection timeout since that is
1191 * the most common reason for this to occur,
1192 * and it's severe enough.
1193 */
1194
1195 cmd->result = DID_NO_CONNECT << 16;
1196 }
1197 break;
1198
1199 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1200 break;
1201 case CMD_DATA_OVERRUN:
1202 dev_warn(&h->pdev->dev, "cp %p has"
1203 " completed with data overrun "
1204 "reported\n", cp);
1205 break;
1206 case CMD_INVALID: {
1207 /* print_bytes(cp, sizeof(*cp), 1, 0);
1208 print_cmd(cp); */
1209 /* We get CMD_INVALID if you address a non-existent device
1210 * instead of a selection timeout (no response). You will
1211 * see this if you yank out a drive, then try to access it.
1212 * This is kind of a shame because it means that any other
1213 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1214 * missing target. */
1215 cmd->result = DID_NO_CONNECT << 16;
1216 }
1217 break;
1218 case CMD_PROTOCOL_ERR:
1219 dev_warn(&h->pdev->dev, "cp %p has "
1220 "protocol error \n", cp);
1221 break;
1222 case CMD_HARDWARE_ERR:
1223 cmd->result = DID_ERROR << 16;
1224 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1225 break;
1226 case CMD_CONNECTION_LOST:
1227 cmd->result = DID_ERROR << 16;
1228 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1229 break;
1230 case CMD_ABORTED:
1231 cmd->result = DID_ABORT << 16;
1232 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1233 cp, ei->ScsiStatus);
1234 break;
1235 case CMD_ABORT_FAILED:
1236 cmd->result = DID_ERROR << 16;
1237 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1238 break;
1239 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1240 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1241 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1242 "abort\n", cp);
1243 break;
1244 case CMD_TIMEOUT:
1245 cmd->result = DID_TIME_OUT << 16;
1246 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1247 break;
1d5e2ed0
SC		 1248 case CMD_UNABORTABLE:
1249 cmd->result = DID_ERROR << 16;
1250 dev_warn(&h->pdev->dev, "Command unabortable\n");
1251 break;
edd16368
SC		 1252 default:
1253 cmd->result = DID_ERROR << 16;
1254 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1255 cp, ei->CommandStatus);
1256 }
1257 cmd->scsi_done(cmd);
1258 cmd_free(h, cp);
1259}
1260
edd16368
SC		 1261static void hpsa_pci_unmap(struct pci_dev *pdev,
1262 struct CommandList *c, int sg_used, int data_direction)
1263{
1264 int i;
1265 union u64bit addr64;
1266
1267 for (i = 0; i < sg_used; i++) {
1268 addr64.val32.lower = c->SG[i].Addr.lower;
1269 addr64.val32.upper = c->SG[i].Addr.upper;
1270 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1271 data_direction);
1272 }
1273}
1274
1275static void hpsa_map_one(struct pci_dev *pdev,
1276 struct CommandList *cp,
1277 unsigned char *buf,
1278 size_t buflen,
1279 int data_direction)
1280{
01a02ffc 1281 u64 addr64;
edd16368
SC		 1282
1283 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1284 cp->Header.SGList = 0;
1285 cp->Header.SGTotal = 0;
1286 return;
1287 }
1288
01a02ffc 1289 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1290 cp->SG[0].Addr.lower =
01a02ffc 1291 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1292 cp->SG[0].Addr.upper =
01a02ffc 1293 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1294 cp->SG[0].Len = buflen;
01a02ffc
SC		 1295 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1296 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1297}
1298
1299static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1300 struct CommandList *c)
1301{
1302 DECLARE_COMPLETION_ONSTACK(wait);
1303
1304 c->waiting = &wait;
1305 enqueue_cmd_and_start_io(h, c);
1306 wait_for_completion(&wait);
1307}
1308
a0c12413
SC		 1309static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1310 struct CommandList *c)
1311{
1312 unsigned long flags;
1313
1314 /* If controller lockup detected, fake a hardware error. */
1315 spin_lock_irqsave(&h->lock, flags);
1316 if (unlikely(h->lockup_detected)) {
1317 spin_unlock_irqrestore(&h->lock, flags);
1318 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1319 } else {
1320 spin_unlock_irqrestore(&h->lock, flags);
1321 hpsa_scsi_do_simple_cmd_core(h, c);
1322 }
1323}
1324
edd16368
SC		 1325static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1326 struct CommandList *c, int data_direction)
1327{
1328 int retry_count = 0;
1329
1330 do {
7630abd0 1331 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1332 hpsa_scsi_do_simple_cmd_core(h, c);
1333 retry_count++;
1334 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1335 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1336}
1337
1338static void hpsa_scsi_interpret_error(struct CommandList *cp)
1339{
1340 struct ErrorInfo *ei;
1341 struct device *d = &cp->h->pdev->dev;
1342
1343 ei = cp->err_info;
1344 switch (ei->CommandStatus) {
1345 case CMD_TARGET_STATUS:
1346 dev_warn(d, "cmd %p has completed with errors\n", cp);
1347 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1348 ei->ScsiStatus);
1349 if (ei->ScsiStatus == 0)
1350 dev_warn(d, "SCSI status is abnormally zero. "
1351 "(probably indicates selection timeout "
1352 "reported incorrectly due to a known "
1353 "firmware bug, circa July, 2001.)\n");
1354 break;
1355 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1356 dev_info(d, "UNDERRUN\n");
1357 break;
1358 case CMD_DATA_OVERRUN:
1359 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1360 break;
1361 case CMD_INVALID: {
1362 /* controller unfortunately reports SCSI passthru's
1363 * to non-existent targets as invalid commands.
1364 */
1365 dev_warn(d, "cp %p is reported invalid (probably means "
1366 "target device no longer present)\n", cp);
1367 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1368 print_cmd(cp); */
1369 }
1370 break;
1371 case CMD_PROTOCOL_ERR:
1372 dev_warn(d, "cp %p has protocol error \n", cp);
1373 break;
1374 case CMD_HARDWARE_ERR:
1375 /* cmd->result = DID_ERROR << 16; */
1376 dev_warn(d, "cp %p had hardware error\n", cp);
1377 break;
1378 case CMD_CONNECTION_LOST:
1379 dev_warn(d, "cp %p had connection lost\n", cp);
1380 break;
1381 case CMD_ABORTED:
1382 dev_warn(d, "cp %p was aborted\n", cp);
1383 break;
1384 case CMD_ABORT_FAILED:
1385 dev_warn(d, "cp %p reports abort failed\n", cp);
1386 break;
1387 case CMD_UNSOLICITED_ABORT:
1388 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1389 break;
1390 case CMD_TIMEOUT:
1391 dev_warn(d, "cp %p timed out\n", cp);
1392 break;
1d5e2ed0
SC		 1393 case CMD_UNABORTABLE:
1394 dev_warn(d, "Command unabortable\n");
1395 break;
edd16368
SC		 1396 default:
1397 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1398 ei->CommandStatus);
1399 }
1400}
1401
1402static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1403 unsigned char page, unsigned char *buf,
1404 unsigned char bufsize)
1405{
1406 int rc = IO_OK;
1407 struct CommandList *c;
1408 struct ErrorInfo *ei;
1409
1410 c = cmd_special_alloc(h);
1411
1412 if (c == NULL) { /* trouble... */
1413 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1414 return -ENOMEM;
edd16368
SC		 1415 }
1416
1417 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1418 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1419 ei = c->err_info;
1420 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1421 hpsa_scsi_interpret_error(c);
1422 rc = -1;
1423 }
1424 cmd_special_free(h, c);
1425 return rc;
1426}
1427
1428static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1429{
1430 int rc = IO_OK;
1431 struct CommandList *c;
1432 struct ErrorInfo *ei;
1433
1434 c = cmd_special_alloc(h);
1435
1436 if (c == NULL) { /* trouble... */
1437 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1438 return -ENOMEM;
edd16368
SC		 1439 }
1440
1441 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1442 hpsa_scsi_do_simple_cmd_core(h, c);
1443 /* no unmap needed here because no data xfer. */
1444
1445 ei = c->err_info;
1446 if (ei->CommandStatus != 0) {
1447 hpsa_scsi_interpret_error(c);
1448 rc = -1;
1449 }
1450 cmd_special_free(h, c);
1451 return rc;
1452}
1453
1454static void hpsa_get_raid_level(struct ctlr_info *h,
1455 unsigned char *scsi3addr, unsigned char *raid_level)
1456{
1457 int rc;
1458 unsigned char *buf;
1459
1460 *raid_level = RAID_UNKNOWN;
1461 buf = kzalloc(64, GFP_KERNEL);
1462 if (!buf)
1463 return;
1464 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1465 if (rc == 0)
1466 *raid_level = buf[8];
1467 if (*raid_level > RAID_UNKNOWN)
1468 *raid_level = RAID_UNKNOWN;
1469 kfree(buf);
1470 return;
1471}
1472
1473/* Get the device id from inquiry page 0x83 */
1474static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1475 unsigned char *device_id, int buflen)
1476{
1477 int rc;
1478 unsigned char *buf;
1479
1480 if (buflen > 16)
1481 buflen = 16;
1482 buf = kzalloc(64, GFP_KERNEL);
1483 if (!buf)
1484 return -1;
1485 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1486 if (rc == 0)
1487 memcpy(device_id, &buf[8], buflen);
1488 kfree(buf);
1489 return rc != 0;
1490}
1491
1492static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1493 struct ReportLUNdata *buf, int bufsize,
1494 int extended_response)
1495{
1496 int rc = IO_OK;
1497 struct CommandList *c;
1498 unsigned char scsi3addr[8];
1499 struct ErrorInfo *ei;
1500
1501 c = cmd_special_alloc(h);
1502 if (c == NULL) { /* trouble... */
1503 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1504 return -1;
1505 }
e89c0ae7
SC		 1506 /* address the controller */
1507 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1508 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1509 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1510 if (extended_response)
1511 c->Request.CDB[1] = extended_response;
1512 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1513 ei = c->err_info;
1514 if (ei->CommandStatus != 0 &&
1515 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1516 hpsa_scsi_interpret_error(c);
1517 rc = -1;
1518 }
1519 cmd_special_free(h, c);
1520 return rc;
1521}
1522
1523static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1524 struct ReportLUNdata *buf,
1525 int bufsize, int extended_response)
1526{
1527 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1528}
1529
1530static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1531 struct ReportLUNdata *buf, int bufsize)
1532{
1533 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1534}
1535
1536static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1537 int bus, int target, int lun)
1538{
1539 device->bus = bus;
1540 device->target = target;
1541 device->lun = lun;
1542}
1543
1544static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1545 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1546 unsigned char *is_OBDR_device)
edd16368 1547{
0b0e1d6c
SC		 1548
1549#define OBDR_SIG_OFFSET 43
1550#define OBDR_TAPE_SIG "$DR-10"
1551#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1552#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1553
ea6d3bc3 1554 unsigned char *inq_buff;
0b0e1d6c 1555 unsigned char *obdr_sig;
edd16368 1556
ea6d3bc3 1557 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1558 if (!inq_buff)
1559 goto bail_out;
1560
edd16368
SC		 1561 /* Do an inquiry to the device to see what it is. */
1562 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1563 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1564 /* Inquiry failed (msg printed already) */
1565 dev_err(&h->pdev->dev,
1566 "hpsa_update_device_info: inquiry failed\n");
1567 goto bail_out;
1568 }
1569
edd16368
SC		 1570 this_device->devtype = (inq_buff[0] & 0x1f);
1571 memcpy(this_device->scsi3addr, scsi3addr, 8);
1572 memcpy(this_device->vendor, &inq_buff[8],
1573 sizeof(this_device->vendor));
1574 memcpy(this_device->model, &inq_buff[16],
1575 sizeof(this_device->model));
edd16368
SC		 1576 memset(this_device->device_id, 0,
1577 sizeof(this_device->device_id));
1578 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1579 sizeof(this_device->device_id));
1580
1581 if (this_device->devtype == TYPE_DISK &&
1582 is_logical_dev_addr_mode(scsi3addr))
1583 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1584 else
1585 this_device->raid_level = RAID_UNKNOWN;
1586
0b0e1d6c
SC		 1587 if (is_OBDR_device) {
1588 /* See if this is a One-Button-Disaster-Recovery device
1589 * by looking for "$DR-10" at offset 43 in inquiry data.
1590 */
1591 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1592 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1593 strncmp(obdr_sig, OBDR_TAPE_SIG,
1594 OBDR_SIG_LEN) == 0);
1595 }
1596
edd16368
SC		 1597 kfree(inq_buff);
1598 return 0;
1599
1600bail_out:
1601 kfree(inq_buff);
1602 return 1;
1603}
1604
1605static unsigned char *msa2xxx_model[] = {
1606 "MSA2012",
1607 "MSA2024",
1608 "MSA2312",
1609 "MSA2324",
fda38518 1610 "P2000 G3 SAS",
edd16368
SC		 1611 NULL,
1612};
1613
1614static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1615{
1616 int i;
1617
1618 for (i = 0; msa2xxx_model[i]; i++)
1619 if (strncmp(device->model, msa2xxx_model[i],
1620 strlen(msa2xxx_model[i])) == 0)
1621 return 1;
1622 return 0;
1623}
1624
1625/* Helper function to assign bus, target, lun mapping of devices.
1626 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1627 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1628 * Logical drive target and lun are assigned at this time, but
1629 * physical device lun and target assignment are deferred (assigned
1630 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1631 */
1632static void figure_bus_target_lun(struct ctlr_info *h,
01a02ffc 1633 u8 *lunaddrbytes, int *bus, int *target, int *lun,
edd16368
SC		 1634 struct hpsa_scsi_dev_t *device)
1635{
01a02ffc 1636 u32 lunid;
edd16368
SC		 1637
1638 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1639 /* logical device */
9bc3711c
SC		 1640 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1641 if (is_msa2xxx(h, device)) {
1642 /* msa2xxx way, put logicals on bus 1
1643 * and match target/lun numbers box
1644 * reports.
339b2b14 1645 */
9bc3711c
SC		 1646 *bus = 1;
1647 *target = (lunid >> 16) & 0x3fff;
1648 *lun = lunid & 0x00ff;
339b2b14 1649 } else {
bbef6c0c
SC		 1650 *bus = 0;
1651 *target = 0;
1652 *lun = (lunid & 0x3fff);
edd16368
SC		 1653 }
1654 } else {
edd16368 1655 if (is_hba_lunid(lunaddrbytes))
bbef6c0c 1656 *bus = 3; /* controller */
edd16368 1657 else
bbef6c0c 1658 *bus = 2; /* physical device */
edd16368
SC		 1659 *target = -1;
1660 *lun = -1; /* we will fill these in later. */
1661 }
1662}
1663
1664/*
1665 * If there is no lun 0 on a target, linux won't find any devices.
1666 * For the MSA2xxx boxes, we have to manually detect the enclosure
1667 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1668 * it for some reason. *tmpdevice is the target we're adding,
1669 * this_device is a pointer into the current element of currentsd[]
1670 * that we're building up in update_scsi_devices(), below.
1671 * lunzerobits is a bitmap that tracks which targets already have a
1672 * lun 0 assigned.
1673 * Returns 1 if an enclosure was added, 0 if not.
1674 */
1675static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1676 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1677 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
edd16368
SC		 1678 int bus, int target, int lun, unsigned long lunzerobits[],
1679 int *nmsa2xxx_enclosures)
1680{
1681 unsigned char scsi3addr[8];
1682
1683 if (test_bit(target, lunzerobits))
1684 return 0; /* There is already a lun 0 on this target. */
1685
1686 if (!is_logical_dev_addr_mode(lunaddrbytes))
1687 return 0; /* It's the logical targets that may lack lun 0. */
1688
1689 if (!is_msa2xxx(h, tmpdevice))
1690 return 0; /* It's only the MSA2xxx that have this problem. */
1691
1692 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1693 return 0;
1694
c4f8a299
SC		 1695 memset(scsi3addr, 0, 8);
1696 scsi3addr[3] = target;
edd16368
SC		 1697 if (is_hba_lunid(scsi3addr))
1698 return 0; /* Don't add the RAID controller here. */
1699
339b2b14
SC		 1700 if (is_scsi_rev_5(h))
1701 return 0; /* p1210m doesn't need to do this. */
1702
edd16368
SC		 1703 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1704 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1705 "enclosures exceeded. Check your hardware "
1706 "configuration.");
1707 return 0;
1708 }
1709
0b0e1d6c 1710 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368
SC		 1711 return 0;
1712 (*nmsa2xxx_enclosures)++;
1713 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1714 set_bit(target, lunzerobits);
1715 return 1;
1716}
1717
1718/*
1719 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1720 * logdev. The number of luns in physdev and logdev are returned in
1721 * *nphysicals and *nlogicals, respectively.
1722 * Returns 0 on success, -1 otherwise.
1723 */
1724static int hpsa_gather_lun_info(struct ctlr_info *h,
1725 int reportlunsize,
01a02ffc
SC		 1726 struct ReportLUNdata *physdev, u32 *nphysicals,
1727 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1728{
1729 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1730 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1731 return -1;
1732 }
6df1e954 1733 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1734 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1735 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1736 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1737 *nphysicals - HPSA_MAX_PHYS_LUN);
1738 *nphysicals = HPSA_MAX_PHYS_LUN;
1739 }
1740 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1741 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1742 return -1;
1743 }
6df1e954 1744 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1745 /* Reject Logicals in excess of our max capability. */
1746 if (*nlogicals > HPSA_MAX_LUN) {
1747 dev_warn(&h->pdev->dev,
1748 "maximum logical LUNs (%d) exceeded. "
1749 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1750 *nlogicals - HPSA_MAX_LUN);
1751 *nlogicals = HPSA_MAX_LUN;
1752 }
1753 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1754 dev_warn(&h->pdev->dev,
1755 "maximum logical + physical LUNs (%d) exceeded. "
1756 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1757 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1758 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1759 }
1760 return 0;
1761}
1762
339b2b14
SC		 1763u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1764 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1765 struct ReportLUNdata *logdev_list)
1766{
1767 /* Helper function, figure out where the LUN ID info is coming from
1768 * given index i, lists of physical and logical devices, where in
1769 * the list the raid controller is supposed to appear (first or last)
1770 */
1771
1772 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1773 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1774
1775 if (i == raid_ctlr_position)
1776 return RAID_CTLR_LUNID;
1777
1778 if (i < logicals_start)
1779 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1780
1781 if (i < last_device)
1782 return &logdev_list->LUN[i - nphysicals -
1783 (raid_ctlr_position == 0)][0];
1784 BUG();
1785 return NULL;
1786}
1787
edd16368
SC		 1788static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1789{
1790 /* the idea here is we could get notified
1791 * that some devices have changed, so we do a report
1792 * physical luns and report logical luns cmd, and adjust
1793 * our list of devices accordingly.
1794 *
1795 * The scsi3addr's of devices won't change so long as the
1796 * adapter is not reset. That means we can rescan and
1797 * tell which devices we already know about, vs. new
1798 * devices, vs. disappearing devices.
1799 */
1800 struct ReportLUNdata *physdev_list = NULL;
1801 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1802 u32 nphysicals = 0;
1803 u32 nlogicals = 0;
1804 u32 ndev_allocated = 0;
edd16368
SC		 1805 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1806 int ncurrent = 0;
1807 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1808 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1809 int bus, target, lun;
339b2b14 1810 int raid_ctlr_position;
edd16368
SC		 1811 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1812
cfe5badc 1813 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1814 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1815 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1816 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1817
0b0e1d6c 1818 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1819 dev_err(&h->pdev->dev, "out of memory\n");
1820 goto out;
1821 }
1822 memset(lunzerobits, 0, sizeof(lunzerobits));
1823
1824 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1825 logdev_list, &nlogicals))
1826 goto out;
1827
1828 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1829 * but each of them 4 times through different paths. The plus 1
1830 * is for the RAID controller.
1831 */
1832 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1833
1834 /* Allocate the per device structures */
1835 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 1836 if (i >= HPSA_MAX_DEVICES) {
1837 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1838 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1839 ndevs_to_allocate - HPSA_MAX_DEVICES);
1840 break;
1841 }
1842
edd16368
SC		 1843 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1844 if (!currentsd[i]) {
1845 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1846 __FILE__, __LINE__);
1847 goto out;
1848 }
1849 ndev_allocated++;
1850 }
1851
339b2b14
SC		 1852 if (unlikely(is_scsi_rev_5(h)))
1853 raid_ctlr_position = 0;
1854 else
1855 raid_ctlr_position = nphysicals + nlogicals;
1856
edd16368
SC		 1857 /* adjust our table of devices */
1858 nmsa2xxx_enclosures = 0;
1859 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 1860 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 1861
1862 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1863 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1864 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1865 /* skip masked physical devices. */
339b2b14
SC		 1866 if (lunaddrbytes[3] & 0xC0 &&
1867 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1868 continue;
1869
1870 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 1871 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1872 &is_OBDR))
edd16368
SC		 1873 continue; /* skip it if we can't talk to it. */
1874 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1875 tmpdevice);
1876 this_device = currentsd[ncurrent];
1877
1878 /*
1879 * For the msa2xxx boxes, we have to insert a LUN 0 which
1880 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1881 * is nonetheless an enclosure device there. We have to
1882 * present that otherwise linux won't find anything if
1883 * there is no lun 0.
1884 */
1885 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1886 lunaddrbytes, bus, target, lun, lunzerobits,
1887 &nmsa2xxx_enclosures)) {
1888 ncurrent++;
1889 this_device = currentsd[ncurrent];
1890 }
1891
1892 *this_device = *tmpdevice;
1893 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1894
1895 switch (this_device->devtype) {
0b0e1d6c 1896 case TYPE_ROM:
edd16368
SC		 1897 /* We don't *really* support actual CD-ROM devices,
1898 * just "One Button Disaster Recovery" tape drive
1899 * which temporarily pretends to be a CD-ROM drive.
1900 * So we check that the device is really an OBDR tape
1901 * device by checking for "$DR-10" in bytes 43-48 of
1902 * the inquiry data.
1903 */
0b0e1d6c
SC		 1904 if (is_OBDR)
1905 ncurrent++;
edd16368
SC		 1906 break;
1907 case TYPE_DISK:
1908 if (i < nphysicals)
1909 break;
1910 ncurrent++;
1911 break;
1912 case TYPE_TAPE:
1913 case TYPE_MEDIUM_CHANGER:
1914 ncurrent++;
1915 break;
1916 case TYPE_RAID:
1917 /* Only present the Smartarray HBA as a RAID controller.
1918 * If it's a RAID controller other than the HBA itself
1919 * (an external RAID controller, MSA500 or similar)
1920 * don't present it.
1921 */
1922 if (!is_hba_lunid(lunaddrbytes))
1923 break;
1924 ncurrent++;
1925 break;
1926 default:
1927 break;
1928 }
cfe5badc 1929 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 1930 break;
1931 }
1932 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1933out:
1934 kfree(tmpdevice);
1935 for (i = 0; i < ndev_allocated; i++)
1936 kfree(currentsd[i]);
1937 kfree(currentsd);
edd16368
SC		 1938 kfree(physdev_list);
1939 kfree(logdev_list);
edd16368
SC		 1940}
1941
1942/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1943 * dma mapping and fills in the scatter gather entries of the
1944 * hpsa command, cp.
1945 */
33a2ffce 1946static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 1947 struct CommandList *cp,
1948 struct scsi_cmnd *cmd)
1949{
1950 unsigned int len;
1951 struct scatterlist *sg;
01a02ffc 1952 u64 addr64;
33a2ffce
SC		 1953 int use_sg, i, sg_index, chained;
1954 struct SGDescriptor *curr_sg;
edd16368 1955
33a2ffce 1956 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 1957
1958 use_sg = scsi_dma_map(cmd);
1959 if (use_sg < 0)
1960 return use_sg;
1961
1962 if (!use_sg)
1963 goto sglist_finished;
1964
33a2ffce
SC		 1965 curr_sg = cp->SG;
1966 chained = 0;
1967 sg_index = 0;
edd16368 1968 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 1969 if (i == h->max_cmd_sg_entries - 1 &&
1970 use_sg > h->max_cmd_sg_entries) {
1971 chained = 1;
1972 curr_sg = h->cmd_sg_list[cp->cmdindex];
1973 sg_index = 0;
1974 }
01a02ffc 1975 addr64 = (u64) sg_dma_address(sg);
edd16368 1976 len = sg_dma_len(sg);
33a2ffce
SC		 1977 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
1978 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
1979 curr_sg->Len = len;
1980 curr_sg->Ext = 0; /* we are not chaining */
1981 curr_sg++;
1982 }
1983
1984 if (use_sg + chained > h->maxSG)
1985 h->maxSG = use_sg + chained;
1986
1987 if (chained) {
1988 cp->Header.SGList = h->max_cmd_sg_entries;
1989 cp->Header.SGTotal = (u16) (use_sg + 1);
1990 hpsa_map_sg_chain_block(h, cp);
1991 return 0;
edd16368
SC		 1992 }
1993
1994sglist_finished:
1995
01a02ffc
SC		 1996 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
1997 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 1998 return 0;
1999}
2000
2001
f281233d 2002static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2003 void (*done)(struct scsi_cmnd *))
2004{
2005 struct ctlr_info *h;
2006 struct hpsa_scsi_dev_t *dev;
2007 unsigned char scsi3addr[8];
2008 struct CommandList *c;
2009 unsigned long flags;
2010
2011 /* Get the ptr to our adapter structure out of cmd->host. */
2012 h = sdev_to_hba(cmd->device);
2013 dev = cmd->device->hostdata;
2014 if (!dev) {
2015 cmd->result = DID_NO_CONNECT << 16;
2016 done(cmd);
2017 return 0;
2018 }
2019 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2020
edd16368 2021 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2022 if (unlikely(h->lockup_detected)) {
2023 spin_unlock_irqrestore(&h->lock, flags);
2024 cmd->result = DID_ERROR << 16;
2025 done(cmd);
2026 return 0;
2027 }
2028 /* Need a lock as this is being allocated from the pool */
edd16368
SC		 2029 c = cmd_alloc(h);
2030 spin_unlock_irqrestore(&h->lock, flags);
2031 if (c == NULL) { /* trouble... */
2032 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2033 return SCSI_MLQUEUE_HOST_BUSY;
2034 }
2035
2036 /* Fill in the command list header */
2037
2038 cmd->scsi_done = done; /* save this for use by completion code */
2039
2040 /* save c in case we have to abort it */
2041 cmd->host_scribble = (unsigned char *) c;
2042
2043 c->cmd_type = CMD_SCSI;
2044 c->scsi_cmd = cmd;
2045 c->Header.ReplyQueue = 0; /* unused in simple mode */
2046 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2047 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2048 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2049
2050 /* Fill in the request block... */
2051
2052 c->Request.Timeout = 0;
2053 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2054 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2055 c->Request.CDBLen = cmd->cmd_len;
2056 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2057 c->Request.Type.Type = TYPE_CMD;
2058 c->Request.Type.Attribute = ATTR_SIMPLE;
2059 switch (cmd->sc_data_direction) {
2060 case DMA_TO_DEVICE:
2061 c->Request.Type.Direction = XFER_WRITE;
2062 break;
2063 case DMA_FROM_DEVICE:
2064 c->Request.Type.Direction = XFER_READ;
2065 break;
2066 case DMA_NONE:
2067 c->Request.Type.Direction = XFER_NONE;
2068 break;
2069 case DMA_BIDIRECTIONAL:
2070 /* This can happen if a buggy application does a scsi passthru
2071 * and sets both inlen and outlen to non-zero. ( see
2072 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2073 */
2074
2075 c->Request.Type.Direction = XFER_RSVD;
2076 /* This is technically wrong, and hpsa controllers should
2077 * reject it with CMD_INVALID, which is the most correct
2078 * response, but non-fibre backends appear to let it
2079 * slide by, and give the same results as if this field
2080 * were set correctly. Either way is acceptable for
2081 * our purposes here.
2082 */
2083
2084 break;
2085
2086 default:
2087 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2088 cmd->sc_data_direction);
2089 BUG();
2090 break;
2091 }
2092
33a2ffce 2093 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2094 cmd_free(h, c);
2095 return SCSI_MLQUEUE_HOST_BUSY;
2096 }
2097 enqueue_cmd_and_start_io(h, c);
2098 /* the cmd'll come back via intr handler in complete_scsi_command() */
2099 return 0;
2100}
2101
f281233d
JG		 2102static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2103
a08a8471
SC		 2104static void hpsa_scan_start(struct Scsi_Host *sh)
2105{
2106 struct ctlr_info *h = shost_to_hba(sh);
2107 unsigned long flags;
2108
2109 /* wait until any scan already in progress is finished. */
2110 while (1) {
2111 spin_lock_irqsave(&h->scan_lock, flags);
2112 if (h->scan_finished)
2113 break;
2114 spin_unlock_irqrestore(&h->scan_lock, flags);
2115 wait_event(h->scan_wait_queue, h->scan_finished);
2116 /* Note: We don't need to worry about a race between this
2117 * thread and driver unload because the midlayer will
2118 * have incremented the reference count, so unload won't
2119 * happen if we're in here.
2120 */
2121 }
2122 h->scan_finished = 0; /* mark scan as in progress */
2123 spin_unlock_irqrestore(&h->scan_lock, flags);
2124
2125 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2126
2127 spin_lock_irqsave(&h->scan_lock, flags);
2128 h->scan_finished = 1; /* mark scan as finished. */
2129 wake_up_all(&h->scan_wait_queue);
2130 spin_unlock_irqrestore(&h->scan_lock, flags);
2131}
2132
2133static int hpsa_scan_finished(struct Scsi_Host *sh,
2134 unsigned long elapsed_time)
2135{
2136 struct ctlr_info *h = shost_to_hba(sh);
2137 unsigned long flags;
2138 int finished;
2139
2140 spin_lock_irqsave(&h->scan_lock, flags);
2141 finished = h->scan_finished;
2142 spin_unlock_irqrestore(&h->scan_lock, flags);
2143 return finished;
2144}
2145
667e23d4
SC		 2146static int hpsa_change_queue_depth(struct scsi_device *sdev,
2147 int qdepth, int reason)
2148{
2149 struct ctlr_info *h = sdev_to_hba(sdev);
2150
2151 if (reason != SCSI_QDEPTH_DEFAULT)
2152 return -ENOTSUPP;
2153
2154 if (qdepth < 1)
2155 qdepth = 1;
2156 else
2157 if (qdepth > h->nr_cmds)
2158 qdepth = h->nr_cmds;
2159 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2160 return sdev->queue_depth;
2161}
2162
edd16368
SC		 2163static void hpsa_unregister_scsi(struct ctlr_info *h)
2164{
2165 /* we are being forcibly unloaded, and may not refuse. */
2166 scsi_remove_host(h->scsi_host);
2167 scsi_host_put(h->scsi_host);
2168 h->scsi_host = NULL;
2169}
2170
2171static int hpsa_register_scsi(struct ctlr_info *h)
2172{
b705690d
SC		 2173 struct Scsi_Host *sh;
2174 int error;
edd16368 2175
b705690d
SC		 2176 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2177 if (sh == NULL)
2178 goto fail;
2179
2180 sh->io_port = 0;
2181 sh->n_io_port = 0;
2182 sh->this_id = -1;
2183 sh->max_channel = 3;
2184 sh->max_cmd_len = MAX_COMMAND_SIZE;
2185 sh->max_lun = HPSA_MAX_LUN;
2186 sh->max_id = HPSA_MAX_LUN;
2187 sh->can_queue = h->nr_cmds;
2188 sh->cmd_per_lun = h->nr_cmds;
2189 sh->sg_tablesize = h->maxsgentries;
2190 h->scsi_host = sh;
2191 sh->hostdata[0] = (unsigned long) h;
2192 sh->irq = h->intr[h->intr_mode];
2193 sh->unique_id = sh->irq;
2194 error = scsi_add_host(sh, &h->pdev->dev);
2195 if (error)
2196 goto fail_host_put;
2197 scsi_scan_host(sh);
2198 return 0;
2199
2200 fail_host_put:
2201 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2202 " failed for controller %d\n", __func__, h->ctlr);
2203 scsi_host_put(sh);
2204 return error;
2205 fail:
2206 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2207 " failed for controller %d\n", __func__, h->ctlr);
2208 return -ENOMEM;
edd16368
SC		 2209}
2210
2211static int wait_for_device_to_become_ready(struct ctlr_info *h,
2212 unsigned char lunaddr[])
2213{
2214 int rc = 0;
2215 int count = 0;
2216 int waittime = 1; /* seconds */
2217 struct CommandList *c;
2218
2219 c = cmd_special_alloc(h);
2220 if (!c) {
2221 dev_warn(&h->pdev->dev, "out of memory in "
2222 "wait_for_device_to_become_ready.\n");
2223 return IO_ERROR;
2224 }
2225
2226 /* Send test unit ready until device ready, or give up. */
2227 while (count < HPSA_TUR_RETRY_LIMIT) {
2228
2229 /* Wait for a bit. do this first, because if we send
2230 * the TUR right away, the reset will just abort it.
2231 */
2232 msleep(1000 * waittime);
2233 count++;
2234
2235 /* Increase wait time with each try, up to a point. */
2236 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2237 waittime = waittime * 2;
2238
2239 /* Send the Test Unit Ready */
2240 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2241 hpsa_scsi_do_simple_cmd_core(h, c);
2242 /* no unmap needed here because no data xfer. */
2243
2244 if (c->err_info->CommandStatus == CMD_SUCCESS)
2245 break;
2246
2247 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2248 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2249 (c->err_info->SenseInfo[2] == NO_SENSE ||
2250 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2251 break;
2252
2253 dev_warn(&h->pdev->dev, "waiting %d secs "
2254 "for device to become ready.\n", waittime);
2255 rc = 1; /* device not ready. */
2256 }
2257
2258 if (rc)
2259 dev_warn(&h->pdev->dev, "giving up on device.\n");
2260 else
2261 dev_warn(&h->pdev->dev, "device is ready.\n");
2262
2263 cmd_special_free(h, c);
2264 return rc;
2265}
2266
2267/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2268 * complaining. Doing a host- or bus-reset can't do anything good here.
2269 */
2270static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2271{
2272 int rc;
2273 struct ctlr_info *h;
2274 struct hpsa_scsi_dev_t *dev;
2275
2276 /* find the controller to which the command to be aborted was sent */
2277 h = sdev_to_hba(scsicmd->device);
2278 if (h == NULL) /* paranoia */
2279 return FAILED;
edd16368
SC		 2280 dev = scsicmd->device->hostdata;
2281 if (!dev) {
2282 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2283 "device lookup failed.\n");
2284 return FAILED;
2285 }
d416b0c7
SC		 2286 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2287 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2288 /* send a reset to the SCSI LUN which the command was sent to */
2289 rc = hpsa_send_reset(h, dev->scsi3addr);
2290 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2291 return SUCCESS;
2292
2293 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2294 return FAILED;
2295}
2296
2297/*
2298 * For operations that cannot sleep, a command block is allocated at init,
2299 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2300 * which ones are free or in use. Lock must be held when calling this.
2301 * cmd_free() is the complement.
2302 */
2303static struct CommandList *cmd_alloc(struct ctlr_info *h)
2304{
2305 struct CommandList *c;
2306 int i;
2307 union u64bit temp64;
2308 dma_addr_t cmd_dma_handle, err_dma_handle;
2309
2310 do {
2311 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2312 if (i == h->nr_cmds)
2313 return NULL;
2314 } while (test_and_set_bit
2315 (i & (BITS_PER_LONG - 1),
2316 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2317 c = h->cmd_pool + i;
2318 memset(c, 0, sizeof(*c));
2319 cmd_dma_handle = h->cmd_pool_dhandle
2320 + i * sizeof(*c);
2321 c->err_info = h->errinfo_pool + i;
2322 memset(c->err_info, 0, sizeof(*c->err_info));
2323 err_dma_handle = h->errinfo_pool_dhandle
2324 + i * sizeof(*c->err_info);
2325 h->nr_allocs++;
2326
2327 c->cmdindex = i;
2328
9e0fc764 2329 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2330 c->busaddr = (u32) cmd_dma_handle;
2331 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2332 c->ErrDesc.Addr.lower = temp64.val32.lower;
2333 c->ErrDesc.Addr.upper = temp64.val32.upper;
2334 c->ErrDesc.Len = sizeof(*c->err_info);
2335
2336 c->h = h;
2337 return c;
2338}
2339
2340/* For operations that can wait for kmalloc to possibly sleep,
2341 * this routine can be called. Lock need not be held to call
2342 * cmd_special_alloc. cmd_special_free() is the complement.
2343 */
2344static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2345{
2346 struct CommandList *c;
2347 union u64bit temp64;
2348 dma_addr_t cmd_dma_handle, err_dma_handle;
2349
2350 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2351 if (c == NULL)
2352 return NULL;
2353 memset(c, 0, sizeof(*c));
2354
2355 c->cmdindex = -1;
2356
2357 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2358 &err_dma_handle);
2359
2360 if (c->err_info == NULL) {
2361 pci_free_consistent(h->pdev,
2362 sizeof(*c), c, cmd_dma_handle);
2363 return NULL;
2364 }
2365 memset(c->err_info, 0, sizeof(*c->err_info));
2366
9e0fc764 2367 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2368 c->busaddr = (u32) cmd_dma_handle;
2369 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2370 c->ErrDesc.Addr.lower = temp64.val32.lower;
2371 c->ErrDesc.Addr.upper = temp64.val32.upper;
2372 c->ErrDesc.Len = sizeof(*c->err_info);
2373
2374 c->h = h;
2375 return c;
2376}
2377
2378static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2379{
2380 int i;
2381
2382 i = c - h->cmd_pool;
2383 clear_bit(i & (BITS_PER_LONG - 1),
2384 h->cmd_pool_bits + (i / BITS_PER_LONG));
2385 h->nr_frees++;
2386}
2387
2388static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2389{
2390 union u64bit temp64;
2391
2392 temp64.val32.lower = c->ErrDesc.Addr.lower;
2393 temp64.val32.upper = c->ErrDesc.Addr.upper;
2394 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2395 c->err_info, (dma_addr_t) temp64.val);
2396 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2397 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2398}
2399
2400#ifdef CONFIG_COMPAT
2401
edd16368
SC		 2402static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2403{
2404 IOCTL32_Command_struct __user *arg32 =
2405 (IOCTL32_Command_struct __user *) arg;
2406 IOCTL_Command_struct arg64;
2407 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2408 int err;
2409 u32 cp;
2410
938abd84 2411 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2412 err = 0;
2413 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2414 sizeof(arg64.LUN_info));
2415 err |= copy_from_user(&arg64.Request, &arg32->Request,
2416 sizeof(arg64.Request));
2417 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2418 sizeof(arg64.error_info));
2419 err |= get_user(arg64.buf_size, &arg32->buf_size);
2420 err |= get_user(cp, &arg32->buf);
2421 arg64.buf = compat_ptr(cp);
2422 err |= copy_to_user(p, &arg64, sizeof(arg64));
2423
2424 if (err)
2425 return -EFAULT;
2426
e39eeaed 2427 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2428 if (err)
2429 return err;
2430 err |= copy_in_user(&arg32->error_info, &p->error_info,
2431 sizeof(arg32->error_info));
2432 if (err)
2433 return -EFAULT;
2434 return err;
2435}
2436
2437static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2438 int cmd, void *arg)
2439{
2440 BIG_IOCTL32_Command_struct __user *arg32 =
2441 (BIG_IOCTL32_Command_struct __user *) arg;
2442 BIG_IOCTL_Command_struct arg64;
2443 BIG_IOCTL_Command_struct __user *p =
2444 compat_alloc_user_space(sizeof(arg64));
2445 int err;
2446 u32 cp;
2447
938abd84 2448 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2449 err = 0;
2450 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2451 sizeof(arg64.LUN_info));
2452 err |= copy_from_user(&arg64.Request, &arg32->Request,
2453 sizeof(arg64.Request));
2454 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2455 sizeof(arg64.error_info));
2456 err |= get_user(arg64.buf_size, &arg32->buf_size);
2457 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2458 err |= get_user(cp, &arg32->buf);
2459 arg64.buf = compat_ptr(cp);
2460 err |= copy_to_user(p, &arg64, sizeof(arg64));
2461
2462 if (err)
2463 return -EFAULT;
2464
e39eeaed 2465 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2466 if (err)
2467 return err;
2468 err |= copy_in_user(&arg32->error_info, &p->error_info,
2469 sizeof(arg32->error_info));
2470 if (err)
2471 return -EFAULT;
2472 return err;
2473}
71fe75a7
SC		 2474
2475static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2476{
2477 switch (cmd) {
2478 case CCISS_GETPCIINFO:
2479 case CCISS_GETINTINFO:
2480 case CCISS_SETINTINFO:
2481 case CCISS_GETNODENAME:
2482 case CCISS_SETNODENAME:
2483 case CCISS_GETHEARTBEAT:
2484 case CCISS_GETBUSTYPES:
2485 case CCISS_GETFIRMVER:
2486 case CCISS_GETDRIVVER:
2487 case CCISS_REVALIDVOLS:
2488 case CCISS_DEREGDISK:
2489 case CCISS_REGNEWDISK:
2490 case CCISS_REGNEWD:
2491 case CCISS_RESCANDISK:
2492 case CCISS_GETLUNINFO:
2493 return hpsa_ioctl(dev, cmd, arg);
2494
2495 case CCISS_PASSTHRU32:
2496 return hpsa_ioctl32_passthru(dev, cmd, arg);
2497 case CCISS_BIG_PASSTHRU32:
2498 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2499
2500 default:
2501 return -ENOIOCTLCMD;
2502 }
2503}
edd16368
SC		 2504#endif
2505
2506static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2507{
2508 struct hpsa_pci_info pciinfo;
2509
2510 if (!argp)
2511 return -EINVAL;
2512 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2513 pciinfo.bus = h->pdev->bus->number;
2514 pciinfo.dev_fn = h->pdev->devfn;
2515 pciinfo.board_id = h->board_id;
2516 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2517 return -EFAULT;
2518 return 0;
2519}
2520
2521static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2522{
2523 DriverVer_type DriverVer;
2524 unsigned char vmaj, vmin, vsubmin;
2525 int rc;
2526
2527 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2528 &vmaj, &vmin, &vsubmin);
2529 if (rc != 3) {
2530 dev_info(&h->pdev->dev, "driver version string '%s' "
2531 "unrecognized.", HPSA_DRIVER_VERSION);
2532 vmaj = 0;
2533 vmin = 0;
2534 vsubmin = 0;
2535 }
2536 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2537 if (!argp)
2538 return -EINVAL;
2539 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2540 return -EFAULT;
2541 return 0;
2542}
2543
2544static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2545{
2546 IOCTL_Command_struct iocommand;
2547 struct CommandList *c;
2548 char *buff = NULL;
2549 union u64bit temp64;
2550
2551 if (!argp)
2552 return -EINVAL;
2553 if (!capable(CAP_SYS_RAWIO))
2554 return -EPERM;
2555 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2556 return -EFAULT;
2557 if ((iocommand.buf_size < 1) &&
2558 (iocommand.Request.Type.Direction != XFER_NONE)) {
2559 return -EINVAL;
2560 }
2561 if (iocommand.buf_size > 0) {
2562 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2563 if (buff == NULL)
2564 return -EFAULT;
b03a7771
SC		 2565 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2566 /* Copy the data into the buffer we created */
2567 if (copy_from_user(buff, iocommand.buf,
2568 iocommand.buf_size)) {
2569 kfree(buff);
2570 return -EFAULT;
2571 }
2572 } else {
2573 memset(buff, 0, iocommand.buf_size);
edd16368 2574 }
b03a7771 2575 }
edd16368
SC		 2576 c = cmd_special_alloc(h);
2577 if (c == NULL) {
2578 kfree(buff);
2579 return -ENOMEM;
2580 }
2581 /* Fill in the command type */
2582 c->cmd_type = CMD_IOCTL_PEND;
2583 /* Fill in Command Header */
2584 c->Header.ReplyQueue = 0; /* unused in simple mode */
2585 if (iocommand.buf_size > 0) { /* buffer to fill */
2586 c->Header.SGList = 1;
2587 c->Header.SGTotal = 1;
2588 } else { /* no buffers to fill */
2589 c->Header.SGList = 0;
2590 c->Header.SGTotal = 0;
2591 }
2592 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2593 /* use the kernel address the cmd block for tag */
2594 c->Header.Tag.lower = c->busaddr;
2595
2596 /* Fill in Request block */
2597 memcpy(&c->Request, &iocommand.Request,
2598 sizeof(c->Request));
2599
2600 /* Fill in the scatter gather information */
2601 if (iocommand.buf_size > 0) {
2602 temp64.val = pci_map_single(h->pdev, buff,
2603 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2604 c->SG[0].Addr.lower = temp64.val32.lower;
2605 c->SG[0].Addr.upper = temp64.val32.upper;
2606 c->SG[0].Len = iocommand.buf_size;
2607 c->SG[0].Ext = 0; /* we are not chaining*/
2608 }
a0c12413 2609 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 2610 if (iocommand.buf_size > 0)
2611 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2612 check_ioctl_unit_attention(h, c);
2613
2614 /* Copy the error information out */
2615 memcpy(&iocommand.error_info, c->err_info,
2616 sizeof(iocommand.error_info));
2617 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2618 kfree(buff);
2619 cmd_special_free(h, c);
2620 return -EFAULT;
2621 }
b03a7771
SC		 2622 if (iocommand.Request.Type.Direction == XFER_READ &&
2623 iocommand.buf_size > 0) {
edd16368
SC		 2624 /* Copy the data out of the buffer we created */
2625 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2626 kfree(buff);
2627 cmd_special_free(h, c);
2628 return -EFAULT;
2629 }
2630 }
2631 kfree(buff);
2632 cmd_special_free(h, c);
2633 return 0;
2634}
2635
2636static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2637{
2638 BIG_IOCTL_Command_struct *ioc;
2639 struct CommandList *c;
2640 unsigned char **buff = NULL;
2641 int *buff_size = NULL;
2642 union u64bit temp64;
2643 BYTE sg_used = 0;
2644 int status = 0;
2645 int i;
01a02ffc
SC		 2646 u32 left;
2647 u32 sz;
edd16368
SC		 2648 BYTE __user *data_ptr;
2649
2650 if (!argp)
2651 return -EINVAL;
2652 if (!capable(CAP_SYS_RAWIO))
2653 return -EPERM;
2654 ioc = (BIG_IOCTL_Command_struct *)
2655 kmalloc(sizeof(*ioc), GFP_KERNEL);
2656 if (!ioc) {
2657 status = -ENOMEM;
2658 goto cleanup1;
2659 }
2660 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2661 status = -EFAULT;
2662 goto cleanup1;
2663 }
2664 if ((ioc->buf_size < 1) &&
2665 (ioc->Request.Type.Direction != XFER_NONE)) {
2666 status = -EINVAL;
2667 goto cleanup1;
2668 }
2669 /* Check kmalloc limits using all SGs */
2670 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2671 status = -EINVAL;
2672 goto cleanup1;
2673 }
d66ae08b 2674 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 2675 status = -EINVAL;
2676 goto cleanup1;
2677 }
d66ae08b 2678 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 2679 if (!buff) {
2680 status = -ENOMEM;
2681 goto cleanup1;
2682 }
d66ae08b 2683 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 2684 if (!buff_size) {
2685 status = -ENOMEM;
2686 goto cleanup1;
2687 }
2688 left = ioc->buf_size;
2689 data_ptr = ioc->buf;
2690 while (left) {
2691 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2692 buff_size[sg_used] = sz;
2693 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2694 if (buff[sg_used] == NULL) {
2695 status = -ENOMEM;
2696 goto cleanup1;
2697 }
2698 if (ioc->Request.Type.Direction == XFER_WRITE) {
2699 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2700 status = -ENOMEM;
2701 goto cleanup1;
2702 }
2703 } else
2704 memset(buff[sg_used], 0, sz);
2705 left -= sz;
2706 data_ptr += sz;
2707 sg_used++;
2708 }
2709 c = cmd_special_alloc(h);
2710 if (c == NULL) {
2711 status = -ENOMEM;
2712 goto cleanup1;
2713 }
2714 c->cmd_type = CMD_IOCTL_PEND;
2715 c->Header.ReplyQueue = 0;
b03a7771 2716 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 2717 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2718 c->Header.Tag.lower = c->busaddr;
2719 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2720 if (ioc->buf_size > 0) {
2721 int i;
2722 for (i = 0; i < sg_used; i++) {
2723 temp64.val = pci_map_single(h->pdev, buff[i],
2724 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2725 c->SG[i].Addr.lower = temp64.val32.lower;
2726 c->SG[i].Addr.upper = temp64.val32.upper;
2727 c->SG[i].Len = buff_size[i];
2728 /* we are not chaining */
2729 c->SG[i].Ext = 0;
2730 }
2731 }
a0c12413 2732 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 2733 if (sg_used)
2734 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2735 check_ioctl_unit_attention(h, c);
2736 /* Copy the error information out */
2737 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2738 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2739 cmd_special_free(h, c);
2740 status = -EFAULT;
2741 goto cleanup1;
2742 }
b03a7771 2743 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 2744 /* Copy the data out of the buffer we created */
2745 BYTE __user *ptr = ioc->buf;
2746 for (i = 0; i < sg_used; i++) {
2747 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2748 cmd_special_free(h, c);
2749 status = -EFAULT;
2750 goto cleanup1;
2751 }
2752 ptr += buff_size[i];
2753 }
2754 }
2755 cmd_special_free(h, c);
2756 status = 0;
2757cleanup1:
2758 if (buff) {
2759 for (i = 0; i < sg_used; i++)
2760 kfree(buff[i]);
2761 kfree(buff);
2762 }
2763 kfree(buff_size);
2764 kfree(ioc);
2765 return status;
2766}
2767
2768static void check_ioctl_unit_attention(struct ctlr_info *h,
2769 struct CommandList *c)
2770{
2771 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2772 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2773 (void) check_for_unit_attention(h, c);
2774}
2775/*
2776 * ioctl
2777 */
2778static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2779{
2780 struct ctlr_info *h;
2781 void __user *argp = (void __user *)arg;
2782
2783 h = sdev_to_hba(dev);
2784
2785 switch (cmd) {
2786 case CCISS_DEREGDISK:
2787 case CCISS_REGNEWDISK:
2788 case CCISS_REGNEWD:
a08a8471 2789 hpsa_scan_start(h->scsi_host);
edd16368
SC		 2790 return 0;
2791 case CCISS_GETPCIINFO:
2792 return hpsa_getpciinfo_ioctl(h, argp);
2793 case CCISS_GETDRIVVER:
2794 return hpsa_getdrivver_ioctl(h, argp);
2795 case CCISS_PASSTHRU:
2796 return hpsa_passthru_ioctl(h, argp);
2797 case CCISS_BIG_PASSTHRU:
2798 return hpsa_big_passthru_ioctl(h, argp);
2799 default:
2800 return -ENOTTY;
2801 }
2802}
2803
64670ac8
SC		 2804static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2805 unsigned char *scsi3addr, u8 reset_type)
2806{
2807 struct CommandList *c;
2808
2809 c = cmd_alloc(h);
2810 if (!c)
2811 return -ENOMEM;
2812 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2813 RAID_CTLR_LUNID, TYPE_MSG);
2814 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2815 c->waiting = NULL;
2816 enqueue_cmd_and_start_io(h, c);
2817 /* Don't wait for completion, the reset won't complete. Don't free
2818 * the command either. This is the last command we will send before
2819 * re-initializing everything, so it doesn't matter and won't leak.
2820 */
2821 return 0;
2822}
2823
01a02ffc
SC		 2824static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2825 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 2826 int cmd_type)
2827{
2828 int pci_dir = XFER_NONE;
2829
2830 c->cmd_type = CMD_IOCTL_PEND;
2831 c->Header.ReplyQueue = 0;
2832 if (buff != NULL && size > 0) {
2833 c->Header.SGList = 1;
2834 c->Header.SGTotal = 1;
2835 } else {
2836 c->Header.SGList = 0;
2837 c->Header.SGTotal = 0;
2838 }
2839 c->Header.Tag.lower = c->busaddr;
2840 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2841
2842 c->Request.Type.Type = cmd_type;
2843 if (cmd_type == TYPE_CMD) {
2844 switch (cmd) {
2845 case HPSA_INQUIRY:
2846 /* are we trying to read a vital product page */
2847 if (page_code != 0) {
2848 c->Request.CDB[1] = 0x01;
2849 c->Request.CDB[2] = page_code;
2850 }
2851 c->Request.CDBLen = 6;
2852 c->Request.Type.Attribute = ATTR_SIMPLE;
2853 c->Request.Type.Direction = XFER_READ;
2854 c->Request.Timeout = 0;
2855 c->Request.CDB[0] = HPSA_INQUIRY;
2856 c->Request.CDB[4] = size & 0xFF;
2857 break;
2858 case HPSA_REPORT_LOG:
2859 case HPSA_REPORT_PHYS:
2860 /* Talking to controller so It's a physical command
2861 mode = 00 target = 0. Nothing to write.
2862 */
2863 c->Request.CDBLen = 12;
2864 c->Request.Type.Attribute = ATTR_SIMPLE;
2865 c->Request.Type.Direction = XFER_READ;
2866 c->Request.Timeout = 0;
2867 c->Request.CDB[0] = cmd;
2868 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2869 c->Request.CDB[7] = (size >> 16) & 0xFF;
2870 c->Request.CDB[8] = (size >> 8) & 0xFF;
2871 c->Request.CDB[9] = size & 0xFF;
2872 break;
edd16368
SC		 2873 case HPSA_CACHE_FLUSH:
2874 c->Request.CDBLen = 12;
2875 c->Request.Type.Attribute = ATTR_SIMPLE;
2876 c->Request.Type.Direction = XFER_WRITE;
2877 c->Request.Timeout = 0;
2878 c->Request.CDB[0] = BMIC_WRITE;
2879 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 2880 c->Request.CDB[7] = (size >> 8) & 0xFF;
2881 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 2882 break;
2883 case TEST_UNIT_READY:
2884 c->Request.CDBLen = 6;
2885 c->Request.Type.Attribute = ATTR_SIMPLE;
2886 c->Request.Type.Direction = XFER_NONE;
2887 c->Request.Timeout = 0;
2888 break;
2889 default:
2890 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2891 BUG();
2892 return;
2893 }
2894 } else if (cmd_type == TYPE_MSG) {
2895 switch (cmd) {
2896
2897 case HPSA_DEVICE_RESET_MSG:
2898 c->Request.CDBLen = 16;
2899 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2900 c->Request.Type.Attribute = ATTR_SIMPLE;
2901 c->Request.Type.Direction = XFER_NONE;
2902 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 2903 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2904 c->Request.CDB[0] = cmd;
edd16368
SC		 2905 c->Request.CDB[1] = 0x03; /* Reset target above */
2906 /* If bytes 4-7 are zero, it means reset the */
2907 /* LunID device */
2908 c->Request.CDB[4] = 0x00;
2909 c->Request.CDB[5] = 0x00;
2910 c->Request.CDB[6] = 0x00;
2911 c->Request.CDB[7] = 0x00;
2912 break;
2913
2914 default:
2915 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2916 cmd);
2917 BUG();
2918 }
2919 } else {
2920 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2921 BUG();
2922 }
2923
2924 switch (c->Request.Type.Direction) {
2925 case XFER_READ:
2926 pci_dir = PCI_DMA_FROMDEVICE;
2927 break;
2928 case XFER_WRITE:
2929 pci_dir = PCI_DMA_TODEVICE;
2930 break;
2931 case XFER_NONE:
2932 pci_dir = PCI_DMA_NONE;
2933 break;
2934 default:
2935 pci_dir = PCI_DMA_BIDIRECTIONAL;
2936 }
2937
2938 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2939
2940 return;
2941}
2942
2943/*
2944 * Map (physical) PCI mem into (virtual) kernel space
2945 */
2946static void __iomem *remap_pci_mem(ulong base, ulong size)
2947{
2948 ulong page_base = ((ulong) base) & PAGE_MASK;
2949 ulong page_offs = ((ulong) base) - page_base;
2950 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2951
2952 return page_remapped ? (page_remapped + page_offs) : NULL;
2953}
2954
2955/* Takes cmds off the submission queue and sends them to the hardware,
2956 * then puts them on the queue of cmds waiting for completion.
2957 */
2958static void start_io(struct ctlr_info *h)
2959{
2960 struct CommandList *c;
2961
9e0fc764
SC		 2962 while (!list_empty(&h->reqQ)) {
2963 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 2964 /* can't do anything if fifo is full */
2965 if ((h->access.fifo_full(h))) {
2966 dev_warn(&h->pdev->dev, "fifo full\n");
2967 break;
2968 }
2969
2970 /* Get the first entry from the Request Q */
2971 removeQ(c);
2972 h->Qdepth--;
2973
2974 /* Tell the controller execute command */
2975 h->access.submit_command(h, c);
2976
2977 /* Put job onto the completed Q */
2978 addQ(&h->cmpQ, c);
2979 }
2980}
2981
2982static inline unsigned long get_next_completion(struct ctlr_info *h)
2983{
2984 return h->access.command_completed(h);
2985}
2986
900c5440 2987static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 2988{
2989 return h->access.intr_pending(h);
2990}
2991
2992static inline long interrupt_not_for_us(struct ctlr_info *h)
2993{
10f66018
SC		 2994 return (h->access.intr_pending(h) == 0) ||
2995 (h->interrupts_enabled == 0);
edd16368
SC		 2996}
2997
01a02ffc
SC		 2998static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2999 u32 raw_tag)
edd16368
SC		 3000{
3001 if (unlikely(tag_index >= h->nr_cmds)) {
3002 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3003 return 1;
3004 }
3005 return 0;
3006}
3007
01a02ffc 3008static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC		 3009{
3010 removeQ(c);
3011 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3012 complete_scsi_command(c);
edd16368
SC		 3013 else if (c->cmd_type == CMD_IOCTL_PEND)
3014 complete(c->waiting);
3015}
3016
a104c99f
SC		 3017static inline u32 hpsa_tag_contains_index(u32 tag)
3018{
a104c99f
SC		 3019 return tag & DIRECT_LOOKUP_BIT;
3020}
3021
3022static inline u32 hpsa_tag_to_index(u32 tag)
3023{
a104c99f
SC		 3024 return tag >> DIRECT_LOOKUP_SHIFT;
3025}
3026
a9a3a273
SC		 3027
3028static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3029{
a9a3a273
SC		 3030#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3031#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3032 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3033 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3034 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3035}
3036
303932fd
DB		 3037/* process completion of an indexed ("direct lookup") command */
3038static inline u32 process_indexed_cmd(struct ctlr_info *h,
3039 u32 raw_tag)
3040{
3041 u32 tag_index;
3042 struct CommandList *c;
3043
3044 tag_index = hpsa_tag_to_index(raw_tag);
3045 if (bad_tag(h, tag_index, raw_tag))
3046 return next_command(h);
3047 c = h->cmd_pool + tag_index;
3048 finish_cmd(c, raw_tag);
3049 return next_command(h);
3050}
3051
3052/* process completion of a non-indexed command */
3053static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3054 u32 raw_tag)
3055{
3056 u32 tag;
3057 struct CommandList *c = NULL;
303932fd 3058
a9a3a273 3059 tag = hpsa_tag_discard_error_bits(h, raw_tag);
9e0fc764 3060 list_for_each_entry(c, &h->cmpQ, list) {
303932fd
DB		 3061 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3062 finish_cmd(c, raw_tag);
3063 return next_command(h);
3064 }
3065 }
3066 bad_tag(h, h->nr_cmds + 1, raw_tag);
3067 return next_command(h);
3068}
3069
64670ac8
SC		 3070/* Some controllers, like p400, will give us one interrupt
3071 * after a soft reset, even if we turned interrupts off.
3072 * Only need to check for this in the hpsa_xxx_discard_completions
3073 * functions.
3074 */
3075static int ignore_bogus_interrupt(struct ctlr_info *h)
3076{
3077 if (likely(!reset_devices))
3078 return 0;
3079
3080 if (likely(h->interrupts_enabled))
3081 return 0;
3082
3083 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3084 "(known firmware bug.) Ignoring.\n");
3085
3086 return 1;
3087}
3088
3089static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3090{
3091 struct ctlr_info *h = dev_id;
3092 unsigned long flags;
3093 u32 raw_tag;
3094
3095 if (ignore_bogus_interrupt(h))
3096 return IRQ_NONE;
3097
3098 if (interrupt_not_for_us(h))
3099 return IRQ_NONE;
3100 spin_lock_irqsave(&h->lock, flags);
a0c12413 3101 h->last_intr_timestamp = get_jiffies_64();
64670ac8
SC		 3102 while (interrupt_pending(h)) {
3103 raw_tag = get_next_completion(h);
3104 while (raw_tag != FIFO_EMPTY)
3105 raw_tag = next_command(h);
3106 }
3107 spin_unlock_irqrestore(&h->lock, flags);
3108 return IRQ_HANDLED;
3109}
3110
3111static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3112{
3113 struct ctlr_info *h = dev_id;
3114 unsigned long flags;
3115 u32 raw_tag;
3116
3117 if (ignore_bogus_interrupt(h))
3118 return IRQ_NONE;
3119
3120 spin_lock_irqsave(&h->lock, flags);
a0c12413 3121 h->last_intr_timestamp = get_jiffies_64();
64670ac8
SC		 3122 raw_tag = get_next_completion(h);
3123 while (raw_tag != FIFO_EMPTY)
3124 raw_tag = next_command(h);
3125 spin_unlock_irqrestore(&h->lock, flags);
3126 return IRQ_HANDLED;
3127}
3128
10f66018 3129static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 3130{
3131 struct ctlr_info *h = dev_id;
edd16368 3132 unsigned long flags;
303932fd 3133 u32 raw_tag;
edd16368
SC		 3134
3135 if (interrupt_not_for_us(h))
3136 return IRQ_NONE;
10f66018 3137 spin_lock_irqsave(&h->lock, flags);
a0c12413 3138 h->last_intr_timestamp = get_jiffies_64();
10f66018
SC		 3139 while (interrupt_pending(h)) {
3140 raw_tag = get_next_completion(h);
3141 while (raw_tag != FIFO_EMPTY) {
3142 if (hpsa_tag_contains_index(raw_tag))
3143 raw_tag = process_indexed_cmd(h, raw_tag);
3144 else
3145 raw_tag = process_nonindexed_cmd(h, raw_tag);
3146 }
3147 }
3148 spin_unlock_irqrestore(&h->lock, flags);
3149 return IRQ_HANDLED;
3150}
3151
3152static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3153{
3154 struct ctlr_info *h = dev_id;
3155 unsigned long flags;
3156 u32 raw_tag;
3157
edd16368 3158 spin_lock_irqsave(&h->lock, flags);
a0c12413 3159 h->last_intr_timestamp = get_jiffies_64();
303932fd
DB		 3160 raw_tag = get_next_completion(h);
3161 while (raw_tag != FIFO_EMPTY) {
3162 if (hpsa_tag_contains_index(raw_tag))
3163 raw_tag = process_indexed_cmd(h, raw_tag);
3164 else
3165 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC		 3166 }
3167 spin_unlock_irqrestore(&h->lock, flags);
3168 return IRQ_HANDLED;
3169}
3170
a9a3a273
SC		 3171/* Send a message CDB to the firmware. Careful, this only works
3172 * in simple mode, not performant mode due to the tag lookup.
3173 * We only ever use this immediately after a controller reset.
3174 */
edd16368
SC		 3175static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3176 unsigned char type)
3177{
3178 struct Command {
3179 struct CommandListHeader CommandHeader;
3180 struct RequestBlock Request;
3181 struct ErrDescriptor ErrorDescriptor;
3182 };
3183 struct Command *cmd;
3184 static const size_t cmd_sz = sizeof(*cmd) +
3185 sizeof(cmd->ErrorDescriptor);
3186 dma_addr_t paddr64;
3187 uint32_t paddr32, tag;
3188 void __iomem *vaddr;
3189 int i, err;
3190
3191 vaddr = pci_ioremap_bar(pdev, 0);
3192 if (vaddr == NULL)
3193 return -ENOMEM;
3194
3195 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3196 * CCISS commands, so they must be allocated from the lower 4GiB of
3197 * memory.
3198 */
3199 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3200 if (err) {
3201 iounmap(vaddr);
3202 return -ENOMEM;
3203 }
3204
3205 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3206 if (cmd == NULL) {
3207 iounmap(vaddr);
3208 return -ENOMEM;
3209 }
3210
3211 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3212 * although there's no guarantee, we assume that the address is at
3213 * least 4-byte aligned (most likely, it's page-aligned).
3214 */
3215 paddr32 = paddr64;
3216
3217 cmd->CommandHeader.ReplyQueue = 0;
3218 cmd->CommandHeader.SGList = 0;
3219 cmd->CommandHeader.SGTotal = 0;
3220 cmd->CommandHeader.Tag.lower = paddr32;
3221 cmd->CommandHeader.Tag.upper = 0;
3222 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3223
3224 cmd->Request.CDBLen = 16;
3225 cmd->Request.Type.Type = TYPE_MSG;
3226 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3227 cmd->Request.Type.Direction = XFER_NONE;
3228 cmd->Request.Timeout = 0; /* Don't time out */
3229 cmd->Request.CDB[0] = opcode;
3230 cmd->Request.CDB[1] = type;
3231 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3232 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3233 cmd->ErrorDescriptor.Addr.upper = 0;
3234 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3235
3236 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3237
3238 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3239 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3240 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3241 break;
3242 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3243 }
3244
3245 iounmap(vaddr);
3246
3247 /* we leak the DMA buffer here ... no choice since the controller could
3248 * still complete the command.
3249 */
3250 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3251 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3252 opcode, type);
3253 return -ETIMEDOUT;
3254 }
3255
3256 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3257
3258 if (tag & HPSA_ERROR_BIT) {
3259 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3260 opcode, type);
3261 return -EIO;
3262 }
3263
3264 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3265 opcode, type);
3266 return 0;
3267}
3268
edd16368
SC		 3269#define hpsa_noop(p) hpsa_message(p, 3, 0)
3270
1df8552a 3271static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3272 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3273{
3274 u16 pmcsr;
3275 int pos;
3276
3277 if (use_doorbell) {
3278 /* For everything after the P600, the PCI power state method
3279 * of resetting the controller doesn't work, so we have this
3280 * other way using the doorbell register.
3281 */
3282 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3283 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3284 } else { /* Try to do it the PCI power state way */
3285
3286 /* Quoting from the Open CISS Specification: "The Power
3287 * Management Control/Status Register (CSR) controls the power
3288 * state of the device. The normal operating state is D0,
3289 * CSR=00h. The software off state is D3, CSR=03h. To reset
3290 * the controller, place the interface device in D3 then to D0,
3291 * this causes a secondary PCI reset which will reset the
3292 * controller." */
3293
3294 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3295 if (pos == 0) {
3296 dev_err(&pdev->dev,
3297 "hpsa_reset_controller: "
3298 "PCI PM not supported\n");
3299 return -ENODEV;
3300 }
3301 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3302 /* enter the D3hot power management state */
3303 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3304 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3305 pmcsr |= PCI_D3hot;
3306 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3307
3308 msleep(500);
3309
3310 /* enter the D0 power management state */
3311 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3312 pmcsr |= PCI_D0;
3313 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3314
3315 /*
3316 * The P600 requires a small delay when changing states.
3317 * Otherwise we may think the board did not reset and we bail.
3318 * This for kdump only and is particular to the P600.
3319 */
3320 msleep(500);
1df8552a
SC		 3321 }
3322 return 0;
3323}
3324
580ada3c
SC		 3325static __devinit void init_driver_version(char *driver_version, int len)
3326{
3327 memset(driver_version, 0, len);
f79cfec6 3328 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3329}
3330
3331static __devinit int write_driver_ver_to_cfgtable(
3332 struct CfgTable __iomem *cfgtable)
3333{
3334 char *driver_version;
3335 int i, size = sizeof(cfgtable->driver_version);
3336
3337 driver_version = kmalloc(size, GFP_KERNEL);
3338 if (!driver_version)
3339 return -ENOMEM;
3340
3341 init_driver_version(driver_version, size);
3342 for (i = 0; i < size; i++)
3343 writeb(driver_version[i], &cfgtable->driver_version[i]);
3344 kfree(driver_version);
3345 return 0;
3346}
3347
3348static __devinit void read_driver_ver_from_cfgtable(
3349 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3350{
3351 int i;
3352
3353 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3354 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3355}
3356
3357static __devinit int controller_reset_failed(
3358 struct CfgTable __iomem *cfgtable)
3359{
3360
3361 char *driver_ver, *old_driver_ver;
3362 int rc, size = sizeof(cfgtable->driver_version);
3363
3364 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3365 if (!old_driver_ver)
3366 return -ENOMEM;
3367 driver_ver = old_driver_ver + size;
3368
3369 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3370 * should have been changed, otherwise we know the reset failed.
3371 */
3372 init_driver_version(old_driver_ver, size);
3373 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3374 rc = !memcmp(driver_ver, old_driver_ver, size);
3375 kfree(old_driver_ver);
3376 return rc;
3377}
edd16368 3378/* This does a hard reset of the controller using PCI power management
1df8552a 3379 * states or the using the doorbell register.
edd16368 3380 */
1df8552a 3381static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3382{
1df8552a
SC		 3383 u64 cfg_offset;
3384 u32 cfg_base_addr;
3385 u64 cfg_base_addr_index;
3386 void __iomem *vaddr;
3387 unsigned long paddr;
580ada3c 3388 u32 misc_fw_support;
270d05de 3389 int rc;
1df8552a 3390 struct CfgTable __iomem *cfgtable;
cf0b08d0 3391 u32 use_doorbell;
18867659 3392 u32 board_id;
270d05de 3393 u16 command_register;
edd16368 3394
1df8552a
SC		 3395 /* For controllers as old as the P600, this is very nearly
3396 * the same thing as
edd16368
SC		 3397 *
3398 * pci_save_state(pci_dev);
3399 * pci_set_power_state(pci_dev, PCI_D3hot);
3400 * pci_set_power_state(pci_dev, PCI_D0);
3401 * pci_restore_state(pci_dev);
3402 *
1df8552a
SC		 3403 * For controllers newer than the P600, the pci power state
3404 * method of resetting doesn't work so we have another way
3405 * using the doorbell register.
edd16368 3406 */
18867659 3407
25c1e56a 3408 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3409 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3410 dev_warn(&pdev->dev, "Not resetting device.\n");
3411 return -ENODEV;
3412 }
46380786
SC		 3413
3414 /* if controller is soft- but not hard resettable... */
3415 if (!ctlr_is_hard_resettable(board_id))
3416 return -ENOTSUPP; /* try soft reset later. */
18867659 3417
270d05de
SC		 3418 /* Save the PCI command register */
3419 pci_read_config_word(pdev, 4, &command_register);
3420 /* Turn the board off. This is so that later pci_restore_state()
3421 * won't turn the board on before the rest of config space is ready.
3422 */
3423 pci_disable_device(pdev);
3424 pci_save_state(pdev);
edd16368 3425
1df8552a
SC		 3426 /* find the first memory BAR, so we can find the cfg table */
3427 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3428 if (rc)
3429 return rc;
3430 vaddr = remap_pci_mem(paddr, 0x250);
3431 if (!vaddr)
3432 return -ENOMEM;
edd16368 3433
1df8552a
SC		 3434 /* find cfgtable in order to check if reset via doorbell is supported */
3435 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3436 &cfg_base_addr_index, &cfg_offset);
3437 if (rc)
3438 goto unmap_vaddr;
3439 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3440 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3441 if (!cfgtable) {
3442 rc = -ENOMEM;
3443 goto unmap_vaddr;
3444 }
580ada3c
SC		 3445 rc = write_driver_ver_to_cfgtable(cfgtable);
3446 if (rc)
3447 goto unmap_vaddr;
edd16368 3448
cf0b08d0
SC		 3449 /* If reset via doorbell register is supported, use that.
3450 * There are two such methods. Favor the newest method.
3451 */
1df8552a 3452 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3453 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3454 if (use_doorbell) {
3455 use_doorbell = DOORBELL_CTLR_RESET2;
3456 } else {
3457 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3458 if (use_doorbell) {
fba63097
MM		 3459 dev_warn(&pdev->dev, "Soft reset not supported. "
3460 "Firmware update is required.\n");
64670ac8 3461 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3462 goto unmap_cfgtable;
3463 }
3464 }
edd16368 3465
1df8552a
SC		 3466 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3467 if (rc)
3468 goto unmap_cfgtable;
edd16368 3469
270d05de
SC		 3470 pci_restore_state(pdev);
3471 rc = pci_enable_device(pdev);
3472 if (rc) {
3473 dev_warn(&pdev->dev, "failed to enable device.\n");
3474 goto unmap_cfgtable;
edd16368 3475 }
270d05de 3476 pci_write_config_word(pdev, 4, command_register);
edd16368 3477
1df8552a
SC		 3478 /* Some devices (notably the HP Smart Array 5i Controller)
3479 need a little pause here */
3480 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3481
fe5389c8 3482 /* Wait for board to become not ready, then ready. */
2b870cb3 3483 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3484 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3485 if (rc) {
fe5389c8 3486 dev_warn(&pdev->dev,
64670ac8
SC		 3487 "failed waiting for board to reset."
3488 " Will try soft reset.\n");
3489 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3490 goto unmap_cfgtable;
3491 }
fe5389c8
SC		 3492 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3493 if (rc) {
3494 dev_warn(&pdev->dev,
64670ac8
SC		 3495 "failed waiting for board to become ready "
3496 "after hard reset\n");
fe5389c8
SC		 3497 goto unmap_cfgtable;
3498 }
fe5389c8 3499
580ada3c
SC		 3500 rc = controller_reset_failed(vaddr);
3501 if (rc < 0)
3502 goto unmap_cfgtable;
3503 if (rc) {
64670ac8
SC		 3504 dev_warn(&pdev->dev, "Unable to successfully reset "
3505 "controller. Will try soft reset.\n");
3506 rc = -ENOTSUPP;
580ada3c 3507 } else {
64670ac8 3508 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3509 }
3510
3511unmap_cfgtable:
3512 iounmap(cfgtable);
3513
3514unmap_vaddr:
3515 iounmap(vaddr);
3516 return rc;
edd16368
SC		 3517}
3518
3519/*
3520 * We cannot read the structure directly, for portability we must use
3521 * the io functions.
3522 * This is for debug only.
3523 */
edd16368
SC		 3524static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3525{
58f8665c 3526#ifdef HPSA_DEBUG
edd16368
SC		 3527 int i;
3528 char temp_name[17];
3529
3530 dev_info(dev, "Controller Configuration information\n");
3531 dev_info(dev, "------------------------------------\n");
3532 for (i = 0; i < 4; i++)
3533 temp_name[i] = readb(&(tb->Signature[i]));
3534 temp_name[4] = '\0';
3535 dev_info(dev, " Signature = %s\n", temp_name);
3536 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3537 dev_info(dev, " Transport methods supported = 0x%x\n",
3538 readl(&(tb->TransportSupport)));
3539 dev_info(dev, " Transport methods active = 0x%x\n",
3540 readl(&(tb->TransportActive)));
3541 dev_info(dev, " Requested transport Method = 0x%x\n",
3542 readl(&(tb->HostWrite.TransportRequest)));
3543 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3544 readl(&(tb->HostWrite.CoalIntDelay)));
3545 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3546 readl(&(tb->HostWrite.CoalIntCount)));
3547 dev_info(dev, " Max outstanding commands = 0x%d\n",
3548 readl(&(tb->CmdsOutMax)));
3549 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3550 for (i = 0; i < 16; i++)
3551 temp_name[i] = readb(&(tb->ServerName[i]));
3552 temp_name[16] = '\0';
3553 dev_info(dev, " Server Name = %s\n", temp_name);
3554 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3555 readl(&(tb->HeartBeat)));
edd16368 3556#endif /* HPSA_DEBUG */
58f8665c 3557}
edd16368
SC		 3558
3559static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3560{
3561 int i, offset, mem_type, bar_type;
3562
3563 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3564 return 0;
3565 offset = 0;
3566 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3567 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3568 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3569 offset += 4;
3570 else {
3571 mem_type = pci_resource_flags(pdev, i) &
3572 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3573 switch (mem_type) {
3574 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3575 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3576 offset += 4; /* 32 bit */
3577 break;
3578 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3579 offset += 8;
3580 break;
3581 default: /* reserved in PCI 2.2 */
3582 dev_warn(&pdev->dev,
3583 "base address is invalid\n");
3584 return -1;
3585 break;
3586 }
3587 }
3588 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3589 return i + 1;
3590 }
3591 return -1;
3592}
3593
3594/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3595 * controllers that are capable. If not, we use IO-APIC mode.
3596 */
3597
6b3f4c52 3598static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3599{
3600#ifdef CONFIG_PCI_MSI
3601 int err;
3602 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3603 {0, 2}, {0, 3}
3604 };
3605
3606 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3607 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3608 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3609 goto default_int_mode;
55c06c71
SC		 3610 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3611 dev_info(&h->pdev->dev, "MSIX\n");
3612 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3613 if (!err) {
3614 h->intr[0] = hpsa_msix_entries[0].vector;
3615 h->intr[1] = hpsa_msix_entries[1].vector;
3616 h->intr[2] = hpsa_msix_entries[2].vector;
3617 h->intr[3] = hpsa_msix_entries[3].vector;
3618 h->msix_vector = 1;
3619 return;
3620 }
3621 if (err > 0) {
55c06c71 3622 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3623 "available\n", err);
3624 goto default_int_mode;
3625 } else {
55c06c71 3626 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3627 err);
3628 goto default_int_mode;
3629 }
3630 }
55c06c71
SC		 3631 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3632 dev_info(&h->pdev->dev, "MSI\n");
3633 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3634 h->msi_vector = 1;
3635 else
55c06c71 3636 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3637 }
3638default_int_mode:
3639#endif /* CONFIG_PCI_MSI */
3640 /* if we get here we're going to use the default interrupt mode */
a9a3a273 3641 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 3642}
3643
e5c880d1
SC		 3644static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3645{
3646 int i;
3647 u32 subsystem_vendor_id, subsystem_device_id;
3648
3649 subsystem_vendor_id = pdev->subsystem_vendor;
3650 subsystem_device_id = pdev->subsystem_device;
3651 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3652 subsystem_vendor_id;
3653
3654 for (i = 0; i < ARRAY_SIZE(products); i++)
3655 if (*board_id == products[i].board_id)
3656 return i;
3657
6798cc0a
SC		 3658 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3659 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3660 !hpsa_allow_any) {
e5c880d1
SC		 3661 dev_warn(&pdev->dev, "unrecognized board ID: "
3662 "0x%08x, ignoring.\n", *board_id);
3663 return -ENODEV;
3664 }
3665 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3666}
3667
85bdbabb
SC		 3668static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3669{
3670 u16 command;
3671
3672 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3673 return ((command & PCI_COMMAND_MEMORY) == 0);
3674}
3675
12d2cd47 3676static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 3677 unsigned long *memory_bar)
3678{
3679 int i;
3680
3681 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3682 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3683 /* addressing mode bits already removed */
12d2cd47
SC		 3684 *memory_bar = pci_resource_start(pdev, i);
3685 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 3686 *memory_bar);
3687 return 0;
3688 }
12d2cd47 3689 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 3690 return -ENODEV;
3691}
3692
fe5389c8
SC		 3693static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3694 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 3695{
fe5389c8 3696 int i, iterations;
2c4c8c8b 3697 u32 scratchpad;
fe5389c8
SC		 3698 if (wait_for_ready)
3699 iterations = HPSA_BOARD_READY_ITERATIONS;
3700 else
3701 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 3702
fe5389c8
SC		 3703 for (i = 0; i < iterations; i++) {
3704 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3705 if (wait_for_ready) {
3706 if (scratchpad == HPSA_FIRMWARE_READY)
3707 return 0;
3708 } else {
3709 if (scratchpad != HPSA_FIRMWARE_READY)
3710 return 0;
3711 }
2c4c8c8b
SC		 3712 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3713 }
fe5389c8 3714 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 3715 return -ENODEV;
3716}
3717
a51fd47f
SC		 3718static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3719 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3720 u64 *cfg_offset)
3721{
3722 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3723 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3724 *cfg_base_addr &= (u32) 0x0000ffff;
3725 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3726 if (*cfg_base_addr_index == -1) {
3727 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3728 return -ENODEV;
3729 }
3730 return 0;
3731}
3732
77c4495c 3733static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3734{
01a02ffc
SC		 3735 u64 cfg_offset;
3736 u32 cfg_base_addr;
3737 u64 cfg_base_addr_index;
303932fd 3738 u32 trans_offset;
a51fd47f 3739 int rc;
77c4495c 3740
a51fd47f
SC		 3741 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3742 &cfg_base_addr_index, &cfg_offset);
3743 if (rc)
3744 return rc;
77c4495c 3745 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3746 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 3747 if (!h->cfgtable)
3748 return -ENOMEM;
580ada3c
SC		 3749 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3750 if (rc)
3751 return rc;
77c4495c 3752 /* Find performant mode table. */
a51fd47f 3753 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 3754 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3755 cfg_base_addr_index)+cfg_offset+trans_offset,
3756 sizeof(*h->transtable));
3757 if (!h->transtable)
3758 return -ENOMEM;
3759 return 0;
3760}
3761
cba3d38b
SC		 3762static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3763{
3764 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 3765
3766 /* Limit commands in memory limited kdump scenario. */
3767 if (reset_devices && h->max_commands > 32)
3768 h->max_commands = 32;
3769
cba3d38b
SC		 3770 if (h->max_commands < 16) {
3771 dev_warn(&h->pdev->dev, "Controller reports "
3772 "max supported commands of %d, an obvious lie. "
3773 "Using 16. Ensure that firmware is up to date.\n",
3774 h->max_commands);
3775 h->max_commands = 16;
3776 }
3777}
3778
b93d7536
SC		 3779/* Interrogate the hardware for some limits:
3780 * max commands, max SG elements without chaining, and with chaining,
3781 * SG chain block size, etc.
3782 */
3783static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3784{
cba3d38b 3785 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 3786 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3787 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3788 /*
3789 * Limit in-command s/g elements to 32 save dma'able memory.
3790 * Howvever spec says if 0, use 31
3791 */
3792 h->max_cmd_sg_entries = 31;
3793 if (h->maxsgentries > 512) {
3794 h->max_cmd_sg_entries = 32;
3795 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3796 h->maxsgentries--; /* save one for chain pointer */
3797 } else {
3798 h->maxsgentries = 31; /* default to traditional values */
3799 h->chainsize = 0;
3800 }
3801}
3802
76c46e49
SC		 3803static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3804{
3805 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3806 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3807 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3808 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3809 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3810 return false;
3811 }
3812 return true;
3813}
3814
f7c39101
SC		 3815/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3816static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3817{
3818#ifdef CONFIG_X86
3819 u32 prefetch;
3820
3821 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3822 prefetch |= 0x100;
3823 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3824#endif
3825}
3826
3d0eab67
SC		 3827/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3828 * in a prefetch beyond physical memory.
3829 */
3830static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3831{
3832 u32 dma_prefetch;
3833
3834 if (h->board_id != 0x3225103C)
3835 return;
3836 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3837 dma_prefetch |= 0x8000;
3838 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3839}
3840
3f4336f3 3841static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 3842{
3843 int i;
6eaf46fd
SC		 3844 u32 doorbell_value;
3845 unsigned long flags;
eb6b2ae9
SC		 3846
3847 /* under certain very rare conditions, this can take awhile.
3848 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3849 * as we enter this code.)
3850 */
3851 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 3852 spin_lock_irqsave(&h->lock, flags);
3853 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3854 spin_unlock_irqrestore(&h->lock, flags);
382be668 3855 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 3856 break;
3857 /* delay and try again */
60d3f5b0 3858 usleep_range(10000, 20000);
eb6b2ae9 3859 }
3f4336f3
SC		 3860}
3861
3862static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3863{
3864 u32 trans_support;
3865
3866 trans_support = readl(&(h->cfgtable->TransportSupport));
3867 if (!(trans_support & SIMPLE_MODE))
3868 return -ENOTSUPP;
3869
3870 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3871 /* Update the field, and then ring the doorbell */
3872 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3873 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3874 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3875 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 3876 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3877 dev_warn(&h->pdev->dev,
3878 "unable to get board into simple mode\n");
3879 return -ENODEV;
3880 }
960a30e7 3881 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 3882 return 0;
3883}
3884
77c4495c
SC		 3885static int __devinit hpsa_pci_init(struct ctlr_info *h)
3886{
eb6b2ae9 3887 int prod_index, err;
edd16368 3888
e5c880d1
SC		 3889 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3890 if (prod_index < 0)
3891 return -ENODEV;
3892 h->product_name = products[prod_index].product_name;
3893 h->access = *(products[prod_index].access);
edd16368 3894
85bdbabb 3895 if (hpsa_board_disabled(h->pdev)) {
55c06c71 3896 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
edd16368
SC		 3897 return -ENODEV;
3898 }
e5a44df8
MG		 3899
3900 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
3901 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
3902
55c06c71 3903 err = pci_enable_device(h->pdev);
edd16368 3904 if (err) {
55c06c71 3905 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 3906 return err;
3907 }
3908
f79cfec6 3909 err = pci_request_regions(h->pdev, HPSA);
edd16368 3910 if (err) {
55c06c71
SC		 3911 dev_err(&h->pdev->dev,
3912 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 3913 return err;
3914 }
6b3f4c52 3915 hpsa_interrupt_mode(h);
12d2cd47 3916 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3917 if (err)
edd16368 3918 goto err_out_free_res;
edd16368 3919 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 3920 if (!h->vaddr) {
3921 err = -ENOMEM;
3922 goto err_out_free_res;
3923 }
fe5389c8 3924 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 3925 if (err)
edd16368 3926 goto err_out_free_res;
77c4495c
SC		 3927 err = hpsa_find_cfgtables(h);
3928 if (err)
edd16368 3929 goto err_out_free_res;
b93d7536 3930 hpsa_find_board_params(h);
edd16368 3931
76c46e49 3932 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 3933 err = -ENODEV;
3934 goto err_out_free_res;
3935 }
f7c39101 3936 hpsa_enable_scsi_prefetch(h);
3d0eab67 3937 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 3938 err = hpsa_enter_simple_mode(h);
3939 if (err)
edd16368 3940 goto err_out_free_res;
edd16368
SC		 3941 return 0;
3942
3943err_out_free_res:
204892e9
SC		 3944 if (h->transtable)
3945 iounmap(h->transtable);
3946 if (h->cfgtable)
3947 iounmap(h->cfgtable);
3948 if (h->vaddr)
3949 iounmap(h->vaddr);
edd16368
SC		 3950 /*
3951 * Deliberately omit pci_disable_device(): it does something nasty to
3952 * Smart Array controllers that pci_enable_device does not undo
3953 */
55c06c71 3954 pci_release_regions(h->pdev);
edd16368
SC		 3955 return err;
3956}
3957
339b2b14
SC		 3958static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3959{
3960 int rc;
3961
3962#define HBA_INQUIRY_BYTE_COUNT 64
3963 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3964 if (!h->hba_inquiry_data)
3965 return;
3966 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3967 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3968 if (rc != 0) {
3969 kfree(h->hba_inquiry_data);
3970 h->hba_inquiry_data = NULL;
3971 }
3972}
3973
4c2a8c40
SC		 3974static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3975{
1df8552a 3976 int rc, i;
4c2a8c40
SC		 3977
3978 if (!reset_devices)
3979 return 0;
3980
1df8552a
SC		 3981 /* Reset the controller with a PCI power-cycle or via doorbell */
3982 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 3983
1df8552a
SC		 3984 /* -ENOTSUPP here means we cannot reset the controller
3985 * but it's already (and still) up and running in
18867659
SC		 3986 * "performant mode". Or, it might be 640x, which can't reset
3987 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 3988 */
3989 if (rc == -ENOTSUPP)
64670ac8 3990 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 3991 if (rc)
3992 return -ENODEV;
4c2a8c40
SC		 3993
3994 /* Now try to get the controller to respond to a no-op */
2b870cb3 3995 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 3996 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3997 if (hpsa_noop(pdev) == 0)
3998 break;
3999 else
4000 dev_warn(&pdev->dev, "no-op failed%s\n",
4001 (i < 11 ? "; re-trying" : ""));
4002 }
4003 return 0;
4004}
4005
2e9d1b36
SC		 4006static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4007{
4008 h->cmd_pool_bits = kzalloc(
4009 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4010 sizeof(unsigned long), GFP_KERNEL);
4011 h->cmd_pool = pci_alloc_consistent(h->pdev,
4012 h->nr_cmds * sizeof(*h->cmd_pool),
4013 &(h->cmd_pool_dhandle));
4014 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4015 h->nr_cmds * sizeof(*h->errinfo_pool),
4016 &(h->errinfo_pool_dhandle));
4017 if ((h->cmd_pool_bits == NULL)
4018 || (h->cmd_pool == NULL)
4019 || (h->errinfo_pool == NULL)) {
4020 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4021 return -ENOMEM;
4022 }
4023 return 0;
4024}
4025
4026static void hpsa_free_cmd_pool(struct ctlr_info *h)
4027{
4028 kfree(h->cmd_pool_bits);
4029 if (h->cmd_pool)
4030 pci_free_consistent(h->pdev,
4031 h->nr_cmds * sizeof(struct CommandList),
4032 h->cmd_pool, h->cmd_pool_dhandle);
4033 if (h->errinfo_pool)
4034 pci_free_consistent(h->pdev,
4035 h->nr_cmds * sizeof(struct ErrorInfo),
4036 h->errinfo_pool,
4037 h->errinfo_pool_dhandle);
4038}
4039
0ae01a32
SC		 4040static int hpsa_request_irq(struct ctlr_info *h,
4041 irqreturn_t (*msixhandler)(int, void *),
4042 irqreturn_t (*intxhandler)(int, void *))
4043{
4044 int rc;
4045
4046 if (h->msix_vector || h->msi_vector)
4047 rc = request_irq(h->intr[h->intr_mode], msixhandler,
45bcf018 4048 0, h->devname, h);
0ae01a32
SC		 4049 else
4050 rc = request_irq(h->intr[h->intr_mode], intxhandler,
45bcf018 4051 IRQF_SHARED, h->devname, h);
0ae01a32
SC		 4052 if (rc) {
4053 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4054 h->intr[h->intr_mode], h->devname);
4055 return -ENODEV;
4056 }
4057 return 0;
4058}
4059
64670ac8
SC		 4060static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4061{
4062 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4063 HPSA_RESET_TYPE_CONTROLLER)) {
4064 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4065 return -EIO;
4066 }
4067
4068 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4069 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4070 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4071 return -1;
4072 }
4073
4074 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4075 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4076 dev_warn(&h->pdev->dev, "Board failed to become ready "
4077 "after soft reset.\n");
4078 return -1;
4079 }
4080
4081 return 0;
4082}
4083
4084static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4085{
4086 free_irq(h->intr[h->intr_mode], h);
4087#ifdef CONFIG_PCI_MSI
4088 if (h->msix_vector)
4089 pci_disable_msix(h->pdev);
4090 else if (h->msi_vector)
4091 pci_disable_msi(h->pdev);
4092#endif /* CONFIG_PCI_MSI */
4093 hpsa_free_sg_chain_blocks(h);
4094 hpsa_free_cmd_pool(h);
4095 kfree(h->blockFetchTable);
4096 pci_free_consistent(h->pdev, h->reply_pool_size,
4097 h->reply_pool, h->reply_pool_dhandle);
4098 if (h->vaddr)
4099 iounmap(h->vaddr);
4100 if (h->transtable)
4101 iounmap(h->transtable);
4102 if (h->cfgtable)
4103 iounmap(h->cfgtable);
4104 pci_release_regions(h->pdev);
4105 kfree(h);
4106}
4107
a0c12413
SC		 4108static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4109{
4110 assert_spin_locked(&lockup_detector_lock);
4111 if (!hpsa_lockup_detector)
4112 return;
4113 if (h->lockup_detected)
4114 return; /* already stopped the lockup detector */
4115 list_del(&h->lockup_list);
4116}
4117
4118/* Called when controller lockup detected. */
4119static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4120{
4121 struct CommandList *c = NULL;
4122
4123 assert_spin_locked(&h->lock);
4124 /* Mark all outstanding commands as failed and complete them. */
4125 while (!list_empty(list)) {
4126 c = list_entry(list->next, struct CommandList, list);
4127 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
4128 finish_cmd(c, c->Header.Tag.lower);
4129 }
4130}
4131
4132static void controller_lockup_detected(struct ctlr_info *h)
4133{
4134 unsigned long flags;
4135
4136 assert_spin_locked(&lockup_detector_lock);
4137 remove_ctlr_from_lockup_detector_list(h);
4138 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4139 spin_lock_irqsave(&h->lock, flags);
4140 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4141 spin_unlock_irqrestore(&h->lock, flags);
4142 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4143 h->lockup_detected);
4144 pci_disable_device(h->pdev);
4145 spin_lock_irqsave(&h->lock, flags);
4146 fail_all_cmds_on_list(h, &h->cmpQ);
4147 fail_all_cmds_on_list(h, &h->reqQ);
4148 spin_unlock_irqrestore(&h->lock, flags);
4149}
4150
4151#define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
4152#define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
4153
4154static void detect_controller_lockup(struct ctlr_info *h)
4155{
4156 u64 now;
4157 u32 heartbeat;
4158 unsigned long flags;
4159
4160 assert_spin_locked(&lockup_detector_lock);
4161 now = get_jiffies_64();
4162 /* If we've received an interrupt recently, we're ok. */
4163 if (time_after64(h->last_intr_timestamp +
4164 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4165 return;
4166
4167 /*
4168 * If we've already checked the heartbeat recently, we're ok.
4169 * This could happen if someone sends us a signal. We
4170 * otherwise don't care about signals in this thread.
4171 */
4172 if (time_after64(h->last_heartbeat_timestamp +
4173 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4174 return;
4175
4176 /* If heartbeat has not changed since we last looked, we're not ok. */
4177 spin_lock_irqsave(&h->lock, flags);
4178 heartbeat = readl(&h->cfgtable->HeartBeat);
4179 spin_unlock_irqrestore(&h->lock, flags);
4180 if (h->last_heartbeat == heartbeat) {
4181 controller_lockup_detected(h);
4182 return;
4183 }
4184
4185 /* We're ok. */
4186 h->last_heartbeat = heartbeat;
4187 h->last_heartbeat_timestamp = now;
4188}
4189
4190static int detect_controller_lockup_thread(void *notused)
4191{
4192 struct ctlr_info *h;
4193 unsigned long flags;
4194
4195 while (1) {
4196 struct list_head *this, *tmp;
4197
4198 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4199 if (kthread_should_stop())
4200 break;
4201 spin_lock_irqsave(&lockup_detector_lock, flags);
4202 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4203 h = list_entry(this, struct ctlr_info, lockup_list);
4204 detect_controller_lockup(h);
4205 }
4206 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4207 }
4208 return 0;
4209}
4210
4211static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4212{
4213 unsigned long flags;
4214
4215 spin_lock_irqsave(&lockup_detector_lock, flags);
4216 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4217 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4218}
4219
4220static void start_controller_lockup_detector(struct ctlr_info *h)
4221{
4222 /* Start the lockup detector thread if not already started */
4223 if (!hpsa_lockup_detector) {
4224 spin_lock_init(&lockup_detector_lock);
4225 hpsa_lockup_detector =
4226 kthread_run(detect_controller_lockup_thread,
f79cfec6 4227 NULL, HPSA);
a0c12413
SC		 4228 }
4229 if (!hpsa_lockup_detector) {
4230 dev_warn(&h->pdev->dev,
4231 "Could not start lockup detector thread\n");
4232 return;
4233 }
4234 add_ctlr_to_lockup_detector_list(h);
4235}
4236
4237static void stop_controller_lockup_detector(struct ctlr_info *h)
4238{
4239 unsigned long flags;
4240
4241 spin_lock_irqsave(&lockup_detector_lock, flags);
4242 remove_ctlr_from_lockup_detector_list(h);
4243 /* If the list of ctlr's to monitor is empty, stop the thread */
4244 if (list_empty(&hpsa_ctlr_list)) {
775bf277 4245 spin_unlock_irqrestore(&lockup_detector_lock, flags);
a0c12413 4246 kthread_stop(hpsa_lockup_detector);
775bf277 4247 spin_lock_irqsave(&lockup_detector_lock, flags);
a0c12413
SC		 4248 hpsa_lockup_detector = NULL;
4249 }
4250 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4251}
4252
edd16368
SC		 4253static int __devinit hpsa_init_one(struct pci_dev *pdev,
4254 const struct pci_device_id *ent)
4255{
4c2a8c40 4256 int dac, rc;
edd16368 4257 struct ctlr_info *h;
64670ac8
SC		 4258 int try_soft_reset = 0;
4259 unsigned long flags;
edd16368
SC		 4260
4261 if (number_of_controllers == 0)
4262 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4263
4c2a8c40 4264 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4265 if (rc) {
4266 if (rc != -ENOTSUPP)
4267 return rc;
4268 /* If the reset fails in a particular way (it has no way to do
4269 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4270 * a soft reset once we get the controller configured up to the
4271 * point that it can accept a command.
4272 */
4273 try_soft_reset = 1;
4274 rc = 0;
4275 }
4276
4277reinit_after_soft_reset:
edd16368 4278
303932fd
DB		 4279 /* Command structures must be aligned on a 32-byte boundary because
4280 * the 5 lower bits of the address are used by the hardware. and by
4281 * the driver. See comments in hpsa.h for more info.
4282 */
4283#define COMMANDLIST_ALIGNMENT 32
4284 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4285 h = kzalloc(sizeof(*h), GFP_KERNEL);
4286 if (!h)
ecd9aad4 4287 return -ENOMEM;
edd16368 4288
55c06c71 4289 h->pdev = pdev;
a9a3a273 4290 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4291 INIT_LIST_HEAD(&h->cmpQ);
4292 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4293 spin_lock_init(&h->lock);
4294 spin_lock_init(&h->scan_lock);
55c06c71 4295 rc = hpsa_pci_init(h);
ecd9aad4 4296 if (rc != 0)
edd16368
SC		 4297 goto clean1;
4298
f79cfec6 4299 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4300 h->ctlr = number_of_controllers;
4301 number_of_controllers++;
edd16368
SC		 4302
4303 /* configure PCI DMA stuff */
ecd9aad4
SC		 4304 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4305 if (rc == 0) {
edd16368 4306 dac = 1;
ecd9aad4
SC		 4307 } else {
4308 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4309 if (rc == 0) {
4310 dac = 0;
4311 } else {
4312 dev_err(&pdev->dev, "no suitable DMA available\n");
4313 goto clean1;
4314 }
edd16368
SC		 4315 }
4316
4317 /* make sure the board interrupts are off */
4318 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4319
0ae01a32 4320 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4321 goto clean2;
303932fd
DB		 4322 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4323 h->devname, pdev->device,
a9a3a273 4324 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4325 if (hpsa_allocate_cmd_pool(h))
edd16368 4326 goto clean4;
33a2ffce
SC		 4327 if (hpsa_allocate_sg_chain_blocks(h))
4328 goto clean4;
a08a8471
SC		 4329 init_waitqueue_head(&h->scan_wait_queue);
4330 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4331
4332 pci_set_drvdata(pdev, h);
9a41338e
SC		 4333 h->ndevices = 0;
4334 h->scsi_host = NULL;
4335 spin_lock_init(&h->devlock);
64670ac8
SC		 4336 hpsa_put_ctlr_into_performant_mode(h);
4337
4338 /* At this point, the controller is ready to take commands.
4339 * Now, if reset_devices and the hard reset didn't work, try
4340 * the soft reset and see if that works.
4341 */
4342 if (try_soft_reset) {
4343
4344 /* This is kind of gross. We may or may not get a completion
4345 * from the soft reset command, and if we do, then the value
4346 * from the fifo may or may not be valid. So, we wait 10 secs
4347 * after the reset throwing away any completions we get during
4348 * that time. Unregister the interrupt handler and register
4349 * fake ones to scoop up any residual completions.
4350 */
4351 spin_lock_irqsave(&h->lock, flags);
4352 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4353 spin_unlock_irqrestore(&h->lock, flags);
4354 free_irq(h->intr[h->intr_mode], h);
4355 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4356 hpsa_intx_discard_completions);
4357 if (rc) {
4358 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4359 "soft reset.\n");
4360 goto clean4;
4361 }
4362
4363 rc = hpsa_kdump_soft_reset(h);
4364 if (rc)
4365 /* Neither hard nor soft reset worked, we're hosed. */
4366 goto clean4;
4367
4368 dev_info(&h->pdev->dev, "Board READY.\n");
4369 dev_info(&h->pdev->dev,
4370 "Waiting for stale completions to drain.\n");
4371 h->access.set_intr_mask(h, HPSA_INTR_ON);
4372 msleep(10000);
4373 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4374
4375 rc = controller_reset_failed(h->cfgtable);
4376 if (rc)
4377 dev_info(&h->pdev->dev,
4378 "Soft reset appears to have failed.\n");
4379
4380 /* since the controller's reset, we have to go back and re-init
4381 * everything. Easiest to just forget what we've done and do it
4382 * all over again.
4383 */
4384 hpsa_undo_allocations_after_kdump_soft_reset(h);
4385 try_soft_reset = 0;
4386 if (rc)
4387 /* don't go to clean4, we already unallocated */
4388 return -ENODEV;
4389
4390 goto reinit_after_soft_reset;
4391 }
edd16368
SC		 4392
4393 /* Turn the interrupts on so we can service requests */
4394 h->access.set_intr_mask(h, HPSA_INTR_ON);
4395
339b2b14 4396 hpsa_hba_inquiry(h);
edd16368 4397 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
a0c12413 4398 start_controller_lockup_detector(h);
edd16368
SC		 4399 return 1;
4400
4401clean4:
33a2ffce 4402 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4403 hpsa_free_cmd_pool(h);
a9a3a273 4404 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4405clean2:
4406clean1:
edd16368 4407 kfree(h);
ecd9aad4 4408 return rc;
edd16368
SC		 4409}
4410
4411static void hpsa_flush_cache(struct ctlr_info *h)
4412{
4413 char *flush_buf;
4414 struct CommandList *c;
4415
4416 flush_buf = kzalloc(4, GFP_KERNEL);
4417 if (!flush_buf)
4418 return;
4419
4420 c = cmd_special_alloc(h);
4421 if (!c) {
4422 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4423 goto out_of_memory;
4424 }
4425 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4426 RAID_CTLR_LUNID, TYPE_CMD);
4427 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4428 if (c->err_info->CommandStatus != 0)
4429 dev_warn(&h->pdev->dev,
4430 "error flushing cache on controller\n");
4431 cmd_special_free(h, c);
4432out_of_memory:
4433 kfree(flush_buf);
4434}
4435
4436static void hpsa_shutdown(struct pci_dev *pdev)
4437{
4438 struct ctlr_info *h;
4439
4440 h = pci_get_drvdata(pdev);
4441 /* Turn board interrupts off and send the flush cache command
4442 * sendcmd will turn off interrupt, and send the flush...
4443 * To write all data in the battery backed cache to disks
4444 */
4445 hpsa_flush_cache(h);
4446 h->access.set_intr_mask(h, HPSA_INTR_OFF);
a9a3a273 4447 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4448#ifdef CONFIG_PCI_MSI
4449 if (h->msix_vector)
4450 pci_disable_msix(h->pdev);
4451 else if (h->msi_vector)
4452 pci_disable_msi(h->pdev);
4453#endif /* CONFIG_PCI_MSI */
4454}
4455
55e14e76
SC		 4456static void __devexit hpsa_free_device_info(struct ctlr_info *h)
4457{
4458 int i;
4459
4460 for (i = 0; i < h->ndevices; i++)
4461 kfree(h->dev[i]);
4462}
4463
edd16368
SC		 4464static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4465{
4466 struct ctlr_info *h;
4467
4468 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 4469 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 4470 return;
4471 }
4472 h = pci_get_drvdata(pdev);
a0c12413 4473 stop_controller_lockup_detector(h);
edd16368
SC		 4474 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4475 hpsa_shutdown(pdev);
4476 iounmap(h->vaddr);
204892e9
SC		 4477 iounmap(h->transtable);
4478 iounmap(h->cfgtable);
55e14e76 4479 hpsa_free_device_info(h);
33a2ffce 4480 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4481 pci_free_consistent(h->pdev,
4482 h->nr_cmds * sizeof(struct CommandList),
4483 h->cmd_pool, h->cmd_pool_dhandle);
4484 pci_free_consistent(h->pdev,
4485 h->nr_cmds * sizeof(struct ErrorInfo),
4486 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4487 pci_free_consistent(h->pdev, h->reply_pool_size,
4488 h->reply_pool, h->reply_pool_dhandle);
edd16368 4489 kfree(h->cmd_pool_bits);
303932fd 4490 kfree(h->blockFetchTable);
339b2b14 4491 kfree(h->hba_inquiry_data);
edd16368
SC		 4492 /*
4493 * Deliberately omit pci_disable_device(): it does something nasty to
4494 * Smart Array controllers that pci_enable_device does not undo
4495 */
4496 pci_release_regions(pdev);
4497 pci_set_drvdata(pdev, NULL);
edd16368
SC		 4498 kfree(h);
4499}
4500
4501static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4502 __attribute__((unused)) pm_message_t state)
4503{
4504 return -ENOSYS;
4505}
4506
4507static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4508{
4509 return -ENOSYS;
4510}
4511
4512static struct pci_driver hpsa_pci_driver = {
f79cfec6 4513 .name = HPSA,
edd16368
SC		 4514 .probe = hpsa_init_one,
4515 .remove = __devexit_p(hpsa_remove_one),
4516 .id_table = hpsa_pci_device_id, /* id_table */
4517 .shutdown = hpsa_shutdown,
4518 .suspend = hpsa_suspend,
4519 .resume = hpsa_resume,
4520};
4521
303932fd
DB		 4522/* Fill in bucket_map[], given nsgs (the max number of
4523 * scatter gather elements supported) and bucket[],
4524 * which is an array of 8 integers. The bucket[] array
4525 * contains 8 different DMA transfer sizes (in 16
4526 * byte increments) which the controller uses to fetch
4527 * commands. This function fills in bucket_map[], which
4528 * maps a given number of scatter gather elements to one of
4529 * the 8 DMA transfer sizes. The point of it is to allow the
4530 * controller to only do as much DMA as needed to fetch the
4531 * command, with the DMA transfer size encoded in the lower
4532 * bits of the command address.
4533 */
4534static void calc_bucket_map(int bucket[], int num_buckets,
4535 int nsgs, int *bucket_map)
4536{
4537 int i, j, b, size;
4538
4539 /* even a command with 0 SGs requires 4 blocks */
4540#define MINIMUM_TRANSFER_BLOCKS 4
4541#define NUM_BUCKETS 8
4542 /* Note, bucket_map must have nsgs+1 entries. */
4543 for (i = 0; i <= nsgs; i++) {
4544 /* Compute size of a command with i SG entries */
4545 size = i + MINIMUM_TRANSFER_BLOCKS;
4546 b = num_buckets; /* Assume the biggest bucket */
4547 /* Find the bucket that is just big enough */
4548 for (j = 0; j < 8; j++) {
4549 if (bucket[j] >= size) {
4550 b = j;
4551 break;
4552 }
4553 }
4554 /* for a command with i SG entries, use bucket b. */
4555 bucket_map[i] = b;
4556 }
4557}
4558
960a30e7
SC		 4559static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4560 u32 use_short_tags)
303932fd 4561{
6c311b57
SC		 4562 int i;
4563 unsigned long register_value;
def342bd
SC		 4564
4565 /* This is a bit complicated. There are 8 registers on
4566 * the controller which we write to to tell it 8 different
4567 * sizes of commands which there may be. It's a way of
4568 * reducing the DMA done to fetch each command. Encoded into
4569 * each command's tag are 3 bits which communicate to the controller
4570 * which of the eight sizes that command fits within. The size of
4571 * each command depends on how many scatter gather entries there are.
4572 * Each SG entry requires 16 bytes. The eight registers are programmed
4573 * with the number of 16-byte blocks a command of that size requires.
4574 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 4575 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 4576 * blocks. Note, this only extends to the SG entries contained
4577 * within the command block, and does not extend to chained blocks
4578 * of SG elements. bft[] contains the eight values we write to
4579 * the registers. They are not evenly distributed, but have more
4580 * sizes for small commands, and fewer sizes for larger commands.
4581 */
d66ae08b
SC		 4582 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
4583 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 4584 /* 5 = 1 s/g entry or 4k
4585 * 6 = 2 s/g entry or 8k
4586 * 8 = 4 s/g entry or 16k
4587 * 10 = 6 s/g entry or 24k
4588 */
303932fd
DB		 4589
4590 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4591
4592 /* Controller spec: zero out this buffer. */
4593 memset(h->reply_pool, 0, h->reply_pool_size);
4594 h->reply_pool_head = h->reply_pool;
4595
d66ae08b
SC		 4596 bft[7] = SG_ENTRIES_IN_CMD + 4;
4597 calc_bucket_map(bft, ARRAY_SIZE(bft),
4598 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 4599 for (i = 0; i < 8; i++)
4600 writel(bft[i], &h->transtable->BlockFetch[i]);
4601
4602 /* size of controller ring buffer */
4603 writel(h->max_commands, &h->transtable->RepQSize);
4604 writel(1, &h->transtable->RepQCount);
4605 writel(0, &h->transtable->RepQCtrAddrLow32);
4606 writel(0, &h->transtable->RepQCtrAddrHigh32);
4607 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4608 writel(0, &h->transtable->RepQAddr0High32);
960a30e7 4609 writel(CFGTBL_Trans_Performant | use_short_tags,
303932fd
DB		 4610 &(h->cfgtable->HostWrite.TransportRequest));
4611 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4612 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4613 register_value = readl(&(h->cfgtable->TransportActive));
4614 if (!(register_value & CFGTBL_Trans_Performant)) {
4615 dev_warn(&h->pdev->dev, "unable to get board into"
4616 " performant mode\n");
4617 return;
4618 }
960a30e7
SC		 4619 /* Change the access methods to the performant access methods */
4620 h->access = SA5_performant_access;
4621 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 4622}
4623
4624static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4625{
4626 u32 trans_support;
4627
02ec19c8
SC		 4628 if (hpsa_simple_mode)
4629 return;
4630
6c311b57
SC		 4631 trans_support = readl(&(h->cfgtable->TransportSupport));
4632 if (!(trans_support & PERFORMANT_MODE))
4633 return;
4634
cba3d38b 4635 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4636 /* Performant mode ring buffer and supporting data structures */
4637 h->reply_pool_size = h->max_commands * sizeof(u64);
4638 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4639 &(h->reply_pool_dhandle));
4640
4641 /* Need a block fetch table for performant mode */
d66ae08b 4642 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 4643 sizeof(u32)), GFP_KERNEL);
4644
4645 if ((h->reply_pool == NULL)
4646 || (h->blockFetchTable == NULL))
4647 goto clean_up;
4648
960a30e7
SC		 4649 hpsa_enter_performant_mode(h,
4650 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 4651
4652 return;
4653
4654clean_up:
4655 if (h->reply_pool)
4656 pci_free_consistent(h->pdev, h->reply_pool_size,
4657 h->reply_pool, h->reply_pool_dhandle);
4658 kfree(h->blockFetchTable);
4659}
4660
edd16368
SC		 4661/*
4662 * This is it. Register the PCI driver information for the cards we control
4663 * the OS will call our registered routines when it finds one of our cards.
4664 */
4665static int __init hpsa_init(void)
4666{
31468401 4667 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4668}
4669
4670static void __exit hpsa_cleanup(void)
4671{
4672 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 4673}
4674
4675module_init(hpsa_init);
4676module_exit(hpsa_cleanup);
Linux kernel - Deliverables
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