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6f231dda DW |
1 | /* |
2 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
3 | * redistributing this file, you may do so under either license. | |
4 | * | |
5 | * GPL LICENSE SUMMARY | |
6 | * | |
7 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of version 2 of the GNU General Public License as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
21 | * The full GNU General Public License is included in this distribution | |
22 | * in the file called LICENSE.GPL. | |
23 | * | |
24 | * BSD LICENSE | |
25 | * | |
26 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. | |
27 | * All rights reserved. | |
28 | * | |
29 | * Redistribution and use in source and binary forms, with or without | |
30 | * modification, are permitted provided that the following conditions | |
31 | * are met: | |
32 | * | |
33 | * * Redistributions of source code must retain the above copyright | |
34 | * notice, this list of conditions and the following disclaimer. | |
35 | * * Redistributions in binary form must reproduce the above copyright | |
36 | * notice, this list of conditions and the following disclaimer in | |
37 | * the documentation and/or other materials provided with the | |
38 | * distribution. | |
39 | * * Neither the name of Intel Corporation nor the names of its | |
40 | * contributors may be used to endorse or promote products derived | |
41 | * from this software without specific prior written permission. | |
42 | * | |
43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
44 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
45 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
46 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
47 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
48 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
49 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
50 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
51 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
52 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
53 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
54 | */ | |
55 | ||
56 | #include <linux/device.h> | |
57 | #include "scic_controller.h" | |
58 | #include "scic_phy.h" | |
59 | #include "scic_port.h" | |
60 | #include "scic_remote_device.h" | |
61 | #include "scic_sds_controller.h" | |
62 | #include "scic_sds_controller_registers.h" | |
63 | #include "scic_sds_pci.h" | |
64 | #include "scic_sds_phy.h" | |
65 | #include "scic_sds_port_configuration_agent.h" | |
66 | #include "scic_sds_port.h" | |
67 | #include "scic_sds_remote_device.h" | |
68 | #include "scic_sds_request.h" | |
6f231dda DW |
69 | #include "sci_environment.h" |
70 | #include "sci_util.h" | |
71 | #include "scu_completion_codes.h" | |
72 | #include "scu_constants.h" | |
73 | #include "scu_event_codes.h" | |
74 | #include "scu_remote_node_context.h" | |
75 | #include "scu_task_context.h" | |
76 | #include "scu_unsolicited_frame.h" | |
77 | ||
78 | #define SCU_CONTEXT_RAM_INIT_STALL_TIME 200 | |
79 | ||
80 | /** | |
81 | * smu_dcc_get_max_ports() - | |
82 | * | |
83 | * This macro returns the maximum number of logical ports supported by the | |
84 | * hardware. The caller passes in the value read from the device context | |
85 | * capacity register and this macro will mash and shift the value appropriately. | |
86 | */ | |
87 | #define smu_dcc_get_max_ports(dcc_value) \ | |
88 | (\ | |
89 | (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \ | |
90 | >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \ | |
91 | ) | |
92 | ||
93 | /** | |
94 | * smu_dcc_get_max_task_context() - | |
95 | * | |
96 | * This macro returns the maximum number of task contexts supported by the | |
97 | * hardware. The caller passes in the value read from the device context | |
98 | * capacity register and this macro will mash and shift the value appropriately. | |
99 | */ | |
100 | #define smu_dcc_get_max_task_context(dcc_value) \ | |
101 | (\ | |
102 | (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \ | |
103 | >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \ | |
104 | ) | |
105 | ||
106 | /** | |
107 | * smu_dcc_get_max_remote_node_context() - | |
108 | * | |
109 | * This macro returns the maximum number of remote node contexts supported by | |
110 | * the hardware. The caller passes in the value read from the device context | |
111 | * capacity register and this macro will mash and shift the value appropriately. | |
112 | */ | |
113 | #define smu_dcc_get_max_remote_node_context(dcc_value) \ | |
114 | (\ | |
115 | (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \ | |
116 | >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \ | |
117 | ) | |
118 | ||
119 | ||
120 | static void scic_sds_controller_power_control_timer_handler( | |
121 | void *controller); | |
122 | #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT 3 | |
123 | #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT 3 | |
124 | ||
125 | /** | |
126 | * | |
127 | * | |
128 | * The number of milliseconds to wait for a phy to start. | |
129 | */ | |
130 | #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100 | |
131 | ||
132 | /** | |
133 | * | |
134 | * | |
135 | * The number of milliseconds to wait while a given phy is consuming power | |
136 | * before allowing another set of phys to consume power. Ultimately, this will | |
137 | * be specified by OEM parameter. | |
138 | */ | |
139 | #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500 | |
140 | ||
141 | /** | |
142 | * COMPLETION_QUEUE_CYCLE_BIT() - | |
143 | * | |
144 | * This macro will return the cycle bit of the completion queue entry | |
145 | */ | |
146 | #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000) | |
147 | ||
148 | /** | |
149 | * NORMALIZE_GET_POINTER() - | |
150 | * | |
151 | * This macro will normalize the completion queue get pointer so its value can | |
152 | * be used as an index into an array | |
153 | */ | |
154 | #define NORMALIZE_GET_POINTER(x) \ | |
155 | ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK) | |
156 | ||
157 | /** | |
158 | * NORMALIZE_PUT_POINTER() - | |
159 | * | |
160 | * This macro will normalize the completion queue put pointer so its value can | |
161 | * be used as an array inde | |
162 | */ | |
163 | #define NORMALIZE_PUT_POINTER(x) \ | |
164 | ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK) | |
165 | ||
166 | ||
167 | /** | |
168 | * NORMALIZE_GET_POINTER_CYCLE_BIT() - | |
169 | * | |
170 | * This macro will normalize the completion queue cycle pointer so it matches | |
171 | * the completion queue cycle bit | |
172 | */ | |
173 | #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \ | |
174 | ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT)) | |
175 | ||
176 | /** | |
177 | * NORMALIZE_EVENT_POINTER() - | |
178 | * | |
179 | * This macro will normalize the completion queue event entry so its value can | |
180 | * be used as an index. | |
181 | */ | |
182 | #define NORMALIZE_EVENT_POINTER(x) \ | |
183 | (\ | |
184 | ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \ | |
185 | >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \ | |
186 | ) | |
187 | ||
188 | /** | |
189 | * INCREMENT_COMPLETION_QUEUE_GET() - | |
190 | * | |
191 | * This macro will increment the controllers completion queue index value and | |
192 | * possibly toggle the cycle bit if the completion queue index wraps back to 0. | |
193 | */ | |
194 | #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \ | |
195 | INCREMENT_QUEUE_GET(\ | |
196 | (index), \ | |
197 | (cycle), \ | |
198 | (controller)->completion_queue_entries, \ | |
199 | SMU_CQGR_CYCLE_BIT \ | |
200 | ) | |
201 | ||
202 | /** | |
203 | * INCREMENT_EVENT_QUEUE_GET() - | |
204 | * | |
205 | * This macro will increment the controllers event queue index value and | |
206 | * possibly toggle the event cycle bit if the event queue index wraps back to 0. | |
207 | */ | |
208 | #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \ | |
209 | INCREMENT_QUEUE_GET(\ | |
210 | (index), \ | |
211 | (cycle), \ | |
212 | (controller)->completion_event_entries, \ | |
213 | SMU_CQGR_EVENT_CYCLE_BIT \ | |
214 | ) | |
215 | ||
216 | struct sci_base_memory_descriptor_list * | |
217 | sci_controller_get_memory_descriptor_list_handle(struct scic_sds_controller *scic) | |
218 | { | |
219 | return &scic->parent.mdl; | |
220 | } | |
221 | ||
35173d57 | 222 | static void scic_sds_controller_initialize_power_control(struct scic_sds_controller *scic) |
6f231dda | 223 | { |
09d7da13 | 224 | struct isci_host *ihost = sci_object_get_association(scic); |
35173d57 DW |
225 | scic->power_control.timer = isci_timer_create(ihost, |
226 | scic, | |
227 | scic_sds_controller_power_control_timer_handler); | |
6f231dda | 228 | |
35173d57 | 229 | memset(scic->power_control.requesters, 0, |
09d7da13 | 230 | sizeof(scic->power_control.requesters)); |
6f231dda | 231 | |
09d7da13 DJ |
232 | scic->power_control.phys_waiting = 0; |
233 | scic->power_control.phys_granted_power = 0; | |
6f231dda DW |
234 | } |
235 | ||
6f231dda DW |
236 | #define SCU_REMOTE_NODE_CONTEXT_ALIGNMENT (32) |
237 | #define SCU_TASK_CONTEXT_ALIGNMENT (256) | |
238 | #define SCU_UNSOLICITED_FRAME_ADDRESS_ALIGNMENT (64) | |
239 | #define SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT (1024) | |
240 | #define SCU_UNSOLICITED_FRAME_HEADER_ALIGNMENT (64) | |
241 | ||
6f231dda DW |
242 | /** |
243 | * This method builds the memory descriptor table for this controller. | |
244 | * @this_controller: This parameter specifies the controller object for which | |
245 | * to build the memory table. | |
246 | * | |
247 | */ | |
35173d57 | 248 | static void scic_sds_controller_build_memory_descriptor_table( |
6f231dda DW |
249 | struct scic_sds_controller *this_controller) |
250 | { | |
251 | sci_base_mde_construct( | |
252 | &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE], | |
253 | SCU_COMPLETION_RAM_ALIGNMENT, | |
254 | (sizeof(u32) * this_controller->completion_queue_entries), | |
255 | (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS) | |
256 | ); | |
257 | ||
258 | sci_base_mde_construct( | |
259 | &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT], | |
260 | SCU_REMOTE_NODE_CONTEXT_ALIGNMENT, | |
261 | this_controller->remote_node_entries * sizeof(union scu_remote_node_context), | |
262 | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS | |
263 | ); | |
264 | ||
265 | sci_base_mde_construct( | |
266 | &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT], | |
267 | SCU_TASK_CONTEXT_ALIGNMENT, | |
268 | this_controller->task_context_entries * sizeof(struct scu_task_context), | |
269 | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS | |
270 | ); | |
271 | ||
272 | /* | |
273 | * The UF buffer address table size must be programmed to a power | |
274 | * of 2. Find the first power of 2 that is equal to or greater then | |
275 | * the number of unsolicited frame buffers to be utilized. */ | |
276 | scic_sds_unsolicited_frame_control_set_address_table_count( | |
277 | &this_controller->uf_control | |
278 | ); | |
279 | ||
280 | sci_base_mde_construct( | |
281 | &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER], | |
282 | SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT, | |
283 | scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control), | |
284 | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS | |
285 | ); | |
286 | } | |
287 | ||
288 | /** | |
289 | * This method validates the driver supplied memory descriptor table. | |
290 | * @this_controller: | |
291 | * | |
292 | * enum sci_status | |
293 | */ | |
35173d57 | 294 | static enum sci_status scic_sds_controller_validate_memory_descriptor_table( |
6f231dda DW |
295 | struct scic_sds_controller *this_controller) |
296 | { | |
297 | bool mde_list_valid; | |
298 | ||
299 | mde_list_valid = sci_base_mde_is_valid( | |
300 | &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE], | |
301 | SCU_COMPLETION_RAM_ALIGNMENT, | |
302 | (sizeof(u32) * this_controller->completion_queue_entries), | |
303 | (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS) | |
304 | ); | |
305 | ||
306 | if (mde_list_valid == false) | |
307 | return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD; | |
308 | ||
309 | mde_list_valid = sci_base_mde_is_valid( | |
310 | &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT], | |
311 | SCU_REMOTE_NODE_CONTEXT_ALIGNMENT, | |
312 | this_controller->remote_node_entries * sizeof(union scu_remote_node_context), | |
313 | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS | |
314 | ); | |
315 | ||
316 | if (mde_list_valid == false) | |
317 | return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD; | |
318 | ||
319 | mde_list_valid = sci_base_mde_is_valid( | |
320 | &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT], | |
321 | SCU_TASK_CONTEXT_ALIGNMENT, | |
322 | this_controller->task_context_entries * sizeof(struct scu_task_context), | |
323 | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS | |
324 | ); | |
325 | ||
326 | if (mde_list_valid == false) | |
327 | return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD; | |
328 | ||
329 | mde_list_valid = sci_base_mde_is_valid( | |
330 | &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER], | |
331 | SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT, | |
332 | scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control), | |
333 | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS | |
334 | ); | |
335 | ||
336 | if (mde_list_valid == false) | |
337 | return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD; | |
338 | ||
339 | return SCI_SUCCESS; | |
340 | } | |
341 | ||
342 | /** | |
343 | * This method initializes the controller with the physical memory addresses | |
344 | * that are used to communicate with the driver. | |
345 | * @this_controller: | |
346 | * | |
347 | */ | |
35173d57 | 348 | static void scic_sds_controller_ram_initialization( |
6f231dda DW |
349 | struct scic_sds_controller *this_controller) |
350 | { | |
351 | struct sci_physical_memory_descriptor *mde; | |
352 | ||
353 | /* | |
354 | * The completion queue is actually placed in cacheable memory | |
355 | * Therefore it no longer comes out of memory in the MDL. */ | |
356 | mde = &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE]; | |
357 | this_controller->completion_queue = (u32 *)mde->virtual_address; | |
358 | SMU_CQBAR_WRITE(this_controller, mde->physical_address); | |
359 | ||
360 | /* | |
361 | * Program the location of the Remote Node Context table | |
362 | * into the SCU. */ | |
363 | mde = &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT]; | |
364 | this_controller->remote_node_context_table = (union scu_remote_node_context *) | |
365 | mde->virtual_address; | |
366 | SMU_RNCBAR_WRITE(this_controller, mde->physical_address); | |
367 | ||
368 | /* Program the location of the Task Context table into the SCU. */ | |
369 | mde = &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT]; | |
370 | this_controller->task_context_table = (struct scu_task_context *) | |
371 | mde->virtual_address; | |
372 | SMU_HTTBAR_WRITE(this_controller, mde->physical_address); | |
373 | ||
374 | mde = &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER]; | |
375 | scic_sds_unsolicited_frame_control_construct( | |
376 | &this_controller->uf_control, mde, this_controller | |
377 | ); | |
378 | ||
379 | /* | |
380 | * Inform the silicon as to the location of the UF headers and | |
381 | * address table. */ | |
382 | SCU_UFHBAR_WRITE( | |
383 | this_controller, | |
384 | this_controller->uf_control.headers.physical_address); | |
385 | SCU_PUFATHAR_WRITE( | |
386 | this_controller, | |
387 | this_controller->uf_control.address_table.physical_address); | |
388 | } | |
389 | ||
390 | /** | |
391 | * This method initializes the task context data for the controller. | |
392 | * @this_controller: | |
393 | * | |
394 | */ | |
35173d57 | 395 | static void scic_sds_controller_assign_task_entries( |
6f231dda DW |
396 | struct scic_sds_controller *this_controller) |
397 | { | |
398 | u32 task_assignment; | |
399 | ||
400 | /* | |
401 | * Assign all the TCs to function 0 | |
402 | * TODO: Do we actually need to read this register to write it back? */ | |
403 | task_assignment = SMU_TCA_READ(this_controller, 0); | |
404 | ||
405 | task_assignment = | |
406 | ( | |
407 | task_assignment | |
408 | | (SMU_TCA_GEN_VAL(STARTING, 0)) | |
409 | | (SMU_TCA_GEN_VAL(ENDING, this_controller->task_context_entries - 1)) | |
410 | | (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE)) | |
411 | ); | |
412 | ||
413 | SMU_TCA_WRITE(this_controller, 0, task_assignment); | |
414 | } | |
415 | ||
416 | /** | |
417 | * This method initializes the hardware completion queue. | |
418 | * | |
419 | * | |
420 | */ | |
35173d57 | 421 | static void scic_sds_controller_initialize_completion_queue( |
6f231dda DW |
422 | struct scic_sds_controller *this_controller) |
423 | { | |
424 | u32 index; | |
425 | u32 completion_queue_control_value; | |
426 | u32 completion_queue_get_value; | |
427 | u32 completion_queue_put_value; | |
428 | ||
429 | this_controller->completion_queue_get = 0; | |
430 | ||
431 | completion_queue_control_value = ( | |
432 | SMU_CQC_QUEUE_LIMIT_SET(this_controller->completion_queue_entries - 1) | |
433 | | SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1) | |
434 | ); | |
435 | ||
436 | SMU_CQC_WRITE(this_controller, completion_queue_control_value); | |
437 | ||
438 | /* Set the completion queue get pointer and enable the queue */ | |
439 | completion_queue_get_value = ( | |
440 | (SMU_CQGR_GEN_VAL(POINTER, 0)) | |
441 | | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0)) | |
442 | | (SMU_CQGR_GEN_BIT(ENABLE)) | |
443 | | (SMU_CQGR_GEN_BIT(EVENT_ENABLE)) | |
444 | ); | |
445 | ||
446 | SMU_CQGR_WRITE(this_controller, completion_queue_get_value); | |
447 | ||
448 | /* Set the completion queue put pointer */ | |
449 | completion_queue_put_value = ( | |
450 | (SMU_CQPR_GEN_VAL(POINTER, 0)) | |
451 | | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0)) | |
452 | ); | |
453 | ||
454 | SMU_CQPR_WRITE(this_controller, completion_queue_put_value); | |
455 | ||
456 | /* Initialize the cycle bit of the completion queue entries */ | |
457 | for (index = 0; index < this_controller->completion_queue_entries; index++) { | |
458 | /* | |
459 | * If get.cycle_bit != completion_queue.cycle_bit | |
460 | * its not a valid completion queue entry | |
461 | * so at system start all entries are invalid */ | |
462 | this_controller->completion_queue[index] = 0x80000000; | |
463 | } | |
464 | } | |
465 | ||
466 | /** | |
467 | * This method initializes the hardware unsolicited frame queue. | |
468 | * | |
469 | * | |
470 | */ | |
35173d57 | 471 | static void scic_sds_controller_initialize_unsolicited_frame_queue( |
6f231dda DW |
472 | struct scic_sds_controller *this_controller) |
473 | { | |
474 | u32 frame_queue_control_value; | |
475 | u32 frame_queue_get_value; | |
476 | u32 frame_queue_put_value; | |
477 | ||
478 | /* Write the queue size */ | |
479 | frame_queue_control_value = | |
480 | SCU_UFQC_GEN_VAL(QUEUE_SIZE, this_controller->uf_control.address_table.count); | |
481 | ||
482 | SCU_UFQC_WRITE(this_controller, frame_queue_control_value); | |
483 | ||
484 | /* Setup the get pointer for the unsolicited frame queue */ | |
485 | frame_queue_get_value = ( | |
486 | SCU_UFQGP_GEN_VAL(POINTER, 0) | |
487 | | SCU_UFQGP_GEN_BIT(ENABLE_BIT) | |
488 | ); | |
489 | ||
490 | SCU_UFQGP_WRITE(this_controller, frame_queue_get_value); | |
491 | ||
492 | /* Setup the put pointer for the unsolicited frame queue */ | |
493 | frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0); | |
494 | ||
495 | SCU_UFQPP_WRITE(this_controller, frame_queue_put_value); | |
496 | } | |
497 | ||
498 | /** | |
499 | * This method enables the hardware port task scheduler. | |
500 | * | |
501 | * | |
502 | */ | |
35173d57 | 503 | static void scic_sds_controller_enable_port_task_scheduler( |
6f231dda DW |
504 | struct scic_sds_controller *this_controller) |
505 | { | |
506 | u32 port_task_scheduler_value; | |
507 | ||
508 | port_task_scheduler_value = SCU_PTSGCR_READ(this_controller); | |
509 | ||
510 | port_task_scheduler_value |= | |
511 | (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE)); | |
512 | ||
513 | SCU_PTSGCR_WRITE(this_controller, port_task_scheduler_value); | |
514 | } | |
515 | ||
6f231dda DW |
516 | /** |
517 | * | |
518 | * | |
519 | * This macro is used to delay between writes to the AFE registers during AFE | |
520 | * initialization. | |
521 | */ | |
522 | #define AFE_REGISTER_WRITE_DELAY 10 | |
523 | ||
6f231dda DW |
524 | /* Initialize the AFE for this phy index. We need to read the AFE setup from |
525 | * the OEM parameters none | |
526 | */ | |
35173d57 | 527 | static void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic) |
6f231dda | 528 | { |
4711ba10 | 529 | const struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1; |
6f231dda DW |
530 | u32 afe_status; |
531 | u32 phy_id; | |
532 | ||
533 | /* Clear DFX Status registers */ | |
534 | scu_afe_register_write(scic, afe_dfx_master_control0, 0x0081000f); | |
7392d275 | 535 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
536 | |
537 | /* Configure bias currents to normal */ | |
538 | if (is_a0()) | |
539 | scu_afe_register_write(scic, afe_bias_control, 0x00005500); | |
540 | else | |
541 | scu_afe_register_write(scic, afe_bias_control, 0x00005A00); | |
6f231dda | 542 | |
7392d275 | 543 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
544 | |
545 | /* Enable PLL */ | |
546 | if (is_b0()) | |
547 | scu_afe_register_write(scic, afe_pll_control0, 0x80040A08); | |
548 | else | |
549 | scu_afe_register_write(scic, afe_pll_control0, 0x80040908); | |
d9def184 | 550 | |
7392d275 | 551 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
552 | |
553 | /* Wait for the PLL to lock */ | |
554 | do { | |
555 | afe_status = scu_afe_register_read( | |
556 | scic, afe_common_block_status); | |
7392d275 | 557 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
558 | } while ((afe_status & 0x00001000) == 0); |
559 | ||
560 | if (is_b0()) { | |
561 | /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */ | |
562 | scu_afe_register_write(scic, afe_pmsn_master_control0, 0x7bcc96ad); | |
7392d275 | 563 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
564 | } |
565 | ||
566 | for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) { | |
4711ba10 DW |
567 | const struct sci_phy_oem_params *oem_phy = &oem->phys[phy_id]; |
568 | ||
6f231dda DW |
569 | if (is_b0()) { |
570 | /* Configure transmitter SSC parameters */ | |
571 | scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000); | |
7392d275 | 572 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
573 | } else { |
574 | /* | |
575 | * All defaults, except the Receive Word Alignament/Comma Detect | |
576 | * Enable....(0xe800) */ | |
577 | scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004512); | |
7392d275 | 578 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
579 | |
580 | scu_afe_txreg_write(scic, phy_id, afe_xcvr_control1, 0x0050100F); | |
7392d275 | 581 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
582 | } |
583 | ||
584 | /* | |
585 | * Power up TX and RX out from power down (PWRDNTX and PWRDNRX) | |
586 | * & increase TX int & ext bias 20%....(0xe85c) */ | |
587 | if (is_a0()) | |
588 | scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003D4); | |
589 | else if (is_a2()) | |
590 | scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003F0); | |
591 | else { | |
592 | /* Power down TX and RX (PWRDNTX and PWRDNRX) */ | |
593 | scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d7); | |
7392d275 | 594 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
595 | |
596 | /* | |
597 | * Power up TX and RX out from power down (PWRDNTX and PWRDNRX) | |
598 | * & increase TX int & ext bias 20%....(0xe85c) */ | |
599 | scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d4); | |
600 | } | |
7392d275 | 601 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
602 | |
603 | if (is_a0() || is_a2()) { | |
604 | /* Enable TX equalization (0xe824) */ | |
605 | scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000); | |
7392d275 | 606 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
607 | } |
608 | ||
609 | /* | |
610 | * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On), | |
611 | * RDD=0x0(RX Detect Enabled) ....(0xe800) */ | |
612 | scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004100); | |
7392d275 | 613 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
614 | |
615 | /* Leave DFE/FFE on */ | |
616 | if (is_a0()) | |
617 | scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F09983F); | |
618 | else if (is_a2()) | |
619 | scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F); | |
620 | else { | |
621 | scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F); | |
7392d275 | 622 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
623 | /* Enable TX equalization (0xe824) */ |
624 | scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000); | |
625 | } | |
7392d275 | 626 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda | 627 | |
4711ba10 | 628 | scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control0); |
7392d275 | 629 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda | 630 | |
4711ba10 | 631 | scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control1); |
7392d275 | 632 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda | 633 | |
4711ba10 | 634 | scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control2); |
7392d275 | 635 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda | 636 | |
4711ba10 | 637 | scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control3); |
7392d275 | 638 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
639 | } |
640 | ||
641 | /* Transfer control to the PEs */ | |
642 | scu_afe_register_write(scic, afe_dfx_master_control0, 0x00010f00); | |
7392d275 | 643 | udelay(AFE_REGISTER_WRITE_DELAY); |
6f231dda DW |
644 | } |
645 | ||
646 | /* | |
647 | * ****************************************************************************- | |
648 | * * SCIC SDS Controller Internal Start/Stop Routines | |
649 | * ****************************************************************************- */ | |
650 | ||
651 | ||
652 | /** | |
653 | * This method will attempt to transition into the ready state for the | |
654 | * controller and indicate that the controller start operation has completed | |
655 | * if all criteria are met. | |
656 | * @this_controller: This parameter indicates the controller object for which | |
657 | * to transition to ready. | |
658 | * @status: This parameter indicates the status value to be pass into the call | |
659 | * to scic_cb_controller_start_complete(). | |
660 | * | |
661 | * none. | |
662 | */ | |
663 | static void scic_sds_controller_transition_to_ready( | |
09d7da13 | 664 | struct scic_sds_controller *scic, |
6f231dda DW |
665 | enum sci_status status) |
666 | { | |
09d7da13 DJ |
667 | struct isci_host *ihost = sci_object_get_association(scic); |
668 | ||
669 | if (scic->parent.state_machine.current_state_id == | |
670 | SCI_BASE_CONTROLLER_STATE_STARTING) { | |
6f231dda DW |
671 | /* |
672 | * We move into the ready state, because some of the phys/ports | |
09d7da13 DJ |
673 | * may be up and operational. |
674 | */ | |
068b2c03 DW |
675 | sci_base_state_machine_change_state(&scic->parent.state_machine, |
676 | SCI_BASE_CONTROLLER_STATE_READY); | |
6f231dda | 677 | |
09d7da13 | 678 | isci_host_start_complete(ihost, status); |
6f231dda DW |
679 | } |
680 | } | |
681 | ||
35173d57 | 682 | static void scic_sds_controller_timeout_handler(void *_scic) |
6f231dda | 683 | { |
09d7da13 DJ |
684 | struct scic_sds_controller *scic = _scic; |
685 | struct isci_host *ihost = sci_object_get_association(scic); | |
068b2c03 | 686 | struct sci_base_state_machine *sm = &scic->parent.state_machine; |
6f231dda | 687 | |
068b2c03 DW |
688 | if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STARTING) |
689 | scic_sds_controller_transition_to_ready(scic, SCI_FAILURE_TIMEOUT); | |
690 | else if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STOPPING) { | |
691 | sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_FAILED); | |
09d7da13 | 692 | isci_host_stop_complete(ihost, SCI_FAILURE_TIMEOUT); |
6f231dda DW |
693 | } else /* / @todo Now what do we want to do in this case? */ |
694 | dev_err(scic_to_dev(scic), | |
695 | "%s: Controller timer fired when controller was not " | |
696 | "in a state being timed.\n", | |
697 | __func__); | |
698 | } | |
699 | ||
35173d57 | 700 | static enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic) |
6f231dda DW |
701 | { |
702 | u32 index; | |
703 | enum sci_status port_status; | |
704 | enum sci_status status = SCI_SUCCESS; | |
705 | ||
706 | for (index = 0; index < scic->logical_port_entries; index++) { | |
a8d4b9fe TC |
707 | struct scic_sds_port *sci_port = &scic->port_table[index]; |
708 | SCI_BASE_PORT_HANDLER_T stop; | |
709 | ||
710 | stop = sci_port->state_handlers->parent.stop_handler; | |
711 | port_status = stop(&sci_port->parent); | |
6f231dda DW |
712 | |
713 | if ((port_status != SCI_SUCCESS) && | |
714 | (port_status != SCI_FAILURE_INVALID_STATE)) { | |
715 | status = SCI_FAILURE; | |
716 | ||
717 | dev_warn(scic_to_dev(scic), | |
718 | "%s: Controller stop operation failed to " | |
719 | "stop port %d because of status %d.\n", | |
720 | __func__, | |
a8d4b9fe | 721 | sci_port->logical_port_index, |
6f231dda DW |
722 | port_status); |
723 | } | |
724 | } | |
725 | ||
726 | return status; | |
727 | } | |
728 | ||
09d7da13 DJ |
729 | static inline void scic_sds_controller_phy_timer_start( |
730 | struct scic_sds_controller *scic) | |
6f231dda | 731 | { |
09d7da13 DJ |
732 | isci_timer_start(scic->phy_startup_timer, |
733 | SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT); | |
6f231dda | 734 | |
09d7da13 | 735 | scic->phy_startup_timer_pending = true; |
6f231dda DW |
736 | } |
737 | ||
35173d57 | 738 | static void scic_sds_controller_phy_timer_stop(struct scic_sds_controller *scic) |
6f231dda | 739 | { |
09d7da13 | 740 | isci_timer_stop(scic->phy_startup_timer); |
6f231dda | 741 | |
09d7da13 | 742 | scic->phy_startup_timer_pending = false; |
6f231dda DW |
743 | } |
744 | ||
745 | /** | |
35173d57 DW |
746 | * scic_sds_controller_start_next_phy - start phy |
747 | * @scic: controller | |
6f231dda | 748 | * |
35173d57 DW |
749 | * If all the phys have been started, then attempt to transition the |
750 | * controller to the READY state and inform the user | |
751 | * (scic_cb_controller_start_complete()). | |
6f231dda | 752 | */ |
35173d57 | 753 | static enum sci_status scic_sds_controller_start_next_phy(struct scic_sds_controller *scic) |
6f231dda | 754 | { |
07373a5c HD |
755 | struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1; |
756 | struct scic_sds_phy *sci_phy; | |
6f231dda DW |
757 | enum sci_status status; |
758 | ||
759 | status = SCI_SUCCESS; | |
760 | ||
07373a5c HD |
761 | if (scic->phy_startup_timer_pending) |
762 | return status; | |
6f231dda | 763 | |
07373a5c HD |
764 | if (scic->next_phy_to_start >= SCI_MAX_PHYS) { |
765 | bool is_controller_start_complete = true; | |
766 | u32 state; | |
767 | u8 index; | |
6f231dda | 768 | |
07373a5c HD |
769 | for (index = 0; index < SCI_MAX_PHYS; index++) { |
770 | sci_phy = &scic->phy_table[index]; | |
771 | state = sci_phy->parent.state_machine.current_state_id; | |
772 | ||
773 | if (!scic_sds_phy_get_port(sci_phy)) | |
774 | continue; | |
775 | ||
776 | /* The controller start operation is complete iff: | |
777 | * - all links have been given an opportunity to start | |
778 | * - have no indication of a connected device | |
779 | * - have an indication of a connected device and it has | |
780 | * finished the link training process. | |
781 | */ | |
782 | if ((sci_phy->is_in_link_training == false && | |
783 | state == SCI_BASE_PHY_STATE_INITIAL) || | |
784 | (sci_phy->is_in_link_training == false && | |
785 | state == SCI_BASE_PHY_STATE_STOPPED) || | |
786 | (sci_phy->is_in_link_training == true && | |
787 | state == SCI_BASE_PHY_STATE_STARTING)) { | |
788 | is_controller_start_complete = false; | |
789 | break; | |
6f231dda | 790 | } |
07373a5c | 791 | } |
6f231dda | 792 | |
07373a5c HD |
793 | /* |
794 | * The controller has successfully finished the start process. | |
795 | * Inform the SCI Core user and transition to the READY state. */ | |
796 | if (is_controller_start_complete == true) { | |
797 | scic_sds_controller_transition_to_ready(scic, SCI_SUCCESS); | |
798 | scic_sds_controller_phy_timer_stop(scic); | |
799 | } | |
800 | } else { | |
801 | sci_phy = &scic->phy_table[scic->next_phy_to_start]; | |
802 | ||
803 | if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) { | |
804 | if (scic_sds_phy_get_port(sci_phy) == NULL) { | |
805 | scic->next_phy_to_start++; | |
806 | ||
807 | /* Caution recursion ahead be forwarned | |
808 | * | |
809 | * The PHY was never added to a PORT in MPC mode | |
810 | * so start the next phy in sequence This phy | |
811 | * will never go link up and will not draw power | |
812 | * the OEM parameters either configured the phy | |
813 | * incorrectly for the PORT or it was never | |
814 | * assigned to a PORT | |
815 | */ | |
816 | return scic_sds_controller_start_next_phy(scic); | |
6f231dda | 817 | } |
07373a5c | 818 | } |
6f231dda | 819 | |
07373a5c | 820 | status = scic_sds_phy_start(sci_phy); |
6f231dda | 821 | |
07373a5c HD |
822 | if (status == SCI_SUCCESS) { |
823 | scic_sds_controller_phy_timer_start(scic); | |
824 | } else { | |
825 | dev_warn(scic_to_dev(scic), | |
826 | "%s: Controller stop operation failed " | |
827 | "to stop phy %d because of status " | |
828 | "%d.\n", | |
829 | __func__, | |
830 | scic->phy_table[scic->next_phy_to_start].phy_index, | |
831 | status); | |
6f231dda | 832 | } |
07373a5c HD |
833 | |
834 | scic->next_phy_to_start++; | |
6f231dda DW |
835 | } |
836 | ||
837 | return status; | |
838 | } | |
839 | ||
35173d57 DW |
840 | static void scic_sds_controller_phy_startup_timeout_handler(void *_scic) |
841 | { | |
842 | struct scic_sds_controller *scic = _scic; | |
843 | enum sci_status status; | |
844 | ||
845 | scic->phy_startup_timer_pending = false; | |
846 | status = SCI_FAILURE; | |
847 | while (status != SCI_SUCCESS) | |
848 | status = scic_sds_controller_start_next_phy(scic); | |
849 | } | |
850 | ||
851 | static enum sci_status scic_sds_controller_initialize_phy_startup(struct scic_sds_controller *scic) | |
852 | { | |
853 | struct isci_host *ihost = sci_object_get_association(scic); | |
854 | ||
855 | scic->phy_startup_timer = isci_timer_create(ihost, | |
856 | scic, | |
857 | scic_sds_controller_phy_startup_timeout_handler); | |
858 | ||
859 | if (scic->phy_startup_timer == NULL) | |
860 | return SCI_FAILURE_INSUFFICIENT_RESOURCES; | |
861 | else { | |
862 | scic->next_phy_to_start = 0; | |
863 | scic->phy_startup_timer_pending = false; | |
864 | } | |
865 | ||
866 | return SCI_SUCCESS; | |
867 | } | |
868 | ||
869 | static enum sci_status scic_sds_controller_stop_phys(struct scic_sds_controller *scic) | |
6f231dda DW |
870 | { |
871 | u32 index; | |
872 | enum sci_status status; | |
873 | enum sci_status phy_status; | |
874 | ||
875 | status = SCI_SUCCESS; | |
876 | ||
877 | for (index = 0; index < SCI_MAX_PHYS; index++) { | |
35173d57 | 878 | phy_status = scic_sds_phy_stop(&scic->phy_table[index]); |
6f231dda DW |
879 | |
880 | if ( | |
881 | (phy_status != SCI_SUCCESS) | |
882 | && (phy_status != SCI_FAILURE_INVALID_STATE) | |
883 | ) { | |
884 | status = SCI_FAILURE; | |
885 | ||
35173d57 | 886 | dev_warn(scic_to_dev(scic), |
6f231dda DW |
887 | "%s: Controller stop operation failed to stop " |
888 | "phy %d because of status %d.\n", | |
889 | __func__, | |
35173d57 | 890 | scic->phy_table[index].phy_index, phy_status); |
6f231dda DW |
891 | } |
892 | } | |
893 | ||
894 | return status; | |
895 | } | |
896 | ||
35173d57 | 897 | static enum sci_status scic_sds_controller_stop_devices(struct scic_sds_controller *scic) |
6f231dda DW |
898 | { |
899 | u32 index; | |
900 | enum sci_status status; | |
901 | enum sci_status device_status; | |
902 | ||
903 | status = SCI_SUCCESS; | |
904 | ||
35173d57 DW |
905 | for (index = 0; index < scic->remote_node_entries; index++) { |
906 | if (scic->device_table[index] != NULL) { | |
6f231dda | 907 | /* / @todo What timeout value do we want to provide to this request? */ |
35173d57 | 908 | device_status = scic_remote_device_stop(scic->device_table[index], 0); |
6f231dda DW |
909 | |
910 | if ((device_status != SCI_SUCCESS) && | |
911 | (device_status != SCI_FAILURE_INVALID_STATE)) { | |
35173d57 | 912 | dev_warn(scic_to_dev(scic), |
6f231dda DW |
913 | "%s: Controller stop operation failed " |
914 | "to stop device 0x%p because of " | |
915 | "status %d.\n", | |
916 | __func__, | |
35173d57 | 917 | scic->device_table[index], device_status); |
6f231dda DW |
918 | } |
919 | } | |
920 | } | |
921 | ||
922 | return status; | |
923 | } | |
924 | ||
35173d57 | 925 | static void scic_sds_controller_power_control_timer_start(struct scic_sds_controller *scic) |
6f231dda | 926 | { |
09d7da13 DJ |
927 | isci_timer_start(scic->power_control.timer, |
928 | SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL); | |
6f231dda | 929 | |
09d7da13 | 930 | scic->power_control.timer_started = true; |
6f231dda DW |
931 | } |
932 | ||
35173d57 | 933 | static void scic_sds_controller_power_control_timer_stop(struct scic_sds_controller *scic) |
07373a5c HD |
934 | { |
935 | if (scic->power_control.timer_started) { | |
09d7da13 | 936 | isci_timer_stop(scic->power_control.timer); |
07373a5c HD |
937 | scic->power_control.timer_started = false; |
938 | } | |
939 | } | |
940 | ||
35173d57 | 941 | static void scic_sds_controller_power_control_timer_restart(struct scic_sds_controller *scic) |
07373a5c HD |
942 | { |
943 | scic_sds_controller_power_control_timer_stop(scic); | |
944 | scic_sds_controller_power_control_timer_start(scic); | |
945 | } | |
946 | ||
6f231dda DW |
947 | static void scic_sds_controller_power_control_timer_handler( |
948 | void *controller) | |
949 | { | |
950 | struct scic_sds_controller *this_controller; | |
951 | ||
952 | this_controller = (struct scic_sds_controller *)controller; | |
953 | ||
07373a5c HD |
954 | this_controller->power_control.phys_granted_power = 0; |
955 | ||
6f231dda DW |
956 | if (this_controller->power_control.phys_waiting == 0) { |
957 | this_controller->power_control.timer_started = false; | |
958 | } else { | |
959 | struct scic_sds_phy *the_phy = NULL; | |
960 | u8 i; | |
961 | ||
962 | for (i = 0; | |
963 | (i < SCI_MAX_PHYS) | |
964 | && (this_controller->power_control.phys_waiting != 0); | |
965 | i++) { | |
966 | if (this_controller->power_control.requesters[i] != NULL) { | |
07373a5c HD |
967 | if (this_controller->power_control.phys_granted_power < |
968 | this_controller->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) { | |
969 | the_phy = this_controller->power_control.requesters[i]; | |
970 | this_controller->power_control.requesters[i] = NULL; | |
971 | this_controller->power_control.phys_waiting--; | |
972 | this_controller->power_control.phys_granted_power++; | |
973 | scic_sds_phy_consume_power_handler(the_phy); | |
974 | } else { | |
975 | break; | |
976 | } | |
6f231dda DW |
977 | } |
978 | } | |
979 | ||
980 | /* | |
981 | * It doesn't matter if the power list is empty, we need to start the | |
07373a5c HD |
982 | * timer in case another phy becomes ready. |
983 | */ | |
6f231dda | 984 | scic_sds_controller_power_control_timer_start(this_controller); |
6f231dda DW |
985 | } |
986 | } | |
987 | ||
988 | /** | |
989 | * This method inserts the phy in the stagger spinup control queue. | |
990 | * @this_controller: | |
991 | * | |
992 | * | |
993 | */ | |
994 | void scic_sds_controller_power_control_queue_insert( | |
995 | struct scic_sds_controller *this_controller, | |
996 | struct scic_sds_phy *the_phy) | |
997 | { | |
998 | BUG_ON(the_phy == NULL); | |
999 | ||
07373a5c HD |
1000 | if (this_controller->power_control.phys_granted_power < |
1001 | this_controller->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) { | |
1002 | this_controller->power_control.phys_granted_power++; | |
1003 | scic_sds_phy_consume_power_handler(the_phy); | |
1004 | ||
1005 | /* | |
1006 | * stop and start the power_control timer. When the timer fires, the | |
1007 | * no_of_phys_granted_power will be set to 0 | |
1008 | */ | |
1009 | scic_sds_controller_power_control_timer_restart(this_controller); | |
1010 | } else { | |
1011 | /* Add the phy in the waiting list */ | |
6f231dda DW |
1012 | this_controller->power_control.requesters[the_phy->phy_index] = the_phy; |
1013 | this_controller->power_control.phys_waiting++; | |
6f231dda DW |
1014 | } |
1015 | } | |
1016 | ||
1017 | /** | |
1018 | * This method removes the phy from the stagger spinup control queue. | |
1019 | * @this_controller: | |
1020 | * | |
1021 | * | |
1022 | */ | |
1023 | void scic_sds_controller_power_control_queue_remove( | |
1024 | struct scic_sds_controller *this_controller, | |
1025 | struct scic_sds_phy *the_phy) | |
1026 | { | |
1027 | BUG_ON(the_phy == NULL); | |
1028 | ||
1029 | if (this_controller->power_control.requesters[the_phy->phy_index] != NULL) { | |
1030 | this_controller->power_control.phys_waiting--; | |
1031 | } | |
1032 | ||
1033 | this_controller->power_control.requesters[the_phy->phy_index] = NULL; | |
1034 | } | |
1035 | ||
1036 | /* | |
1037 | * ****************************************************************************- | |
1038 | * * SCIC SDS Controller Completion Routines | |
1039 | * ****************************************************************************- */ | |
1040 | ||
1041 | /** | |
1042 | * This method returns a true value if the completion queue has entries that | |
1043 | * can be processed | |
1044 | * @this_controller: | |
1045 | * | |
1046 | * bool true if the completion queue has entries to process false if the | |
1047 | * completion queue has no entries to process | |
1048 | */ | |
1049 | static bool scic_sds_controller_completion_queue_has_entries( | |
1050 | struct scic_sds_controller *this_controller) | |
1051 | { | |
1052 | u32 get_value = this_controller->completion_queue_get; | |
1053 | u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK; | |
1054 | ||
1055 | if ( | |
1056 | NORMALIZE_GET_POINTER_CYCLE_BIT(get_value) | |
1057 | == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index]) | |
1058 | ) { | |
1059 | return true; | |
1060 | } | |
1061 | ||
1062 | return false; | |
1063 | } | |
1064 | ||
6f231dda DW |
1065 | /** |
1066 | * This method processes a task completion notification. This is called from | |
1067 | * within the controller completion handler. | |
1068 | * @this_controller: | |
1069 | * @completion_entry: | |
1070 | * | |
1071 | */ | |
1072 | static void scic_sds_controller_task_completion( | |
1073 | struct scic_sds_controller *this_controller, | |
1074 | u32 completion_entry) | |
1075 | { | |
1076 | u32 index; | |
1077 | struct scic_sds_request *io_request; | |
1078 | ||
1079 | index = SCU_GET_COMPLETION_INDEX(completion_entry); | |
1080 | io_request = this_controller->io_request_table[index]; | |
1081 | ||
1082 | /* Make sure that we really want to process this IO request */ | |
1083 | if ( | |
a7e536c7 | 1084 | (io_request != NULL) |
6f231dda DW |
1085 | && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG) |
1086 | && ( | |
1087 | scic_sds_io_tag_get_sequence(io_request->io_tag) | |
1088 | == this_controller->io_request_sequence[index] | |
1089 | ) | |
1090 | ) { | |
1091 | /* Yep this is a valid io request pass it along to the io request handler */ | |
1092 | scic_sds_io_request_tc_completion(io_request, completion_entry); | |
1093 | } | |
1094 | } | |
1095 | ||
1096 | /** | |
1097 | * This method processes an SDMA completion event. This is called from within | |
1098 | * the controller completion handler. | |
1099 | * @this_controller: | |
1100 | * @completion_entry: | |
1101 | * | |
1102 | */ | |
1103 | static void scic_sds_controller_sdma_completion( | |
1104 | struct scic_sds_controller *this_controller, | |
1105 | u32 completion_entry) | |
1106 | { | |
1107 | u32 index; | |
1108 | struct scic_sds_request *io_request; | |
1109 | struct scic_sds_remote_device *device; | |
1110 | ||
1111 | index = SCU_GET_COMPLETION_INDEX(completion_entry); | |
1112 | ||
1113 | switch (scu_get_command_request_type(completion_entry)) { | |
1114 | case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC: | |
1115 | case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC: | |
1116 | io_request = this_controller->io_request_table[index]; | |
1117 | dev_warn(scic_to_dev(this_controller), | |
1118 | "%s: SCIC SDS Completion type SDMA %x for io request " | |
1119 | "%p\n", | |
1120 | __func__, | |
1121 | completion_entry, | |
1122 | io_request); | |
1123 | /* @todo For a post TC operation we need to fail the IO | |
1124 | * request | |
1125 | */ | |
1126 | break; | |
1127 | ||
1128 | case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC: | |
1129 | case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC: | |
1130 | case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC: | |
1131 | device = this_controller->device_table[index]; | |
1132 | dev_warn(scic_to_dev(this_controller), | |
1133 | "%s: SCIC SDS Completion type SDMA %x for remote " | |
1134 | "device %p\n", | |
1135 | __func__, | |
1136 | completion_entry, | |
1137 | device); | |
1138 | /* @todo For a port RNC operation we need to fail the | |
1139 | * device | |
1140 | */ | |
1141 | break; | |
1142 | ||
1143 | default: | |
1144 | dev_warn(scic_to_dev(this_controller), | |
1145 | "%s: SCIC SDS Completion unknown SDMA completion " | |
1146 | "type %x\n", | |
1147 | __func__, | |
1148 | completion_entry); | |
1149 | break; | |
1150 | ||
1151 | } | |
1152 | } | |
1153 | ||
1154 | /** | |
1155 | * | |
1156 | * @this_controller: | |
1157 | * @completion_entry: | |
1158 | * | |
1159 | * This method processes an unsolicited frame message. This is called from | |
1160 | * within the controller completion handler. none | |
1161 | */ | |
1162 | static void scic_sds_controller_unsolicited_frame( | |
1163 | struct scic_sds_controller *this_controller, | |
1164 | u32 completion_entry) | |
1165 | { | |
1166 | u32 index; | |
1167 | u32 frame_index; | |
1168 | ||
1169 | struct scu_unsolicited_frame_header *frame_header; | |
1170 | struct scic_sds_phy *phy; | |
1171 | struct scic_sds_remote_device *device; | |
1172 | ||
1173 | enum sci_status result = SCI_FAILURE; | |
1174 | ||
1175 | frame_index = SCU_GET_FRAME_INDEX(completion_entry); | |
1176 | ||
1177 | frame_header | |
1178 | = this_controller->uf_control.buffers.array[frame_index].header; | |
1179 | this_controller->uf_control.buffers.array[frame_index].state | |
1180 | = UNSOLICITED_FRAME_IN_USE; | |
1181 | ||
1182 | if (SCU_GET_FRAME_ERROR(completion_entry)) { | |
1183 | /* | |
1184 | * / @todo If the IAF frame or SIGNATURE FIS frame has an error will | |
1185 | * / this cause a problem? We expect the phy initialization will | |
1186 | * / fail if there is an error in the frame. */ | |
1187 | scic_sds_controller_release_frame(this_controller, frame_index); | |
1188 | return; | |
1189 | } | |
1190 | ||
1191 | if (frame_header->is_address_frame) { | |
1192 | index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry); | |
1193 | phy = &this_controller->phy_table[index]; | |
1194 | if (phy != NULL) { | |
1195 | result = scic_sds_phy_frame_handler(phy, frame_index); | |
1196 | } | |
1197 | } else { | |
1198 | ||
1199 | index = SCU_GET_COMPLETION_INDEX(completion_entry); | |
1200 | ||
1201 | if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) { | |
1202 | /* | |
1203 | * This is a signature fis or a frame from a direct attached SATA | |
1204 | * device that has not yet been created. In either case forwared | |
1205 | * the frame to the PE and let it take care of the frame data. */ | |
1206 | index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry); | |
1207 | phy = &this_controller->phy_table[index]; | |
1208 | result = scic_sds_phy_frame_handler(phy, frame_index); | |
1209 | } else { | |
1210 | if (index < this_controller->remote_node_entries) | |
1211 | device = this_controller->device_table[index]; | |
1212 | else | |
1213 | device = NULL; | |
1214 | ||
1215 | if (device != NULL) | |
1216 | result = scic_sds_remote_device_frame_handler(device, frame_index); | |
1217 | else | |
1218 | scic_sds_controller_release_frame(this_controller, frame_index); | |
1219 | } | |
1220 | } | |
1221 | ||
1222 | if (result != SCI_SUCCESS) { | |
1223 | /* | |
1224 | * / @todo Is there any reason to report some additional error message | |
1225 | * / when we get this failure notifiction? */ | |
1226 | } | |
1227 | } | |
1228 | ||
1229 | /** | |
1230 | * This method processes an event completion entry. This is called from within | |
1231 | * the controller completion handler. | |
1232 | * @this_controller: | |
1233 | * @completion_entry: | |
1234 | * | |
1235 | */ | |
1236 | static void scic_sds_controller_event_completion( | |
1237 | struct scic_sds_controller *this_controller, | |
1238 | u32 completion_entry) | |
1239 | { | |
1240 | u32 index; | |
1241 | struct scic_sds_request *io_request; | |
1242 | struct scic_sds_remote_device *device; | |
1243 | struct scic_sds_phy *phy; | |
1244 | ||
1245 | index = SCU_GET_COMPLETION_INDEX(completion_entry); | |
1246 | ||
1247 | switch (scu_get_event_type(completion_entry)) { | |
1248 | case SCU_EVENT_TYPE_SMU_COMMAND_ERROR: | |
1249 | /* / @todo The driver did something wrong and we need to fix the condtion. */ | |
1250 | dev_err(scic_to_dev(this_controller), | |
1251 | "%s: SCIC Controller 0x%p received SMU command error " | |
1252 | "0x%x\n", | |
1253 | __func__, | |
1254 | this_controller, | |
1255 | completion_entry); | |
1256 | break; | |
1257 | ||
1258 | case SCU_EVENT_TYPE_SMU_PCQ_ERROR: | |
1259 | case SCU_EVENT_TYPE_SMU_ERROR: | |
1260 | case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR: | |
1261 | /* | |
1262 | * / @todo This is a hardware failure and its likely that we want to | |
1263 | * / reset the controller. */ | |
1264 | dev_err(scic_to_dev(this_controller), | |
1265 | "%s: SCIC Controller 0x%p received fatal controller " | |
1266 | "event 0x%x\n", | |
1267 | __func__, | |
1268 | this_controller, | |
1269 | completion_entry); | |
1270 | break; | |
1271 | ||
1272 | case SCU_EVENT_TYPE_TRANSPORT_ERROR: | |
1273 | io_request = this_controller->io_request_table[index]; | |
1274 | scic_sds_io_request_event_handler(io_request, completion_entry); | |
1275 | break; | |
1276 | ||
1277 | case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT: | |
1278 | switch (scu_get_event_specifier(completion_entry)) { | |
1279 | case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE: | |
1280 | case SCU_EVENT_SPECIFIC_TASK_TIMEOUT: | |
1281 | io_request = this_controller->io_request_table[index]; | |
a7e536c7 | 1282 | if (io_request != NULL) |
6f231dda DW |
1283 | scic_sds_io_request_event_handler(io_request, completion_entry); |
1284 | else | |
1285 | dev_warn(scic_to_dev(this_controller), | |
1286 | "%s: SCIC Controller 0x%p received " | |
1287 | "event 0x%x for io request object " | |
1288 | "that doesnt exist.\n", | |
1289 | __func__, | |
1290 | this_controller, | |
1291 | completion_entry); | |
1292 | ||
1293 | break; | |
1294 | ||
1295 | case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT: | |
1296 | device = this_controller->device_table[index]; | |
a7e536c7 | 1297 | if (device != NULL) |
6f231dda DW |
1298 | scic_sds_remote_device_event_handler(device, completion_entry); |
1299 | else | |
1300 | dev_warn(scic_to_dev(this_controller), | |
1301 | "%s: SCIC Controller 0x%p received " | |
1302 | "event 0x%x for remote device object " | |
1303 | "that doesnt exist.\n", | |
1304 | __func__, | |
1305 | this_controller, | |
1306 | completion_entry); | |
1307 | ||
1308 | break; | |
1309 | } | |
1310 | break; | |
1311 | ||
1312 | case SCU_EVENT_TYPE_BROADCAST_CHANGE: | |
1313 | /* | |
1314 | * direct the broadcast change event to the phy first and then let | |
1315 | * the phy redirect the broadcast change to the port object */ | |
1316 | case SCU_EVENT_TYPE_ERR_CNT_EVENT: | |
1317 | /* | |
1318 | * direct error counter event to the phy object since that is where | |
1319 | * we get the event notification. This is a type 4 event. */ | |
1320 | case SCU_EVENT_TYPE_OSSP_EVENT: | |
1321 | index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry); | |
1322 | phy = &this_controller->phy_table[index]; | |
1323 | scic_sds_phy_event_handler(phy, completion_entry); | |
1324 | break; | |
1325 | ||
1326 | case SCU_EVENT_TYPE_RNC_SUSPEND_TX: | |
1327 | case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX: | |
1328 | case SCU_EVENT_TYPE_RNC_OPS_MISC: | |
1329 | if (index < this_controller->remote_node_entries) { | |
1330 | device = this_controller->device_table[index]; | |
1331 | ||
1332 | if (device != NULL) | |
1333 | scic_sds_remote_device_event_handler(device, completion_entry); | |
1334 | } else | |
1335 | dev_err(scic_to_dev(this_controller), | |
1336 | "%s: SCIC Controller 0x%p received event 0x%x " | |
1337 | "for remote device object 0x%0x that doesnt " | |
1338 | "exist.\n", | |
1339 | __func__, | |
1340 | this_controller, | |
1341 | completion_entry, | |
1342 | index); | |
1343 | ||
1344 | break; | |
1345 | ||
1346 | default: | |
1347 | dev_warn(scic_to_dev(this_controller), | |
1348 | "%s: SCIC Controller received unknown event code %x\n", | |
1349 | __func__, | |
1350 | completion_entry); | |
1351 | break; | |
1352 | } | |
1353 | } | |
1354 | ||
1355 | /** | |
1356 | * This method is a private routine for processing the completion queue entries. | |
1357 | * @this_controller: | |
1358 | * | |
1359 | */ | |
1360 | static void scic_sds_controller_process_completions( | |
1361 | struct scic_sds_controller *this_controller) | |
1362 | { | |
1363 | u32 completion_count = 0; | |
1364 | u32 completion_entry; | |
1365 | u32 get_index; | |
1366 | u32 get_cycle; | |
1367 | u32 event_index; | |
1368 | u32 event_cycle; | |
1369 | ||
1370 | dev_dbg(scic_to_dev(this_controller), | |
1371 | "%s: completion queue begining get:0x%08x\n", | |
1372 | __func__, | |
1373 | this_controller->completion_queue_get); | |
1374 | ||
1375 | /* Get the component parts of the completion queue */ | |
1376 | get_index = NORMALIZE_GET_POINTER(this_controller->completion_queue_get); | |
1377 | get_cycle = SMU_CQGR_CYCLE_BIT & this_controller->completion_queue_get; | |
1378 | ||
1379 | event_index = NORMALIZE_EVENT_POINTER(this_controller->completion_queue_get); | |
1380 | event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & this_controller->completion_queue_get; | |
1381 | ||
1382 | while ( | |
1383 | NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle) | |
1384 | == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index]) | |
1385 | ) { | |
1386 | completion_count++; | |
1387 | ||
1388 | completion_entry = this_controller->completion_queue[get_index]; | |
1389 | INCREMENT_COMPLETION_QUEUE_GET(this_controller, get_index, get_cycle); | |
1390 | ||
1391 | dev_dbg(scic_to_dev(this_controller), | |
1392 | "%s: completion queue entry:0x%08x\n", | |
1393 | __func__, | |
1394 | completion_entry); | |
1395 | ||
1396 | switch (SCU_GET_COMPLETION_TYPE(completion_entry)) { | |
1397 | case SCU_COMPLETION_TYPE_TASK: | |
1398 | scic_sds_controller_task_completion(this_controller, completion_entry); | |
1399 | break; | |
1400 | ||
1401 | case SCU_COMPLETION_TYPE_SDMA: | |
1402 | scic_sds_controller_sdma_completion(this_controller, completion_entry); | |
1403 | break; | |
1404 | ||
1405 | case SCU_COMPLETION_TYPE_UFI: | |
1406 | scic_sds_controller_unsolicited_frame(this_controller, completion_entry); | |
1407 | break; | |
1408 | ||
1409 | case SCU_COMPLETION_TYPE_EVENT: | |
1410 | INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle); | |
1411 | scic_sds_controller_event_completion(this_controller, completion_entry); | |
1412 | break; | |
1413 | ||
1414 | case SCU_COMPLETION_TYPE_NOTIFY: | |
1415 | /* | |
1416 | * Presently we do the same thing with a notify event that we do with the | |
1417 | * other event codes. */ | |
1418 | INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle); | |
1419 | scic_sds_controller_event_completion(this_controller, completion_entry); | |
1420 | break; | |
1421 | ||
1422 | default: | |
1423 | dev_warn(scic_to_dev(this_controller), | |
1424 | "%s: SCIC Controller received unknown " | |
1425 | "completion type %x\n", | |
1426 | __func__, | |
1427 | completion_entry); | |
1428 | break; | |
1429 | } | |
1430 | } | |
1431 | ||
1432 | /* Update the get register if we completed one or more entries */ | |
1433 | if (completion_count > 0) { | |
1434 | this_controller->completion_queue_get = | |
1435 | SMU_CQGR_GEN_BIT(ENABLE) | |
1436 | | SMU_CQGR_GEN_BIT(EVENT_ENABLE) | |
1437 | | event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index) | |
1438 | | get_cycle | SMU_CQGR_GEN_VAL(POINTER, get_index); | |
1439 | ||
1440 | SMU_CQGR_WRITE(this_controller, | |
1441 | this_controller->completion_queue_get); | |
1442 | } | |
1443 | ||
1444 | dev_dbg(scic_to_dev(this_controller), | |
1445 | "%s: completion queue ending get:0x%08x\n", | |
1446 | __func__, | |
1447 | this_controller->completion_queue_get); | |
1448 | ||
1449 | } | |
1450 | ||
c7ef4031 | 1451 | bool scic_sds_controller_isr(struct scic_sds_controller *scic) |
6f231dda DW |
1452 | { |
1453 | if (scic_sds_controller_completion_queue_has_entries(scic)) { | |
1454 | return true; | |
1455 | } else { | |
1456 | /* | |
1457 | * we have a spurious interrupt it could be that we have already | |
1458 | * emptied the completion queue from a previous interrupt */ | |
1459 | SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION); | |
1460 | ||
1461 | /* | |
1462 | * There is a race in the hardware that could cause us not to be notified | |
1463 | * of an interrupt completion if we do not take this step. We will mask | |
1464 | * then unmask the interrupts so if there is another interrupt pending | |
1465 | * the clearing of the interrupt source we get the next interrupt message. */ | |
1466 | SMU_IMR_WRITE(scic, 0xFF000000); | |
1467 | SMU_IMR_WRITE(scic, 0x00000000); | |
1468 | } | |
1469 | ||
1470 | return false; | |
1471 | } | |
1472 | ||
c7ef4031 | 1473 | void scic_sds_controller_completion_handler(struct scic_sds_controller *scic) |
6f231dda DW |
1474 | { |
1475 | /* Empty out the completion queue */ | |
1476 | if (scic_sds_controller_completion_queue_has_entries(scic)) | |
1477 | scic_sds_controller_process_completions(scic); | |
1478 | ||
1479 | /* Clear the interrupt and enable all interrupts again */ | |
1480 | SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION); | |
1481 | /* Could we write the value of SMU_ISR_COMPLETION? */ | |
1482 | SMU_IMR_WRITE(scic, 0xFF000000); | |
1483 | SMU_IMR_WRITE(scic, 0x00000000); | |
1484 | } | |
1485 | ||
92f4f0f5 | 1486 | bool scic_sds_controller_error_isr(struct scic_sds_controller *scic) |
6f231dda DW |
1487 | { |
1488 | u32 interrupt_status; | |
1489 | ||
1490 | interrupt_status = SMU_ISR_READ(scic); | |
92f4f0f5 | 1491 | |
6f231dda DW |
1492 | interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND); |
1493 | ||
1494 | if (interrupt_status != 0) { | |
1495 | /* | |
1496 | * There is an error interrupt pending so let it through and handle | |
1497 | * in the callback */ | |
1498 | return true; | |
1499 | } | |
1500 | ||
1501 | /* | |
1502 | * There is a race in the hardware that could cause us not to be notified | |
1503 | * of an interrupt completion if we do not take this step. We will mask | |
1504 | * then unmask the error interrupts so if there was another interrupt | |
1505 | * pending we will be notified. | |
1506 | * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */ | |
1507 | SMU_IMR_WRITE(scic, 0x000000FF); | |
1508 | SMU_IMR_WRITE(scic, 0x00000000); | |
1509 | ||
1510 | return false; | |
1511 | } | |
1512 | ||
92f4f0f5 | 1513 | void scic_sds_controller_error_handler(struct scic_sds_controller *scic) |
6f231dda DW |
1514 | { |
1515 | u32 interrupt_status; | |
1516 | ||
1517 | interrupt_status = SMU_ISR_READ(scic); | |
1518 | ||
1519 | if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) && | |
1520 | scic_sds_controller_completion_queue_has_entries(scic)) { | |
1521 | ||
1522 | scic_sds_controller_process_completions(scic); | |
1523 | SMU_ISR_WRITE(scic, SMU_ISR_QUEUE_SUSPEND); | |
1524 | ||
1525 | } else { | |
92f4f0f5 | 1526 | dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__, |
6f231dda DW |
1527 | interrupt_status); |
1528 | ||
068b2c03 DW |
1529 | sci_base_state_machine_change_state(&scic->parent.state_machine, |
1530 | SCI_BASE_CONTROLLER_STATE_FAILED); | |
6f231dda DW |
1531 | |
1532 | return; | |
1533 | } | |
1534 | ||
068b2c03 DW |
1535 | /* If we dont process any completions I am not sure that we want to do this. |
1536 | * We are in the middle of a hardware fault and should probably be reset. | |
1537 | */ | |
6f231dda DW |
1538 | SMU_IMR_WRITE(scic, 0x00000000); |
1539 | } | |
1540 | ||
1541 | ||
6f231dda DW |
1542 | |
1543 | ||
1544 | void scic_sds_controller_link_up( | |
1545 | struct scic_sds_controller *scic, | |
1546 | struct scic_sds_port *sci_port, | |
1547 | struct scic_sds_phy *sci_phy) | |
1548 | { | |
1549 | scic_sds_controller_phy_handler_t link_up; | |
1550 | u32 state; | |
1551 | ||
1552 | state = scic->parent.state_machine.current_state_id; | |
1553 | link_up = scic_sds_controller_state_handler_table[state].link_up; | |
1554 | ||
1555 | if (link_up) | |
1556 | link_up(scic, sci_port, sci_phy); | |
1557 | else | |
d7628d05 | 1558 | dev_dbg(scic_to_dev(scic), |
6f231dda | 1559 | "%s: SCIC Controller linkup event from phy %d in " |
068b2c03 DW |
1560 | "unexpected state %d\n", __func__, sci_phy->phy_index, |
1561 | state); | |
6f231dda DW |
1562 | } |
1563 | ||
1564 | ||
1565 | void scic_sds_controller_link_down( | |
1566 | struct scic_sds_controller *scic, | |
1567 | struct scic_sds_port *sci_port, | |
1568 | struct scic_sds_phy *sci_phy) | |
1569 | { | |
1570 | u32 state; | |
1571 | scic_sds_controller_phy_handler_t link_down; | |
1572 | ||
1573 | state = scic->parent.state_machine.current_state_id; | |
1574 | link_down = scic_sds_controller_state_handler_table[state].link_down; | |
1575 | ||
1576 | if (link_down) | |
1577 | link_down(scic, sci_port, sci_phy); | |
1578 | else | |
d7628d05 | 1579 | dev_dbg(scic_to_dev(scic), |
6f231dda DW |
1580 | "%s: SCIC Controller linkdown event from phy %d in " |
1581 | "unexpected state %d\n", | |
1582 | __func__, | |
d7628d05 | 1583 | sci_phy->phy_index, state); |
6f231dda DW |
1584 | } |
1585 | ||
c658b109 PM |
1586 | /** |
1587 | * This method is called by the remote device to inform the controller | |
1588 | * that this remote device has started. | |
1589 | * | |
1590 | */ | |
1591 | ||
d7628d05 DJ |
1592 | void scic_sds_controller_remote_device_started(struct scic_sds_controller *scic, |
1593 | struct scic_sds_remote_device *sci_dev) | |
c658b109 PM |
1594 | { |
1595 | u32 state; | |
d7628d05 | 1596 | scic_sds_controller_device_handler_t started; |
c658b109 | 1597 | |
d7628d05 DJ |
1598 | state = scic->parent.state_machine.current_state_id; |
1599 | started = scic_sds_controller_state_handler_table[state].remote_device_started_handler; | |
c658b109 | 1600 | |
d7628d05 DJ |
1601 | if (started) |
1602 | started(scic, sci_dev); | |
c658b109 | 1603 | else { |
d7628d05 DJ |
1604 | dev_dbg(scic_to_dev(scic), |
1605 | "%s: SCIC Controller 0x%p remote device started event " | |
1606 | "from device 0x%p in unexpected state %d\n", | |
1607 | __func__, scic, sci_dev, state); | |
c658b109 PM |
1608 | } |
1609 | } | |
1610 | ||
1611 | /** | |
1612 | * This is a helper method to determine if any remote devices on this | |
1613 | * controller are still in the stopping state. | |
1614 | * | |
1615 | */ | |
35173d57 | 1616 | static bool scic_sds_controller_has_remote_devices_stopping( |
c658b109 PM |
1617 | struct scic_sds_controller *this_controller) |
1618 | { | |
1619 | u32 index; | |
1620 | ||
1621 | for (index = 0; index < this_controller->remote_node_entries; index++) { | |
1622 | if ((this_controller->device_table[index] != NULL) && | |
1623 | (this_controller->device_table[index]->parent.state_machine.current_state_id | |
1624 | == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING)) | |
1625 | return true; | |
1626 | } | |
1627 | ||
1628 | return false; | |
1629 | } | |
1630 | ||
1631 | /** | |
1632 | * This method is called by the remote device to inform the controller | |
1633 | * object that the remote device has stopped. | |
1634 | * | |
1635 | */ | |
1636 | ||
d7628d05 DJ |
1637 | void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic, |
1638 | struct scic_sds_remote_device *sci_dev) | |
c658b109 PM |
1639 | { |
1640 | ||
1641 | u32 state; | |
d7628d05 | 1642 | scic_sds_controller_device_handler_t stopped; |
c658b109 | 1643 | |
d7628d05 DJ |
1644 | state = scic->parent.state_machine.current_state_id; |
1645 | stopped = scic_sds_controller_state_handler_table[state].remote_device_stopped_handler; | |
c658b109 | 1646 | |
d7628d05 DJ |
1647 | if (stopped) |
1648 | stopped(scic, sci_dev); | |
c658b109 | 1649 | else { |
d7628d05 DJ |
1650 | dev_dbg(scic_to_dev(scic), |
1651 | "%s: SCIC Controller 0x%p remote device stopped event " | |
1652 | "from device 0x%p in unexpected state %d\n", | |
1653 | __func__, scic, sci_dev, state); | |
c658b109 PM |
1654 | } |
1655 | } | |
1656 | ||
1657 | ||
1658 | ||
6f231dda DW |
1659 | /** |
1660 | * This method will write to the SCU PCP register the request value. The method | |
1661 | * is used to suspend/resume ports, devices, and phys. | |
1662 | * @this_controller: | |
1663 | * | |
1664 | * | |
1665 | */ | |
1666 | void scic_sds_controller_post_request( | |
1667 | struct scic_sds_controller *this_controller, | |
1668 | u32 request) | |
1669 | { | |
1670 | dev_dbg(scic_to_dev(this_controller), | |
1671 | "%s: SCIC Controller 0x%p post request 0x%08x\n", | |
1672 | __func__, | |
1673 | this_controller, | |
1674 | request); | |
1675 | ||
1676 | SMU_PCP_WRITE(this_controller, request); | |
1677 | } | |
1678 | ||
1679 | /** | |
1680 | * This method will copy the soft copy of the task context into the physical | |
1681 | * memory accessible by the controller. | |
1682 | * @this_controller: This parameter specifies the controller for which to copy | |
1683 | * the task context. | |
1684 | * @this_request: This parameter specifies the request for which the task | |
1685 | * context is being copied. | |
1686 | * | |
1687 | * After this call is made the SCIC_SDS_IO_REQUEST object will always point to | |
1688 | * the physical memory version of the task context. Thus, all subsequent | |
1689 | * updates to the task context are performed in the TC table (i.e. DMAable | |
1690 | * memory). none | |
1691 | */ | |
1692 | void scic_sds_controller_copy_task_context( | |
1693 | struct scic_sds_controller *this_controller, | |
1694 | struct scic_sds_request *this_request) | |
1695 | { | |
1696 | struct scu_task_context *task_context_buffer; | |
1697 | ||
1698 | task_context_buffer = scic_sds_controller_get_task_context_buffer( | |
1699 | this_controller, this_request->io_tag | |
1700 | ); | |
1701 | ||
1702 | memcpy( | |
1703 | task_context_buffer, | |
1704 | this_request->task_context_buffer, | |
1705 | SCI_FIELD_OFFSET(struct scu_task_context, sgl_snapshot_ac) | |
1706 | ); | |
1707 | ||
1708 | /* | |
1709 | * Now that the soft copy of the TC has been copied into the TC | |
1710 | * table accessible by the silicon. Thus, any further changes to | |
1711 | * the TC (e.g. TC termination) occur in the appropriate location. */ | |
1712 | this_request->task_context_buffer = task_context_buffer; | |
1713 | } | |
1714 | ||
1715 | /** | |
1716 | * This method returns the task context buffer for the given io tag. | |
1717 | * @this_controller: | |
1718 | * @io_tag: | |
1719 | * | |
1720 | * struct scu_task_context* | |
1721 | */ | |
1722 | struct scu_task_context *scic_sds_controller_get_task_context_buffer( | |
1723 | struct scic_sds_controller *this_controller, | |
1724 | u16 io_tag | |
1725 | ) { | |
1726 | u16 task_index = scic_sds_io_tag_get_index(io_tag); | |
1727 | ||
1728 | if (task_index < this_controller->task_context_entries) { | |
1729 | return &this_controller->task_context_table[task_index]; | |
1730 | } | |
1731 | ||
1732 | return NULL; | |
1733 | } | |
1734 | ||
1735 | /** | |
1736 | * This method returnst the sequence value from the io tag value | |
1737 | * @this_controller: | |
1738 | * @io_tag: | |
1739 | * | |
1740 | * u16 | |
1741 | */ | |
1742 | ||
1743 | /** | |
1744 | * This method returns the IO request associated with the tag value | |
1745 | * @this_controller: | |
1746 | * @io_tag: | |
1747 | * | |
1748 | * SCIC_SDS_IO_REQUEST_T* NULL if there is no valid IO request at the tag value | |
1749 | */ | |
1750 | struct scic_sds_request *scic_sds_controller_get_io_request_from_tag( | |
1751 | struct scic_sds_controller *this_controller, | |
1752 | u16 io_tag | |
1753 | ) { | |
1754 | u16 task_index; | |
1755 | u16 task_sequence; | |
1756 | ||
1757 | task_index = scic_sds_io_tag_get_index(io_tag); | |
1758 | ||
1759 | if (task_index < this_controller->task_context_entries) { | |
a7e536c7 | 1760 | if (this_controller->io_request_table[task_index] != NULL) { |
6f231dda DW |
1761 | task_sequence = scic_sds_io_tag_get_sequence(io_tag); |
1762 | ||
1763 | if (task_sequence == this_controller->io_request_sequence[task_index]) { | |
1764 | return this_controller->io_request_table[task_index]; | |
1765 | } | |
1766 | } | |
1767 | } | |
1768 | ||
a7e536c7 | 1769 | return NULL; |
6f231dda DW |
1770 | } |
1771 | ||
1772 | /** | |
1773 | * This method allocates remote node index and the reserves the remote node | |
1774 | * context space for use. This method can fail if there are no more remote | |
1775 | * node index available. | |
1776 | * @this_controller: This is the controller object which contains the set of | |
1777 | * free remote node ids | |
1778 | * @the_devce: This is the device object which is requesting the a remote node | |
1779 | * id | |
1780 | * @node_id: This is the remote node id that is assinged to the device if one | |
1781 | * is available | |
1782 | * | |
1783 | * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote | |
1784 | * node index available. | |
1785 | */ | |
1786 | enum sci_status scic_sds_controller_allocate_remote_node_context( | |
1787 | struct scic_sds_controller *this_controller, | |
1788 | struct scic_sds_remote_device *the_device, | |
1789 | u16 *node_id) | |
1790 | { | |
1791 | u16 node_index; | |
1792 | u32 remote_node_count = scic_sds_remote_device_node_count(the_device); | |
1793 | ||
1794 | node_index = scic_sds_remote_node_table_allocate_remote_node( | |
1795 | &this_controller->available_remote_nodes, remote_node_count | |
1796 | ); | |
1797 | ||
1798 | if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) { | |
1799 | this_controller->device_table[node_index] = the_device; | |
1800 | ||
1801 | *node_id = node_index; | |
1802 | ||
1803 | return SCI_SUCCESS; | |
1804 | } | |
1805 | ||
1806 | return SCI_FAILURE_INSUFFICIENT_RESOURCES; | |
1807 | } | |
1808 | ||
1809 | /** | |
1810 | * This method frees the remote node index back to the available pool. Once | |
1811 | * this is done the remote node context buffer is no longer valid and can | |
1812 | * not be used. | |
1813 | * @this_controller: | |
1814 | * @the_device: | |
1815 | * @node_id: | |
1816 | * | |
1817 | */ | |
1818 | void scic_sds_controller_free_remote_node_context( | |
1819 | struct scic_sds_controller *this_controller, | |
1820 | struct scic_sds_remote_device *the_device, | |
1821 | u16 node_id) | |
1822 | { | |
1823 | u32 remote_node_count = scic_sds_remote_device_node_count(the_device); | |
1824 | ||
1825 | if (this_controller->device_table[node_id] == the_device) { | |
a7e536c7 | 1826 | this_controller->device_table[node_id] = NULL; |
6f231dda DW |
1827 | |
1828 | scic_sds_remote_node_table_release_remote_node_index( | |
1829 | &this_controller->available_remote_nodes, remote_node_count, node_id | |
1830 | ); | |
1831 | } | |
1832 | } | |
1833 | ||
1834 | /** | |
1835 | * This method returns the union scu_remote_node_context for the specified remote | |
1836 | * node id. | |
1837 | * @this_controller: | |
1838 | * @node_id: | |
1839 | * | |
1840 | * union scu_remote_node_context* | |
1841 | */ | |
1842 | union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer( | |
1843 | struct scic_sds_controller *this_controller, | |
1844 | u16 node_id | |
1845 | ) { | |
1846 | if ( | |
1847 | (node_id < this_controller->remote_node_entries) | |
a7e536c7 | 1848 | && (this_controller->device_table[node_id] != NULL) |
6f231dda DW |
1849 | ) { |
1850 | return &this_controller->remote_node_context_table[node_id]; | |
1851 | } | |
1852 | ||
1853 | return NULL; | |
1854 | } | |
1855 | ||
1856 | /** | |
1857 | * | |
1858 | * @resposne_buffer: This is the buffer into which the D2H register FIS will be | |
1859 | * constructed. | |
1860 | * @frame_header: This is the frame header returned by the hardware. | |
1861 | * @frame_buffer: This is the frame buffer returned by the hardware. | |
1862 | * | |
1863 | * This method will combind the frame header and frame buffer to create a SATA | |
1864 | * D2H register FIS none | |
1865 | */ | |
1866 | void scic_sds_controller_copy_sata_response( | |
1867 | void *response_buffer, | |
1868 | void *frame_header, | |
1869 | void *frame_buffer) | |
1870 | { | |
1871 | memcpy( | |
1872 | response_buffer, | |
1873 | frame_header, | |
1874 | sizeof(u32) | |
1875 | ); | |
1876 | ||
1877 | memcpy( | |
1878 | (char *)((char *)response_buffer + sizeof(u32)), | |
1879 | frame_buffer, | |
1880 | sizeof(struct sata_fis_reg_d2h) - sizeof(u32) | |
1881 | ); | |
1882 | } | |
1883 | ||
1884 | /** | |
1885 | * This method releases the frame once this is done the frame is available for | |
1886 | * re-use by the hardware. The data contained in the frame header and frame | |
1887 | * buffer is no longer valid. The UF queue get pointer is only updated if UF | |
1888 | * control indicates this is appropriate. | |
1889 | * @this_controller: | |
1890 | * @frame_index: | |
1891 | * | |
1892 | */ | |
1893 | void scic_sds_controller_release_frame( | |
1894 | struct scic_sds_controller *this_controller, | |
1895 | u32 frame_index) | |
1896 | { | |
1897 | if (scic_sds_unsolicited_frame_control_release_frame( | |
1898 | &this_controller->uf_control, frame_index) == true) | |
1899 | SCU_UFQGP_WRITE(this_controller, this_controller->uf_control.get); | |
1900 | } | |
1901 | ||
1902 | /** | |
1903 | * This method sets user parameters and OEM parameters to default values. | |
1904 | * Users can override these values utilizing the scic_user_parameters_set() | |
1905 | * and scic_oem_parameters_set() methods. | |
07373a5c | 1906 | * @scic: This parameter specifies the controller for which to set the |
6f231dda DW |
1907 | * configuration parameters to their default values. |
1908 | * | |
1909 | */ | |
d9def184 | 1910 | static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic) |
6f231dda | 1911 | { |
4711ba10 | 1912 | struct isci_host *ihost = sci_object_get_association(scic); |
6f231dda DW |
1913 | u16 index; |
1914 | ||
07373a5c HD |
1915 | /* Default to APC mode. */ |
1916 | scic->oem_parameters.sds1.controller.mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE; | |
1917 | ||
1918 | /* Default to APC mode. */ | |
1919 | scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up = 1; | |
1920 | ||
6f231dda | 1921 | /* Default to no SSC operation. */ |
d9def184 | 1922 | scic->oem_parameters.sds1.controller.do_enable_ssc = false; |
6f231dda DW |
1923 | |
1924 | /* Initialize all of the port parameter information to narrow ports. */ | |
1925 | for (index = 0; index < SCI_MAX_PORTS; index++) { | |
d9def184 | 1926 | scic->oem_parameters.sds1.ports[index].phy_mask = 0; |
6f231dda DW |
1927 | } |
1928 | ||
1929 | /* Initialize all of the phy parameter information. */ | |
1930 | for (index = 0; index < SCI_MAX_PHYS; index++) { | |
d044af17 DW |
1931 | /* Default to 6G (i.e. Gen 3) for now. */ |
1932 | scic->user_parameters.sds1.phys[index].max_speed_generation = 3; | |
d9def184 JD |
1933 | |
1934 | /* the frequencies cannot be 0 */ | |
1935 | scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f; | |
1936 | scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff; | |
1937 | scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33; | |
6f231dda DW |
1938 | |
1939 | /* | |
1940 | * Previous Vitesse based expanders had a arbitration issue that | |
1941 | * is worked around by having the upper 32-bits of SAS address | |
1942 | * with a value greater then the Vitesse company identifier. | |
1943 | * Hence, usage of 0x5FCFFFFF. */ | |
4711ba10 | 1944 | scic->oem_parameters.sds1.phys[index].sas_address.low = 0x1 + ihost->id; |
d9def184 | 1945 | scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF; |
6f231dda DW |
1946 | } |
1947 | ||
d9def184 JD |
1948 | scic->user_parameters.sds1.stp_inactivity_timeout = 5; |
1949 | scic->user_parameters.sds1.ssp_inactivity_timeout = 5; | |
1950 | scic->user_parameters.sds1.stp_max_occupancy_timeout = 5; | |
1951 | scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20; | |
1952 | scic->user_parameters.sds1.no_outbound_task_timeout = 20; | |
6f231dda DW |
1953 | } |
1954 | ||
35173d57 DW |
1955 | /** |
1956 | * scic_controller_initialize() - This method will initialize the controller | |
1957 | * hardware managed by the supplied core controller object. This method | |
1958 | * will bring the physical controller hardware out of reset and enable the | |
1959 | * core to determine the capabilities of the hardware being managed. Thus, | |
1960 | * the core controller can determine it's exact physical (DMA capable) | |
1961 | * memory requirements. | |
1962 | * @controller: This parameter specifies the controller to be initialized. | |
1963 | * | |
1964 | * The SCI Core user must have called scic_controller_construct() on the | |
1965 | * supplied controller object previously. Indicate if the controller was | |
1966 | * successfully initialized or if it failed in some way. SCI_SUCCESS This value | |
1967 | * is returned if the controller hardware was successfully initialized. | |
1968 | */ | |
6f231dda DW |
1969 | enum sci_status scic_controller_initialize( |
1970 | struct scic_sds_controller *scic) | |
1971 | { | |
1972 | enum sci_status status = SCI_FAILURE_INVALID_STATE; | |
1973 | sci_base_controller_handler_t initialize; | |
1974 | u32 state; | |
1975 | ||
1976 | state = scic->parent.state_machine.current_state_id; | |
1977 | initialize = scic_sds_controller_state_handler_table[state].base.initialize; | |
1978 | ||
1979 | if (initialize) | |
1980 | status = initialize(&scic->parent); | |
1981 | else | |
1982 | dev_warn(scic_to_dev(scic), | |
1983 | "%s: SCIC Controller initialize operation requested " | |
068b2c03 | 1984 | "in invalid state %d\n", __func__, state); |
6f231dda DW |
1985 | |
1986 | return status; | |
1987 | } | |
1988 | ||
35173d57 DW |
1989 | /** |
1990 | * scic_controller_get_suggested_start_timeout() - This method returns the | |
1991 | * suggested scic_controller_start() timeout amount. The user is free to | |
1992 | * use any timeout value, but this method provides the suggested minimum | |
1993 | * start timeout value. The returned value is based upon empirical | |
1994 | * information determined as a result of interoperability testing. | |
1995 | * @controller: the handle to the controller object for which to return the | |
1996 | * suggested start timeout. | |
1997 | * | |
1998 | * This method returns the number of milliseconds for the suggested start | |
1999 | * operation timeout. | |
2000 | */ | |
6f231dda DW |
2001 | u32 scic_controller_get_suggested_start_timeout( |
2002 | struct scic_sds_controller *sc) | |
2003 | { | |
2004 | /* Validate the user supplied parameters. */ | |
a7e536c7 | 2005 | if (sc == NULL) |
6f231dda DW |
2006 | return 0; |
2007 | ||
2008 | /* | |
2009 | * The suggested minimum timeout value for a controller start operation: | |
2010 | * | |
2011 | * Signature FIS Timeout | |
2012 | * + Phy Start Timeout | |
2013 | * + Number of Phy Spin Up Intervals | |
2014 | * --------------------------------- | |
2015 | * Number of milliseconds for the controller start operation. | |
2016 | * | |
2017 | * NOTE: The number of phy spin up intervals will be equivalent | |
2018 | * to the number of phys divided by the number phys allowed | |
2019 | * per interval - 1 (once OEM parameters are supported). | |
2020 | * Currently we assume only 1 phy per interval. */ | |
2021 | ||
d9def184 | 2022 | return SCIC_SDS_SIGNATURE_FIS_TIMEOUT |
6f231dda | 2023 | + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT |
d9def184 | 2024 | + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL); |
6f231dda DW |
2025 | } |
2026 | ||
35173d57 DW |
2027 | /** |
2028 | * scic_controller_start() - This method will start the supplied core | |
2029 | * controller. This method will start the staggered spin up operation. The | |
2030 | * SCI User completion callback is called when the following conditions are | |
2031 | * met: -# the return status of this method is SCI_SUCCESS. -# after all of | |
2032 | * the phys have successfully started or been given the opportunity to start. | |
2033 | * @controller: the handle to the controller object to start. | |
2034 | * @timeout: This parameter specifies the number of milliseconds in which the | |
2035 | * start operation should complete. | |
2036 | * | |
2037 | * The SCI Core user must have filled in the physical memory descriptor | |
2038 | * structure via the sci_controller_get_memory_descriptor_list() method. The | |
2039 | * SCI Core user must have invoked the scic_controller_initialize() method | |
2040 | * prior to invoking this method. The controller must be in the INITIALIZED or | |
2041 | * STARTED state. Indicate if the controller start method succeeded or failed | |
2042 | * in some way. SCI_SUCCESS if the start operation succeeded. | |
2043 | * SCI_WARNING_ALREADY_IN_STATE if the controller is already in the STARTED | |
2044 | * state. SCI_FAILURE_INVALID_STATE if the controller is not either in the | |
2045 | * INITIALIZED or STARTED states. SCI_FAILURE_INVALID_MEMORY_DESCRIPTOR if | |
2046 | * there are inconsistent or invalid values in the supplied | |
2047 | * struct sci_physical_memory_descriptor array. | |
2048 | */ | |
6f231dda DW |
2049 | enum sci_status scic_controller_start( |
2050 | struct scic_sds_controller *scic, | |
2051 | u32 timeout) | |
2052 | { | |
2053 | enum sci_status status = SCI_FAILURE_INVALID_STATE; | |
2054 | sci_base_controller_timed_handler_t start; | |
2055 | u32 state; | |
2056 | ||
2057 | state = scic->parent.state_machine.current_state_id; | |
2058 | start = scic_sds_controller_state_handler_table[state].base.start; | |
2059 | ||
2060 | if (start) | |
2061 | status = start(&scic->parent, timeout); | |
2062 | else | |
2063 | dev_warn(scic_to_dev(scic), | |
2064 | "%s: SCIC Controller start operation requested in " | |
068b2c03 | 2065 | "invalid state %d\n", __func__, state); |
6f231dda DW |
2066 | |
2067 | return status; | |
2068 | } | |
2069 | ||
35173d57 DW |
2070 | /** |
2071 | * scic_controller_stop() - This method will stop an individual controller | |
2072 | * object.This method will invoke the associated user callback upon | |
2073 | * completion. The completion callback is called when the following | |
2074 | * conditions are met: -# the method return status is SCI_SUCCESS. -# the | |
2075 | * controller has been quiesced. This method will ensure that all IO | |
2076 | * requests are quiesced, phys are stopped, and all additional operation by | |
2077 | * the hardware is halted. | |
2078 | * @controller: the handle to the controller object to stop. | |
2079 | * @timeout: This parameter specifies the number of milliseconds in which the | |
2080 | * stop operation should complete. | |
2081 | * | |
2082 | * The controller must be in the STARTED or STOPPED state. Indicate if the | |
2083 | * controller stop method succeeded or failed in some way. SCI_SUCCESS if the | |
2084 | * stop operation successfully began. SCI_WARNING_ALREADY_IN_STATE if the | |
2085 | * controller is already in the STOPPED state. SCI_FAILURE_INVALID_STATE if the | |
2086 | * controller is not either in the STARTED or STOPPED states. | |
2087 | */ | |
6f231dda DW |
2088 | enum sci_status scic_controller_stop( |
2089 | struct scic_sds_controller *scic, | |
2090 | u32 timeout) | |
2091 | { | |
2092 | enum sci_status status = SCI_FAILURE_INVALID_STATE; | |
2093 | sci_base_controller_timed_handler_t stop; | |
2094 | u32 state; | |
2095 | ||
2096 | state = scic->parent.state_machine.current_state_id; | |
2097 | stop = scic_sds_controller_state_handler_table[state].base.stop; | |
2098 | ||
2099 | if (stop) | |
2100 | status = stop(&scic->parent, timeout); | |
2101 | else | |
2102 | dev_warn(scic_to_dev(scic), | |
2103 | "%s: SCIC Controller stop operation requested in " | |
068b2c03 | 2104 | "invalid state %d\n", __func__, state); |
6f231dda DW |
2105 | |
2106 | return status; | |
2107 | } | |
2108 | ||
35173d57 DW |
2109 | /** |
2110 | * scic_controller_reset() - This method will reset the supplied core | |
2111 | * controller regardless of the state of said controller. This operation is | |
2112 | * considered destructive. In other words, all current operations are wiped | |
2113 | * out. No IO completions for outstanding devices occur. Outstanding IO | |
2114 | * requests are not aborted or completed at the actual remote device. | |
2115 | * @controller: the handle to the controller object to reset. | |
2116 | * | |
2117 | * Indicate if the controller reset method succeeded or failed in some way. | |
2118 | * SCI_SUCCESS if the reset operation successfully started. SCI_FATAL_ERROR if | |
2119 | * the controller reset operation is unable to complete. | |
2120 | */ | |
6f231dda DW |
2121 | enum sci_status scic_controller_reset( |
2122 | struct scic_sds_controller *scic) | |
2123 | { | |
2124 | enum sci_status status = SCI_FAILURE_INVALID_STATE; | |
2125 | sci_base_controller_handler_t reset; | |
2126 | u32 state; | |
2127 | ||
2128 | state = scic->parent.state_machine.current_state_id; | |
2129 | reset = scic_sds_controller_state_handler_table[state].base.reset; | |
2130 | ||
2131 | if (reset) | |
2132 | status = reset(&scic->parent); | |
2133 | else | |
2134 | dev_warn(scic_to_dev(scic), | |
2135 | "%s: SCIC Controller reset operation requested in " | |
068b2c03 | 2136 | "invalid state %d\n", __func__, state); |
6f231dda DW |
2137 | |
2138 | return status; | |
2139 | } | |
2140 | ||
35173d57 DW |
2141 | /** |
2142 | * scic_controller_start_io() - This method is called by the SCI user to | |
2143 | * send/start an IO request. If the method invocation is successful, then | |
2144 | * the IO request has been queued to the hardware for processing. | |
2145 | * @controller: the handle to the controller object for which to start an IO | |
2146 | * request. | |
2147 | * @remote_device: the handle to the remote device object for which to start an | |
2148 | * IO request. | |
2149 | * @io_request: the handle to the io request object to start. | |
2150 | * @io_tag: This parameter specifies a previously allocated IO tag that the | |
2151 | * user desires to be utilized for this request. This parameter is optional. | |
2152 | * The user is allowed to supply SCI_CONTROLLER_INVALID_IO_TAG as the value | |
2153 | * for this parameter. | |
2154 | * | |
2155 | * - IO tags are a protected resource. It is incumbent upon the SCI Core user | |
2156 | * to ensure that each of the methods that may allocate or free available IO | |
2157 | * tags are handled in a mutually exclusive manner. This method is one of said | |
2158 | * methods requiring proper critical code section protection (e.g. semaphore, | |
2159 | * spin-lock, etc.). - For SATA, the user is required to manage NCQ tags. As a | |
2160 | * result, it is expected the user will have set the NCQ tag field in the host | |
2161 | * to device register FIS prior to calling this method. There is also a | |
2162 | * requirement for the user to call scic_stp_io_set_ncq_tag() prior to invoking | |
2163 | * the scic_controller_start_io() method. scic_controller_allocate_tag() for | |
2164 | * more information on allocating a tag. Indicate if the controller | |
2165 | * successfully started the IO request. SCI_IO_SUCCESS if the IO request was | |
2166 | * successfully started. Determine the failure situations and return values. | |
2167 | */ | |
6f231dda DW |
2168 | enum sci_io_status scic_controller_start_io( |
2169 | struct scic_sds_controller *scic, | |
2170 | struct scic_sds_remote_device *remote_device, | |
2171 | struct scic_sds_request *io_request, | |
2172 | u16 io_tag) | |
2173 | { | |
2174 | u32 state; | |
2175 | sci_base_controller_start_request_handler_t start_io; | |
2176 | ||
2177 | state = scic->parent.state_machine.current_state_id; | |
2178 | start_io = scic_sds_controller_state_handler_table[state].base.start_io; | |
2179 | ||
2180 | return start_io(&scic->parent, | |
2181 | (struct sci_base_remote_device *) remote_device, | |
2182 | (struct sci_base_request *)io_request, io_tag); | |
2183 | } | |
2184 | ||
35173d57 DW |
2185 | /** |
2186 | * scic_controller_terminate_request() - This method is called by the SCI Core | |
2187 | * user to terminate an ongoing (i.e. started) core IO request. This does | |
2188 | * not abort the IO request at the target, but rather removes the IO request | |
2189 | * from the host controller. | |
2190 | * @controller: the handle to the controller object for which to terminate a | |
2191 | * request. | |
2192 | * @remote_device: the handle to the remote device object for which to | |
2193 | * terminate a request. | |
2194 | * @request: the handle to the io or task management request object to | |
2195 | * terminate. | |
2196 | * | |
2197 | * Indicate if the controller successfully began the terminate process for the | |
2198 | * IO request. SCI_SUCCESS if the terminate process was successfully started | |
2199 | * for the request. Determine the failure situations and return values. | |
2200 | */ | |
6f231dda DW |
2201 | enum sci_status scic_controller_terminate_request( |
2202 | struct scic_sds_controller *scic, | |
2203 | struct scic_sds_remote_device *remote_device, | |
2204 | struct scic_sds_request *request) | |
2205 | { | |
2206 | sci_base_controller_request_handler_t terminate_request; | |
2207 | u32 state; | |
2208 | ||
2209 | state = scic->parent.state_machine.current_state_id; | |
2210 | terminate_request = scic_sds_controller_state_handler_table[state].terminate_request; | |
2211 | ||
2212 | return terminate_request(&scic->parent, | |
2213 | (struct sci_base_remote_device *)remote_device, | |
2214 | (struct sci_base_request *)request); | |
2215 | } | |
2216 | ||
35173d57 DW |
2217 | /** |
2218 | * scic_controller_complete_io() - This method will perform core specific | |
2219 | * completion operations for an IO request. After this method is invoked, | |
2220 | * the user should consider the IO request as invalid until it is properly | |
2221 | * reused (i.e. re-constructed). | |
2222 | * @controller: The handle to the controller object for which to complete the | |
2223 | * IO request. | |
2224 | * @remote_device: The handle to the remote device object for which to complete | |
2225 | * the IO request. | |
2226 | * @io_request: the handle to the io request object to complete. | |
2227 | * | |
2228 | * - IO tags are a protected resource. It is incumbent upon the SCI Core user | |
2229 | * to ensure that each of the methods that may allocate or free available IO | |
2230 | * tags are handled in a mutually exclusive manner. This method is one of said | |
2231 | * methods requiring proper critical code section protection (e.g. semaphore, | |
2232 | * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI | |
2233 | * Core user, using the scic_controller_allocate_io_tag() method, then it is | |
2234 | * the responsibility of the caller to invoke the scic_controller_free_io_tag() | |
2235 | * method to free the tag (i.e. this method will not free the IO tag). Indicate | |
2236 | * if the controller successfully completed the IO request. SCI_SUCCESS if the | |
2237 | * completion process was successful. | |
2238 | */ | |
6f231dda DW |
2239 | enum sci_status scic_controller_complete_io( |
2240 | struct scic_sds_controller *scic, | |
2241 | struct scic_sds_remote_device *remote_device, | |
2242 | struct scic_sds_request *io_request) | |
2243 | { | |
2244 | u32 state; | |
2245 | sci_base_controller_request_handler_t complete_io; | |
2246 | ||
2247 | state = scic->parent.state_machine.current_state_id; | |
2248 | complete_io = scic_sds_controller_state_handler_table[state].base.complete_io; | |
2249 | ||
2250 | return complete_io(&scic->parent, | |
2251 | (struct sci_base_remote_device *)remote_device, | |
2252 | (struct sci_base_request *)io_request); | |
2253 | } | |
2254 | ||
35173d57 DW |
2255 | /** |
2256 | * scic_controller_start_task() - This method is called by the SCIC user to | |
2257 | * send/start a framework task management request. | |
2258 | * @controller: the handle to the controller object for which to start the task | |
2259 | * management request. | |
2260 | * @remote_device: the handle to the remote device object for which to start | |
2261 | * the task management request. | |
2262 | * @task_request: the handle to the task request object to start. | |
2263 | * @io_tag: This parameter specifies a previously allocated IO tag that the | |
2264 | * user desires to be utilized for this request. Note this not the io_tag | |
2265 | * of the request being managed. It is to be utilized for the task request | |
2266 | * itself. This parameter is optional. The user is allowed to supply | |
2267 | * SCI_CONTROLLER_INVALID_IO_TAG as the value for this parameter. | |
2268 | * | |
2269 | * - IO tags are a protected resource. It is incumbent upon the SCI Core user | |
2270 | * to ensure that each of the methods that may allocate or free available IO | |
2271 | * tags are handled in a mutually exclusive manner. This method is one of said | |
2272 | * methods requiring proper critical code section protection (e.g. semaphore, | |
2273 | * spin-lock, etc.). - The user must synchronize this task with completion | |
2274 | * queue processing. If they are not synchronized then it is possible for the | |
2275 | * io requests that are being managed by the task request can complete before | |
2276 | * starting the task request. scic_controller_allocate_tag() for more | |
2277 | * information on allocating a tag. Indicate if the controller successfully | |
2278 | * started the IO request. SCI_TASK_SUCCESS if the task request was | |
2279 | * successfully started. SCI_TASK_FAILURE_REQUIRES_SCSI_ABORT This value is | |
2280 | * returned if there is/are task(s) outstanding that require termination or | |
2281 | * completion before this request can succeed. | |
2282 | */ | |
6f231dda DW |
2283 | enum sci_task_status scic_controller_start_task( |
2284 | struct scic_sds_controller *scic, | |
2285 | struct scic_sds_remote_device *remote_device, | |
2286 | struct scic_sds_request *task_request, | |
2287 | u16 task_tag) | |
2288 | { | |
2289 | u32 state; | |
2290 | sci_base_controller_start_request_handler_t start_task; | |
2291 | enum sci_task_status status = SCI_TASK_FAILURE_INVALID_STATE; | |
2292 | ||
2293 | state = scic->parent.state_machine.current_state_id; | |
2294 | start_task = scic_sds_controller_state_handler_table[state].base.start_task; | |
2295 | ||
2296 | if (start_task) | |
2297 | status = start_task(&scic->parent, | |
2298 | (struct sci_base_remote_device *)remote_device, | |
2299 | (struct sci_base_request *)task_request, | |
2300 | task_tag); | |
2301 | else | |
2302 | dev_warn(scic_to_dev(scic), | |
2303 | "%s: SCIC Controller starting task from invalid " | |
2304 | "state\n", | |
2305 | __func__); | |
2306 | ||
2307 | return status; | |
2308 | } | |
2309 | ||
35173d57 DW |
2310 | /** |
2311 | * scic_controller_complete_task() - This method will perform core specific | |
2312 | * completion operations for task management request. After this method is | |
2313 | * invoked, the user should consider the task request as invalid until it is | |
2314 | * properly reused (i.e. re-constructed). | |
2315 | * @controller: The handle to the controller object for which to complete the | |
2316 | * task management request. | |
2317 | * @remote_device: The handle to the remote device object for which to complete | |
2318 | * the task management request. | |
2319 | * @task_request: the handle to the task management request object to complete. | |
2320 | * | |
2321 | * Indicate if the controller successfully completed the task management | |
2322 | * request. SCI_SUCCESS if the completion process was successful. | |
2323 | */ | |
6f231dda DW |
2324 | enum sci_status scic_controller_complete_task( |
2325 | struct scic_sds_controller *scic, | |
2326 | struct scic_sds_remote_device *remote_device, | |
2327 | struct scic_sds_request *task_request) | |
2328 | { | |
2329 | u32 state; | |
2330 | sci_base_controller_request_handler_t complete_task; | |
2331 | enum sci_status status = SCI_FAILURE_INVALID_STATE; | |
2332 | ||
2333 | state = scic->parent.state_machine.current_state_id; | |
2334 | complete_task = scic_sds_controller_state_handler_table[state].base.complete_task; | |
2335 | ||
2336 | if (complete_task) | |
2337 | status = complete_task(&scic->parent, | |
2338 | (struct sci_base_remote_device *)remote_device, | |
2339 | (struct sci_base_request *)task_request); | |
2340 | else | |
2341 | dev_warn(scic_to_dev(scic), | |
2342 | "%s: SCIC Controller completing task from invalid " | |
2343 | "state\n", | |
2344 | __func__); | |
2345 | ||
2346 | return status; | |
2347 | } | |
2348 | ||
2349 | ||
35173d57 DW |
2350 | /** |
2351 | * scic_controller_get_port_handle() - This method simply provides the user | |
2352 | * with a unique handle for a given SAS/SATA core port index. | |
2353 | * @controller: This parameter represents the handle to the controller object | |
2354 | * from which to retrieve a port (SAS or SATA) handle. | |
2355 | * @port_index: This parameter specifies the port index in the controller for | |
2356 | * which to retrieve the port handle. 0 <= port_index < maximum number of | |
2357 | * phys. | |
2358 | * @port_handle: This parameter specifies the retrieved port handle to be | |
2359 | * provided to the caller. | |
2360 | * | |
2361 | * Indicate if the retrieval of the port handle was successful. SCI_SUCCESS | |
2362 | * This value is returned if the retrieval was successful. | |
2363 | * SCI_FAILURE_INVALID_PORT This value is returned if the supplied port id is | |
2364 | * not in the supported range. | |
2365 | */ | |
6f231dda DW |
2366 | enum sci_status scic_controller_get_port_handle( |
2367 | struct scic_sds_controller *scic, | |
2368 | u8 port_index, | |
2369 | struct scic_sds_port **port_handle) | |
2370 | { | |
2371 | if (port_index < scic->logical_port_entries) { | |
2372 | *port_handle = &scic->port_table[port_index]; | |
2373 | ||
2374 | return SCI_SUCCESS; | |
2375 | } | |
2376 | ||
2377 | return SCI_FAILURE_INVALID_PORT; | |
2378 | } | |
2379 | ||
35173d57 DW |
2380 | /** |
2381 | * scic_controller_get_phy_handle() - This method simply provides the user with | |
2382 | * a unique handle for a given SAS/SATA phy index/identifier. | |
2383 | * @controller: This parameter represents the handle to the controller object | |
2384 | * from which to retrieve a phy (SAS or SATA) handle. | |
2385 | * @phy_index: This parameter specifies the phy index in the controller for | |
2386 | * which to retrieve the phy handle. 0 <= phy_index < maximum number of phys. | |
2387 | * @phy_handle: This parameter specifies the retrieved phy handle to be | |
2388 | * provided to the caller. | |
2389 | * | |
2390 | * Indicate if the retrieval of the phy handle was successful. SCI_SUCCESS This | |
2391 | * value is returned if the retrieval was successful. SCI_FAILURE_INVALID_PHY | |
2392 | * This value is returned if the supplied phy id is not in the supported range. | |
2393 | */ | |
6f231dda DW |
2394 | enum sci_status scic_controller_get_phy_handle( |
2395 | struct scic_sds_controller *scic, | |
2396 | u8 phy_index, | |
2397 | struct scic_sds_phy **phy_handle) | |
2398 | { | |
2399 | if (phy_index < ARRAY_SIZE(scic->phy_table)) { | |
2400 | *phy_handle = &scic->phy_table[phy_index]; | |
2401 | ||
2402 | return SCI_SUCCESS; | |
2403 | } | |
2404 | ||
2405 | dev_err(scic_to_dev(scic), | |
2406 | "%s: Controller:0x%p PhyId:0x%x invalid phy index\n", | |
2407 | __func__, scic, phy_index); | |
2408 | ||
2409 | return SCI_FAILURE_INVALID_PHY; | |
2410 | } | |
2411 | ||
35173d57 DW |
2412 | /** |
2413 | * scic_controller_allocate_io_tag() - This method will allocate a tag from the | |
2414 | * pool of free IO tags. Direct allocation of IO tags by the SCI Core user | |
2415 | * is optional. The scic_controller_start_io() method will allocate an IO | |
2416 | * tag if this method is not utilized and the tag is not supplied to the IO | |
2417 | * construct routine. Direct allocation of IO tags may provide additional | |
2418 | * performance improvements in environments capable of supporting this usage | |
2419 | * model. Additionally, direct allocation of IO tags also provides | |
2420 | * additional flexibility to the SCI Core user. Specifically, the user may | |
2421 | * retain IO tags across the lives of multiple IO requests. | |
2422 | * @controller: the handle to the controller object for which to allocate the | |
2423 | * tag. | |
2424 | * | |
2425 | * IO tags are a protected resource. It is incumbent upon the SCI Core user to | |
2426 | * ensure that each of the methods that may allocate or free available IO tags | |
2427 | * are handled in a mutually exclusive manner. This method is one of said | |
2428 | * methods requiring proper critical code section protection (e.g. semaphore, | |
2429 | * spin-lock, etc.). An unsigned integer representing an available IO tag. | |
2430 | * SCI_CONTROLLER_INVALID_IO_TAG This value is returned if there are no | |
2431 | * currently available tags to be allocated. All return other values indicate a | |
2432 | * legitimate tag. | |
2433 | */ | |
6f231dda DW |
2434 | u16 scic_controller_allocate_io_tag( |
2435 | struct scic_sds_controller *scic) | |
2436 | { | |
2437 | u16 task_context; | |
2438 | u16 sequence_count; | |
2439 | ||
2440 | if (!sci_pool_empty(scic->tci_pool)) { | |
2441 | sci_pool_get(scic->tci_pool, task_context); | |
2442 | ||
2443 | sequence_count = scic->io_request_sequence[task_context]; | |
2444 | ||
2445 | return scic_sds_io_tag_construct(sequence_count, task_context); | |
2446 | } | |
2447 | ||
2448 | return SCI_CONTROLLER_INVALID_IO_TAG; | |
2449 | } | |
2450 | ||
35173d57 DW |
2451 | /** |
2452 | * scic_controller_free_io_tag() - This method will free an IO tag to the pool | |
2453 | * of free IO tags. This method provides the SCI Core user more flexibility | |
2454 | * with regards to IO tags. The user may desire to keep an IO tag after an | |
2455 | * IO request has completed, because they plan on re-using the tag for a | |
2456 | * subsequent IO request. This method is only legal if the tag was | |
2457 | * allocated via scic_controller_allocate_io_tag(). | |
2458 | * @controller: This parameter specifies the handle to the controller object | |
2459 | * for which to free/return the tag. | |
2460 | * @io_tag: This parameter represents the tag to be freed to the pool of | |
2461 | * available tags. | |
2462 | * | |
2463 | * - IO tags are a protected resource. It is incumbent upon the SCI Core user | |
2464 | * to ensure that each of the methods that may allocate or free available IO | |
2465 | * tags are handled in a mutually exclusive manner. This method is one of said | |
2466 | * methods requiring proper critical code section protection (e.g. semaphore, | |
2467 | * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI | |
2468 | * Core user, using the scic_controller_allocate_io_tag() method, then it is | |
2469 | * the responsibility of the caller to invoke this method to free the tag. This | |
2470 | * method returns an indication of whether the tag was successfully put back | |
2471 | * (freed) to the pool of available tags. SCI_SUCCESS This return value | |
2472 | * indicates the tag was successfully placed into the pool of available IO | |
2473 | * tags. SCI_FAILURE_INVALID_IO_TAG This value is returned if the supplied tag | |
2474 | * is not a valid IO tag value. | |
2475 | */ | |
6f231dda DW |
2476 | enum sci_status scic_controller_free_io_tag( |
2477 | struct scic_sds_controller *scic, | |
2478 | u16 io_tag) | |
2479 | { | |
2480 | u16 sequence; | |
2481 | u16 index; | |
2482 | ||
2483 | BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG); | |
2484 | ||
2485 | sequence = scic_sds_io_tag_get_sequence(io_tag); | |
2486 | index = scic_sds_io_tag_get_index(io_tag); | |
2487 | ||
2488 | if (!sci_pool_full(scic->tci_pool)) { | |
2489 | if (sequence == scic->io_request_sequence[index]) { | |
2490 | scic_sds_io_sequence_increment( | |
2491 | scic->io_request_sequence[index]); | |
2492 | ||
2493 | sci_pool_put(scic->tci_pool, index); | |
2494 | ||
2495 | return SCI_SUCCESS; | |
2496 | } | |
2497 | } | |
2498 | ||
2499 | return SCI_FAILURE_INVALID_IO_TAG; | |
2500 | } | |
2501 | ||
6f231dda DW |
2502 | void scic_controller_enable_interrupts( |
2503 | struct scic_sds_controller *scic) | |
2504 | { | |
2505 | BUG_ON(scic->smu_registers == NULL); | |
2506 | SMU_IMR_WRITE(scic, 0x00000000); | |
2507 | } | |
2508 | ||
6f231dda DW |
2509 | void scic_controller_disable_interrupts( |
2510 | struct scic_sds_controller *scic) | |
2511 | { | |
2512 | BUG_ON(scic->smu_registers == NULL); | |
2513 | SMU_IMR_WRITE(scic, 0xffffffff); | |
2514 | } | |
2515 | ||
35173d57 | 2516 | static enum sci_status scic_controller_set_mode( |
6f231dda DW |
2517 | struct scic_sds_controller *scic, |
2518 | enum sci_controller_mode operating_mode) | |
2519 | { | |
2520 | enum sci_status status = SCI_SUCCESS; | |
2521 | ||
2522 | if ((scic->parent.state_machine.current_state_id == | |
2523 | SCI_BASE_CONTROLLER_STATE_INITIALIZING) || | |
2524 | (scic->parent.state_machine.current_state_id == | |
2525 | SCI_BASE_CONTROLLER_STATE_INITIALIZED)) { | |
2526 | switch (operating_mode) { | |
2527 | case SCI_MODE_SPEED: | |
2528 | scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES; | |
2529 | scic->task_context_entries = SCU_IO_REQUEST_COUNT; | |
2530 | scic->uf_control.buffers.count = | |
2531 | SCU_UNSOLICITED_FRAME_COUNT; | |
2532 | scic->completion_event_entries = SCU_EVENT_COUNT; | |
2533 | scic->completion_queue_entries = | |
2534 | SCU_COMPLETION_QUEUE_COUNT; | |
2535 | scic_sds_controller_build_memory_descriptor_table(scic); | |
2536 | break; | |
2537 | ||
2538 | case SCI_MODE_SIZE: | |
2539 | scic->remote_node_entries = SCI_MIN_REMOTE_DEVICES; | |
2540 | scic->task_context_entries = SCI_MIN_IO_REQUESTS; | |
2541 | scic->uf_control.buffers.count = | |
2542 | SCU_MIN_UNSOLICITED_FRAMES; | |
2543 | scic->completion_event_entries = SCU_MIN_EVENTS; | |
2544 | scic->completion_queue_entries = | |
2545 | SCU_MIN_COMPLETION_QUEUE_ENTRIES; | |
2546 | scic_sds_controller_build_memory_descriptor_table(scic); | |
2547 | break; | |
2548 | ||
2549 | default: | |
2550 | status = SCI_FAILURE_INVALID_PARAMETER_VALUE; | |
2551 | break; | |
2552 | } | |
2553 | } else | |
2554 | status = SCI_FAILURE_INVALID_STATE; | |
2555 | ||
2556 | return status; | |
2557 | } | |
2558 | ||
2559 | /** | |
2560 | * scic_sds_controller_reset_hardware() - | |
2561 | * | |
2562 | * This method will reset the controller hardware. | |
2563 | */ | |
35173d57 | 2564 | static void scic_sds_controller_reset_hardware( |
6f231dda DW |
2565 | struct scic_sds_controller *scic) |
2566 | { | |
2567 | /* Disable interrupts so we dont take any spurious interrupts */ | |
2568 | scic_controller_disable_interrupts(scic); | |
2569 | ||
2570 | /* Reset the SCU */ | |
2571 | SMU_SMUSRCR_WRITE(scic, 0xFFFFFFFF); | |
2572 | ||
2573 | /* Delay for 1ms to before clearing the CQP and UFQPR. */ | |
7392d275 | 2574 | udelay(1000); |
6f231dda DW |
2575 | |
2576 | /* The write to the CQGR clears the CQP */ | |
2577 | SMU_CQGR_WRITE(scic, 0x00000000); | |
2578 | ||
2579 | /* The write to the UFQGP clears the UFQPR */ | |
2580 | SCU_UFQGP_WRITE(scic, 0x00000000); | |
2581 | } | |
2582 | ||
6f231dda DW |
2583 | enum sci_status scic_user_parameters_set( |
2584 | struct scic_sds_controller *scic, | |
2585 | union scic_user_parameters *scic_parms) | |
2586 | { | |
b5f18a20 DJ |
2587 | u32 state = scic->parent.state_machine.current_state_id; |
2588 | ||
2589 | if (state == SCI_BASE_CONTROLLER_STATE_RESET || | |
2590 | state == SCI_BASE_CONTROLLER_STATE_INITIALIZING || | |
2591 | state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) { | |
6f231dda DW |
2592 | u16 index; |
2593 | ||
2594 | /* | |
2595 | * Validate the user parameters. If they are not legal, then | |
b5f18a20 DJ |
2596 | * return a failure. |
2597 | */ | |
6f231dda | 2598 | for (index = 0; index < SCI_MAX_PHYS; index++) { |
b5f18a20 DJ |
2599 | struct sci_phy_user_params *user_phy; |
2600 | ||
2601 | user_phy = &scic_parms->sds1.phys[index]; | |
2602 | ||
2603 | if (!((user_phy->max_speed_generation <= | |
2604 | SCIC_SDS_PARM_MAX_SPEED) && | |
2605 | (user_phy->max_speed_generation > | |
2606 | SCIC_SDS_PARM_NO_SPEED))) | |
d9def184 JD |
2607 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; |
2608 | ||
b5f18a20 DJ |
2609 | if (user_phy->in_connection_align_insertion_frequency < |
2610 | 3) | |
d9def184 | 2611 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; |
b5f18a20 DJ |
2612 | |
2613 | if ((user_phy->in_connection_align_insertion_frequency < | |
2614 | 3) || | |
2615 | (user_phy->align_insertion_frequency == 0) || | |
2616 | (user_phy-> | |
2617 | notify_enable_spin_up_insertion_frequency == | |
2618 | 0)) | |
6f231dda DW |
2619 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; |
2620 | } | |
2621 | ||
d9def184 | 2622 | if ((scic_parms->sds1.stp_inactivity_timeout == 0) || |
b5f18a20 DJ |
2623 | (scic_parms->sds1.ssp_inactivity_timeout == 0) || |
2624 | (scic_parms->sds1.stp_max_occupancy_timeout == 0) || | |
2625 | (scic_parms->sds1.ssp_max_occupancy_timeout == 0) || | |
2626 | (scic_parms->sds1.no_outbound_task_timeout == 0)) | |
d9def184 JD |
2627 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; |
2628 | ||
6f231dda DW |
2629 | memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms)); |
2630 | ||
2631 | return SCI_SUCCESS; | |
2632 | } | |
2633 | ||
2634 | return SCI_FAILURE_INVALID_STATE; | |
2635 | } | |
2636 | ||
6f231dda DW |
2637 | enum sci_status scic_oem_parameters_set( |
2638 | struct scic_sds_controller *scic, | |
2639 | union scic_oem_parameters *scic_parms) | |
2640 | { | |
4711ba10 DW |
2641 | u32 state = scic->parent.state_machine.current_state_id; |
2642 | ||
2643 | if (state == SCI_BASE_CONTROLLER_STATE_RESET || | |
2644 | state == SCI_BASE_CONTROLLER_STATE_INITIALIZING || | |
2645 | state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) { | |
6f231dda | 2646 | u16 index; |
07373a5c | 2647 | u8 combined_phy_mask = 0; |
6f231dda DW |
2648 | |
2649 | /* | |
2650 | * Validate the oem parameters. If they are not legal, then | |
2651 | * return a failure. */ | |
2652 | for (index = 0; index < SCI_MAX_PORTS; index++) { | |
b5f18a20 | 2653 | if (scic_parms->sds1.ports[index].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX) |
6f231dda | 2654 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; |
6f231dda DW |
2655 | } |
2656 | ||
2657 | for (index = 0; index < SCI_MAX_PHYS; index++) { | |
b5f18a20 DJ |
2658 | if ((scic_parms->sds1.phys[index].sas_address.high == 0) && |
2659 | (scic_parms->sds1.phys[index].sas_address.low == 0)) | |
6f231dda | 2660 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; |
6f231dda DW |
2661 | } |
2662 | ||
b5f18a20 DJ |
2663 | if (scic_parms->sds1.controller.mode_type == |
2664 | SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE) { | |
07373a5c HD |
2665 | for (index = 0; index < SCI_MAX_PHYS; index++) { |
2666 | if (scic_parms->sds1.ports[index].phy_mask != 0) | |
2667 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; | |
2668 | } | |
b5f18a20 DJ |
2669 | } else if (scic_parms->sds1.controller.mode_type == |
2670 | SCIC_PORT_MANUAL_CONFIGURATION_MODE) { | |
07373a5c HD |
2671 | for (index = 0; index < SCI_MAX_PHYS; index++) |
2672 | combined_phy_mask |= scic_parms->sds1.ports[index].phy_mask; | |
2673 | ||
2674 | if (combined_phy_mask == 0) | |
2675 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; | |
b5f18a20 | 2676 | } else |
07373a5c | 2677 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; |
07373a5c | 2678 | |
b5f18a20 DJ |
2679 | if (scic_parms->sds1.controller.max_concurrent_dev_spin_up > |
2680 | MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT) | |
07373a5c HD |
2681 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; |
2682 | ||
4711ba10 DW |
2683 | scic->oem_parameters.sds1 = scic_parms->sds1; |
2684 | ||
6f231dda DW |
2685 | return SCI_SUCCESS; |
2686 | } | |
2687 | ||
2688 | return SCI_FAILURE_INVALID_STATE; | |
2689 | } | |
2690 | ||
6f231dda DW |
2691 | void scic_oem_parameters_get( |
2692 | struct scic_sds_controller *scic, | |
2693 | union scic_oem_parameters *scic_parms) | |
2694 | { | |
2695 | memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms)); | |
2696 | } | |
2697 | ||
6f231dda DW |
2698 | #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853 |
2699 | #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280 | |
2700 | #define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000 | |
2701 | #define INTERRUPT_COALESCE_NUMBER_MAX 256 | |
2702 | #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7 | |
2703 | #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28 | |
2704 | ||
35173d57 DW |
2705 | /** |
2706 | * scic_controller_set_interrupt_coalescence() - This method allows the user to | |
2707 | * configure the interrupt coalescence. | |
2708 | * @controller: This parameter represents the handle to the controller object | |
2709 | * for which its interrupt coalesce register is overridden. | |
2710 | * @coalesce_number: Used to control the number of entries in the Completion | |
2711 | * Queue before an interrupt is generated. If the number of entries exceed | |
2712 | * this number, an interrupt will be generated. The valid range of the input | |
2713 | * is [0, 256]. A setting of 0 results in coalescing being disabled. | |
2714 | * @coalesce_timeout: Timeout value in microseconds. The valid range of the | |
2715 | * input is [0, 2700000] . A setting of 0 is allowed and results in no | |
2716 | * interrupt coalescing timeout. | |
2717 | * | |
2718 | * Indicate if the user successfully set the interrupt coalesce parameters. | |
2719 | * SCI_SUCCESS The user successfully updated the interrutp coalescence. | |
2720 | * SCI_FAILURE_INVALID_PARAMETER_VALUE The user input value is out of range. | |
2721 | */ | |
2722 | static enum sci_status scic_controller_set_interrupt_coalescence( | |
6f231dda DW |
2723 | struct scic_sds_controller *scic_controller, |
2724 | u32 coalesce_number, | |
2725 | u32 coalesce_timeout) | |
2726 | { | |
2727 | u8 timeout_encode = 0; | |
2728 | u32 min = 0; | |
2729 | u32 max = 0; | |
2730 | ||
2731 | /* Check if the input parameters fall in the range. */ | |
2732 | if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX) | |
2733 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; | |
2734 | ||
2735 | /* | |
2736 | * Defined encoding for interrupt coalescing timeout: | |
2737 | * Value Min Max Units | |
2738 | * ----- --- --- ----- | |
2739 | * 0 - - Disabled | |
2740 | * 1 13.3 20.0 ns | |
2741 | * 2 26.7 40.0 | |
2742 | * 3 53.3 80.0 | |
2743 | * 4 106.7 160.0 | |
2744 | * 5 213.3 320.0 | |
2745 | * 6 426.7 640.0 | |
2746 | * 7 853.3 1280.0 | |
2747 | * 8 1.7 2.6 us | |
2748 | * 9 3.4 5.1 | |
2749 | * 10 6.8 10.2 | |
2750 | * 11 13.7 20.5 | |
2751 | * 12 27.3 41.0 | |
2752 | * 13 54.6 81.9 | |
2753 | * 14 109.2 163.8 | |
2754 | * 15 218.5 327.7 | |
2755 | * 16 436.9 655.4 | |
2756 | * 17 873.8 1310.7 | |
2757 | * 18 1.7 2.6 ms | |
2758 | * 19 3.5 5.2 | |
2759 | * 20 7.0 10.5 | |
2760 | * 21 14.0 21.0 | |
2761 | * 22 28.0 41.9 | |
2762 | * 23 55.9 83.9 | |
2763 | * 24 111.8 167.8 | |
2764 | * 25 223.7 335.5 | |
2765 | * 26 447.4 671.1 | |
2766 | * 27 894.8 1342.2 | |
2767 | * 28 1.8 2.7 s | |
2768 | * Others Undefined */ | |
2769 | ||
2770 | /* | |
2771 | * Use the table above to decide the encode of interrupt coalescing timeout | |
2772 | * value for register writing. */ | |
2773 | if (coalesce_timeout == 0) | |
2774 | timeout_encode = 0; | |
2775 | else{ | |
2776 | /* make the timeout value in unit of (10 ns). */ | |
2777 | coalesce_timeout = coalesce_timeout * 100; | |
2778 | min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10; | |
2779 | max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10; | |
2780 | ||
2781 | /* get the encode of timeout for register writing. */ | |
2782 | for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN; | |
2783 | timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX; | |
2784 | timeout_encode++) { | |
2785 | if (min <= coalesce_timeout && max > coalesce_timeout) | |
2786 | break; | |
2787 | else if (coalesce_timeout >= max && coalesce_timeout < min * 2 | |
2788 | && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) { | |
2789 | if ((coalesce_timeout - max) < (2 * min - coalesce_timeout)) | |
2790 | break; | |
2791 | else{ | |
2792 | timeout_encode++; | |
2793 | break; | |
2794 | } | |
2795 | } else { | |
2796 | max = max * 2; | |
2797 | min = min * 2; | |
2798 | } | |
2799 | } | |
2800 | ||
2801 | if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1) | |
2802 | /* the value is out of range. */ | |
2803 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; | |
2804 | } | |
2805 | ||
2806 | SMU_ICC_WRITE( | |
2807 | scic_controller, | |
2808 | (SMU_ICC_GEN_VAL(NUMBER, coalesce_number) | | |
2809 | SMU_ICC_GEN_VAL(TIMER, timeout_encode)) | |
2810 | ); | |
2811 | ||
2812 | scic_controller->interrupt_coalesce_number = (u16)coalesce_number; | |
2813 | scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100; | |
2814 | ||
2815 | return SCI_SUCCESS; | |
2816 | } | |
2817 | ||
2818 | ||
2819 | struct scic_sds_controller *scic_controller_alloc(struct device *dev) | |
2820 | { | |
2821 | return devm_kzalloc(dev, sizeof(struct scic_sds_controller), GFP_KERNEL); | |
2822 | } | |
2823 | ||
068b2c03 DW |
2824 | static enum sci_status default_controller_handler(struct sci_base_controller *base_scic, |
2825 | const char *func) | |
2826 | { | |
2827 | struct scic_sds_controller *scic = container_of(base_scic, typeof(*scic), parent); | |
2828 | u32 state = base_scic->state_machine.current_state_id; | |
2829 | ||
2830 | dev_warn(scic_to_dev(scic), "%s: invalid state %d\n", func, state); | |
2831 | ||
2832 | return SCI_FAILURE_INVALID_STATE; | |
2833 | } | |
6f231dda | 2834 | |
6f231dda | 2835 | static enum sci_status scic_sds_controller_default_start_operation_handler( |
068b2c03 | 2836 | struct sci_base_controller *base_scic, |
6f231dda DW |
2837 | struct sci_base_remote_device *remote_device, |
2838 | struct sci_base_request *io_request, | |
2839 | u16 io_tag) | |
2840 | { | |
068b2c03 | 2841 | return default_controller_handler(base_scic, __func__); |
6f231dda DW |
2842 | } |
2843 | ||
6f231dda | 2844 | static enum sci_status scic_sds_controller_default_request_handler( |
068b2c03 | 2845 | struct sci_base_controller *base_scic, |
6f231dda DW |
2846 | struct sci_base_remote_device *remote_device, |
2847 | struct sci_base_request *io_request) | |
2848 | { | |
068b2c03 | 2849 | return default_controller_handler(base_scic, __func__); |
6f231dda DW |
2850 | } |
2851 | ||
068b2c03 | 2852 | static enum sci_status scic_sds_controller_general_reset_handler(struct sci_base_controller *base_scic) |
6f231dda | 2853 | { |
068b2c03 DW |
2854 | /* The reset operation is not a graceful cleanup just perform the state |
2855 | * transition. | |
2856 | */ | |
2857 | sci_base_state_machine_change_state(&base_scic->state_machine, | |
2858 | SCI_BASE_CONTROLLER_STATE_RESETTING); | |
6f231dda DW |
2859 | |
2860 | return SCI_SUCCESS; | |
2861 | } | |
2862 | ||
09d7da13 | 2863 | static enum sci_status scic_sds_controller_reset_state_initialize_handler(struct sci_base_controller *base_scic) |
6f231dda | 2864 | { |
068b2c03 | 2865 | struct sci_base_state_machine *sm = &base_scic->state_machine; |
6f231dda | 2866 | enum sci_status result = SCI_SUCCESS; |
09d7da13 DJ |
2867 | struct scic_sds_controller *scic; |
2868 | struct isci_host *ihost; | |
068b2c03 | 2869 | u32 index, state; |
6f231dda | 2870 | |
09d7da13 DJ |
2871 | scic = container_of(base_scic, typeof(*scic), parent); |
2872 | ihost = sci_object_get_association(scic); | |
6f231dda | 2873 | |
068b2c03 | 2874 | sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_INITIALIZING); |
6f231dda | 2875 | |
09d7da13 DJ |
2876 | scic->timeout_timer = isci_timer_create(ihost, |
2877 | scic, | |
2878 | scic_sds_controller_timeout_handler); | |
6f231dda | 2879 | |
09d7da13 | 2880 | scic_sds_controller_initialize_phy_startup(scic); |
6f231dda | 2881 | |
09d7da13 | 2882 | scic_sds_controller_initialize_power_control(scic); |
6f231dda DW |
2883 | |
2884 | /* | |
2885 | * There is nothing to do here for B0 since we do not have to | |
2886 | * program the AFE registers. | |
2887 | * / @todo The AFE settings are supposed to be correct for the B0 but | |
2888 | * / presently they seem to be wrong. */ | |
09d7da13 | 2889 | scic_sds_controller_afe_initialization(scic); |
6f231dda | 2890 | |
09d7da13 | 2891 | if (result == SCI_SUCCESS) { |
6f231dda DW |
2892 | u32 status; |
2893 | u32 terminate_loop; | |
2894 | ||
2895 | /* Take the hardware out of reset */ | |
09d7da13 | 2896 | SMU_SMUSRCR_WRITE(scic, 0x00000000); |
6f231dda DW |
2897 | |
2898 | /* | |
2899 | * / @todo Provide meaningfull error code for hardware failure | |
2900 | * result = SCI_FAILURE_CONTROLLER_HARDWARE; */ | |
2901 | result = SCI_FAILURE; | |
2902 | terminate_loop = 100; | |
2903 | ||
2904 | while (terminate_loop-- && (result != SCI_SUCCESS)) { | |
2905 | /* Loop until the hardware reports success */ | |
7392d275 | 2906 | udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME); |
09d7da13 | 2907 | status = SMU_SMUCSR_READ(scic); |
6f231dda | 2908 | |
09d7da13 DJ |
2909 | if ((status & SCU_RAM_INIT_COMPLETED) == |
2910 | SCU_RAM_INIT_COMPLETED) | |
6f231dda | 2911 | result = SCI_SUCCESS; |
6f231dda DW |
2912 | } |
2913 | } | |
2914 | ||
2915 | if (result == SCI_SUCCESS) { | |
2916 | u32 max_supported_ports; | |
2917 | u32 max_supported_devices; | |
2918 | u32 max_supported_io_requests; | |
2919 | u32 device_context_capacity; | |
2920 | ||
2921 | /* | |
2922 | * Determine what are the actaul device capacities that the | |
2923 | * hardware will support */ | |
09d7da13 | 2924 | device_context_capacity = SMU_DCC_READ(scic); |
6f231dda | 2925 | |
09d7da13 DJ |
2926 | max_supported_ports = smu_dcc_get_max_ports(device_context_capacity); |
2927 | max_supported_devices = smu_dcc_get_max_remote_node_context(device_context_capacity); | |
2928 | max_supported_io_requests = smu_dcc_get_max_task_context(device_context_capacity); | |
6f231dda | 2929 | |
09d7da13 DJ |
2930 | /* |
2931 | * Make all PEs that are unassigned match up with the | |
2932 | * logical ports | |
2933 | */ | |
6f231dda | 2934 | for (index = 0; index < max_supported_ports; index++) { |
09d7da13 DJ |
2935 | struct scu_port_task_scheduler_group_registers *ptsg = |
2936 | &scic->scu_registers->peg0.ptsg; | |
2937 | ||
2938 | scu_register_write(scic, | |
2939 | ptsg->protocol_engine[index], | |
2940 | index); | |
6f231dda DW |
2941 | } |
2942 | ||
2943 | /* Record the smaller of the two capacity values */ | |
09d7da13 DJ |
2944 | scic->logical_port_entries = |
2945 | min(max_supported_ports, scic->logical_port_entries); | |
6f231dda | 2946 | |
09d7da13 DJ |
2947 | scic->task_context_entries = |
2948 | min(max_supported_io_requests, | |
2949 | scic->task_context_entries); | |
6f231dda | 2950 | |
09d7da13 DJ |
2951 | scic->remote_node_entries = |
2952 | min(max_supported_devices, scic->remote_node_entries); | |
6f231dda DW |
2953 | |
2954 | /* | |
2955 | * Now that we have the correct hardware reported minimum values | |
2956 | * build the MDL for the controller. Default to a performance | |
09d7da13 DJ |
2957 | * configuration. |
2958 | */ | |
2959 | scic_controller_set_mode(scic, SCI_MODE_SPEED); | |
6f231dda DW |
2960 | } |
2961 | ||
2962 | /* Initialize hardware PCI Relaxed ordering in DMA engines */ | |
2963 | if (result == SCI_SUCCESS) { | |
2964 | u32 dma_configuration; | |
2965 | ||
2966 | /* Configure the payload DMA */ | |
09d7da13 DJ |
2967 | dma_configuration = SCU_PDMACR_READ(scic); |
2968 | dma_configuration |= | |
2969 | SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE); | |
2970 | SCU_PDMACR_WRITE(scic, dma_configuration); | |
6f231dda DW |
2971 | |
2972 | /* Configure the control DMA */ | |
09d7da13 DJ |
2973 | dma_configuration = SCU_CDMACR_READ(scic); |
2974 | dma_configuration |= | |
2975 | SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE); | |
2976 | SCU_CDMACR_WRITE(scic, dma_configuration); | |
6f231dda DW |
2977 | } |
2978 | ||
2979 | /* | |
2980 | * Initialize the PHYs before the PORTs because the PHY registers | |
09d7da13 DJ |
2981 | * are accessed during the port initialization. |
2982 | */ | |
6f231dda DW |
2983 | if (result == SCI_SUCCESS) { |
2984 | /* Initialize the phys */ | |
2985 | for (index = 0; | |
2986 | (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS); | |
2987 | index++) { | |
2988 | result = scic_sds_phy_initialize( | |
09d7da13 DJ |
2989 | &scic->phy_table[index], |
2990 | &scic->scu_registers->peg0.pe[index].tl, | |
2991 | &scic->scu_registers->peg0.pe[index].ll); | |
6f231dda DW |
2992 | } |
2993 | } | |
2994 | ||
2995 | if (result == SCI_SUCCESS) { | |
2996 | /* Initialize the logical ports */ | |
2997 | for (index = 0; | |
09d7da13 DJ |
2998 | (index < scic->logical_port_entries) && |
2999 | (result == SCI_SUCCESS); | |
6f231dda DW |
3000 | index++) { |
3001 | result = scic_sds_port_initialize( | |
09d7da13 DJ |
3002 | &scic->port_table[index], |
3003 | &scic->scu_registers->peg0.ptsg.port[index], | |
3004 | &scic->scu_registers->peg0.ptsg.protocol_engine, | |
3005 | &scic->scu_registers->peg0.viit[index]); | |
6f231dda DW |
3006 | } |
3007 | } | |
3008 | ||
09d7da13 | 3009 | if (result == SCI_SUCCESS) |
6f231dda | 3010 | result = scic_sds_port_configuration_agent_initialize( |
09d7da13 DJ |
3011 | scic, |
3012 | &scic->port_agent); | |
6f231dda DW |
3013 | |
3014 | /* Advance the controller state machine */ | |
09d7da13 | 3015 | if (result == SCI_SUCCESS) |
068b2c03 | 3016 | state = SCI_BASE_CONTROLLER_STATE_INITIALIZED; |
09d7da13 | 3017 | else |
068b2c03 DW |
3018 | state = SCI_BASE_CONTROLLER_STATE_FAILED; |
3019 | sci_base_state_machine_change_state(sm, state); | |
6f231dda DW |
3020 | |
3021 | return result; | |
3022 | } | |
3023 | ||
3024 | /* | |
3025 | * ***************************************************************************** | |
3026 | * * INITIALIZED STATE HANDLERS | |
3027 | * ***************************************************************************** */ | |
3028 | ||
3029 | /** | |
3030 | * | |
09d7da13 DJ |
3031 | * @controller: This is the struct sci_base_controller object which is cast |
3032 | * into a struct scic_sds_controller object. | |
6f231dda DW |
3033 | * @timeout: This is the allowed time for the controller object to reach the |
3034 | * started state. | |
3035 | * | |
09d7da13 DJ |
3036 | * This function is the struct scic_sds_controller start handler for the |
3037 | * initialized state. | |
3038 | * - Validate we have a good memory descriptor table - Initialze the | |
6f231dda DW |
3039 | * physical memory before programming the hardware - Program the SCU hardware |
3040 | * with the physical memory addresses passed in the memory descriptor table. - | |
3041 | * Initialzie the TCi pool - Initialize the RNi pool - Initialize the | |
3042 | * completion queue - Initialize the unsolicited frame data - Take the SCU port | |
3043 | * task scheduler out of reset - Start the first phy object. - Transition to | |
3044 | * SCI_BASE_CONTROLLER_STATE_STARTING. enum sci_status SCI_SUCCESS if all of the | |
3045 | * controller start operations complete | |
3046 | * SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD if one or more of the memory | |
3047 | * descriptor fields is invalid. | |
3048 | */ | |
3049 | static enum sci_status scic_sds_controller_initialized_state_start_handler( | |
068b2c03 | 3050 | struct sci_base_controller *base_scic, |
6f231dda DW |
3051 | u32 timeout) |
3052 | { | |
3053 | u16 index; | |
3054 | enum sci_status result; | |
09d7da13 | 3055 | struct scic_sds_controller *scic; |
6f231dda | 3056 | |
068b2c03 | 3057 | scic = container_of(base_scic, typeof(*scic), parent); |
6f231dda | 3058 | |
09d7da13 DJ |
3059 | /* |
3060 | * Make sure that the SCI User filled in the memory descriptor | |
3061 | * table correctly | |
3062 | */ | |
3063 | result = scic_sds_controller_validate_memory_descriptor_table(scic); | |
6f231dda DW |
3064 | |
3065 | if (result == SCI_SUCCESS) { | |
09d7da13 DJ |
3066 | /* |
3067 | * The memory descriptor list looks good so program the | |
3068 | * hardware | |
3069 | */ | |
3070 | scic_sds_controller_ram_initialization(scic); | |
6f231dda DW |
3071 | } |
3072 | ||
a8d4b9fe | 3073 | if (result == SCI_SUCCESS) { |
6f231dda | 3074 | /* Build the TCi free pool */ |
09d7da13 DJ |
3075 | sci_pool_initialize(scic->tci_pool); |
3076 | for (index = 0; index < scic->task_context_entries; index++) | |
3077 | sci_pool_put(scic->tci_pool, index); | |
6f231dda DW |
3078 | |
3079 | /* Build the RNi free pool */ | |
3080 | scic_sds_remote_node_table_initialize( | |
09d7da13 DJ |
3081 | &scic->available_remote_nodes, |
3082 | scic->remote_node_entries); | |
6f231dda DW |
3083 | } |
3084 | ||
a8d4b9fe | 3085 | if (result == SCI_SUCCESS) { |
6f231dda | 3086 | /* |
09d7da13 DJ |
3087 | * Before anything else lets make sure we will not be |
3088 | * interrupted by the hardware. | |
3089 | */ | |
3090 | scic_controller_disable_interrupts(scic); | |
6f231dda DW |
3091 | |
3092 | /* Enable the port task scheduler */ | |
09d7da13 | 3093 | scic_sds_controller_enable_port_task_scheduler(scic); |
6f231dda | 3094 | |
09d7da13 DJ |
3095 | /* Assign all the task entries to scic physical function */ |
3096 | scic_sds_controller_assign_task_entries(scic); | |
6f231dda DW |
3097 | |
3098 | /* Now initialze the completion queue */ | |
09d7da13 | 3099 | scic_sds_controller_initialize_completion_queue(scic); |
6f231dda DW |
3100 | |
3101 | /* Initialize the unsolicited frame queue for use */ | |
09d7da13 | 3102 | scic_sds_controller_initialize_unsolicited_frame_queue(scic); |
6f231dda DW |
3103 | } |
3104 | ||
a8d4b9fe | 3105 | /* Start all of the ports on this controller */ |
09d7da13 DJ |
3106 | for (index = 0; |
3107 | (index < scic->logical_port_entries) && (result == SCI_SUCCESS); | |
3108 | index++) { | |
3109 | struct scic_sds_port *sci_port = &scic->port_table[index]; | |
a8d4b9fe | 3110 | |
09d7da13 DJ |
3111 | result = sci_port->state_handlers->parent.start_handler( |
3112 | &sci_port->parent); | |
a8d4b9fe TC |
3113 | } |
3114 | ||
3115 | if (result == SCI_SUCCESS) { | |
09d7da13 | 3116 | scic_sds_controller_start_next_phy(scic); |
6f231dda | 3117 | |
09d7da13 | 3118 | isci_timer_start(scic->timeout_timer, timeout); |
6f231dda | 3119 | |
068b2c03 DW |
3120 | sci_base_state_machine_change_state(&base_scic->state_machine, |
3121 | SCI_BASE_CONTROLLER_STATE_STARTING); | |
6f231dda DW |
3122 | } |
3123 | ||
3124 | return result; | |
3125 | } | |
3126 | ||
3127 | /* | |
3128 | * ***************************************************************************** | |
3129 | * * INITIALIZED STATE HANDLERS | |
3130 | * ***************************************************************************** */ | |
3131 | ||
3132 | /** | |
3133 | * | |
3134 | * @controller: This is struct scic_sds_controller which receives the link up | |
3135 | * notification. | |
3136 | * @port: This is struct scic_sds_port with which the phy is associated. | |
3137 | * @phy: This is the struct scic_sds_phy which has gone link up. | |
3138 | * | |
3139 | * This method is called when the struct scic_sds_controller is in the starting state | |
3140 | * link up handler is called. This method will perform the following: - Stop | |
3141 | * the phy timer - Start the next phy - Report the link up condition to the | |
3142 | * port object none | |
3143 | */ | |
3144 | static void scic_sds_controller_starting_state_link_up_handler( | |
3145 | struct scic_sds_controller *this_controller, | |
3146 | struct scic_sds_port *port, | |
3147 | struct scic_sds_phy *phy) | |
3148 | { | |
3149 | scic_sds_controller_phy_timer_stop(this_controller); | |
3150 | ||
3151 | this_controller->port_agent.link_up_handler( | |
3152 | this_controller, &this_controller->port_agent, port, phy | |
3153 | ); | |
3154 | /* scic_sds_port_link_up(port, phy); */ | |
3155 | ||
3156 | scic_sds_controller_start_next_phy(this_controller); | |
3157 | } | |
3158 | ||
3159 | /** | |
3160 | * | |
3161 | * @controller: This is struct scic_sds_controller which receives the link down | |
3162 | * notification. | |
3163 | * @port: This is struct scic_sds_port with which the phy is associated. | |
3164 | * @phy: This is the struct scic_sds_phy which has gone link down. | |
3165 | * | |
3166 | * This method is called when the struct scic_sds_controller is in the starting state | |
3167 | * link down handler is called. - Report the link down condition to the port | |
3168 | * object none | |
3169 | */ | |
3170 | static void scic_sds_controller_starting_state_link_down_handler( | |
3171 | struct scic_sds_controller *this_controller, | |
3172 | struct scic_sds_port *port, | |
3173 | struct scic_sds_phy *phy) | |
3174 | { | |
3175 | this_controller->port_agent.link_down_handler( | |
3176 | this_controller, &this_controller->port_agent, port, phy | |
3177 | ); | |
3178 | /* scic_sds_port_link_down(port, phy); */ | |
3179 | } | |
3180 | ||
068b2c03 DW |
3181 | static enum sci_status scic_sds_controller_ready_state_stop_handler(struct sci_base_controller *base_scic, |
3182 | u32 timeout) | |
6f231dda | 3183 | { |
068b2c03 | 3184 | struct scic_sds_controller *scic; |
6f231dda | 3185 | |
068b2c03 | 3186 | scic = container_of(base_scic, typeof(*scic), parent); |
09d7da13 | 3187 | isci_timer_start(scic->timeout_timer, timeout); |
068b2c03 DW |
3188 | sci_base_state_machine_change_state(&base_scic->state_machine, |
3189 | SCI_BASE_CONTROLLER_STATE_STOPPING); | |
6f231dda DW |
3190 | |
3191 | return SCI_SUCCESS; | |
3192 | } | |
3193 | ||
3194 | /** | |
3195 | * | |
3196 | * @controller: This is struct sci_base_controller object which is cast into a | |
3197 | * struct scic_sds_controller object. | |
3198 | * @remote_device: This is struct sci_base_remote_device which is cast to a | |
3199 | * struct scic_sds_remote_device object. | |
3200 | * @io_request: This is the struct sci_base_request which is cast to a | |
3201 | * SCIC_SDS_IO_REQUEST object. | |
3202 | * @io_tag: This is the IO tag to be assigned to the IO request or | |
3203 | * SCI_CONTROLLER_INVALID_IO_TAG. | |
3204 | * | |
3205 | * This method is called when the struct scic_sds_controller is in the ready state and | |
3206 | * the start io handler is called. - Start the io request on the remote device | |
3207 | * - if successful - assign the io_request to the io_request_table - post the | |
3208 | * request to the hardware enum sci_status SCI_SUCCESS if the start io operation | |
3209 | * succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could not be | |
3210 | * allocated for the io request. SCI_FAILURE_INVALID_STATE if one or more | |
3211 | * objects are not in a valid state to accept io requests. How does the io_tag | |
3212 | * parameter get assigned to the io request? | |
3213 | */ | |
3214 | static enum sci_status scic_sds_controller_ready_state_start_io_handler( | |
3215 | struct sci_base_controller *controller, | |
3216 | struct sci_base_remote_device *remote_device, | |
3217 | struct sci_base_request *io_request, | |
3218 | u16 io_tag) | |
3219 | { | |
3220 | enum sci_status status; | |
3221 | ||
3222 | struct scic_sds_controller *this_controller; | |
3223 | struct scic_sds_request *the_request; | |
3224 | struct scic_sds_remote_device *the_device; | |
3225 | ||
3226 | this_controller = (struct scic_sds_controller *)controller; | |
3227 | the_request = (struct scic_sds_request *)io_request; | |
3228 | the_device = (struct scic_sds_remote_device *)remote_device; | |
3229 | ||
3230 | status = scic_sds_remote_device_start_io(this_controller, the_device, the_request); | |
3231 | ||
3232 | if (status == SCI_SUCCESS) { | |
3233 | this_controller->io_request_table[ | |
3234 | scic_sds_io_tag_get_index(the_request->io_tag)] = the_request; | |
3235 | ||
3236 | scic_sds_controller_post_request( | |
3237 | this_controller, | |
3238 | scic_sds_request_get_post_context(the_request) | |
3239 | ); | |
3240 | } | |
3241 | ||
3242 | return status; | |
3243 | } | |
3244 | ||
3245 | /** | |
3246 | * | |
3247 | * @controller: This is struct sci_base_controller object which is cast into a | |
3248 | * struct scic_sds_controller object. | |
3249 | * @remote_device: This is struct sci_base_remote_device which is cast to a | |
3250 | * struct scic_sds_remote_device object. | |
3251 | * @io_request: This is the struct sci_base_request which is cast to a | |
3252 | * SCIC_SDS_IO_REQUEST object. | |
3253 | * | |
3254 | * This method is called when the struct scic_sds_controller is in the ready state and | |
3255 | * the complete io handler is called. - Complete the io request on the remote | |
3256 | * device - if successful - remove the io_request to the io_request_table | |
3257 | * enum sci_status SCI_SUCCESS if the start io operation succeeds | |
3258 | * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to | |
3259 | * accept io requests. | |
3260 | */ | |
3261 | static enum sci_status scic_sds_controller_ready_state_complete_io_handler( | |
3262 | struct sci_base_controller *controller, | |
3263 | struct sci_base_remote_device *remote_device, | |
3264 | struct sci_base_request *io_request) | |
3265 | { | |
3266 | u16 index; | |
3267 | enum sci_status status; | |
3268 | struct scic_sds_controller *this_controller; | |
3269 | struct scic_sds_request *the_request; | |
3270 | struct scic_sds_remote_device *the_device; | |
3271 | ||
3272 | this_controller = (struct scic_sds_controller *)controller; | |
3273 | the_request = (struct scic_sds_request *)io_request; | |
3274 | the_device = (struct scic_sds_remote_device *)remote_device; | |
3275 | ||
3276 | status = scic_sds_remote_device_complete_io( | |
3277 | this_controller, the_device, the_request); | |
3278 | ||
3279 | if (status == SCI_SUCCESS) { | |
3280 | index = scic_sds_io_tag_get_index(the_request->io_tag); | |
a7e536c7 | 3281 | this_controller->io_request_table[index] = NULL; |
6f231dda DW |
3282 | } |
3283 | ||
3284 | return status; | |
3285 | } | |
3286 | ||
3287 | /** | |
3288 | * | |
3289 | * @controller: This is struct sci_base_controller object which is cast into a | |
3290 | * struct scic_sds_controller object. | |
3291 | * @remote_device: This is struct sci_base_remote_device which is cast to a | |
3292 | * struct scic_sds_remote_device object. | |
3293 | * @io_request: This is the struct sci_base_request which is cast to a | |
3294 | * SCIC_SDS_IO_REQUEST object. | |
3295 | * | |
3296 | * This method is called when the struct scic_sds_controller is in the ready state and | |
3297 | * the continue io handler is called. enum sci_status | |
3298 | */ | |
3299 | static enum sci_status scic_sds_controller_ready_state_continue_io_handler( | |
3300 | struct sci_base_controller *controller, | |
3301 | struct sci_base_remote_device *remote_device, | |
3302 | struct sci_base_request *io_request) | |
3303 | { | |
3304 | struct scic_sds_controller *this_controller; | |
3305 | struct scic_sds_request *the_request; | |
3306 | ||
3307 | the_request = (struct scic_sds_request *)io_request; | |
3308 | this_controller = (struct scic_sds_controller *)controller; | |
3309 | ||
3310 | this_controller->io_request_table[ | |
3311 | scic_sds_io_tag_get_index(the_request->io_tag)] = the_request; | |
3312 | ||
3313 | scic_sds_controller_post_request( | |
3314 | this_controller, | |
3315 | scic_sds_request_get_post_context(the_request) | |
3316 | ); | |
3317 | ||
3318 | return SCI_SUCCESS; | |
3319 | } | |
3320 | ||
3321 | /** | |
3322 | * | |
3323 | * @controller: This is struct sci_base_controller object which is cast into a | |
3324 | * struct scic_sds_controller object. | |
3325 | * @remote_device: This is struct sci_base_remote_device which is cast to a | |
3326 | * struct scic_sds_remote_device object. | |
3327 | * @io_request: This is the struct sci_base_request which is cast to a | |
3328 | * SCIC_SDS_IO_REQUEST object. | |
3329 | * @task_tag: This is the task tag to be assigned to the task request or | |
3330 | * SCI_CONTROLLER_INVALID_IO_TAG. | |
3331 | * | |
3332 | * This method is called when the struct scic_sds_controller is in the ready state and | |
3333 | * the start task handler is called. - The remote device is requested to start | |
3334 | * the task request - if successful - assign the task to the io_request_table - | |
3335 | * post the request to the SCU hardware enum sci_status SCI_SUCCESS if the start io | |
3336 | * operation succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could | |
3337 | * not be allocated for the io request. SCI_FAILURE_INVALID_STATE if one or | |
3338 | * more objects are not in a valid state to accept io requests. How does the io | |
3339 | * tag get assigned in this code path? | |
3340 | */ | |
3341 | static enum sci_status scic_sds_controller_ready_state_start_task_handler( | |
3342 | struct sci_base_controller *controller, | |
3343 | struct sci_base_remote_device *remote_device, | |
3344 | struct sci_base_request *io_request, | |
3345 | u16 task_tag) | |
3346 | { | |
3347 | struct scic_sds_controller *this_controller = (struct scic_sds_controller *) | |
3348 | controller; | |
3349 | struct scic_sds_request *the_request = (struct scic_sds_request *) | |
3350 | io_request; | |
3351 | struct scic_sds_remote_device *the_device = (struct scic_sds_remote_device *) | |
3352 | remote_device; | |
3353 | enum sci_status status; | |
3354 | ||
3355 | status = scic_sds_remote_device_start_task( | |
3356 | this_controller, the_device, the_request | |
3357 | ); | |
3358 | ||
3359 | if (status == SCI_SUCCESS) { | |
3360 | this_controller->io_request_table[ | |
3361 | scic_sds_io_tag_get_index(the_request->io_tag)] = the_request; | |
3362 | ||
3363 | scic_sds_controller_post_request( | |
3364 | this_controller, | |
3365 | scic_sds_request_get_post_context(the_request) | |
3366 | ); | |
3367 | } else if (status == SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS) { | |
3368 | this_controller->io_request_table[ | |
3369 | scic_sds_io_tag_get_index(the_request->io_tag)] = the_request; | |
3370 | ||
3371 | /* | |
3372 | * We will let framework know this task request started successfully, | |
3373 | * although core is still woring on starting the request (to post tc when | |
3374 | * RNC is resumed.) */ | |
3375 | status = SCI_SUCCESS; | |
3376 | } | |
3377 | return status; | |
3378 | } | |
3379 | ||
3380 | /** | |
3381 | * | |
3382 | * @controller: This is struct sci_base_controller object which is cast into a | |
3383 | * struct scic_sds_controller object. | |
3384 | * @remote_device: This is struct sci_base_remote_device which is cast to a | |
3385 | * struct scic_sds_remote_device object. | |
3386 | * @io_request: This is the struct sci_base_request which is cast to a | |
3387 | * SCIC_SDS_IO_REQUEST object. | |
3388 | * | |
3389 | * This method is called when the struct scic_sds_controller is in the ready state and | |
3390 | * the terminate request handler is called. - call the io request terminate | |
3391 | * function - if successful - post the terminate request to the SCU hardware | |
3392 | * enum sci_status SCI_SUCCESS if the start io operation succeeds | |
3393 | * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to | |
3394 | * accept io requests. | |
3395 | */ | |
3396 | static enum sci_status scic_sds_controller_ready_state_terminate_request_handler( | |
3397 | struct sci_base_controller *controller, | |
3398 | struct sci_base_remote_device *remote_device, | |
3399 | struct sci_base_request *io_request) | |
3400 | { | |
3401 | struct scic_sds_controller *this_controller = (struct scic_sds_controller *) | |
3402 | controller; | |
3403 | struct scic_sds_request *the_request = (struct scic_sds_request *) | |
3404 | io_request; | |
3405 | enum sci_status status; | |
3406 | ||
3407 | status = scic_sds_io_request_terminate(the_request); | |
3408 | if (status == SCI_SUCCESS) { | |
3409 | /* | |
3410 | * Utilize the original post context command and or in the POST_TC_ABORT | |
3411 | * request sub-type. */ | |
3412 | scic_sds_controller_post_request( | |
3413 | this_controller, | |
3414 | scic_sds_request_get_post_context(the_request) | |
3415 | | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT | |
3416 | ); | |
3417 | } | |
3418 | ||
3419 | return status; | |
3420 | } | |
3421 | ||
3422 | /** | |
3423 | * | |
3424 | * @controller: This is struct scic_sds_controller which receives the link up | |
3425 | * notification. | |
3426 | * @port: This is struct scic_sds_port with which the phy is associated. | |
3427 | * @phy: This is the struct scic_sds_phy which has gone link up. | |
3428 | * | |
3429 | * This method is called when the struct scic_sds_controller is in the starting state | |
3430 | * link up handler is called. This method will perform the following: - Stop | |
3431 | * the phy timer - Start the next phy - Report the link up condition to the | |
3432 | * port object none | |
3433 | */ | |
3434 | static void scic_sds_controller_ready_state_link_up_handler( | |
3435 | struct scic_sds_controller *this_controller, | |
3436 | struct scic_sds_port *port, | |
3437 | struct scic_sds_phy *phy) | |
3438 | { | |
3439 | this_controller->port_agent.link_up_handler( | |
3440 | this_controller, &this_controller->port_agent, port, phy | |
3441 | ); | |
3442 | } | |
3443 | ||
3444 | /** | |
3445 | * | |
3446 | * @controller: This is struct scic_sds_controller which receives the link down | |
3447 | * notification. | |
3448 | * @port: This is struct scic_sds_port with which the phy is associated. | |
3449 | * @phy: This is the struct scic_sds_phy which has gone link down. | |
3450 | * | |
3451 | * This method is called when the struct scic_sds_controller is in the starting state | |
3452 | * link down handler is called. - Report the link down condition to the port | |
3453 | * object none | |
3454 | */ | |
3455 | static void scic_sds_controller_ready_state_link_down_handler( | |
3456 | struct scic_sds_controller *this_controller, | |
3457 | struct scic_sds_port *port, | |
3458 | struct scic_sds_phy *phy) | |
3459 | { | |
3460 | this_controller->port_agent.link_down_handler( | |
3461 | this_controller, &this_controller->port_agent, port, phy | |
3462 | ); | |
3463 | } | |
3464 | ||
3465 | /* | |
3466 | * ***************************************************************************** | |
3467 | * * STOPPING STATE HANDLERS | |
3468 | * ***************************************************************************** */ | |
3469 | ||
3470 | /** | |
3471 | * | |
3472 | * @controller: This is struct sci_base_controller object which is cast into a | |
3473 | * struct scic_sds_controller object. | |
3474 | * @remote_device: This is struct sci_base_remote_device which is cast to a | |
3475 | * struct scic_sds_remote_device object. | |
3476 | * @io_request: This is the struct sci_base_request which is cast to a | |
3477 | * SCIC_SDS_IO_REQUEST object. | |
3478 | * | |
3479 | * This method is called when the struct scic_sds_controller is in a stopping state | |
3480 | * and the complete io handler is called. - This function is not yet | |
3481 | * implemented enum sci_status SCI_FAILURE | |
3482 | */ | |
3483 | static enum sci_status scic_sds_controller_stopping_state_complete_io_handler( | |
3484 | struct sci_base_controller *controller, | |
3485 | struct sci_base_remote_device *remote_device, | |
3486 | struct sci_base_request *io_request) | |
3487 | { | |
3488 | struct scic_sds_controller *this_controller; | |
3489 | ||
3490 | this_controller = (struct scic_sds_controller *)controller; | |
3491 | ||
3492 | /* / @todo Implement this function */ | |
3493 | return SCI_FAILURE; | |
3494 | } | |
3495 | ||
3496 | /** | |
3497 | * | |
3498 | * @controller: This is struct sci_base_controller object which is cast into a | |
3499 | * struct scic_sds_controller object. | |
3500 | * @remote_device: This is struct sci_base_remote_device which is cast to a | |
3501 | * struct scic_sds_remote_device object. | |
6f231dda DW |
3502 | * |
3503 | * This method is called when the struct scic_sds_controller is in a stopping state | |
c658b109 PM |
3504 | * and the remote device has stopped. |
3505 | **/ | |
35173d57 | 3506 | static void scic_sds_controller_stopping_state_device_stopped_handler( |
c658b109 PM |
3507 | struct scic_sds_controller *controller, |
3508 | struct scic_sds_remote_device *remote_device | |
3509 | ) | |
3510 | { | |
3511 | if (!scic_sds_controller_has_remote_devices_stopping(controller)) { | |
3512 | sci_base_state_machine_change_state( | |
3513 | &controller->parent.state_machine, | |
3514 | SCI_BASE_CONTROLLER_STATE_STOPPED | |
3515 | ); | |
3516 | } | |
3517 | } | |
6f231dda DW |
3518 | |
3519 | const struct scic_sds_controller_state_handler scic_sds_controller_state_handler_table[] = { | |
3520 | [SCI_BASE_CONTROLLER_STATE_INITIAL] = { | |
3521 | .base.start_io = scic_sds_controller_default_start_operation_handler, | |
3522 | .base.complete_io = scic_sds_controller_default_request_handler, | |
3523 | .base.continue_io = scic_sds_controller_default_request_handler, | |
3524 | .terminate_request = scic_sds_controller_default_request_handler, | |
3525 | }, | |
3526 | [SCI_BASE_CONTROLLER_STATE_RESET] = { | |
9affa289 | 3527 | .base.reset = scic_sds_controller_general_reset_handler, |
6f231dda DW |
3528 | .base.initialize = scic_sds_controller_reset_state_initialize_handler, |
3529 | .base.start_io = scic_sds_controller_default_start_operation_handler, | |
3530 | .base.complete_io = scic_sds_controller_default_request_handler, | |
3531 | .base.continue_io = scic_sds_controller_default_request_handler, | |
3532 | .terminate_request = scic_sds_controller_default_request_handler, | |
3533 | }, | |
3534 | [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = { | |
3535 | .base.start_io = scic_sds_controller_default_start_operation_handler, | |
3536 | .base.complete_io = scic_sds_controller_default_request_handler, | |
3537 | .base.continue_io = scic_sds_controller_default_request_handler, | |
3538 | .terminate_request = scic_sds_controller_default_request_handler, | |
3539 | }, | |
3540 | [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = { | |
3541 | .base.start = scic_sds_controller_initialized_state_start_handler, | |
3542 | .base.start_io = scic_sds_controller_default_start_operation_handler, | |
3543 | .base.complete_io = scic_sds_controller_default_request_handler, | |
3544 | .base.continue_io = scic_sds_controller_default_request_handler, | |
3545 | .terminate_request = scic_sds_controller_default_request_handler, | |
3546 | }, | |
3547 | [SCI_BASE_CONTROLLER_STATE_STARTING] = { | |
3548 | .base.start_io = scic_sds_controller_default_start_operation_handler, | |
3549 | .base.complete_io = scic_sds_controller_default_request_handler, | |
3550 | .base.continue_io = scic_sds_controller_default_request_handler, | |
3551 | .terminate_request = scic_sds_controller_default_request_handler, | |
3552 | .link_up = scic_sds_controller_starting_state_link_up_handler, | |
3553 | .link_down = scic_sds_controller_starting_state_link_down_handler | |
3554 | }, | |
3555 | [SCI_BASE_CONTROLLER_STATE_READY] = { | |
3556 | .base.stop = scic_sds_controller_ready_state_stop_handler, | |
3557 | .base.reset = scic_sds_controller_general_reset_handler, | |
3558 | .base.start_io = scic_sds_controller_ready_state_start_io_handler, | |
3559 | .base.complete_io = scic_sds_controller_ready_state_complete_io_handler, | |
3560 | .base.continue_io = scic_sds_controller_ready_state_continue_io_handler, | |
3561 | .base.start_task = scic_sds_controller_ready_state_start_task_handler, | |
3562 | .base.complete_task = scic_sds_controller_ready_state_complete_io_handler, | |
3563 | .terminate_request = scic_sds_controller_ready_state_terminate_request_handler, | |
3564 | .link_up = scic_sds_controller_ready_state_link_up_handler, | |
3565 | .link_down = scic_sds_controller_ready_state_link_down_handler | |
3566 | }, | |
3567 | [SCI_BASE_CONTROLLER_STATE_RESETTING] = { | |
3568 | .base.start_io = scic_sds_controller_default_start_operation_handler, | |
3569 | .base.complete_io = scic_sds_controller_default_request_handler, | |
3570 | .base.continue_io = scic_sds_controller_default_request_handler, | |
3571 | .terminate_request = scic_sds_controller_default_request_handler, | |
3572 | }, | |
3573 | [SCI_BASE_CONTROLLER_STATE_STOPPING] = { | |
3574 | .base.start_io = scic_sds_controller_default_start_operation_handler, | |
3575 | .base.complete_io = scic_sds_controller_stopping_state_complete_io_handler, | |
3576 | .base.continue_io = scic_sds_controller_default_request_handler, | |
3577 | .terminate_request = scic_sds_controller_default_request_handler, | |
c658b109 | 3578 | .remote_device_stopped_handler = scic_sds_controller_stopping_state_device_stopped_handler, |
6f231dda DW |
3579 | }, |
3580 | [SCI_BASE_CONTROLLER_STATE_STOPPED] = { | |
3581 | .base.reset = scic_sds_controller_general_reset_handler, | |
3582 | .base.start_io = scic_sds_controller_default_start_operation_handler, | |
3583 | .base.complete_io = scic_sds_controller_default_request_handler, | |
3584 | .base.continue_io = scic_sds_controller_default_request_handler, | |
3585 | .terminate_request = scic_sds_controller_default_request_handler, | |
3586 | }, | |
3587 | [SCI_BASE_CONTROLLER_STATE_FAILED] = { | |
3588 | .base.reset = scic_sds_controller_general_reset_handler, | |
3589 | .base.start_io = scic_sds_controller_default_start_operation_handler, | |
3590 | .base.complete_io = scic_sds_controller_default_request_handler, | |
3591 | .base.continue_io = scic_sds_controller_default_request_handler, | |
3592 | .terminate_request = scic_sds_controller_default_request_handler, | |
3593 | }, | |
3594 | }; | |
3595 | ||
3596 | /** | |
3597 | * | |
3598 | * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller | |
3599 | * object. | |
3600 | * | |
3601 | * This method implements the actions taken by the struct scic_sds_controller on entry | |
3602 | * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the | |
3603 | * controllers initial state. none This function should initialze the | |
3604 | * controller object. | |
3605 | */ | |
3606 | static void scic_sds_controller_initial_state_enter( | |
3607 | struct sci_base_object *object) | |
3608 | { | |
3609 | struct scic_sds_controller *this_controller; | |
3610 | ||
3611 | this_controller = (struct scic_sds_controller *)object; | |
3612 | ||
3613 | sci_base_state_machine_change_state( | |
3614 | &this_controller->parent.state_machine, SCI_BASE_CONTROLLER_STATE_RESET); | |
3615 | } | |
3616 | ||
3617 | /** | |
3618 | * | |
3619 | * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller | |
3620 | * object. | |
3621 | * | |
3622 | * This method implements the actions taken by the struct scic_sds_controller on exit | |
3623 | * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the | |
3624 | * controller starting timeout timer. none | |
3625 | */ | |
09d7da13 | 3626 | static inline void scic_sds_controller_starting_state_exit( |
6f231dda DW |
3627 | struct sci_base_object *object) |
3628 | { | |
3629 | struct scic_sds_controller *scic = (struct scic_sds_controller *)object; | |
3630 | ||
09d7da13 | 3631 | isci_timer_stop(scic->timeout_timer); |
6f231dda DW |
3632 | } |
3633 | ||
3634 | /** | |
3635 | * | |
3636 | * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller | |
3637 | * object. | |
3638 | * | |
3639 | * This method implements the actions taken by the struct scic_sds_controller on entry | |
3640 | * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the | |
3641 | * controllers ready state. none | |
3642 | */ | |
3643 | static void scic_sds_controller_ready_state_enter( | |
3644 | struct sci_base_object *object) | |
3645 | { | |
3646 | struct scic_sds_controller *this_controller; | |
3647 | ||
3648 | this_controller = (struct scic_sds_controller *)object; | |
3649 | ||
3650 | /* set the default interrupt coalescence number and timeout value. */ | |
3651 | scic_controller_set_interrupt_coalescence( | |
3652 | this_controller, 0x10, 250); | |
3653 | } | |
3654 | ||
3655 | /** | |
3656 | * | |
3657 | * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller | |
3658 | * object. | |
3659 | * | |
3660 | * This method implements the actions taken by the struct scic_sds_controller on exit | |
3661 | * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none | |
3662 | */ | |
3663 | static void scic_sds_controller_ready_state_exit( | |
3664 | struct sci_base_object *object) | |
3665 | { | |
3666 | struct scic_sds_controller *this_controller; | |
3667 | ||
3668 | this_controller = (struct scic_sds_controller *)object; | |
3669 | ||
3670 | /* disable interrupt coalescence. */ | |
3671 | scic_controller_set_interrupt_coalescence(this_controller, 0, 0); | |
3672 | } | |
3673 | ||
3674 | /** | |
3675 | * | |
3676 | * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller | |
3677 | * object. | |
3678 | * | |
3679 | * This method implements the actions taken by the struct scic_sds_controller on entry | |
3680 | * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the | |
3681 | * controllers ready state. - Stop the phys on this controller - Stop the ports | |
3682 | * on this controller - Stop all of the remote devices on this controller none | |
3683 | */ | |
3684 | static void scic_sds_controller_stopping_state_enter( | |
3685 | struct sci_base_object *object) | |
3686 | { | |
3687 | struct scic_sds_controller *this_controller; | |
3688 | ||
3689 | this_controller = (struct scic_sds_controller *)object; | |
3690 | ||
3691 | /* Stop all of the components for this controller */ | |
3692 | scic_sds_controller_stop_phys(this_controller); | |
3693 | scic_sds_controller_stop_ports(this_controller); | |
3694 | scic_sds_controller_stop_devices(this_controller); | |
3695 | } | |
3696 | ||
3697 | /** | |
3698 | * | |
09d7da13 DJ |
3699 | * @object: This is the struct sci_base_object which is cast to a struct |
3700 | * scic_sds_controller object. | |
6f231dda | 3701 | * |
09d7da13 DJ |
3702 | * This funciton implements the actions taken by the struct scic_sds_controller |
3703 | * on exit from the SCI_BASE_CONTROLLER_STATE_STOPPING. - | |
3704 | * This function stops the controller stopping timeout timer. | |
6f231dda | 3705 | */ |
09d7da13 | 3706 | static inline void scic_sds_controller_stopping_state_exit( |
6f231dda DW |
3707 | struct sci_base_object *object) |
3708 | { | |
09d7da13 DJ |
3709 | struct scic_sds_controller *scic = |
3710 | (struct scic_sds_controller *)object; | |
6f231dda | 3711 | |
09d7da13 | 3712 | isci_timer_stop(scic->timeout_timer); |
6f231dda DW |
3713 | } |
3714 | ||
068b2c03 | 3715 | static void scic_sds_controller_resetting_state_enter(struct sci_base_object *object) |
6f231dda | 3716 | { |
068b2c03 | 3717 | struct scic_sds_controller *scic; |
6f231dda | 3718 | |
068b2c03 DW |
3719 | scic = container_of(object, typeof(*scic), parent.parent); |
3720 | scic_sds_controller_reset_hardware(scic); | |
3721 | sci_base_state_machine_change_state(&scic->parent.state_machine, | |
3722 | SCI_BASE_CONTROLLER_STATE_RESET); | |
6f231dda DW |
3723 | } |
3724 | ||
35173d57 | 3725 | static const struct sci_base_state scic_sds_controller_state_table[] = { |
6f231dda DW |
3726 | [SCI_BASE_CONTROLLER_STATE_INITIAL] = { |
3727 | .enter_state = scic_sds_controller_initial_state_enter, | |
3728 | }, | |
3729 | [SCI_BASE_CONTROLLER_STATE_RESET] = {}, | |
3730 | [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {}, | |
3731 | [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {}, | |
3732 | [SCI_BASE_CONTROLLER_STATE_STARTING] = { | |
3733 | .exit_state = scic_sds_controller_starting_state_exit, | |
3734 | }, | |
3735 | [SCI_BASE_CONTROLLER_STATE_READY] = { | |
3736 | .enter_state = scic_sds_controller_ready_state_enter, | |
3737 | .exit_state = scic_sds_controller_ready_state_exit, | |
3738 | }, | |
3739 | [SCI_BASE_CONTROLLER_STATE_RESETTING] = { | |
3740 | .enter_state = scic_sds_controller_resetting_state_enter, | |
3741 | }, | |
3742 | [SCI_BASE_CONTROLLER_STATE_STOPPING] = { | |
3743 | .enter_state = scic_sds_controller_stopping_state_enter, | |
3744 | .exit_state = scic_sds_controller_stopping_state_exit, | |
3745 | }, | |
3746 | [SCI_BASE_CONTROLLER_STATE_STOPPED] = {}, | |
3747 | [SCI_BASE_CONTROLLER_STATE_FAILED] = {} | |
3748 | }; | |
35173d57 DW |
3749 | |
3750 | /** | |
3751 | * scic_controller_construct() - This method will attempt to construct a | |
3752 | * controller object utilizing the supplied parameter information. | |
3753 | * @c: This parameter specifies the controller to be constructed. | |
3754 | * @scu_base: mapped base address of the scu registers | |
3755 | * @smu_base: mapped base address of the smu registers | |
3756 | * | |
3757 | * Indicate if the controller was successfully constructed or if it failed in | |
3758 | * some way. SCI_SUCCESS This value is returned if the controller was | |
3759 | * successfully constructed. SCI_WARNING_TIMER_CONFLICT This value is returned | |
3760 | * if the interrupt coalescence timer may cause SAS compliance issues for SMP | |
3761 | * Target mode response processing. SCI_FAILURE_UNSUPPORTED_CONTROLLER_TYPE | |
3762 | * This value is returned if the controller does not support the supplied type. | |
3763 | * SCI_FAILURE_UNSUPPORTED_INIT_DATA_VERSION This value is returned if the | |
3764 | * controller does not support the supplied initialization data version. | |
3765 | */ | |
3766 | enum sci_status scic_controller_construct(struct scic_sds_controller *scic, | |
3767 | void __iomem *scu_base, | |
3768 | void __iomem *smu_base) | |
3769 | { | |
3770 | u8 i; | |
3771 | ||
3772 | sci_base_controller_construct(&scic->parent, | |
3773 | scic_sds_controller_state_table, | |
3774 | scic->memory_descriptors, | |
3775 | ARRAY_SIZE(scic->memory_descriptors), NULL); | |
3776 | ||
3777 | scic->scu_registers = scu_base; | |
3778 | scic->smu_registers = smu_base; | |
3779 | ||
3780 | scic_sds_port_configuration_agent_construct(&scic->port_agent); | |
3781 | ||
3782 | /* Construct the ports for this controller */ | |
3783 | for (i = 0; i < SCI_MAX_PORTS; i++) | |
3784 | scic_sds_port_construct(&scic->port_table[i], i, scic); | |
3785 | scic_sds_port_construct(&scic->port_table[i], SCIC_SDS_DUMMY_PORT, scic); | |
3786 | ||
3787 | /* Construct the phys for this controller */ | |
3788 | for (i = 0; i < SCI_MAX_PHYS; i++) { | |
3789 | /* Add all the PHYs to the dummy port */ | |
3790 | scic_sds_phy_construct(&scic->phy_table[i], | |
3791 | &scic->port_table[SCI_MAX_PORTS], i); | |
3792 | } | |
3793 | ||
3794 | scic->invalid_phy_mask = 0; | |
3795 | ||
3796 | /* Set the default maximum values */ | |
3797 | scic->completion_event_entries = SCU_EVENT_COUNT; | |
3798 | scic->completion_queue_entries = SCU_COMPLETION_QUEUE_COUNT; | |
3799 | scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES; | |
3800 | scic->logical_port_entries = SCI_MAX_PORTS; | |
3801 | scic->task_context_entries = SCU_IO_REQUEST_COUNT; | |
3802 | scic->uf_control.buffers.count = SCU_UNSOLICITED_FRAME_COUNT; | |
3803 | scic->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT; | |
3804 | ||
3805 | /* Initialize the User and OEM parameters to default values. */ | |
3806 | scic_sds_controller_set_default_config_parameters(scic); | |
3807 | ||
3808 | return scic_controller_reset(scic); | |
3809 | } |