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6f231dda DW |
1 | /* |
2 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
3 | * redistributing this file, you may do so under either license. | |
4 | * | |
5 | * GPL LICENSE SUMMARY | |
6 | * | |
7 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of version 2 of the GNU General Public License as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
21 | * The full GNU General Public License is included in this distribution | |
22 | * in the file called LICENSE.GPL. | |
23 | * | |
24 | * BSD LICENSE | |
25 | * | |
26 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. | |
27 | * All rights reserved. | |
28 | * | |
29 | * Redistribution and use in source and binary forms, with or without | |
30 | * modification, are permitted provided that the following conditions | |
31 | * are met: | |
32 | * | |
33 | * * Redistributions of source code must retain the above copyright | |
34 | * notice, this list of conditions and the following disclaimer. | |
35 | * * Redistributions in binary form must reproduce the above copyright | |
36 | * notice, this list of conditions and the following disclaimer in | |
37 | * the documentation and/or other materials provided with the | |
38 | * distribution. | |
39 | * * Neither the name of Intel Corporation nor the names of its | |
40 | * contributors may be used to endorse or promote products derived | |
41 | * from this software without specific prior written permission. | |
42 | * | |
43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
44 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
45 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
46 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
47 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
48 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
49 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
50 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
51 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
52 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
53 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
54 | */ | |
55 | ||
e76d6180 DJ |
56 | #include <scsi/sas.h> |
57 | #include "sas.h" | |
6f231dda DW |
58 | #include "sci_base_state.h" |
59 | #include "sci_base_state_machine.h" | |
60 | #include "scic_io_request.h" | |
6f231dda | 61 | #include "scic_sds_controller.h" |
88f3b62a | 62 | #include "remote_device.h" |
6f231dda DW |
63 | #include "scic_sds_request.h" |
64 | #include "scic_sds_stp_pio_request.h" | |
65 | #include "scic_sds_stp_request.h" | |
66 | #include "scic_sds_unsolicited_frame_control.h" | |
6f231dda | 67 | #include "sci_environment.h" |
6f231dda DW |
68 | #include "sci_util.h" |
69 | #include "scu_completion_codes.h" | |
70 | #include "scu_event_codes.h" | |
71 | #include "scu_task_context.h" | |
72 | ||
73 | /** | |
74 | * scic_sds_stp_request_get_h2d_reg_buffer() - | |
75 | * | |
76 | * This macro returns the address of the stp h2d reg fis buffer in the io | |
77 | * request memory | |
78 | */ | |
79 | #define scic_sds_stp_request_get_h2d_reg_buffer(memory) \ | |
f2f30080 | 80 | ((struct host_to_dev_fis *)(\ |
6f231dda DW |
81 | ((char *)(memory)) + sizeof(struct scic_sds_stp_request) \ |
82 | )) | |
83 | ||
84 | /** | |
85 | * scic_sds_stp_request_get_response_buffer() - | |
86 | * | |
87 | * This macro returns the address of the ssp response iu buffer in the io | |
88 | * request memory | |
89 | */ | |
90 | #define scic_sds_stp_request_get_response_buffer(memory) \ | |
f2f30080 | 91 | ((struct dev_to_host_fis *)(\ |
6f231dda | 92 | ((char *)(scic_sds_stp_request_get_h2d_reg_buffer(memory))) \ |
f2f30080 | 93 | + sizeof(struct host_to_dev_fis) \ |
6f231dda DW |
94 | )) |
95 | ||
96 | /** | |
97 | * scic_sds_stp_request_get_task_context_buffer() - | |
98 | * | |
99 | * This macro returns the address of the task context buffer in the io request | |
100 | * memory | |
101 | */ | |
102 | #define scic_sds_stp_request_get_task_context_buffer(memory) \ | |
103 | ((struct scu_task_context *)(\ | |
104 | ((char *)(scic_sds_stp_request_get_response_buffer(memory))) \ | |
af5ae893 | 105 | + SSP_RESP_IU_MAX_SIZE \ |
6f231dda DW |
106 | )) |
107 | ||
108 | /** | |
109 | * scic_sds_stp_request_get_sgl_element_buffer() - | |
110 | * | |
111 | * This macro returns the address of the sgl elment pairs in the io request | |
112 | * memory buffer | |
113 | */ | |
114 | #define scic_sds_stp_request_get_sgl_element_buffer(memory) \ | |
115 | ((struct scu_sgl_element_pair *)(\ | |
116 | ((char *)(scic_sds_stp_request_get_task_context_buffer(memory))) \ | |
117 | + sizeof(struct scu_task_context) \ | |
118 | )) | |
119 | ||
120 | /** | |
121 | * | |
122 | * | |
123 | * This method return the memory space required for STP PIO requests. u32 | |
124 | */ | |
125 | u32 scic_sds_stp_request_get_object_size(void) | |
126 | { | |
127 | return sizeof(struct scic_sds_stp_request) | |
f2f30080 DJ |
128 | + sizeof(struct host_to_dev_fis) |
129 | + sizeof(struct dev_to_host_fis) | |
6f231dda | 130 | + sizeof(struct scu_task_context) |
fe9a6431 | 131 | + SMP_CACHE_BYTES |
6f231dda DW |
132 | + sizeof(struct scu_sgl_element_pair) * SCU_MAX_SGL_ELEMENT_PAIRS; |
133 | } | |
134 | ||
fe9a6431 | 135 | void scic_sds_stp_request_assign_buffers(struct scic_sds_request *sci_req) |
6f231dda | 136 | { |
e76d6180 DJ |
137 | struct scic_sds_stp_request *stp_req = |
138 | container_of(sci_req, typeof(*stp_req), parent); | |
6f231dda | 139 | |
fe9a6431 DW |
140 | sci_req->command_buffer = scic_sds_stp_request_get_h2d_reg_buffer(stp_req); |
141 | sci_req->response_buffer = scic_sds_stp_request_get_response_buffer(stp_req); | |
142 | sci_req->sgl_element_pair_buffer = scic_sds_stp_request_get_sgl_element_buffer(stp_req); | |
143 | sci_req->sgl_element_pair_buffer = PTR_ALIGN(sci_req->sgl_element_pair_buffer, | |
144 | sizeof(struct scu_sgl_element_pair)); | |
6f231dda | 145 | |
fe9a6431 DW |
146 | if (sci_req->was_tag_assigned_by_user == false) { |
147 | sci_req->task_context_buffer = | |
148 | scic_sds_stp_request_get_task_context_buffer(stp_req); | |
149 | sci_req->task_context_buffer = PTR_ALIGN(sci_req->task_context_buffer, | |
150 | SMP_CACHE_BYTES); | |
6f231dda DW |
151 | } |
152 | } | |
153 | ||
154 | /** | |
155 | * This method is will fill in the SCU Task Context for any type of SATA | |
156 | * request. This is called from the various SATA constructors. | |
e2023b87 | 157 | * @sci_req: The general IO request object which is to be used in |
6f231dda DW |
158 | * constructing the SCU task context. |
159 | * @task_context: The buffer pointer for the SCU task context which is being | |
160 | * constructed. | |
161 | * | |
162 | * The general io request construction is complete. The buffer assignment for | |
163 | * the command buffer is complete. none Revisit task context construction to | |
164 | * determine what is common for SSP/SMP/STP task context structures. | |
165 | */ | |
166 | static void scu_sata_reqeust_construct_task_context( | |
6389a775 | 167 | struct scic_sds_request *sds_request, |
6f231dda DW |
168 | struct scu_task_context *task_context) |
169 | { | |
6389a775 DJ |
170 | dma_addr_t dma_addr; |
171 | struct scic_sds_controller *controller; | |
6f231dda DW |
172 | struct scic_sds_remote_device *target_device; |
173 | struct scic_sds_port *target_port; | |
174 | ||
6389a775 DJ |
175 | controller = scic_sds_request_get_controller(sds_request); |
176 | target_device = scic_sds_request_get_device(sds_request); | |
177 | target_port = scic_sds_request_get_port(sds_request); | |
6f231dda DW |
178 | |
179 | /* Fill in the TC with the its required data */ | |
180 | task_context->abort = 0; | |
181 | task_context->priority = SCU_TASK_PRIORITY_NORMAL; | |
182 | task_context->initiator_request = 1; | |
8f304c36 | 183 | task_context->connection_rate = target_device->connection_rate; |
6f231dda | 184 | task_context->protocol_engine_index = |
6389a775 | 185 | scic_sds_controller_get_protocol_engine_group(controller); |
6f231dda DW |
186 | task_context->logical_port_index = |
187 | scic_sds_port_get_index(target_port); | |
188 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_STP; | |
189 | task_context->valid = SCU_TASK_CONTEXT_VALID; | |
190 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; | |
191 | ||
192 | task_context->remote_node_index = | |
6389a775 | 193 | scic_sds_remote_device_get_index(sds_request->target_device); |
6f231dda DW |
194 | task_context->command_code = 0; |
195 | ||
196 | task_context->link_layer_control = 0; | |
197 | task_context->do_not_dma_ssp_good_response = 1; | |
198 | task_context->strict_ordering = 0; | |
199 | task_context->control_frame = 0; | |
200 | task_context->timeout_enable = 0; | |
201 | task_context->block_guard_enable = 0; | |
202 | ||
203 | task_context->address_modifier = 0; | |
204 | task_context->task_phase = 0x01; | |
205 | ||
206 | task_context->ssp_command_iu_length = | |
f2f30080 | 207 | (sizeof(struct host_to_dev_fis) - sizeof(u32)) / sizeof(u32); |
6f231dda DW |
208 | |
209 | /* Set the first word of the H2D REG FIS */ | |
6389a775 | 210 | task_context->type.words[0] = *(u32 *)sds_request->command_buffer; |
6f231dda | 211 | |
6389a775 DJ |
212 | if (sds_request->was_tag_assigned_by_user) { |
213 | /* | |
214 | * Build the task context now since we have already read | |
215 | * the data | |
216 | */ | |
217 | sds_request->post_context = | |
218 | (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | | |
219 | (scic_sds_controller_get_protocol_engine_group( | |
220 | controller) << | |
221 | SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | | |
222 | (scic_sds_port_get_index(target_port) << | |
223 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | | |
224 | scic_sds_io_tag_get_index(sds_request->io_tag)); | |
6f231dda | 225 | } else { |
6389a775 DJ |
226 | /* |
227 | * Build the task context now since we have already read | |
228 | * the data. | |
229 | * I/O tag index is not assigned because we have to wait | |
230 | * until we get a TCi. | |
231 | */ | |
232 | sds_request->post_context = | |
233 | (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | | |
234 | (scic_sds_controller_get_protocol_engine_group( | |
235 | controller) << | |
236 | SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | | |
237 | (scic_sds_port_get_index(target_port) << | |
238 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT)); | |
6f231dda DW |
239 | } |
240 | ||
241 | /* | |
6389a775 DJ |
242 | * Copy the physical address for the command buffer to the SCU Task |
243 | * Context. We must offset the command buffer by 4 bytes because the | |
244 | * first 4 bytes are transfered in the body of the TC. | |
245 | */ | |
246 | dma_addr = | |
247 | scic_io_request_get_dma_addr(sds_request, | |
248 | (char *)sds_request-> | |
249 | command_buffer + | |
250 | sizeof(u32)); | |
6f231dda | 251 | |
6389a775 DJ |
252 | task_context->command_iu_upper = upper_32_bits(dma_addr); |
253 | task_context->command_iu_lower = lower_32_bits(dma_addr); | |
6f231dda DW |
254 | |
255 | /* SATA Requests do not have a response buffer */ | |
256 | task_context->response_iu_upper = 0; | |
257 | task_context->response_iu_lower = 0; | |
258 | } | |
259 | ||
260 | /** | |
261 | * | |
e2023b87 | 262 | * @sci_req: |
6f231dda DW |
263 | * |
264 | * This method will perform any general sata request construction. What part of | |
265 | * SATA IO request construction is general? none | |
266 | */ | |
35173d57 | 267 | static void scic_sds_stp_non_ncq_request_construct( |
e2023b87 | 268 | struct scic_sds_request *sci_req) |
6f231dda | 269 | { |
e2023b87 | 270 | sci_req->has_started_substate_machine = true; |
6f231dda DW |
271 | } |
272 | ||
273 | /** | |
274 | * | |
82d29928 | 275 | * @sci_req: This parameter specifies the request to be constructed as an |
6f231dda DW |
276 | * optimized request. |
277 | * @optimized_task_type: This parameter specifies whether the request is to be | |
278 | * an UDMA request or a NCQ request. - A value of 0 indicates UDMA. - A | |
279 | * value of 1 indicates NCQ. | |
280 | * | |
281 | * This method will perform request construction common to all types of STP | |
282 | * requests that are optimized by the silicon (i.e. UDMA, NCQ). This method | |
283 | * returns an indication as to whether the construction was successful. | |
284 | */ | |
82d29928 DW |
285 | static void scic_sds_stp_optimized_request_construct(struct scic_sds_request *sci_req, |
286 | u8 optimized_task_type, | |
287 | u32 len, | |
288 | enum dma_data_direction dir) | |
6f231dda | 289 | { |
82d29928 | 290 | struct scu_task_context *task_context = sci_req->task_context_buffer; |
6f231dda DW |
291 | |
292 | /* Build the STP task context structure */ | |
82d29928 | 293 | scu_sata_reqeust_construct_task_context(sci_req, task_context); |
6f231dda DW |
294 | |
295 | /* Copy over the SGL elements */ | |
82d29928 | 296 | scic_sds_request_build_sgl(sci_req); |
6f231dda DW |
297 | |
298 | /* Copy over the number of bytes to be transfered */ | |
82d29928 | 299 | task_context->transfer_length_bytes = len; |
6f231dda | 300 | |
82d29928 | 301 | if (dir == DMA_TO_DEVICE) { |
6f231dda DW |
302 | /* |
303 | * The difference between the DMA IN and DMA OUT request task type | |
304 | * values are consistent with the difference between FPDMA READ | |
305 | * and FPDMA WRITE values. Add the supplied task type parameter | |
306 | * to this difference to set the task type properly for this | |
307 | * DATA OUT (WRITE) case. */ | |
308 | task_context->task_type = optimized_task_type + (SCU_TASK_TYPE_DMA_OUT | |
309 | - SCU_TASK_TYPE_DMA_IN); | |
310 | } else { | |
311 | /* | |
312 | * For the DATA IN (READ) case, simply save the supplied | |
313 | * optimized task type. */ | |
314 | task_context->task_type = optimized_task_type; | |
315 | } | |
316 | } | |
317 | ||
6f231dda DW |
318 | /** |
319 | * | |
82d29928 | 320 | * @sci_req: This parameter specifies the request to be constructed. |
6f231dda DW |
321 | * |
322 | * This method will construct the STP UDMA request and its associated TC data. | |
323 | * This method returns an indication as to whether the construction was | |
324 | * successful. SCI_SUCCESS Currently this method always returns this value. | |
325 | */ | |
82d29928 DW |
326 | enum sci_status scic_sds_stp_ncq_request_construct(struct scic_sds_request *sci_req, |
327 | u32 len, | |
328 | enum dma_data_direction dir) | |
6f231dda | 329 | { |
82d29928 DW |
330 | scic_sds_stp_optimized_request_construct(sci_req, |
331 | SCU_TASK_TYPE_FPDMAQ_READ, | |
332 | len, dir); | |
6f231dda DW |
333 | return SCI_SUCCESS; |
334 | } | |
335 | ||
336 | /** | |
35173d57 | 337 | * scu_stp_raw_request_construct_task_context - |
e2023b87 | 338 | * @sci_req: This parameter specifies the STP request object for which to |
6f231dda DW |
339 | * construct a RAW command frame task context. |
340 | * @task_context: This parameter specifies the SCU specific task context buffer | |
341 | * to construct. | |
342 | * | |
343 | * This method performs the operations common to all SATA/STP requests | |
344 | * utilizing the raw frame method. none | |
345 | */ | |
35173d57 | 346 | static void scu_stp_raw_request_construct_task_context( |
e2023b87 | 347 | struct scic_sds_stp_request *sci_req, |
6f231dda DW |
348 | struct scu_task_context *task_context) |
349 | { | |
e2023b87 | 350 | scu_sata_reqeust_construct_task_context(&sci_req->parent, task_context); |
6f231dda DW |
351 | |
352 | task_context->control_frame = 0; | |
353 | task_context->priority = SCU_TASK_PRIORITY_NORMAL; | |
354 | task_context->task_type = SCU_TASK_TYPE_SATA_RAW_FRAME; | |
e76d6180 | 355 | task_context->type.stp.fis_type = FIS_REGH2D; |
f2f30080 DJ |
356 | task_context->transfer_length_bytes = |
357 | sizeof(struct host_to_dev_fis) - sizeof(u32); | |
6f231dda DW |
358 | } |
359 | ||
6f231dda DW |
360 | void scic_stp_io_request_set_ncq_tag( |
361 | struct scic_sds_request *req, | |
362 | u16 ncq_tag) | |
363 | { | |
364 | /** | |
365 | * @note This could be made to return an error to the user if the user | |
366 | * attempts to set the NCQ tag in the wrong state. | |
367 | */ | |
368 | req->task_context_buffer->type.stp.ncq_tag = ncq_tag; | |
369 | } | |
370 | ||
371 | ||
372 | void *scic_stp_io_request_get_h2d_reg_address( | |
373 | struct scic_sds_request *req) | |
374 | { | |
375 | return req->command_buffer; | |
376 | } | |
377 | ||
378 | ||
379 | void *scic_stp_io_request_get_d2h_reg_address( | |
380 | struct scic_sds_request *req) | |
381 | { | |
382 | return &((struct scic_sds_stp_request *)req)->d2h_reg_fis; | |
383 | } | |
384 | ||
385 | /** | |
386 | * | |
e2023b87 | 387 | * @sci_req: |
6f231dda DW |
388 | * |
389 | * Get the next SGL element from the request. - Check on which SGL element pair | |
390 | * we are working - if working on SLG pair element A - advance to element B - | |
391 | * else - check to see if there are more SGL element pairs for this IO request | |
392 | * - if there are more SGL element pairs - advance to the next pair and return | |
393 | * element A struct scu_sgl_element* | |
394 | */ | |
35173d57 | 395 | static struct scu_sgl_element *scic_sds_stp_request_pio_get_next_sgl(struct scic_sds_stp_request *stp_req) |
103a00c2 | 396 | { |
6f231dda | 397 | struct scu_sgl_element *current_sgl; |
103a00c2 DJ |
398 | struct scic_sds_request *sci_req = &stp_req->parent; |
399 | struct scic_sds_request_pio_sgl *pio_sgl = &stp_req->type.pio.request_current; | |
6f231dda | 400 | |
103a00c2 DJ |
401 | if (pio_sgl->sgl_set == SCU_SGL_ELEMENT_PAIR_A) { |
402 | if (pio_sgl->sgl_pair->B.address_lower == 0 && | |
403 | pio_sgl->sgl_pair->B.address_upper == 0) { | |
6f231dda DW |
404 | current_sgl = NULL; |
405 | } else { | |
103a00c2 DJ |
406 | pio_sgl->sgl_set = SCU_SGL_ELEMENT_PAIR_B; |
407 | current_sgl = &pio_sgl->sgl_pair->B; | |
6f231dda DW |
408 | } |
409 | } else { | |
103a00c2 DJ |
410 | if (pio_sgl->sgl_pair->next_pair_lower == 0 && |
411 | pio_sgl->sgl_pair->next_pair_upper == 0) { | |
6f231dda DW |
412 | current_sgl = NULL; |
413 | } else { | |
103a00c2 | 414 | u64 phys_addr; |
6f231dda | 415 | |
103a00c2 DJ |
416 | phys_addr = pio_sgl->sgl_pair->next_pair_upper; |
417 | phys_addr <<= 32; | |
418 | phys_addr |= pio_sgl->sgl_pair->next_pair_lower; | |
6f231dda | 419 | |
103a00c2 DJ |
420 | pio_sgl->sgl_pair = scic_request_get_virt_addr(sci_req, phys_addr); |
421 | pio_sgl->sgl_set = SCU_SGL_ELEMENT_PAIR_A; | |
422 | current_sgl = &pio_sgl->sgl_pair->A; | |
6f231dda DW |
423 | } |
424 | } | |
425 | ||
426 | return current_sgl; | |
427 | } | |
428 | ||
6f231dda DW |
429 | /** |
430 | * | |
e2023b87 | 431 | * @sci_req: |
6f231dda DW |
432 | * @completion_code: |
433 | * | |
434 | * This method processes a TC completion. The expected TC completion is for | |
435 | * the transmission of the H2D register FIS containing the SATA/STP non-data | |
436 | * request. This method always successfully processes the TC completion. | |
437 | * SCI_SUCCESS This value is always returned. | |
438 | */ | |
439 | static enum sci_status scic_sds_stp_request_non_data_await_h2d_tc_completion_handler( | |
e2023b87 | 440 | struct scic_sds_request *sci_req, |
6f231dda DW |
441 | u32 completion_code) |
442 | { | |
443 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { | |
444 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): | |
445 | scic_sds_request_set_status( | |
e2023b87 | 446 | sci_req, SCU_TASK_DONE_GOOD, SCI_SUCCESS |
6f231dda DW |
447 | ); |
448 | ||
449 | sci_base_state_machine_change_state( | |
e2023b87 | 450 | &sci_req->started_substate_machine, |
6f231dda DW |
451 | SCIC_SDS_STP_REQUEST_STARTED_NON_DATA_AWAIT_D2H_SUBSTATE |
452 | ); | |
453 | break; | |
454 | ||
455 | default: | |
456 | /* | |
457 | * All other completion status cause the IO to be complete. If a NAK | |
458 | * was received, then it is up to the user to retry the request. */ | |
459 | scic_sds_request_set_status( | |
e2023b87 | 460 | sci_req, |
6f231dda DW |
461 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
462 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR | |
463 | ); | |
464 | ||
465 | sci_base_state_machine_change_state( | |
e2023b87 | 466 | &sci_req->state_machine, SCI_BASE_REQUEST_STATE_COMPLETED); |
6f231dda DW |
467 | break; |
468 | } | |
469 | ||
470 | return SCI_SUCCESS; | |
471 | } | |
472 | ||
473 | /** | |
474 | * | |
475 | * @request: This parameter specifies the request for which a frame has been | |
476 | * received. | |
477 | * @frame_index: This parameter specifies the index of the frame that has been | |
478 | * received. | |
479 | * | |
480 | * This method processes frames received from the target while waiting for a | |
481 | * device to host register FIS. If a non-register FIS is received during this | |
482 | * time, it is treated as a protocol violation from an IO perspective. Indicate | |
483 | * if the received frame was processed successfully. | |
484 | */ | |
485 | static enum sci_status scic_sds_stp_request_non_data_await_d2h_frame_handler( | |
e76d6180 | 486 | struct scic_sds_request *sci_req, |
6f231dda DW |
487 | u32 frame_index) |
488 | { | |
489 | enum sci_status status; | |
e76d6180 | 490 | struct dev_to_host_fis *frame_header; |
6f231dda | 491 | u32 *frame_buffer; |
e76d6180 DJ |
492 | struct scic_sds_stp_request *stp_req = |
493 | container_of(sci_req, typeof(*stp_req), parent); | |
6f231dda DW |
494 | |
495 | status = scic_sds_unsolicited_frame_control_get_header( | |
e76d6180 | 496 | &stp_req->parent.owning_controller->uf_control, |
6f231dda | 497 | frame_index, |
e76d6180 | 498 | (void **)&frame_header); |
6f231dda DW |
499 | |
500 | if (status == SCI_SUCCESS) { | |
501 | switch (frame_header->fis_type) { | |
e76d6180 | 502 | case FIS_REGD2H: |
6f231dda | 503 | scic_sds_unsolicited_frame_control_get_buffer( |
e76d6180 | 504 | &stp_req->parent.owning_controller->uf_control, |
6f231dda | 505 | frame_index, |
e76d6180 | 506 | (void **)&frame_buffer); |
6f231dda DW |
507 | |
508 | scic_sds_controller_copy_sata_response( | |
e76d6180 DJ |
509 | &stp_req->d2h_reg_fis, |
510 | (u32 *)frame_header, | |
511 | frame_buffer); | |
6f231dda DW |
512 | |
513 | /* The command has completed with error */ | |
514 | scic_sds_request_set_status( | |
e76d6180 | 515 | &stp_req->parent, |
6f231dda | 516 | SCU_TASK_DONE_CHECK_RESPONSE, |
e76d6180 | 517 | SCI_FAILURE_IO_RESPONSE_VALID); |
6f231dda DW |
518 | break; |
519 | ||
520 | default: | |
e76d6180 | 521 | dev_warn(scic_to_dev(sci_req->owning_controller), |
6f231dda DW |
522 | "%s: IO Request:0x%p Frame Id:%d protocol " |
523 | "violation occurred\n", | |
e76d6180 | 524 | __func__, stp_req, frame_index); |
6f231dda DW |
525 | |
526 | scic_sds_request_set_status( | |
e76d6180 | 527 | &stp_req->parent, |
6f231dda | 528 | SCU_TASK_DONE_UNEXP_FIS, |
e76d6180 | 529 | SCI_FAILURE_PROTOCOL_VIOLATION); |
6f231dda DW |
530 | break; |
531 | } | |
532 | ||
533 | sci_base_state_machine_change_state( | |
e76d6180 DJ |
534 | &stp_req->parent.state_machine, |
535 | SCI_BASE_REQUEST_STATE_COMPLETED); | |
6f231dda DW |
536 | |
537 | /* Frame has been decoded return it to the controller */ | |
538 | scic_sds_controller_release_frame( | |
e76d6180 | 539 | stp_req->parent.owning_controller, frame_index); |
6f231dda | 540 | } else |
e76d6180 | 541 | dev_err(scic_to_dev(sci_req->owning_controller), |
6f231dda DW |
542 | "%s: SCIC IO Request 0x%p could not get frame header " |
543 | "for frame index %d, status %x\n", | |
e76d6180 | 544 | __func__, stp_req, frame_index, status); |
6f231dda DW |
545 | |
546 | return status; | |
547 | } | |
548 | ||
549 | /* --------------------------------------------------------------------------- */ | |
550 | ||
35173d57 | 551 | static const struct scic_sds_io_request_state_handler scic_sds_stp_request_started_non_data_substate_handler_table[] = { |
6f231dda | 552 | [SCIC_SDS_STP_REQUEST_STARTED_NON_DATA_AWAIT_H2D_COMPLETION_SUBSTATE] = { |
38aa74eb | 553 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 554 | .tc_completion_handler = scic_sds_stp_request_non_data_await_h2d_tc_completion_handler, |
6f231dda DW |
555 | }, |
556 | [SCIC_SDS_STP_REQUEST_STARTED_NON_DATA_AWAIT_D2H_SUBSTATE] = { | |
38aa74eb | 557 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 558 | .frame_handler = scic_sds_stp_request_non_data_await_d2h_frame_handler, |
6f231dda DW |
559 | } |
560 | }; | |
561 | ||
562 | static void scic_sds_stp_request_started_non_data_await_h2d_completion_enter( | |
9a0fff7b | 563 | void *object) |
6f231dda | 564 | { |
890cae9b | 565 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
566 | |
567 | SET_STATE_HANDLER( | |
e2023b87 | 568 | sci_req, |
6f231dda DW |
569 | scic_sds_stp_request_started_non_data_substate_handler_table, |
570 | SCIC_SDS_STP_REQUEST_STARTED_NON_DATA_AWAIT_H2D_COMPLETION_SUBSTATE | |
571 | ); | |
572 | ||
573 | scic_sds_remote_device_set_working_request( | |
e2023b87 | 574 | sci_req->target_device, sci_req |
6f231dda DW |
575 | ); |
576 | } | |
577 | ||
9a0fff7b | 578 | static void scic_sds_stp_request_started_non_data_await_d2h_enter(void *object) |
6f231dda | 579 | { |
890cae9b | 580 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
581 | |
582 | SET_STATE_HANDLER( | |
e2023b87 | 583 | sci_req, |
6f231dda DW |
584 | scic_sds_stp_request_started_non_data_substate_handler_table, |
585 | SCIC_SDS_STP_REQUEST_STARTED_NON_DATA_AWAIT_D2H_SUBSTATE | |
586 | ); | |
587 | } | |
588 | ||
589 | /* --------------------------------------------------------------------------- */ | |
590 | ||
35173d57 | 591 | static const struct sci_base_state scic_sds_stp_request_started_non_data_substate_table[] = { |
6f231dda DW |
592 | [SCIC_SDS_STP_REQUEST_STARTED_NON_DATA_AWAIT_H2D_COMPLETION_SUBSTATE] = { |
593 | .enter_state = scic_sds_stp_request_started_non_data_await_h2d_completion_enter, | |
594 | }, | |
595 | [SCIC_SDS_STP_REQUEST_STARTED_NON_DATA_AWAIT_D2H_SUBSTATE] = { | |
596 | .enter_state = scic_sds_stp_request_started_non_data_await_d2h_enter, | |
597 | }, | |
598 | }; | |
599 | ||
35173d57 DW |
600 | enum sci_status scic_sds_stp_non_data_request_construct(struct scic_sds_request *sci_req) |
601 | { | |
e76d6180 DJ |
602 | struct scic_sds_stp_request *stp_req = |
603 | container_of(sci_req, typeof(*stp_req), parent); | |
35173d57 DW |
604 | |
605 | scic_sds_stp_non_ncq_request_construct(sci_req); | |
606 | ||
607 | /* Build the STP task context structure */ | |
608 | scu_stp_raw_request_construct_task_context(stp_req, sci_req->task_context_buffer); | |
609 | ||
610 | sci_base_state_machine_construct(&sci_req->started_substate_machine, | |
890cae9b | 611 | sci_req, |
35173d57 DW |
612 | scic_sds_stp_request_started_non_data_substate_table, |
613 | SCIC_SDS_STP_REQUEST_STARTED_NON_DATA_AWAIT_H2D_COMPLETION_SUBSTATE); | |
614 | ||
615 | return SCI_SUCCESS; | |
616 | } | |
617 | ||
6f231dda DW |
618 | #define SCU_MAX_FRAME_BUFFER_SIZE 0x400 /* 1K is the maximum SCU frame data payload */ |
619 | ||
620 | /** | |
621 | * | |
e2023b87 | 622 | * @sci_req: |
6f231dda DW |
623 | * @length: |
624 | * | |
625 | * This function will transmit DATA_FIS from (current sgl + offset) for input | |
626 | * parameter length. current sgl and offset is alreay stored in the IO request | |
627 | * enum sci_status | |
628 | */ | |
629 | ||
630 | static enum sci_status scic_sds_stp_request_pio_data_out_trasmit_data_frame( | |
e2023b87 | 631 | struct scic_sds_request *sci_req, |
6f231dda DW |
632 | u32 length) |
633 | { | |
e76d6180 DJ |
634 | struct scic_sds_stp_request *stp_req = |
635 | container_of(sci_req, typeof(*stp_req), parent); | |
6f231dda | 636 | struct scu_sgl_element *current_sgl; |
6f231dda DW |
637 | |
638 | /* | |
639 | * Recycle the TC and reconstruct it for sending out DATA FIS containing | |
640 | * for the data from current_sgl+offset for the input length */ | |
641 | struct scu_task_context *task_context = scic_sds_controller_get_task_context_buffer( | |
e2023b87 DJ |
642 | sci_req->owning_controller, |
643 | sci_req->io_tag | |
6f231dda DW |
644 | ); |
645 | ||
e2023b87 DJ |
646 | if (stp_req->type.pio.request_current.sgl_set == SCU_SGL_ELEMENT_PAIR_A) |
647 | current_sgl = &(stp_req->type.pio.request_current.sgl_pair->A); | |
6f231dda | 648 | else |
e2023b87 | 649 | current_sgl = &(stp_req->type.pio.request_current.sgl_pair->B); |
6f231dda DW |
650 | |
651 | /* update the TC */ | |
652 | task_context->command_iu_upper = current_sgl->address_upper; | |
653 | task_context->command_iu_lower = current_sgl->address_lower; | |
654 | task_context->transfer_length_bytes = length; | |
e76d6180 | 655 | task_context->type.stp.fis_type = FIS_DATA; |
6f231dda DW |
656 | |
657 | /* send the new TC out. */ | |
e2023b87 | 658 | return scic_controller_continue_io(sci_req); |
6f231dda DW |
659 | } |
660 | ||
661 | /** | |
662 | * | |
e2023b87 | 663 | * @sci_req: |
6f231dda DW |
664 | * |
665 | * enum sci_status | |
666 | */ | |
667 | static enum sci_status scic_sds_stp_request_pio_data_out_transmit_data( | |
e2023b87 | 668 | struct scic_sds_request *sci_req) |
6f231dda DW |
669 | { |
670 | ||
671 | struct scu_sgl_element *current_sgl; | |
672 | u32 sgl_offset; | |
673 | u32 remaining_bytes_in_current_sgl = 0; | |
674 | enum sci_status status = SCI_SUCCESS; | |
675 | ||
e76d6180 DJ |
676 | struct scic_sds_stp_request *stp_req = |
677 | container_of(sci_req, typeof(*stp_req), parent); | |
6f231dda | 678 | |
e2023b87 | 679 | sgl_offset = stp_req->type.pio.request_current.sgl_offset; |
6f231dda | 680 | |
e2023b87 DJ |
681 | if (stp_req->type.pio.request_current.sgl_set == SCU_SGL_ELEMENT_PAIR_A) { |
682 | current_sgl = &(stp_req->type.pio.request_current.sgl_pair->A); | |
683 | remaining_bytes_in_current_sgl = stp_req->type.pio.request_current.sgl_pair->A.length - sgl_offset; | |
6f231dda | 684 | } else { |
e2023b87 DJ |
685 | current_sgl = &(stp_req->type.pio.request_current.sgl_pair->B); |
686 | remaining_bytes_in_current_sgl = stp_req->type.pio.request_current.sgl_pair->B.length - sgl_offset; | |
6f231dda DW |
687 | } |
688 | ||
689 | ||
e2023b87 DJ |
690 | if (stp_req->type.pio.pio_transfer_bytes > 0) { |
691 | if (stp_req->type.pio.pio_transfer_bytes >= remaining_bytes_in_current_sgl) { | |
6f231dda | 692 | /* recycle the TC and send the H2D Data FIS from (current sgl + sgl_offset) and length = remaining_bytes_in_current_sgl */ |
e2023b87 | 693 | status = scic_sds_stp_request_pio_data_out_trasmit_data_frame(sci_req, remaining_bytes_in_current_sgl); |
6f231dda | 694 | if (status == SCI_SUCCESS) { |
e2023b87 | 695 | stp_req->type.pio.pio_transfer_bytes -= remaining_bytes_in_current_sgl; |
6f231dda DW |
696 | |
697 | /* update the current sgl, sgl_offset and save for future */ | |
e2023b87 | 698 | current_sgl = scic_sds_stp_request_pio_get_next_sgl(stp_req); |
6f231dda DW |
699 | sgl_offset = 0; |
700 | } | |
e2023b87 | 701 | } else if (stp_req->type.pio.pio_transfer_bytes < remaining_bytes_in_current_sgl) { |
6f231dda | 702 | /* recycle the TC and send the H2D Data FIS from (current sgl + sgl_offset) and length = type.pio.pio_transfer_bytes */ |
e2023b87 | 703 | scic_sds_stp_request_pio_data_out_trasmit_data_frame(sci_req, stp_req->type.pio.pio_transfer_bytes); |
6f231dda DW |
704 | |
705 | if (status == SCI_SUCCESS) { | |
706 | /* Sgl offset will be adjusted and saved for future */ | |
e2023b87 DJ |
707 | sgl_offset += stp_req->type.pio.pio_transfer_bytes; |
708 | current_sgl->address_lower += stp_req->type.pio.pio_transfer_bytes; | |
709 | stp_req->type.pio.pio_transfer_bytes = 0; | |
6f231dda DW |
710 | } |
711 | } | |
712 | } | |
713 | ||
714 | if (status == SCI_SUCCESS) { | |
e2023b87 | 715 | stp_req->type.pio.request_current.sgl_offset = sgl_offset; |
6f231dda DW |
716 | } |
717 | ||
718 | return status; | |
719 | } | |
720 | ||
721 | /** | |
722 | * | |
103a00c2 | 723 | * @stp_request: The request that is used for the SGL processing. |
6f231dda DW |
724 | * @data_buffer: The buffer of data to be copied. |
725 | * @length: The length of the data transfer. | |
726 | * | |
727 | * Copy the data from the buffer for the length specified to the IO reqeust SGL | |
728 | * specified data region. enum sci_status | |
729 | */ | |
103a00c2 DJ |
730 | static enum sci_status |
731 | scic_sds_stp_request_pio_data_in_copy_data_buffer(struct scic_sds_stp_request *stp_req, | |
732 | u8 *data_buf, u32 len) | |
6f231dda | 733 | { |
103a00c2 DJ |
734 | struct scic_sds_request *sci_req; |
735 | struct isci_request *ireq; | |
736 | u8 *src_addr; | |
737 | int copy_len; | |
738 | struct sas_task *task; | |
739 | struct scatterlist *sg; | |
740 | void *kaddr; | |
741 | int total_len = len; | |
742 | ||
743 | sci_req = &stp_req->parent; | |
744 | ireq = scic_sds_request_get_user_request(sci_req); | |
745 | task = isci_request_access_task(ireq); | |
746 | src_addr = data_buf; | |
747 | ||
748 | if (task->num_scatter > 0) { | |
749 | sg = task->scatter; | |
750 | ||
751 | while (total_len > 0) { | |
752 | struct page *page = sg_page(sg); | |
753 | ||
754 | copy_len = min_t(int, total_len, sg_dma_len(sg)); | |
755 | kaddr = kmap_atomic(page, KM_IRQ0); | |
756 | memcpy(kaddr + sg->offset, src_addr, copy_len); | |
757 | kunmap_atomic(kaddr, KM_IRQ0); | |
758 | total_len -= copy_len; | |
759 | src_addr += copy_len; | |
760 | sg = sg_next(sg); | |
6f231dda | 761 | } |
103a00c2 DJ |
762 | } else { |
763 | BUG_ON(task->total_xfer_len < total_len); | |
764 | memcpy(task->scatter, src_addr, total_len); | |
6f231dda DW |
765 | } |
766 | ||
103a00c2 | 767 | return SCI_SUCCESS; |
6f231dda DW |
768 | } |
769 | ||
770 | /** | |
771 | * | |
e2023b87 | 772 | * @sci_req: The PIO DATA IN request that is to receive the data. |
6f231dda DW |
773 | * @data_buffer: The buffer to copy from. |
774 | * | |
775 | * Copy the data buffer to the io request data region. enum sci_status | |
776 | */ | |
777 | static enum sci_status scic_sds_stp_request_pio_data_in_copy_data( | |
e2023b87 | 778 | struct scic_sds_stp_request *sci_req, |
6f231dda DW |
779 | u8 *data_buffer) |
780 | { | |
781 | enum sci_status status; | |
782 | ||
783 | /* | |
784 | * If there is less than 1K remaining in the transfer request | |
785 | * copy just the data for the transfer */ | |
e2023b87 | 786 | if (sci_req->type.pio.pio_transfer_bytes < SCU_MAX_FRAME_BUFFER_SIZE) { |
6f231dda | 787 | status = scic_sds_stp_request_pio_data_in_copy_data_buffer( |
e2023b87 | 788 | sci_req, data_buffer, sci_req->type.pio.pio_transfer_bytes); |
6f231dda DW |
789 | |
790 | if (status == SCI_SUCCESS) | |
e2023b87 | 791 | sci_req->type.pio.pio_transfer_bytes = 0; |
6f231dda DW |
792 | } else { |
793 | /* We are transfering the whole frame so copy */ | |
794 | status = scic_sds_stp_request_pio_data_in_copy_data_buffer( | |
e2023b87 | 795 | sci_req, data_buffer, SCU_MAX_FRAME_BUFFER_SIZE); |
6f231dda DW |
796 | |
797 | if (status == SCI_SUCCESS) | |
e2023b87 | 798 | sci_req->type.pio.pio_transfer_bytes -= SCU_MAX_FRAME_BUFFER_SIZE; |
6f231dda DW |
799 | } |
800 | ||
801 | return status; | |
802 | } | |
803 | ||
804 | /** | |
805 | * | |
e2023b87 | 806 | * @sci_req: |
6f231dda DW |
807 | * @completion_code: |
808 | * | |
809 | * enum sci_status | |
810 | */ | |
811 | static enum sci_status scic_sds_stp_request_pio_await_h2d_completion_tc_completion_handler( | |
e2023b87 | 812 | struct scic_sds_request *sci_req, |
6f231dda DW |
813 | u32 completion_code) |
814 | { | |
815 | enum sci_status status = SCI_SUCCESS; | |
816 | ||
817 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { | |
818 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): | |
819 | scic_sds_request_set_status( | |
e2023b87 | 820 | sci_req, SCU_TASK_DONE_GOOD, SCI_SUCCESS |
6f231dda DW |
821 | ); |
822 | ||
823 | sci_base_state_machine_change_state( | |
e2023b87 | 824 | &sci_req->started_substate_machine, |
6f231dda DW |
825 | SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_FRAME_SUBSTATE |
826 | ); | |
827 | break; | |
828 | ||
829 | default: | |
830 | /* | |
831 | * All other completion status cause the IO to be complete. If a NAK | |
832 | * was received, then it is up to the user to retry the request. */ | |
833 | scic_sds_request_set_status( | |
e2023b87 | 834 | sci_req, |
6f231dda DW |
835 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
836 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR | |
837 | ); | |
838 | ||
839 | sci_base_state_machine_change_state( | |
e2023b87 | 840 | &sci_req->state_machine, |
6f231dda DW |
841 | SCI_BASE_REQUEST_STATE_COMPLETED |
842 | ); | |
843 | break; | |
844 | } | |
845 | ||
846 | return status; | |
847 | } | |
848 | ||
849 | /** | |
850 | * | |
e2023b87 | 851 | * @sci_req: |
6f231dda DW |
852 | * @frame_index: |
853 | * | |
854 | * enum sci_status | |
855 | */ | |
856 | static enum sci_status scic_sds_stp_request_pio_await_frame_frame_handler( | |
e76d6180 | 857 | struct scic_sds_request *sci_req, |
6f231dda DW |
858 | u32 frame_index) |
859 | { | |
860 | enum sci_status status; | |
e76d6180 | 861 | struct dev_to_host_fis *frame_header; |
6f231dda | 862 | u32 *frame_buffer; |
e76d6180 DJ |
863 | struct scic_sds_stp_request *stp_req = container_of(sci_req, typeof(*stp_req), parent); |
864 | struct isci_request *ireq = sci_req->ireq; | |
865 | struct sas_task *task = isci_request_access_task(ireq); | |
6f231dda DW |
866 | |
867 | status = scic_sds_unsolicited_frame_control_get_header( | |
e76d6180 | 868 | &(stp_req->parent.owning_controller->uf_control), |
6f231dda | 869 | frame_index, |
e76d6180 | 870 | (void **)&frame_header); |
6f231dda DW |
871 | |
872 | if (status == SCI_SUCCESS) { | |
873 | switch (frame_header->fis_type) { | |
e76d6180 | 874 | case FIS_PIO_SETUP: |
6f231dda DW |
875 | /* Get from the frame buffer the PIO Setup Data */ |
876 | scic_sds_unsolicited_frame_control_get_buffer( | |
e76d6180 | 877 | &(stp_req->parent.owning_controller->uf_control), |
6f231dda | 878 | frame_index, |
e76d6180 | 879 | (void **)&frame_buffer); |
6f231dda | 880 | |
e76d6180 DJ |
881 | /* Get the data from the PIO Setup The SCU Hardware |
882 | * returns first word in the frame_header and the rest | |
883 | * of the data is in the frame buffer so we need to back | |
884 | * up one dword | |
885 | */ | |
886 | ||
887 | /* transfer_count: first 16bits in the 4th dword */ | |
888 | stp_req->type.pio.pio_transfer_bytes = | |
889 | frame_buffer[3] & 0xffff; | |
890 | ||
891 | /* ending_status: 4th byte in the 3rd dword */ | |
892 | stp_req->type.pio.ending_status = | |
893 | (frame_buffer[2] >> 24) & 0xff; | |
6f231dda DW |
894 | |
895 | scic_sds_controller_copy_sata_response( | |
e76d6180 DJ |
896 | &stp_req->d2h_reg_fis, |
897 | (u32 *)frame_header, | |
898 | frame_buffer); | |
6f231dda | 899 | |
e76d6180 DJ |
900 | stp_req->d2h_reg_fis.status = |
901 | stp_req->type.pio.ending_status; | |
6f231dda | 902 | |
e76d6180 DJ |
903 | /* The next state is dependent on whether the |
904 | * request was PIO Data-in or Data out | |
905 | */ | |
906 | if (task->data_dir == DMA_FROM_DEVICE) { | |
6f231dda | 907 | sci_base_state_machine_change_state( |
e76d6180 DJ |
908 | &stp_req->parent.started_substate_machine, |
909 | SCIC_SDS_STP_REQUEST_STARTED_PIO_DATA_IN_AWAIT_DATA_SUBSTATE); | |
910 | } else if (task->data_dir == DMA_TO_DEVICE) { | |
6f231dda | 911 | /* Transmit data */ |
e76d6180 | 912 | status = scic_sds_stp_request_pio_data_out_transmit_data(sci_req); |
6f231dda DW |
913 | if (status == SCI_SUCCESS) { |
914 | sci_base_state_machine_change_state( | |
e76d6180 DJ |
915 | &stp_req->parent.started_substate_machine, |
916 | SCIC_SDS_STP_REQUEST_STARTED_PIO_DATA_OUT_TRANSMIT_DATA_SUBSTATE); | |
6f231dda DW |
917 | } |
918 | } | |
919 | break; | |
920 | ||
e76d6180 | 921 | case FIS_SETDEVBITS: |
6f231dda | 922 | sci_base_state_machine_change_state( |
e76d6180 DJ |
923 | &stp_req->parent.started_substate_machine, |
924 | SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_FRAME_SUBSTATE); | |
6f231dda DW |
925 | break; |
926 | ||
e76d6180 DJ |
927 | case FIS_REGD2H: |
928 | if ((frame_header->status & ATA_BUSY) == 0) { | |
6f231dda | 929 | scic_sds_unsolicited_frame_control_get_buffer( |
e76d6180 | 930 | &(stp_req->parent.owning_controller->uf_control), |
6f231dda | 931 | frame_index, |
e76d6180 | 932 | (void **)&frame_buffer); |
6f231dda DW |
933 | |
934 | scic_sds_controller_copy_sata_response( | |
e76d6180 DJ |
935 | &stp_req->d2h_reg_fis, |
936 | (u32 *)frame_header, | |
937 | frame_buffer); | |
6f231dda DW |
938 | |
939 | scic_sds_request_set_status( | |
e76d6180 | 940 | &stp_req->parent, |
6f231dda | 941 | SCU_TASK_DONE_CHECK_RESPONSE, |
e76d6180 | 942 | SCI_FAILURE_IO_RESPONSE_VALID); |
6f231dda DW |
943 | |
944 | sci_base_state_machine_change_state( | |
e76d6180 DJ |
945 | &stp_req->parent.state_machine, |
946 | SCI_BASE_REQUEST_STATE_COMPLETED); | |
6f231dda | 947 | } else { |
e76d6180 DJ |
948 | /* Now why is the drive sending a D2H Register |
949 | * FIS when it is still busy? | |
950 | * Do nothing since we are still in the right | |
951 | * state. | |
952 | */ | |
953 | dev_dbg(scic_to_dev(sci_req->owning_controller), | |
6f231dda DW |
954 | "%s: SCIC PIO Request 0x%p received " |
955 | "D2H Register FIS with BSY status " | |
956 | "0x%x\n", | |
957 | __func__, | |
e76d6180 | 958 | stp_req, |
6f231dda DW |
959 | frame_header->status); |
960 | } | |
961 | break; | |
962 | ||
963 | default: | |
e76d6180 | 964 | /* FIXME: what do we do here? */ |
6f231dda DW |
965 | break; |
966 | } | |
967 | ||
968 | /* Frame is decoded return it to the controller */ | |
969 | scic_sds_controller_release_frame( | |
e76d6180 DJ |
970 | stp_req->parent.owning_controller, |
971 | frame_index); | |
6f231dda | 972 | } else |
e76d6180 | 973 | dev_err(scic_to_dev(sci_req->owning_controller), |
6f231dda DW |
974 | "%s: SCIC IO Request 0x%p could not get frame header " |
975 | "for frame index %d, status %x\n", | |
e76d6180 | 976 | __func__, stp_req, frame_index, status); |
6f231dda DW |
977 | |
978 | return status; | |
979 | } | |
980 | ||
981 | /** | |
982 | * | |
e2023b87 | 983 | * @sci_req: |
6f231dda DW |
984 | * @frame_index: |
985 | * | |
986 | * enum sci_status | |
987 | */ | |
988 | static enum sci_status scic_sds_stp_request_pio_data_in_await_data_frame_handler( | |
e76d6180 | 989 | struct scic_sds_request *sci_req, |
6f231dda DW |
990 | u32 frame_index) |
991 | { | |
992 | enum sci_status status; | |
e76d6180 | 993 | struct dev_to_host_fis *frame_header; |
6f231dda | 994 | struct sata_fis_data *frame_buffer; |
e76d6180 DJ |
995 | struct scic_sds_stp_request *stp_req = |
996 | container_of(sci_req, typeof(*stp_req), parent); | |
6f231dda DW |
997 | |
998 | status = scic_sds_unsolicited_frame_control_get_header( | |
e76d6180 | 999 | &(stp_req->parent.owning_controller->uf_control), |
6f231dda | 1000 | frame_index, |
e76d6180 | 1001 | (void **)&frame_header); |
6f231dda DW |
1002 | |
1003 | if (status == SCI_SUCCESS) { | |
e76d6180 DJ |
1004 | if (frame_header->fis_type == FIS_DATA) { |
1005 | if (stp_req->type.pio.request_current.sgl_pair == | |
1006 | NULL) { | |
1007 | stp_req->parent.saved_rx_frame_index = | |
1008 | frame_index; | |
1009 | stp_req->type.pio.pio_transfer_bytes = 0; | |
6f231dda DW |
1010 | } else { |
1011 | status = scic_sds_unsolicited_frame_control_get_buffer( | |
e76d6180 | 1012 | &(stp_req->parent.owning_controller->uf_control), |
6f231dda | 1013 | frame_index, |
e76d6180 | 1014 | (void **)&frame_buffer); |
6f231dda | 1015 | |
e76d6180 DJ |
1016 | status = scic_sds_stp_request_pio_data_in_copy_data( |
1017 | stp_req, | |
1018 | (u8 *)frame_buffer); | |
6f231dda DW |
1019 | |
1020 | /* Frame is decoded return it to the controller */ | |
1021 | scic_sds_controller_release_frame( | |
e76d6180 DJ |
1022 | stp_req->parent.owning_controller, |
1023 | frame_index); | |
6f231dda DW |
1024 | } |
1025 | ||
1026 | /* | |
e76d6180 DJ |
1027 | * Check for the end of the transfer, are there more |
1028 | * bytes remaining for this data transfer | |
1029 | */ | |
1030 | if ((status == SCI_SUCCESS) && | |
1031 | (stp_req->type.pio.pio_transfer_bytes == 0)) { | |
1032 | if ((stp_req->type.pio.ending_status & | |
1033 | ATA_BUSY) == 0) { | |
6f231dda | 1034 | scic_sds_request_set_status( |
e76d6180 | 1035 | &stp_req->parent, |
6f231dda | 1036 | SCU_TASK_DONE_CHECK_RESPONSE, |
e76d6180 | 1037 | SCI_FAILURE_IO_RESPONSE_VALID); |
6f231dda DW |
1038 | |
1039 | sci_base_state_machine_change_state( | |
e76d6180 DJ |
1040 | &stp_req->parent.state_machine, |
1041 | SCI_BASE_REQUEST_STATE_COMPLETED); | |
6f231dda DW |
1042 | } else { |
1043 | sci_base_state_machine_change_state( | |
e76d6180 DJ |
1044 | &sci_req->started_substate_machine, |
1045 | SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_FRAME_SUBSTATE); | |
6f231dda DW |
1046 | } |
1047 | } | |
1048 | } else { | |
e76d6180 | 1049 | dev_err(scic_to_dev(sci_req->owning_controller), |
6f231dda DW |
1050 | "%s: SCIC PIO Request 0x%p received frame %d " |
1051 | "with fis type 0x%02x when expecting a data " | |
1052 | "fis.\n", | |
1053 | __func__, | |
e76d6180 | 1054 | stp_req, |
6f231dda DW |
1055 | frame_index, |
1056 | frame_header->fis_type); | |
1057 | ||
1058 | scic_sds_request_set_status( | |
e76d6180 | 1059 | &stp_req->parent, |
6f231dda | 1060 | SCU_TASK_DONE_GOOD, |
e76d6180 | 1061 | SCI_FAILURE_IO_REQUIRES_SCSI_ABORT); |
6f231dda DW |
1062 | |
1063 | sci_base_state_machine_change_state( | |
e76d6180 DJ |
1064 | &stp_req->parent.state_machine, |
1065 | SCI_BASE_REQUEST_STATE_COMPLETED); | |
6f231dda DW |
1066 | |
1067 | /* Frame is decoded return it to the controller */ | |
1068 | scic_sds_controller_release_frame( | |
e76d6180 DJ |
1069 | stp_req->parent.owning_controller, |
1070 | frame_index); | |
6f231dda DW |
1071 | } |
1072 | } else | |
e76d6180 | 1073 | dev_err(scic_to_dev(sci_req->owning_controller), |
6f231dda DW |
1074 | "%s: SCIC IO Request 0x%p could not get frame header " |
1075 | "for frame index %d, status %x\n", | |
e76d6180 | 1076 | __func__, stp_req, frame_index, status); |
6f231dda DW |
1077 | |
1078 | return status; | |
1079 | } | |
1080 | ||
1081 | ||
1082 | /** | |
1083 | * | |
e2023b87 | 1084 | * @sci_req: |
6f231dda DW |
1085 | * @completion_code: |
1086 | * | |
1087 | * enum sci_status | |
1088 | */ | |
1089 | static enum sci_status scic_sds_stp_request_pio_data_out_await_data_transmit_completion_tc_completion_handler( | |
1090 | ||
e2023b87 | 1091 | struct scic_sds_request *sci_req, |
6f231dda DW |
1092 | u32 completion_code) |
1093 | { | |
e76d6180 DJ |
1094 | enum sci_status status = SCI_SUCCESS; |
1095 | bool all_frames_transferred = false; | |
1096 | struct scic_sds_stp_request *stp_req = | |
1097 | container_of(sci_req, typeof(*stp_req), parent); | |
6f231dda DW |
1098 | |
1099 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { | |
1100 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): | |
1101 | /* Transmit data */ | |
e2023b87 DJ |
1102 | if (stp_req->type.pio.pio_transfer_bytes != 0) { |
1103 | status = scic_sds_stp_request_pio_data_out_transmit_data(sci_req); | |
6f231dda | 1104 | if (status == SCI_SUCCESS) { |
e2023b87 | 1105 | if (stp_req->type.pio.pio_transfer_bytes == 0) |
6f231dda DW |
1106 | all_frames_transferred = true; |
1107 | } | |
e2023b87 | 1108 | } else if (stp_req->type.pio.pio_transfer_bytes == 0) { |
6f231dda DW |
1109 | /* |
1110 | * this will happen if the all data is written at the | |
1111 | * first time after the pio setup fis is received | |
1112 | */ | |
1113 | all_frames_transferred = true; | |
1114 | } | |
1115 | ||
1116 | /* all data transferred. */ | |
1117 | if (all_frames_transferred) { | |
1118 | /* | |
1119 | * Change the state to SCIC_SDS_STP_REQUEST_STARTED_PIO_DATA_IN_AWAIT_FRAME_SUBSTATE | |
1120 | * and wait for PIO_SETUP fis / or D2H REg fis. */ | |
1121 | sci_base_state_machine_change_state( | |
e2023b87 | 1122 | &sci_req->started_substate_machine, |
6f231dda DW |
1123 | SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_FRAME_SUBSTATE |
1124 | ); | |
1125 | } | |
1126 | break; | |
1127 | ||
1128 | default: | |
1129 | /* | |
1130 | * All other completion status cause the IO to be complete. If a NAK | |
1131 | * was received, then it is up to the user to retry the request. */ | |
1132 | scic_sds_request_set_status( | |
e2023b87 | 1133 | sci_req, |
6f231dda DW |
1134 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
1135 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR | |
1136 | ); | |
1137 | ||
1138 | sci_base_state_machine_change_state( | |
e2023b87 | 1139 | &sci_req->state_machine, |
6f231dda DW |
1140 | SCI_BASE_REQUEST_STATE_COMPLETED |
1141 | ); | |
1142 | break; | |
1143 | } | |
1144 | ||
1145 | return status; | |
1146 | } | |
1147 | ||
1148 | /** | |
1149 | * | |
1150 | * @request: This is the request which is receiving the event. | |
1151 | * @event_code: This is the event code that the request on which the request is | |
1152 | * expected to take action. | |
1153 | * | |
1154 | * This method will handle any link layer events while waiting for the data | |
1155 | * frame. enum sci_status SCI_SUCCESS SCI_FAILURE | |
1156 | */ | |
1157 | static enum sci_status scic_sds_stp_request_pio_data_in_await_data_event_handler( | |
1158 | struct scic_sds_request *request, | |
1159 | u32 event_code) | |
1160 | { | |
1161 | enum sci_status status; | |
1162 | ||
1163 | switch (scu_get_event_specifier(event_code)) { | |
1164 | case SCU_TASK_DONE_CRC_ERR << SCU_EVENT_SPECIFIC_CODE_SHIFT: | |
1165 | /* | |
1166 | * We are waiting for data and the SCU has R_ERR the data frame. | |
1167 | * Go back to waiting for the D2H Register FIS */ | |
1168 | sci_base_state_machine_change_state( | |
1169 | &request->started_substate_machine, | |
1170 | SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_FRAME_SUBSTATE | |
1171 | ); | |
1172 | ||
1173 | status = SCI_SUCCESS; | |
1174 | break; | |
1175 | ||
1176 | default: | |
1177 | dev_err(scic_to_dev(request->owning_controller), | |
1178 | "%s: SCIC PIO Request 0x%p received unexpected " | |
1179 | "event 0x%08x\n", | |
1180 | __func__, request, event_code); | |
1181 | ||
1182 | /* / @todo Should we fail the PIO request when we get an unexpected event? */ | |
1183 | status = SCI_FAILURE; | |
1184 | break; | |
1185 | } | |
1186 | ||
1187 | return status; | |
1188 | } | |
1189 | ||
1190 | /* --------------------------------------------------------------------------- */ | |
1191 | ||
35173d57 | 1192 | static const struct scic_sds_io_request_state_handler scic_sds_stp_request_started_pio_substate_handler_table[] = { |
6f231dda | 1193 | [SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_H2D_COMPLETION_SUBSTATE] = { |
38aa74eb | 1194 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 1195 | .tc_completion_handler = scic_sds_stp_request_pio_await_h2d_completion_tc_completion_handler, |
6f231dda DW |
1196 | }, |
1197 | [SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_FRAME_SUBSTATE] = { | |
38aa74eb | 1198 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 1199 | .frame_handler = scic_sds_stp_request_pio_await_frame_frame_handler |
6f231dda DW |
1200 | }, |
1201 | [SCIC_SDS_STP_REQUEST_STARTED_PIO_DATA_IN_AWAIT_DATA_SUBSTATE] = { | |
38aa74eb | 1202 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb CH |
1203 | .event_handler = scic_sds_stp_request_pio_data_in_await_data_event_handler, |
1204 | .frame_handler = scic_sds_stp_request_pio_data_in_await_data_frame_handler | |
6f231dda DW |
1205 | }, |
1206 | [SCIC_SDS_STP_REQUEST_STARTED_PIO_DATA_OUT_TRANSMIT_DATA_SUBSTATE] = { | |
38aa74eb | 1207 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 1208 | .tc_completion_handler = scic_sds_stp_request_pio_data_out_await_data_transmit_completion_tc_completion_handler, |
6f231dda DW |
1209 | } |
1210 | }; | |
1211 | ||
1212 | static void scic_sds_stp_request_started_pio_await_h2d_completion_enter( | |
9a0fff7b | 1213 | void *object) |
6f231dda | 1214 | { |
890cae9b | 1215 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
1216 | |
1217 | SET_STATE_HANDLER( | |
e2023b87 | 1218 | sci_req, |
6f231dda DW |
1219 | scic_sds_stp_request_started_pio_substate_handler_table, |
1220 | SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_H2D_COMPLETION_SUBSTATE | |
1221 | ); | |
1222 | ||
1223 | scic_sds_remote_device_set_working_request( | |
e2023b87 | 1224 | sci_req->target_device, sci_req); |
6f231dda DW |
1225 | } |
1226 | ||
9a0fff7b | 1227 | static void scic_sds_stp_request_started_pio_await_frame_enter(void *object) |
6f231dda | 1228 | { |
890cae9b | 1229 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
1230 | |
1231 | SET_STATE_HANDLER( | |
e2023b87 | 1232 | sci_req, |
6f231dda DW |
1233 | scic_sds_stp_request_started_pio_substate_handler_table, |
1234 | SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_FRAME_SUBSTATE | |
1235 | ); | |
1236 | } | |
1237 | ||
1238 | static void scic_sds_stp_request_started_pio_data_in_await_data_enter( | |
9a0fff7b | 1239 | void *object) |
6f231dda | 1240 | { |
890cae9b | 1241 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
1242 | |
1243 | SET_STATE_HANDLER( | |
e2023b87 | 1244 | sci_req, |
6f231dda DW |
1245 | scic_sds_stp_request_started_pio_substate_handler_table, |
1246 | SCIC_SDS_STP_REQUEST_STARTED_PIO_DATA_IN_AWAIT_DATA_SUBSTATE | |
1247 | ); | |
1248 | } | |
1249 | ||
1250 | static void scic_sds_stp_request_started_pio_data_out_transmit_data_enter( | |
9a0fff7b | 1251 | void *object) |
6f231dda | 1252 | { |
890cae9b | 1253 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
1254 | |
1255 | SET_STATE_HANDLER( | |
e2023b87 | 1256 | sci_req, |
6f231dda DW |
1257 | scic_sds_stp_request_started_pio_substate_handler_table, |
1258 | SCIC_SDS_STP_REQUEST_STARTED_PIO_DATA_OUT_TRANSMIT_DATA_SUBSTATE | |
1259 | ); | |
1260 | } | |
1261 | ||
1262 | /* --------------------------------------------------------------------------- */ | |
1263 | ||
35173d57 | 1264 | static const struct sci_base_state scic_sds_stp_request_started_pio_substate_table[] = { |
6f231dda DW |
1265 | [SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_H2D_COMPLETION_SUBSTATE] = { |
1266 | .enter_state = scic_sds_stp_request_started_pio_await_h2d_completion_enter, | |
1267 | }, | |
1268 | [SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_FRAME_SUBSTATE] = { | |
1269 | .enter_state = scic_sds_stp_request_started_pio_await_frame_enter, | |
1270 | }, | |
1271 | [SCIC_SDS_STP_REQUEST_STARTED_PIO_DATA_IN_AWAIT_DATA_SUBSTATE] = { | |
1272 | .enter_state = scic_sds_stp_request_started_pio_data_in_await_data_enter, | |
1273 | }, | |
1274 | [SCIC_SDS_STP_REQUEST_STARTED_PIO_DATA_OUT_TRANSMIT_DATA_SUBSTATE] = { | |
1275 | .enter_state = scic_sds_stp_request_started_pio_data_out_transmit_data_enter, | |
1276 | } | |
1277 | }; | |
1278 | ||
e76d6180 DJ |
1279 | enum sci_status |
1280 | scic_sds_stp_pio_request_construct(struct scic_sds_request *sci_req, | |
1281 | bool copy_rx_frame) | |
35173d57 | 1282 | { |
e76d6180 DJ |
1283 | struct scic_sds_stp_request *stp_req = |
1284 | container_of(sci_req, typeof(*stp_req), parent); | |
35173d57 DW |
1285 | struct scic_sds_stp_pio_request *pio = &stp_req->type.pio; |
1286 | ||
1287 | scic_sds_stp_non_ncq_request_construct(sci_req); | |
1288 | ||
1289 | scu_stp_raw_request_construct_task_context(stp_req, | |
1290 | sci_req->task_context_buffer); | |
1291 | ||
1292 | pio->current_transfer_bytes = 0; | |
1293 | pio->ending_error = 0; | |
1294 | pio->ending_status = 0; | |
1295 | ||
1296 | pio->request_current.sgl_offset = 0; | |
1297 | pio->request_current.sgl_set = SCU_SGL_ELEMENT_PAIR_A; | |
35173d57 DW |
1298 | |
1299 | if (copy_rx_frame) { | |
1300 | scic_sds_request_build_sgl(sci_req); | |
1301 | /* Since the IO request copy of the TC contains the same data as | |
1302 | * the actual TC this pointer is vaild for either. | |
1303 | */ | |
1304 | pio->request_current.sgl_pair = &sci_req->task_context_buffer->sgl_pair_ab; | |
1305 | } else { | |
1306 | /* The user does not want the data copied to the SGL buffer location */ | |
1307 | pio->request_current.sgl_pair = NULL; | |
1308 | } | |
1309 | ||
1310 | sci_base_state_machine_construct(&sci_req->started_substate_machine, | |
890cae9b | 1311 | sci_req, |
35173d57 DW |
1312 | scic_sds_stp_request_started_pio_substate_table, |
1313 | SCIC_SDS_STP_REQUEST_STARTED_PIO_AWAIT_H2D_COMPLETION_SUBSTATE); | |
1314 | ||
1315 | return SCI_SUCCESS; | |
1316 | } | |
1317 | ||
6f231dda | 1318 | static void scic_sds_stp_request_udma_complete_request( |
38aa74eb | 1319 | struct scic_sds_request *request, |
6f231dda DW |
1320 | u32 scu_status, |
1321 | enum sci_status sci_status) | |
1322 | { | |
38aa74eb CH |
1323 | scic_sds_request_set_status(request, scu_status, sci_status); |
1324 | sci_base_state_machine_change_state(&request->state_machine, | |
1325 | SCI_BASE_REQUEST_STATE_COMPLETED); | |
6f231dda DW |
1326 | } |
1327 | ||
1328 | /** | |
1329 | * | |
e2023b87 | 1330 | * @sci_req: |
6f231dda DW |
1331 | * @frame_index: |
1332 | * | |
1333 | * enum sci_status | |
1334 | */ | |
1335 | static enum sci_status scic_sds_stp_request_udma_general_frame_handler( | |
e2023b87 | 1336 | struct scic_sds_request *sci_req, |
6f231dda DW |
1337 | u32 frame_index) |
1338 | { | |
1339 | enum sci_status status; | |
e76d6180 | 1340 | struct dev_to_host_fis *frame_header; |
6f231dda DW |
1341 | u32 *frame_buffer; |
1342 | ||
1343 | status = scic_sds_unsolicited_frame_control_get_header( | |
e2023b87 | 1344 | &sci_req->owning_controller->uf_control, |
6f231dda | 1345 | frame_index, |
e76d6180 | 1346 | (void **)&frame_header); |
6f231dda | 1347 | |
e76d6180 DJ |
1348 | if ((status == SCI_SUCCESS) && |
1349 | (frame_header->fis_type == FIS_REGD2H)) { | |
6f231dda | 1350 | scic_sds_unsolicited_frame_control_get_buffer( |
e2023b87 | 1351 | &sci_req->owning_controller->uf_control, |
6f231dda | 1352 | frame_index, |
e76d6180 | 1353 | (void **)&frame_buffer); |
6f231dda DW |
1354 | |
1355 | scic_sds_controller_copy_sata_response( | |
e2023b87 | 1356 | &((struct scic_sds_stp_request *)sci_req)->d2h_reg_fis, |
6f231dda | 1357 | (u32 *)frame_header, |
e76d6180 | 1358 | frame_buffer); |
6f231dda DW |
1359 | } |
1360 | ||
1361 | scic_sds_controller_release_frame( | |
e2023b87 | 1362 | sci_req->owning_controller, frame_index); |
6f231dda DW |
1363 | |
1364 | return status; | |
1365 | } | |
1366 | ||
1367 | /** | |
1368 | * This method process TC completions while in the state where we are waiting | |
1369 | * for TC completions. | |
e2023b87 | 1370 | * @sci_req: |
6f231dda DW |
1371 | * @completion_code: |
1372 | * | |
1373 | * enum sci_status | |
1374 | */ | |
1375 | static enum sci_status scic_sds_stp_request_udma_await_tc_completion_tc_completion_handler( | |
1376 | struct scic_sds_request *request, | |
1377 | u32 completion_code) | |
1378 | { | |
1379 | enum sci_status status = SCI_SUCCESS; | |
e2023b87 | 1380 | struct scic_sds_stp_request *sci_req = (struct scic_sds_stp_request *)request; |
6f231dda DW |
1381 | |
1382 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { | |
1383 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): | |
1384 | scic_sds_stp_request_udma_complete_request( | |
e2023b87 | 1385 | &sci_req->parent, SCU_TASK_DONE_GOOD, SCI_SUCCESS |
6f231dda DW |
1386 | ); |
1387 | break; | |
1388 | ||
1389 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_FIS): | |
1390 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR): | |
1391 | /* | |
1392 | * We must check ther response buffer to see if the D2H Register FIS was | |
1393 | * received before we got the TC completion. */ | |
e76d6180 | 1394 | if (sci_req->d2h_reg_fis.fis_type == FIS_REGD2H) { |
6f231dda | 1395 | scic_sds_remote_device_suspend( |
e2023b87 | 1396 | sci_req->parent.target_device, |
6f231dda DW |
1397 | SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code)) |
1398 | ); | |
1399 | ||
1400 | scic_sds_stp_request_udma_complete_request( | |
e2023b87 | 1401 | &sci_req->parent, |
6f231dda DW |
1402 | SCU_TASK_DONE_CHECK_RESPONSE, |
1403 | SCI_FAILURE_IO_RESPONSE_VALID | |
1404 | ); | |
1405 | } else { | |
1406 | /* | |
1407 | * If we have an error completion status for the TC then we can expect a | |
1408 | * D2H register FIS from the device so we must change state to wait for it */ | |
1409 | sci_base_state_machine_change_state( | |
e2023b87 | 1410 | &sci_req->parent.started_substate_machine, |
6f231dda DW |
1411 | SCIC_SDS_STP_REQUEST_STARTED_UDMA_AWAIT_D2H_REG_FIS_SUBSTATE |
1412 | ); | |
1413 | } | |
1414 | break; | |
1415 | ||
1416 | /* | |
1417 | * / @todo Check to see if any of these completion status need to wait for | |
1418 | * / the device to host register fis. */ | |
52b957c8 | 1419 | /* / @todo We can retry the command for SCU_TASK_DONE_CMD_LL_R_ERR - this comes only for B0 */ |
6f231dda DW |
1420 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_INV_FIS_LEN): |
1421 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_MAX_PLD_ERR): | |
1422 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_R_ERR): | |
52b957c8 | 1423 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CMD_LL_R_ERR): |
6f231dda DW |
1424 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CRC_ERR): |
1425 | scic_sds_remote_device_suspend( | |
e2023b87 | 1426 | sci_req->parent.target_device, |
6f231dda DW |
1427 | SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code)) |
1428 | ); | |
1429 | /* Fall through to the default case */ | |
1430 | default: | |
1431 | /* All other completion status cause the IO to be complete. */ | |
1432 | scic_sds_stp_request_udma_complete_request( | |
e2023b87 | 1433 | &sci_req->parent, |
6f231dda DW |
1434 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
1435 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR | |
1436 | ); | |
1437 | break; | |
1438 | } | |
1439 | ||
1440 | return status; | |
1441 | } | |
1442 | ||
1443 | static enum sci_status scic_sds_stp_request_udma_await_d2h_reg_fis_frame_handler( | |
e2023b87 | 1444 | struct scic_sds_request *sci_req, |
6f231dda DW |
1445 | u32 frame_index) |
1446 | { | |
1447 | enum sci_status status; | |
1448 | ||
1449 | /* Use the general frame handler to copy the resposne data */ | |
e2023b87 | 1450 | status = scic_sds_stp_request_udma_general_frame_handler(sci_req, frame_index); |
6f231dda DW |
1451 | |
1452 | if (status == SCI_SUCCESS) { | |
1453 | scic_sds_stp_request_udma_complete_request( | |
e2023b87 | 1454 | sci_req, |
6f231dda DW |
1455 | SCU_TASK_DONE_CHECK_RESPONSE, |
1456 | SCI_FAILURE_IO_RESPONSE_VALID | |
1457 | ); | |
1458 | } | |
1459 | ||
1460 | return status; | |
1461 | } | |
1462 | ||
1463 | /* --------------------------------------------------------------------------- */ | |
1464 | ||
35173d57 | 1465 | static const struct scic_sds_io_request_state_handler scic_sds_stp_request_started_udma_substate_handler_table[] = { |
6f231dda | 1466 | [SCIC_SDS_STP_REQUEST_STARTED_UDMA_AWAIT_TC_COMPLETION_SUBSTATE] = { |
38aa74eb | 1467 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 1468 | .tc_completion_handler = scic_sds_stp_request_udma_await_tc_completion_tc_completion_handler, |
38aa74eb | 1469 | .frame_handler = scic_sds_stp_request_udma_general_frame_handler, |
6f231dda DW |
1470 | }, |
1471 | [SCIC_SDS_STP_REQUEST_STARTED_UDMA_AWAIT_D2H_REG_FIS_SUBSTATE] = { | |
38aa74eb | 1472 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 1473 | .frame_handler = scic_sds_stp_request_udma_await_d2h_reg_fis_frame_handler, |
6f231dda DW |
1474 | }, |
1475 | }; | |
1476 | ||
1477 | static void scic_sds_stp_request_started_udma_await_tc_completion_enter( | |
9a0fff7b | 1478 | void *object) |
6f231dda | 1479 | { |
890cae9b | 1480 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
1481 | |
1482 | SET_STATE_HANDLER( | |
e2023b87 | 1483 | sci_req, |
6f231dda DW |
1484 | scic_sds_stp_request_started_udma_substate_handler_table, |
1485 | SCIC_SDS_STP_REQUEST_STARTED_UDMA_AWAIT_TC_COMPLETION_SUBSTATE | |
1486 | ); | |
1487 | } | |
1488 | ||
1489 | /** | |
1490 | * | |
1491 | * | |
1492 | * This state is entered when there is an TC completion failure. The hardware | |
1493 | * received an unexpected condition while processing the IO request and now | |
1494 | * will UF the D2H register FIS to complete the IO. | |
1495 | */ | |
1496 | static void scic_sds_stp_request_started_udma_await_d2h_reg_fis_enter( | |
9a0fff7b | 1497 | void *object) |
6f231dda | 1498 | { |
890cae9b | 1499 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
1500 | |
1501 | SET_STATE_HANDLER( | |
e2023b87 | 1502 | sci_req, |
6f231dda DW |
1503 | scic_sds_stp_request_started_udma_substate_handler_table, |
1504 | SCIC_SDS_STP_REQUEST_STARTED_UDMA_AWAIT_D2H_REG_FIS_SUBSTATE | |
1505 | ); | |
1506 | } | |
1507 | ||
1508 | /* --------------------------------------------------------------------------- */ | |
1509 | ||
35173d57 | 1510 | static const struct sci_base_state scic_sds_stp_request_started_udma_substate_table[] = { |
6f231dda DW |
1511 | [SCIC_SDS_STP_REQUEST_STARTED_UDMA_AWAIT_TC_COMPLETION_SUBSTATE] = { |
1512 | .enter_state = scic_sds_stp_request_started_udma_await_tc_completion_enter, | |
1513 | }, | |
1514 | [SCIC_SDS_STP_REQUEST_STARTED_UDMA_AWAIT_D2H_REG_FIS_SUBSTATE] = { | |
1515 | .enter_state = scic_sds_stp_request_started_udma_await_d2h_reg_fis_enter, | |
1516 | }, | |
1517 | }; | |
1518 | ||
35173d57 DW |
1519 | enum sci_status scic_sds_stp_udma_request_construct(struct scic_sds_request *sci_req, |
1520 | u32 len, | |
1521 | enum dma_data_direction dir) | |
1522 | { | |
1523 | scic_sds_stp_non_ncq_request_construct(sci_req); | |
1524 | ||
1525 | scic_sds_stp_optimized_request_construct(sci_req, SCU_TASK_TYPE_DMA_IN, | |
1526 | len, dir); | |
1527 | ||
1528 | sci_base_state_machine_construct( | |
1529 | &sci_req->started_substate_machine, | |
890cae9b | 1530 | sci_req, |
35173d57 DW |
1531 | scic_sds_stp_request_started_udma_substate_table, |
1532 | SCIC_SDS_STP_REQUEST_STARTED_UDMA_AWAIT_TC_COMPLETION_SUBSTATE | |
1533 | ); | |
1534 | ||
1535 | return SCI_SUCCESS; | |
1536 | } | |
1537 | ||
6f231dda DW |
1538 | /** |
1539 | * | |
e2023b87 | 1540 | * @sci_req: |
6f231dda DW |
1541 | * @completion_code: |
1542 | * | |
1543 | * This method processes a TC completion. The expected TC completion is for | |
1544 | * the transmission of the H2D register FIS containing the SATA/STP non-data | |
1545 | * request. This method always successfully processes the TC completion. | |
1546 | * SCI_SUCCESS This value is always returned. | |
1547 | */ | |
1548 | static enum sci_status scic_sds_stp_request_soft_reset_await_h2d_asserted_tc_completion_handler( | |
e2023b87 | 1549 | struct scic_sds_request *sci_req, |
6f231dda DW |
1550 | u32 completion_code) |
1551 | { | |
1552 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { | |
1553 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): | |
1554 | scic_sds_request_set_status( | |
e2023b87 | 1555 | sci_req, SCU_TASK_DONE_GOOD, SCI_SUCCESS |
6f231dda DW |
1556 | ); |
1557 | ||
1558 | sci_base_state_machine_change_state( | |
e2023b87 | 1559 | &sci_req->started_substate_machine, |
6f231dda DW |
1560 | SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_H2D_DIAGNOSTIC_COMPLETION_SUBSTATE |
1561 | ); | |
1562 | break; | |
1563 | ||
1564 | default: | |
1565 | /* | |
1566 | * All other completion status cause the IO to be complete. If a NAK | |
1567 | * was received, then it is up to the user to retry the request. */ | |
1568 | scic_sds_request_set_status( | |
e2023b87 | 1569 | sci_req, |
6f231dda DW |
1570 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
1571 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR | |
1572 | ); | |
1573 | ||
1574 | sci_base_state_machine_change_state( | |
e2023b87 | 1575 | &sci_req->state_machine, SCI_BASE_REQUEST_STATE_COMPLETED); |
6f231dda DW |
1576 | break; |
1577 | } | |
1578 | ||
1579 | return SCI_SUCCESS; | |
1580 | } | |
1581 | ||
1582 | /** | |
1583 | * | |
e2023b87 | 1584 | * @sci_req: |
6f231dda DW |
1585 | * @completion_code: |
1586 | * | |
1587 | * This method processes a TC completion. The expected TC completion is for | |
1588 | * the transmission of the H2D register FIS containing the SATA/STP non-data | |
1589 | * request. This method always successfully processes the TC completion. | |
1590 | * SCI_SUCCESS This value is always returned. | |
1591 | */ | |
1592 | static enum sci_status scic_sds_stp_request_soft_reset_await_h2d_diagnostic_tc_completion_handler( | |
e2023b87 | 1593 | struct scic_sds_request *sci_req, |
6f231dda DW |
1594 | u32 completion_code) |
1595 | { | |
1596 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { | |
1597 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): | |
1598 | scic_sds_request_set_status( | |
e2023b87 | 1599 | sci_req, SCU_TASK_DONE_GOOD, SCI_SUCCESS |
6f231dda DW |
1600 | ); |
1601 | ||
1602 | sci_base_state_machine_change_state( | |
e2023b87 | 1603 | &sci_req->started_substate_machine, |
6f231dda DW |
1604 | SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_D2H_RESPONSE_FRAME_SUBSTATE |
1605 | ); | |
1606 | break; | |
1607 | ||
1608 | default: | |
1609 | /* | |
1610 | * All other completion status cause the IO to be complete. If a NAK | |
1611 | * was received, then it is up to the user to retry the request. */ | |
1612 | scic_sds_request_set_status( | |
e2023b87 | 1613 | sci_req, |
6f231dda DW |
1614 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
1615 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR | |
1616 | ); | |
1617 | ||
e2023b87 | 1618 | sci_base_state_machine_change_state(&sci_req->state_machine, |
38aa74eb | 1619 | SCI_BASE_REQUEST_STATE_COMPLETED); |
6f231dda DW |
1620 | break; |
1621 | } | |
1622 | ||
1623 | return SCI_SUCCESS; | |
1624 | } | |
1625 | ||
1626 | /** | |
1627 | * | |
1628 | * @request: This parameter specifies the request for which a frame has been | |
1629 | * received. | |
1630 | * @frame_index: This parameter specifies the index of the frame that has been | |
1631 | * received. | |
1632 | * | |
1633 | * This method processes frames received from the target while waiting for a | |
1634 | * device to host register FIS. If a non-register FIS is received during this | |
1635 | * time, it is treated as a protocol violation from an IO perspective. Indicate | |
1636 | * if the received frame was processed successfully. | |
1637 | */ | |
1638 | static enum sci_status scic_sds_stp_request_soft_reset_await_d2h_frame_handler( | |
1639 | struct scic_sds_request *request, | |
1640 | u32 frame_index) | |
1641 | { | |
1642 | enum sci_status status; | |
e76d6180 | 1643 | struct dev_to_host_fis *frame_header; |
6f231dda | 1644 | u32 *frame_buffer; |
e76d6180 DJ |
1645 | struct scic_sds_stp_request *stp_req = |
1646 | (struct scic_sds_stp_request *)request; | |
6f231dda DW |
1647 | |
1648 | status = scic_sds_unsolicited_frame_control_get_header( | |
e76d6180 | 1649 | &(stp_req->parent.owning_controller->uf_control), |
6f231dda | 1650 | frame_index, |
e76d6180 | 1651 | (void **)&frame_header); |
6f231dda DW |
1652 | |
1653 | if (status == SCI_SUCCESS) { | |
1654 | switch (frame_header->fis_type) { | |
e76d6180 | 1655 | case FIS_REGD2H: |
6f231dda | 1656 | scic_sds_unsolicited_frame_control_get_buffer( |
e76d6180 | 1657 | &(stp_req->parent.owning_controller->uf_control), |
6f231dda | 1658 | frame_index, |
e76d6180 | 1659 | (void **)&frame_buffer); |
6f231dda DW |
1660 | |
1661 | scic_sds_controller_copy_sata_response( | |
e76d6180 DJ |
1662 | &stp_req->d2h_reg_fis, |
1663 | (u32 *)frame_header, | |
1664 | frame_buffer); | |
6f231dda DW |
1665 | |
1666 | /* The command has completed with error */ | |
1667 | scic_sds_request_set_status( | |
e76d6180 | 1668 | &stp_req->parent, |
6f231dda | 1669 | SCU_TASK_DONE_CHECK_RESPONSE, |
e76d6180 | 1670 | SCI_FAILURE_IO_RESPONSE_VALID); |
6f231dda DW |
1671 | break; |
1672 | ||
1673 | default: | |
1674 | dev_warn(scic_to_dev(request->owning_controller), | |
1675 | "%s: IO Request:0x%p Frame Id:%d protocol " | |
1676 | "violation occurred\n", | |
1677 | __func__, | |
e76d6180 | 1678 | stp_req, |
6f231dda DW |
1679 | frame_index); |
1680 | ||
1681 | scic_sds_request_set_status( | |
e76d6180 | 1682 | &stp_req->parent, |
6f231dda | 1683 | SCU_TASK_DONE_UNEXP_FIS, |
e76d6180 | 1684 | SCI_FAILURE_PROTOCOL_VIOLATION); |
6f231dda DW |
1685 | break; |
1686 | } | |
1687 | ||
1688 | sci_base_state_machine_change_state( | |
e76d6180 | 1689 | &stp_req->parent.state_machine, |
38aa74eb | 1690 | SCI_BASE_REQUEST_STATE_COMPLETED); |
6f231dda DW |
1691 | |
1692 | /* Frame has been decoded return it to the controller */ | |
1693 | scic_sds_controller_release_frame( | |
e76d6180 | 1694 | stp_req->parent.owning_controller, frame_index); |
6f231dda DW |
1695 | } else |
1696 | dev_err(scic_to_dev(request->owning_controller), | |
1697 | "%s: SCIC IO Request 0x%p could not get frame header " | |
1698 | "for frame index %d, status %x\n", | |
e76d6180 | 1699 | __func__, stp_req, frame_index, status); |
6f231dda DW |
1700 | |
1701 | return status; | |
1702 | } | |
1703 | ||
1704 | /* --------------------------------------------------------------------------- */ | |
1705 | ||
35173d57 | 1706 | static const struct scic_sds_io_request_state_handler scic_sds_stp_request_started_soft_reset_substate_handler_table[] = { |
6f231dda | 1707 | [SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_H2D_ASSERTED_COMPLETION_SUBSTATE] = { |
38aa74eb | 1708 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 1709 | .tc_completion_handler = scic_sds_stp_request_soft_reset_await_h2d_asserted_tc_completion_handler, |
6f231dda DW |
1710 | }, |
1711 | [SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_H2D_DIAGNOSTIC_COMPLETION_SUBSTATE] = { | |
38aa74eb | 1712 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 1713 | .tc_completion_handler = scic_sds_stp_request_soft_reset_await_h2d_diagnostic_tc_completion_handler, |
6f231dda DW |
1714 | }, |
1715 | [SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_D2H_RESPONSE_FRAME_SUBSTATE] = { | |
38aa74eb | 1716 | .abort_handler = scic_sds_request_started_state_abort_handler, |
38aa74eb | 1717 | .frame_handler = scic_sds_stp_request_soft_reset_await_d2h_frame_handler, |
6f231dda DW |
1718 | }, |
1719 | }; | |
1720 | ||
1721 | static void scic_sds_stp_request_started_soft_reset_await_h2d_asserted_completion_enter( | |
9a0fff7b | 1722 | void *object) |
6f231dda | 1723 | { |
890cae9b | 1724 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
1725 | |
1726 | SET_STATE_HANDLER( | |
e2023b87 | 1727 | sci_req, |
6f231dda DW |
1728 | scic_sds_stp_request_started_soft_reset_substate_handler_table, |
1729 | SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_H2D_ASSERTED_COMPLETION_SUBSTATE | |
1730 | ); | |
1731 | ||
1732 | scic_sds_remote_device_set_working_request( | |
e2023b87 | 1733 | sci_req->target_device, sci_req |
6f231dda DW |
1734 | ); |
1735 | } | |
1736 | ||
1737 | static void scic_sds_stp_request_started_soft_reset_await_h2d_diagnostic_completion_enter( | |
9a0fff7b | 1738 | void *object) |
6f231dda | 1739 | { |
890cae9b | 1740 | struct scic_sds_request *sci_req = object; |
6f231dda | 1741 | struct scu_task_context *task_context; |
f2f30080 | 1742 | struct host_to_dev_fis *h2d_fis; |
6f231dda | 1743 | enum sci_status status; |
6f231dda DW |
1744 | |
1745 | /* Clear the SRST bit */ | |
e2023b87 | 1746 | h2d_fis = scic_stp_io_request_get_h2d_reg_address(sci_req); |
6f231dda DW |
1747 | h2d_fis->control = 0; |
1748 | ||
1749 | /* Clear the TC control bit */ | |
1750 | task_context = scic_sds_controller_get_task_context_buffer( | |
e2023b87 | 1751 | sci_req->owning_controller, sci_req->io_tag); |
6f231dda DW |
1752 | task_context->control_frame = 0; |
1753 | ||
e2023b87 | 1754 | status = scic_controller_continue_io(sci_req); |
6f231dda DW |
1755 | if (status == SCI_SUCCESS) { |
1756 | SET_STATE_HANDLER( | |
e2023b87 | 1757 | sci_req, |
6f231dda DW |
1758 | scic_sds_stp_request_started_soft_reset_substate_handler_table, |
1759 | SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_H2D_DIAGNOSTIC_COMPLETION_SUBSTATE | |
1760 | ); | |
1761 | } | |
1762 | } | |
1763 | ||
1764 | static void scic_sds_stp_request_started_soft_reset_await_d2h_response_enter( | |
9a0fff7b | 1765 | void *object) |
6f231dda | 1766 | { |
890cae9b | 1767 | struct scic_sds_request *sci_req = object; |
6f231dda DW |
1768 | |
1769 | SET_STATE_HANDLER( | |
e2023b87 | 1770 | sci_req, |
6f231dda DW |
1771 | scic_sds_stp_request_started_soft_reset_substate_handler_table, |
1772 | SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_D2H_RESPONSE_FRAME_SUBSTATE | |
1773 | ); | |
1774 | } | |
1775 | ||
35173d57 | 1776 | static const struct sci_base_state scic_sds_stp_request_started_soft_reset_substate_table[] = { |
6f231dda DW |
1777 | [SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_H2D_ASSERTED_COMPLETION_SUBSTATE] = { |
1778 | .enter_state = scic_sds_stp_request_started_soft_reset_await_h2d_asserted_completion_enter, | |
1779 | }, | |
1780 | [SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_H2D_DIAGNOSTIC_COMPLETION_SUBSTATE] = { | |
1781 | .enter_state = scic_sds_stp_request_started_soft_reset_await_h2d_diagnostic_completion_enter, | |
1782 | }, | |
1783 | [SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_D2H_RESPONSE_FRAME_SUBSTATE] = { | |
1784 | .enter_state = scic_sds_stp_request_started_soft_reset_await_d2h_response_enter, | |
1785 | }, | |
1786 | }; | |
1787 | ||
35173d57 DW |
1788 | enum sci_status scic_sds_stp_soft_reset_request_construct(struct scic_sds_request *sci_req) |
1789 | { | |
e76d6180 DJ |
1790 | struct scic_sds_stp_request *stp_req = |
1791 | container_of(sci_req, typeof(*stp_req), parent); | |
35173d57 DW |
1792 | |
1793 | scic_sds_stp_non_ncq_request_construct(sci_req); | |
1794 | ||
1795 | /* Build the STP task context structure */ | |
1796 | scu_stp_raw_request_construct_task_context(stp_req, sci_req->task_context_buffer); | |
1797 | ||
1798 | sci_base_state_machine_construct(&sci_req->started_substate_machine, | |
890cae9b | 1799 | sci_req, |
35173d57 DW |
1800 | scic_sds_stp_request_started_soft_reset_substate_table, |
1801 | SCIC_SDS_STP_REQUEST_STARTED_SOFT_RESET_AWAIT_H2D_ASSERTED_COMPLETION_SUBSTATE); | |
1802 | ||
1803 | return SCI_SUCCESS; | |
1804 | } |