Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
[deliverable/linux.git] / drivers / scsi / isci / port.c
CommitLineData
6f231dda
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1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
6f231dda 56#include "isci.h"
6f231dda
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57#include "port.h"
58#include "request.h"
e2f8db50
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59
60#define SCIC_SDS_PORT_HARD_RESET_TIMEOUT (1000)
61#define SCU_DUMMY_INDEX (0xFFFF)
6f231dda 62
d7a0ccdd
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63#undef C
64#define C(a) (#a)
65const char *port_state_name(enum sci_port_states state)
66{
67 static const char * const strings[] = PORT_STATES;
68
69 return strings[state];
70}
71#undef C
72
c132f692
DW
73static struct device *sciport_to_dev(struct isci_port *iport)
74{
75 int i = iport->physical_port_index;
76 struct isci_port *table;
77 struct isci_host *ihost;
78
79 if (i == SCIC_SDS_DUMMY_PORT)
80 i = SCI_MAX_PORTS+1;
81
82 table = iport - i;
83 ihost = container_of(table, typeof(*ihost), ports[0]);
84
85 return &ihost->pdev->dev;
86}
87
89a7301f 88static void sci_port_get_protocols(struct isci_port *iport, struct sci_phy_proto *proto)
6f231dda 89{
e2f8db50
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90 u8 index;
91
89a7301f 92 proto->all = 0;
e2f8db50 93 for (index = 0; index < SCI_MAX_PHYS; index++) {
89a7301f
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94 struct isci_phy *iphy = iport->phy_table[index];
95
96 if (!iphy)
97 continue;
98 sci_phy_get_protocols(iphy, proto);
e2f8db50 99 }
6f231dda
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100}
101
89a7301f 102static u32 sci_port_get_phys(struct isci_port *iport)
6f231dda 103{
e2f8db50
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104 u32 index;
105 u32 mask;
106
107 mask = 0;
89a7301f
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108 for (index = 0; index < SCI_MAX_PHYS; index++)
109 if (iport->phy_table[index])
e2f8db50 110 mask |= (1 << index);
e2f8db50
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111
112 return mask;
6f231dda
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113}
114
e2f8db50 115/**
89a7301f 116 * sci_port_get_properties() - This method simply returns the properties
e2f8db50
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117 * regarding the port, such as: physical index, protocols, sas address, etc.
118 * @port: this parameter specifies the port for which to retrieve the physical
119 * index.
120 * @properties: This parameter specifies the properties structure into which to
121 * copy the requested information.
122 *
123 * Indicate if the user specified a valid port. SCI_SUCCESS This value is
124 * returned if the specified port was valid. SCI_FAILURE_INVALID_PORT This
125 * value is returned if the specified port is not valid. When this value is
126 * returned, no data is copied to the properties output parameter.
127 */
7e629841 128enum sci_status sci_port_get_properties(struct isci_port *iport,
89a7301f 129 struct sci_port_properties *prop)
6f231dda 130{
ffe191c9 131 if (!iport || iport->logical_port_index == SCIC_SDS_DUMMY_PORT)
e2f8db50 132 return SCI_FAILURE_INVALID_PORT;
6f231dda 133
89a7301f
DW
134 prop->index = iport->logical_port_index;
135 prop->phy_mask = sci_port_get_phys(iport);
136 sci_port_get_sas_address(iport, &prop->local.sas_address);
137 sci_port_get_protocols(iport, &prop->local.protocols);
138 sci_port_get_attached_sas_address(iport, &prop->remote.sas_address);
6f231dda 139
e2f8db50 140 return SCI_SUCCESS;
6f231dda
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141}
142
89a7301f 143static void sci_port_bcn_enable(struct isci_port *iport)
61aaff49 144{
85280955 145 struct isci_phy *iphy;
61aaff49
JS
146 u32 val;
147 int i;
148
ffe191c9
DW
149 for (i = 0; i < ARRAY_SIZE(iport->phy_table); i++) {
150 iphy = iport->phy_table[i];
85280955 151 if (!iphy)
61aaff49 152 continue;
85280955 153 val = readl(&iphy->link_layer_registers->link_layer_control);
61aaff49 154 /* clear the bit by writing 1. */
85280955 155 writel(val, &iphy->link_layer_registers->link_layer_control);
61aaff49
JS
156 }
157}
158
ffe191c9
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159static void isci_port_bc_change_received(struct isci_host *ihost,
160 struct isci_port *iport,
161 struct isci_phy *iphy)
61aaff49 162{
52d74634
DW
163 dev_dbg(&ihost->pdev->dev,
164 "%s: isci_phy = %p, sas_phy = %p\n",
165 __func__, iphy, &iphy->sas_phy);
61aaff49 166
52d74634 167 ihost->sas_ha.notify_port_event(&iphy->sas_phy, PORTE_BROADCAST_RCVD);
89a7301f 168 sci_port_bcn_enable(iport);
61aaff49
JS
169}
170
e2f8db50 171static void isci_port_link_up(struct isci_host *isci_host,
ffe191c9 172 struct isci_port *iport,
85280955 173 struct isci_phy *iphy)
6f231dda
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174{
175 unsigned long flags;
89a7301f 176 struct sci_port_properties properties;
6f231dda
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177 unsigned long success = true;
178
6f231dda
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179 dev_dbg(&isci_host->pdev->dev,
180 "%s: isci_port = %p\n",
ffe191c9 181 __func__, iport);
6f231dda 182
85280955 183 spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags);
6f231dda 184
89a7301f 185 sci_port_get_properties(iport, &properties);
6f231dda 186
c79dd80d 187 if (iphy->protocol == SAS_PROTOCOL_SATA) {
150fc6fc 188 u64 attached_sas_address;
6f231dda 189
85280955
DW
190 iphy->sas_phy.oob_mode = SATA_OOB_MODE;
191 iphy->sas_phy.frame_rcvd_size = sizeof(struct dev_to_host_fis);
6f231dda
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192
193 /*
194 * For direct-attached SATA devices, the SCI core will
195 * automagically assign a SAS address to the end device
196 * for the purpose of creating a port. This SAS address
197 * will not be the same as assigned to the PHY and needs
89a7301f 198 * to be obtained from struct sci_port_properties properties.
6f231dda 199 */
150fc6fc
DW
200 attached_sas_address = properties.remote.sas_address.high;
201 attached_sas_address <<= 32;
202 attached_sas_address |= properties.remote.sas_address.low;
203 swab64s(&attached_sas_address);
6f231dda 204
85280955 205 memcpy(&iphy->sas_phy.attached_sas_addr,
150fc6fc 206 &attached_sas_address, sizeof(attached_sas_address));
c79dd80d 207 } else if (iphy->protocol == SAS_PROTOCOL_SSP) {
85280955
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208 iphy->sas_phy.oob_mode = SAS_OOB_MODE;
209 iphy->sas_phy.frame_rcvd_size = sizeof(struct sas_identify_frame);
6f231dda
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210
211 /* Copy the attached SAS address from the IAF */
85280955
DW
212 memcpy(iphy->sas_phy.attached_sas_addr,
213 iphy->frame_rcvd.iaf.sas_addr, SAS_ADDR_SIZE);
6f231dda 214 } else {
59e13d48 215 dev_err(&isci_host->pdev->dev, "%s: unknown target\n", __func__);
6f231dda
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216 success = false;
217 }
218
85280955 219 iphy->sas_phy.phy->negotiated_linkrate = sci_phy_linkrate(iphy);
83e51430 220
85280955 221 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
6f231dda
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222
223 /* Notify libsas that we have an address frame, if indeed
224 * we've found an SSP, SMP, or STP target */
225 if (success)
85280955 226 isci_host->sas_ha.notify_port_event(&iphy->sas_phy,
6f231dda
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227 PORTE_BYTES_DMAED);
228}
229
230
231/**
232 * isci_port_link_down() - This function is called by the sci core when a link
233 * becomes inactive.
234 * @isci_host: This parameter specifies the isci host object.
235 * @phy: This parameter specifies the isci phy with the active link.
236 * @port: This parameter specifies the isci port with the active link.
237 *
238 */
e2f8db50
DW
239static void isci_port_link_down(struct isci_host *isci_host,
240 struct isci_phy *isci_phy,
241 struct isci_port *isci_port)
6f231dda 242{
397497dd
JS
243 struct isci_remote_device *isci_device;
244
6f231dda
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245 dev_dbg(&isci_host->pdev->dev,
246 "%s: isci_port = %p\n", __func__, isci_port);
247
397497dd
JS
248 if (isci_port) {
249
250 /* check to see if this is the last phy on this port. */
251 if (isci_phy->sas_phy.port &&
252 isci_phy->sas_phy.port->num_phys == 1) {
253 /* change the state for all devices on this port. The
254 * next task sent to this device will be returned as
255 * SAS_TASK_UNDELIVERED, and the scsi mid layer will
256 * remove the target
257 */
258 list_for_each_entry(isci_device,
259 &isci_port->remote_dev_list,
260 node) {
261 dev_dbg(&isci_host->pdev->dev,
262 "%s: isci_device = %p\n",
263 __func__, isci_device);
264 set_bit(IDEV_GONE, &isci_device->flags);
265 }
266 }
267 }
268
6f231dda
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269 /* Notify libsas of the borken link, this will trigger calls to our
270 * isci_port_deformed and isci_dev_gone functions.
271 */
272 sas_phy_disconnected(&isci_phy->sas_phy);
273 isci_host->sas_ha.notify_phy_event(&isci_phy->sas_phy,
274 PHYE_LOSS_OF_SIGNAL);
275
6f231dda
DW
276 dev_dbg(&isci_host->pdev->dev,
277 "%s: isci_port = %p - Done\n", __func__, isci_port);
278}
279
8e35a139
JS
280static bool is_port_ready_state(enum sci_port_states state)
281{
282 switch (state) {
283 case SCI_PORT_READY:
284 case SCI_PORT_SUB_WAITING:
285 case SCI_PORT_SUB_OPERATIONAL:
286 case SCI_PORT_SUB_CONFIGURING:
287 return true;
288 default:
289 return false;
290 }
291}
292
293/* flag dummy rnc hanling when exiting a ready state */
294static void port_state_machine_change(struct isci_port *iport,
295 enum sci_port_states state)
296{
297 struct sci_base_state_machine *sm = &iport->sm;
298 enum sci_port_states old_state = sm->current_state_id;
299
300 if (is_port_ready_state(old_state) && !is_port_ready_state(state))
301 iport->ready_exit = true;
302
303 sci_change_state(sm, state);
304 iport->ready_exit = false;
305}
306
6f231dda
DW
307/**
308 * isci_port_hard_reset_complete() - This function is called by the sci core
309 * when the hard reset complete notification has been received.
310 * @port: This parameter specifies the sci port with the active link.
311 * @completion_status: This parameter specifies the core status for the reset
312 * process.
313 *
314 */
e2f8db50
DW
315static void isci_port_hard_reset_complete(struct isci_port *isci_port,
316 enum sci_status completion_status)
6f231dda 317{
92776991
DW
318 struct isci_host *ihost = isci_port->owning_controller;
319
320 dev_dbg(&ihost->pdev->dev,
6f231dda
DW
321 "%s: isci_port = %p, completion_status=%x\n",
322 __func__, isci_port, completion_status);
323
324 /* Save the status of the hard reset from the port. */
325 isci_port->hard_reset_status = completion_status;
326
8e35a139
JS
327 if (completion_status != SCI_SUCCESS) {
328
329 /* The reset failed. The port state is now SCI_PORT_FAILED. */
330 if (isci_port->active_phy_mask == 0) {
92776991
DW
331 int phy_idx = isci_port->last_active_phy;
332 struct isci_phy *iphy = &ihost->phys[phy_idx];
8e35a139
JS
333
334 /* Generate the link down now to the host, since it
335 * was intercepted by the hard reset state machine when
336 * it really happened.
337 */
92776991 338 isci_port_link_down(ihost, iphy, isci_port);
8e35a139
JS
339 }
340 /* Advance the port state so that link state changes will be
92776991
DW
341 * noticed.
342 */
8e35a139
JS
343 port_state_machine_change(isci_port, SCI_PORT_SUB_WAITING);
344
345 }
92776991
DW
346 clear_bit(IPORT_RESET_PENDING, &isci_port->state);
347 wake_up(&ihost->eventq);
348
6f231dda 349}
4393aa4e 350
e2f8db50
DW
351/* This method will return a true value if the specified phy can be assigned to
352 * this port The following is a list of phys for each port that are allowed: -
353 * Port 0 - 3 2 1 0 - Port 1 - 1 - Port 2 - 3 2 - Port 3 - 3 This method
354 * doesn't preclude all configurations. It merely ensures that a phy is part
355 * of the allowable set of phy identifiers for that port. For example, one
356 * could assign phy 3 to port 0 and no other phys. Please refer to
89a7301f 357 * sci_port_is_phy_mask_valid() for information regarding whether the
e2f8db50
DW
358 * phy_mask for a port can be supported. bool true if this is a valid phy
359 * assignment for the port false if this is not a valid phy assignment for the
360 * port
361 */
89a7301f 362bool sci_port_is_valid_phy_assignment(struct isci_port *iport, u32 phy_index)
6f231dda 363{
89a7301f
DW
364 struct isci_host *ihost = iport->owning_controller;
365 struct sci_user_parameters *user = &ihost->user_parameters;
366
e2f8db50
DW
367 /* Initialize to invalid value. */
368 u32 existing_phy_index = SCI_MAX_PHYS;
369 u32 index;
6f231dda 370
89a7301f 371 if ((iport->physical_port_index == 1) && (phy_index != 1))
e2f8db50 372 return false;
6f231dda 373
89a7301f 374 if (iport->physical_port_index == 3 && phy_index != 3)
e2f8db50 375 return false;
6f231dda 376
89a7301f
DW
377 if (iport->physical_port_index == 2 &&
378 (phy_index == 0 || phy_index == 1))
e2f8db50 379 return false;
6f231dda 380
89a7301f
DW
381 for (index = 0; index < SCI_MAX_PHYS; index++)
382 if (iport->phy_table[index] && index != phy_index)
e2f8db50 383 existing_phy_index = index;
6f231dda 384
89a7301f
DW
385 /* Ensure that all of the phys in the port are capable of
386 * operating at the same maximum link rate.
387 */
388 if (existing_phy_index < SCI_MAX_PHYS &&
389 user->phys[phy_index].max_speed_generation !=
390 user->phys[existing_phy_index].max_speed_generation)
e2f8db50 391 return false;
6f231dda 392
e2f8db50
DW
393 return true;
394}
6f231dda 395
e2f8db50
DW
396/**
397 *
398 * @sci_port: This is the port object for which to determine if the phy mask
399 * can be supported.
400 *
401 * This method will return a true value if the port's phy mask can be supported
402 * by the SCU. The following is a list of valid PHY mask configurations for
403 * each port: - Port 0 - [[3 2] 1] 0 - Port 1 - [1] - Port 2 - [[3] 2]
404 * - Port 3 - [3] This method returns a boolean indication specifying if the
405 * phy mask can be supported. true if this is a valid phy assignment for the
406 * port false if this is not a valid phy assignment for the port
407 */
89a7301f 408static bool sci_port_is_phy_mask_valid(
ffe191c9 409 struct isci_port *iport,
e2f8db50
DW
410 u32 phy_mask)
411{
ffe191c9 412 if (iport->physical_port_index == 0) {
e2f8db50
DW
413 if (((phy_mask & 0x0F) == 0x0F)
414 || ((phy_mask & 0x03) == 0x03)
415 || ((phy_mask & 0x01) == 0x01)
416 || (phy_mask == 0))
417 return true;
ffe191c9 418 } else if (iport->physical_port_index == 1) {
e2f8db50
DW
419 if (((phy_mask & 0x02) == 0x02)
420 || (phy_mask == 0))
421 return true;
ffe191c9 422 } else if (iport->physical_port_index == 2) {
e2f8db50
DW
423 if (((phy_mask & 0x0C) == 0x0C)
424 || ((phy_mask & 0x04) == 0x04)
425 || (phy_mask == 0))
426 return true;
ffe191c9 427 } else if (iport->physical_port_index == 3) {
e2f8db50
DW
428 if (((phy_mask & 0x08) == 0x08)
429 || (phy_mask == 0))
430 return true;
431 }
6f231dda 432
e2f8db50
DW
433 return false;
434}
6f231dda 435
85280955 436/*
e2f8db50
DW
437 * This method retrieves a currently active (i.e. connected) phy contained in
438 * the port. Currently, the lowest order phy that is connected is returned.
439 * This method returns a pointer to a SCIS_SDS_PHY object. NULL This value is
440 * returned if there are no currently active (i.e. connected to a remote end
89a7301f 441 * point) phys contained in the port. All other values specify a struct sci_phy
e2f8db50
DW
442 * object that is active in the port.
443 */
89a7301f 444static struct isci_phy *sci_port_get_a_connected_phy(struct isci_port *iport)
85280955 445{
e2f8db50 446 u32 index;
85280955 447 struct isci_phy *iphy;
6f231dda 448
e2f8db50 449 for (index = 0; index < SCI_MAX_PHYS; index++) {
85280955
DW
450 /* Ensure that the phy is both part of the port and currently
451 * connected to the remote end-point.
452 */
ffe191c9 453 iphy = iport->phy_table[index];
89a7301f 454 if (iphy && sci_port_active_phy(iport, iphy))
85280955 455 return iphy;
6f231dda
DW
456 }
457
e2f8db50
DW
458 return NULL;
459}
460
89a7301f 461static enum sci_status sci_port_set_phy(struct isci_port *iport, struct isci_phy *iphy)
e2f8db50 462{
85280955 463 /* Check to see if we can add this phy to a port
e2f8db50 464 * that means that the phy is not part of a port and that the port does
85280955
DW
465 * not already have a phy assinged to the phy index.
466 */
ffe191c9 467 if (!iport->phy_table[iphy->phy_index] &&
85280955 468 !phy_get_non_dummy_port(iphy) &&
89a7301f 469 sci_port_is_valid_phy_assignment(iport, iphy->phy_index)) {
85280955
DW
470 /* Phy is being added in the stopped state so we are in MPC mode
471 * make logical port index = physical port index
472 */
ffe191c9
DW
473 iport->logical_port_index = iport->physical_port_index;
474 iport->phy_table[iphy->phy_index] = iphy;
89a7301f 475 sci_phy_set_port(iphy, iport);
e2f8db50
DW
476
477 return SCI_SUCCESS;
478 }
479
480 return SCI_FAILURE;
481}
482
89a7301f 483static enum sci_status sci_port_clear_phy(struct isci_port *iport, struct isci_phy *iphy)
e2f8db50
DW
484{
485 /* Make sure that this phy is part of this port */
ffe191c9
DW
486 if (iport->phy_table[iphy->phy_index] == iphy &&
487 phy_get_non_dummy_port(iphy) == iport) {
d9dcb4ba 488 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
489
490 /* Yep it is assigned to this port so remove it */
89a7301f 491 sci_phy_set_port(iphy, &ihost->ports[SCI_MAX_PORTS]);
ffe191c9 492 iport->phy_table[iphy->phy_index] = NULL;
e2f8db50
DW
493 return SCI_SUCCESS;
494 }
495
496 return SCI_FAILURE;
497}
498
89a7301f 499void sci_port_get_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
e2f8db50
DW
500{
501 u32 index;
502
89a7301f
DW
503 sas->high = 0;
504 sas->low = 0;
505 for (index = 0; index < SCI_MAX_PHYS; index++)
506 if (iport->phy_table[index])
507 sci_phy_get_sas_address(iport->phy_table[index], sas);
e2f8db50
DW
508}
509
89a7301f 510void sci_port_get_attached_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
e2f8db50 511{
85280955 512 struct isci_phy *iphy;
e2f8db50
DW
513
514 /*
515 * Ensure that the phy is both part of the port and currently
516 * connected to the remote end-point.
6f231dda 517 */
89a7301f 518 iphy = sci_port_get_a_connected_phy(iport);
85280955 519 if (iphy) {
c79dd80d 520 if (iphy->protocol != SAS_PROTOCOL_SATA) {
89a7301f 521 sci_phy_get_attached_sas_address(iphy, sas);
e2f8db50 522 } else {
89a7301f
DW
523 sci_phy_get_sas_address(iphy, sas);
524 sas->low += iphy->phy_index;
e2f8db50
DW
525 }
526 } else {
89a7301f
DW
527 sas->high = 0;
528 sas->low = 0;
e2f8db50
DW
529 }
530}
4393aa4e 531
e2f8db50 532/**
89a7301f 533 * sci_port_construct_dummy_rnc() - create dummy rnc for si workaround
e2f8db50
DW
534 *
535 * @sci_port: logical port on which we need to create the remote node context
536 * @rni: remote node index for this remote node context.
537 *
538 * This routine will construct a dummy remote node context data structure
539 * This structure will be posted to the hardware to work around a scheduler
540 * error in the hardware.
541 */
89a7301f 542static void sci_port_construct_dummy_rnc(struct isci_port *iport, u16 rni)
e2f8db50
DW
543{
544 union scu_remote_node_context *rnc;
545
ffe191c9 546 rnc = &iport->owning_controller->remote_node_context_table[rni];
e2f8db50
DW
547
548 memset(rnc, 0, sizeof(union scu_remote_node_context));
549
550 rnc->ssp.remote_sas_address_hi = 0;
551 rnc->ssp.remote_sas_address_lo = 0;
552
553 rnc->ssp.remote_node_index = rni;
554 rnc->ssp.remote_node_port_width = 1;
ffe191c9 555 rnc->ssp.logical_port_index = iport->physical_port_index;
e2f8db50
DW
556
557 rnc->ssp.nexus_loss_timer_enable = false;
558 rnc->ssp.check_bit = false;
559 rnc->ssp.is_valid = true;
560 rnc->ssp.is_remote_node_context = true;
561 rnc->ssp.function_number = 0;
562 rnc->ssp.arbitration_wait_time = 0;
563}
564
dd047c8e
DW
565/*
566 * construct a dummy task context data structure. This
e2f8db50
DW
567 * structure will be posted to the hardwre to work around a scheduler error
568 * in the hardware.
e2f8db50 569 */
89a7301f 570static void sci_port_construct_dummy_task(struct isci_port *iport, u16 tag)
e2f8db50 571{
d9dcb4ba 572 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
573 struct scu_task_context *task_context;
574
d9dcb4ba 575 task_context = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
e2f8db50
DW
576 memset(task_context, 0, sizeof(struct scu_task_context));
577
e2f8db50
DW
578 task_context->initiator_request = 1;
579 task_context->connection_rate = 1;
ffe191c9 580 task_context->logical_port_index = iport->physical_port_index;
e2f8db50 581 task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SSP;
dd047c8e 582 task_context->task_index = ISCI_TAG_TCI(tag);
e2f8db50
DW
583 task_context->valid = SCU_TASK_CONTEXT_VALID;
584 task_context->context_type = SCU_TASK_CONTEXT_TYPE;
ffe191c9 585 task_context->remote_node_index = iport->reserved_rni;
e2f8db50 586 task_context->do_not_dma_ssp_good_response = 1;
e2f8db50
DW
587 task_context->task_phase = 0x01;
588}
589
89a7301f 590static void sci_port_destroy_dummy_resources(struct isci_port *iport)
e2f8db50 591{
d9dcb4ba 592 struct isci_host *ihost = iport->owning_controller;
e2f8db50 593
ffe191c9 594 if (iport->reserved_tag != SCI_CONTROLLER_INVALID_IO_TAG)
d9dcb4ba 595 isci_free_tag(ihost, iport->reserved_tag);
e2f8db50 596
ffe191c9 597 if (iport->reserved_rni != SCU_DUMMY_INDEX)
89a7301f 598 sci_remote_node_table_release_remote_node_index(&ihost->available_remote_nodes,
ffe191c9 599 1, iport->reserved_rni);
e2f8db50 600
ffe191c9
DW
601 iport->reserved_rni = SCU_DUMMY_INDEX;
602 iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
e2f8db50
DW
603}
604
89a7301f 605void sci_port_setup_transports(struct isci_port *iport, u32 device_id)
e2f8db50
DW
606{
607 u8 index;
608
609 for (index = 0; index < SCI_MAX_PHYS; index++) {
ffe191c9 610 if (iport->active_phy_mask & (1 << index))
89a7301f 611 sci_phy_setup_transport(iport->phy_table[index], device_id);
6f231dda 612 }
e2f8db50 613}
6f231dda 614
05b080fc
MT
615static void sci_port_resume_phy(struct isci_port *iport, struct isci_phy *iphy)
616{
617 sci_phy_resume(iphy);
618 iport->enabled_phy_mask |= 1 << iphy->phy_index;
619}
620
621static void sci_port_activate_phy(struct isci_port *iport,
622 struct isci_phy *iphy,
623 u8 flags)
e2f8db50 624{
d9dcb4ba 625 struct isci_host *ihost = iport->owning_controller;
e2f8db50 626
c79dd80d 627 if (iphy->protocol != SAS_PROTOCOL_SATA && (flags & PF_RESUME))
89a7301f 628 sci_phy_resume(iphy);
e2f8db50 629
ffe191c9 630 iport->active_phy_mask |= 1 << iphy->phy_index;
e2f8db50 631
89a7301f 632 sci_controller_clear_invalid_phy(ihost, iphy);
e2f8db50 633
05b080fc 634 if (flags & PF_NOTIFY)
ffe191c9 635 isci_port_link_up(ihost, iport, iphy);
6f231dda 636}
09d7da13 637
89a7301f
DW
638void sci_port_deactivate_phy(struct isci_port *iport, struct isci_phy *iphy,
639 bool do_notify_user)
09d7da13 640{
34a99158 641 struct isci_host *ihost = iport->owning_controller;
e2f8db50 642
ffe191c9 643 iport->active_phy_mask &= ~(1 << iphy->phy_index);
05b080fc 644 iport->enabled_phy_mask &= ~(1 << iphy->phy_index);
8e35a139
JS
645 if (!iport->active_phy_mask)
646 iport->last_active_phy = iphy->phy_index;
e2f8db50 647
85280955 648 iphy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN;
e2f8db50 649
d4ec1cf6
MT
650 /* Re-assign the phy back to the LP as if it were a narrow port for APC
651 * mode. For MPC mode, the phy will remain in the port.
652 */
653 if (iport->owning_controller->oem_parameters.controller.mode_type ==
654 SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE)
655 writel(iphy->phy_index,
656 &iport->port_pe_configuration_register[iphy->phy_index]);
e2f8db50
DW
657
658 if (do_notify_user == true)
659 isci_port_link_down(ihost, iphy, iport);
660}
661
89a7301f 662static void sci_port_invalid_link_up(struct isci_port *iport, struct isci_phy *iphy)
e2f8db50 663{
d9dcb4ba 664 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
665
666 /*
667 * Check to see if we have alreay reported this link as bad and if
668 * not go ahead and tell the SCI_USER that we have discovered an
669 * invalid link.
670 */
d9dcb4ba 671 if ((ihost->invalid_phy_mask & (1 << iphy->phy_index)) == 0) {
34a99158 672 ihost->invalid_phy_mask |= 1 << iphy->phy_index;
d9dcb4ba 673 dev_warn(&ihost->pdev->dev, "Invalid link up!\n");
e2f8db50
DW
674 }
675}
676
677/**
89a7301f
DW
678 * sci_port_general_link_up_handler - phy can be assigned to port?
679 * @sci_port: sci_port object for which has a phy that has gone link up.
85280955 680 * @sci_phy: This is the struct isci_phy object that has gone link up.
05b080fc 681 * @flags: PF_RESUME, PF_NOTIFY to sci_port_activate_phy
e2f8db50 682 *
05b080fc
MT
683 * Determine if this phy can be assigned to this port . If the phy is
684 * not a valid PHY for this port then the function will notify the user.
685 * A PHY can only be part of a port if it's attached SAS ADDRESS is the
686 * same as all other PHYs in the same port.
e2f8db50 687 */
89a7301f 688static void sci_port_general_link_up_handler(struct isci_port *iport,
05b080fc
MT
689 struct isci_phy *iphy,
690 u8 flags)
e2f8db50
DW
691{
692 struct sci_sas_address port_sas_address;
693 struct sci_sas_address phy_sas_address;
694
89a7301f
DW
695 sci_port_get_attached_sas_address(iport, &port_sas_address);
696 sci_phy_get_attached_sas_address(iphy, &phy_sas_address);
e2f8db50
DW
697
698 /* If the SAS address of the new phy matches the SAS address of
699 * other phys in the port OR this is the first phy in the port,
700 * then activate the phy and allow it to be used for operations
701 * in this port.
702 */
703 if ((phy_sas_address.high == port_sas_address.high &&
704 phy_sas_address.low == port_sas_address.low) ||
ffe191c9
DW
705 iport->active_phy_mask == 0) {
706 struct sci_base_state_machine *sm = &iport->sm;
e2f8db50 707
05b080fc 708 sci_port_activate_phy(iport, iphy, flags);
e301370a 709 if (sm->current_state_id == SCI_PORT_RESETTING)
ffe191c9 710 port_state_machine_change(iport, SCI_PORT_READY);
e2f8db50 711 } else
89a7301f 712 sci_port_invalid_link_up(iport, iphy);
e2f8db50
DW
713}
714
715
716
717/**
718 * This method returns false if the port only has a single phy object assigned.
719 * If there are no phys or more than one phy then the method will return
720 * true.
721 * @sci_port: The port for which the wide port condition is to be checked.
722 *
723 * bool true Is returned if this is a wide ported port. false Is returned if
724 * this is a narrow port.
725 */
89a7301f 726static bool sci_port_is_wide(struct isci_port *iport)
e2f8db50
DW
727{
728 u32 index;
729 u32 phy_count = 0;
730
731 for (index = 0; index < SCI_MAX_PHYS; index++) {
ffe191c9 732 if (iport->phy_table[index] != NULL) {
e2f8db50
DW
733 phy_count++;
734 }
735 }
736
737 return phy_count != 1;
738}
739
740/**
741 * This method is called by the PHY object when the link is detected. if the
742 * port wants the PHY to continue on to the link up state then the port
743 * layer must return true. If the port object returns false the phy object
744 * must halt its attempt to go link up.
745 * @sci_port: The port associated with the phy object.
746 * @sci_phy: The phy object that is trying to go link up.
747 *
748 * true if the phy object can continue to the link up condition. true Is
749 * returned if this phy can continue to the ready state. false Is returned if
750 * can not continue on to the ready state. This notification is in place for
751 * wide ports and direct attached phys. Since there are no wide ported SATA
752 * devices this could become an invalid port configuration.
753 */
c79dd80d 754bool sci_port_link_detected(struct isci_port *iport, struct isci_phy *iphy)
e2f8db50 755{
ffe191c9 756 if ((iport->logical_port_index != SCIC_SDS_DUMMY_PORT) &&
c79dd80d 757 (iphy->protocol == SAS_PROTOCOL_SATA)) {
05b080fc
MT
758 if (sci_port_is_wide(iport)) {
759 sci_port_invalid_link_up(iport, iphy);
760 return false;
761 } else {
762 struct isci_host *ihost = iport->owning_controller;
763 struct isci_port *dst_port = &(ihost->ports[iphy->phy_index]);
764 writel(iphy->phy_index,
765 &dst_port->port_pe_configuration_register[iphy->phy_index]);
766 }
e2f8db50
DW
767 }
768
769 return true;
770}
771
5553ba2b 772static void port_timeout(unsigned long data)
e2f8db50 773{
5553ba2b 774 struct sci_timer *tmr = (struct sci_timer *)data;
ffe191c9 775 struct isci_port *iport = container_of(tmr, typeof(*iport), timer);
d9dcb4ba 776 struct isci_host *ihost = iport->owning_controller;
5553ba2b 777 unsigned long flags;
e2f8db50
DW
778 u32 current_state;
779
5553ba2b
EN
780 spin_lock_irqsave(&ihost->scic_lock, flags);
781
782 if (tmr->cancel)
783 goto done;
784
ffe191c9 785 current_state = iport->sm.current_state_id;
e2f8db50 786
e301370a 787 if (current_state == SCI_PORT_RESETTING) {
e91f41ef
PS
788 /* if the port is still in the resetting state then the timeout
789 * fired before the reset completed.
e2f8db50 790 */
ffe191c9 791 port_state_machine_change(iport, SCI_PORT_FAILED);
e301370a 792 } else if (current_state == SCI_PORT_STOPPED) {
e91f41ef
PS
793 /* if the port is stopped then the start request failed In this
794 * case stay in the stopped state.
e2f8db50 795 */
ffe191c9 796 dev_err(sciport_to_dev(iport),
e2f8db50
DW
797 "%s: SCIC Port 0x%p failed to stop before tiemout.\n",
798 __func__,
ffe191c9 799 iport);
e301370a 800 } else if (current_state == SCI_PORT_STOPPING) {
fca4ecbd
DW
801 dev_dbg(sciport_to_dev(iport),
802 "%s: port%d: stop complete timeout\n",
803 __func__, iport->physical_port_index);
e2f8db50 804 } else {
e91f41ef 805 /* The port is in the ready state and we have a timer
e2f8db50
DW
806 * reporting a timeout this should not happen.
807 */
ffe191c9 808 dev_err(sciport_to_dev(iport),
e2f8db50 809 "%s: SCIC Port 0x%p is processing a timeout operation "
ffe191c9 810 "in state %d.\n", __func__, iport, current_state);
e2f8db50 811 }
5553ba2b
EN
812
813done:
814 spin_unlock_irqrestore(&ihost->scic_lock, flags);
e2f8db50
DW
815}
816
817/* --------------------------------------------------------------------------- */
818
819/**
820 * This function updates the hardwares VIIT entry for this port.
821 *
822 *
823 */
89a7301f 824static void sci_port_update_viit_entry(struct isci_port *iport)
e2f8db50
DW
825{
826 struct sci_sas_address sas_address;
827
89a7301f 828 sci_port_get_sas_address(iport, &sas_address);
e2f8db50
DW
829
830 writel(sas_address.high,
ffe191c9 831 &iport->viit_registers->initiator_sas_address_hi);
e2f8db50 832 writel(sas_address.low,
ffe191c9 833 &iport->viit_registers->initiator_sas_address_lo);
e2f8db50
DW
834
835 /* This value get cleared just in case its not already cleared */
ffe191c9 836 writel(0, &iport->viit_registers->reserved);
e2f8db50
DW
837
838 /* We are required to update the status register last */
839 writel(SCU_VIIT_ENTRY_ID_VIIT |
840 SCU_VIIT_IPPT_INITIATOR |
ffe191c9 841 ((1 << iport->physical_port_index) << SCU_VIIT_ENTRY_LPVIE_SHIFT) |
e2f8db50 842 SCU_VIIT_STATUS_ALL_VALID,
ffe191c9 843 &iport->viit_registers->status);
e2f8db50
DW
844}
845
89a7301f 846enum sas_linkrate sci_port_get_max_allowed_speed(struct isci_port *iport)
e2f8db50
DW
847{
848 u16 index;
85280955 849 struct isci_phy *iphy;
e2f8db50 850 enum sas_linkrate max_allowed_speed = SAS_LINK_RATE_6_0_GBPS;
e2f8db50
DW
851
852 /*
853 * Loop through all of the phys in this port and find the phy with the
854 * lowest maximum link rate. */
855 for (index = 0; index < SCI_MAX_PHYS; index++) {
ffe191c9 856 iphy = iport->phy_table[index];
89a7301f 857 if (iphy && sci_port_active_phy(iport, iphy) &&
85280955
DW
858 iphy->max_negotiated_speed < max_allowed_speed)
859 max_allowed_speed = iphy->max_negotiated_speed;
e2f8db50
DW
860 }
861
862 return max_allowed_speed;
863}
864
89a7301f 865static void sci_port_suspend_port_task_scheduler(struct isci_port *iport)
e2f8db50
DW
866{
867 u32 pts_control_value;
868
ffe191c9 869 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
e2f8db50 870 pts_control_value |= SCU_PTSxCR_GEN_BIT(SUSPEND);
ffe191c9 871 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
e2f8db50
DW
872}
873
874/**
89a7301f 875 * sci_port_post_dummy_request() - post dummy/workaround request
e2f8db50
DW
876 * @sci_port: port to post task
877 *
878 * Prevent the hardware scheduler from posting new requests to the front
879 * of the scheduler queue causing a starvation problem for currently
880 * ongoing requests.
881 *
882 */
89a7301f 883static void sci_port_post_dummy_request(struct isci_port *iport)
e2f8db50 884{
d9dcb4ba 885 struct isci_host *ihost = iport->owning_controller;
ffe191c9 886 u16 tag = iport->reserved_tag;
312e0c24
DW
887 struct scu_task_context *tc;
888 u32 command;
e2f8db50 889
d9dcb4ba 890 tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
312e0c24 891 tc->abort = 0;
e2f8db50
DW
892
893 command = SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC |
ffe191c9 894 iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
312e0c24 895 ISCI_TAG_TCI(tag);
e2f8db50 896
89a7301f 897 sci_controller_post_request(ihost, command);
e2f8db50
DW
898}
899
900/**
901 * This routine will abort the dummy request. This will alow the hardware to
902 * power down parts of the silicon to save power.
903 *
904 * @sci_port: The port on which the task must be aborted.
905 *
906 */
89a7301f 907static void sci_port_abort_dummy_request(struct isci_port *iport)
e2f8db50 908{
d9dcb4ba 909 struct isci_host *ihost = iport->owning_controller;
ffe191c9 910 u16 tag = iport->reserved_tag;
e2f8db50
DW
911 struct scu_task_context *tc;
912 u32 command;
913
d9dcb4ba 914 tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
e2f8db50
DW
915 tc->abort = 1;
916
917 command = SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT |
ffe191c9 918 iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
312e0c24 919 ISCI_TAG_TCI(tag);
e2f8db50 920
89a7301f 921 sci_controller_post_request(ihost, command);
e2f8db50
DW
922}
923
924/**
925 *
ffe191c9 926 * @sci_port: This is the struct isci_port object to resume.
e2f8db50
DW
927 *
928 * This method will resume the port task scheduler for this port object. none
929 */
930static void
89a7301f 931sci_port_resume_port_task_scheduler(struct isci_port *iport)
e2f8db50
DW
932{
933 u32 pts_control_value;
934
ffe191c9 935 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
e2f8db50 936 pts_control_value &= ~SCU_PTSxCR_GEN_BIT(SUSPEND);
ffe191c9 937 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
e2f8db50
DW
938}
939
89a7301f 940static void sci_port_ready_substate_waiting_enter(struct sci_base_state_machine *sm)
e2f8db50 941{
ffe191c9 942 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 943
89a7301f 944 sci_port_suspend_port_task_scheduler(iport);
e2f8db50 945
ffe191c9 946 iport->not_ready_reason = SCIC_PORT_NOT_READY_NO_ACTIVE_PHYS;
e2f8db50 947
ffe191c9 948 if (iport->active_phy_mask != 0) {
e2f8db50 949 /* At least one of the phys on the port is ready */
ffe191c9 950 port_state_machine_change(iport,
e301370a 951 SCI_PORT_SUB_OPERATIONAL);
e2f8db50
DW
952 }
953}
954
05b080fc
MT
955static void scic_sds_port_ready_substate_waiting_exit(
956 struct sci_base_state_machine *sm)
957{
958 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
959 sci_port_resume_port_task_scheduler(iport);
960}
961
89a7301f 962static void sci_port_ready_substate_operational_enter(struct sci_base_state_machine *sm)
e2f8db50
DW
963{
964 u32 index;
ffe191c9 965 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
d9dcb4ba 966 struct isci_host *ihost = iport->owning_controller;
e2f8db50 967
fca4ecbd
DW
968 dev_dbg(&ihost->pdev->dev, "%s: port%d ready\n",
969 __func__, iport->physical_port_index);
e2f8db50
DW
970
971 for (index = 0; index < SCI_MAX_PHYS; index++) {
ffe191c9
DW
972 if (iport->phy_table[index]) {
973 writel(iport->physical_port_index,
974 &iport->port_pe_configuration_register[
975 iport->phy_table[index]->phy_index]);
05b080fc
MT
976 if (((iport->active_phy_mask^iport->enabled_phy_mask) & (1 << index)) != 0)
977 sci_port_resume_phy(iport, iport->phy_table[index]);
e2f8db50
DW
978 }
979 }
980
89a7301f 981 sci_port_update_viit_entry(iport);
e2f8db50 982
e2f8db50
DW
983 /*
984 * Post the dummy task for the port so the hardware can schedule
985 * io correctly
986 */
89a7301f 987 sci_port_post_dummy_request(iport);
e2f8db50
DW
988}
989
89a7301f 990static void sci_port_invalidate_dummy_remote_node(struct isci_port *iport)
e91f41ef 991{
d9dcb4ba 992 struct isci_host *ihost = iport->owning_controller;
ffe191c9 993 u8 phys_index = iport->physical_port_index;
e91f41ef 994 union scu_remote_node_context *rnc;
ffe191c9 995 u16 rni = iport->reserved_rni;
e91f41ef
PS
996 u32 command;
997
d9dcb4ba 998 rnc = &ihost->remote_node_context_table[rni];
e91f41ef
PS
999
1000 rnc->ssp.is_valid = false;
1001
1002 /* ensure the preceding tc abort request has reached the
1003 * controller and give it ample time to act before posting the rnc
1004 * invalidate
1005 */
d9dcb4ba 1006 readl(&ihost->smu_registers->interrupt_status); /* flush */
e91f41ef
PS
1007 udelay(10);
1008
1009 command = SCU_CONTEXT_COMMAND_POST_RNC_INVALIDATE |
1010 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1011
89a7301f 1012 sci_controller_post_request(ihost, command);
e91f41ef
PS
1013}
1014
e2f8db50
DW
1015/**
1016 *
ffe191c9 1017 * @object: This is the object which is cast to a struct isci_port object.
e2f8db50 1018 *
ffe191c9 1019 * This method will perform the actions required by the struct isci_port on
e301370a 1020 * exiting the SCI_PORT_SUB_OPERATIONAL. This function reports
e2f8db50
DW
1021 * the port not ready and suspends the port task scheduler. none
1022 */
89a7301f 1023static void sci_port_ready_substate_operational_exit(struct sci_base_state_machine *sm)
e2f8db50 1024{
ffe191c9 1025 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
d9dcb4ba 1026 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
1027
1028 /*
1029 * Kill the dummy task for this port if it has not yet posted
1030 * the hardware will treat this as a NOP and just return abort
1031 * complete.
1032 */
89a7301f 1033 sci_port_abort_dummy_request(iport);
e2f8db50 1034
fca4ecbd
DW
1035 dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
1036 __func__, iport->physical_port_index);
e91f41ef 1037
ffe191c9 1038 if (iport->ready_exit)
89a7301f 1039 sci_port_invalidate_dummy_remote_node(iport);
e2f8db50
DW
1040}
1041
89a7301f 1042static void sci_port_ready_substate_configuring_enter(struct sci_base_state_machine *sm)
e2f8db50 1043{
ffe191c9 1044 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
d9dcb4ba 1045 struct isci_host *ihost = iport->owning_controller;
e2f8db50 1046
ffe191c9 1047 if (iport->active_phy_mask == 0) {
fca4ecbd
DW
1048 dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
1049 __func__, iport->physical_port_index);
e2f8db50 1050
05b080fc
MT
1051 port_state_machine_change(iport, SCI_PORT_SUB_WAITING);
1052 } else
1053 port_state_machine_change(iport, SCI_PORT_SUB_OPERATIONAL);
e2f8db50
DW
1054}
1055
89a7301f 1056enum sci_status sci_port_start(struct isci_port *iport)
d76f71d9 1057{
d9dcb4ba 1058 struct isci_host *ihost = iport->owning_controller;
d76f71d9 1059 enum sci_status status = SCI_SUCCESS;
89a7301f 1060 enum sci_port_states state;
d76f71d9
PS
1061 u32 phy_mask;
1062
ffe191c9 1063 state = iport->sm.current_state_id;
e301370a 1064 if (state != SCI_PORT_STOPPED) {
d7a0ccdd
DW
1065 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1066 __func__, port_state_name(state));
d76f71d9
PS
1067 return SCI_FAILURE_INVALID_STATE;
1068 }
1069
ffe191c9 1070 if (iport->assigned_device_count > 0) {
d76f71d9
PS
1071 /* TODO This is a start failure operation because
1072 * there are still devices assigned to this port.
1073 * There must be no devices assigned to a port on a
1074 * start operation.
1075 */
1076 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
1077 }
1078
ffe191c9 1079 if (iport->reserved_rni == SCU_DUMMY_INDEX) {
89a7301f 1080 u16 rni = sci_remote_node_table_allocate_remote_node(
d9dcb4ba 1081 &ihost->available_remote_nodes, 1);
d76f71d9
PS
1082
1083 if (rni != SCU_DUMMY_INDEX)
89a7301f 1084 sci_port_construct_dummy_rnc(iport, rni);
d76f71d9
PS
1085 else
1086 status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
ffe191c9 1087 iport->reserved_rni = rni;
d76f71d9
PS
1088 }
1089
ffe191c9 1090 if (iport->reserved_tag == SCI_CONTROLLER_INVALID_IO_TAG) {
312e0c24 1091 u16 tag;
d76f71d9 1092
312e0c24
DW
1093 tag = isci_alloc_tag(ihost);
1094 if (tag == SCI_CONTROLLER_INVALID_IO_TAG)
d76f71d9 1095 status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
312e0c24 1096 else
89a7301f 1097 sci_port_construct_dummy_task(iport, tag);
ffe191c9 1098 iport->reserved_tag = tag;
d76f71d9
PS
1099 }
1100
1101 if (status == SCI_SUCCESS) {
89a7301f 1102 phy_mask = sci_port_get_phys(iport);
d76f71d9
PS
1103
1104 /*
1105 * There are one or more phys assigned to this port. Make sure
1106 * the port's phy mask is in fact legal and supported by the
1107 * silicon.
1108 */
89a7301f 1109 if (sci_port_is_phy_mask_valid(iport, phy_mask) == true) {
ffe191c9 1110 port_state_machine_change(iport,
e301370a 1111 SCI_PORT_READY);
d76f71d9
PS
1112
1113 return SCI_SUCCESS;
1114 }
1115 status = SCI_FAILURE;
1116 }
1117
1118 if (status != SCI_SUCCESS)
89a7301f 1119 sci_port_destroy_dummy_resources(iport);
d76f71d9
PS
1120
1121 return status;
1122}
1123
89a7301f 1124enum sci_status sci_port_stop(struct isci_port *iport)
8bc80d30 1125{
89a7301f 1126 enum sci_port_states state;
8bc80d30 1127
ffe191c9 1128 state = iport->sm.current_state_id;
8bc80d30 1129 switch (state) {
e301370a 1130 case SCI_PORT_STOPPED:
8bc80d30 1131 return SCI_SUCCESS;
e301370a
EN
1132 case SCI_PORT_SUB_WAITING:
1133 case SCI_PORT_SUB_OPERATIONAL:
1134 case SCI_PORT_SUB_CONFIGURING:
1135 case SCI_PORT_RESETTING:
ffe191c9 1136 port_state_machine_change(iport,
e301370a 1137 SCI_PORT_STOPPING);
8bc80d30
PS
1138 return SCI_SUCCESS;
1139 default:
d7a0ccdd
DW
1140 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1141 __func__, port_state_name(state));
8bc80d30
PS
1142 return SCI_FAILURE_INVALID_STATE;
1143 }
1144}
1145
89a7301f 1146static enum sci_status sci_port_hard_reset(struct isci_port *iport, u32 timeout)
bd6713b4
PS
1147{
1148 enum sci_status status = SCI_FAILURE_INVALID_PHY;
85280955 1149 struct isci_phy *iphy = NULL;
89a7301f 1150 enum sci_port_states state;
bd6713b4
PS
1151 u32 phy_index;
1152
ffe191c9 1153 state = iport->sm.current_state_id;
e301370a 1154 if (state != SCI_PORT_SUB_OPERATIONAL) {
d7a0ccdd
DW
1155 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1156 __func__, port_state_name(state));
bd6713b4
PS
1157 return SCI_FAILURE_INVALID_STATE;
1158 }
1159
1160 /* Select a phy on which we can send the hard reset request. */
85280955 1161 for (phy_index = 0; phy_index < SCI_MAX_PHYS && !iphy; phy_index++) {
ffe191c9 1162 iphy = iport->phy_table[phy_index];
89a7301f 1163 if (iphy && !sci_port_active_phy(iport, iphy)) {
bd6713b4
PS
1164 /*
1165 * We found a phy but it is not ready select
1166 * different phy
1167 */
85280955 1168 iphy = NULL;
bd6713b4
PS
1169 }
1170 }
1171
1172 /* If we have a phy then go ahead and start the reset procedure */
85280955 1173 if (!iphy)
bd6713b4 1174 return status;
89a7301f 1175 status = sci_phy_reset(iphy);
bd6713b4
PS
1176
1177 if (status != SCI_SUCCESS)
1178 return status;
1179
ffe191c9
DW
1180 sci_mod_timer(&iport->timer, timeout);
1181 iport->not_ready_reason = SCIC_PORT_NOT_READY_HARD_RESET_REQUESTED;
bd6713b4 1182
ffe191c9 1183 port_state_machine_change(iport, SCI_PORT_RESETTING);
bd6713b4
PS
1184 return SCI_SUCCESS;
1185}
1186
1187/**
89a7301f 1188 * sci_port_add_phy() -
bd6713b4
PS
1189 * @sci_port: This parameter specifies the port in which the phy will be added.
1190 * @sci_phy: This parameter is the phy which is to be added to the port.
1191 *
1192 * This method will add a PHY to the selected port. This method returns an
1193 * enum sci_status. SCI_SUCCESS the phy has been added to the port. Any other
1194 * status is a failure to add the phy to the port.
1195 */
89a7301f 1196enum sci_status sci_port_add_phy(struct isci_port *iport,
85280955 1197 struct isci_phy *iphy)
bd6713b4
PS
1198{
1199 enum sci_status status;
89a7301f 1200 enum sci_port_states state;
bd6713b4 1201
08e73be5
MT
1202 sci_port_bcn_enable(iport);
1203
ffe191c9 1204 state = iport->sm.current_state_id;
bd6713b4 1205 switch (state) {
e301370a 1206 case SCI_PORT_STOPPED: {
bd6713b4
PS
1207 struct sci_sas_address port_sas_address;
1208
1209 /* Read the port assigned SAS Address if there is one */
89a7301f 1210 sci_port_get_sas_address(iport, &port_sas_address);
bd6713b4
PS
1211
1212 if (port_sas_address.high != 0 && port_sas_address.low != 0) {
1213 struct sci_sas_address phy_sas_address;
1214
1215 /* Make sure that the PHY SAS Address matches the SAS Address
1216 * for this port
1217 */
89a7301f 1218 sci_phy_get_sas_address(iphy, &phy_sas_address);
bd6713b4
PS
1219
1220 if (port_sas_address.high != phy_sas_address.high ||
1221 port_sas_address.low != phy_sas_address.low)
1222 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
1223 }
89a7301f 1224 return sci_port_set_phy(iport, iphy);
bd6713b4 1225 }
e301370a
EN
1226 case SCI_PORT_SUB_WAITING:
1227 case SCI_PORT_SUB_OPERATIONAL:
89a7301f 1228 status = sci_port_set_phy(iport, iphy);
bd6713b4
PS
1229
1230 if (status != SCI_SUCCESS)
1231 return status;
1232
05b080fc 1233 sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY|PF_RESUME);
ffe191c9
DW
1234 iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
1235 port_state_machine_change(iport, SCI_PORT_SUB_CONFIGURING);
bd6713b4
PS
1236
1237 return status;
e301370a 1238 case SCI_PORT_SUB_CONFIGURING:
89a7301f 1239 status = sci_port_set_phy(iport, iphy);
bd6713b4
PS
1240
1241 if (status != SCI_SUCCESS)
1242 return status;
05b080fc 1243 sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY);
bd6713b4
PS
1244
1245 /* Re-enter the configuring state since this may be the last phy in
1246 * the port.
1247 */
ffe191c9 1248 port_state_machine_change(iport,
e301370a 1249 SCI_PORT_SUB_CONFIGURING);
bd6713b4
PS
1250 return SCI_SUCCESS;
1251 default:
d7a0ccdd
DW
1252 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1253 __func__, port_state_name(state));
bd6713b4
PS
1254 return SCI_FAILURE_INVALID_STATE;
1255 }
1256}
1257
1258/**
89a7301f 1259 * sci_port_remove_phy() -
bd6713b4
PS
1260 * @sci_port: This parameter specifies the port in which the phy will be added.
1261 * @sci_phy: This parameter is the phy which is to be added to the port.
1262 *
1263 * This method will remove the PHY from the selected PORT. This method returns
1264 * an enum sci_status. SCI_SUCCESS the phy has been removed from the port. Any
1265 * other status is a failure to add the phy to the port.
1266 */
89a7301f 1267enum sci_status sci_port_remove_phy(struct isci_port *iport,
85280955 1268 struct isci_phy *iphy)
bd6713b4
PS
1269{
1270 enum sci_status status;
89a7301f 1271 enum sci_port_states state;
bd6713b4 1272
ffe191c9 1273 state = iport->sm.current_state_id;
bd6713b4
PS
1274
1275 switch (state) {
e301370a 1276 case SCI_PORT_STOPPED:
89a7301f 1277 return sci_port_clear_phy(iport, iphy);
e301370a 1278 case SCI_PORT_SUB_OPERATIONAL:
89a7301f 1279 status = sci_port_clear_phy(iport, iphy);
bd6713b4
PS
1280 if (status != SCI_SUCCESS)
1281 return status;
1282
89a7301f 1283 sci_port_deactivate_phy(iport, iphy, true);
ffe191c9
DW
1284 iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
1285 port_state_machine_change(iport,
e301370a 1286 SCI_PORT_SUB_CONFIGURING);
bd6713b4 1287 return SCI_SUCCESS;
e301370a 1288 case SCI_PORT_SUB_CONFIGURING:
89a7301f 1289 status = sci_port_clear_phy(iport, iphy);
bd6713b4
PS
1290
1291 if (status != SCI_SUCCESS)
1292 return status;
89a7301f 1293 sci_port_deactivate_phy(iport, iphy, true);
bd6713b4
PS
1294
1295 /* Re-enter the configuring state since this may be the last phy in
1296 * the port
1297 */
ffe191c9 1298 port_state_machine_change(iport,
e301370a 1299 SCI_PORT_SUB_CONFIGURING);
051266ca
PS
1300 return SCI_SUCCESS;
1301 default:
d7a0ccdd
DW
1302 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1303 __func__, port_state_name(state));
051266ca
PS
1304 return SCI_FAILURE_INVALID_STATE;
1305 }
1306}
bd6713b4 1307
89a7301f 1308enum sci_status sci_port_link_up(struct isci_port *iport,
85280955 1309 struct isci_phy *iphy)
051266ca 1310{
89a7301f 1311 enum sci_port_states state;
051266ca 1312
ffe191c9 1313 state = iport->sm.current_state_id;
051266ca 1314 switch (state) {
e301370a 1315 case SCI_PORT_SUB_WAITING:
051266ca
PS
1316 /* Since this is the first phy going link up for the port we
1317 * can just enable it and continue
1318 */
05b080fc 1319 sci_port_activate_phy(iport, iphy, PF_NOTIFY|PF_RESUME);
051266ca 1320
ffe191c9 1321 port_state_machine_change(iport,
e301370a 1322 SCI_PORT_SUB_OPERATIONAL);
051266ca 1323 return SCI_SUCCESS;
e301370a 1324 case SCI_PORT_SUB_OPERATIONAL:
05b080fc 1325 sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY|PF_RESUME);
051266ca 1326 return SCI_SUCCESS;
e301370a 1327 case SCI_PORT_RESETTING:
051266ca
PS
1328 /* TODO We should make sure that the phy that has gone
1329 * link up is the same one on which we sent the reset. It is
1330 * possible that the phy on which we sent the reset is not the
1331 * one that has gone link up and we want to make sure that
1332 * phy being reset comes back. Consider the case where a
1333 * reset is sent but before the hardware processes the reset it
1334 * get a link up on the port because of a hot plug event.
1335 * because of the reset request this phy will go link down
1336 * almost immediately.
1337 */
1338
1339 /* In the resetting state we don't notify the user regarding
1340 * link up and link down notifications.
1341 */
05b080fc 1342 sci_port_general_link_up_handler(iport, iphy, PF_RESUME);
051266ca
PS
1343 return SCI_SUCCESS;
1344 default:
d7a0ccdd
DW
1345 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1346 __func__, port_state_name(state));
051266ca
PS
1347 return SCI_FAILURE_INVALID_STATE;
1348 }
1349}
1350
89a7301f 1351enum sci_status sci_port_link_down(struct isci_port *iport,
85280955 1352 struct isci_phy *iphy)
051266ca 1353{
89a7301f 1354 enum sci_port_states state;
051266ca 1355
ffe191c9 1356 state = iport->sm.current_state_id;
051266ca 1357 switch (state) {
e301370a 1358 case SCI_PORT_SUB_OPERATIONAL:
89a7301f 1359 sci_port_deactivate_phy(iport, iphy, true);
051266ca
PS
1360
1361 /* If there are no active phys left in the port, then
1362 * transition the port to the WAITING state until such time
1363 * as a phy goes link up
1364 */
ffe191c9
DW
1365 if (iport->active_phy_mask == 0)
1366 port_state_machine_change(iport,
e301370a 1367 SCI_PORT_SUB_WAITING);
051266ca 1368 return SCI_SUCCESS;
e301370a 1369 case SCI_PORT_RESETTING:
051266ca
PS
1370 /* In the resetting state we don't notify the user regarding
1371 * link up and link down notifications. */
89a7301f 1372 sci_port_deactivate_phy(iport, iphy, false);
bd6713b4
PS
1373 return SCI_SUCCESS;
1374 default:
d7a0ccdd
DW
1375 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1376 __func__, port_state_name(state));
bd6713b4
PS
1377 return SCI_FAILURE_INVALID_STATE;
1378 }
1379}
1380
89a7301f
DW
1381enum sci_status sci_port_start_io(struct isci_port *iport,
1382 struct isci_remote_device *idev,
1383 struct isci_request *ireq)
6813820c 1384{
89a7301f 1385 enum sci_port_states state;
6813820c 1386
ffe191c9 1387 state = iport->sm.current_state_id;
6813820c 1388 switch (state) {
e301370a 1389 case SCI_PORT_SUB_WAITING:
6813820c 1390 return SCI_FAILURE_INVALID_STATE;
e301370a 1391 case SCI_PORT_SUB_OPERATIONAL:
ffe191c9 1392 iport->started_request_count++;
6813820c
DW
1393 return SCI_SUCCESS;
1394 default:
d7a0ccdd
DW
1395 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1396 __func__, port_state_name(state));
6813820c 1397 return SCI_FAILURE_INVALID_STATE;
e2f8db50 1398 }
6813820c 1399}
e2f8db50 1400
89a7301f
DW
1401enum sci_status sci_port_complete_io(struct isci_port *iport,
1402 struct isci_remote_device *idev,
1403 struct isci_request *ireq)
6813820c 1404{
89a7301f 1405 enum sci_port_states state;
6813820c 1406
ffe191c9 1407 state = iport->sm.current_state_id;
6813820c 1408 switch (state) {
e301370a 1409 case SCI_PORT_STOPPED:
d7a0ccdd
DW
1410 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1411 __func__, port_state_name(state));
6813820c 1412 return SCI_FAILURE_INVALID_STATE;
e301370a 1413 case SCI_PORT_STOPPING:
89a7301f 1414 sci_port_decrement_request_count(iport);
6813820c 1415
ffe191c9
DW
1416 if (iport->started_request_count == 0)
1417 port_state_machine_change(iport,
e301370a 1418 SCI_PORT_STOPPED);
6813820c 1419 break;
e301370a
EN
1420 case SCI_PORT_READY:
1421 case SCI_PORT_RESETTING:
1422 case SCI_PORT_FAILED:
1423 case SCI_PORT_SUB_WAITING:
1424 case SCI_PORT_SUB_OPERATIONAL:
89a7301f 1425 sci_port_decrement_request_count(iport);
6813820c 1426 break;
e301370a 1427 case SCI_PORT_SUB_CONFIGURING:
89a7301f 1428 sci_port_decrement_request_count(iport);
ffe191c9
DW
1429 if (iport->started_request_count == 0) {
1430 port_state_machine_change(iport,
e301370a 1431 SCI_PORT_SUB_OPERATIONAL);
6813820c
DW
1432 }
1433 break;
1434 }
1435 return SCI_SUCCESS;
1436}
e2f8db50 1437
89a7301f 1438static void sci_port_enable_port_task_scheduler(struct isci_port *iport)
e2f8db50
DW
1439{
1440 u32 pts_control_value;
1441
89a7301f 1442 /* enable the port task scheduler in a suspended state */
ffe191c9 1443 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
e2f8db50 1444 pts_control_value |= SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND);
ffe191c9 1445 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
e2f8db50
DW
1446}
1447
89a7301f 1448static void sci_port_disable_port_task_scheduler(struct isci_port *iport)
e2f8db50
DW
1449{
1450 u32 pts_control_value;
1451
ffe191c9 1452 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
e2f8db50
DW
1453 pts_control_value &=
1454 ~(SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND));
ffe191c9 1455 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
e2f8db50
DW
1456}
1457
89a7301f 1458static void sci_port_post_dummy_remote_node(struct isci_port *iport)
e2f8db50 1459{
d9dcb4ba 1460 struct isci_host *ihost = iport->owning_controller;
ffe191c9 1461 u8 phys_index = iport->physical_port_index;
e2f8db50 1462 union scu_remote_node_context *rnc;
ffe191c9 1463 u16 rni = iport->reserved_rni;
e2f8db50
DW
1464 u32 command;
1465
d9dcb4ba 1466 rnc = &ihost->remote_node_context_table[rni];
e2f8db50
DW
1467 rnc->ssp.is_valid = true;
1468
1469 command = SCU_CONTEXT_COMMAND_POST_RNC_32 |
1470 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1471
89a7301f 1472 sci_controller_post_request(ihost, command);
e2f8db50
DW
1473
1474 /* ensure hardware has seen the post rnc command and give it
1475 * ample time to act before sending the suspend
1476 */
d9dcb4ba 1477 readl(&ihost->smu_registers->interrupt_status); /* flush */
e2f8db50
DW
1478 udelay(10);
1479
1480 command = SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX_RX |
1481 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1482
89a7301f 1483 sci_controller_post_request(ihost, command);
e2f8db50
DW
1484}
1485
89a7301f 1486static void sci_port_stopped_state_enter(struct sci_base_state_machine *sm)
e2f8db50 1487{
ffe191c9 1488 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 1489
ffe191c9 1490 if (iport->sm.previous_state_id == SCI_PORT_STOPPING) {
e2f8db50
DW
1491 /*
1492 * If we enter this state becasuse of a request to stop
1493 * the port then we want to disable the hardwares port
1494 * task scheduler. */
89a7301f 1495 sci_port_disable_port_task_scheduler(iport);
e2f8db50
DW
1496 }
1497}
1498
89a7301f 1499static void sci_port_stopped_state_exit(struct sci_base_state_machine *sm)
e2f8db50 1500{
ffe191c9 1501 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50
DW
1502
1503 /* Enable and suspend the port task scheduler */
89a7301f 1504 sci_port_enable_port_task_scheduler(iport);
e2f8db50
DW
1505}
1506
89a7301f 1507static void sci_port_ready_state_enter(struct sci_base_state_machine *sm)
e2f8db50 1508{
ffe191c9 1509 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
d9dcb4ba 1510 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
1511 u32 prev_state;
1512
ffe191c9 1513 prev_state = iport->sm.previous_state_id;
e301370a 1514 if (prev_state == SCI_PORT_RESETTING)
e2f8db50
DW
1515 isci_port_hard_reset_complete(iport, SCI_SUCCESS);
1516 else
fca4ecbd
DW
1517 dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
1518 __func__, iport->physical_port_index);
e2f8db50
DW
1519
1520 /* Post and suspend the dummy remote node context for this port. */
89a7301f 1521 sci_port_post_dummy_remote_node(iport);
e2f8db50
DW
1522
1523 /* Start the ready substate machine */
ffe191c9 1524 port_state_machine_change(iport,
e301370a 1525 SCI_PORT_SUB_WAITING);
e2f8db50
DW
1526}
1527
89a7301f 1528static void sci_port_resetting_state_exit(struct sci_base_state_machine *sm)
e2f8db50 1529{
ffe191c9 1530 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 1531
ffe191c9 1532 sci_del_timer(&iport->timer);
e2f8db50
DW
1533}
1534
89a7301f 1535static void sci_port_stopping_state_exit(struct sci_base_state_machine *sm)
e2f8db50 1536{
ffe191c9 1537 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 1538
ffe191c9 1539 sci_del_timer(&iport->timer);
e2f8db50 1540
89a7301f 1541 sci_port_destroy_dummy_resources(iport);
e2f8db50
DW
1542}
1543
89a7301f 1544static void sci_port_failed_state_enter(struct sci_base_state_machine *sm)
e2f8db50 1545{
ffe191c9 1546 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 1547
e2f8db50
DW
1548 isci_port_hard_reset_complete(iport, SCI_FAILURE_TIMEOUT);
1549}
1550
6f48844e
JS
1551void sci_port_set_hang_detection_timeout(struct isci_port *iport, u32 timeout)
1552{
1553 int phy_index;
1554 u32 phy_mask = iport->active_phy_mask;
1555
1556 if (timeout)
1557 ++iport->hang_detect_users;
1558 else if (iport->hang_detect_users > 1)
1559 --iport->hang_detect_users;
1560 else
1561 iport->hang_detect_users = 0;
1562
1563 if (timeout || (iport->hang_detect_users == 0)) {
1564 for (phy_index = 0; phy_index < SCI_MAX_PHYS; phy_index++) {
1565 if ((phy_mask >> phy_index) & 1) {
1566 writel(timeout,
1567 &iport->phy_table[phy_index]
1568 ->link_layer_registers
1569 ->link_layer_hang_detection_timeout);
1570 }
1571 }
1572 }
1573}
e2f8db50
DW
1574/* --------------------------------------------------------------------------- */
1575
89a7301f 1576static const struct sci_base_state sci_port_state_table[] = {
e301370a 1577 [SCI_PORT_STOPPED] = {
89a7301f
DW
1578 .enter_state = sci_port_stopped_state_enter,
1579 .exit_state = sci_port_stopped_state_exit
e2f8db50 1580 },
e301370a 1581 [SCI_PORT_STOPPING] = {
89a7301f 1582 .exit_state = sci_port_stopping_state_exit
e2f8db50 1583 },
e301370a 1584 [SCI_PORT_READY] = {
89a7301f 1585 .enter_state = sci_port_ready_state_enter,
e91f41ef 1586 },
e301370a 1587 [SCI_PORT_SUB_WAITING] = {
89a7301f 1588 .enter_state = sci_port_ready_substate_waiting_enter,
05b080fc 1589 .exit_state = scic_sds_port_ready_substate_waiting_exit,
e91f41ef 1590 },
e301370a 1591 [SCI_PORT_SUB_OPERATIONAL] = {
89a7301f
DW
1592 .enter_state = sci_port_ready_substate_operational_enter,
1593 .exit_state = sci_port_ready_substate_operational_exit
e91f41ef 1594 },
e301370a 1595 [SCI_PORT_SUB_CONFIGURING] = {
05b080fc 1596 .enter_state = sci_port_ready_substate_configuring_enter
e2f8db50 1597 },
e301370a 1598 [SCI_PORT_RESETTING] = {
89a7301f 1599 .exit_state = sci_port_resetting_state_exit
e2f8db50 1600 },
e301370a 1601 [SCI_PORT_FAILED] = {
89a7301f 1602 .enter_state = sci_port_failed_state_enter,
e2f8db50
DW
1603 }
1604};
1605
89a7301f 1606void sci_port_construct(struct isci_port *iport, u8 index,
d9dcb4ba 1607 struct isci_host *ihost)
e2f8db50 1608{
89a7301f 1609 sci_init_sm(&iport->sm, sci_port_state_table, SCI_PORT_STOPPED);
e2f8db50 1610
ffe191c9
DW
1611 iport->logical_port_index = SCIC_SDS_DUMMY_PORT;
1612 iport->physical_port_index = index;
1613 iport->active_phy_mask = 0;
05b080fc 1614 iport->enabled_phy_mask = 0;
8e35a139
JS
1615 iport->last_active_phy = 0;
1616 iport->ready_exit = false;
e2f8db50 1617
d9dcb4ba 1618 iport->owning_controller = ihost;
e2f8db50 1619
ffe191c9
DW
1620 iport->started_request_count = 0;
1621 iport->assigned_device_count = 0;
6f48844e 1622 iport->hang_detect_users = 0;
e2f8db50 1623
ffe191c9
DW
1624 iport->reserved_rni = SCU_DUMMY_INDEX;
1625 iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
e2f8db50 1626
ffe191c9 1627 sci_init_timer(&iport->timer, port_timeout);
5553ba2b 1628
ffe191c9 1629 iport->port_task_scheduler_registers = NULL;
e2f8db50
DW
1630
1631 for (index = 0; index < SCI_MAX_PHYS; index++)
ffe191c9 1632 iport->phy_table[index] = NULL;
e2f8db50
DW
1633}
1634
89a7301f 1635void sci_port_broadcast_change_received(struct isci_port *iport, struct isci_phy *iphy)
e2f8db50 1636{
d9dcb4ba 1637 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
1638
1639 /* notify the user. */
ffe191c9 1640 isci_port_bc_change_received(ihost, iport, iphy);
e2f8db50
DW
1641}
1642
92776991
DW
1643static void wait_port_reset(struct isci_host *ihost, struct isci_port *iport)
1644{
1645 wait_event(ihost->eventq, !test_bit(IPORT_RESET_PENDING, &iport->state));
1646}
1647
e2f8db50
DW
1648int isci_port_perform_hard_reset(struct isci_host *ihost, struct isci_port *iport,
1649 struct isci_phy *iphy)
1650{
1651 unsigned long flags;
1652 enum sci_status status;
8e35a139 1653 int ret = TMF_RESP_FUNC_COMPLETE;
e2f8db50
DW
1654
1655 dev_dbg(&ihost->pdev->dev, "%s: iport = %p\n",
1656 __func__, iport);
1657
e2f8db50 1658 spin_lock_irqsave(&ihost->scic_lock, flags);
92776991 1659 set_bit(IPORT_RESET_PENDING, &iport->state);
e2f8db50
DW
1660
1661 #define ISCI_PORT_RESET_TIMEOUT SCIC_SDS_SIGNATURE_FIS_TIMEOUT
89a7301f 1662 status = sci_port_hard_reset(iport, ISCI_PORT_RESET_TIMEOUT);
e2f8db50
DW
1663
1664 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1665
1666 if (status == SCI_SUCCESS) {
92776991 1667 wait_port_reset(ihost, iport);
e2f8db50
DW
1668
1669 dev_dbg(&ihost->pdev->dev,
1670 "%s: iport = %p; hard reset completion\n",
1671 __func__, iport);
1672
8e35a139 1673 if (iport->hard_reset_status != SCI_SUCCESS) {
e2f8db50 1674 ret = TMF_RESP_FUNC_FAILED;
8e35a139
JS
1675
1676 dev_err(&ihost->pdev->dev,
1677 "%s: iport = %p; hard reset failed (0x%x)\n",
1678 __func__, iport, iport->hard_reset_status);
1679 }
e2f8db50 1680 } else {
92776991
DW
1681 clear_bit(IPORT_RESET_PENDING, &iport->state);
1682 wake_up(&ihost->eventq);
e2f8db50
DW
1683 ret = TMF_RESP_FUNC_FAILED;
1684
1685 dev_err(&ihost->pdev->dev,
89a7301f 1686 "%s: iport = %p; sci_port_hard_reset call"
e2f8db50
DW
1687 " failed 0x%x\n",
1688 __func__, iport, status);
1689
1690 }
e2f8db50
DW
1691 return ret;
1692}
1693
687833a0
DW
1694int isci_ata_check_ready(struct domain_device *dev)
1695{
1696 struct isci_port *iport = dev->port->lldd_port;
1697 struct isci_host *ihost = dev_to_ihost(dev);
1698 struct isci_remote_device *idev;
1699 unsigned long flags;
1700 int rc = 0;
1701
1702 spin_lock_irqsave(&ihost->scic_lock, flags);
1703 idev = isci_lookup_device(dev);
1704 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1705
1706 if (!idev)
1707 goto out;
1708
1709 if (test_bit(IPORT_RESET_PENDING, &iport->state))
1710 goto out;
1711
1712 rc = !!iport->active_phy_mask;
1713 out:
1714 isci_put_device(idev);
1715
1716 return rc;
1717}
1718
e2f8db50
DW
1719void isci_port_deformed(struct asd_sas_phy *phy)
1720{
c132f692
DW
1721 struct isci_host *ihost = phy->ha->lldd_ha;
1722 struct isci_port *iport = phy->port->lldd_port;
1723 unsigned long flags;
1724 int i;
1725
1726 /* we got a port notification on a port that was subsequently
1727 * torn down and libsas is just now catching up
1728 */
1729 if (!iport)
1730 return;
1731
1732 spin_lock_irqsave(&ihost->scic_lock, flags);
1733 for (i = 0; i < SCI_MAX_PHYS; i++) {
1734 if (iport->active_phy_mask & 1 << i)
1735 break;
1736 }
1737 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1738
1739 if (i >= SCI_MAX_PHYS)
1740 dev_dbg(&ihost->pdev->dev, "%s: port: %ld\n",
1741 __func__, (long) (iport - &ihost->ports[0]));
e2f8db50
DW
1742}
1743
e2f8db50
DW
1744void isci_port_formed(struct asd_sas_phy *phy)
1745{
c132f692
DW
1746 struct isci_host *ihost = phy->ha->lldd_ha;
1747 struct isci_phy *iphy = to_iphy(phy);
1748 struct asd_sas_port *port = phy->port;
6f48844e 1749 struct isci_port *iport = NULL;
c132f692
DW
1750 unsigned long flags;
1751 int i;
1752
1753 /* initial ports are formed as the driver is still initializing,
1754 * wait for that process to complete
1755 */
1756 wait_for_start(ihost);
1757
1758 spin_lock_irqsave(&ihost->scic_lock, flags);
1759 for (i = 0; i < SCI_MAX_PORTS; i++) {
1760 iport = &ihost->ports[i];
1761 if (iport->active_phy_mask & 1 << iphy->phy_index)
1762 break;
1763 }
1764 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1765
1766 if (i >= SCI_MAX_PORTS)
1767 iport = NULL;
1768
1769 port->lldd_port = iport;
09d7da13 1770}
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