[deliverable/linux.git] / drivers / scsi / isci / probe_roms.h

/*
 * This file is provided under a dual BSD/GPLv2 license.  When using or
 * redistributing this file, you may do so under either license.
 *
 * GPL LICENSE SUMMARY
 *
 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 * The full GNU General Public License is included in this distribution
 * in the file called LICENSE.GPL.
 *
 * BSD LICENSE
 *
 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *   * Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *   * Redistributions in binary form must reproduce the above copyright
 *     notice, this list of conditions and the following disclaimer in
 *     the documentation and/or other materials provided with the
 *     distribution.
 *   * Neither the name of Intel Corporation nor the names of its
 *     contributors may be used to endorse or promote products derived
 *     from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
#ifndef _ISCI_PROBE_ROMS_H_
#define _ISCI_PROBE_ROMS_H_

#ifdef __KERNEL__
#include <linux/firmware.h>
#include <linux/pci.h>
#include "isci.h"

#define SCIC_SDS_PARM_NO_SPEED   0

/* generation 1 (i.e. 1.5 Gb/s) */
#define SCIC_SDS_PARM_GEN1_SPEED 1

/* generation 2 (i.e. 3.0 Gb/s) */
#define SCIC_SDS_PARM_GEN2_SPEED 2

/* generation 3 (i.e. 6.0 Gb/s) */
#define SCIC_SDS_PARM_GEN3_SPEED 3
#define SCIC_SDS_PARM_MAX_SPEED SCIC_SDS_PARM_GEN3_SPEED

/* parameters that can be set by module parameters */
struct scic_sds_user_parameters {
	struct sci_phy_user_params {
		/**
		 * This field specifies the NOTIFY (ENABLE SPIN UP) primitive
		 * insertion frequency for this phy index.
		 */
		u32 notify_enable_spin_up_insertion_frequency;

		/**
		 * This method specifies the number of transmitted DWORDs within which
		 * to transmit a single ALIGN primitive.  This value applies regardless
		 * of what type of device is attached or connection state.  A value of
		 * 0 indicates that no ALIGN primitives will be inserted.
		 */
		u16 align_insertion_frequency;

		/**
		 * This method specifies the number of transmitted DWORDs within which
		 * to transmit 2 ALIGN primitives.  This applies for SAS connections
		 * only.  A minimum value of 3 is required for this field.
		 */
		u16 in_connection_align_insertion_frequency;

		/**
		 * This field indicates the maximum speed generation to be utilized
		 * by phys in the supplied port.
		 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
		 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
		 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
		 */
		u8 max_speed_generation;

	} phys[SCI_MAX_PHYS];

	/**
	 * This field specifies the maximum number of direct attached devices
	 * that can have power supplied to them simultaneously.
	 */
	u8 max_number_concurrent_device_spin_up;

	/**
	 * This field specifies the number of seconds to allow a phy to consume
	 * power before yielding to another phy.
	 *
	 */
	u8 phy_spin_up_delay_interval;

	/**
	 * These timer values specifies how long a link will remain open with no
	 * activity in increments of a microsecond, it can be in increments of
	 * 100 microseconds if the upper most bit is set.
	 *
	 */
	u16 stp_inactivity_timeout;
	u16 ssp_inactivity_timeout;

	/**
	 * These timer values specifies how long a link will remain open in increments
	 * of 100 microseconds.
	 *
	 */
	u16 stp_max_occupancy_timeout;
	u16 ssp_max_occupancy_timeout;

	/**
	 * This timer value specifies how long a link will remain open with no
	 * outbound traffic in increments of a microsecond.
	 *
	 */
	u8 no_outbound_task_timeout;

};

/* XXX kill this union */
union scic_user_parameters {
	/**
	 * This field specifies the user parameters specific to the
	 * Storage Controller Unit (SCU) Driver Standard (SDS) version
	 * 1.
	 */
	struct scic_sds_user_parameters sds1;
};

#define SCIC_SDS_PARM_PHY_MASK_MIN 0x0
#define SCIC_SDS_PARM_PHY_MASK_MAX 0xF
#define MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT 4

struct scic_sds_oem_params;
int scic_oem_parameters_validate(struct scic_sds_oem_params *oem);

union scic_oem_parameters;
void scic_oem_parameters_get(struct scic_sds_controller *scic,
			     union scic_oem_parameters *oem);

struct isci_orom;
struct isci_orom *isci_request_oprom(struct pci_dev *pdev);
enum sci_status isci_parse_oem_parameters(union scic_oem_parameters *oem,
					  struct isci_orom *orom, int scu_index);
struct isci_orom *isci_request_firmware(struct pci_dev *pdev, const struct firmware *fw);
struct isci_orom *isci_get_efi_var(struct pci_dev *pdev);

struct isci_oem_hdr {
	u8 sig[4];
	u8 rev_major;
	u8 rev_minor;
	u16 len;
	u8 checksum;
	u8 reserved1;
	u16 reserved2;
} __attribute__ ((packed));

#else
#define SCI_MAX_PORTS 4
#define SCI_MAX_PHYS 4
#define SCI_MAX_CONTROLLERS 2
#endif

#define ISCI_FW_NAME		"isci/isci_firmware.bin"

#define ROMSIGNATURE		0xaa55

#define ISCI_OEM_SIG		"$OEM"
#define ISCI_OEM_SIG_SIZE	4
#define ISCI_ROM_SIG		"ISCUOEMB"
#define ISCI_ROM_SIG_SIZE	8

#define ISCI_EFI_VENDOR_GUID	\
	EFI_GUID(0x193dfefa, 0xa445, 0x4302, 0x99, 0xd8, 0xef, 0x3a, 0xad, \
			0x1a, 0x04, 0xc6)
#define ISCI_EFI_ATTRIBUTES	0
#define ISCI_EFI_VAR_NAME	"RstScuO"

/* Allowed PORT configuration modes APC Automatic PORT configuration mode is
 * defined by the OEM configuration parameters providing no PHY_MASK parameters
 * for any PORT. i.e. There are no phys assigned to any of the ports at start.
 * MPC Manual PORT configuration mode is defined by the OEM configuration
 * parameters providing a PHY_MASK value for any PORT.  It is assumed that any
 * PORT with no PHY_MASK is an invalid port and not all PHYs must be assigned.
 * A PORT_PHY mask that assigns just a single PHY to a port and no other PHYs
 * being assigned is sufficient to declare manual PORT configuration.
 */
enum scic_port_configuration_mode {
	SCIC_PORT_MANUAL_CONFIGURATION_MODE = 0,
	SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 1
};

struct sci_bios_oem_param_block_hdr {
	uint8_t signature[ISCI_ROM_SIG_SIZE];
	uint16_t total_block_length;
	uint8_t hdr_length;
	uint8_t version;
	uint8_t preboot_source;
	uint8_t num_elements;
	uint16_t element_length;
	uint8_t reserved[8];
} __attribute__ ((packed));

struct scic_sds_oem_params {
	struct {
		uint8_t mode_type;
		uint8_t max_concurrent_dev_spin_up;
		uint8_t do_enable_ssc;
		uint8_t reserved;
	} controller;

	struct {
		uint8_t phy_mask;
	} ports[SCI_MAX_PORTS];

	struct sci_phy_oem_params {
		struct {
			uint32_t high;
			uint32_t low;
		} sas_address;

		uint32_t afe_tx_amp_control0;
		uint32_t afe_tx_amp_control1;
		uint32_t afe_tx_amp_control2;
		uint32_t afe_tx_amp_control3;
	} phys[SCI_MAX_PHYS];
} __attribute__ ((packed));

/* XXX kill this union */
union scic_oem_parameters {
	/**
	 * This field specifies the OEM parameters specific to the
	 * Storage Controller Unit (SCU) Driver Standard (SDS) version
	 * 1.
	 */
	struct scic_sds_oem_params sds1;
};

struct isci_orom {
	struct sci_bios_oem_param_block_hdr hdr;
	struct scic_sds_oem_params ctrl[SCI_MAX_CONTROLLERS];
} __attribute__ ((packed));

#endif
Commit	Line	Data
d044af17 DW	1	/*
	2	* This file is provided under a dual BSD/GPLv2 license. When using or
	3	* redistributing this file, you may do so under either license.
	4	*
	5	* GPL LICENSE SUMMARY
	6	*
	7	* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of version 2 of the GNU General Public License as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
	21	* The full GNU General Public License is included in this distribution
	22	* in the file called LICENSE.GPL.
	23	*
	24	* BSD LICENSE
	25	*
	26	* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
	27	* All rights reserved.
	28	*
	29	* Redistribution and use in source and binary forms, with or without
	30	* modification, are permitted provided that the following conditions
	31	* are met:
	32	*
	33	* * Redistributions of source code must retain the above copyright
	34	* notice, this list of conditions and the following disclaimer.
	35	* * Redistributions in binary form must reproduce the above copyright
	36	* notice, this list of conditions and the following disclaimer in
	37	* the documentation and/or other materials provided with the
	38	* distribution.
	39	* * Neither the name of Intel Corporation nor the names of its
	40	* contributors may be used to endorse or promote products derived
	41	* from this software without specific prior written permission.
	42	*
	43	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	44	* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	45	* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	46	* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	47	* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	48	* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	49	* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	50	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	51	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	52	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	53	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	54	*/
	55	#ifndef _ISCI_PROBE_ROMS_H_
	56	#define _ISCI_PROBE_ROMS_H_
	57
	58	#ifdef __KERNEL__
	59	#include <linux/firmware.h>
	60	#include <linux/pci.h>
ce2b3261	61	#include "isci.h"
d044af17	62
e2f8db50 DW	63	#define SCIC_SDS_PARM_NO_SPEED 0
	64
	65	/* generation 1 (i.e. 1.5 Gb/s) */
	66	#define SCIC_SDS_PARM_GEN1_SPEED 1
	67
	68	/* generation 2 (i.e. 3.0 Gb/s) */
	69	#define SCIC_SDS_PARM_GEN2_SPEED 2
	70
	71	/* generation 3 (i.e. 6.0 Gb/s) */
	72	#define SCIC_SDS_PARM_GEN3_SPEED 3
	73	#define SCIC_SDS_PARM_MAX_SPEED SCIC_SDS_PARM_GEN3_SPEED
	74
	75	/* parameters that can be set by module parameters */
	76	struct scic_sds_user_parameters {
	77	struct sci_phy_user_params {
	78	/**
	79	* This field specifies the NOTIFY (ENABLE SPIN UP) primitive
	80	* insertion frequency for this phy index.
	81	*/
	82	u32 notify_enable_spin_up_insertion_frequency;
	83
	84	/**
	85	* This method specifies the number of transmitted DWORDs within which
	86	* to transmit a single ALIGN primitive. This value applies regardless
	87	* of what type of device is attached or connection state. A value of
	88	* 0 indicates that no ALIGN primitives will be inserted.
	89	*/
	90	u16 align_insertion_frequency;
	91
	92	/**
	93	* This method specifies the number of transmitted DWORDs within which
	94	* to transmit 2 ALIGN primitives. This applies for SAS connections
	95	* only. A minimum value of 3 is required for this field.
	96	*/
	97	u16 in_connection_align_insertion_frequency;
	98
	99	/**
	100	* This field indicates the maximum speed generation to be utilized
	101	* by phys in the supplied port.
	102	* - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
	103	* - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
	104	* - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
	105	*/
	106	u8 max_speed_generation;
	107
	108	} phys[SCI_MAX_PHYS];
	109
	110	/**
	111	* This field specifies the maximum number of direct attached devices
	112	* that can have power supplied to them simultaneously.
	113	*/
	114	u8 max_number_concurrent_device_spin_up;
	115
	116	/**
	117	* This field specifies the number of seconds to allow a phy to consume
	118	* power before yielding to another phy.
	119	*
	120	*/
	121	u8 phy_spin_up_delay_interval;
	122
	123	/**
	124	* These timer values specifies how long a link will remain open with no
	125	* activity in increments of a microsecond, it can be in increments of
	126	* 100 microseconds if the upper most bit is set.
127	*
128	*/
129	u16 stp_inactivity_timeout;
130	u16 ssp_inactivity_timeout;
131
132	/**
133	* These timer values specifies how long a link will remain open in increments
134	* of 100 microseconds.
135	*
136	*/
137	u16 stp_max_occupancy_timeout;
138	u16 ssp_max_occupancy_timeout;
139
140	/**
141	* This timer value specifies how long a link will remain open with no
142	* outbound traffic in increments of a microsecond.
143	*
144	*/
145	u8 no_outbound_task_timeout;
146
147	};
148
149	/* XXX kill this union */
150	union scic_user_parameters {
151	/**
152	* This field specifies the user parameters specific to the
153	* Storage Controller Unit (SCU) Driver Standard (SDS) version
154	* 1.
155	*/
156	struct scic_sds_user_parameters sds1;
157	};
158
159	#define SCIC_SDS_PARM_PHY_MASK_MIN 0x0
160	#define SCIC_SDS_PARM_PHY_MASK_MAX 0xF
161	#define MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT 4
162
163	struct scic_sds_oem_params;
164	int scic_oem_parameters_validate(struct scic_sds_oem_params *oem);
d044af17 DW	165
d044af17 DW	166	union scic_oem_parameters;
e2f8db50 DW	167	void scic_oem_parameters_get(struct scic_sds_controller *scic,
e2f8db50 DW	168	union scic_oem_parameters *oem);
d044af17	169
e2f8db50 DW	170	struct isci_orom;
	171	struct isci_orom isci_request_oprom(struct pci_dev pdev);
	172	enum sci_status isci_parse_oem_parameters(union scic_oem_parameters *oem,
	173	struct isci_orom *orom, int scu_index);
d044af17	174	struct isci_orom isci_request_firmware(struct pci_dev pdev, const struct firmware *fw);
8db37aab	175	struct isci_orom isci_get_efi_var(struct pci_dev pdev);
3b67c1f3 DW	176
	177	struct isci_oem_hdr {
	178	u8 sig[4];
	179	u8 rev_major;
	180	u8 rev_minor;
	181	u16 len;
	182	u8 checksum;
	183	u8 reserved1;
	184	u16 reserved2;
	185	} __attribute__ ((packed));
	186
d044af17 DW	187	#else
	188	#define SCI_MAX_PORTS 4
	189	#define SCI_MAX_PHYS 4
ca507b98	190	#define SCI_MAX_CONTROLLERS 2
d044af17 DW	191	#endif
	192
	193	#define ISCI_FW_NAME "isci/isci_firmware.bin"
	194
	195	#define ROMSIGNATURE 0xaa55
	196
3b67c1f3 DW	197	#define ISCI_OEM_SIG "$OEM"
3b67c1f3 DW	198	#define ISCI_OEM_SIG_SIZE 4
d044af17 DW	199	#define ISCI_ROM_SIG "ISCUOEMB"
	200	#define ISCI_ROM_SIG_SIZE 8
	201
ca507b98 DJ	202	#define ISCI_EFI_VENDOR_GUID \
	203	EFI_GUID(0x193dfefa, 0xa445, 0x4302, 0x99, 0xd8, 0xef, 0x3a, 0xad, \
	204	0x1a, 0x04, 0xc6)
d044af17	205	#define ISCI_EFI_ATTRIBUTES 0
2e8320f7	206	#define ISCI_EFI_VAR_NAME "RstScuO"
d044af17	207
07373a5c HD	208	/* Allowed PORT configuration modes APC Automatic PORT configuration mode is
	209	* defined by the OEM configuration parameters providing no PHY_MASK parameters
	210	* for any PORT. i.e. There are no phys assigned to any of the ports at start.
	211	* MPC Manual PORT configuration mode is defined by the OEM configuration
	212	* parameters providing a PHY_MASK value for any PORT. It is assumed that any
	213	* PORT with no PHY_MASK is an invalid port and not all PHYs must be assigned.
	214	* A PORT_PHY mask that assigns just a single PHY to a port and no other PHYs
	215	* being assigned is sufficient to declare manual PORT configuration.
	216	*/
de728b7d	217	enum scic_port_configuration_mode {
4eefd251 DW	218	SCIC_PORT_MANUAL_CONFIGURATION_MODE = 0,
4eefd251 DW	219	SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 1
07373a5c HD	220	};
07373a5c HD	221
d044af17 DW	222	struct sci_bios_oem_param_block_hdr {
	223	uint8_t signature[ISCI_ROM_SIG_SIZE];
	224	uint16_t total_block_length;
	225	uint8_t hdr_length;
	226	uint8_t version;
	227	uint8_t preboot_source;
	228	uint8_t num_elements;
f22be5d8	229	uint16_t element_length;
d044af17 DW	230	uint8_t reserved[8];
	231	} __attribute__ ((packed));
	232
	233	struct scic_sds_oem_params {
	234	struct {
	235	uint8_t mode_type;
	236	uint8_t max_concurrent_dev_spin_up;
	237	uint8_t do_enable_ssc;
	238	uint8_t reserved;
	239	} controller;
	240
	241	struct {
	242	uint8_t phy_mask;
	243	} ports[SCI_MAX_PORTS];
	244
	245	struct sci_phy_oem_params {
	246	struct {
	247	uint32_t high;
	248	uint32_t low;
	249	} sas_address;
	250
	251	uint32_t afe_tx_amp_control0;
	252	uint32_t afe_tx_amp_control1;
	253	uint32_t afe_tx_amp_control2;
	254	uint32_t afe_tx_amp_control3;
	255	} phys[SCI_MAX_PHYS];
	256	} __attribute__ ((packed));
	257
e2f8db50 DW	258	/* XXX kill this union */
	259	union scic_oem_parameters {
	260	/**
	261	* This field specifies the OEM parameters specific to the
	262	* Storage Controller Unit (SCU) Driver Standard (SDS) version
	263	* 1.
	264	*/
	265	struct scic_sds_oem_params sds1;
	266	};
	267
d044af17 DW	268	struct isci_orom {
d044af17 DW	269	struct sci_bios_oem_param_block_hdr hdr;
ca507b98	270	struct scic_sds_oem_params ctrl[SCI_MAX_CONTROLLERS];
d044af17 DW	271	} __attribute__ ((packed));
	272
	273	#endif