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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
51 | #include <scsi/scsi.h> | |
52 | #include "scsi.h" | |
53 | #include "scsi_priv.h" | |
54 | #include <scsi/scsi_host.h> | |
55 | #include <linux/libata.h> | |
56 | #include <asm/io.h> | |
57 | #include <asm/semaphore.h> | |
58 | #include <asm/byteorder.h> | |
59 | ||
60 | #include "libata.h" | |
61 | ||
62 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
63 | unsigned long tmout_pat, | |
64 | unsigned long tmout); | |
65 | static void ata_set_mode(struct ata_port *ap); | |
66 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | |
67 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift); | |
68 | static int fgb(u32 bitmap); | |
69 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
70 | u8 *xfer_mode_out, | |
71 | unsigned int *xfer_shift_out); | |
72 | static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat); | |
73 | static void __ata_qc_complete(struct ata_queued_cmd *qc); | |
74 | ||
75 | static unsigned int ata_unique_id = 1; | |
76 | static struct workqueue_struct *ata_wq; | |
77 | ||
1623c81e JG |
78 | int atapi_enabled = 0; |
79 | module_param(atapi_enabled, int, 0444); | |
80 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
81 | ||
1da177e4 LT |
82 | MODULE_AUTHOR("Jeff Garzik"); |
83 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
84 | MODULE_LICENSE("GPL"); | |
85 | MODULE_VERSION(DRV_VERSION); | |
86 | ||
87 | /** | |
88 | * ata_tf_load - send taskfile registers to host controller | |
89 | * @ap: Port to which output is sent | |
90 | * @tf: ATA taskfile register set | |
91 | * | |
92 | * Outputs ATA taskfile to standard ATA host controller. | |
93 | * | |
94 | * LOCKING: | |
95 | * Inherited from caller. | |
96 | */ | |
97 | ||
98 | static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
99 | { | |
100 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
101 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
102 | ||
103 | if (tf->ctl != ap->last_ctl) { | |
104 | outb(tf->ctl, ioaddr->ctl_addr); | |
105 | ap->last_ctl = tf->ctl; | |
106 | ata_wait_idle(ap); | |
107 | } | |
108 | ||
109 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
110 | outb(tf->hob_feature, ioaddr->feature_addr); | |
111 | outb(tf->hob_nsect, ioaddr->nsect_addr); | |
112 | outb(tf->hob_lbal, ioaddr->lbal_addr); | |
113 | outb(tf->hob_lbam, ioaddr->lbam_addr); | |
114 | outb(tf->hob_lbah, ioaddr->lbah_addr); | |
115 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
116 | tf->hob_feature, | |
117 | tf->hob_nsect, | |
118 | tf->hob_lbal, | |
119 | tf->hob_lbam, | |
120 | tf->hob_lbah); | |
121 | } | |
122 | ||
123 | if (is_addr) { | |
124 | outb(tf->feature, ioaddr->feature_addr); | |
125 | outb(tf->nsect, ioaddr->nsect_addr); | |
126 | outb(tf->lbal, ioaddr->lbal_addr); | |
127 | outb(tf->lbam, ioaddr->lbam_addr); | |
128 | outb(tf->lbah, ioaddr->lbah_addr); | |
129 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
130 | tf->feature, | |
131 | tf->nsect, | |
132 | tf->lbal, | |
133 | tf->lbam, | |
134 | tf->lbah); | |
135 | } | |
136 | ||
137 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
138 | outb(tf->device, ioaddr->device_addr); | |
139 | VPRINTK("device 0x%X\n", tf->device); | |
140 | } | |
141 | ||
142 | ata_wait_idle(ap); | |
143 | } | |
144 | ||
145 | /** | |
146 | * ata_tf_load_mmio - send taskfile registers to host controller | |
147 | * @ap: Port to which output is sent | |
148 | * @tf: ATA taskfile register set | |
149 | * | |
150 | * Outputs ATA taskfile to standard ATA host controller using MMIO. | |
151 | * | |
152 | * LOCKING: | |
153 | * Inherited from caller. | |
154 | */ | |
155 | ||
156 | static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
157 | { | |
158 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
159 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
160 | ||
161 | if (tf->ctl != ap->last_ctl) { | |
162 | writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
163 | ap->last_ctl = tf->ctl; | |
164 | ata_wait_idle(ap); | |
165 | } | |
166 | ||
167 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
168 | writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr); | |
169 | writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr); | |
170 | writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr); | |
171 | writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr); | |
172 | writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr); | |
173 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
174 | tf->hob_feature, | |
175 | tf->hob_nsect, | |
176 | tf->hob_lbal, | |
177 | tf->hob_lbam, | |
178 | tf->hob_lbah); | |
179 | } | |
180 | ||
181 | if (is_addr) { | |
182 | writeb(tf->feature, (void __iomem *) ioaddr->feature_addr); | |
183 | writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr); | |
184 | writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr); | |
185 | writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr); | |
186 | writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr); | |
187 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
188 | tf->feature, | |
189 | tf->nsect, | |
190 | tf->lbal, | |
191 | tf->lbam, | |
192 | tf->lbah); | |
193 | } | |
194 | ||
195 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
196 | writeb(tf->device, (void __iomem *) ioaddr->device_addr); | |
197 | VPRINTK("device 0x%X\n", tf->device); | |
198 | } | |
199 | ||
200 | ata_wait_idle(ap); | |
201 | } | |
202 | ||
0baab86b EF |
203 | |
204 | /** | |
205 | * ata_tf_load - send taskfile registers to host controller | |
206 | * @ap: Port to which output is sent | |
207 | * @tf: ATA taskfile register set | |
208 | * | |
209 | * Outputs ATA taskfile to standard ATA host controller using MMIO | |
210 | * or PIO as indicated by the ATA_FLAG_MMIO flag. | |
211 | * Writes the control, feature, nsect, lbal, lbam, and lbah registers. | |
212 | * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect, | |
213 | * hob_lbal, hob_lbam, and hob_lbah. | |
214 | * | |
215 | * This function waits for idle (!BUSY and !DRQ) after writing | |
216 | * registers. If the control register has a new value, this | |
217 | * function also waits for idle after writing control and before | |
218 | * writing the remaining registers. | |
219 | * | |
220 | * May be used as the tf_load() entry in ata_port_operations. | |
221 | * | |
222 | * LOCKING: | |
223 | * Inherited from caller. | |
224 | */ | |
1da177e4 LT |
225 | void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf) |
226 | { | |
227 | if (ap->flags & ATA_FLAG_MMIO) | |
228 | ata_tf_load_mmio(ap, tf); | |
229 | else | |
230 | ata_tf_load_pio(ap, tf); | |
231 | } | |
232 | ||
233 | /** | |
0baab86b | 234 | * ata_exec_command_pio - issue ATA command to host controller |
1da177e4 LT |
235 | * @ap: port to which command is being issued |
236 | * @tf: ATA taskfile register set | |
237 | * | |
0baab86b | 238 | * Issues PIO write to ATA command register, with proper |
1da177e4 LT |
239 | * synchronization with interrupt handler / other threads. |
240 | * | |
241 | * LOCKING: | |
242 | * spin_lock_irqsave(host_set lock) | |
243 | */ | |
244 | ||
245 | static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
246 | { | |
247 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
248 | ||
249 | outb(tf->command, ap->ioaddr.command_addr); | |
250 | ata_pause(ap); | |
251 | } | |
252 | ||
253 | ||
254 | /** | |
255 | * ata_exec_command_mmio - issue ATA command to host controller | |
256 | * @ap: port to which command is being issued | |
257 | * @tf: ATA taskfile register set | |
258 | * | |
259 | * Issues MMIO write to ATA command register, with proper | |
260 | * synchronization with interrupt handler / other threads. | |
261 | * | |
262 | * LOCKING: | |
263 | * spin_lock_irqsave(host_set lock) | |
264 | */ | |
265 | ||
266 | static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
267 | { | |
268 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
269 | ||
270 | writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr); | |
271 | ata_pause(ap); | |
272 | } | |
273 | ||
0baab86b EF |
274 | |
275 | /** | |
276 | * ata_exec_command - issue ATA command to host controller | |
277 | * @ap: port to which command is being issued | |
278 | * @tf: ATA taskfile register set | |
279 | * | |
280 | * Issues PIO/MMIO write to ATA command register, with proper | |
281 | * synchronization with interrupt handler / other threads. | |
282 | * | |
283 | * LOCKING: | |
284 | * spin_lock_irqsave(host_set lock) | |
285 | */ | |
1da177e4 LT |
286 | void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf) |
287 | { | |
288 | if (ap->flags & ATA_FLAG_MMIO) | |
289 | ata_exec_command_mmio(ap, tf); | |
290 | else | |
291 | ata_exec_command_pio(ap, tf); | |
292 | } | |
293 | ||
294 | /** | |
295 | * ata_exec - issue ATA command to host controller | |
296 | * @ap: port to which command is being issued | |
297 | * @tf: ATA taskfile register set | |
298 | * | |
299 | * Issues PIO/MMIO write to ATA command register, with proper | |
300 | * synchronization with interrupt handler / other threads. | |
301 | * | |
302 | * LOCKING: | |
303 | * Obtains host_set lock. | |
304 | */ | |
305 | ||
306 | static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf) | |
307 | { | |
308 | unsigned long flags; | |
309 | ||
310 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
311 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
312 | ap->ops->exec_command(ap, tf); | |
313 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
314 | } | |
315 | ||
316 | /** | |
317 | * ata_tf_to_host - issue ATA taskfile to host controller | |
318 | * @ap: port to which command is being issued | |
319 | * @tf: ATA taskfile register set | |
320 | * | |
321 | * Issues ATA taskfile register set to ATA host controller, | |
322 | * with proper synchronization with interrupt handler and | |
323 | * other threads. | |
324 | * | |
325 | * LOCKING: | |
326 | * Obtains host_set lock. | |
327 | */ | |
328 | ||
329 | static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf) | |
330 | { | |
331 | ap->ops->tf_load(ap, tf); | |
332 | ||
333 | ata_exec(ap, tf); | |
334 | } | |
335 | ||
336 | /** | |
337 | * ata_tf_to_host_nolock - issue ATA taskfile to host controller | |
338 | * @ap: port to which command is being issued | |
339 | * @tf: ATA taskfile register set | |
340 | * | |
341 | * Issues ATA taskfile register set to ATA host controller, | |
342 | * with proper synchronization with interrupt handler and | |
343 | * other threads. | |
344 | * | |
345 | * LOCKING: | |
346 | * spin_lock_irqsave(host_set lock) | |
347 | */ | |
348 | ||
349 | void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf) | |
350 | { | |
351 | ap->ops->tf_load(ap, tf); | |
352 | ap->ops->exec_command(ap, tf); | |
353 | } | |
354 | ||
355 | /** | |
0baab86b | 356 | * ata_tf_read_pio - input device's ATA taskfile shadow registers |
1da177e4 LT |
357 | * @ap: Port from which input is read |
358 | * @tf: ATA taskfile register set for storing input | |
359 | * | |
360 | * Reads ATA taskfile registers for currently-selected device | |
361 | * into @tf. | |
362 | * | |
363 | * LOCKING: | |
364 | * Inherited from caller. | |
365 | */ | |
366 | ||
367 | static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
368 | { | |
369 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
370 | ||
371 | tf->nsect = inb(ioaddr->nsect_addr); | |
372 | tf->lbal = inb(ioaddr->lbal_addr); | |
373 | tf->lbam = inb(ioaddr->lbam_addr); | |
374 | tf->lbah = inb(ioaddr->lbah_addr); | |
375 | tf->device = inb(ioaddr->device_addr); | |
376 | ||
377 | if (tf->flags & ATA_TFLAG_LBA48) { | |
378 | outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); | |
379 | tf->hob_feature = inb(ioaddr->error_addr); | |
380 | tf->hob_nsect = inb(ioaddr->nsect_addr); | |
381 | tf->hob_lbal = inb(ioaddr->lbal_addr); | |
382 | tf->hob_lbam = inb(ioaddr->lbam_addr); | |
383 | tf->hob_lbah = inb(ioaddr->lbah_addr); | |
384 | } | |
385 | } | |
386 | ||
387 | /** | |
388 | * ata_tf_read_mmio - input device's ATA taskfile shadow registers | |
389 | * @ap: Port from which input is read | |
390 | * @tf: ATA taskfile register set for storing input | |
391 | * | |
392 | * Reads ATA taskfile registers for currently-selected device | |
393 | * into @tf via MMIO. | |
394 | * | |
395 | * LOCKING: | |
396 | * Inherited from caller. | |
397 | */ | |
398 | ||
399 | static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
400 | { | |
401 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
402 | ||
403 | tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
404 | tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
405 | tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
406 | tf->lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
407 | tf->device = readb((void __iomem *)ioaddr->device_addr); | |
408 | ||
409 | if (tf->flags & ATA_TFLAG_LBA48) { | |
410 | writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr); | |
411 | tf->hob_feature = readb((void __iomem *)ioaddr->error_addr); | |
412 | tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
413 | tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
414 | tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
415 | tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
416 | } | |
417 | } | |
418 | ||
0baab86b EF |
419 | |
420 | /** | |
421 | * ata_tf_read - input device's ATA taskfile shadow registers | |
422 | * @ap: Port from which input is read | |
423 | * @tf: ATA taskfile register set for storing input | |
424 | * | |
425 | * Reads ATA taskfile registers for currently-selected device | |
426 | * into @tf. | |
427 | * | |
428 | * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48 | |
429 | * is set, also reads the hob registers. | |
430 | * | |
431 | * May be used as the tf_read() entry in ata_port_operations. | |
432 | * | |
433 | * LOCKING: | |
434 | * Inherited from caller. | |
435 | */ | |
1da177e4 LT |
436 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
437 | { | |
438 | if (ap->flags & ATA_FLAG_MMIO) | |
439 | ata_tf_read_mmio(ap, tf); | |
440 | else | |
441 | ata_tf_read_pio(ap, tf); | |
442 | } | |
443 | ||
444 | /** | |
445 | * ata_check_status_pio - Read device status reg & clear interrupt | |
446 | * @ap: port where the device is | |
447 | * | |
448 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 449 | * and return its value. This also clears pending interrupts |
1da177e4 LT |
450 | * from this device |
451 | * | |
452 | * LOCKING: | |
453 | * Inherited from caller. | |
454 | */ | |
455 | static u8 ata_check_status_pio(struct ata_port *ap) | |
456 | { | |
457 | return inb(ap->ioaddr.status_addr); | |
458 | } | |
459 | ||
460 | /** | |
461 | * ata_check_status_mmio - Read device status reg & clear interrupt | |
462 | * @ap: port where the device is | |
463 | * | |
464 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 465 | * via MMIO and return its value. This also clears pending interrupts |
1da177e4 LT |
466 | * from this device |
467 | * | |
468 | * LOCKING: | |
469 | * Inherited from caller. | |
470 | */ | |
471 | static u8 ata_check_status_mmio(struct ata_port *ap) | |
472 | { | |
473 | return readb((void __iomem *) ap->ioaddr.status_addr); | |
474 | } | |
475 | ||
0baab86b EF |
476 | |
477 | /** | |
478 | * ata_check_status - Read device status reg & clear interrupt | |
479 | * @ap: port where the device is | |
480 | * | |
481 | * Reads ATA taskfile status register for currently-selected device | |
482 | * and return its value. This also clears pending interrupts | |
483 | * from this device | |
484 | * | |
485 | * May be used as the check_status() entry in ata_port_operations. | |
486 | * | |
487 | * LOCKING: | |
488 | * Inherited from caller. | |
489 | */ | |
1da177e4 LT |
490 | u8 ata_check_status(struct ata_port *ap) |
491 | { | |
492 | if (ap->flags & ATA_FLAG_MMIO) | |
493 | return ata_check_status_mmio(ap); | |
494 | return ata_check_status_pio(ap); | |
495 | } | |
496 | ||
0baab86b EF |
497 | |
498 | /** | |
499 | * ata_altstatus - Read device alternate status reg | |
500 | * @ap: port where the device is | |
501 | * | |
502 | * Reads ATA taskfile alternate status register for | |
503 | * currently-selected device and return its value. | |
504 | * | |
505 | * Note: may NOT be used as the check_altstatus() entry in | |
506 | * ata_port_operations. | |
507 | * | |
508 | * LOCKING: | |
509 | * Inherited from caller. | |
510 | */ | |
1da177e4 LT |
511 | u8 ata_altstatus(struct ata_port *ap) |
512 | { | |
513 | if (ap->ops->check_altstatus) | |
514 | return ap->ops->check_altstatus(ap); | |
515 | ||
516 | if (ap->flags & ATA_FLAG_MMIO) | |
517 | return readb((void __iomem *)ap->ioaddr.altstatus_addr); | |
518 | return inb(ap->ioaddr.altstatus_addr); | |
519 | } | |
520 | ||
0baab86b EF |
521 | |
522 | /** | |
523 | * ata_chk_err - Read device error reg | |
524 | * @ap: port where the device is | |
525 | * | |
526 | * Reads ATA taskfile error register for | |
527 | * currently-selected device and return its value. | |
528 | * | |
529 | * Note: may NOT be used as the check_err() entry in | |
530 | * ata_port_operations. | |
531 | * | |
532 | * LOCKING: | |
533 | * Inherited from caller. | |
534 | */ | |
1da177e4 LT |
535 | u8 ata_chk_err(struct ata_port *ap) |
536 | { | |
537 | if (ap->ops->check_err) | |
538 | return ap->ops->check_err(ap); | |
539 | ||
540 | if (ap->flags & ATA_FLAG_MMIO) { | |
541 | return readb((void __iomem *) ap->ioaddr.error_addr); | |
542 | } | |
543 | return inb(ap->ioaddr.error_addr); | |
544 | } | |
545 | ||
546 | /** | |
547 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
548 | * @tf: Taskfile to convert | |
549 | * @fis: Buffer into which data will output | |
550 | * @pmp: Port multiplier port | |
551 | * | |
552 | * Converts a standard ATA taskfile to a Serial ATA | |
553 | * FIS structure (Register - Host to Device). | |
554 | * | |
555 | * LOCKING: | |
556 | * Inherited from caller. | |
557 | */ | |
558 | ||
559 | void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp) | |
560 | { | |
561 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
562 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
563 | bit 7 indicates Command FIS */ | |
564 | fis[2] = tf->command; | |
565 | fis[3] = tf->feature; | |
566 | ||
567 | fis[4] = tf->lbal; | |
568 | fis[5] = tf->lbam; | |
569 | fis[6] = tf->lbah; | |
570 | fis[7] = tf->device; | |
571 | ||
572 | fis[8] = tf->hob_lbal; | |
573 | fis[9] = tf->hob_lbam; | |
574 | fis[10] = tf->hob_lbah; | |
575 | fis[11] = tf->hob_feature; | |
576 | ||
577 | fis[12] = tf->nsect; | |
578 | fis[13] = tf->hob_nsect; | |
579 | fis[14] = 0; | |
580 | fis[15] = tf->ctl; | |
581 | ||
582 | fis[16] = 0; | |
583 | fis[17] = 0; | |
584 | fis[18] = 0; | |
585 | fis[19] = 0; | |
586 | } | |
587 | ||
588 | /** | |
589 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
590 | * @fis: Buffer from which data will be input | |
591 | * @tf: Taskfile to output | |
592 | * | |
593 | * Converts a standard ATA taskfile to a Serial ATA | |
594 | * FIS structure (Register - Host to Device). | |
595 | * | |
596 | * LOCKING: | |
597 | * Inherited from caller. | |
598 | */ | |
599 | ||
600 | void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf) | |
601 | { | |
602 | tf->command = fis[2]; /* status */ | |
603 | tf->feature = fis[3]; /* error */ | |
604 | ||
605 | tf->lbal = fis[4]; | |
606 | tf->lbam = fis[5]; | |
607 | tf->lbah = fis[6]; | |
608 | tf->device = fis[7]; | |
609 | ||
610 | tf->hob_lbal = fis[8]; | |
611 | tf->hob_lbam = fis[9]; | |
612 | tf->hob_lbah = fis[10]; | |
613 | ||
614 | tf->nsect = fis[12]; | |
615 | tf->hob_nsect = fis[13]; | |
616 | } | |
617 | ||
618 | /** | |
619 | * ata_prot_to_cmd - determine which read/write opcodes to use | |
620 | * @protocol: ATA_PROT_xxx taskfile protocol | |
621 | * @lba48: true is lba48 is present | |
622 | * | |
623 | * Given necessary input, determine which read/write commands | |
624 | * to use to transfer data. | |
625 | * | |
626 | * LOCKING: | |
627 | * None. | |
628 | */ | |
629 | static int ata_prot_to_cmd(int protocol, int lba48) | |
630 | { | |
631 | int rcmd = 0, wcmd = 0; | |
632 | ||
633 | switch (protocol) { | |
634 | case ATA_PROT_PIO: | |
635 | if (lba48) { | |
636 | rcmd = ATA_CMD_PIO_READ_EXT; | |
637 | wcmd = ATA_CMD_PIO_WRITE_EXT; | |
638 | } else { | |
639 | rcmd = ATA_CMD_PIO_READ; | |
640 | wcmd = ATA_CMD_PIO_WRITE; | |
641 | } | |
642 | break; | |
643 | ||
644 | case ATA_PROT_DMA: | |
645 | if (lba48) { | |
646 | rcmd = ATA_CMD_READ_EXT; | |
647 | wcmd = ATA_CMD_WRITE_EXT; | |
648 | } else { | |
649 | rcmd = ATA_CMD_READ; | |
650 | wcmd = ATA_CMD_WRITE; | |
651 | } | |
652 | break; | |
653 | ||
654 | default: | |
655 | return -1; | |
656 | } | |
657 | ||
658 | return rcmd | (wcmd << 8); | |
659 | } | |
660 | ||
661 | /** | |
662 | * ata_dev_set_protocol - set taskfile protocol and r/w commands | |
663 | * @dev: device to examine and configure | |
664 | * | |
665 | * Examine the device configuration, after we have | |
666 | * read the identify-device page and configured the | |
667 | * data transfer mode. Set internal state related to | |
668 | * the ATA taskfile protocol (pio, pio mult, dma, etc.) | |
669 | * and calculate the proper read/write commands to use. | |
670 | * | |
671 | * LOCKING: | |
672 | * caller. | |
673 | */ | |
674 | static void ata_dev_set_protocol(struct ata_device *dev) | |
675 | { | |
676 | int pio = (dev->flags & ATA_DFLAG_PIO); | |
677 | int lba48 = (dev->flags & ATA_DFLAG_LBA48); | |
678 | int proto, cmd; | |
679 | ||
680 | if (pio) | |
681 | proto = dev->xfer_protocol = ATA_PROT_PIO; | |
682 | else | |
683 | proto = dev->xfer_protocol = ATA_PROT_DMA; | |
684 | ||
685 | cmd = ata_prot_to_cmd(proto, lba48); | |
686 | if (cmd < 0) | |
687 | BUG(); | |
688 | ||
689 | dev->read_cmd = cmd & 0xff; | |
690 | dev->write_cmd = (cmd >> 8) & 0xff; | |
691 | } | |
692 | ||
693 | static const char * xfer_mode_str[] = { | |
694 | "UDMA/16", | |
695 | "UDMA/25", | |
696 | "UDMA/33", | |
697 | "UDMA/44", | |
698 | "UDMA/66", | |
699 | "UDMA/100", | |
700 | "UDMA/133", | |
701 | "UDMA7", | |
702 | "MWDMA0", | |
703 | "MWDMA1", | |
704 | "MWDMA2", | |
705 | "PIO0", | |
706 | "PIO1", | |
707 | "PIO2", | |
708 | "PIO3", | |
709 | "PIO4", | |
710 | }; | |
711 | ||
712 | /** | |
713 | * ata_udma_string - convert UDMA bit offset to string | |
714 | * @mask: mask of bits supported; only highest bit counts. | |
715 | * | |
716 | * Determine string which represents the highest speed | |
717 | * (highest bit in @udma_mask). | |
718 | * | |
719 | * LOCKING: | |
720 | * None. | |
721 | * | |
722 | * RETURNS: | |
723 | * Constant C string representing highest speed listed in | |
724 | * @udma_mask, or the constant C string "<n/a>". | |
725 | */ | |
726 | ||
727 | static const char *ata_mode_string(unsigned int mask) | |
728 | { | |
729 | int i; | |
730 | ||
731 | for (i = 7; i >= 0; i--) | |
732 | if (mask & (1 << i)) | |
733 | goto out; | |
734 | for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--) | |
735 | if (mask & (1 << i)) | |
736 | goto out; | |
737 | for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--) | |
738 | if (mask & (1 << i)) | |
739 | goto out; | |
740 | ||
741 | return "<n/a>"; | |
742 | ||
743 | out: | |
744 | return xfer_mode_str[i]; | |
745 | } | |
746 | ||
747 | /** | |
748 | * ata_pio_devchk - PATA device presence detection | |
749 | * @ap: ATA channel to examine | |
750 | * @device: Device to examine (starting at zero) | |
751 | * | |
752 | * This technique was originally described in | |
753 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
754 | * later found its way into the ATA/ATAPI spec. | |
755 | * | |
756 | * Write a pattern to the ATA shadow registers, | |
757 | * and if a device is present, it will respond by | |
758 | * correctly storing and echoing back the | |
759 | * ATA shadow register contents. | |
760 | * | |
761 | * LOCKING: | |
762 | * caller. | |
763 | */ | |
764 | ||
765 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
766 | unsigned int device) | |
767 | { | |
768 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
769 | u8 nsect, lbal; | |
770 | ||
771 | ap->ops->dev_select(ap, device); | |
772 | ||
773 | outb(0x55, ioaddr->nsect_addr); | |
774 | outb(0xaa, ioaddr->lbal_addr); | |
775 | ||
776 | outb(0xaa, ioaddr->nsect_addr); | |
777 | outb(0x55, ioaddr->lbal_addr); | |
778 | ||
779 | outb(0x55, ioaddr->nsect_addr); | |
780 | outb(0xaa, ioaddr->lbal_addr); | |
781 | ||
782 | nsect = inb(ioaddr->nsect_addr); | |
783 | lbal = inb(ioaddr->lbal_addr); | |
784 | ||
785 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
786 | return 1; /* we found a device */ | |
787 | ||
788 | return 0; /* nothing found */ | |
789 | } | |
790 | ||
791 | /** | |
792 | * ata_mmio_devchk - PATA device presence detection | |
793 | * @ap: ATA channel to examine | |
794 | * @device: Device to examine (starting at zero) | |
795 | * | |
796 | * This technique was originally described in | |
797 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
798 | * later found its way into the ATA/ATAPI spec. | |
799 | * | |
800 | * Write a pattern to the ATA shadow registers, | |
801 | * and if a device is present, it will respond by | |
802 | * correctly storing and echoing back the | |
803 | * ATA shadow register contents. | |
804 | * | |
805 | * LOCKING: | |
806 | * caller. | |
807 | */ | |
808 | ||
809 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
810 | unsigned int device) | |
811 | { | |
812 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
813 | u8 nsect, lbal; | |
814 | ||
815 | ap->ops->dev_select(ap, device); | |
816 | ||
817 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
818 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
819 | ||
820 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
821 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
822 | ||
823 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
824 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
825 | ||
826 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
827 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
828 | ||
829 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
830 | return 1; /* we found a device */ | |
831 | ||
832 | return 0; /* nothing found */ | |
833 | } | |
834 | ||
835 | /** | |
836 | * ata_devchk - PATA device presence detection | |
837 | * @ap: ATA channel to examine | |
838 | * @device: Device to examine (starting at zero) | |
839 | * | |
840 | * Dispatch ATA device presence detection, depending | |
841 | * on whether we are using PIO or MMIO to talk to the | |
842 | * ATA shadow registers. | |
843 | * | |
844 | * LOCKING: | |
845 | * caller. | |
846 | */ | |
847 | ||
848 | static unsigned int ata_devchk(struct ata_port *ap, | |
849 | unsigned int device) | |
850 | { | |
851 | if (ap->flags & ATA_FLAG_MMIO) | |
852 | return ata_mmio_devchk(ap, device); | |
853 | return ata_pio_devchk(ap, device); | |
854 | } | |
855 | ||
856 | /** | |
857 | * ata_dev_classify - determine device type based on ATA-spec signature | |
858 | * @tf: ATA taskfile register set for device to be identified | |
859 | * | |
860 | * Determine from taskfile register contents whether a device is | |
861 | * ATA or ATAPI, as per "Signature and persistence" section | |
862 | * of ATA/PI spec (volume 1, sect 5.14). | |
863 | * | |
864 | * LOCKING: | |
865 | * None. | |
866 | * | |
867 | * RETURNS: | |
868 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
869 | * the event of failure. | |
870 | */ | |
871 | ||
872 | unsigned int ata_dev_classify(struct ata_taskfile *tf) | |
873 | { | |
874 | /* Apple's open source Darwin code hints that some devices only | |
875 | * put a proper signature into the LBA mid/high registers, | |
876 | * So, we only check those. It's sufficient for uniqueness. | |
877 | */ | |
878 | ||
879 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
880 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
881 | DPRINTK("found ATA device by sig\n"); | |
882 | return ATA_DEV_ATA; | |
883 | } | |
884 | ||
885 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
886 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
887 | DPRINTK("found ATAPI device by sig\n"); | |
888 | return ATA_DEV_ATAPI; | |
889 | } | |
890 | ||
891 | DPRINTK("unknown device\n"); | |
892 | return ATA_DEV_UNKNOWN; | |
893 | } | |
894 | ||
895 | /** | |
896 | * ata_dev_try_classify - Parse returned ATA device signature | |
897 | * @ap: ATA channel to examine | |
898 | * @device: Device to examine (starting at zero) | |
899 | * | |
900 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
901 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
902 | * shadow registers, indicating the results of device detection | |
903 | * and diagnostics. | |
904 | * | |
905 | * Select the ATA device, and read the values from the ATA shadow | |
906 | * registers. Then parse according to the Error register value, | |
907 | * and the spec-defined values examined by ata_dev_classify(). | |
908 | * | |
909 | * LOCKING: | |
910 | * caller. | |
911 | */ | |
912 | ||
913 | static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device) | |
914 | { | |
915 | struct ata_device *dev = &ap->device[device]; | |
916 | struct ata_taskfile tf; | |
917 | unsigned int class; | |
918 | u8 err; | |
919 | ||
920 | ap->ops->dev_select(ap, device); | |
921 | ||
922 | memset(&tf, 0, sizeof(tf)); | |
923 | ||
924 | err = ata_chk_err(ap); | |
925 | ap->ops->tf_read(ap, &tf); | |
926 | ||
927 | dev->class = ATA_DEV_NONE; | |
928 | ||
929 | /* see if device passed diags */ | |
930 | if (err == 1) | |
931 | /* do nothing */ ; | |
932 | else if ((device == 0) && (err == 0x81)) | |
933 | /* do nothing */ ; | |
934 | else | |
935 | return err; | |
936 | ||
937 | /* determine if device if ATA or ATAPI */ | |
938 | class = ata_dev_classify(&tf); | |
939 | if (class == ATA_DEV_UNKNOWN) | |
940 | return err; | |
941 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
942 | return err; | |
943 | ||
944 | dev->class = class; | |
945 | ||
946 | return err; | |
947 | } | |
948 | ||
949 | /** | |
950 | * ata_dev_id_string - Convert IDENTIFY DEVICE page into string | |
951 | * @id: IDENTIFY DEVICE results we will examine | |
952 | * @s: string into which data is output | |
953 | * @ofs: offset into identify device page | |
954 | * @len: length of string to return. must be an even number. | |
955 | * | |
956 | * The strings in the IDENTIFY DEVICE page are broken up into | |
957 | * 16-bit chunks. Run through the string, and output each | |
958 | * 8-bit chunk linearly, regardless of platform. | |
959 | * | |
960 | * LOCKING: | |
961 | * caller. | |
962 | */ | |
963 | ||
964 | void ata_dev_id_string(u16 *id, unsigned char *s, | |
965 | unsigned int ofs, unsigned int len) | |
966 | { | |
967 | unsigned int c; | |
968 | ||
969 | while (len > 0) { | |
970 | c = id[ofs] >> 8; | |
971 | *s = c; | |
972 | s++; | |
973 | ||
974 | c = id[ofs] & 0xff; | |
975 | *s = c; | |
976 | s++; | |
977 | ||
978 | ofs++; | |
979 | len -= 2; | |
980 | } | |
981 | } | |
982 | ||
0baab86b EF |
983 | |
984 | /** | |
985 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
986 | * @ap: ATA channel to manipulate | |
987 | * @device: ATA device (numbered from zero) to select | |
988 | * | |
989 | * This function performs no actual function. | |
990 | * | |
991 | * May be used as the dev_select() entry in ata_port_operations. | |
992 | * | |
993 | * LOCKING: | |
994 | * caller. | |
995 | */ | |
1da177e4 LT |
996 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
997 | { | |
998 | } | |
999 | ||
0baab86b | 1000 | |
1da177e4 LT |
1001 | /** |
1002 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
1003 | * @ap: ATA channel to manipulate | |
1004 | * @device: ATA device (numbered from zero) to select | |
1005 | * | |
1006 | * Use the method defined in the ATA specification to | |
1007 | * make either device 0, or device 1, active on the | |
0baab86b EF |
1008 | * ATA channel. Works with both PIO and MMIO. |
1009 | * | |
1010 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
1011 | * |
1012 | * LOCKING: | |
1013 | * caller. | |
1014 | */ | |
1015 | ||
1016 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
1017 | { | |
1018 | u8 tmp; | |
1019 | ||
1020 | if (device == 0) | |
1021 | tmp = ATA_DEVICE_OBS; | |
1022 | else | |
1023 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
1024 | ||
1025 | if (ap->flags & ATA_FLAG_MMIO) { | |
1026 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
1027 | } else { | |
1028 | outb(tmp, ap->ioaddr.device_addr); | |
1029 | } | |
1030 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
1031 | } | |
1032 | ||
1033 | /** | |
1034 | * ata_dev_select - Select device 0/1 on ATA bus | |
1035 | * @ap: ATA channel to manipulate | |
1036 | * @device: ATA device (numbered from zero) to select | |
1037 | * @wait: non-zero to wait for Status register BSY bit to clear | |
1038 | * @can_sleep: non-zero if context allows sleeping | |
1039 | * | |
1040 | * Use the method defined in the ATA specification to | |
1041 | * make either device 0, or device 1, active on the | |
1042 | * ATA channel. | |
1043 | * | |
1044 | * This is a high-level version of ata_std_dev_select(), | |
1045 | * which additionally provides the services of inserting | |
1046 | * the proper pauses and status polling, where needed. | |
1047 | * | |
1048 | * LOCKING: | |
1049 | * caller. | |
1050 | */ | |
1051 | ||
1052 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
1053 | unsigned int wait, unsigned int can_sleep) | |
1054 | { | |
1055 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
1056 | ap->id, device, wait); | |
1057 | ||
1058 | if (wait) | |
1059 | ata_wait_idle(ap); | |
1060 | ||
1061 | ap->ops->dev_select(ap, device); | |
1062 | ||
1063 | if (wait) { | |
1064 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
1065 | msleep(150); | |
1066 | ata_wait_idle(ap); | |
1067 | } | |
1068 | } | |
1069 | ||
1070 | /** | |
1071 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
1072 | * @dev: Device whose IDENTIFY DEVICE page we will dump | |
1073 | * | |
1074 | * Dump selected 16-bit words from a detected device's | |
1075 | * IDENTIFY PAGE page. | |
1076 | * | |
1077 | * LOCKING: | |
1078 | * caller. | |
1079 | */ | |
1080 | ||
1081 | static inline void ata_dump_id(struct ata_device *dev) | |
1082 | { | |
1083 | DPRINTK("49==0x%04x " | |
1084 | "53==0x%04x " | |
1085 | "63==0x%04x " | |
1086 | "64==0x%04x " | |
1087 | "75==0x%04x \n", | |
1088 | dev->id[49], | |
1089 | dev->id[53], | |
1090 | dev->id[63], | |
1091 | dev->id[64], | |
1092 | dev->id[75]); | |
1093 | DPRINTK("80==0x%04x " | |
1094 | "81==0x%04x " | |
1095 | "82==0x%04x " | |
1096 | "83==0x%04x " | |
1097 | "84==0x%04x \n", | |
1098 | dev->id[80], | |
1099 | dev->id[81], | |
1100 | dev->id[82], | |
1101 | dev->id[83], | |
1102 | dev->id[84]); | |
1103 | DPRINTK("88==0x%04x " | |
1104 | "93==0x%04x\n", | |
1105 | dev->id[88], | |
1106 | dev->id[93]); | |
1107 | } | |
1108 | ||
1109 | /** | |
1110 | * ata_dev_identify - obtain IDENTIFY x DEVICE page | |
1111 | * @ap: port on which device we wish to probe resides | |
1112 | * @device: device bus address, starting at zero | |
1113 | * | |
1114 | * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE | |
1115 | * command, and read back the 512-byte device information page. | |
1116 | * The device information page is fed to us via the standard | |
1117 | * PIO-IN protocol, but we hand-code it here. (TODO: investigate | |
1118 | * using standard PIO-IN paths) | |
1119 | * | |
1120 | * After reading the device information page, we use several | |
1121 | * bits of information from it to initialize data structures | |
1122 | * that will be used during the lifetime of the ata_device. | |
1123 | * Other data from the info page is used to disqualify certain | |
1124 | * older ATA devices we do not wish to support. | |
1125 | * | |
1126 | * LOCKING: | |
1127 | * Inherited from caller. Some functions called by this function | |
1128 | * obtain the host_set lock. | |
1129 | */ | |
1130 | ||
1131 | static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |
1132 | { | |
1133 | struct ata_device *dev = &ap->device[device]; | |
1134 | unsigned int i; | |
1135 | u16 tmp; | |
1136 | unsigned long xfer_modes; | |
1137 | u8 status; | |
1138 | unsigned int using_edd; | |
1139 | DECLARE_COMPLETION(wait); | |
1140 | struct ata_queued_cmd *qc; | |
1141 | unsigned long flags; | |
1142 | int rc; | |
1143 | ||
1144 | if (!ata_dev_present(dev)) { | |
1145 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1146 | ap->id, device); | |
1147 | return; | |
1148 | } | |
1149 | ||
1150 | if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET)) | |
1151 | using_edd = 0; | |
1152 | else | |
1153 | using_edd = 1; | |
1154 | ||
1155 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, device); | |
1156 | ||
1157 | assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI || | |
1158 | dev->class == ATA_DEV_NONE); | |
1159 | ||
1160 | ata_dev_select(ap, device, 1, 1); /* select device 0/1 */ | |
1161 | ||
1162 | qc = ata_qc_new_init(ap, dev); | |
1163 | BUG_ON(qc == NULL); | |
1164 | ||
1165 | ata_sg_init_one(qc, dev->id, sizeof(dev->id)); | |
1166 | qc->dma_dir = DMA_FROM_DEVICE; | |
1167 | qc->tf.protocol = ATA_PROT_PIO; | |
1168 | qc->nsect = 1; | |
1169 | ||
1170 | retry: | |
1171 | if (dev->class == ATA_DEV_ATA) { | |
1172 | qc->tf.command = ATA_CMD_ID_ATA; | |
1173 | DPRINTK("do ATA identify\n"); | |
1174 | } else { | |
1175 | qc->tf.command = ATA_CMD_ID_ATAPI; | |
1176 | DPRINTK("do ATAPI identify\n"); | |
1177 | } | |
1178 | ||
1179 | qc->waiting = &wait; | |
1180 | qc->complete_fn = ata_qc_complete_noop; | |
1181 | ||
1182 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1183 | rc = ata_qc_issue(qc); | |
1184 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1185 | ||
1186 | if (rc) | |
1187 | goto err_out; | |
1188 | else | |
1189 | wait_for_completion(&wait); | |
1190 | ||
1191 | status = ata_chk_status(ap); | |
1192 | if (status & ATA_ERR) { | |
1193 | /* | |
1194 | * arg! EDD works for all test cases, but seems to return | |
1195 | * the ATA signature for some ATAPI devices. Until the | |
1196 | * reason for this is found and fixed, we fix up the mess | |
1197 | * here. If IDENTIFY DEVICE returns command aborted | |
1198 | * (as ATAPI devices do), then we issue an | |
1199 | * IDENTIFY PACKET DEVICE. | |
1200 | * | |
1201 | * ATA software reset (SRST, the default) does not appear | |
1202 | * to have this problem. | |
1203 | */ | |
1204 | if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) { | |
1205 | u8 err = ata_chk_err(ap); | |
1206 | if (err & ATA_ABORTED) { | |
1207 | dev->class = ATA_DEV_ATAPI; | |
1208 | qc->cursg = 0; | |
1209 | qc->cursg_ofs = 0; | |
1210 | qc->cursect = 0; | |
1211 | qc->nsect = 1; | |
1212 | goto retry; | |
1213 | } | |
1214 | } | |
1215 | goto err_out; | |
1216 | } | |
1217 | ||
1218 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
1219 | ||
1220 | /* print device capabilities */ | |
1221 | printk(KERN_DEBUG "ata%u: dev %u cfg " | |
1222 | "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1223 | ap->id, device, dev->id[49], | |
1224 | dev->id[82], dev->id[83], dev->id[84], | |
1225 | dev->id[85], dev->id[86], dev->id[87], | |
1226 | dev->id[88]); | |
1227 | ||
1228 | /* | |
1229 | * common ATA, ATAPI feature tests | |
1230 | */ | |
1231 | ||
1232 | /* we require LBA and DMA support (bits 8 & 9 of word 49) */ | |
1233 | if (!ata_id_has_dma(dev->id) || !ata_id_has_lba(dev->id)) { | |
1234 | printk(KERN_DEBUG "ata%u: no dma/lba\n", ap->id); | |
1235 | goto err_out_nosup; | |
1236 | } | |
1237 | ||
1238 | /* quick-n-dirty find max transfer mode; for printk only */ | |
1239 | xfer_modes = dev->id[ATA_ID_UDMA_MODES]; | |
1240 | if (!xfer_modes) | |
1241 | xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; | |
1242 | if (!xfer_modes) { | |
1243 | xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3); | |
1244 | xfer_modes |= (0x7 << ATA_SHIFT_PIO); | |
1245 | } | |
1246 | ||
1247 | ata_dump_id(dev); | |
1248 | ||
1249 | /* ATA-specific feature tests */ | |
1250 | if (dev->class == ATA_DEV_ATA) { | |
1251 | if (!ata_id_is_ata(dev->id)) /* sanity check */ | |
1252 | goto err_out_nosup; | |
1253 | ||
1254 | tmp = dev->id[ATA_ID_MAJOR_VER]; | |
1255 | for (i = 14; i >= 1; i--) | |
1256 | if (tmp & (1 << i)) | |
1257 | break; | |
1258 | ||
1259 | /* we require at least ATA-3 */ | |
1260 | if (i < 3) { | |
1261 | printk(KERN_DEBUG "ata%u: no ATA-3\n", ap->id); | |
1262 | goto err_out_nosup; | |
1263 | } | |
1264 | ||
1265 | if (ata_id_has_lba48(dev->id)) { | |
1266 | dev->flags |= ATA_DFLAG_LBA48; | |
1267 | dev->n_sectors = ata_id_u64(dev->id, 100); | |
1268 | } else { | |
1269 | dev->n_sectors = ata_id_u32(dev->id, 60); | |
1270 | } | |
1271 | ||
1272 | ap->host->max_cmd_len = 16; | |
1273 | ||
1274 | /* print device info to dmesg */ | |
1275 | printk(KERN_INFO "ata%u: dev %u ATA, max %s, %Lu sectors:%s\n", | |
1276 | ap->id, device, | |
1277 | ata_mode_string(xfer_modes), | |
1278 | (unsigned long long)dev->n_sectors, | |
1279 | dev->flags & ATA_DFLAG_LBA48 ? " lba48" : ""); | |
1280 | } | |
1281 | ||
1282 | /* ATAPI-specific feature tests */ | |
1283 | else { | |
1284 | if (ata_id_is_ata(dev->id)) /* sanity check */ | |
1285 | goto err_out_nosup; | |
1286 | ||
1287 | rc = atapi_cdb_len(dev->id); | |
1288 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1289 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | |
1290 | goto err_out_nosup; | |
1291 | } | |
1292 | ap->cdb_len = (unsigned int) rc; | |
1293 | ap->host->max_cmd_len = (unsigned char) ap->cdb_len; | |
1294 | ||
1295 | /* print device info to dmesg */ | |
1296 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | |
1297 | ap->id, device, | |
1298 | ata_mode_string(xfer_modes)); | |
1299 | } | |
1300 | ||
1301 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | |
1302 | return; | |
1303 | ||
1304 | err_out_nosup: | |
1305 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | |
1306 | ap->id, device); | |
1307 | err_out: | |
1308 | dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */ | |
1309 | DPRINTK("EXIT, err\n"); | |
1310 | } | |
1311 | ||
6f2f3812 BC |
1312 | |
1313 | static inline u8 ata_dev_knobble(struct ata_port *ap) | |
1314 | { | |
1315 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id))); | |
1316 | } | |
1317 | ||
1318 | /** | |
1319 | * ata_dev_config - Run device specific handlers and check for | |
1320 | * SATA->PATA bridges | |
8a60a071 | 1321 | * @ap: Bus |
6f2f3812 BC |
1322 | * @i: Device |
1323 | * | |
1324 | * LOCKING: | |
1325 | */ | |
8a60a071 | 1326 | |
6f2f3812 BC |
1327 | void ata_dev_config(struct ata_port *ap, unsigned int i) |
1328 | { | |
1329 | /* limit bridge transfers to udma5, 200 sectors */ | |
1330 | if (ata_dev_knobble(ap)) { | |
1331 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", | |
1332 | ap->id, ap->device->devno); | |
1333 | ap->udma_mask &= ATA_UDMA5; | |
1334 | ap->host->max_sectors = ATA_MAX_SECTORS; | |
1335 | ap->host->hostt->max_sectors = ATA_MAX_SECTORS; | |
1336 | ap->device->flags |= ATA_DFLAG_LOCK_SECTORS; | |
1337 | } | |
1338 | ||
1339 | if (ap->ops->dev_config) | |
1340 | ap->ops->dev_config(ap, &ap->device[i]); | |
1341 | } | |
1342 | ||
1da177e4 LT |
1343 | /** |
1344 | * ata_bus_probe - Reset and probe ATA bus | |
1345 | * @ap: Bus to probe | |
1346 | * | |
0cba632b JG |
1347 | * Master ATA bus probing function. Initiates a hardware-dependent |
1348 | * bus reset, then attempts to identify any devices found on | |
1349 | * the bus. | |
1350 | * | |
1da177e4 | 1351 | * LOCKING: |
0cba632b | 1352 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1353 | * |
1354 | * RETURNS: | |
1355 | * Zero on success, non-zero on error. | |
1356 | */ | |
1357 | ||
1358 | static int ata_bus_probe(struct ata_port *ap) | |
1359 | { | |
1360 | unsigned int i, found = 0; | |
1361 | ||
1362 | ap->ops->phy_reset(ap); | |
1363 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1364 | goto err_out; | |
1365 | ||
1366 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1367 | ata_dev_identify(ap, i); | |
1368 | if (ata_dev_present(&ap->device[i])) { | |
1369 | found = 1; | |
6f2f3812 | 1370 | ata_dev_config(ap,i); |
1da177e4 LT |
1371 | } |
1372 | } | |
1373 | ||
1374 | if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1375 | goto err_out_disable; | |
1376 | ||
1377 | ata_set_mode(ap); | |
1378 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1379 | goto err_out_disable; | |
1380 | ||
1381 | return 0; | |
1382 | ||
1383 | err_out_disable: | |
1384 | ap->ops->port_disable(ap); | |
1385 | err_out: | |
1386 | return -1; | |
1387 | } | |
1388 | ||
1389 | /** | |
0cba632b JG |
1390 | * ata_port_probe - Mark port as enabled |
1391 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1392 | * |
0cba632b JG |
1393 | * Modify @ap data structure such that the system |
1394 | * thinks that the entire port is enabled. | |
1395 | * | |
1396 | * LOCKING: host_set lock, or some other form of | |
1397 | * serialization. | |
1da177e4 LT |
1398 | */ |
1399 | ||
1400 | void ata_port_probe(struct ata_port *ap) | |
1401 | { | |
1402 | ap->flags &= ~ATA_FLAG_PORT_DISABLED; | |
1403 | } | |
1404 | ||
1405 | /** | |
780a87f7 JG |
1406 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1407 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1408 | * |
780a87f7 JG |
1409 | * This function issues commands to standard SATA Sxxx |
1410 | * PHY registers, to wake up the phy (and device), and | |
1411 | * clear any reset condition. | |
1da177e4 LT |
1412 | * |
1413 | * LOCKING: | |
0cba632b | 1414 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1415 | * |
1416 | */ | |
1417 | void __sata_phy_reset(struct ata_port *ap) | |
1418 | { | |
1419 | u32 sstatus; | |
1420 | unsigned long timeout = jiffies + (HZ * 5); | |
1421 | ||
1422 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e BR |
1423 | /* issue phy wake/reset */ |
1424 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
62ba2841 TH |
1425 | /* Couldn't find anything in SATA I/II specs, but |
1426 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1427 | mdelay(1); | |
1da177e4 | 1428 | } |
cdcca89e | 1429 | scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */ |
1da177e4 LT |
1430 | |
1431 | /* wait for phy to become ready, if necessary */ | |
1432 | do { | |
1433 | msleep(200); | |
1434 | sstatus = scr_read(ap, SCR_STATUS); | |
1435 | if ((sstatus & 0xf) != 1) | |
1436 | break; | |
1437 | } while (time_before(jiffies, timeout)); | |
1438 | ||
1439 | /* TODO: phy layer with polling, timeouts, etc. */ | |
1440 | if (sata_dev_present(ap)) | |
1441 | ata_port_probe(ap); | |
1442 | else { | |
1443 | sstatus = scr_read(ap, SCR_STATUS); | |
1444 | printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n", | |
1445 | ap->id, sstatus); | |
1446 | ata_port_disable(ap); | |
1447 | } | |
1448 | ||
1449 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1450 | return; | |
1451 | ||
1452 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1453 | ata_port_disable(ap); | |
1454 | return; | |
1455 | } | |
1456 | ||
1457 | ap->cbl = ATA_CBL_SATA; | |
1458 | } | |
1459 | ||
1460 | /** | |
780a87f7 JG |
1461 | * sata_phy_reset - Reset SATA bus. |
1462 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1463 | * |
780a87f7 JG |
1464 | * This function resets the SATA bus, and then probes |
1465 | * the bus for devices. | |
1da177e4 LT |
1466 | * |
1467 | * LOCKING: | |
0cba632b | 1468 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1469 | * |
1470 | */ | |
1471 | void sata_phy_reset(struct ata_port *ap) | |
1472 | { | |
1473 | __sata_phy_reset(ap); | |
1474 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1475 | return; | |
1476 | ata_bus_reset(ap); | |
1477 | } | |
1478 | ||
1479 | /** | |
780a87f7 JG |
1480 | * ata_port_disable - Disable port. |
1481 | * @ap: Port to be disabled. | |
1da177e4 | 1482 | * |
780a87f7 JG |
1483 | * Modify @ap data structure such that the system |
1484 | * thinks that the entire port is disabled, and should | |
1485 | * never attempt to probe or communicate with devices | |
1486 | * on this port. | |
1487 | * | |
1488 | * LOCKING: host_set lock, or some other form of | |
1489 | * serialization. | |
1da177e4 LT |
1490 | */ |
1491 | ||
1492 | void ata_port_disable(struct ata_port *ap) | |
1493 | { | |
1494 | ap->device[0].class = ATA_DEV_NONE; | |
1495 | ap->device[1].class = ATA_DEV_NONE; | |
1496 | ap->flags |= ATA_FLAG_PORT_DISABLED; | |
1497 | } | |
1498 | ||
1499 | static struct { | |
1500 | unsigned int shift; | |
1501 | u8 base; | |
1502 | } xfer_mode_classes[] = { | |
1503 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | |
1504 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | |
1505 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | |
1506 | }; | |
1507 | ||
1508 | static inline u8 base_from_shift(unsigned int shift) | |
1509 | { | |
1510 | int i; | |
1511 | ||
1512 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | |
1513 | if (xfer_mode_classes[i].shift == shift) | |
1514 | return xfer_mode_classes[i].base; | |
1515 | ||
1516 | return 0xff; | |
1517 | } | |
1518 | ||
1519 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |
1520 | { | |
1521 | int ofs, idx; | |
1522 | u8 base; | |
1523 | ||
1524 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1525 | return; | |
1526 | ||
1527 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
1528 | dev->flags |= ATA_DFLAG_PIO; | |
1529 | ||
1530 | ata_dev_set_xfermode(ap, dev); | |
1531 | ||
1532 | base = base_from_shift(dev->xfer_shift); | |
1533 | ofs = dev->xfer_mode - base; | |
1534 | idx = ofs + dev->xfer_shift; | |
1535 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | |
1536 | ||
1537 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", | |
1538 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | |
1539 | ||
1540 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | |
1541 | ap->id, dev->devno, xfer_mode_str[idx]); | |
1542 | } | |
1543 | ||
1544 | static int ata_host_set_pio(struct ata_port *ap) | |
1545 | { | |
1546 | unsigned int mask; | |
1547 | int x, i; | |
1548 | u8 base, xfer_mode; | |
1549 | ||
1550 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | |
1551 | x = fgb(mask); | |
1552 | if (x < 0) { | |
1553 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | |
1554 | return -1; | |
1555 | } | |
1556 | ||
1557 | base = base_from_shift(ATA_SHIFT_PIO); | |
1558 | xfer_mode = base + x; | |
1559 | ||
1560 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | |
1561 | (int)base, (int)xfer_mode, mask, x); | |
1562 | ||
1563 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1564 | struct ata_device *dev = &ap->device[i]; | |
1565 | if (ata_dev_present(dev)) { | |
1566 | dev->pio_mode = xfer_mode; | |
1567 | dev->xfer_mode = xfer_mode; | |
1568 | dev->xfer_shift = ATA_SHIFT_PIO; | |
1569 | if (ap->ops->set_piomode) | |
1570 | ap->ops->set_piomode(ap, dev); | |
1571 | } | |
1572 | } | |
1573 | ||
1574 | return 0; | |
1575 | } | |
1576 | ||
1577 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |
1578 | unsigned int xfer_shift) | |
1579 | { | |
1580 | int i; | |
1581 | ||
1582 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1583 | struct ata_device *dev = &ap->device[i]; | |
1584 | if (ata_dev_present(dev)) { | |
1585 | dev->dma_mode = xfer_mode; | |
1586 | dev->xfer_mode = xfer_mode; | |
1587 | dev->xfer_shift = xfer_shift; | |
1588 | if (ap->ops->set_dmamode) | |
1589 | ap->ops->set_dmamode(ap, dev); | |
1590 | } | |
1591 | } | |
1592 | } | |
1593 | ||
1594 | /** | |
1595 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1596 | * @ap: port on which timings will be programmed | |
1597 | * | |
780a87f7 JG |
1598 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). |
1599 | * | |
1da177e4 | 1600 | * LOCKING: |
0cba632b | 1601 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1602 | * |
1603 | */ | |
1604 | static void ata_set_mode(struct ata_port *ap) | |
1605 | { | |
1606 | unsigned int i, xfer_shift; | |
1607 | u8 xfer_mode; | |
1608 | int rc; | |
1609 | ||
1610 | /* step 1: always set host PIO timings */ | |
1611 | rc = ata_host_set_pio(ap); | |
1612 | if (rc) | |
1613 | goto err_out; | |
1614 | ||
1615 | /* step 2: choose the best data xfer mode */ | |
1616 | xfer_mode = xfer_shift = 0; | |
1617 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | |
1618 | if (rc) | |
1619 | goto err_out; | |
1620 | ||
1621 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | |
1622 | if (xfer_shift != ATA_SHIFT_PIO) | |
1623 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | |
1624 | ||
1625 | /* step 4: update devices' xfer mode */ | |
1626 | ata_dev_set_mode(ap, &ap->device[0]); | |
1627 | ata_dev_set_mode(ap, &ap->device[1]); | |
1628 | ||
1629 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1630 | return; | |
1631 | ||
1632 | if (ap->ops->post_set_mode) | |
1633 | ap->ops->post_set_mode(ap); | |
1634 | ||
1635 | for (i = 0; i < 2; i++) { | |
1636 | struct ata_device *dev = &ap->device[i]; | |
1637 | ata_dev_set_protocol(dev); | |
1638 | } | |
1639 | ||
1640 | return; | |
1641 | ||
1642 | err_out: | |
1643 | ata_port_disable(ap); | |
1644 | } | |
1645 | ||
1646 | /** | |
1647 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
1648 | * @ap: port containing status register to be polled | |
1649 | * @tmout_pat: impatience timeout | |
1650 | * @tmout: overall timeout | |
1651 | * | |
780a87f7 JG |
1652 | * Sleep until ATA Status register bit BSY clears, |
1653 | * or a timeout occurs. | |
1654 | * | |
1655 | * LOCKING: None. | |
1da177e4 LT |
1656 | * |
1657 | */ | |
1658 | ||
1659 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
1660 | unsigned long tmout_pat, | |
1661 | unsigned long tmout) | |
1662 | { | |
1663 | unsigned long timer_start, timeout; | |
1664 | u8 status; | |
1665 | ||
1666 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
1667 | timer_start = jiffies; | |
1668 | timeout = timer_start + tmout_pat; | |
1669 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1670 | msleep(50); | |
1671 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
1672 | } | |
1673 | ||
1674 | if (status & ATA_BUSY) | |
1675 | printk(KERN_WARNING "ata%u is slow to respond, " | |
1676 | "please be patient\n", ap->id); | |
1677 | ||
1678 | timeout = timer_start + tmout; | |
1679 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1680 | msleep(50); | |
1681 | status = ata_chk_status(ap); | |
1682 | } | |
1683 | ||
1684 | if (status & ATA_BUSY) { | |
1685 | printk(KERN_ERR "ata%u failed to respond (%lu secs)\n", | |
1686 | ap->id, tmout / HZ); | |
1687 | return 1; | |
1688 | } | |
1689 | ||
1690 | return 0; | |
1691 | } | |
1692 | ||
1693 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
1694 | { | |
1695 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1696 | unsigned int dev0 = devmask & (1 << 0); | |
1697 | unsigned int dev1 = devmask & (1 << 1); | |
1698 | unsigned long timeout; | |
1699 | ||
1700 | /* if device 0 was found in ata_devchk, wait for its | |
1701 | * BSY bit to clear | |
1702 | */ | |
1703 | if (dev0) | |
1704 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1705 | ||
1706 | /* if device 1 was found in ata_devchk, wait for | |
1707 | * register access, then wait for BSY to clear | |
1708 | */ | |
1709 | timeout = jiffies + ATA_TMOUT_BOOT; | |
1710 | while (dev1) { | |
1711 | u8 nsect, lbal; | |
1712 | ||
1713 | ap->ops->dev_select(ap, 1); | |
1714 | if (ap->flags & ATA_FLAG_MMIO) { | |
1715 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
1716 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
1717 | } else { | |
1718 | nsect = inb(ioaddr->nsect_addr); | |
1719 | lbal = inb(ioaddr->lbal_addr); | |
1720 | } | |
1721 | if ((nsect == 1) && (lbal == 1)) | |
1722 | break; | |
1723 | if (time_after(jiffies, timeout)) { | |
1724 | dev1 = 0; | |
1725 | break; | |
1726 | } | |
1727 | msleep(50); /* give drive a breather */ | |
1728 | } | |
1729 | if (dev1) | |
1730 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1731 | ||
1732 | /* is all this really necessary? */ | |
1733 | ap->ops->dev_select(ap, 0); | |
1734 | if (dev1) | |
1735 | ap->ops->dev_select(ap, 1); | |
1736 | if (dev0) | |
1737 | ap->ops->dev_select(ap, 0); | |
1738 | } | |
1739 | ||
1740 | /** | |
0cba632b JG |
1741 | * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command. |
1742 | * @ap: Port to reset and probe | |
1743 | * | |
1744 | * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and | |
1745 | * probe the bus. Not often used these days. | |
1da177e4 LT |
1746 | * |
1747 | * LOCKING: | |
0cba632b | 1748 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1749 | * |
1750 | */ | |
1751 | ||
1752 | static unsigned int ata_bus_edd(struct ata_port *ap) | |
1753 | { | |
1754 | struct ata_taskfile tf; | |
1755 | ||
1756 | /* set up execute-device-diag (bus reset) taskfile */ | |
1757 | /* also, take interrupts to a known state (disabled) */ | |
1758 | DPRINTK("execute-device-diag\n"); | |
1759 | ata_tf_init(ap, &tf, 0); | |
1760 | tf.ctl |= ATA_NIEN; | |
1761 | tf.command = ATA_CMD_EDD; | |
1762 | tf.protocol = ATA_PROT_NODATA; | |
1763 | ||
1764 | /* do bus reset */ | |
1765 | ata_tf_to_host(ap, &tf); | |
1766 | ||
1767 | /* spec says at least 2ms. but who knows with those | |
1768 | * crazy ATAPI devices... | |
1769 | */ | |
1770 | msleep(150); | |
1771 | ||
1772 | return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1773 | } | |
1774 | ||
1775 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
1776 | unsigned int devmask) | |
1777 | { | |
1778 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1779 | ||
1780 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
1781 | ||
1782 | /* software reset. causes dev0 to be selected */ | |
1783 | if (ap->flags & ATA_FLAG_MMIO) { | |
1784 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1785 | udelay(20); /* FIXME: flush */ | |
1786 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
1787 | udelay(20); /* FIXME: flush */ | |
1788 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1789 | } else { | |
1790 | outb(ap->ctl, ioaddr->ctl_addr); | |
1791 | udelay(10); | |
1792 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
1793 | udelay(10); | |
1794 | outb(ap->ctl, ioaddr->ctl_addr); | |
1795 | } | |
1796 | ||
1797 | /* spec mandates ">= 2ms" before checking status. | |
1798 | * We wait 150ms, because that was the magic delay used for | |
1799 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
1800 | * between when the ATA command register is written, and then | |
1801 | * status is checked. Because waiting for "a while" before | |
1802 | * checking status is fine, post SRST, we perform this magic | |
1803 | * delay here as well. | |
1804 | */ | |
1805 | msleep(150); | |
1806 | ||
1807 | ata_bus_post_reset(ap, devmask); | |
1808 | ||
1809 | return 0; | |
1810 | } | |
1811 | ||
1812 | /** | |
1813 | * ata_bus_reset - reset host port and associated ATA channel | |
1814 | * @ap: port to reset | |
1815 | * | |
1816 | * This is typically the first time we actually start issuing | |
1817 | * commands to the ATA channel. We wait for BSY to clear, then | |
1818 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
1819 | * result. Determine what devices, if any, are on the channel | |
1820 | * by looking at the device 0/1 error register. Look at the signature | |
1821 | * stored in each device's taskfile registers, to determine if | |
1822 | * the device is ATA or ATAPI. | |
1823 | * | |
1824 | * LOCKING: | |
0cba632b JG |
1825 | * PCI/etc. bus probe sem. |
1826 | * Obtains host_set lock. | |
1da177e4 LT |
1827 | * |
1828 | * SIDE EFFECTS: | |
1829 | * Sets ATA_FLAG_PORT_DISABLED if bus reset fails. | |
1830 | */ | |
1831 | ||
1832 | void ata_bus_reset(struct ata_port *ap) | |
1833 | { | |
1834 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1835 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
1836 | u8 err; | |
1837 | unsigned int dev0, dev1 = 0, rc = 0, devmask = 0; | |
1838 | ||
1839 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
1840 | ||
1841 | /* determine if device 0/1 are present */ | |
1842 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
1843 | dev0 = 1; | |
1844 | else { | |
1845 | dev0 = ata_devchk(ap, 0); | |
1846 | if (slave_possible) | |
1847 | dev1 = ata_devchk(ap, 1); | |
1848 | } | |
1849 | ||
1850 | if (dev0) | |
1851 | devmask |= (1 << 0); | |
1852 | if (dev1) | |
1853 | devmask |= (1 << 1); | |
1854 | ||
1855 | /* select device 0 again */ | |
1856 | ap->ops->dev_select(ap, 0); | |
1857 | ||
1858 | /* issue bus reset */ | |
1859 | if (ap->flags & ATA_FLAG_SRST) | |
1860 | rc = ata_bus_softreset(ap, devmask); | |
1861 | else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) { | |
1862 | /* set up device control */ | |
1863 | if (ap->flags & ATA_FLAG_MMIO) | |
1864 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1865 | else | |
1866 | outb(ap->ctl, ioaddr->ctl_addr); | |
1867 | rc = ata_bus_edd(ap); | |
1868 | } | |
1869 | ||
1870 | if (rc) | |
1871 | goto err_out; | |
1872 | ||
1873 | /* | |
1874 | * determine by signature whether we have ATA or ATAPI devices | |
1875 | */ | |
1876 | err = ata_dev_try_classify(ap, 0); | |
1877 | if ((slave_possible) && (err != 0x81)) | |
1878 | ata_dev_try_classify(ap, 1); | |
1879 | ||
1880 | /* re-enable interrupts */ | |
1881 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
1882 | ata_irq_on(ap); | |
1883 | ||
1884 | /* is double-select really necessary? */ | |
1885 | if (ap->device[1].class != ATA_DEV_NONE) | |
1886 | ap->ops->dev_select(ap, 1); | |
1887 | if (ap->device[0].class != ATA_DEV_NONE) | |
1888 | ap->ops->dev_select(ap, 0); | |
1889 | ||
1890 | /* if no devices were detected, disable this port */ | |
1891 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
1892 | (ap->device[1].class == ATA_DEV_NONE)) | |
1893 | goto err_out; | |
1894 | ||
1895 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
1896 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
1897 | if (ap->flags & ATA_FLAG_MMIO) | |
1898 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1899 | else | |
1900 | outb(ap->ctl, ioaddr->ctl_addr); | |
1901 | } | |
1902 | ||
1903 | DPRINTK("EXIT\n"); | |
1904 | return; | |
1905 | ||
1906 | err_out: | |
1907 | printk(KERN_ERR "ata%u: disabling port\n", ap->id); | |
1908 | ap->ops->port_disable(ap); | |
1909 | ||
1910 | DPRINTK("EXIT\n"); | |
1911 | } | |
1912 | ||
1913 | static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
1914 | { | |
1915 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | |
1916 | ap->id, dev->devno); | |
1917 | } | |
1918 | ||
1919 | static const char * ata_dma_blacklist [] = { | |
1920 | "WDC AC11000H", | |
1921 | "WDC AC22100H", | |
1922 | "WDC AC32500H", | |
1923 | "WDC AC33100H", | |
1924 | "WDC AC31600H", | |
1925 | "WDC AC32100H", | |
1926 | "WDC AC23200L", | |
1927 | "Compaq CRD-8241B", | |
1928 | "CRD-8400B", | |
1929 | "CRD-8480B", | |
1930 | "CRD-8482B", | |
1931 | "CRD-84", | |
1932 | "SanDisk SDP3B", | |
1933 | "SanDisk SDP3B-64", | |
1934 | "SANYO CD-ROM CRD", | |
1935 | "HITACHI CDR-8", | |
1936 | "HITACHI CDR-8335", | |
1937 | "HITACHI CDR-8435", | |
1938 | "Toshiba CD-ROM XM-6202B", | |
e922256a | 1939 | "TOSHIBA CD-ROM XM-1702BC", |
1da177e4 LT |
1940 | "CD-532E-A", |
1941 | "E-IDE CD-ROM CR-840", | |
1942 | "CD-ROM Drive/F5A", | |
1943 | "WPI CDD-820", | |
1944 | "SAMSUNG CD-ROM SC-148C", | |
1945 | "SAMSUNG CD-ROM SC", | |
1946 | "SanDisk SDP3B-64", | |
1da177e4 LT |
1947 | "ATAPI CD-ROM DRIVE 40X MAXIMUM", |
1948 | "_NEC DV5800A", | |
1949 | }; | |
1950 | ||
1951 | static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
1952 | { | |
1953 | unsigned char model_num[40]; | |
1954 | char *s; | |
1955 | unsigned int len; | |
1956 | int i; | |
1957 | ||
1958 | ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS, | |
1959 | sizeof(model_num)); | |
1960 | s = &model_num[0]; | |
1961 | len = strnlen(s, sizeof(model_num)); | |
1962 | ||
1963 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
1964 | while ((len > 0) && (s[len - 1] == ' ')) { | |
1965 | len--; | |
1966 | s[len] = 0; | |
1967 | } | |
1968 | ||
1969 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) | |
1970 | if (!strncmp(ata_dma_blacklist[i], s, len)) | |
1971 | return 1; | |
1972 | ||
1973 | return 0; | |
1974 | } | |
1975 | ||
1976 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift) | |
1977 | { | |
1978 | struct ata_device *master, *slave; | |
1979 | unsigned int mask; | |
1980 | ||
1981 | master = &ap->device[0]; | |
1982 | slave = &ap->device[1]; | |
1983 | ||
1984 | assert (ata_dev_present(master) || ata_dev_present(slave)); | |
1985 | ||
1986 | if (shift == ATA_SHIFT_UDMA) { | |
1987 | mask = ap->udma_mask; | |
1988 | if (ata_dev_present(master)) { | |
1989 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | |
1990 | if (ata_dma_blacklisted(ap, master)) { | |
1991 | mask = 0; | |
1992 | ata_pr_blacklisted(ap, master); | |
1993 | } | |
1994 | } | |
1995 | if (ata_dev_present(slave)) { | |
1996 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | |
1997 | if (ata_dma_blacklisted(ap, slave)) { | |
1998 | mask = 0; | |
1999 | ata_pr_blacklisted(ap, slave); | |
2000 | } | |
2001 | } | |
2002 | } | |
2003 | else if (shift == ATA_SHIFT_MWDMA) { | |
2004 | mask = ap->mwdma_mask; | |
2005 | if (ata_dev_present(master)) { | |
2006 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | |
2007 | if (ata_dma_blacklisted(ap, master)) { | |
2008 | mask = 0; | |
2009 | ata_pr_blacklisted(ap, master); | |
2010 | } | |
2011 | } | |
2012 | if (ata_dev_present(slave)) { | |
2013 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | |
2014 | if (ata_dma_blacklisted(ap, slave)) { | |
2015 | mask = 0; | |
2016 | ata_pr_blacklisted(ap, slave); | |
2017 | } | |
2018 | } | |
2019 | } | |
2020 | else if (shift == ATA_SHIFT_PIO) { | |
2021 | mask = ap->pio_mask; | |
2022 | if (ata_dev_present(master)) { | |
2023 | /* spec doesn't return explicit support for | |
2024 | * PIO0-2, so we fake it | |
2025 | */ | |
2026 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | |
2027 | tmp_mode <<= 3; | |
2028 | tmp_mode |= 0x7; | |
2029 | mask &= tmp_mode; | |
2030 | } | |
2031 | if (ata_dev_present(slave)) { | |
2032 | /* spec doesn't return explicit support for | |
2033 | * PIO0-2, so we fake it | |
2034 | */ | |
2035 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | |
2036 | tmp_mode <<= 3; | |
2037 | tmp_mode |= 0x7; | |
2038 | mask &= tmp_mode; | |
2039 | } | |
2040 | } | |
2041 | else { | |
2042 | mask = 0xffffffff; /* shut up compiler warning */ | |
2043 | BUG(); | |
2044 | } | |
2045 | ||
2046 | return mask; | |
2047 | } | |
2048 | ||
2049 | /* find greatest bit */ | |
2050 | static int fgb(u32 bitmap) | |
2051 | { | |
2052 | unsigned int i; | |
2053 | int x = -1; | |
2054 | ||
2055 | for (i = 0; i < 32; i++) | |
2056 | if (bitmap & (1 << i)) | |
2057 | x = i; | |
2058 | ||
2059 | return x; | |
2060 | } | |
2061 | ||
2062 | /** | |
2063 | * ata_choose_xfer_mode - attempt to find best transfer mode | |
2064 | * @ap: Port for which an xfer mode will be selected | |
2065 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | |
2066 | * @xfer_shift_out: (output) bit shift that selects this mode | |
2067 | * | |
0cba632b JG |
2068 | * Based on host and device capabilities, determine the |
2069 | * maximum transfer mode that is amenable to all. | |
2070 | * | |
1da177e4 | 2071 | * LOCKING: |
0cba632b | 2072 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2073 | * |
2074 | * RETURNS: | |
2075 | * Zero on success, negative on error. | |
2076 | */ | |
2077 | ||
2078 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
2079 | u8 *xfer_mode_out, | |
2080 | unsigned int *xfer_shift_out) | |
2081 | { | |
2082 | unsigned int mask, shift; | |
2083 | int x, i; | |
2084 | ||
2085 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | |
2086 | shift = xfer_mode_classes[i].shift; | |
2087 | mask = ata_get_mode_mask(ap, shift); | |
2088 | ||
2089 | x = fgb(mask); | |
2090 | if (x >= 0) { | |
2091 | *xfer_mode_out = xfer_mode_classes[i].base + x; | |
2092 | *xfer_shift_out = shift; | |
2093 | return 0; | |
2094 | } | |
2095 | } | |
2096 | ||
2097 | return -1; | |
2098 | } | |
2099 | ||
2100 | /** | |
2101 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
2102 | * @ap: Port associated with device @dev | |
2103 | * @dev: Device to which command will be sent | |
2104 | * | |
780a87f7 JG |
2105 | * Issue SET FEATURES - XFER MODE command to device @dev |
2106 | * on port @ap. | |
2107 | * | |
1da177e4 | 2108 | * LOCKING: |
0cba632b | 2109 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2110 | */ |
2111 | ||
2112 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) | |
2113 | { | |
2114 | DECLARE_COMPLETION(wait); | |
2115 | struct ata_queued_cmd *qc; | |
2116 | int rc; | |
2117 | unsigned long flags; | |
2118 | ||
2119 | /* set up set-features taskfile */ | |
2120 | DPRINTK("set features - xfer mode\n"); | |
2121 | ||
2122 | qc = ata_qc_new_init(ap, dev); | |
2123 | BUG_ON(qc == NULL); | |
2124 | ||
2125 | qc->tf.command = ATA_CMD_SET_FEATURES; | |
2126 | qc->tf.feature = SETFEATURES_XFER; | |
2127 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2128 | qc->tf.protocol = ATA_PROT_NODATA; | |
2129 | qc->tf.nsect = dev->xfer_mode; | |
2130 | ||
2131 | qc->waiting = &wait; | |
2132 | qc->complete_fn = ata_qc_complete_noop; | |
2133 | ||
2134 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2135 | rc = ata_qc_issue(qc); | |
2136 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2137 | ||
2138 | if (rc) | |
2139 | ata_port_disable(ap); | |
2140 | else | |
2141 | wait_for_completion(&wait); | |
2142 | ||
2143 | DPRINTK("EXIT\n"); | |
2144 | } | |
2145 | ||
2146 | /** | |
0cba632b JG |
2147 | * ata_sg_clean - Unmap DMA memory associated with command |
2148 | * @qc: Command containing DMA memory to be released | |
2149 | * | |
2150 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
2151 | * |
2152 | * LOCKING: | |
0cba632b | 2153 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2154 | */ |
2155 | ||
2156 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
2157 | { | |
2158 | struct ata_port *ap = qc->ap; | |
2159 | struct scatterlist *sg = qc->sg; | |
2160 | int dir = qc->dma_dir; | |
2161 | ||
2162 | assert(qc->flags & ATA_QCFLAG_DMAMAP); | |
2163 | assert(sg != NULL); | |
2164 | ||
2165 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
2166 | assert(qc->n_elem == 1); | |
2167 | ||
2168 | DPRINTK("unmapping %u sg elements\n", qc->n_elem); | |
2169 | ||
2170 | if (qc->flags & ATA_QCFLAG_SG) | |
2171 | dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2172 | else | |
2173 | dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]), | |
2174 | sg_dma_len(&sg[0]), dir); | |
2175 | ||
2176 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
2177 | qc->sg = NULL; | |
2178 | } | |
2179 | ||
2180 | /** | |
2181 | * ata_fill_sg - Fill PCI IDE PRD table | |
2182 | * @qc: Metadata associated with taskfile to be transferred | |
2183 | * | |
780a87f7 JG |
2184 | * Fill PCI IDE PRD (scatter-gather) table with segments |
2185 | * associated with the current disk command. | |
2186 | * | |
1da177e4 | 2187 | * LOCKING: |
780a87f7 | 2188 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2189 | * |
2190 | */ | |
2191 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
2192 | { | |
2193 | struct scatterlist *sg = qc->sg; | |
2194 | struct ata_port *ap = qc->ap; | |
2195 | unsigned int idx, nelem; | |
2196 | ||
2197 | assert(sg != NULL); | |
2198 | assert(qc->n_elem > 0); | |
2199 | ||
2200 | idx = 0; | |
2201 | for (nelem = qc->n_elem; nelem; nelem--,sg++) { | |
2202 | u32 addr, offset; | |
2203 | u32 sg_len, len; | |
2204 | ||
2205 | /* determine if physical DMA addr spans 64K boundary. | |
2206 | * Note h/w doesn't support 64-bit, so we unconditionally | |
2207 | * truncate dma_addr_t to u32. | |
2208 | */ | |
2209 | addr = (u32) sg_dma_address(sg); | |
2210 | sg_len = sg_dma_len(sg); | |
2211 | ||
2212 | while (sg_len) { | |
2213 | offset = addr & 0xffff; | |
2214 | len = sg_len; | |
2215 | if ((offset + sg_len) > 0x10000) | |
2216 | len = 0x10000 - offset; | |
2217 | ||
2218 | ap->prd[idx].addr = cpu_to_le32(addr); | |
2219 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
2220 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
2221 | ||
2222 | idx++; | |
2223 | sg_len -= len; | |
2224 | addr += len; | |
2225 | } | |
2226 | } | |
2227 | ||
2228 | if (idx) | |
2229 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
2230 | } | |
2231 | /** | |
2232 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
2233 | * @qc: Metadata associated with taskfile to check | |
2234 | * | |
780a87f7 JG |
2235 | * Allow low-level driver to filter ATA PACKET commands, returning |
2236 | * a status indicating whether or not it is OK to use DMA for the | |
2237 | * supplied PACKET command. | |
2238 | * | |
1da177e4 | 2239 | * LOCKING: |
0cba632b JG |
2240 | * spin_lock_irqsave(host_set lock) |
2241 | * | |
1da177e4 LT |
2242 | * RETURNS: 0 when ATAPI DMA can be used |
2243 | * nonzero otherwise | |
2244 | */ | |
2245 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
2246 | { | |
2247 | struct ata_port *ap = qc->ap; | |
2248 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
2249 | ||
2250 | if (ap->ops->check_atapi_dma) | |
2251 | rc = ap->ops->check_atapi_dma(qc); | |
2252 | ||
2253 | return rc; | |
2254 | } | |
2255 | /** | |
2256 | * ata_qc_prep - Prepare taskfile for submission | |
2257 | * @qc: Metadata associated with taskfile to be prepared | |
2258 | * | |
780a87f7 JG |
2259 | * Prepare ATA taskfile for submission. |
2260 | * | |
1da177e4 LT |
2261 | * LOCKING: |
2262 | * spin_lock_irqsave(host_set lock) | |
2263 | */ | |
2264 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
2265 | { | |
2266 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
2267 | return; | |
2268 | ||
2269 | ata_fill_sg(qc); | |
2270 | } | |
2271 | ||
0cba632b JG |
2272 | /** |
2273 | * ata_sg_init_one - Associate command with memory buffer | |
2274 | * @qc: Command to be associated | |
2275 | * @buf: Memory buffer | |
2276 | * @buflen: Length of memory buffer, in bytes. | |
2277 | * | |
2278 | * Initialize the data-related elements of queued_cmd @qc | |
2279 | * to point to a single memory buffer, @buf of byte length @buflen. | |
2280 | * | |
2281 | * LOCKING: | |
2282 | * spin_lock_irqsave(host_set lock) | |
2283 | */ | |
2284 | ||
1da177e4 LT |
2285 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
2286 | { | |
2287 | struct scatterlist *sg; | |
2288 | ||
2289 | qc->flags |= ATA_QCFLAG_SINGLE; | |
2290 | ||
2291 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
2292 | qc->sg = &qc->sgent; | |
2293 | qc->n_elem = 1; | |
2294 | qc->buf_virt = buf; | |
2295 | ||
2296 | sg = qc->sg; | |
2297 | sg->page = virt_to_page(buf); | |
2298 | sg->offset = (unsigned long) buf & ~PAGE_MASK; | |
32529e01 | 2299 | sg->length = buflen; |
1da177e4 LT |
2300 | } |
2301 | ||
0cba632b JG |
2302 | /** |
2303 | * ata_sg_init - Associate command with scatter-gather table. | |
2304 | * @qc: Command to be associated | |
2305 | * @sg: Scatter-gather table. | |
2306 | * @n_elem: Number of elements in s/g table. | |
2307 | * | |
2308 | * Initialize the data-related elements of queued_cmd @qc | |
2309 | * to point to a scatter-gather table @sg, containing @n_elem | |
2310 | * elements. | |
2311 | * | |
2312 | * LOCKING: | |
2313 | * spin_lock_irqsave(host_set lock) | |
2314 | */ | |
2315 | ||
1da177e4 LT |
2316 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
2317 | unsigned int n_elem) | |
2318 | { | |
2319 | qc->flags |= ATA_QCFLAG_SG; | |
2320 | qc->sg = sg; | |
2321 | qc->n_elem = n_elem; | |
2322 | } | |
2323 | ||
2324 | /** | |
0cba632b JG |
2325 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
2326 | * @qc: Command with memory buffer to be mapped. | |
2327 | * | |
2328 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
2329 | * |
2330 | * LOCKING: | |
2331 | * spin_lock_irqsave(host_set lock) | |
2332 | * | |
2333 | * RETURNS: | |
0cba632b | 2334 | * Zero on success, negative on error. |
1da177e4 LT |
2335 | */ |
2336 | ||
2337 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
2338 | { | |
2339 | struct ata_port *ap = qc->ap; | |
2340 | int dir = qc->dma_dir; | |
2341 | struct scatterlist *sg = qc->sg; | |
2342 | dma_addr_t dma_address; | |
2343 | ||
2344 | dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt, | |
32529e01 | 2345 | sg->length, dir); |
1da177e4 LT |
2346 | if (dma_mapping_error(dma_address)) |
2347 | return -1; | |
2348 | ||
2349 | sg_dma_address(sg) = dma_address; | |
32529e01 | 2350 | sg_dma_len(sg) = sg->length; |
1da177e4 LT |
2351 | |
2352 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), | |
2353 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2354 | ||
2355 | return 0; | |
2356 | } | |
2357 | ||
2358 | /** | |
0cba632b JG |
2359 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
2360 | * @qc: Command with scatter-gather table to be mapped. | |
2361 | * | |
2362 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
2363 | * |
2364 | * LOCKING: | |
2365 | * spin_lock_irqsave(host_set lock) | |
2366 | * | |
2367 | * RETURNS: | |
0cba632b | 2368 | * Zero on success, negative on error. |
1da177e4 LT |
2369 | * |
2370 | */ | |
2371 | ||
2372 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
2373 | { | |
2374 | struct ata_port *ap = qc->ap; | |
2375 | struct scatterlist *sg = qc->sg; | |
2376 | int n_elem, dir; | |
2377 | ||
2378 | VPRINTK("ENTER, ata%u\n", ap->id); | |
2379 | assert(qc->flags & ATA_QCFLAG_SG); | |
2380 | ||
2381 | dir = qc->dma_dir; | |
2382 | n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2383 | if (n_elem < 1) | |
2384 | return -1; | |
2385 | ||
2386 | DPRINTK("%d sg elements mapped\n", n_elem); | |
2387 | ||
2388 | qc->n_elem = n_elem; | |
2389 | ||
2390 | return 0; | |
2391 | } | |
2392 | ||
40e8c82c TH |
2393 | /** |
2394 | * ata_poll_qc_complete - turn irq back on and finish qc | |
2395 | * @qc: Command to complete | |
2396 | * @drv_stat: ATA status register content | |
2397 | * | |
2398 | * LOCKING: | |
2399 | * None. (grabs host lock) | |
2400 | */ | |
2401 | ||
2402 | void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |
2403 | { | |
2404 | struct ata_port *ap = qc->ap; | |
b8f6153e | 2405 | unsigned long flags; |
40e8c82c | 2406 | |
b8f6153e | 2407 | spin_lock_irqsave(&ap->host_set->lock, flags); |
40e8c82c TH |
2408 | ap->flags &= ~ATA_FLAG_NOINTR; |
2409 | ata_irq_on(ap); | |
2410 | ata_qc_complete(qc, drv_stat); | |
b8f6153e | 2411 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
40e8c82c TH |
2412 | } |
2413 | ||
1da177e4 LT |
2414 | /** |
2415 | * ata_pio_poll - | |
2416 | * @ap: | |
2417 | * | |
2418 | * LOCKING: | |
0cba632b | 2419 | * None. (executing in kernel thread context) |
1da177e4 LT |
2420 | * |
2421 | * RETURNS: | |
2422 | * | |
2423 | */ | |
2424 | ||
2425 | static unsigned long ata_pio_poll(struct ata_port *ap) | |
2426 | { | |
2427 | u8 status; | |
2428 | unsigned int poll_state = PIO_ST_UNKNOWN; | |
2429 | unsigned int reg_state = PIO_ST_UNKNOWN; | |
2430 | const unsigned int tmout_state = PIO_ST_TMOUT; | |
2431 | ||
2432 | switch (ap->pio_task_state) { | |
2433 | case PIO_ST: | |
2434 | case PIO_ST_POLL: | |
2435 | poll_state = PIO_ST_POLL; | |
2436 | reg_state = PIO_ST; | |
2437 | break; | |
2438 | case PIO_ST_LAST: | |
2439 | case PIO_ST_LAST_POLL: | |
2440 | poll_state = PIO_ST_LAST_POLL; | |
2441 | reg_state = PIO_ST_LAST; | |
2442 | break; | |
2443 | default: | |
2444 | BUG(); | |
2445 | break; | |
2446 | } | |
2447 | ||
2448 | status = ata_chk_status(ap); | |
2449 | if (status & ATA_BUSY) { | |
2450 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
2451 | ap->pio_task_state = tmout_state; | |
2452 | return 0; | |
2453 | } | |
2454 | ap->pio_task_state = poll_state; | |
2455 | return ATA_SHORT_PAUSE; | |
2456 | } | |
2457 | ||
2458 | ap->pio_task_state = reg_state; | |
2459 | return 0; | |
2460 | } | |
2461 | ||
2462 | /** | |
2463 | * ata_pio_complete - | |
2464 | * @ap: | |
2465 | * | |
2466 | * LOCKING: | |
0cba632b | 2467 | * None. (executing in kernel thread context) |
1da177e4 LT |
2468 | */ |
2469 | ||
2470 | static void ata_pio_complete (struct ata_port *ap) | |
2471 | { | |
2472 | struct ata_queued_cmd *qc; | |
2473 | u8 drv_stat; | |
2474 | ||
2475 | /* | |
31433ea3 AC |
2476 | * This is purely heuristic. This is a fast path. Sometimes when |
2477 | * we enter, BSY will be cleared in a chk-status or two. If not, | |
2478 | * the drive is probably seeking or something. Snooze for a couple | |
2479 | * msecs, then chk-status again. If still busy, fall back to | |
1da177e4 LT |
2480 | * PIO_ST_POLL state. |
2481 | */ | |
2482 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2483 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
2484 | msleep(2); | |
2485 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2486 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
2487 | ap->pio_task_state = PIO_ST_LAST_POLL; | |
2488 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; | |
2489 | return; | |
2490 | } | |
2491 | } | |
2492 | ||
2493 | drv_stat = ata_wait_idle(ap); | |
2494 | if (!ata_ok(drv_stat)) { | |
2495 | ap->pio_task_state = PIO_ST_ERR; | |
2496 | return; | |
2497 | } | |
2498 | ||
2499 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2500 | assert(qc != NULL); | |
2501 | ||
2502 | ap->pio_task_state = PIO_ST_IDLE; | |
2503 | ||
40e8c82c | 2504 | ata_poll_qc_complete(qc, drv_stat); |
1da177e4 LT |
2505 | } |
2506 | ||
0baab86b EF |
2507 | |
2508 | /** | |
2509 | * swap_buf_le16 - | |
2510 | * @buf: Buffer to swap | |
2511 | * @buf_words: Number of 16-bit words in buffer. | |
2512 | * | |
2513 | * Swap halves of 16-bit words if needed to convert from | |
2514 | * little-endian byte order to native cpu byte order, or | |
2515 | * vice-versa. | |
2516 | * | |
2517 | * LOCKING: | |
2518 | */ | |
1da177e4 LT |
2519 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
2520 | { | |
2521 | #ifdef __BIG_ENDIAN | |
2522 | unsigned int i; | |
2523 | ||
2524 | for (i = 0; i < buf_words; i++) | |
2525 | buf[i] = le16_to_cpu(buf[i]); | |
2526 | #endif /* __BIG_ENDIAN */ | |
2527 | } | |
2528 | ||
6ae4cfb5 AL |
2529 | /** |
2530 | * ata_mmio_data_xfer - Transfer data by MMIO | |
2531 | * @ap: port to read/write | |
2532 | * @buf: data buffer | |
2533 | * @buflen: buffer length | |
344babaa | 2534 | * @write_data: read/write |
6ae4cfb5 AL |
2535 | * |
2536 | * Transfer data from/to the device data register by MMIO. | |
2537 | * | |
2538 | * LOCKING: | |
2539 | * Inherited from caller. | |
2540 | * | |
2541 | */ | |
2542 | ||
1da177e4 LT |
2543 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2544 | unsigned int buflen, int write_data) | |
2545 | { | |
2546 | unsigned int i; | |
2547 | unsigned int words = buflen >> 1; | |
2548 | u16 *buf16 = (u16 *) buf; | |
2549 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
2550 | ||
6ae4cfb5 | 2551 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
2552 | if (write_data) { |
2553 | for (i = 0; i < words; i++) | |
2554 | writew(le16_to_cpu(buf16[i]), mmio); | |
2555 | } else { | |
2556 | for (i = 0; i < words; i++) | |
2557 | buf16[i] = cpu_to_le16(readw(mmio)); | |
2558 | } | |
6ae4cfb5 AL |
2559 | |
2560 | /* Transfer trailing 1 byte, if any. */ | |
2561 | if (unlikely(buflen & 0x01)) { | |
2562 | u16 align_buf[1] = { 0 }; | |
2563 | unsigned char *trailing_buf = buf + buflen - 1; | |
2564 | ||
2565 | if (write_data) { | |
2566 | memcpy(align_buf, trailing_buf, 1); | |
2567 | writew(le16_to_cpu(align_buf[0]), mmio); | |
2568 | } else { | |
2569 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
2570 | memcpy(trailing_buf, align_buf, 1); | |
2571 | } | |
2572 | } | |
1da177e4 LT |
2573 | } |
2574 | ||
6ae4cfb5 AL |
2575 | /** |
2576 | * ata_pio_data_xfer - Transfer data by PIO | |
2577 | * @ap: port to read/write | |
2578 | * @buf: data buffer | |
2579 | * @buflen: buffer length | |
344babaa | 2580 | * @write_data: read/write |
6ae4cfb5 AL |
2581 | * |
2582 | * Transfer data from/to the device data register by PIO. | |
2583 | * | |
2584 | * LOCKING: | |
2585 | * Inherited from caller. | |
2586 | * | |
2587 | */ | |
2588 | ||
1da177e4 LT |
2589 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2590 | unsigned int buflen, int write_data) | |
2591 | { | |
6ae4cfb5 | 2592 | unsigned int words = buflen >> 1; |
1da177e4 | 2593 | |
6ae4cfb5 | 2594 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 2595 | if (write_data) |
6ae4cfb5 | 2596 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 2597 | else |
6ae4cfb5 AL |
2598 | insw(ap->ioaddr.data_addr, buf, words); |
2599 | ||
2600 | /* Transfer trailing 1 byte, if any. */ | |
2601 | if (unlikely(buflen & 0x01)) { | |
2602 | u16 align_buf[1] = { 0 }; | |
2603 | unsigned char *trailing_buf = buf + buflen - 1; | |
2604 | ||
2605 | if (write_data) { | |
2606 | memcpy(align_buf, trailing_buf, 1); | |
2607 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
2608 | } else { | |
2609 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
2610 | memcpy(trailing_buf, align_buf, 1); | |
2611 | } | |
2612 | } | |
1da177e4 LT |
2613 | } |
2614 | ||
6ae4cfb5 AL |
2615 | /** |
2616 | * ata_data_xfer - Transfer data from/to the data register. | |
2617 | * @ap: port to read/write | |
2618 | * @buf: data buffer | |
2619 | * @buflen: buffer length | |
2620 | * @do_write: read/write | |
2621 | * | |
2622 | * Transfer data from/to the device data register. | |
2623 | * | |
2624 | * LOCKING: | |
2625 | * Inherited from caller. | |
2626 | * | |
2627 | */ | |
2628 | ||
1da177e4 LT |
2629 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
2630 | unsigned int buflen, int do_write) | |
2631 | { | |
2632 | if (ap->flags & ATA_FLAG_MMIO) | |
2633 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
2634 | else | |
2635 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
2636 | } | |
2637 | ||
6ae4cfb5 AL |
2638 | /** |
2639 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
2640 | * @qc: Command on going | |
2641 | * | |
2642 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
2643 | * | |
2644 | * LOCKING: | |
2645 | * Inherited from caller. | |
2646 | */ | |
2647 | ||
1da177e4 LT |
2648 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
2649 | { | |
2650 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2651 | struct scatterlist *sg = qc->sg; | |
2652 | struct ata_port *ap = qc->ap; | |
2653 | struct page *page; | |
2654 | unsigned int offset; | |
2655 | unsigned char *buf; | |
2656 | ||
2657 | if (qc->cursect == (qc->nsect - 1)) | |
2658 | ap->pio_task_state = PIO_ST_LAST; | |
2659 | ||
2660 | page = sg[qc->cursg].page; | |
2661 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
2662 | ||
2663 | /* get the current page and offset */ | |
2664 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2665 | offset %= PAGE_SIZE; | |
2666 | ||
2667 | buf = kmap(page) + offset; | |
2668 | ||
2669 | qc->cursect++; | |
2670 | qc->cursg_ofs++; | |
2671 | ||
32529e01 | 2672 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
2673 | qc->cursg++; |
2674 | qc->cursg_ofs = 0; | |
2675 | } | |
2676 | ||
2677 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2678 | ||
2679 | /* do the actual data transfer */ | |
2680 | do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2681 | ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write); | |
2682 | ||
2683 | kunmap(page); | |
2684 | } | |
2685 | ||
6ae4cfb5 AL |
2686 | /** |
2687 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
2688 | * @qc: Command on going | |
2689 | * @bytes: number of bytes | |
2690 | * | |
2691 | * Transfer Transfer data from/to the ATAPI device. | |
2692 | * | |
2693 | * LOCKING: | |
2694 | * Inherited from caller. | |
2695 | * | |
2696 | */ | |
2697 | ||
1da177e4 LT |
2698 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
2699 | { | |
2700 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2701 | struct scatterlist *sg = qc->sg; | |
2702 | struct ata_port *ap = qc->ap; | |
2703 | struct page *page; | |
2704 | unsigned char *buf; | |
2705 | unsigned int offset, count; | |
2706 | ||
563a6e1f | 2707 | if (qc->curbytes + bytes >= qc->nbytes) |
1da177e4 LT |
2708 | ap->pio_task_state = PIO_ST_LAST; |
2709 | ||
2710 | next_sg: | |
563a6e1f AL |
2711 | if (unlikely(qc->cursg >= qc->n_elem)) { |
2712 | /* | |
2713 | * The end of qc->sg is reached and the device expects | |
2714 | * more data to transfer. In order not to overrun qc->sg | |
2715 | * and fulfill length specified in the byte count register, | |
2716 | * - for read case, discard trailing data from the device | |
2717 | * - for write case, padding zero data to the device | |
2718 | */ | |
2719 | u16 pad_buf[1] = { 0 }; | |
2720 | unsigned int words = bytes >> 1; | |
2721 | unsigned int i; | |
2722 | ||
2723 | if (words) /* warning if bytes > 1 */ | |
2724 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", | |
2725 | ap->id, bytes); | |
2726 | ||
2727 | for (i = 0; i < words; i++) | |
2728 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | |
2729 | ||
2730 | ap->pio_task_state = PIO_ST_LAST; | |
2731 | return; | |
2732 | } | |
2733 | ||
1da177e4 LT |
2734 | sg = &qc->sg[qc->cursg]; |
2735 | ||
1da177e4 LT |
2736 | page = sg->page; |
2737 | offset = sg->offset + qc->cursg_ofs; | |
2738 | ||
2739 | /* get the current page and offset */ | |
2740 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2741 | offset %= PAGE_SIZE; | |
2742 | ||
6952df03 | 2743 | /* don't overrun current sg */ |
32529e01 | 2744 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
2745 | |
2746 | /* don't cross page boundaries */ | |
2747 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
2748 | ||
2749 | buf = kmap(page) + offset; | |
2750 | ||
2751 | bytes -= count; | |
2752 | qc->curbytes += count; | |
2753 | qc->cursg_ofs += count; | |
2754 | ||
32529e01 | 2755 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
2756 | qc->cursg++; |
2757 | qc->cursg_ofs = 0; | |
2758 | } | |
2759 | ||
2760 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2761 | ||
2762 | /* do the actual data transfer */ | |
2763 | ata_data_xfer(ap, buf, count, do_write); | |
2764 | ||
2765 | kunmap(page); | |
2766 | ||
563a6e1f | 2767 | if (bytes) |
1da177e4 | 2768 | goto next_sg; |
1da177e4 LT |
2769 | } |
2770 | ||
6ae4cfb5 AL |
2771 | /** |
2772 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
2773 | * @qc: Command on going | |
2774 | * | |
2775 | * Transfer Transfer data from/to the ATAPI device. | |
2776 | * | |
2777 | * LOCKING: | |
2778 | * Inherited from caller. | |
2779 | * | |
2780 | */ | |
2781 | ||
1da177e4 LT |
2782 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
2783 | { | |
2784 | struct ata_port *ap = qc->ap; | |
2785 | struct ata_device *dev = qc->dev; | |
2786 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
2787 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
2788 | ||
2789 | ap->ops->tf_read(ap, &qc->tf); | |
2790 | ireason = qc->tf.nsect; | |
2791 | bc_lo = qc->tf.lbam; | |
2792 | bc_hi = qc->tf.lbah; | |
2793 | bytes = (bc_hi << 8) | bc_lo; | |
2794 | ||
2795 | /* shall be cleared to zero, indicating xfer of data */ | |
2796 | if (ireason & (1 << 0)) | |
2797 | goto err_out; | |
2798 | ||
2799 | /* make sure transfer direction matches expected */ | |
2800 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
2801 | if (do_write != i_write) | |
2802 | goto err_out; | |
2803 | ||
2804 | __atapi_pio_bytes(qc, bytes); | |
2805 | ||
2806 | return; | |
2807 | ||
2808 | err_out: | |
2809 | printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", | |
2810 | ap->id, dev->devno); | |
2811 | ap->pio_task_state = PIO_ST_ERR; | |
2812 | } | |
2813 | ||
2814 | /** | |
2815 | * ata_pio_sector - | |
2816 | * @ap: | |
2817 | * | |
2818 | * LOCKING: | |
0cba632b | 2819 | * None. (executing in kernel thread context) |
1da177e4 LT |
2820 | */ |
2821 | ||
2822 | static void ata_pio_block(struct ata_port *ap) | |
2823 | { | |
2824 | struct ata_queued_cmd *qc; | |
2825 | u8 status; | |
2826 | ||
2827 | /* | |
2828 | * This is purely hueristic. This is a fast path. | |
2829 | * Sometimes when we enter, BSY will be cleared in | |
2830 | * a chk-status or two. If not, the drive is probably seeking | |
2831 | * or something. Snooze for a couple msecs, then | |
2832 | * chk-status again. If still busy, fall back to | |
2833 | * PIO_ST_POLL state. | |
2834 | */ | |
2835 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
2836 | if (status & ATA_BUSY) { | |
2837 | msleep(2); | |
2838 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
2839 | if (status & ATA_BUSY) { | |
2840 | ap->pio_task_state = PIO_ST_POLL; | |
2841 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; | |
2842 | return; | |
2843 | } | |
2844 | } | |
2845 | ||
2846 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2847 | assert(qc != NULL); | |
2848 | ||
2849 | if (is_atapi_taskfile(&qc->tf)) { | |
2850 | /* no more data to transfer or unsupported ATAPI command */ | |
2851 | if ((status & ATA_DRQ) == 0) { | |
2852 | ap->pio_task_state = PIO_ST_IDLE; | |
2853 | ||
40e8c82c | 2854 | ata_poll_qc_complete(qc, status); |
1da177e4 LT |
2855 | return; |
2856 | } | |
2857 | ||
2858 | atapi_pio_bytes(qc); | |
2859 | } else { | |
2860 | /* handle BSY=0, DRQ=0 as error */ | |
2861 | if ((status & ATA_DRQ) == 0) { | |
2862 | ap->pio_task_state = PIO_ST_ERR; | |
2863 | return; | |
2864 | } | |
2865 | ||
2866 | ata_pio_sector(qc); | |
2867 | } | |
2868 | } | |
2869 | ||
2870 | static void ata_pio_error(struct ata_port *ap) | |
2871 | { | |
2872 | struct ata_queued_cmd *qc; | |
2873 | u8 drv_stat; | |
2874 | ||
2875 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2876 | assert(qc != NULL); | |
2877 | ||
2878 | drv_stat = ata_chk_status(ap); | |
2879 | printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n", | |
2880 | ap->id, drv_stat); | |
2881 | ||
2882 | ap->pio_task_state = PIO_ST_IDLE; | |
2883 | ||
40e8c82c | 2884 | ata_poll_qc_complete(qc, drv_stat | ATA_ERR); |
1da177e4 LT |
2885 | } |
2886 | ||
2887 | static void ata_pio_task(void *_data) | |
2888 | { | |
2889 | struct ata_port *ap = _data; | |
2890 | unsigned long timeout = 0; | |
2891 | ||
2892 | switch (ap->pio_task_state) { | |
2893 | case PIO_ST_IDLE: | |
2894 | return; | |
2895 | ||
2896 | case PIO_ST: | |
2897 | ata_pio_block(ap); | |
2898 | break; | |
2899 | ||
2900 | case PIO_ST_LAST: | |
2901 | ata_pio_complete(ap); | |
2902 | break; | |
2903 | ||
2904 | case PIO_ST_POLL: | |
2905 | case PIO_ST_LAST_POLL: | |
2906 | timeout = ata_pio_poll(ap); | |
2907 | break; | |
2908 | ||
2909 | case PIO_ST_TMOUT: | |
2910 | case PIO_ST_ERR: | |
2911 | ata_pio_error(ap); | |
2912 | return; | |
2913 | } | |
2914 | ||
2915 | if (timeout) | |
2916 | queue_delayed_work(ata_wq, &ap->pio_task, | |
2917 | timeout); | |
2918 | else | |
2919 | queue_work(ata_wq, &ap->pio_task); | |
2920 | } | |
2921 | ||
2922 | static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev, | |
2923 | struct scsi_cmnd *cmd) | |
2924 | { | |
2925 | DECLARE_COMPLETION(wait); | |
2926 | struct ata_queued_cmd *qc; | |
2927 | unsigned long flags; | |
2928 | int rc; | |
2929 | ||
2930 | DPRINTK("ATAPI request sense\n"); | |
2931 | ||
2932 | qc = ata_qc_new_init(ap, dev); | |
2933 | BUG_ON(qc == NULL); | |
2934 | ||
2935 | /* FIXME: is this needed? */ | |
2936 | memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer)); | |
2937 | ||
2938 | ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer)); | |
2939 | qc->dma_dir = DMA_FROM_DEVICE; | |
2940 | ||
21b1ed74 | 2941 | memset(&qc->cdb, 0, ap->cdb_len); |
1da177e4 LT |
2942 | qc->cdb[0] = REQUEST_SENSE; |
2943 | qc->cdb[4] = SCSI_SENSE_BUFFERSIZE; | |
2944 | ||
2945 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2946 | qc->tf.command = ATA_CMD_PACKET; | |
2947 | ||
2948 | qc->tf.protocol = ATA_PROT_ATAPI; | |
2949 | qc->tf.lbam = (8 * 1024) & 0xff; | |
2950 | qc->tf.lbah = (8 * 1024) >> 8; | |
2951 | qc->nbytes = SCSI_SENSE_BUFFERSIZE; | |
2952 | ||
2953 | qc->waiting = &wait; | |
2954 | qc->complete_fn = ata_qc_complete_noop; | |
2955 | ||
2956 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2957 | rc = ata_qc_issue(qc); | |
2958 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2959 | ||
2960 | if (rc) | |
2961 | ata_port_disable(ap); | |
2962 | else | |
2963 | wait_for_completion(&wait); | |
2964 | ||
2965 | DPRINTK("EXIT\n"); | |
2966 | } | |
2967 | ||
2968 | /** | |
2969 | * ata_qc_timeout - Handle timeout of queued command | |
2970 | * @qc: Command that timed out | |
2971 | * | |
2972 | * Some part of the kernel (currently, only the SCSI layer) | |
2973 | * has noticed that the active command on port @ap has not | |
2974 | * completed after a specified length of time. Handle this | |
2975 | * condition by disabling DMA (if necessary) and completing | |
2976 | * transactions, with error if necessary. | |
2977 | * | |
2978 | * This also handles the case of the "lost interrupt", where | |
2979 | * for some reason (possibly hardware bug, possibly driver bug) | |
2980 | * an interrupt was not delivered to the driver, even though the | |
2981 | * transaction completed successfully. | |
2982 | * | |
2983 | * LOCKING: | |
0cba632b | 2984 | * Inherited from SCSI layer (none, can sleep) |
1da177e4 LT |
2985 | */ |
2986 | ||
2987 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | |
2988 | { | |
2989 | struct ata_port *ap = qc->ap; | |
b8f6153e | 2990 | struct ata_host_set *host_set = ap->host_set; |
1da177e4 LT |
2991 | struct ata_device *dev = qc->dev; |
2992 | u8 host_stat = 0, drv_stat; | |
b8f6153e | 2993 | unsigned long flags; |
1da177e4 LT |
2994 | |
2995 | DPRINTK("ENTER\n"); | |
2996 | ||
2997 | /* FIXME: doesn't this conflict with timeout handling? */ | |
2998 | if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) { | |
2999 | struct scsi_cmnd *cmd = qc->scsicmd; | |
3000 | ||
3111b0d1 | 3001 | if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) { |
1da177e4 LT |
3002 | |
3003 | /* finish completing original command */ | |
b8f6153e | 3004 | spin_lock_irqsave(&host_set->lock, flags); |
1da177e4 | 3005 | __ata_qc_complete(qc); |
b8f6153e | 3006 | spin_unlock_irqrestore(&host_set->lock, flags); |
1da177e4 LT |
3007 | |
3008 | atapi_request_sense(ap, dev, cmd); | |
3009 | ||
3010 | cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16); | |
3011 | scsi_finish_command(cmd); | |
3012 | ||
3013 | goto out; | |
3014 | } | |
3015 | } | |
3016 | ||
b8f6153e JG |
3017 | spin_lock_irqsave(&host_set->lock, flags); |
3018 | ||
1da177e4 LT |
3019 | /* hack alert! We cannot use the supplied completion |
3020 | * function from inside the ->eh_strategy_handler() thread. | |
3021 | * libata is the only user of ->eh_strategy_handler() in | |
3022 | * any kernel, so the default scsi_done() assumes it is | |
3023 | * not being called from the SCSI EH. | |
3024 | */ | |
3025 | qc->scsidone = scsi_finish_command; | |
3026 | ||
3027 | switch (qc->tf.protocol) { | |
3028 | ||
3029 | case ATA_PROT_DMA: | |
3030 | case ATA_PROT_ATAPI_DMA: | |
3031 | host_stat = ap->ops->bmdma_status(ap); | |
3032 | ||
3033 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3034 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
3035 | |
3036 | /* fall through */ | |
3037 | ||
3038 | default: | |
3039 | ata_altstatus(ap); | |
3040 | drv_stat = ata_chk_status(ap); | |
3041 | ||
3042 | /* ack bmdma irq events */ | |
3043 | ap->ops->irq_clear(ap); | |
3044 | ||
3045 | printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n", | |
3046 | ap->id, qc->tf.command, drv_stat, host_stat); | |
3047 | ||
3048 | /* complete taskfile transaction */ | |
3049 | ata_qc_complete(qc, drv_stat); | |
3050 | break; | |
3051 | } | |
b8f6153e JG |
3052 | |
3053 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3054 | ||
1da177e4 LT |
3055 | out: |
3056 | DPRINTK("EXIT\n"); | |
3057 | } | |
3058 | ||
3059 | /** | |
3060 | * ata_eng_timeout - Handle timeout of queued command | |
3061 | * @ap: Port on which timed-out command is active | |
3062 | * | |
3063 | * Some part of the kernel (currently, only the SCSI layer) | |
3064 | * has noticed that the active command on port @ap has not | |
3065 | * completed after a specified length of time. Handle this | |
3066 | * condition by disabling DMA (if necessary) and completing | |
3067 | * transactions, with error if necessary. | |
3068 | * | |
3069 | * This also handles the case of the "lost interrupt", where | |
3070 | * for some reason (possibly hardware bug, possibly driver bug) | |
3071 | * an interrupt was not delivered to the driver, even though the | |
3072 | * transaction completed successfully. | |
3073 | * | |
3074 | * LOCKING: | |
3075 | * Inherited from SCSI layer (none, can sleep) | |
3076 | */ | |
3077 | ||
3078 | void ata_eng_timeout(struct ata_port *ap) | |
3079 | { | |
3080 | struct ata_queued_cmd *qc; | |
3081 | ||
3082 | DPRINTK("ENTER\n"); | |
3083 | ||
3084 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3085 | if (!qc) { | |
3086 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", | |
3087 | ap->id); | |
3088 | goto out; | |
3089 | } | |
3090 | ||
3091 | ata_qc_timeout(qc); | |
3092 | ||
3093 | out: | |
3094 | DPRINTK("EXIT\n"); | |
3095 | } | |
3096 | ||
3097 | /** | |
3098 | * ata_qc_new - Request an available ATA command, for queueing | |
3099 | * @ap: Port associated with device @dev | |
3100 | * @dev: Device from whom we request an available command structure | |
3101 | * | |
3102 | * LOCKING: | |
0cba632b | 3103 | * None. |
1da177e4 LT |
3104 | */ |
3105 | ||
3106 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
3107 | { | |
3108 | struct ata_queued_cmd *qc = NULL; | |
3109 | unsigned int i; | |
3110 | ||
3111 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
3112 | if (!test_and_set_bit(i, &ap->qactive)) { | |
3113 | qc = ata_qc_from_tag(ap, i); | |
3114 | break; | |
3115 | } | |
3116 | ||
3117 | if (qc) | |
3118 | qc->tag = i; | |
3119 | ||
3120 | return qc; | |
3121 | } | |
3122 | ||
3123 | /** | |
3124 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
3125 | * @ap: Port associated with device @dev | |
3126 | * @dev: Device from whom we request an available command structure | |
3127 | * | |
3128 | * LOCKING: | |
0cba632b | 3129 | * None. |
1da177e4 LT |
3130 | */ |
3131 | ||
3132 | struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | |
3133 | struct ata_device *dev) | |
3134 | { | |
3135 | struct ata_queued_cmd *qc; | |
3136 | ||
3137 | qc = ata_qc_new(ap); | |
3138 | if (qc) { | |
3139 | qc->sg = NULL; | |
3140 | qc->flags = 0; | |
3141 | qc->scsicmd = NULL; | |
3142 | qc->ap = ap; | |
3143 | qc->dev = dev; | |
3144 | qc->cursect = qc->cursg = qc->cursg_ofs = 0; | |
3145 | qc->nsect = 0; | |
3146 | qc->nbytes = qc->curbytes = 0; | |
3147 | ||
3148 | ata_tf_init(ap, &qc->tf, dev->devno); | |
3149 | ||
3150 | if (dev->flags & ATA_DFLAG_LBA48) | |
3151 | qc->tf.flags |= ATA_TFLAG_LBA48; | |
3152 | } | |
3153 | ||
3154 | return qc; | |
3155 | } | |
3156 | ||
3157 | static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat) | |
3158 | { | |
3159 | return 0; | |
3160 | } | |
3161 | ||
3162 | static void __ata_qc_complete(struct ata_queued_cmd *qc) | |
3163 | { | |
3164 | struct ata_port *ap = qc->ap; | |
3165 | unsigned int tag, do_clear = 0; | |
3166 | ||
3167 | qc->flags = 0; | |
3168 | tag = qc->tag; | |
3169 | if (likely(ata_tag_valid(tag))) { | |
3170 | if (tag == ap->active_tag) | |
3171 | ap->active_tag = ATA_TAG_POISON; | |
3172 | qc->tag = ATA_TAG_POISON; | |
3173 | do_clear = 1; | |
3174 | } | |
3175 | ||
3176 | if (qc->waiting) { | |
3177 | struct completion *waiting = qc->waiting; | |
3178 | qc->waiting = NULL; | |
3179 | complete(waiting); | |
3180 | } | |
3181 | ||
3182 | if (likely(do_clear)) | |
3183 | clear_bit(tag, &ap->qactive); | |
3184 | } | |
3185 | ||
3186 | /** | |
3187 | * ata_qc_free - free unused ata_queued_cmd | |
3188 | * @qc: Command to complete | |
3189 | * | |
3190 | * Designed to free unused ata_queued_cmd object | |
3191 | * in case something prevents using it. | |
3192 | * | |
3193 | * LOCKING: | |
0cba632b | 3194 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3195 | * |
3196 | */ | |
3197 | void ata_qc_free(struct ata_queued_cmd *qc) | |
3198 | { | |
3199 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3200 | assert(qc->waiting == NULL); /* nothing should be waiting */ | |
3201 | ||
3202 | __ata_qc_complete(qc); | |
3203 | } | |
3204 | ||
3205 | /** | |
3206 | * ata_qc_complete - Complete an active ATA command | |
3207 | * @qc: Command to complete | |
0cba632b JG |
3208 | * @drv_stat: ATA Status register contents |
3209 | * | |
3210 | * Indicate to the mid and upper layers that an ATA | |
3211 | * command has completed, with either an ok or not-ok status. | |
1da177e4 LT |
3212 | * |
3213 | * LOCKING: | |
0cba632b | 3214 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3215 | * |
3216 | */ | |
3217 | ||
3218 | void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |
3219 | { | |
3220 | int rc; | |
3221 | ||
3222 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3223 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3224 | ||
3225 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3226 | ata_sg_clean(qc); | |
3227 | ||
3f3791d3 AL |
3228 | /* atapi: mark qc as inactive to prevent the interrupt handler |
3229 | * from completing the command twice later, before the error handler | |
3230 | * is called. (when rc != 0 and atapi request sense is needed) | |
3231 | */ | |
3232 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
3233 | ||
1da177e4 LT |
3234 | /* call completion callback */ |
3235 | rc = qc->complete_fn(qc, drv_stat); | |
3236 | ||
3237 | /* if callback indicates not to complete command (non-zero), | |
3238 | * return immediately | |
3239 | */ | |
3240 | if (rc != 0) | |
3241 | return; | |
3242 | ||
3243 | __ata_qc_complete(qc); | |
3244 | ||
3245 | VPRINTK("EXIT\n"); | |
3246 | } | |
3247 | ||
3248 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
3249 | { | |
3250 | struct ata_port *ap = qc->ap; | |
3251 | ||
3252 | switch (qc->tf.protocol) { | |
3253 | case ATA_PROT_DMA: | |
3254 | case ATA_PROT_ATAPI_DMA: | |
3255 | return 1; | |
3256 | ||
3257 | case ATA_PROT_ATAPI: | |
3258 | case ATA_PROT_PIO: | |
3259 | case ATA_PROT_PIO_MULT: | |
3260 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
3261 | return 1; | |
3262 | ||
3263 | /* fall through */ | |
3264 | ||
3265 | default: | |
3266 | return 0; | |
3267 | } | |
3268 | ||
3269 | /* never reached */ | |
3270 | } | |
3271 | ||
3272 | /** | |
3273 | * ata_qc_issue - issue taskfile to device | |
3274 | * @qc: command to issue to device | |
3275 | * | |
3276 | * Prepare an ATA command to submission to device. | |
3277 | * This includes mapping the data into a DMA-able | |
3278 | * area, filling in the S/G table, and finally | |
3279 | * writing the taskfile to hardware, starting the command. | |
3280 | * | |
3281 | * LOCKING: | |
3282 | * spin_lock_irqsave(host_set lock) | |
3283 | * | |
3284 | * RETURNS: | |
3285 | * Zero on success, negative on error. | |
3286 | */ | |
3287 | ||
3288 | int ata_qc_issue(struct ata_queued_cmd *qc) | |
3289 | { | |
3290 | struct ata_port *ap = qc->ap; | |
3291 | ||
3292 | if (ata_should_dma_map(qc)) { | |
3293 | if (qc->flags & ATA_QCFLAG_SG) { | |
3294 | if (ata_sg_setup(qc)) | |
3295 | goto err_out; | |
3296 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { | |
3297 | if (ata_sg_setup_one(qc)) | |
3298 | goto err_out; | |
3299 | } | |
3300 | } else { | |
3301 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
3302 | } | |
3303 | ||
3304 | ap->ops->qc_prep(qc); | |
3305 | ||
3306 | qc->ap->active_tag = qc->tag; | |
3307 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
3308 | ||
3309 | return ap->ops->qc_issue(qc); | |
3310 | ||
3311 | err_out: | |
3312 | return -1; | |
3313 | } | |
3314 | ||
0baab86b | 3315 | |
1da177e4 LT |
3316 | /** |
3317 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
3318 | * @qc: command to issue to device | |
3319 | * | |
3320 | * Using various libata functions and hooks, this function | |
3321 | * starts an ATA command. ATA commands are grouped into | |
3322 | * classes called "protocols", and issuing each type of protocol | |
3323 | * is slightly different. | |
3324 | * | |
0baab86b EF |
3325 | * May be used as the qc_issue() entry in ata_port_operations. |
3326 | * | |
1da177e4 LT |
3327 | * LOCKING: |
3328 | * spin_lock_irqsave(host_set lock) | |
3329 | * | |
3330 | * RETURNS: | |
3331 | * Zero on success, negative on error. | |
3332 | */ | |
3333 | ||
3334 | int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |
3335 | { | |
3336 | struct ata_port *ap = qc->ap; | |
3337 | ||
3338 | ata_dev_select(ap, qc->dev->devno, 1, 0); | |
3339 | ||
3340 | switch (qc->tf.protocol) { | |
3341 | case ATA_PROT_NODATA: | |
3342 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3343 | break; | |
3344 | ||
3345 | case ATA_PROT_DMA: | |
3346 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
3347 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3348 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3349 | break; | |
3350 | ||
3351 | case ATA_PROT_PIO: /* load tf registers, initiate polling pio */ | |
3352 | ata_qc_set_polling(qc); | |
3353 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3354 | ap->pio_task_state = PIO_ST; | |
3355 | queue_work(ata_wq, &ap->pio_task); | |
3356 | break; | |
3357 | ||
3358 | case ATA_PROT_ATAPI: | |
3359 | ata_qc_set_polling(qc); | |
3360 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3361 | queue_work(ata_wq, &ap->packet_task); | |
3362 | break; | |
3363 | ||
3364 | case ATA_PROT_ATAPI_NODATA: | |
c1389503 | 3365 | ap->flags |= ATA_FLAG_NOINTR; |
1da177e4 LT |
3366 | ata_tf_to_host_nolock(ap, &qc->tf); |
3367 | queue_work(ata_wq, &ap->packet_task); | |
3368 | break; | |
3369 | ||
3370 | case ATA_PROT_ATAPI_DMA: | |
c1389503 | 3371 | ap->flags |= ATA_FLAG_NOINTR; |
1da177e4 LT |
3372 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
3373 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3374 | queue_work(ata_wq, &ap->packet_task); | |
3375 | break; | |
3376 | ||
3377 | default: | |
3378 | WARN_ON(1); | |
3379 | return -1; | |
3380 | } | |
3381 | ||
3382 | return 0; | |
3383 | } | |
3384 | ||
3385 | /** | |
0baab86b | 3386 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction |
1da177e4 LT |
3387 | * @qc: Info associated with this ATA transaction. |
3388 | * | |
3389 | * LOCKING: | |
3390 | * spin_lock_irqsave(host_set lock) | |
3391 | */ | |
3392 | ||
3393 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |
3394 | { | |
3395 | struct ata_port *ap = qc->ap; | |
3396 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3397 | u8 dmactl; | |
3398 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3399 | ||
3400 | /* load PRD table addr. */ | |
3401 | mb(); /* make sure PRD table writes are visible to controller */ | |
3402 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); | |
3403 | ||
3404 | /* specify data direction, triple-check start bit is clear */ | |
3405 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3406 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3407 | if (!rw) | |
3408 | dmactl |= ATA_DMA_WR; | |
3409 | writeb(dmactl, mmio + ATA_DMA_CMD); | |
3410 | ||
3411 | /* issue r/w command */ | |
3412 | ap->ops->exec_command(ap, &qc->tf); | |
3413 | } | |
3414 | ||
3415 | /** | |
b73fc89f | 3416 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction |
1da177e4 LT |
3417 | * @qc: Info associated with this ATA transaction. |
3418 | * | |
3419 | * LOCKING: | |
3420 | * spin_lock_irqsave(host_set lock) | |
3421 | */ | |
3422 | ||
3423 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) | |
3424 | { | |
3425 | struct ata_port *ap = qc->ap; | |
3426 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3427 | u8 dmactl; | |
3428 | ||
3429 | /* start host DMA transaction */ | |
3430 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3431 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | |
3432 | ||
3433 | /* Strictly, one may wish to issue a readb() here, to | |
3434 | * flush the mmio write. However, control also passes | |
3435 | * to the hardware at this point, and it will interrupt | |
3436 | * us when we are to resume control. So, in effect, | |
3437 | * we don't care when the mmio write flushes. | |
3438 | * Further, a read of the DMA status register _immediately_ | |
3439 | * following the write may not be what certain flaky hardware | |
3440 | * is expected, so I think it is best to not add a readb() | |
3441 | * without first all the MMIO ATA cards/mobos. | |
3442 | * Or maybe I'm just being paranoid. | |
3443 | */ | |
3444 | } | |
3445 | ||
3446 | /** | |
3447 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) | |
3448 | * @qc: Info associated with this ATA transaction. | |
3449 | * | |
3450 | * LOCKING: | |
3451 | * spin_lock_irqsave(host_set lock) | |
3452 | */ | |
3453 | ||
3454 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) | |
3455 | { | |
3456 | struct ata_port *ap = qc->ap; | |
3457 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3458 | u8 dmactl; | |
3459 | ||
3460 | /* load PRD table addr. */ | |
3461 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); | |
3462 | ||
3463 | /* specify data direction, triple-check start bit is clear */ | |
3464 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3465 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3466 | if (!rw) | |
3467 | dmactl |= ATA_DMA_WR; | |
3468 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3469 | ||
3470 | /* issue r/w command */ | |
3471 | ap->ops->exec_command(ap, &qc->tf); | |
3472 | } | |
3473 | ||
3474 | /** | |
3475 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) | |
3476 | * @qc: Info associated with this ATA transaction. | |
3477 | * | |
3478 | * LOCKING: | |
3479 | * spin_lock_irqsave(host_set lock) | |
3480 | */ | |
3481 | ||
3482 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) | |
3483 | { | |
3484 | struct ata_port *ap = qc->ap; | |
3485 | u8 dmactl; | |
3486 | ||
3487 | /* start host DMA transaction */ | |
3488 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3489 | outb(dmactl | ATA_DMA_START, | |
3490 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3491 | } | |
3492 | ||
0baab86b EF |
3493 | |
3494 | /** | |
3495 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
3496 | * @qc: Info associated with this ATA transaction. | |
3497 | * | |
3498 | * Writes the ATA_DMA_START flag to the DMA command register. | |
3499 | * | |
3500 | * May be used as the bmdma_start() entry in ata_port_operations. | |
3501 | * | |
3502 | * LOCKING: | |
3503 | * spin_lock_irqsave(host_set lock) | |
3504 | */ | |
1da177e4 LT |
3505 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
3506 | { | |
3507 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3508 | ata_bmdma_start_mmio(qc); | |
3509 | else | |
3510 | ata_bmdma_start_pio(qc); | |
3511 | } | |
3512 | ||
0baab86b EF |
3513 | |
3514 | /** | |
3515 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction | |
3516 | * @qc: Info associated with this ATA transaction. | |
3517 | * | |
3518 | * Writes address of PRD table to device's PRD Table Address | |
3519 | * register, sets the DMA control register, and calls | |
3520 | * ops->exec_command() to start the transfer. | |
3521 | * | |
3522 | * May be used as the bmdma_setup() entry in ata_port_operations. | |
3523 | * | |
3524 | * LOCKING: | |
3525 | * spin_lock_irqsave(host_set lock) | |
3526 | */ | |
1da177e4 LT |
3527 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
3528 | { | |
3529 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3530 | ata_bmdma_setup_mmio(qc); | |
3531 | else | |
3532 | ata_bmdma_setup_pio(qc); | |
3533 | } | |
3534 | ||
0baab86b EF |
3535 | |
3536 | /** | |
3537 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | |
decc6d0b | 3538 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3539 | * |
3540 | * Clear interrupt and error flags in DMA status register. | |
3541 | * | |
3542 | * May be used as the irq_clear() entry in ata_port_operations. | |
3543 | * | |
3544 | * LOCKING: | |
3545 | * spin_lock_irqsave(host_set lock) | |
3546 | */ | |
3547 | ||
1da177e4 LT |
3548 | void ata_bmdma_irq_clear(struct ata_port *ap) |
3549 | { | |
3550 | if (ap->flags & ATA_FLAG_MMIO) { | |
3551 | void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; | |
3552 | writeb(readb(mmio), mmio); | |
3553 | } else { | |
3554 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; | |
3555 | outb(inb(addr), addr); | |
3556 | } | |
3557 | ||
3558 | } | |
3559 | ||
0baab86b EF |
3560 | |
3561 | /** | |
3562 | * ata_bmdma_status - Read PCI IDE BMDMA status | |
decc6d0b | 3563 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3564 | * |
3565 | * Read and return BMDMA status register. | |
3566 | * | |
3567 | * May be used as the bmdma_status() entry in ata_port_operations. | |
3568 | * | |
3569 | * LOCKING: | |
3570 | * spin_lock_irqsave(host_set lock) | |
3571 | */ | |
3572 | ||
1da177e4 LT |
3573 | u8 ata_bmdma_status(struct ata_port *ap) |
3574 | { | |
3575 | u8 host_stat; | |
3576 | if (ap->flags & ATA_FLAG_MMIO) { | |
3577 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3578 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
3579 | } else | |
3580 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); | |
3581 | return host_stat; | |
3582 | } | |
3583 | ||
0baab86b EF |
3584 | |
3585 | /** | |
3586 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | |
b73fc89f | 3587 | * @qc: Command we are ending DMA for |
0baab86b EF |
3588 | * |
3589 | * Clears the ATA_DMA_START flag in the dma control register | |
3590 | * | |
3591 | * May be used as the bmdma_stop() entry in ata_port_operations. | |
3592 | * | |
3593 | * LOCKING: | |
3594 | * spin_lock_irqsave(host_set lock) | |
3595 | */ | |
3596 | ||
b73fc89f | 3597 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
1da177e4 | 3598 | { |
b73fc89f | 3599 | struct ata_port *ap = qc->ap; |
1da177e4 LT |
3600 | if (ap->flags & ATA_FLAG_MMIO) { |
3601 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3602 | ||
3603 | /* clear start/stop bit */ | |
3604 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3605 | mmio + ATA_DMA_CMD); | |
3606 | } else { | |
3607 | /* clear start/stop bit */ | |
3608 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3609 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3610 | } | |
3611 | ||
3612 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | |
3613 | ata_altstatus(ap); /* dummy read */ | |
3614 | } | |
3615 | ||
3616 | /** | |
3617 | * ata_host_intr - Handle host interrupt for given (port, task) | |
3618 | * @ap: Port on which interrupt arrived (possibly...) | |
3619 | * @qc: Taskfile currently active in engine | |
3620 | * | |
3621 | * Handle host interrupt for given queued command. Currently, | |
3622 | * only DMA interrupts are handled. All other commands are | |
3623 | * handled via polling with interrupts disabled (nIEN bit). | |
3624 | * | |
3625 | * LOCKING: | |
3626 | * spin_lock_irqsave(host_set lock) | |
3627 | * | |
3628 | * RETURNS: | |
3629 | * One if interrupt was handled, zero if not (shared irq). | |
3630 | */ | |
3631 | ||
3632 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
3633 | struct ata_queued_cmd *qc) | |
3634 | { | |
3635 | u8 status, host_stat; | |
3636 | ||
3637 | switch (qc->tf.protocol) { | |
3638 | ||
3639 | case ATA_PROT_DMA: | |
3640 | case ATA_PROT_ATAPI_DMA: | |
3641 | case ATA_PROT_ATAPI: | |
3642 | /* check status of DMA engine */ | |
3643 | host_stat = ap->ops->bmdma_status(ap); | |
3644 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
3645 | ||
3646 | /* if it's not our irq... */ | |
3647 | if (!(host_stat & ATA_DMA_INTR)) | |
3648 | goto idle_irq; | |
3649 | ||
3650 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3651 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
3652 | |
3653 | /* fall through */ | |
3654 | ||
3655 | case ATA_PROT_ATAPI_NODATA: | |
3656 | case ATA_PROT_NODATA: | |
3657 | /* check altstatus */ | |
3658 | status = ata_altstatus(ap); | |
3659 | if (status & ATA_BUSY) | |
3660 | goto idle_irq; | |
3661 | ||
3662 | /* check main status, clearing INTRQ */ | |
3663 | status = ata_chk_status(ap); | |
3664 | if (unlikely(status & ATA_BUSY)) | |
3665 | goto idle_irq; | |
3666 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | |
3667 | ap->id, qc->tf.protocol, status); | |
3668 | ||
3669 | /* ack bmdma irq events */ | |
3670 | ap->ops->irq_clear(ap); | |
3671 | ||
3672 | /* complete taskfile transaction */ | |
3673 | ata_qc_complete(qc, status); | |
3674 | break; | |
3675 | ||
3676 | default: | |
3677 | goto idle_irq; | |
3678 | } | |
3679 | ||
3680 | return 1; /* irq handled */ | |
3681 | ||
3682 | idle_irq: | |
3683 | ap->stats.idle_irq++; | |
3684 | ||
3685 | #ifdef ATA_IRQ_TRAP | |
3686 | if ((ap->stats.idle_irq % 1000) == 0) { | |
3687 | handled = 1; | |
3688 | ata_irq_ack(ap, 0); /* debug trap */ | |
3689 | printk(KERN_WARNING "ata%d: irq trap\n", ap->id); | |
3690 | } | |
3691 | #endif | |
3692 | return 0; /* irq not handled */ | |
3693 | } | |
3694 | ||
3695 | /** | |
3696 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
3697 | * @irq: irq line (unused) |
3698 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
3699 | * @regs: unused |
3700 | * | |
0cba632b JG |
3701 | * Default interrupt handler for PCI IDE devices. Calls |
3702 | * ata_host_intr() for each port that is not disabled. | |
3703 | * | |
1da177e4 | 3704 | * LOCKING: |
0cba632b | 3705 | * Obtains host_set lock during operation. |
1da177e4 LT |
3706 | * |
3707 | * RETURNS: | |
0cba632b | 3708 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
3709 | * |
3710 | */ | |
3711 | ||
3712 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
3713 | { | |
3714 | struct ata_host_set *host_set = dev_instance; | |
3715 | unsigned int i; | |
3716 | unsigned int handled = 0; | |
3717 | unsigned long flags; | |
3718 | ||
3719 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
3720 | spin_lock_irqsave(&host_set->lock, flags); | |
3721 | ||
3722 | for (i = 0; i < host_set->n_ports; i++) { | |
3723 | struct ata_port *ap; | |
3724 | ||
3725 | ap = host_set->ports[i]; | |
c1389503 TH |
3726 | if (ap && |
3727 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | |
1da177e4 LT |
3728 | struct ata_queued_cmd *qc; |
3729 | ||
3730 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
21b1ed74 AL |
3731 | if (qc && (!(qc->tf.ctl & ATA_NIEN)) && |
3732 | (qc->flags & ATA_QCFLAG_ACTIVE)) | |
1da177e4 LT |
3733 | handled |= ata_host_intr(ap, qc); |
3734 | } | |
3735 | } | |
3736 | ||
3737 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3738 | ||
3739 | return IRQ_RETVAL(handled); | |
3740 | } | |
3741 | ||
3742 | /** | |
3743 | * atapi_packet_task - Write CDB bytes to hardware | |
3744 | * @_data: Port to which ATAPI device is attached. | |
3745 | * | |
3746 | * When device has indicated its readiness to accept | |
3747 | * a CDB, this function is called. Send the CDB. | |
3748 | * If DMA is to be performed, exit immediately. | |
3749 | * Otherwise, we are in polling mode, so poll | |
3750 | * status under operation succeeds or fails. | |
3751 | * | |
3752 | * LOCKING: | |
3753 | * Kernel thread context (may sleep) | |
3754 | */ | |
3755 | ||
3756 | static void atapi_packet_task(void *_data) | |
3757 | { | |
3758 | struct ata_port *ap = _data; | |
3759 | struct ata_queued_cmd *qc; | |
3760 | u8 status; | |
3761 | ||
3762 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3763 | assert(qc != NULL); | |
3764 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3765 | ||
3766 | /* sleep-wait for BSY to clear */ | |
3767 | DPRINTK("busy wait\n"); | |
3768 | if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) | |
3769 | goto err_out; | |
3770 | ||
3771 | /* make sure DRQ is set */ | |
3772 | status = ata_chk_status(ap); | |
3773 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) | |
3774 | goto err_out; | |
3775 | ||
3776 | /* send SCSI cdb */ | |
3777 | DPRINTK("send cdb\n"); | |
3778 | assert(ap->cdb_len >= 12); | |
1da177e4 | 3779 | |
c1389503 TH |
3780 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || |
3781 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | |
3782 | unsigned long flags; | |
1da177e4 | 3783 | |
c1389503 TH |
3784 | /* Once we're done issuing command and kicking bmdma, |
3785 | * irq handler takes over. To not lose irq, we need | |
3786 | * to clear NOINTR flag before sending cdb, but | |
3787 | * interrupt handler shouldn't be invoked before we're | |
3788 | * finished. Hence, the following locking. | |
3789 | */ | |
3790 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
3791 | ap->flags &= ~ATA_FLAG_NOINTR; | |
3792 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
3793 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | |
3794 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3795 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
3796 | } else { | |
3797 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
1da177e4 | 3798 | |
c1389503 | 3799 | /* PIO commands are handled by polling */ |
1da177e4 LT |
3800 | ap->pio_task_state = PIO_ST; |
3801 | queue_work(ata_wq, &ap->pio_task); | |
3802 | } | |
3803 | ||
3804 | return; | |
3805 | ||
3806 | err_out: | |
40e8c82c | 3807 | ata_poll_qc_complete(qc, ATA_ERR); |
1da177e4 LT |
3808 | } |
3809 | ||
0baab86b EF |
3810 | |
3811 | /** | |
3812 | * ata_port_start - Set port up for dma. | |
3813 | * @ap: Port to initialize | |
3814 | * | |
3815 | * Called just after data structures for each port are | |
3816 | * initialized. Allocates space for PRD table. | |
3817 | * | |
3818 | * May be used as the port_start() entry in ata_port_operations. | |
3819 | * | |
3820 | * LOCKING: | |
3821 | */ | |
3822 | ||
1da177e4 LT |
3823 | int ata_port_start (struct ata_port *ap) |
3824 | { | |
3825 | struct device *dev = ap->host_set->dev; | |
3826 | ||
3827 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
3828 | if (!ap->prd) | |
3829 | return -ENOMEM; | |
3830 | ||
3831 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); | |
3832 | ||
3833 | return 0; | |
3834 | } | |
3835 | ||
0baab86b EF |
3836 | |
3837 | /** | |
3838 | * ata_port_stop - Undo ata_port_start() | |
3839 | * @ap: Port to shut down | |
3840 | * | |
3841 | * Frees the PRD table. | |
3842 | * | |
3843 | * May be used as the port_stop() entry in ata_port_operations. | |
3844 | * | |
3845 | * LOCKING: | |
3846 | */ | |
3847 | ||
1da177e4 LT |
3848 | void ata_port_stop (struct ata_port *ap) |
3849 | { | |
3850 | struct device *dev = ap->host_set->dev; | |
3851 | ||
3852 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
3853 | } | |
3854 | ||
aa8f0dc6 JG |
3855 | void ata_host_stop (struct ata_host_set *host_set) |
3856 | { | |
3857 | if (host_set->mmio_base) | |
3858 | iounmap(host_set->mmio_base); | |
3859 | } | |
3860 | ||
3861 | ||
1da177e4 LT |
3862 | /** |
3863 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
3864 | * @ap: Port to unregister | |
3865 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
3866 | * | |
3867 | * LOCKING: | |
3868 | */ | |
3869 | ||
3870 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
3871 | { | |
3872 | struct Scsi_Host *sh = ap->host; | |
3873 | ||
3874 | DPRINTK("ENTER\n"); | |
3875 | ||
3876 | if (do_unregister) | |
3877 | scsi_remove_host(sh); | |
3878 | ||
3879 | ap->ops->port_stop(ap); | |
3880 | } | |
3881 | ||
3882 | /** | |
3883 | * ata_host_init - Initialize an ata_port structure | |
3884 | * @ap: Structure to initialize | |
3885 | * @host: associated SCSI mid-layer structure | |
3886 | * @host_set: Collection of hosts to which @ap belongs | |
3887 | * @ent: Probe information provided by low-level driver | |
3888 | * @port_no: Port number associated with this ata_port | |
3889 | * | |
0cba632b JG |
3890 | * Initialize a new ata_port structure, and its associated |
3891 | * scsi_host. | |
3892 | * | |
1da177e4 | 3893 | * LOCKING: |
0cba632b | 3894 | * Inherited from caller. |
1da177e4 LT |
3895 | * |
3896 | */ | |
3897 | ||
3898 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
3899 | struct ata_host_set *host_set, | |
3900 | struct ata_probe_ent *ent, unsigned int port_no) | |
3901 | { | |
3902 | unsigned int i; | |
3903 | ||
3904 | host->max_id = 16; | |
3905 | host->max_lun = 1; | |
3906 | host->max_channel = 1; | |
3907 | host->unique_id = ata_unique_id++; | |
3908 | host->max_cmd_len = 12; | |
12413197 | 3909 | |
1da177e4 LT |
3910 | scsi_assign_lock(host, &host_set->lock); |
3911 | ||
3912 | ap->flags = ATA_FLAG_PORT_DISABLED; | |
3913 | ap->id = host->unique_id; | |
3914 | ap->host = host; | |
3915 | ap->ctl = ATA_DEVCTL_OBS; | |
3916 | ap->host_set = host_set; | |
3917 | ap->port_no = port_no; | |
3918 | ap->hard_port_no = | |
3919 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
3920 | ap->pio_mask = ent->pio_mask; | |
3921 | ap->mwdma_mask = ent->mwdma_mask; | |
3922 | ap->udma_mask = ent->udma_mask; | |
3923 | ap->flags |= ent->host_flags; | |
3924 | ap->ops = ent->port_ops; | |
3925 | ap->cbl = ATA_CBL_NONE; | |
3926 | ap->active_tag = ATA_TAG_POISON; | |
3927 | ap->last_ctl = 0xFF; | |
3928 | ||
3929 | INIT_WORK(&ap->packet_task, atapi_packet_task, ap); | |
3930 | INIT_WORK(&ap->pio_task, ata_pio_task, ap); | |
3931 | ||
3932 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
3933 | ap->device[i].devno = i; | |
3934 | ||
3935 | #ifdef ATA_IRQ_TRAP | |
3936 | ap->stats.unhandled_irq = 1; | |
3937 | ap->stats.idle_irq = 1; | |
3938 | #endif | |
3939 | ||
3940 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
3941 | } | |
3942 | ||
3943 | /** | |
3944 | * ata_host_add - Attach low-level ATA driver to system | |
3945 | * @ent: Information provided by low-level driver | |
3946 | * @host_set: Collections of ports to which we add | |
3947 | * @port_no: Port number associated with this host | |
3948 | * | |
0cba632b JG |
3949 | * Attach low-level ATA driver to system. |
3950 | * | |
1da177e4 | 3951 | * LOCKING: |
0cba632b | 3952 | * PCI/etc. bus probe sem. |
1da177e4 LT |
3953 | * |
3954 | * RETURNS: | |
0cba632b | 3955 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
3956 | * |
3957 | */ | |
3958 | ||
3959 | static struct ata_port * ata_host_add(struct ata_probe_ent *ent, | |
3960 | struct ata_host_set *host_set, | |
3961 | unsigned int port_no) | |
3962 | { | |
3963 | struct Scsi_Host *host; | |
3964 | struct ata_port *ap; | |
3965 | int rc; | |
3966 | ||
3967 | DPRINTK("ENTER\n"); | |
3968 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
3969 | if (!host) | |
3970 | return NULL; | |
3971 | ||
3972 | ap = (struct ata_port *) &host->hostdata[0]; | |
3973 | ||
3974 | ata_host_init(ap, host, host_set, ent, port_no); | |
3975 | ||
3976 | rc = ap->ops->port_start(ap); | |
3977 | if (rc) | |
3978 | goto err_out; | |
3979 | ||
3980 | return ap; | |
3981 | ||
3982 | err_out: | |
3983 | scsi_host_put(host); | |
3984 | return NULL; | |
3985 | } | |
3986 | ||
3987 | /** | |
0cba632b JG |
3988 | * ata_device_add - Register hardware device with ATA and SCSI layers |
3989 | * @ent: Probe information describing hardware device to be registered | |
3990 | * | |
3991 | * This function processes the information provided in the probe | |
3992 | * information struct @ent, allocates the necessary ATA and SCSI | |
3993 | * host information structures, initializes them, and registers | |
3994 | * everything with requisite kernel subsystems. | |
3995 | * | |
3996 | * This function requests irqs, probes the ATA bus, and probes | |
3997 | * the SCSI bus. | |
1da177e4 LT |
3998 | * |
3999 | * LOCKING: | |
0cba632b | 4000 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4001 | * |
4002 | * RETURNS: | |
0cba632b | 4003 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 LT |
4004 | * |
4005 | */ | |
4006 | ||
4007 | int ata_device_add(struct ata_probe_ent *ent) | |
4008 | { | |
4009 | unsigned int count = 0, i; | |
4010 | struct device *dev = ent->dev; | |
4011 | struct ata_host_set *host_set; | |
4012 | ||
4013 | DPRINTK("ENTER\n"); | |
4014 | /* alloc a container for our list of ATA ports (buses) */ | |
4015 | host_set = kmalloc(sizeof(struct ata_host_set) + | |
4016 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); | |
4017 | if (!host_set) | |
4018 | return 0; | |
4019 | memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *))); | |
4020 | spin_lock_init(&host_set->lock); | |
4021 | ||
4022 | host_set->dev = dev; | |
4023 | host_set->n_ports = ent->n_ports; | |
4024 | host_set->irq = ent->irq; | |
4025 | host_set->mmio_base = ent->mmio_base; | |
4026 | host_set->private_data = ent->private_data; | |
4027 | host_set->ops = ent->port_ops; | |
4028 | ||
4029 | /* register each port bound to this device */ | |
4030 | for (i = 0; i < ent->n_ports; i++) { | |
4031 | struct ata_port *ap; | |
4032 | unsigned long xfer_mode_mask; | |
4033 | ||
4034 | ap = ata_host_add(ent, host_set, i); | |
4035 | if (!ap) | |
4036 | goto err_out; | |
4037 | ||
4038 | host_set->ports[i] = ap; | |
4039 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
4040 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
4041 | (ap->pio_mask << ATA_SHIFT_PIO); | |
4042 | ||
4043 | /* print per-port info to dmesg */ | |
4044 | printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX " | |
4045 | "bmdma 0x%lX irq %lu\n", | |
4046 | ap->id, | |
4047 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
4048 | ata_mode_string(xfer_mode_mask), | |
4049 | ap->ioaddr.cmd_addr, | |
4050 | ap->ioaddr.ctl_addr, | |
4051 | ap->ioaddr.bmdma_addr, | |
4052 | ent->irq); | |
4053 | ||
4054 | ata_chk_status(ap); | |
4055 | host_set->ops->irq_clear(ap); | |
4056 | count++; | |
4057 | } | |
4058 | ||
4059 | if (!count) { | |
4060 | kfree(host_set); | |
4061 | return 0; | |
4062 | } | |
4063 | ||
4064 | /* obtain irq, that is shared between channels */ | |
4065 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
4066 | DRV_NAME, host_set)) | |
4067 | goto err_out; | |
4068 | ||
4069 | /* perform each probe synchronously */ | |
4070 | DPRINTK("probe begin\n"); | |
4071 | for (i = 0; i < count; i++) { | |
4072 | struct ata_port *ap; | |
4073 | int rc; | |
4074 | ||
4075 | ap = host_set->ports[i]; | |
4076 | ||
4077 | DPRINTK("ata%u: probe begin\n", ap->id); | |
4078 | rc = ata_bus_probe(ap); | |
4079 | DPRINTK("ata%u: probe end\n", ap->id); | |
4080 | ||
4081 | if (rc) { | |
4082 | /* FIXME: do something useful here? | |
4083 | * Current libata behavior will | |
4084 | * tear down everything when | |
4085 | * the module is removed | |
4086 | * or the h/w is unplugged. | |
4087 | */ | |
4088 | } | |
4089 | ||
4090 | rc = scsi_add_host(ap->host, dev); | |
4091 | if (rc) { | |
4092 | printk(KERN_ERR "ata%u: scsi_add_host failed\n", | |
4093 | ap->id); | |
4094 | /* FIXME: do something useful here */ | |
4095 | /* FIXME: handle unconditional calls to | |
4096 | * scsi_scan_host and ata_host_remove, below, | |
4097 | * at the very least | |
4098 | */ | |
4099 | } | |
4100 | } | |
4101 | ||
4102 | /* probes are done, now scan each port's disk(s) */ | |
4103 | DPRINTK("probe begin\n"); | |
4104 | for (i = 0; i < count; i++) { | |
4105 | struct ata_port *ap = host_set->ports[i]; | |
4106 | ||
4107 | scsi_scan_host(ap->host); | |
4108 | } | |
4109 | ||
4110 | dev_set_drvdata(dev, host_set); | |
4111 | ||
4112 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
4113 | return ent->n_ports; /* success */ | |
4114 | ||
4115 | err_out: | |
4116 | for (i = 0; i < count; i++) { | |
4117 | ata_host_remove(host_set->ports[i], 1); | |
4118 | scsi_host_put(host_set->ports[i]->host); | |
4119 | } | |
4120 | kfree(host_set); | |
4121 | VPRINTK("EXIT, returning 0\n"); | |
4122 | return 0; | |
4123 | } | |
4124 | ||
4125 | /** | |
4126 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4127 | * @host: libata host to be unloaded | |
4128 | * | |
4129 | * Performs all duties necessary to shut down a libata port... | |
4130 | * Kill port kthread, disable port, and release resources. | |
4131 | * | |
4132 | * LOCKING: | |
4133 | * Inherited from SCSI layer. | |
4134 | * | |
4135 | * RETURNS: | |
4136 | * One. | |
4137 | */ | |
4138 | ||
4139 | int ata_scsi_release(struct Scsi_Host *host) | |
4140 | { | |
4141 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | |
4142 | ||
4143 | DPRINTK("ENTER\n"); | |
4144 | ||
4145 | ap->ops->port_disable(ap); | |
4146 | ata_host_remove(ap, 0); | |
4147 | ||
4148 | DPRINTK("EXIT\n"); | |
4149 | return 1; | |
4150 | } | |
4151 | ||
4152 | /** | |
4153 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
4154 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
4155 | * |
4156 | * Utility function which initializes data_addr, error_addr, | |
4157 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
4158 | * device_addr, status_addr, and command_addr to standard offsets | |
4159 | * relative to cmd_addr. | |
4160 | * | |
4161 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 4162 | */ |
0baab86b | 4163 | |
1da177e4 LT |
4164 | void ata_std_ports(struct ata_ioports *ioaddr) |
4165 | { | |
4166 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
4167 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
4168 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
4169 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
4170 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
4171 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
4172 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
4173 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
4174 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
4175 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
4176 | } | |
4177 | ||
4178 | static struct ata_probe_ent * | |
4179 | ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port) | |
4180 | { | |
4181 | struct ata_probe_ent *probe_ent; | |
4182 | ||
4183 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); | |
4184 | if (!probe_ent) { | |
4185 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
4186 | kobject_name(&(dev->kobj))); | |
4187 | return NULL; | |
4188 | } | |
4189 | ||
4190 | memset(probe_ent, 0, sizeof(*probe_ent)); | |
4191 | ||
4192 | INIT_LIST_HEAD(&probe_ent->node); | |
4193 | probe_ent->dev = dev; | |
4194 | ||
4195 | probe_ent->sht = port->sht; | |
4196 | probe_ent->host_flags = port->host_flags; | |
4197 | probe_ent->pio_mask = port->pio_mask; | |
4198 | probe_ent->mwdma_mask = port->mwdma_mask; | |
4199 | probe_ent->udma_mask = port->udma_mask; | |
4200 | probe_ent->port_ops = port->port_ops; | |
4201 | ||
4202 | return probe_ent; | |
4203 | } | |
4204 | ||
0baab86b EF |
4205 | |
4206 | ||
374b1873 JG |
4207 | #ifdef CONFIG_PCI |
4208 | ||
4209 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
4210 | { | |
4211 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
4212 | ||
4213 | pci_iounmap(pdev, host_set->mmio_base); | |
4214 | } | |
4215 | ||
0baab86b EF |
4216 | /** |
4217 | * ata_pci_init_native_mode - Initialize native-mode driver | |
4218 | * @pdev: pci device to be initialized | |
4219 | * @port: array[2] of pointers to port info structures. | |
4220 | * | |
4221 | * Utility function which allocates and initializes an | |
4222 | * ata_probe_ent structure for a standard dual-port | |
4223 | * PIO-based IDE controller. The returned ata_probe_ent | |
4224 | * structure can be passed to ata_device_add(). The returned | |
4225 | * ata_probe_ent structure should then be freed with kfree(). | |
4226 | */ | |
4227 | ||
1da177e4 LT |
4228 | struct ata_probe_ent * |
4229 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port) | |
4230 | { | |
4231 | struct ata_probe_ent *probe_ent = | |
4232 | ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
4233 | if (!probe_ent) | |
4234 | return NULL; | |
4235 | ||
4236 | probe_ent->n_ports = 2; | |
4237 | probe_ent->irq = pdev->irq; | |
4238 | probe_ent->irq_flags = SA_SHIRQ; | |
4239 | ||
4240 | probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0); | |
4241 | probe_ent->port[0].altstatus_addr = | |
4242 | probe_ent->port[0].ctl_addr = | |
4243 | pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; | |
4244 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4); | |
4245 | ||
4246 | probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2); | |
4247 | probe_ent->port[1].altstatus_addr = | |
4248 | probe_ent->port[1].ctl_addr = | |
4249 | pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS; | |
4250 | probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8; | |
4251 | ||
4252 | ata_std_ports(&probe_ent->port[0]); | |
4253 | ata_std_ports(&probe_ent->port[1]); | |
4254 | ||
4255 | return probe_ent; | |
4256 | } | |
4257 | ||
4258 | static struct ata_probe_ent * | |
4259 | ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port, | |
4260 | struct ata_probe_ent **ppe2) | |
4261 | { | |
4262 | struct ata_probe_ent *probe_ent, *probe_ent2; | |
4263 | ||
4264 | probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
4265 | if (!probe_ent) | |
4266 | return NULL; | |
4267 | probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]); | |
4268 | if (!probe_ent2) { | |
4269 | kfree(probe_ent); | |
4270 | return NULL; | |
4271 | } | |
4272 | ||
4273 | probe_ent->n_ports = 1; | |
4274 | probe_ent->irq = 14; | |
4275 | ||
4276 | probe_ent->hard_port_no = 0; | |
4277 | probe_ent->legacy_mode = 1; | |
4278 | ||
4279 | probe_ent2->n_ports = 1; | |
4280 | probe_ent2->irq = 15; | |
4281 | ||
4282 | probe_ent2->hard_port_no = 1; | |
4283 | probe_ent2->legacy_mode = 1; | |
4284 | ||
4285 | probe_ent->port[0].cmd_addr = 0x1f0; | |
4286 | probe_ent->port[0].altstatus_addr = | |
4287 | probe_ent->port[0].ctl_addr = 0x3f6; | |
4288 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4); | |
4289 | ||
4290 | probe_ent2->port[0].cmd_addr = 0x170; | |
4291 | probe_ent2->port[0].altstatus_addr = | |
4292 | probe_ent2->port[0].ctl_addr = 0x376; | |
4293 | probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8; | |
4294 | ||
4295 | ata_std_ports(&probe_ent->port[0]); | |
4296 | ata_std_ports(&probe_ent2->port[0]); | |
4297 | ||
4298 | *ppe2 = probe_ent2; | |
4299 | return probe_ent; | |
4300 | } | |
4301 | ||
4302 | /** | |
4303 | * ata_pci_init_one - Initialize/register PCI IDE host controller | |
4304 | * @pdev: Controller to be initialized | |
4305 | * @port_info: Information from low-level host driver | |
4306 | * @n_ports: Number of ports attached to host controller | |
4307 | * | |
0baab86b EF |
4308 | * This is a helper function which can be called from a driver's |
4309 | * xxx_init_one() probe function if the hardware uses traditional | |
4310 | * IDE taskfile registers. | |
4311 | * | |
4312 | * This function calls pci_enable_device(), reserves its register | |
4313 | * regions, sets the dma mask, enables bus master mode, and calls | |
4314 | * ata_device_add() | |
4315 | * | |
1da177e4 LT |
4316 | * LOCKING: |
4317 | * Inherited from PCI layer (may sleep). | |
4318 | * | |
4319 | * RETURNS: | |
0cba632b | 4320 | * Zero on success, negative on errno-based value on error. |
1da177e4 LT |
4321 | * |
4322 | */ | |
4323 | ||
4324 | int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, | |
4325 | unsigned int n_ports) | |
4326 | { | |
4327 | struct ata_probe_ent *probe_ent, *probe_ent2 = NULL; | |
4328 | struct ata_port_info *port[2]; | |
4329 | u8 tmp8, mask; | |
4330 | unsigned int legacy_mode = 0; | |
4331 | int disable_dev_on_err = 1; | |
4332 | int rc; | |
4333 | ||
4334 | DPRINTK("ENTER\n"); | |
4335 | ||
4336 | port[0] = port_info[0]; | |
4337 | if (n_ports > 1) | |
4338 | port[1] = port_info[1]; | |
4339 | else | |
4340 | port[1] = port[0]; | |
4341 | ||
4342 | if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 | |
4343 | && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { | |
4344 | /* TODO: support transitioning to native mode? */ | |
4345 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); | |
4346 | mask = (1 << 2) | (1 << 0); | |
4347 | if ((tmp8 & mask) != mask) | |
4348 | legacy_mode = (1 << 3); | |
4349 | } | |
4350 | ||
4351 | /* FIXME... */ | |
4352 | if ((!legacy_mode) && (n_ports > 1)) { | |
4353 | printk(KERN_ERR "ata: BUG: native mode, n_ports > 1\n"); | |
4354 | return -EINVAL; | |
4355 | } | |
4356 | ||
4357 | rc = pci_enable_device(pdev); | |
4358 | if (rc) | |
4359 | return rc; | |
4360 | ||
4361 | rc = pci_request_regions(pdev, DRV_NAME); | |
4362 | if (rc) { | |
4363 | disable_dev_on_err = 0; | |
4364 | goto err_out; | |
4365 | } | |
4366 | ||
4367 | if (legacy_mode) { | |
4368 | if (!request_region(0x1f0, 8, "libata")) { | |
4369 | struct resource *conflict, res; | |
4370 | res.start = 0x1f0; | |
4371 | res.end = 0x1f0 + 8 - 1; | |
4372 | conflict = ____request_resource(&ioport_resource, &res); | |
4373 | if (!strcmp(conflict->name, "libata")) | |
4374 | legacy_mode |= (1 << 0); | |
4375 | else { | |
4376 | disable_dev_on_err = 0; | |
4377 | printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n"); | |
4378 | } | |
4379 | } else | |
4380 | legacy_mode |= (1 << 0); | |
4381 | ||
4382 | if (!request_region(0x170, 8, "libata")) { | |
4383 | struct resource *conflict, res; | |
4384 | res.start = 0x170; | |
4385 | res.end = 0x170 + 8 - 1; | |
4386 | conflict = ____request_resource(&ioport_resource, &res); | |
4387 | if (!strcmp(conflict->name, "libata")) | |
4388 | legacy_mode |= (1 << 1); | |
4389 | else { | |
4390 | disable_dev_on_err = 0; | |
4391 | printk(KERN_WARNING "ata: 0x170 IDE port busy\n"); | |
4392 | } | |
4393 | } else | |
4394 | legacy_mode |= (1 << 1); | |
4395 | } | |
4396 | ||
4397 | /* we have legacy mode, but all ports are unavailable */ | |
4398 | if (legacy_mode == (1 << 3)) { | |
4399 | rc = -EBUSY; | |
4400 | goto err_out_regions; | |
4401 | } | |
4402 | ||
4403 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
4404 | if (rc) | |
4405 | goto err_out_regions; | |
4406 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
4407 | if (rc) | |
4408 | goto err_out_regions; | |
4409 | ||
4410 | if (legacy_mode) { | |
4411 | probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2); | |
4412 | } else | |
4413 | probe_ent = ata_pci_init_native_mode(pdev, port); | |
4414 | if (!probe_ent) { | |
4415 | rc = -ENOMEM; | |
4416 | goto err_out_regions; | |
4417 | } | |
4418 | ||
4419 | pci_set_master(pdev); | |
4420 | ||
4421 | /* FIXME: check ata_device_add return */ | |
4422 | if (legacy_mode) { | |
4423 | if (legacy_mode & (1 << 0)) | |
4424 | ata_device_add(probe_ent); | |
4425 | if (legacy_mode & (1 << 1)) | |
4426 | ata_device_add(probe_ent2); | |
4427 | } else | |
4428 | ata_device_add(probe_ent); | |
4429 | ||
4430 | kfree(probe_ent); | |
4431 | kfree(probe_ent2); | |
4432 | ||
4433 | return 0; | |
4434 | ||
4435 | err_out_regions: | |
4436 | if (legacy_mode & (1 << 0)) | |
4437 | release_region(0x1f0, 8); | |
4438 | if (legacy_mode & (1 << 1)) | |
4439 | release_region(0x170, 8); | |
4440 | pci_release_regions(pdev); | |
4441 | err_out: | |
4442 | if (disable_dev_on_err) | |
4443 | pci_disable_device(pdev); | |
4444 | return rc; | |
4445 | } | |
4446 | ||
4447 | /** | |
4448 | * ata_pci_remove_one - PCI layer callback for device removal | |
4449 | * @pdev: PCI device that was removed | |
4450 | * | |
4451 | * PCI layer indicates to libata via this hook that | |
4452 | * hot-unplug or module unload event has occured. | |
4453 | * Handle this by unregistering all objects associated | |
4454 | * with this PCI device. Free those objects. Then finally | |
4455 | * release PCI resources and disable device. | |
4456 | * | |
4457 | * LOCKING: | |
4458 | * Inherited from PCI layer (may sleep). | |
4459 | */ | |
4460 | ||
4461 | void ata_pci_remove_one (struct pci_dev *pdev) | |
4462 | { | |
4463 | struct device *dev = pci_dev_to_dev(pdev); | |
4464 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
4465 | struct ata_port *ap; | |
4466 | unsigned int i; | |
4467 | ||
4468 | for (i = 0; i < host_set->n_ports; i++) { | |
4469 | ap = host_set->ports[i]; | |
4470 | ||
4471 | scsi_remove_host(ap->host); | |
4472 | } | |
4473 | ||
4474 | free_irq(host_set->irq, host_set); | |
1da177e4 LT |
4475 | |
4476 | for (i = 0; i < host_set->n_ports; i++) { | |
4477 | ap = host_set->ports[i]; | |
4478 | ||
4479 | ata_scsi_release(ap->host); | |
4480 | ||
4481 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4482 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4483 | ||
4484 | if (ioaddr->cmd_addr == 0x1f0) | |
4485 | release_region(0x1f0, 8); | |
4486 | else if (ioaddr->cmd_addr == 0x170) | |
4487 | release_region(0x170, 8); | |
4488 | } | |
4489 | ||
4490 | scsi_host_put(ap->host); | |
4491 | } | |
4492 | ||
aa8f0dc6 JG |
4493 | if (host_set->ops->host_stop) |
4494 | host_set->ops->host_stop(host_set); | |
4495 | ||
1da177e4 LT |
4496 | kfree(host_set); |
4497 | ||
4498 | pci_release_regions(pdev); | |
4499 | pci_disable_device(pdev); | |
4500 | dev_set_drvdata(dev, NULL); | |
4501 | } | |
4502 | ||
4503 | /* move to PCI subsystem */ | |
4504 | int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits) | |
4505 | { | |
4506 | unsigned long tmp = 0; | |
4507 | ||
4508 | switch (bits->width) { | |
4509 | case 1: { | |
4510 | u8 tmp8 = 0; | |
4511 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
4512 | tmp = tmp8; | |
4513 | break; | |
4514 | } | |
4515 | case 2: { | |
4516 | u16 tmp16 = 0; | |
4517 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
4518 | tmp = tmp16; | |
4519 | break; | |
4520 | } | |
4521 | case 4: { | |
4522 | u32 tmp32 = 0; | |
4523 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
4524 | tmp = tmp32; | |
4525 | break; | |
4526 | } | |
4527 | ||
4528 | default: | |
4529 | return -EINVAL; | |
4530 | } | |
4531 | ||
4532 | tmp &= bits->mask; | |
4533 | ||
4534 | return (tmp == bits->val) ? 1 : 0; | |
4535 | } | |
4536 | #endif /* CONFIG_PCI */ | |
4537 | ||
4538 | ||
1da177e4 LT |
4539 | static int __init ata_init(void) |
4540 | { | |
4541 | ata_wq = create_workqueue("ata"); | |
4542 | if (!ata_wq) | |
4543 | return -ENOMEM; | |
4544 | ||
4545 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
4546 | return 0; | |
4547 | } | |
4548 | ||
4549 | static void __exit ata_exit(void) | |
4550 | { | |
4551 | destroy_workqueue(ata_wq); | |
4552 | } | |
4553 | ||
4554 | module_init(ata_init); | |
4555 | module_exit(ata_exit); | |
4556 | ||
4557 | /* | |
4558 | * libata is essentially a library of internal helper functions for | |
4559 | * low-level ATA host controller drivers. As such, the API/ABI is | |
4560 | * likely to change as new drivers are added and updated. | |
4561 | * Do not depend on ABI/API stability. | |
4562 | */ | |
4563 | ||
4564 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
4565 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
4566 | EXPORT_SYMBOL_GPL(ata_device_add); | |
4567 | EXPORT_SYMBOL_GPL(ata_sg_init); | |
4568 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
4569 | EXPORT_SYMBOL_GPL(ata_qc_complete); | |
4570 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); | |
4571 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
4572 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
4573 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
4574 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
4575 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
4576 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
4577 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
4578 | EXPORT_SYMBOL_GPL(ata_check_status); | |
4579 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
4580 | EXPORT_SYMBOL_GPL(ata_chk_err); | |
4581 | EXPORT_SYMBOL_GPL(ata_exec_command); | |
4582 | EXPORT_SYMBOL_GPL(ata_port_start); | |
4583 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 4584 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 LT |
4585 | EXPORT_SYMBOL_GPL(ata_interrupt); |
4586 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
4587 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
4588 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
4589 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
4590 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
4591 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
4592 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
4593 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
4594 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
4595 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
4596 | EXPORT_SYMBOL_GPL(ata_port_disable); | |
4597 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); | |
4598 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
4599 | EXPORT_SYMBOL_GPL(ata_scsi_error); | |
4600 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
4601 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
4602 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
4603 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
4604 | EXPORT_SYMBOL_GPL(ata_dev_id_string); | |
6f2f3812 | 4605 | EXPORT_SYMBOL_GPL(ata_dev_config); |
1da177e4 LT |
4606 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
4607 | ||
4608 | #ifdef CONFIG_PCI | |
4609 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 4610 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
4611 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
4612 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
4613 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
4614 | #endif /* CONFIG_PCI */ |