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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
67846b30 | 51 | #include <linux/jiffies.h> |
1da177e4 LT |
52 | #include <scsi/scsi.h> |
53 | #include "scsi.h" | |
54 | #include "scsi_priv.h" | |
55 | #include <scsi/scsi_host.h> | |
56 | #include <linux/libata.h> | |
57 | #include <asm/io.h> | |
58 | #include <asm/semaphore.h> | |
59 | #include <asm/byteorder.h> | |
60 | ||
61 | #include "libata.h" | |
62 | ||
63 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
64 | unsigned long tmout_pat, | |
65 | unsigned long tmout); | |
8bf62ece | 66 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev); |
1da177e4 LT |
67 | static void ata_set_mode(struct ata_port *ap); |
68 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | |
69 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift); | |
70 | static int fgb(u32 bitmap); | |
71 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
72 | u8 *xfer_mode_out, | |
73 | unsigned int *xfer_shift_out); | |
1da177e4 LT |
74 | static void __ata_qc_complete(struct ata_queued_cmd *qc); |
75 | ||
76 | static unsigned int ata_unique_id = 1; | |
77 | static struct workqueue_struct *ata_wq; | |
78 | ||
1623c81e JG |
79 | int atapi_enabled = 0; |
80 | module_param(atapi_enabled, int, 0444); | |
81 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
82 | ||
1da177e4 LT |
83 | MODULE_AUTHOR("Jeff Garzik"); |
84 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
85 | MODULE_LICENSE("GPL"); | |
86 | MODULE_VERSION(DRV_VERSION); | |
87 | ||
88 | /** | |
89 | * ata_tf_load - send taskfile registers to host controller | |
90 | * @ap: Port to which output is sent | |
91 | * @tf: ATA taskfile register set | |
92 | * | |
93 | * Outputs ATA taskfile to standard ATA host controller. | |
94 | * | |
95 | * LOCKING: | |
96 | * Inherited from caller. | |
97 | */ | |
98 | ||
99 | static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
100 | { | |
101 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
102 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
103 | ||
104 | if (tf->ctl != ap->last_ctl) { | |
105 | outb(tf->ctl, ioaddr->ctl_addr); | |
106 | ap->last_ctl = tf->ctl; | |
107 | ata_wait_idle(ap); | |
108 | } | |
109 | ||
110 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
111 | outb(tf->hob_feature, ioaddr->feature_addr); | |
112 | outb(tf->hob_nsect, ioaddr->nsect_addr); | |
113 | outb(tf->hob_lbal, ioaddr->lbal_addr); | |
114 | outb(tf->hob_lbam, ioaddr->lbam_addr); | |
115 | outb(tf->hob_lbah, ioaddr->lbah_addr); | |
116 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
117 | tf->hob_feature, | |
118 | tf->hob_nsect, | |
119 | tf->hob_lbal, | |
120 | tf->hob_lbam, | |
121 | tf->hob_lbah); | |
122 | } | |
123 | ||
124 | if (is_addr) { | |
125 | outb(tf->feature, ioaddr->feature_addr); | |
126 | outb(tf->nsect, ioaddr->nsect_addr); | |
127 | outb(tf->lbal, ioaddr->lbal_addr); | |
128 | outb(tf->lbam, ioaddr->lbam_addr); | |
129 | outb(tf->lbah, ioaddr->lbah_addr); | |
130 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
131 | tf->feature, | |
132 | tf->nsect, | |
133 | tf->lbal, | |
134 | tf->lbam, | |
135 | tf->lbah); | |
136 | } | |
137 | ||
138 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
139 | outb(tf->device, ioaddr->device_addr); | |
140 | VPRINTK("device 0x%X\n", tf->device); | |
141 | } | |
142 | ||
143 | ata_wait_idle(ap); | |
144 | } | |
145 | ||
146 | /** | |
147 | * ata_tf_load_mmio - send taskfile registers to host controller | |
148 | * @ap: Port to which output is sent | |
149 | * @tf: ATA taskfile register set | |
150 | * | |
151 | * Outputs ATA taskfile to standard ATA host controller using MMIO. | |
152 | * | |
153 | * LOCKING: | |
154 | * Inherited from caller. | |
155 | */ | |
156 | ||
157 | static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
158 | { | |
159 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
160 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
161 | ||
162 | if (tf->ctl != ap->last_ctl) { | |
163 | writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
164 | ap->last_ctl = tf->ctl; | |
165 | ata_wait_idle(ap); | |
166 | } | |
167 | ||
168 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
169 | writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr); | |
170 | writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr); | |
171 | writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr); | |
172 | writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr); | |
173 | writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr); | |
174 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
175 | tf->hob_feature, | |
176 | tf->hob_nsect, | |
177 | tf->hob_lbal, | |
178 | tf->hob_lbam, | |
179 | tf->hob_lbah); | |
180 | } | |
181 | ||
182 | if (is_addr) { | |
183 | writeb(tf->feature, (void __iomem *) ioaddr->feature_addr); | |
184 | writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr); | |
185 | writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr); | |
186 | writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr); | |
187 | writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr); | |
188 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
189 | tf->feature, | |
190 | tf->nsect, | |
191 | tf->lbal, | |
192 | tf->lbam, | |
193 | tf->lbah); | |
194 | } | |
195 | ||
196 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
197 | writeb(tf->device, (void __iomem *) ioaddr->device_addr); | |
198 | VPRINTK("device 0x%X\n", tf->device); | |
199 | } | |
200 | ||
201 | ata_wait_idle(ap); | |
202 | } | |
203 | ||
0baab86b EF |
204 | |
205 | /** | |
206 | * ata_tf_load - send taskfile registers to host controller | |
207 | * @ap: Port to which output is sent | |
208 | * @tf: ATA taskfile register set | |
209 | * | |
210 | * Outputs ATA taskfile to standard ATA host controller using MMIO | |
211 | * or PIO as indicated by the ATA_FLAG_MMIO flag. | |
212 | * Writes the control, feature, nsect, lbal, lbam, and lbah registers. | |
213 | * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect, | |
214 | * hob_lbal, hob_lbam, and hob_lbah. | |
215 | * | |
216 | * This function waits for idle (!BUSY and !DRQ) after writing | |
217 | * registers. If the control register has a new value, this | |
218 | * function also waits for idle after writing control and before | |
219 | * writing the remaining registers. | |
220 | * | |
221 | * May be used as the tf_load() entry in ata_port_operations. | |
222 | * | |
223 | * LOCKING: | |
224 | * Inherited from caller. | |
225 | */ | |
1da177e4 LT |
226 | void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf) |
227 | { | |
228 | if (ap->flags & ATA_FLAG_MMIO) | |
229 | ata_tf_load_mmio(ap, tf); | |
230 | else | |
231 | ata_tf_load_pio(ap, tf); | |
232 | } | |
233 | ||
234 | /** | |
0baab86b | 235 | * ata_exec_command_pio - issue ATA command to host controller |
1da177e4 LT |
236 | * @ap: port to which command is being issued |
237 | * @tf: ATA taskfile register set | |
238 | * | |
0baab86b | 239 | * Issues PIO write to ATA command register, with proper |
1da177e4 LT |
240 | * synchronization with interrupt handler / other threads. |
241 | * | |
242 | * LOCKING: | |
243 | * spin_lock_irqsave(host_set lock) | |
244 | */ | |
245 | ||
246 | static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
247 | { | |
248 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
249 | ||
250 | outb(tf->command, ap->ioaddr.command_addr); | |
251 | ata_pause(ap); | |
252 | } | |
253 | ||
254 | ||
255 | /** | |
256 | * ata_exec_command_mmio - issue ATA command to host controller | |
257 | * @ap: port to which command is being issued | |
258 | * @tf: ATA taskfile register set | |
259 | * | |
260 | * Issues MMIO write to ATA command register, with proper | |
261 | * synchronization with interrupt handler / other threads. | |
262 | * | |
263 | * LOCKING: | |
264 | * spin_lock_irqsave(host_set lock) | |
265 | */ | |
266 | ||
267 | static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
268 | { | |
269 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
270 | ||
271 | writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr); | |
272 | ata_pause(ap); | |
273 | } | |
274 | ||
0baab86b EF |
275 | |
276 | /** | |
277 | * ata_exec_command - issue ATA command to host controller | |
278 | * @ap: port to which command is being issued | |
279 | * @tf: ATA taskfile register set | |
280 | * | |
281 | * Issues PIO/MMIO write to ATA command register, with proper | |
282 | * synchronization with interrupt handler / other threads. | |
283 | * | |
284 | * LOCKING: | |
285 | * spin_lock_irqsave(host_set lock) | |
286 | */ | |
1da177e4 LT |
287 | void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf) |
288 | { | |
289 | if (ap->flags & ATA_FLAG_MMIO) | |
290 | ata_exec_command_mmio(ap, tf); | |
291 | else | |
292 | ata_exec_command_pio(ap, tf); | |
293 | } | |
294 | ||
295 | /** | |
296 | * ata_exec - issue ATA command to host controller | |
297 | * @ap: port to which command is being issued | |
298 | * @tf: ATA taskfile register set | |
299 | * | |
300 | * Issues PIO/MMIO write to ATA command register, with proper | |
301 | * synchronization with interrupt handler / other threads. | |
302 | * | |
303 | * LOCKING: | |
304 | * Obtains host_set lock. | |
305 | */ | |
306 | ||
307 | static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf) | |
308 | { | |
309 | unsigned long flags; | |
310 | ||
311 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
312 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
313 | ap->ops->exec_command(ap, tf); | |
314 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
315 | } | |
316 | ||
317 | /** | |
318 | * ata_tf_to_host - issue ATA taskfile to host controller | |
319 | * @ap: port to which command is being issued | |
320 | * @tf: ATA taskfile register set | |
321 | * | |
322 | * Issues ATA taskfile register set to ATA host controller, | |
323 | * with proper synchronization with interrupt handler and | |
324 | * other threads. | |
325 | * | |
326 | * LOCKING: | |
327 | * Obtains host_set lock. | |
328 | */ | |
329 | ||
330 | static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf) | |
331 | { | |
332 | ap->ops->tf_load(ap, tf); | |
333 | ||
334 | ata_exec(ap, tf); | |
335 | } | |
336 | ||
337 | /** | |
338 | * ata_tf_to_host_nolock - issue ATA taskfile to host controller | |
339 | * @ap: port to which command is being issued | |
340 | * @tf: ATA taskfile register set | |
341 | * | |
342 | * Issues ATA taskfile register set to ATA host controller, | |
343 | * with proper synchronization with interrupt handler and | |
344 | * other threads. | |
345 | * | |
346 | * LOCKING: | |
347 | * spin_lock_irqsave(host_set lock) | |
348 | */ | |
349 | ||
350 | void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf) | |
351 | { | |
352 | ap->ops->tf_load(ap, tf); | |
353 | ap->ops->exec_command(ap, tf); | |
354 | } | |
355 | ||
356 | /** | |
0baab86b | 357 | * ata_tf_read_pio - input device's ATA taskfile shadow registers |
1da177e4 LT |
358 | * @ap: Port from which input is read |
359 | * @tf: ATA taskfile register set for storing input | |
360 | * | |
361 | * Reads ATA taskfile registers for currently-selected device | |
362 | * into @tf. | |
363 | * | |
364 | * LOCKING: | |
365 | * Inherited from caller. | |
366 | */ | |
367 | ||
368 | static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
369 | { | |
370 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
371 | ||
372 | tf->nsect = inb(ioaddr->nsect_addr); | |
373 | tf->lbal = inb(ioaddr->lbal_addr); | |
374 | tf->lbam = inb(ioaddr->lbam_addr); | |
375 | tf->lbah = inb(ioaddr->lbah_addr); | |
376 | tf->device = inb(ioaddr->device_addr); | |
377 | ||
378 | if (tf->flags & ATA_TFLAG_LBA48) { | |
379 | outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); | |
380 | tf->hob_feature = inb(ioaddr->error_addr); | |
381 | tf->hob_nsect = inb(ioaddr->nsect_addr); | |
382 | tf->hob_lbal = inb(ioaddr->lbal_addr); | |
383 | tf->hob_lbam = inb(ioaddr->lbam_addr); | |
384 | tf->hob_lbah = inb(ioaddr->lbah_addr); | |
385 | } | |
386 | } | |
387 | ||
388 | /** | |
389 | * ata_tf_read_mmio - input device's ATA taskfile shadow registers | |
390 | * @ap: Port from which input is read | |
391 | * @tf: ATA taskfile register set for storing input | |
392 | * | |
393 | * Reads ATA taskfile registers for currently-selected device | |
394 | * into @tf via MMIO. | |
395 | * | |
396 | * LOCKING: | |
397 | * Inherited from caller. | |
398 | */ | |
399 | ||
400 | static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
401 | { | |
402 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
403 | ||
404 | tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
405 | tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
406 | tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
407 | tf->lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
408 | tf->device = readb((void __iomem *)ioaddr->device_addr); | |
409 | ||
410 | if (tf->flags & ATA_TFLAG_LBA48) { | |
411 | writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr); | |
412 | tf->hob_feature = readb((void __iomem *)ioaddr->error_addr); | |
413 | tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
414 | tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
415 | tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
416 | tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
417 | } | |
418 | } | |
419 | ||
0baab86b EF |
420 | |
421 | /** | |
422 | * ata_tf_read - input device's ATA taskfile shadow registers | |
423 | * @ap: Port from which input is read | |
424 | * @tf: ATA taskfile register set for storing input | |
425 | * | |
426 | * Reads ATA taskfile registers for currently-selected device | |
427 | * into @tf. | |
428 | * | |
429 | * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48 | |
430 | * is set, also reads the hob registers. | |
431 | * | |
432 | * May be used as the tf_read() entry in ata_port_operations. | |
433 | * | |
434 | * LOCKING: | |
435 | * Inherited from caller. | |
436 | */ | |
1da177e4 LT |
437 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
438 | { | |
439 | if (ap->flags & ATA_FLAG_MMIO) | |
440 | ata_tf_read_mmio(ap, tf); | |
441 | else | |
442 | ata_tf_read_pio(ap, tf); | |
443 | } | |
444 | ||
445 | /** | |
446 | * ata_check_status_pio - Read device status reg & clear interrupt | |
447 | * @ap: port where the device is | |
448 | * | |
449 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 450 | * and return its value. This also clears pending interrupts |
1da177e4 LT |
451 | * from this device |
452 | * | |
453 | * LOCKING: | |
454 | * Inherited from caller. | |
455 | */ | |
456 | static u8 ata_check_status_pio(struct ata_port *ap) | |
457 | { | |
458 | return inb(ap->ioaddr.status_addr); | |
459 | } | |
460 | ||
461 | /** | |
462 | * ata_check_status_mmio - Read device status reg & clear interrupt | |
463 | * @ap: port where the device is | |
464 | * | |
465 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 466 | * via MMIO and return its value. This also clears pending interrupts |
1da177e4 LT |
467 | * from this device |
468 | * | |
469 | * LOCKING: | |
470 | * Inherited from caller. | |
471 | */ | |
472 | static u8 ata_check_status_mmio(struct ata_port *ap) | |
473 | { | |
474 | return readb((void __iomem *) ap->ioaddr.status_addr); | |
475 | } | |
476 | ||
0baab86b EF |
477 | |
478 | /** | |
479 | * ata_check_status - Read device status reg & clear interrupt | |
480 | * @ap: port where the device is | |
481 | * | |
482 | * Reads ATA taskfile status register for currently-selected device | |
483 | * and return its value. This also clears pending interrupts | |
484 | * from this device | |
485 | * | |
486 | * May be used as the check_status() entry in ata_port_operations. | |
487 | * | |
488 | * LOCKING: | |
489 | * Inherited from caller. | |
490 | */ | |
1da177e4 LT |
491 | u8 ata_check_status(struct ata_port *ap) |
492 | { | |
493 | if (ap->flags & ATA_FLAG_MMIO) | |
494 | return ata_check_status_mmio(ap); | |
495 | return ata_check_status_pio(ap); | |
496 | } | |
497 | ||
0baab86b EF |
498 | |
499 | /** | |
500 | * ata_altstatus - Read device alternate status reg | |
501 | * @ap: port where the device is | |
502 | * | |
503 | * Reads ATA taskfile alternate status register for | |
504 | * currently-selected device and return its value. | |
505 | * | |
506 | * Note: may NOT be used as the check_altstatus() entry in | |
507 | * ata_port_operations. | |
508 | * | |
509 | * LOCKING: | |
510 | * Inherited from caller. | |
511 | */ | |
1da177e4 LT |
512 | u8 ata_altstatus(struct ata_port *ap) |
513 | { | |
514 | if (ap->ops->check_altstatus) | |
515 | return ap->ops->check_altstatus(ap); | |
516 | ||
517 | if (ap->flags & ATA_FLAG_MMIO) | |
518 | return readb((void __iomem *)ap->ioaddr.altstatus_addr); | |
519 | return inb(ap->ioaddr.altstatus_addr); | |
520 | } | |
521 | ||
0baab86b EF |
522 | |
523 | /** | |
524 | * ata_chk_err - Read device error reg | |
525 | * @ap: port where the device is | |
526 | * | |
527 | * Reads ATA taskfile error register for | |
528 | * currently-selected device and return its value. | |
529 | * | |
530 | * Note: may NOT be used as the check_err() entry in | |
531 | * ata_port_operations. | |
532 | * | |
533 | * LOCKING: | |
534 | * Inherited from caller. | |
535 | */ | |
1da177e4 LT |
536 | u8 ata_chk_err(struct ata_port *ap) |
537 | { | |
538 | if (ap->ops->check_err) | |
539 | return ap->ops->check_err(ap); | |
540 | ||
541 | if (ap->flags & ATA_FLAG_MMIO) { | |
542 | return readb((void __iomem *) ap->ioaddr.error_addr); | |
543 | } | |
544 | return inb(ap->ioaddr.error_addr); | |
545 | } | |
546 | ||
547 | /** | |
548 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
549 | * @tf: Taskfile to convert | |
550 | * @fis: Buffer into which data will output | |
551 | * @pmp: Port multiplier port | |
552 | * | |
553 | * Converts a standard ATA taskfile to a Serial ATA | |
554 | * FIS structure (Register - Host to Device). | |
555 | * | |
556 | * LOCKING: | |
557 | * Inherited from caller. | |
558 | */ | |
559 | ||
560 | void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp) | |
561 | { | |
562 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
563 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
564 | bit 7 indicates Command FIS */ | |
565 | fis[2] = tf->command; | |
566 | fis[3] = tf->feature; | |
567 | ||
568 | fis[4] = tf->lbal; | |
569 | fis[5] = tf->lbam; | |
570 | fis[6] = tf->lbah; | |
571 | fis[7] = tf->device; | |
572 | ||
573 | fis[8] = tf->hob_lbal; | |
574 | fis[9] = tf->hob_lbam; | |
575 | fis[10] = tf->hob_lbah; | |
576 | fis[11] = tf->hob_feature; | |
577 | ||
578 | fis[12] = tf->nsect; | |
579 | fis[13] = tf->hob_nsect; | |
580 | fis[14] = 0; | |
581 | fis[15] = tf->ctl; | |
582 | ||
583 | fis[16] = 0; | |
584 | fis[17] = 0; | |
585 | fis[18] = 0; | |
586 | fis[19] = 0; | |
587 | } | |
588 | ||
589 | /** | |
590 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
591 | * @fis: Buffer from which data will be input | |
592 | * @tf: Taskfile to output | |
593 | * | |
594 | * Converts a standard ATA taskfile to a Serial ATA | |
595 | * FIS structure (Register - Host to Device). | |
596 | * | |
597 | * LOCKING: | |
598 | * Inherited from caller. | |
599 | */ | |
600 | ||
601 | void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf) | |
602 | { | |
603 | tf->command = fis[2]; /* status */ | |
604 | tf->feature = fis[3]; /* error */ | |
605 | ||
606 | tf->lbal = fis[4]; | |
607 | tf->lbam = fis[5]; | |
608 | tf->lbah = fis[6]; | |
609 | tf->device = fis[7]; | |
610 | ||
611 | tf->hob_lbal = fis[8]; | |
612 | tf->hob_lbam = fis[9]; | |
613 | tf->hob_lbah = fis[10]; | |
614 | ||
615 | tf->nsect = fis[12]; | |
616 | tf->hob_nsect = fis[13]; | |
617 | } | |
618 | ||
619 | /** | |
620 | * ata_prot_to_cmd - determine which read/write opcodes to use | |
621 | * @protocol: ATA_PROT_xxx taskfile protocol | |
622 | * @lba48: true is lba48 is present | |
623 | * | |
624 | * Given necessary input, determine which read/write commands | |
625 | * to use to transfer data. | |
626 | * | |
627 | * LOCKING: | |
628 | * None. | |
629 | */ | |
630 | static int ata_prot_to_cmd(int protocol, int lba48) | |
631 | { | |
632 | int rcmd = 0, wcmd = 0; | |
633 | ||
634 | switch (protocol) { | |
635 | case ATA_PROT_PIO: | |
636 | if (lba48) { | |
637 | rcmd = ATA_CMD_PIO_READ_EXT; | |
638 | wcmd = ATA_CMD_PIO_WRITE_EXT; | |
639 | } else { | |
640 | rcmd = ATA_CMD_PIO_READ; | |
641 | wcmd = ATA_CMD_PIO_WRITE; | |
642 | } | |
643 | break; | |
644 | ||
645 | case ATA_PROT_DMA: | |
646 | if (lba48) { | |
647 | rcmd = ATA_CMD_READ_EXT; | |
648 | wcmd = ATA_CMD_WRITE_EXT; | |
649 | } else { | |
650 | rcmd = ATA_CMD_READ; | |
651 | wcmd = ATA_CMD_WRITE; | |
652 | } | |
653 | break; | |
654 | ||
655 | default: | |
656 | return -1; | |
657 | } | |
658 | ||
659 | return rcmd | (wcmd << 8); | |
660 | } | |
661 | ||
662 | /** | |
663 | * ata_dev_set_protocol - set taskfile protocol and r/w commands | |
664 | * @dev: device to examine and configure | |
665 | * | |
666 | * Examine the device configuration, after we have | |
667 | * read the identify-device page and configured the | |
668 | * data transfer mode. Set internal state related to | |
669 | * the ATA taskfile protocol (pio, pio mult, dma, etc.) | |
670 | * and calculate the proper read/write commands to use. | |
671 | * | |
672 | * LOCKING: | |
673 | * caller. | |
674 | */ | |
675 | static void ata_dev_set_protocol(struct ata_device *dev) | |
676 | { | |
677 | int pio = (dev->flags & ATA_DFLAG_PIO); | |
678 | int lba48 = (dev->flags & ATA_DFLAG_LBA48); | |
679 | int proto, cmd; | |
680 | ||
681 | if (pio) | |
682 | proto = dev->xfer_protocol = ATA_PROT_PIO; | |
683 | else | |
684 | proto = dev->xfer_protocol = ATA_PROT_DMA; | |
685 | ||
686 | cmd = ata_prot_to_cmd(proto, lba48); | |
687 | if (cmd < 0) | |
688 | BUG(); | |
689 | ||
690 | dev->read_cmd = cmd & 0xff; | |
691 | dev->write_cmd = (cmd >> 8) & 0xff; | |
692 | } | |
693 | ||
694 | static const char * xfer_mode_str[] = { | |
695 | "UDMA/16", | |
696 | "UDMA/25", | |
697 | "UDMA/33", | |
698 | "UDMA/44", | |
699 | "UDMA/66", | |
700 | "UDMA/100", | |
701 | "UDMA/133", | |
702 | "UDMA7", | |
703 | "MWDMA0", | |
704 | "MWDMA1", | |
705 | "MWDMA2", | |
706 | "PIO0", | |
707 | "PIO1", | |
708 | "PIO2", | |
709 | "PIO3", | |
710 | "PIO4", | |
711 | }; | |
712 | ||
713 | /** | |
714 | * ata_udma_string - convert UDMA bit offset to string | |
715 | * @mask: mask of bits supported; only highest bit counts. | |
716 | * | |
717 | * Determine string which represents the highest speed | |
718 | * (highest bit in @udma_mask). | |
719 | * | |
720 | * LOCKING: | |
721 | * None. | |
722 | * | |
723 | * RETURNS: | |
724 | * Constant C string representing highest speed listed in | |
725 | * @udma_mask, or the constant C string "<n/a>". | |
726 | */ | |
727 | ||
728 | static const char *ata_mode_string(unsigned int mask) | |
729 | { | |
730 | int i; | |
731 | ||
732 | for (i = 7; i >= 0; i--) | |
733 | if (mask & (1 << i)) | |
734 | goto out; | |
735 | for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--) | |
736 | if (mask & (1 << i)) | |
737 | goto out; | |
738 | for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--) | |
739 | if (mask & (1 << i)) | |
740 | goto out; | |
741 | ||
742 | return "<n/a>"; | |
743 | ||
744 | out: | |
745 | return xfer_mode_str[i]; | |
746 | } | |
747 | ||
748 | /** | |
749 | * ata_pio_devchk - PATA device presence detection | |
750 | * @ap: ATA channel to examine | |
751 | * @device: Device to examine (starting at zero) | |
752 | * | |
753 | * This technique was originally described in | |
754 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
755 | * later found its way into the ATA/ATAPI spec. | |
756 | * | |
757 | * Write a pattern to the ATA shadow registers, | |
758 | * and if a device is present, it will respond by | |
759 | * correctly storing and echoing back the | |
760 | * ATA shadow register contents. | |
761 | * | |
762 | * LOCKING: | |
763 | * caller. | |
764 | */ | |
765 | ||
766 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
767 | unsigned int device) | |
768 | { | |
769 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
770 | u8 nsect, lbal; | |
771 | ||
772 | ap->ops->dev_select(ap, device); | |
773 | ||
774 | outb(0x55, ioaddr->nsect_addr); | |
775 | outb(0xaa, ioaddr->lbal_addr); | |
776 | ||
777 | outb(0xaa, ioaddr->nsect_addr); | |
778 | outb(0x55, ioaddr->lbal_addr); | |
779 | ||
780 | outb(0x55, ioaddr->nsect_addr); | |
781 | outb(0xaa, ioaddr->lbal_addr); | |
782 | ||
783 | nsect = inb(ioaddr->nsect_addr); | |
784 | lbal = inb(ioaddr->lbal_addr); | |
785 | ||
786 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
787 | return 1; /* we found a device */ | |
788 | ||
789 | return 0; /* nothing found */ | |
790 | } | |
791 | ||
792 | /** | |
793 | * ata_mmio_devchk - PATA device presence detection | |
794 | * @ap: ATA channel to examine | |
795 | * @device: Device to examine (starting at zero) | |
796 | * | |
797 | * This technique was originally described in | |
798 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
799 | * later found its way into the ATA/ATAPI spec. | |
800 | * | |
801 | * Write a pattern to the ATA shadow registers, | |
802 | * and if a device is present, it will respond by | |
803 | * correctly storing and echoing back the | |
804 | * ATA shadow register contents. | |
805 | * | |
806 | * LOCKING: | |
807 | * caller. | |
808 | */ | |
809 | ||
810 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
811 | unsigned int device) | |
812 | { | |
813 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
814 | u8 nsect, lbal; | |
815 | ||
816 | ap->ops->dev_select(ap, device); | |
817 | ||
818 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
819 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
820 | ||
821 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
822 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
823 | ||
824 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
825 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
826 | ||
827 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
828 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
829 | ||
830 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
831 | return 1; /* we found a device */ | |
832 | ||
833 | return 0; /* nothing found */ | |
834 | } | |
835 | ||
836 | /** | |
837 | * ata_devchk - PATA device presence detection | |
838 | * @ap: ATA channel to examine | |
839 | * @device: Device to examine (starting at zero) | |
840 | * | |
841 | * Dispatch ATA device presence detection, depending | |
842 | * on whether we are using PIO or MMIO to talk to the | |
843 | * ATA shadow registers. | |
844 | * | |
845 | * LOCKING: | |
846 | * caller. | |
847 | */ | |
848 | ||
849 | static unsigned int ata_devchk(struct ata_port *ap, | |
850 | unsigned int device) | |
851 | { | |
852 | if (ap->flags & ATA_FLAG_MMIO) | |
853 | return ata_mmio_devchk(ap, device); | |
854 | return ata_pio_devchk(ap, device); | |
855 | } | |
856 | ||
857 | /** | |
858 | * ata_dev_classify - determine device type based on ATA-spec signature | |
859 | * @tf: ATA taskfile register set for device to be identified | |
860 | * | |
861 | * Determine from taskfile register contents whether a device is | |
862 | * ATA or ATAPI, as per "Signature and persistence" section | |
863 | * of ATA/PI spec (volume 1, sect 5.14). | |
864 | * | |
865 | * LOCKING: | |
866 | * None. | |
867 | * | |
868 | * RETURNS: | |
869 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
870 | * the event of failure. | |
871 | */ | |
872 | ||
873 | unsigned int ata_dev_classify(struct ata_taskfile *tf) | |
874 | { | |
875 | /* Apple's open source Darwin code hints that some devices only | |
876 | * put a proper signature into the LBA mid/high registers, | |
877 | * So, we only check those. It's sufficient for uniqueness. | |
878 | */ | |
879 | ||
880 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
881 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
882 | DPRINTK("found ATA device by sig\n"); | |
883 | return ATA_DEV_ATA; | |
884 | } | |
885 | ||
886 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
887 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
888 | DPRINTK("found ATAPI device by sig\n"); | |
889 | return ATA_DEV_ATAPI; | |
890 | } | |
891 | ||
892 | DPRINTK("unknown device\n"); | |
893 | return ATA_DEV_UNKNOWN; | |
894 | } | |
895 | ||
896 | /** | |
897 | * ata_dev_try_classify - Parse returned ATA device signature | |
898 | * @ap: ATA channel to examine | |
899 | * @device: Device to examine (starting at zero) | |
900 | * | |
901 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
902 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
903 | * shadow registers, indicating the results of device detection | |
904 | * and diagnostics. | |
905 | * | |
906 | * Select the ATA device, and read the values from the ATA shadow | |
907 | * registers. Then parse according to the Error register value, | |
908 | * and the spec-defined values examined by ata_dev_classify(). | |
909 | * | |
910 | * LOCKING: | |
911 | * caller. | |
912 | */ | |
913 | ||
914 | static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device) | |
915 | { | |
916 | struct ata_device *dev = &ap->device[device]; | |
917 | struct ata_taskfile tf; | |
918 | unsigned int class; | |
919 | u8 err; | |
920 | ||
921 | ap->ops->dev_select(ap, device); | |
922 | ||
923 | memset(&tf, 0, sizeof(tf)); | |
924 | ||
925 | err = ata_chk_err(ap); | |
926 | ap->ops->tf_read(ap, &tf); | |
927 | ||
928 | dev->class = ATA_DEV_NONE; | |
929 | ||
930 | /* see if device passed diags */ | |
931 | if (err == 1) | |
932 | /* do nothing */ ; | |
933 | else if ((device == 0) && (err == 0x81)) | |
934 | /* do nothing */ ; | |
935 | else | |
936 | return err; | |
937 | ||
938 | /* determine if device if ATA or ATAPI */ | |
939 | class = ata_dev_classify(&tf); | |
940 | if (class == ATA_DEV_UNKNOWN) | |
941 | return err; | |
942 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
943 | return err; | |
944 | ||
945 | dev->class = class; | |
946 | ||
947 | return err; | |
948 | } | |
949 | ||
950 | /** | |
951 | * ata_dev_id_string - Convert IDENTIFY DEVICE page into string | |
952 | * @id: IDENTIFY DEVICE results we will examine | |
953 | * @s: string into which data is output | |
954 | * @ofs: offset into identify device page | |
955 | * @len: length of string to return. must be an even number. | |
956 | * | |
957 | * The strings in the IDENTIFY DEVICE page are broken up into | |
958 | * 16-bit chunks. Run through the string, and output each | |
959 | * 8-bit chunk linearly, regardless of platform. | |
960 | * | |
961 | * LOCKING: | |
962 | * caller. | |
963 | */ | |
964 | ||
965 | void ata_dev_id_string(u16 *id, unsigned char *s, | |
966 | unsigned int ofs, unsigned int len) | |
967 | { | |
968 | unsigned int c; | |
969 | ||
970 | while (len > 0) { | |
971 | c = id[ofs] >> 8; | |
972 | *s = c; | |
973 | s++; | |
974 | ||
975 | c = id[ofs] & 0xff; | |
976 | *s = c; | |
977 | s++; | |
978 | ||
979 | ofs++; | |
980 | len -= 2; | |
981 | } | |
982 | } | |
983 | ||
0baab86b EF |
984 | |
985 | /** | |
986 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
987 | * @ap: ATA channel to manipulate | |
988 | * @device: ATA device (numbered from zero) to select | |
989 | * | |
990 | * This function performs no actual function. | |
991 | * | |
992 | * May be used as the dev_select() entry in ata_port_operations. | |
993 | * | |
994 | * LOCKING: | |
995 | * caller. | |
996 | */ | |
1da177e4 LT |
997 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
998 | { | |
999 | } | |
1000 | ||
0baab86b | 1001 | |
1da177e4 LT |
1002 | /** |
1003 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
1004 | * @ap: ATA channel to manipulate | |
1005 | * @device: ATA device (numbered from zero) to select | |
1006 | * | |
1007 | * Use the method defined in the ATA specification to | |
1008 | * make either device 0, or device 1, active on the | |
0baab86b EF |
1009 | * ATA channel. Works with both PIO and MMIO. |
1010 | * | |
1011 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
1012 | * |
1013 | * LOCKING: | |
1014 | * caller. | |
1015 | */ | |
1016 | ||
1017 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
1018 | { | |
1019 | u8 tmp; | |
1020 | ||
1021 | if (device == 0) | |
1022 | tmp = ATA_DEVICE_OBS; | |
1023 | else | |
1024 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
1025 | ||
1026 | if (ap->flags & ATA_FLAG_MMIO) { | |
1027 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
1028 | } else { | |
1029 | outb(tmp, ap->ioaddr.device_addr); | |
1030 | } | |
1031 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
1032 | } | |
1033 | ||
1034 | /** | |
1035 | * ata_dev_select - Select device 0/1 on ATA bus | |
1036 | * @ap: ATA channel to manipulate | |
1037 | * @device: ATA device (numbered from zero) to select | |
1038 | * @wait: non-zero to wait for Status register BSY bit to clear | |
1039 | * @can_sleep: non-zero if context allows sleeping | |
1040 | * | |
1041 | * Use the method defined in the ATA specification to | |
1042 | * make either device 0, or device 1, active on the | |
1043 | * ATA channel. | |
1044 | * | |
1045 | * This is a high-level version of ata_std_dev_select(), | |
1046 | * which additionally provides the services of inserting | |
1047 | * the proper pauses and status polling, where needed. | |
1048 | * | |
1049 | * LOCKING: | |
1050 | * caller. | |
1051 | */ | |
1052 | ||
1053 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
1054 | unsigned int wait, unsigned int can_sleep) | |
1055 | { | |
1056 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
1057 | ap->id, device, wait); | |
1058 | ||
1059 | if (wait) | |
1060 | ata_wait_idle(ap); | |
1061 | ||
1062 | ap->ops->dev_select(ap, device); | |
1063 | ||
1064 | if (wait) { | |
1065 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
1066 | msleep(150); | |
1067 | ata_wait_idle(ap); | |
1068 | } | |
1069 | } | |
1070 | ||
1071 | /** | |
1072 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
1073 | * @dev: Device whose IDENTIFY DEVICE page we will dump | |
1074 | * | |
1075 | * Dump selected 16-bit words from a detected device's | |
1076 | * IDENTIFY PAGE page. | |
1077 | * | |
1078 | * LOCKING: | |
1079 | * caller. | |
1080 | */ | |
1081 | ||
1082 | static inline void ata_dump_id(struct ata_device *dev) | |
1083 | { | |
1084 | DPRINTK("49==0x%04x " | |
1085 | "53==0x%04x " | |
1086 | "63==0x%04x " | |
1087 | "64==0x%04x " | |
1088 | "75==0x%04x \n", | |
1089 | dev->id[49], | |
1090 | dev->id[53], | |
1091 | dev->id[63], | |
1092 | dev->id[64], | |
1093 | dev->id[75]); | |
1094 | DPRINTK("80==0x%04x " | |
1095 | "81==0x%04x " | |
1096 | "82==0x%04x " | |
1097 | "83==0x%04x " | |
1098 | "84==0x%04x \n", | |
1099 | dev->id[80], | |
1100 | dev->id[81], | |
1101 | dev->id[82], | |
1102 | dev->id[83], | |
1103 | dev->id[84]); | |
1104 | DPRINTK("88==0x%04x " | |
1105 | "93==0x%04x\n", | |
1106 | dev->id[88], | |
1107 | dev->id[93]); | |
1108 | } | |
1109 | ||
1110 | /** | |
1111 | * ata_dev_identify - obtain IDENTIFY x DEVICE page | |
1112 | * @ap: port on which device we wish to probe resides | |
1113 | * @device: device bus address, starting at zero | |
1114 | * | |
1115 | * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE | |
1116 | * command, and read back the 512-byte device information page. | |
1117 | * The device information page is fed to us via the standard | |
1118 | * PIO-IN protocol, but we hand-code it here. (TODO: investigate | |
1119 | * using standard PIO-IN paths) | |
1120 | * | |
1121 | * After reading the device information page, we use several | |
1122 | * bits of information from it to initialize data structures | |
1123 | * that will be used during the lifetime of the ata_device. | |
1124 | * Other data from the info page is used to disqualify certain | |
1125 | * older ATA devices we do not wish to support. | |
1126 | * | |
1127 | * LOCKING: | |
1128 | * Inherited from caller. Some functions called by this function | |
1129 | * obtain the host_set lock. | |
1130 | */ | |
1131 | ||
1132 | static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |
1133 | { | |
1134 | struct ata_device *dev = &ap->device[device]; | |
8bf62ece | 1135 | unsigned int major_version; |
1da177e4 LT |
1136 | u16 tmp; |
1137 | unsigned long xfer_modes; | |
1138 | u8 status; | |
1139 | unsigned int using_edd; | |
1140 | DECLARE_COMPLETION(wait); | |
1141 | struct ata_queued_cmd *qc; | |
1142 | unsigned long flags; | |
1143 | int rc; | |
1144 | ||
1145 | if (!ata_dev_present(dev)) { | |
1146 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1147 | ap->id, device); | |
1148 | return; | |
1149 | } | |
1150 | ||
1151 | if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET)) | |
1152 | using_edd = 0; | |
1153 | else | |
1154 | using_edd = 1; | |
1155 | ||
1156 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, device); | |
1157 | ||
1158 | assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI || | |
1159 | dev->class == ATA_DEV_NONE); | |
1160 | ||
1161 | ata_dev_select(ap, device, 1, 1); /* select device 0/1 */ | |
1162 | ||
1163 | qc = ata_qc_new_init(ap, dev); | |
1164 | BUG_ON(qc == NULL); | |
1165 | ||
1166 | ata_sg_init_one(qc, dev->id, sizeof(dev->id)); | |
1167 | qc->dma_dir = DMA_FROM_DEVICE; | |
1168 | qc->tf.protocol = ATA_PROT_PIO; | |
1169 | qc->nsect = 1; | |
1170 | ||
1171 | retry: | |
1172 | if (dev->class == ATA_DEV_ATA) { | |
1173 | qc->tf.command = ATA_CMD_ID_ATA; | |
1174 | DPRINTK("do ATA identify\n"); | |
1175 | } else { | |
1176 | qc->tf.command = ATA_CMD_ID_ATAPI; | |
1177 | DPRINTK("do ATAPI identify\n"); | |
1178 | } | |
1179 | ||
1180 | qc->waiting = &wait; | |
1181 | qc->complete_fn = ata_qc_complete_noop; | |
1182 | ||
1183 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1184 | rc = ata_qc_issue(qc); | |
1185 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1186 | ||
1187 | if (rc) | |
1188 | goto err_out; | |
1189 | else | |
1190 | wait_for_completion(&wait); | |
1191 | ||
1192 | status = ata_chk_status(ap); | |
1193 | if (status & ATA_ERR) { | |
1194 | /* | |
1195 | * arg! EDD works for all test cases, but seems to return | |
1196 | * the ATA signature for some ATAPI devices. Until the | |
1197 | * reason for this is found and fixed, we fix up the mess | |
1198 | * here. If IDENTIFY DEVICE returns command aborted | |
1199 | * (as ATAPI devices do), then we issue an | |
1200 | * IDENTIFY PACKET DEVICE. | |
1201 | * | |
1202 | * ATA software reset (SRST, the default) does not appear | |
1203 | * to have this problem. | |
1204 | */ | |
1205 | if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) { | |
1206 | u8 err = ata_chk_err(ap); | |
1207 | if (err & ATA_ABORTED) { | |
1208 | dev->class = ATA_DEV_ATAPI; | |
1209 | qc->cursg = 0; | |
1210 | qc->cursg_ofs = 0; | |
1211 | qc->cursect = 0; | |
1212 | qc->nsect = 1; | |
1213 | goto retry; | |
1214 | } | |
1215 | } | |
1216 | goto err_out; | |
1217 | } | |
1218 | ||
1219 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
1220 | ||
1221 | /* print device capabilities */ | |
1222 | printk(KERN_DEBUG "ata%u: dev %u cfg " | |
1223 | "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1224 | ap->id, device, dev->id[49], | |
1225 | dev->id[82], dev->id[83], dev->id[84], | |
1226 | dev->id[85], dev->id[86], dev->id[87], | |
1227 | dev->id[88]); | |
1228 | ||
1229 | /* | |
1230 | * common ATA, ATAPI feature tests | |
1231 | */ | |
1232 | ||
8bf62ece AL |
1233 | /* we require DMA support (bits 8 of word 49) */ |
1234 | if (!ata_id_has_dma(dev->id)) { | |
1235 | printk(KERN_DEBUG "ata%u: no dma\n", ap->id); | |
1da177e4 LT |
1236 | goto err_out_nosup; |
1237 | } | |
1238 | ||
1239 | /* quick-n-dirty find max transfer mode; for printk only */ | |
1240 | xfer_modes = dev->id[ATA_ID_UDMA_MODES]; | |
1241 | if (!xfer_modes) | |
1242 | xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; | |
1243 | if (!xfer_modes) { | |
1244 | xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3); | |
1245 | xfer_modes |= (0x7 << ATA_SHIFT_PIO); | |
1246 | } | |
1247 | ||
1248 | ata_dump_id(dev); | |
1249 | ||
1250 | /* ATA-specific feature tests */ | |
1251 | if (dev->class == ATA_DEV_ATA) { | |
1252 | if (!ata_id_is_ata(dev->id)) /* sanity check */ | |
1253 | goto err_out_nosup; | |
1254 | ||
8bf62ece | 1255 | /* get major version */ |
1da177e4 | 1256 | tmp = dev->id[ATA_ID_MAJOR_VER]; |
8bf62ece AL |
1257 | for (major_version = 14; major_version >= 1; major_version--) |
1258 | if (tmp & (1 << major_version)) | |
1da177e4 LT |
1259 | break; |
1260 | ||
8bf62ece AL |
1261 | /* |
1262 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1263 | * SRST RESET | |
1264 | * IDENTIFY | |
1265 | * INITIALIZE DEVICE PARAMETERS | |
1266 | * anything else.. | |
1267 | * Some drives were very specific about that exact sequence. | |
1268 | */ | |
1269 | if (major_version < 4 || (!ata_id_has_lba(dev->id))) | |
1270 | ata_dev_init_params(ap, dev); | |
1271 | ||
1272 | if (ata_id_has_lba(dev->id)) { | |
1273 | dev->flags |= ATA_DFLAG_LBA; | |
1274 | ||
1275 | if (ata_id_has_lba48(dev->id)) { | |
1276 | dev->flags |= ATA_DFLAG_LBA48; | |
1277 | dev->n_sectors = ata_id_u64(dev->id, 100); | |
1278 | } else { | |
1279 | dev->n_sectors = ata_id_u32(dev->id, 60); | |
1280 | } | |
1281 | ||
1282 | /* print device info to dmesg */ | |
1283 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n", | |
1284 | ap->id, device, | |
1285 | major_version, | |
1286 | ata_mode_string(xfer_modes), | |
1287 | (unsigned long long)dev->n_sectors, | |
1288 | dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA"); | |
1289 | } else { | |
1290 | /* CHS */ | |
1291 | ||
1292 | /* Default translation */ | |
1293 | dev->cylinders = dev->id[1]; | |
1294 | dev->heads = dev->id[3]; | |
1295 | dev->sectors = dev->id[6]; | |
1296 | dev->n_sectors = dev->cylinders * dev->heads * dev->sectors; | |
1297 | ||
1298 | if (ata_id_current_chs_valid(dev->id)) { | |
1299 | /* Current CHS translation is valid. */ | |
1300 | dev->cylinders = dev->id[54]; | |
1301 | dev->heads = dev->id[55]; | |
1302 | dev->sectors = dev->id[56]; | |
1303 | ||
1304 | dev->n_sectors = ata_id_u32(dev->id, 57); | |
1305 | } | |
1306 | ||
1307 | /* print device info to dmesg */ | |
1308 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n", | |
1309 | ap->id, device, | |
1310 | major_version, | |
1311 | ata_mode_string(xfer_modes), | |
1312 | (unsigned long long)dev->n_sectors, | |
1313 | (int)dev->cylinders, (int)dev->heads, (int)dev->sectors); | |
1da177e4 | 1314 | |
1da177e4 LT |
1315 | } |
1316 | ||
1317 | ap->host->max_cmd_len = 16; | |
1da177e4 LT |
1318 | } |
1319 | ||
1320 | /* ATAPI-specific feature tests */ | |
1321 | else { | |
1322 | if (ata_id_is_ata(dev->id)) /* sanity check */ | |
1323 | goto err_out_nosup; | |
1324 | ||
1325 | rc = atapi_cdb_len(dev->id); | |
1326 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1327 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | |
1328 | goto err_out_nosup; | |
1329 | } | |
1330 | ap->cdb_len = (unsigned int) rc; | |
1331 | ap->host->max_cmd_len = (unsigned char) ap->cdb_len; | |
1332 | ||
312f7da2 AL |
1333 | if (ata_id_cdb_intr(dev->id)) |
1334 | dev->flags |= ATA_DFLAG_CDB_INTR; | |
1335 | ||
1da177e4 LT |
1336 | /* print device info to dmesg */ |
1337 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | |
1338 | ap->id, device, | |
1339 | ata_mode_string(xfer_modes)); | |
1340 | } | |
1341 | ||
1342 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | |
1343 | return; | |
1344 | ||
1345 | err_out_nosup: | |
1346 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | |
1347 | ap->id, device); | |
1348 | err_out: | |
1349 | dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */ | |
1350 | DPRINTK("EXIT, err\n"); | |
1351 | } | |
1352 | ||
6f2f3812 BC |
1353 | |
1354 | static inline u8 ata_dev_knobble(struct ata_port *ap) | |
1355 | { | |
1356 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id))); | |
1357 | } | |
1358 | ||
1359 | /** | |
1360 | * ata_dev_config - Run device specific handlers and check for | |
1361 | * SATA->PATA bridges | |
8a60a071 | 1362 | * @ap: Bus |
6f2f3812 BC |
1363 | * @i: Device |
1364 | * | |
1365 | * LOCKING: | |
1366 | */ | |
8a60a071 | 1367 | |
6f2f3812 BC |
1368 | void ata_dev_config(struct ata_port *ap, unsigned int i) |
1369 | { | |
1370 | /* limit bridge transfers to udma5, 200 sectors */ | |
1371 | if (ata_dev_knobble(ap)) { | |
1372 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", | |
1373 | ap->id, ap->device->devno); | |
1374 | ap->udma_mask &= ATA_UDMA5; | |
1375 | ap->host->max_sectors = ATA_MAX_SECTORS; | |
1376 | ap->host->hostt->max_sectors = ATA_MAX_SECTORS; | |
1377 | ap->device->flags |= ATA_DFLAG_LOCK_SECTORS; | |
1378 | } | |
1379 | ||
1380 | if (ap->ops->dev_config) | |
1381 | ap->ops->dev_config(ap, &ap->device[i]); | |
1382 | } | |
1383 | ||
1da177e4 LT |
1384 | /** |
1385 | * ata_bus_probe - Reset and probe ATA bus | |
1386 | * @ap: Bus to probe | |
1387 | * | |
0cba632b JG |
1388 | * Master ATA bus probing function. Initiates a hardware-dependent |
1389 | * bus reset, then attempts to identify any devices found on | |
1390 | * the bus. | |
1391 | * | |
1da177e4 | 1392 | * LOCKING: |
0cba632b | 1393 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1394 | * |
1395 | * RETURNS: | |
1396 | * Zero on success, non-zero on error. | |
1397 | */ | |
1398 | ||
1399 | static int ata_bus_probe(struct ata_port *ap) | |
1400 | { | |
1401 | unsigned int i, found = 0; | |
1402 | ||
1403 | ap->ops->phy_reset(ap); | |
1404 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1405 | goto err_out; | |
1406 | ||
1407 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1408 | ata_dev_identify(ap, i); | |
1409 | if (ata_dev_present(&ap->device[i])) { | |
1410 | found = 1; | |
6f2f3812 | 1411 | ata_dev_config(ap,i); |
1da177e4 LT |
1412 | } |
1413 | } | |
1414 | ||
1415 | if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1416 | goto err_out_disable; | |
1417 | ||
1418 | ata_set_mode(ap); | |
1419 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1420 | goto err_out_disable; | |
1421 | ||
1422 | return 0; | |
1423 | ||
1424 | err_out_disable: | |
1425 | ap->ops->port_disable(ap); | |
1426 | err_out: | |
1427 | return -1; | |
1428 | } | |
1429 | ||
1430 | /** | |
0cba632b JG |
1431 | * ata_port_probe - Mark port as enabled |
1432 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1433 | * |
0cba632b JG |
1434 | * Modify @ap data structure such that the system |
1435 | * thinks that the entire port is enabled. | |
1436 | * | |
1437 | * LOCKING: host_set lock, or some other form of | |
1438 | * serialization. | |
1da177e4 LT |
1439 | */ |
1440 | ||
1441 | void ata_port_probe(struct ata_port *ap) | |
1442 | { | |
1443 | ap->flags &= ~ATA_FLAG_PORT_DISABLED; | |
1444 | } | |
1445 | ||
1446 | /** | |
780a87f7 JG |
1447 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1448 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1449 | * |
780a87f7 JG |
1450 | * This function issues commands to standard SATA Sxxx |
1451 | * PHY registers, to wake up the phy (and device), and | |
1452 | * clear any reset condition. | |
1da177e4 LT |
1453 | * |
1454 | * LOCKING: | |
0cba632b | 1455 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1456 | * |
1457 | */ | |
1458 | void __sata_phy_reset(struct ata_port *ap) | |
1459 | { | |
1460 | u32 sstatus; | |
1461 | unsigned long timeout = jiffies + (HZ * 5); | |
1462 | ||
1463 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e BR |
1464 | /* issue phy wake/reset */ |
1465 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
62ba2841 TH |
1466 | /* Couldn't find anything in SATA I/II specs, but |
1467 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1468 | mdelay(1); | |
1da177e4 | 1469 | } |
cdcca89e | 1470 | scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */ |
1da177e4 LT |
1471 | |
1472 | /* wait for phy to become ready, if necessary */ | |
1473 | do { | |
1474 | msleep(200); | |
1475 | sstatus = scr_read(ap, SCR_STATUS); | |
1476 | if ((sstatus & 0xf) != 1) | |
1477 | break; | |
1478 | } while (time_before(jiffies, timeout)); | |
1479 | ||
1480 | /* TODO: phy layer with polling, timeouts, etc. */ | |
1481 | if (sata_dev_present(ap)) | |
1482 | ata_port_probe(ap); | |
1483 | else { | |
1484 | sstatus = scr_read(ap, SCR_STATUS); | |
1485 | printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n", | |
1486 | ap->id, sstatus); | |
1487 | ata_port_disable(ap); | |
1488 | } | |
1489 | ||
1490 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1491 | return; | |
1492 | ||
1493 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1494 | ata_port_disable(ap); | |
1495 | return; | |
1496 | } | |
1497 | ||
1498 | ap->cbl = ATA_CBL_SATA; | |
1499 | } | |
1500 | ||
1501 | /** | |
780a87f7 JG |
1502 | * sata_phy_reset - Reset SATA bus. |
1503 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1504 | * |
780a87f7 JG |
1505 | * This function resets the SATA bus, and then probes |
1506 | * the bus for devices. | |
1da177e4 LT |
1507 | * |
1508 | * LOCKING: | |
0cba632b | 1509 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1510 | * |
1511 | */ | |
1512 | void sata_phy_reset(struct ata_port *ap) | |
1513 | { | |
1514 | __sata_phy_reset(ap); | |
1515 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1516 | return; | |
1517 | ata_bus_reset(ap); | |
1518 | } | |
1519 | ||
1520 | /** | |
780a87f7 JG |
1521 | * ata_port_disable - Disable port. |
1522 | * @ap: Port to be disabled. | |
1da177e4 | 1523 | * |
780a87f7 JG |
1524 | * Modify @ap data structure such that the system |
1525 | * thinks that the entire port is disabled, and should | |
1526 | * never attempt to probe or communicate with devices | |
1527 | * on this port. | |
1528 | * | |
1529 | * LOCKING: host_set lock, or some other form of | |
1530 | * serialization. | |
1da177e4 LT |
1531 | */ |
1532 | ||
1533 | void ata_port_disable(struct ata_port *ap) | |
1534 | { | |
1535 | ap->device[0].class = ATA_DEV_NONE; | |
1536 | ap->device[1].class = ATA_DEV_NONE; | |
1537 | ap->flags |= ATA_FLAG_PORT_DISABLED; | |
1538 | } | |
1539 | ||
1540 | static struct { | |
1541 | unsigned int shift; | |
1542 | u8 base; | |
1543 | } xfer_mode_classes[] = { | |
1544 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | |
1545 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | |
1546 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | |
1547 | }; | |
1548 | ||
1549 | static inline u8 base_from_shift(unsigned int shift) | |
1550 | { | |
1551 | int i; | |
1552 | ||
1553 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | |
1554 | if (xfer_mode_classes[i].shift == shift) | |
1555 | return xfer_mode_classes[i].base; | |
1556 | ||
1557 | return 0xff; | |
1558 | } | |
1559 | ||
1560 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |
1561 | { | |
1562 | int ofs, idx; | |
1563 | u8 base; | |
1564 | ||
1565 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1566 | return; | |
1567 | ||
1568 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
1569 | dev->flags |= ATA_DFLAG_PIO; | |
1570 | ||
1571 | ata_dev_set_xfermode(ap, dev); | |
1572 | ||
1573 | base = base_from_shift(dev->xfer_shift); | |
1574 | ofs = dev->xfer_mode - base; | |
1575 | idx = ofs + dev->xfer_shift; | |
1576 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | |
1577 | ||
1578 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", | |
1579 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | |
1580 | ||
1581 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | |
1582 | ap->id, dev->devno, xfer_mode_str[idx]); | |
1583 | } | |
1584 | ||
1585 | static int ata_host_set_pio(struct ata_port *ap) | |
1586 | { | |
1587 | unsigned int mask; | |
1588 | int x, i; | |
1589 | u8 base, xfer_mode; | |
1590 | ||
1591 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | |
1592 | x = fgb(mask); | |
1593 | if (x < 0) { | |
1594 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | |
1595 | return -1; | |
1596 | } | |
1597 | ||
1598 | base = base_from_shift(ATA_SHIFT_PIO); | |
1599 | xfer_mode = base + x; | |
1600 | ||
1601 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | |
1602 | (int)base, (int)xfer_mode, mask, x); | |
1603 | ||
1604 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1605 | struct ata_device *dev = &ap->device[i]; | |
1606 | if (ata_dev_present(dev)) { | |
1607 | dev->pio_mode = xfer_mode; | |
1608 | dev->xfer_mode = xfer_mode; | |
1609 | dev->xfer_shift = ATA_SHIFT_PIO; | |
1610 | if (ap->ops->set_piomode) | |
1611 | ap->ops->set_piomode(ap, dev); | |
1612 | } | |
1613 | } | |
1614 | ||
1615 | return 0; | |
1616 | } | |
1617 | ||
1618 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |
1619 | unsigned int xfer_shift) | |
1620 | { | |
1621 | int i; | |
1622 | ||
1623 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1624 | struct ata_device *dev = &ap->device[i]; | |
1625 | if (ata_dev_present(dev)) { | |
1626 | dev->dma_mode = xfer_mode; | |
1627 | dev->xfer_mode = xfer_mode; | |
1628 | dev->xfer_shift = xfer_shift; | |
1629 | if (ap->ops->set_dmamode) | |
1630 | ap->ops->set_dmamode(ap, dev); | |
1631 | } | |
1632 | } | |
1633 | } | |
1634 | ||
1635 | /** | |
1636 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1637 | * @ap: port on which timings will be programmed | |
1638 | * | |
780a87f7 JG |
1639 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). |
1640 | * | |
1da177e4 | 1641 | * LOCKING: |
0cba632b | 1642 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1643 | * |
1644 | */ | |
1645 | static void ata_set_mode(struct ata_port *ap) | |
1646 | { | |
1647 | unsigned int i, xfer_shift; | |
1648 | u8 xfer_mode; | |
1649 | int rc; | |
1650 | ||
1651 | /* step 1: always set host PIO timings */ | |
1652 | rc = ata_host_set_pio(ap); | |
1653 | if (rc) | |
1654 | goto err_out; | |
1655 | ||
1656 | /* step 2: choose the best data xfer mode */ | |
1657 | xfer_mode = xfer_shift = 0; | |
1658 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | |
1659 | if (rc) | |
1660 | goto err_out; | |
1661 | ||
1662 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | |
1663 | if (xfer_shift != ATA_SHIFT_PIO) | |
1664 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | |
1665 | ||
1666 | /* step 4: update devices' xfer mode */ | |
1667 | ata_dev_set_mode(ap, &ap->device[0]); | |
1668 | ata_dev_set_mode(ap, &ap->device[1]); | |
1669 | ||
1670 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1671 | return; | |
1672 | ||
1673 | if (ap->ops->post_set_mode) | |
1674 | ap->ops->post_set_mode(ap); | |
1675 | ||
1676 | for (i = 0; i < 2; i++) { | |
1677 | struct ata_device *dev = &ap->device[i]; | |
1678 | ata_dev_set_protocol(dev); | |
1679 | } | |
1680 | ||
1681 | return; | |
1682 | ||
1683 | err_out: | |
1684 | ata_port_disable(ap); | |
1685 | } | |
1686 | ||
1687 | /** | |
1688 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
1689 | * @ap: port containing status register to be polled | |
1690 | * @tmout_pat: impatience timeout | |
1691 | * @tmout: overall timeout | |
1692 | * | |
780a87f7 JG |
1693 | * Sleep until ATA Status register bit BSY clears, |
1694 | * or a timeout occurs. | |
1695 | * | |
1696 | * LOCKING: None. | |
1da177e4 LT |
1697 | * |
1698 | */ | |
1699 | ||
1700 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
1701 | unsigned long tmout_pat, | |
1702 | unsigned long tmout) | |
1703 | { | |
1704 | unsigned long timer_start, timeout; | |
1705 | u8 status; | |
1706 | ||
1707 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
1708 | timer_start = jiffies; | |
1709 | timeout = timer_start + tmout_pat; | |
1710 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1711 | msleep(50); | |
1712 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
1713 | } | |
1714 | ||
1715 | if (status & ATA_BUSY) | |
1716 | printk(KERN_WARNING "ata%u is slow to respond, " | |
1717 | "please be patient\n", ap->id); | |
1718 | ||
1719 | timeout = timer_start + tmout; | |
1720 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1721 | msleep(50); | |
1722 | status = ata_chk_status(ap); | |
1723 | } | |
1724 | ||
1725 | if (status & ATA_BUSY) { | |
1726 | printk(KERN_ERR "ata%u failed to respond (%lu secs)\n", | |
1727 | ap->id, tmout / HZ); | |
1728 | return 1; | |
1729 | } | |
1730 | ||
1731 | return 0; | |
1732 | } | |
1733 | ||
1734 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
1735 | { | |
1736 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1737 | unsigned int dev0 = devmask & (1 << 0); | |
1738 | unsigned int dev1 = devmask & (1 << 1); | |
1739 | unsigned long timeout; | |
1740 | ||
1741 | /* if device 0 was found in ata_devchk, wait for its | |
1742 | * BSY bit to clear | |
1743 | */ | |
1744 | if (dev0) | |
1745 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1746 | ||
1747 | /* if device 1 was found in ata_devchk, wait for | |
1748 | * register access, then wait for BSY to clear | |
1749 | */ | |
1750 | timeout = jiffies + ATA_TMOUT_BOOT; | |
1751 | while (dev1) { | |
1752 | u8 nsect, lbal; | |
1753 | ||
1754 | ap->ops->dev_select(ap, 1); | |
1755 | if (ap->flags & ATA_FLAG_MMIO) { | |
1756 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
1757 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
1758 | } else { | |
1759 | nsect = inb(ioaddr->nsect_addr); | |
1760 | lbal = inb(ioaddr->lbal_addr); | |
1761 | } | |
1762 | if ((nsect == 1) && (lbal == 1)) | |
1763 | break; | |
1764 | if (time_after(jiffies, timeout)) { | |
1765 | dev1 = 0; | |
1766 | break; | |
1767 | } | |
1768 | msleep(50); /* give drive a breather */ | |
1769 | } | |
1770 | if (dev1) | |
1771 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1772 | ||
1773 | /* is all this really necessary? */ | |
1774 | ap->ops->dev_select(ap, 0); | |
1775 | if (dev1) | |
1776 | ap->ops->dev_select(ap, 1); | |
1777 | if (dev0) | |
1778 | ap->ops->dev_select(ap, 0); | |
1779 | } | |
1780 | ||
1781 | /** | |
0cba632b JG |
1782 | * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command. |
1783 | * @ap: Port to reset and probe | |
1784 | * | |
1785 | * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and | |
1786 | * probe the bus. Not often used these days. | |
1da177e4 LT |
1787 | * |
1788 | * LOCKING: | |
0cba632b | 1789 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1790 | * |
1791 | */ | |
1792 | ||
1793 | static unsigned int ata_bus_edd(struct ata_port *ap) | |
1794 | { | |
1795 | struct ata_taskfile tf; | |
1796 | ||
1797 | /* set up execute-device-diag (bus reset) taskfile */ | |
1798 | /* also, take interrupts to a known state (disabled) */ | |
1799 | DPRINTK("execute-device-diag\n"); | |
1800 | ata_tf_init(ap, &tf, 0); | |
1801 | tf.ctl |= ATA_NIEN; | |
1802 | tf.command = ATA_CMD_EDD; | |
1803 | tf.protocol = ATA_PROT_NODATA; | |
1804 | ||
1805 | /* do bus reset */ | |
1806 | ata_tf_to_host(ap, &tf); | |
1807 | ||
1808 | /* spec says at least 2ms. but who knows with those | |
1809 | * crazy ATAPI devices... | |
1810 | */ | |
1811 | msleep(150); | |
1812 | ||
1813 | return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1814 | } | |
1815 | ||
1816 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
1817 | unsigned int devmask) | |
1818 | { | |
1819 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1820 | ||
1821 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
1822 | ||
1823 | /* software reset. causes dev0 to be selected */ | |
1824 | if (ap->flags & ATA_FLAG_MMIO) { | |
1825 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1826 | udelay(20); /* FIXME: flush */ | |
1827 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
1828 | udelay(20); /* FIXME: flush */ | |
1829 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1830 | } else { | |
1831 | outb(ap->ctl, ioaddr->ctl_addr); | |
1832 | udelay(10); | |
1833 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
1834 | udelay(10); | |
1835 | outb(ap->ctl, ioaddr->ctl_addr); | |
1836 | } | |
1837 | ||
1838 | /* spec mandates ">= 2ms" before checking status. | |
1839 | * We wait 150ms, because that was the magic delay used for | |
1840 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
1841 | * between when the ATA command register is written, and then | |
1842 | * status is checked. Because waiting for "a while" before | |
1843 | * checking status is fine, post SRST, we perform this magic | |
1844 | * delay here as well. | |
1845 | */ | |
1846 | msleep(150); | |
1847 | ||
1848 | ata_bus_post_reset(ap, devmask); | |
1849 | ||
1850 | return 0; | |
1851 | } | |
1852 | ||
1853 | /** | |
1854 | * ata_bus_reset - reset host port and associated ATA channel | |
1855 | * @ap: port to reset | |
1856 | * | |
1857 | * This is typically the first time we actually start issuing | |
1858 | * commands to the ATA channel. We wait for BSY to clear, then | |
1859 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
1860 | * result. Determine what devices, if any, are on the channel | |
1861 | * by looking at the device 0/1 error register. Look at the signature | |
1862 | * stored in each device's taskfile registers, to determine if | |
1863 | * the device is ATA or ATAPI. | |
1864 | * | |
1865 | * LOCKING: | |
0cba632b JG |
1866 | * PCI/etc. bus probe sem. |
1867 | * Obtains host_set lock. | |
1da177e4 LT |
1868 | * |
1869 | * SIDE EFFECTS: | |
1870 | * Sets ATA_FLAG_PORT_DISABLED if bus reset fails. | |
1871 | */ | |
1872 | ||
1873 | void ata_bus_reset(struct ata_port *ap) | |
1874 | { | |
1875 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1876 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
1877 | u8 err; | |
1878 | unsigned int dev0, dev1 = 0, rc = 0, devmask = 0; | |
1879 | ||
1880 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
1881 | ||
1882 | /* determine if device 0/1 are present */ | |
1883 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
1884 | dev0 = 1; | |
1885 | else { | |
1886 | dev0 = ata_devchk(ap, 0); | |
1887 | if (slave_possible) | |
1888 | dev1 = ata_devchk(ap, 1); | |
1889 | } | |
1890 | ||
1891 | if (dev0) | |
1892 | devmask |= (1 << 0); | |
1893 | if (dev1) | |
1894 | devmask |= (1 << 1); | |
1895 | ||
1896 | /* select device 0 again */ | |
1897 | ap->ops->dev_select(ap, 0); | |
1898 | ||
1899 | /* issue bus reset */ | |
1900 | if (ap->flags & ATA_FLAG_SRST) | |
1901 | rc = ata_bus_softreset(ap, devmask); | |
1902 | else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) { | |
1903 | /* set up device control */ | |
1904 | if (ap->flags & ATA_FLAG_MMIO) | |
1905 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1906 | else | |
1907 | outb(ap->ctl, ioaddr->ctl_addr); | |
1908 | rc = ata_bus_edd(ap); | |
1909 | } | |
1910 | ||
1911 | if (rc) | |
1912 | goto err_out; | |
1913 | ||
1914 | /* | |
1915 | * determine by signature whether we have ATA or ATAPI devices | |
1916 | */ | |
1917 | err = ata_dev_try_classify(ap, 0); | |
1918 | if ((slave_possible) && (err != 0x81)) | |
1919 | ata_dev_try_classify(ap, 1); | |
1920 | ||
1921 | /* re-enable interrupts */ | |
1922 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
1923 | ata_irq_on(ap); | |
1924 | ||
1925 | /* is double-select really necessary? */ | |
1926 | if (ap->device[1].class != ATA_DEV_NONE) | |
1927 | ap->ops->dev_select(ap, 1); | |
1928 | if (ap->device[0].class != ATA_DEV_NONE) | |
1929 | ap->ops->dev_select(ap, 0); | |
1930 | ||
1931 | /* if no devices were detected, disable this port */ | |
1932 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
1933 | (ap->device[1].class == ATA_DEV_NONE)) | |
1934 | goto err_out; | |
1935 | ||
1936 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
1937 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
1938 | if (ap->flags & ATA_FLAG_MMIO) | |
1939 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1940 | else | |
1941 | outb(ap->ctl, ioaddr->ctl_addr); | |
1942 | } | |
1943 | ||
1944 | DPRINTK("EXIT\n"); | |
1945 | return; | |
1946 | ||
1947 | err_out: | |
1948 | printk(KERN_ERR "ata%u: disabling port\n", ap->id); | |
1949 | ap->ops->port_disable(ap); | |
1950 | ||
1951 | DPRINTK("EXIT\n"); | |
1952 | } | |
1953 | ||
1954 | static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
1955 | { | |
1956 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | |
1957 | ap->id, dev->devno); | |
1958 | } | |
1959 | ||
1960 | static const char * ata_dma_blacklist [] = { | |
1961 | "WDC AC11000H", | |
1962 | "WDC AC22100H", | |
1963 | "WDC AC32500H", | |
1964 | "WDC AC33100H", | |
1965 | "WDC AC31600H", | |
1966 | "WDC AC32100H", | |
1967 | "WDC AC23200L", | |
1968 | "Compaq CRD-8241B", | |
1969 | "CRD-8400B", | |
1970 | "CRD-8480B", | |
1971 | "CRD-8482B", | |
1972 | "CRD-84", | |
1973 | "SanDisk SDP3B", | |
1974 | "SanDisk SDP3B-64", | |
1975 | "SANYO CD-ROM CRD", | |
1976 | "HITACHI CDR-8", | |
1977 | "HITACHI CDR-8335", | |
1978 | "HITACHI CDR-8435", | |
1979 | "Toshiba CD-ROM XM-6202B", | |
e922256a | 1980 | "TOSHIBA CD-ROM XM-1702BC", |
1da177e4 LT |
1981 | "CD-532E-A", |
1982 | "E-IDE CD-ROM CR-840", | |
1983 | "CD-ROM Drive/F5A", | |
1984 | "WPI CDD-820", | |
1985 | "SAMSUNG CD-ROM SC-148C", | |
1986 | "SAMSUNG CD-ROM SC", | |
1987 | "SanDisk SDP3B-64", | |
1da177e4 LT |
1988 | "ATAPI CD-ROM DRIVE 40X MAXIMUM", |
1989 | "_NEC DV5800A", | |
1990 | }; | |
1991 | ||
1992 | static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
1993 | { | |
1994 | unsigned char model_num[40]; | |
1995 | char *s; | |
1996 | unsigned int len; | |
1997 | int i; | |
1998 | ||
1999 | ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS, | |
2000 | sizeof(model_num)); | |
2001 | s = &model_num[0]; | |
2002 | len = strnlen(s, sizeof(model_num)); | |
2003 | ||
2004 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
2005 | while ((len > 0) && (s[len - 1] == ' ')) { | |
2006 | len--; | |
2007 | s[len] = 0; | |
2008 | } | |
2009 | ||
2010 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) | |
2011 | if (!strncmp(ata_dma_blacklist[i], s, len)) | |
2012 | return 1; | |
2013 | ||
2014 | return 0; | |
2015 | } | |
2016 | ||
2017 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift) | |
2018 | { | |
2019 | struct ata_device *master, *slave; | |
2020 | unsigned int mask; | |
2021 | ||
2022 | master = &ap->device[0]; | |
2023 | slave = &ap->device[1]; | |
2024 | ||
2025 | assert (ata_dev_present(master) || ata_dev_present(slave)); | |
2026 | ||
2027 | if (shift == ATA_SHIFT_UDMA) { | |
2028 | mask = ap->udma_mask; | |
2029 | if (ata_dev_present(master)) { | |
2030 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | |
2031 | if (ata_dma_blacklisted(ap, master)) { | |
2032 | mask = 0; | |
2033 | ata_pr_blacklisted(ap, master); | |
2034 | } | |
2035 | } | |
2036 | if (ata_dev_present(slave)) { | |
2037 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | |
2038 | if (ata_dma_blacklisted(ap, slave)) { | |
2039 | mask = 0; | |
2040 | ata_pr_blacklisted(ap, slave); | |
2041 | } | |
2042 | } | |
2043 | } | |
2044 | else if (shift == ATA_SHIFT_MWDMA) { | |
2045 | mask = ap->mwdma_mask; | |
2046 | if (ata_dev_present(master)) { | |
2047 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | |
2048 | if (ata_dma_blacklisted(ap, master)) { | |
2049 | mask = 0; | |
2050 | ata_pr_blacklisted(ap, master); | |
2051 | } | |
2052 | } | |
2053 | if (ata_dev_present(slave)) { | |
2054 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | |
2055 | if (ata_dma_blacklisted(ap, slave)) { | |
2056 | mask = 0; | |
2057 | ata_pr_blacklisted(ap, slave); | |
2058 | } | |
2059 | } | |
2060 | } | |
2061 | else if (shift == ATA_SHIFT_PIO) { | |
2062 | mask = ap->pio_mask; | |
2063 | if (ata_dev_present(master)) { | |
2064 | /* spec doesn't return explicit support for | |
2065 | * PIO0-2, so we fake it | |
2066 | */ | |
2067 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | |
2068 | tmp_mode <<= 3; | |
2069 | tmp_mode |= 0x7; | |
2070 | mask &= tmp_mode; | |
2071 | } | |
2072 | if (ata_dev_present(slave)) { | |
2073 | /* spec doesn't return explicit support for | |
2074 | * PIO0-2, so we fake it | |
2075 | */ | |
2076 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | |
2077 | tmp_mode <<= 3; | |
2078 | tmp_mode |= 0x7; | |
2079 | mask &= tmp_mode; | |
2080 | } | |
2081 | } | |
2082 | else { | |
2083 | mask = 0xffffffff; /* shut up compiler warning */ | |
2084 | BUG(); | |
2085 | } | |
2086 | ||
2087 | return mask; | |
2088 | } | |
2089 | ||
2090 | /* find greatest bit */ | |
2091 | static int fgb(u32 bitmap) | |
2092 | { | |
2093 | unsigned int i; | |
2094 | int x = -1; | |
2095 | ||
2096 | for (i = 0; i < 32; i++) | |
2097 | if (bitmap & (1 << i)) | |
2098 | x = i; | |
2099 | ||
2100 | return x; | |
2101 | } | |
2102 | ||
2103 | /** | |
2104 | * ata_choose_xfer_mode - attempt to find best transfer mode | |
2105 | * @ap: Port for which an xfer mode will be selected | |
2106 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | |
2107 | * @xfer_shift_out: (output) bit shift that selects this mode | |
2108 | * | |
0cba632b JG |
2109 | * Based on host and device capabilities, determine the |
2110 | * maximum transfer mode that is amenable to all. | |
2111 | * | |
1da177e4 | 2112 | * LOCKING: |
0cba632b | 2113 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2114 | * |
2115 | * RETURNS: | |
2116 | * Zero on success, negative on error. | |
2117 | */ | |
2118 | ||
2119 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
2120 | u8 *xfer_mode_out, | |
2121 | unsigned int *xfer_shift_out) | |
2122 | { | |
2123 | unsigned int mask, shift; | |
2124 | int x, i; | |
2125 | ||
2126 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | |
2127 | shift = xfer_mode_classes[i].shift; | |
2128 | mask = ata_get_mode_mask(ap, shift); | |
2129 | ||
2130 | x = fgb(mask); | |
2131 | if (x >= 0) { | |
2132 | *xfer_mode_out = xfer_mode_classes[i].base + x; | |
2133 | *xfer_shift_out = shift; | |
2134 | return 0; | |
2135 | } | |
2136 | } | |
2137 | ||
2138 | return -1; | |
2139 | } | |
2140 | ||
2141 | /** | |
2142 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
2143 | * @ap: Port associated with device @dev | |
2144 | * @dev: Device to which command will be sent | |
2145 | * | |
780a87f7 JG |
2146 | * Issue SET FEATURES - XFER MODE command to device @dev |
2147 | * on port @ap. | |
2148 | * | |
1da177e4 | 2149 | * LOCKING: |
0cba632b | 2150 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2151 | */ |
2152 | ||
2153 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) | |
2154 | { | |
2155 | DECLARE_COMPLETION(wait); | |
2156 | struct ata_queued_cmd *qc; | |
2157 | int rc; | |
2158 | unsigned long flags; | |
2159 | ||
2160 | /* set up set-features taskfile */ | |
2161 | DPRINTK("set features - xfer mode\n"); | |
2162 | ||
2163 | qc = ata_qc_new_init(ap, dev); | |
2164 | BUG_ON(qc == NULL); | |
2165 | ||
2166 | qc->tf.command = ATA_CMD_SET_FEATURES; | |
2167 | qc->tf.feature = SETFEATURES_XFER; | |
2168 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2169 | qc->tf.protocol = ATA_PROT_NODATA; | |
2170 | qc->tf.nsect = dev->xfer_mode; | |
2171 | ||
2172 | qc->waiting = &wait; | |
2173 | qc->complete_fn = ata_qc_complete_noop; | |
2174 | ||
2175 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2176 | rc = ata_qc_issue(qc); | |
2177 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2178 | ||
2179 | if (rc) | |
2180 | ata_port_disable(ap); | |
2181 | else | |
2182 | wait_for_completion(&wait); | |
2183 | ||
2184 | DPRINTK("EXIT\n"); | |
2185 | } | |
2186 | ||
8bf62ece AL |
2187 | /** |
2188 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
2189 | * @ap: Port associated with device @dev | |
2190 | * @dev: Device to which command will be sent | |
2191 | * | |
2192 | * LOCKING: | |
2193 | */ | |
2194 | ||
2195 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev) | |
2196 | { | |
2197 | DECLARE_COMPLETION(wait); | |
2198 | struct ata_queued_cmd *qc; | |
2199 | int rc; | |
2200 | unsigned long flags; | |
2201 | u16 sectors = dev->id[6]; | |
2202 | u16 heads = dev->id[3]; | |
2203 | ||
2204 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
2205 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
2206 | return; | |
2207 | ||
2208 | /* set up init dev params taskfile */ | |
2209 | DPRINTK("init dev params \n"); | |
2210 | ||
2211 | qc = ata_qc_new_init(ap, dev); | |
2212 | BUG_ON(qc == NULL); | |
2213 | ||
2214 | qc->tf.command = ATA_CMD_INIT_DEV_PARAMS; | |
2215 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2216 | qc->tf.protocol = ATA_PROT_NODATA; | |
2217 | qc->tf.nsect = sectors; | |
2218 | qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
2219 | ||
2220 | qc->waiting = &wait; | |
2221 | qc->complete_fn = ata_qc_complete_noop; | |
2222 | ||
2223 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2224 | rc = ata_qc_issue(qc); | |
2225 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2226 | ||
2227 | if (rc) | |
2228 | ata_port_disable(ap); | |
2229 | else | |
2230 | wait_for_completion(&wait); | |
2231 | ||
2232 | DPRINTK("EXIT\n"); | |
2233 | } | |
2234 | ||
1da177e4 | 2235 | /** |
0cba632b JG |
2236 | * ata_sg_clean - Unmap DMA memory associated with command |
2237 | * @qc: Command containing DMA memory to be released | |
2238 | * | |
2239 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
2240 | * |
2241 | * LOCKING: | |
0cba632b | 2242 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2243 | */ |
2244 | ||
2245 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
2246 | { | |
2247 | struct ata_port *ap = qc->ap; | |
2248 | struct scatterlist *sg = qc->sg; | |
2249 | int dir = qc->dma_dir; | |
2250 | ||
2251 | assert(qc->flags & ATA_QCFLAG_DMAMAP); | |
2252 | assert(sg != NULL); | |
2253 | ||
2254 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
2255 | assert(qc->n_elem == 1); | |
2256 | ||
2257 | DPRINTK("unmapping %u sg elements\n", qc->n_elem); | |
2258 | ||
2259 | if (qc->flags & ATA_QCFLAG_SG) | |
2260 | dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2261 | else | |
2262 | dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]), | |
2263 | sg_dma_len(&sg[0]), dir); | |
2264 | ||
2265 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
2266 | qc->sg = NULL; | |
2267 | } | |
2268 | ||
2269 | /** | |
2270 | * ata_fill_sg - Fill PCI IDE PRD table | |
2271 | * @qc: Metadata associated with taskfile to be transferred | |
2272 | * | |
780a87f7 JG |
2273 | * Fill PCI IDE PRD (scatter-gather) table with segments |
2274 | * associated with the current disk command. | |
2275 | * | |
1da177e4 | 2276 | * LOCKING: |
780a87f7 | 2277 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2278 | * |
2279 | */ | |
2280 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
2281 | { | |
2282 | struct scatterlist *sg = qc->sg; | |
2283 | struct ata_port *ap = qc->ap; | |
2284 | unsigned int idx, nelem; | |
2285 | ||
2286 | assert(sg != NULL); | |
2287 | assert(qc->n_elem > 0); | |
2288 | ||
2289 | idx = 0; | |
2290 | for (nelem = qc->n_elem; nelem; nelem--,sg++) { | |
2291 | u32 addr, offset; | |
2292 | u32 sg_len, len; | |
2293 | ||
2294 | /* determine if physical DMA addr spans 64K boundary. | |
2295 | * Note h/w doesn't support 64-bit, so we unconditionally | |
2296 | * truncate dma_addr_t to u32. | |
2297 | */ | |
2298 | addr = (u32) sg_dma_address(sg); | |
2299 | sg_len = sg_dma_len(sg); | |
2300 | ||
2301 | while (sg_len) { | |
2302 | offset = addr & 0xffff; | |
2303 | len = sg_len; | |
2304 | if ((offset + sg_len) > 0x10000) | |
2305 | len = 0x10000 - offset; | |
2306 | ||
2307 | ap->prd[idx].addr = cpu_to_le32(addr); | |
2308 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
2309 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
2310 | ||
2311 | idx++; | |
2312 | sg_len -= len; | |
2313 | addr += len; | |
2314 | } | |
2315 | } | |
2316 | ||
2317 | if (idx) | |
2318 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
2319 | } | |
2320 | /** | |
2321 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
2322 | * @qc: Metadata associated with taskfile to check | |
2323 | * | |
780a87f7 JG |
2324 | * Allow low-level driver to filter ATA PACKET commands, returning |
2325 | * a status indicating whether or not it is OK to use DMA for the | |
2326 | * supplied PACKET command. | |
2327 | * | |
1da177e4 | 2328 | * LOCKING: |
0cba632b JG |
2329 | * spin_lock_irqsave(host_set lock) |
2330 | * | |
1da177e4 LT |
2331 | * RETURNS: 0 when ATAPI DMA can be used |
2332 | * nonzero otherwise | |
2333 | */ | |
2334 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
2335 | { | |
2336 | struct ata_port *ap = qc->ap; | |
2337 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
2338 | ||
2339 | if (ap->ops->check_atapi_dma) | |
2340 | rc = ap->ops->check_atapi_dma(qc); | |
2341 | ||
2342 | return rc; | |
2343 | } | |
2344 | /** | |
2345 | * ata_qc_prep - Prepare taskfile for submission | |
2346 | * @qc: Metadata associated with taskfile to be prepared | |
2347 | * | |
780a87f7 JG |
2348 | * Prepare ATA taskfile for submission. |
2349 | * | |
1da177e4 LT |
2350 | * LOCKING: |
2351 | * spin_lock_irqsave(host_set lock) | |
2352 | */ | |
2353 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
2354 | { | |
2355 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
2356 | return; | |
2357 | ||
2358 | ata_fill_sg(qc); | |
2359 | } | |
2360 | ||
0cba632b JG |
2361 | /** |
2362 | * ata_sg_init_one - Associate command with memory buffer | |
2363 | * @qc: Command to be associated | |
2364 | * @buf: Memory buffer | |
2365 | * @buflen: Length of memory buffer, in bytes. | |
2366 | * | |
2367 | * Initialize the data-related elements of queued_cmd @qc | |
2368 | * to point to a single memory buffer, @buf of byte length @buflen. | |
2369 | * | |
2370 | * LOCKING: | |
2371 | * spin_lock_irqsave(host_set lock) | |
2372 | */ | |
2373 | ||
1da177e4 LT |
2374 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
2375 | { | |
2376 | struct scatterlist *sg; | |
2377 | ||
2378 | qc->flags |= ATA_QCFLAG_SINGLE; | |
2379 | ||
2380 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
2381 | qc->sg = &qc->sgent; | |
2382 | qc->n_elem = 1; | |
2383 | qc->buf_virt = buf; | |
2384 | ||
2385 | sg = qc->sg; | |
2386 | sg->page = virt_to_page(buf); | |
2387 | sg->offset = (unsigned long) buf & ~PAGE_MASK; | |
32529e01 | 2388 | sg->length = buflen; |
1da177e4 LT |
2389 | } |
2390 | ||
0cba632b JG |
2391 | /** |
2392 | * ata_sg_init - Associate command with scatter-gather table. | |
2393 | * @qc: Command to be associated | |
2394 | * @sg: Scatter-gather table. | |
2395 | * @n_elem: Number of elements in s/g table. | |
2396 | * | |
2397 | * Initialize the data-related elements of queued_cmd @qc | |
2398 | * to point to a scatter-gather table @sg, containing @n_elem | |
2399 | * elements. | |
2400 | * | |
2401 | * LOCKING: | |
2402 | * spin_lock_irqsave(host_set lock) | |
2403 | */ | |
2404 | ||
1da177e4 LT |
2405 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
2406 | unsigned int n_elem) | |
2407 | { | |
2408 | qc->flags |= ATA_QCFLAG_SG; | |
2409 | qc->sg = sg; | |
2410 | qc->n_elem = n_elem; | |
2411 | } | |
2412 | ||
2413 | /** | |
0cba632b JG |
2414 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
2415 | * @qc: Command with memory buffer to be mapped. | |
2416 | * | |
2417 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
2418 | * |
2419 | * LOCKING: | |
2420 | * spin_lock_irqsave(host_set lock) | |
2421 | * | |
2422 | * RETURNS: | |
0cba632b | 2423 | * Zero on success, negative on error. |
1da177e4 LT |
2424 | */ |
2425 | ||
2426 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
2427 | { | |
2428 | struct ata_port *ap = qc->ap; | |
2429 | int dir = qc->dma_dir; | |
2430 | struct scatterlist *sg = qc->sg; | |
2431 | dma_addr_t dma_address; | |
2432 | ||
2433 | dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt, | |
32529e01 | 2434 | sg->length, dir); |
1da177e4 LT |
2435 | if (dma_mapping_error(dma_address)) |
2436 | return -1; | |
2437 | ||
2438 | sg_dma_address(sg) = dma_address; | |
32529e01 | 2439 | sg_dma_len(sg) = sg->length; |
1da177e4 LT |
2440 | |
2441 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), | |
2442 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2443 | ||
2444 | return 0; | |
2445 | } | |
2446 | ||
2447 | /** | |
0cba632b JG |
2448 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
2449 | * @qc: Command with scatter-gather table to be mapped. | |
2450 | * | |
2451 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
2452 | * |
2453 | * LOCKING: | |
2454 | * spin_lock_irqsave(host_set lock) | |
2455 | * | |
2456 | * RETURNS: | |
0cba632b | 2457 | * Zero on success, negative on error. |
1da177e4 LT |
2458 | * |
2459 | */ | |
2460 | ||
2461 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
2462 | { | |
2463 | struct ata_port *ap = qc->ap; | |
2464 | struct scatterlist *sg = qc->sg; | |
2465 | int n_elem, dir; | |
2466 | ||
2467 | VPRINTK("ENTER, ata%u\n", ap->id); | |
2468 | assert(qc->flags & ATA_QCFLAG_SG); | |
2469 | ||
2470 | dir = qc->dma_dir; | |
2471 | n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2472 | if (n_elem < 1) | |
2473 | return -1; | |
2474 | ||
2475 | DPRINTK("%d sg elements mapped\n", n_elem); | |
2476 | ||
2477 | qc->n_elem = n_elem; | |
2478 | ||
2479 | return 0; | |
2480 | } | |
2481 | ||
40e8c82c TH |
2482 | /** |
2483 | * ata_poll_qc_complete - turn irq back on and finish qc | |
2484 | * @qc: Command to complete | |
2485 | * @drv_stat: ATA status register content | |
2486 | * | |
2487 | * LOCKING: | |
2488 | * None. (grabs host lock) | |
2489 | */ | |
2490 | ||
2491 | void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |
2492 | { | |
2493 | struct ata_port *ap = qc->ap; | |
b8f6153e | 2494 | unsigned long flags; |
40e8c82c | 2495 | |
b8f6153e | 2496 | spin_lock_irqsave(&ap->host_set->lock, flags); |
40e8c82c TH |
2497 | ata_irq_on(ap); |
2498 | ata_qc_complete(qc, drv_stat); | |
b8f6153e | 2499 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
40e8c82c TH |
2500 | } |
2501 | ||
1da177e4 LT |
2502 | /** |
2503 | * ata_pio_poll - | |
2504 | * @ap: | |
2505 | * | |
2506 | * LOCKING: | |
0cba632b | 2507 | * None. (executing in kernel thread context) |
1da177e4 LT |
2508 | * |
2509 | * RETURNS: | |
2510 | * | |
2511 | */ | |
2512 | ||
2513 | static unsigned long ata_pio_poll(struct ata_port *ap) | |
2514 | { | |
2515 | u8 status; | |
14be71f4 AL |
2516 | unsigned int poll_state = HSM_ST_UNKNOWN; |
2517 | unsigned int reg_state = HSM_ST_UNKNOWN; | |
2518 | const unsigned int tmout_state = HSM_ST_TMOUT; | |
2519 | ||
2520 | switch (ap->hsm_task_state) { | |
2521 | case HSM_ST: | |
2522 | case HSM_ST_POLL: | |
2523 | poll_state = HSM_ST_POLL; | |
2524 | reg_state = HSM_ST; | |
1da177e4 | 2525 | break; |
14be71f4 AL |
2526 | case HSM_ST_LAST: |
2527 | case HSM_ST_LAST_POLL: | |
2528 | poll_state = HSM_ST_LAST_POLL; | |
2529 | reg_state = HSM_ST_LAST; | |
1da177e4 LT |
2530 | break; |
2531 | default: | |
2532 | BUG(); | |
2533 | break; | |
2534 | } | |
2535 | ||
2536 | status = ata_chk_status(ap); | |
2537 | if (status & ATA_BUSY) { | |
2538 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
14be71f4 | 2539 | ap->hsm_task_state = tmout_state; |
1da177e4 LT |
2540 | return 0; |
2541 | } | |
14be71f4 | 2542 | ap->hsm_task_state = poll_state; |
1da177e4 LT |
2543 | return ATA_SHORT_PAUSE; |
2544 | } | |
2545 | ||
14be71f4 | 2546 | ap->hsm_task_state = reg_state; |
1da177e4 LT |
2547 | return 0; |
2548 | } | |
2549 | ||
2550 | /** | |
2551 | * ata_pio_complete - | |
2552 | * @ap: | |
2553 | * | |
2554 | * LOCKING: | |
0cba632b | 2555 | * None. (executing in kernel thread context) |
7fb6ec28 JG |
2556 | * |
2557 | * RETURNS: | |
2558 | * Non-zero if qc completed, zero otherwise. | |
1da177e4 LT |
2559 | */ |
2560 | ||
7fb6ec28 | 2561 | static int ata_pio_complete (struct ata_port *ap) |
1da177e4 LT |
2562 | { |
2563 | struct ata_queued_cmd *qc; | |
2564 | u8 drv_stat; | |
2565 | ||
2566 | /* | |
31433ea3 AC |
2567 | * This is purely heuristic. This is a fast path. Sometimes when |
2568 | * we enter, BSY will be cleared in a chk-status or two. If not, | |
2569 | * the drive is probably seeking or something. Snooze for a couple | |
2570 | * msecs, then chk-status again. If still busy, fall back to | |
14be71f4 | 2571 | * HSM_ST_POLL state. |
1da177e4 LT |
2572 | */ |
2573 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2574 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
2575 | msleep(2); | |
2576 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2577 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
14be71f4 | 2578 | ap->hsm_task_state = HSM_ST_LAST_POLL; |
1da177e4 | 2579 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
7fb6ec28 | 2580 | return 0; |
1da177e4 LT |
2581 | } |
2582 | } | |
2583 | ||
2584 | drv_stat = ata_wait_idle(ap); | |
2585 | if (!ata_ok(drv_stat)) { | |
14be71f4 | 2586 | ap->hsm_task_state = HSM_ST_ERR; |
7fb6ec28 | 2587 | return 0; |
1da177e4 LT |
2588 | } |
2589 | ||
2590 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2591 | assert(qc != NULL); | |
2592 | ||
14be71f4 | 2593 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 2594 | |
40e8c82c | 2595 | ata_poll_qc_complete(qc, drv_stat); |
7fb6ec28 JG |
2596 | |
2597 | /* another command may start at this point */ | |
2598 | ||
2599 | return 1; | |
1da177e4 LT |
2600 | } |
2601 | ||
0baab86b EF |
2602 | |
2603 | /** | |
2604 | * swap_buf_le16 - | |
2605 | * @buf: Buffer to swap | |
2606 | * @buf_words: Number of 16-bit words in buffer. | |
2607 | * | |
2608 | * Swap halves of 16-bit words if needed to convert from | |
2609 | * little-endian byte order to native cpu byte order, or | |
2610 | * vice-versa. | |
2611 | * | |
2612 | * LOCKING: | |
2613 | */ | |
1da177e4 LT |
2614 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
2615 | { | |
2616 | #ifdef __BIG_ENDIAN | |
2617 | unsigned int i; | |
2618 | ||
2619 | for (i = 0; i < buf_words; i++) | |
2620 | buf[i] = le16_to_cpu(buf[i]); | |
2621 | #endif /* __BIG_ENDIAN */ | |
2622 | } | |
2623 | ||
6ae4cfb5 AL |
2624 | /** |
2625 | * ata_mmio_data_xfer - Transfer data by MMIO | |
2626 | * @ap: port to read/write | |
2627 | * @buf: data buffer | |
2628 | * @buflen: buffer length | |
344babaa | 2629 | * @write_data: read/write |
6ae4cfb5 AL |
2630 | * |
2631 | * Transfer data from/to the device data register by MMIO. | |
2632 | * | |
2633 | * LOCKING: | |
2634 | * Inherited from caller. | |
2635 | * | |
2636 | */ | |
2637 | ||
1da177e4 LT |
2638 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2639 | unsigned int buflen, int write_data) | |
2640 | { | |
2641 | unsigned int i; | |
2642 | unsigned int words = buflen >> 1; | |
2643 | u16 *buf16 = (u16 *) buf; | |
2644 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
2645 | ||
6ae4cfb5 | 2646 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
2647 | if (write_data) { |
2648 | for (i = 0; i < words; i++) | |
2649 | writew(le16_to_cpu(buf16[i]), mmio); | |
2650 | } else { | |
2651 | for (i = 0; i < words; i++) | |
2652 | buf16[i] = cpu_to_le16(readw(mmio)); | |
2653 | } | |
6ae4cfb5 AL |
2654 | |
2655 | /* Transfer trailing 1 byte, if any. */ | |
2656 | if (unlikely(buflen & 0x01)) { | |
2657 | u16 align_buf[1] = { 0 }; | |
2658 | unsigned char *trailing_buf = buf + buflen - 1; | |
2659 | ||
2660 | if (write_data) { | |
2661 | memcpy(align_buf, trailing_buf, 1); | |
2662 | writew(le16_to_cpu(align_buf[0]), mmio); | |
2663 | } else { | |
2664 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
2665 | memcpy(trailing_buf, align_buf, 1); | |
2666 | } | |
2667 | } | |
1da177e4 LT |
2668 | } |
2669 | ||
6ae4cfb5 AL |
2670 | /** |
2671 | * ata_pio_data_xfer - Transfer data by PIO | |
2672 | * @ap: port to read/write | |
2673 | * @buf: data buffer | |
2674 | * @buflen: buffer length | |
344babaa | 2675 | * @write_data: read/write |
6ae4cfb5 AL |
2676 | * |
2677 | * Transfer data from/to the device data register by PIO. | |
2678 | * | |
2679 | * LOCKING: | |
2680 | * Inherited from caller. | |
2681 | * | |
2682 | */ | |
2683 | ||
1da177e4 LT |
2684 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2685 | unsigned int buflen, int write_data) | |
2686 | { | |
6ae4cfb5 | 2687 | unsigned int words = buflen >> 1; |
1da177e4 | 2688 | |
6ae4cfb5 | 2689 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 2690 | if (write_data) |
6ae4cfb5 | 2691 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 2692 | else |
6ae4cfb5 AL |
2693 | insw(ap->ioaddr.data_addr, buf, words); |
2694 | ||
2695 | /* Transfer trailing 1 byte, if any. */ | |
2696 | if (unlikely(buflen & 0x01)) { | |
2697 | u16 align_buf[1] = { 0 }; | |
2698 | unsigned char *trailing_buf = buf + buflen - 1; | |
2699 | ||
2700 | if (write_data) { | |
2701 | memcpy(align_buf, trailing_buf, 1); | |
2702 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
2703 | } else { | |
2704 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
2705 | memcpy(trailing_buf, align_buf, 1); | |
2706 | } | |
2707 | } | |
1da177e4 LT |
2708 | } |
2709 | ||
6ae4cfb5 AL |
2710 | /** |
2711 | * ata_data_xfer - Transfer data from/to the data register. | |
2712 | * @ap: port to read/write | |
2713 | * @buf: data buffer | |
2714 | * @buflen: buffer length | |
2715 | * @do_write: read/write | |
2716 | * | |
2717 | * Transfer data from/to the device data register. | |
2718 | * | |
2719 | * LOCKING: | |
2720 | * Inherited from caller. | |
2721 | * | |
2722 | */ | |
2723 | ||
1da177e4 LT |
2724 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
2725 | unsigned int buflen, int do_write) | |
2726 | { | |
2727 | if (ap->flags & ATA_FLAG_MMIO) | |
2728 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
2729 | else | |
2730 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
2731 | } | |
2732 | ||
6ae4cfb5 AL |
2733 | /** |
2734 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
2735 | * @qc: Command on going | |
2736 | * | |
2737 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
2738 | * | |
2739 | * LOCKING: | |
2740 | * Inherited from caller. | |
2741 | */ | |
2742 | ||
1da177e4 LT |
2743 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
2744 | { | |
2745 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2746 | struct scatterlist *sg = qc->sg; | |
2747 | struct ata_port *ap = qc->ap; | |
2748 | struct page *page; | |
2749 | unsigned int offset; | |
2750 | unsigned char *buf; | |
312f7da2 | 2751 | unsigned long flags; |
1da177e4 LT |
2752 | |
2753 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 2754 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
2755 | |
2756 | page = sg[qc->cursg].page; | |
2757 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
2758 | ||
2759 | /* get the current page and offset */ | |
2760 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2761 | offset %= PAGE_SIZE; | |
2762 | ||
1da177e4 LT |
2763 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
2764 | ||
083958d3 AL |
2765 | local_irq_save(flags); |
2766 | buf = kmap_atomic(page, KM_IRQ0); | |
2767 | ||
1da177e4 | 2768 | /* do the actual data transfer */ |
083958d3 | 2769 | ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write); |
1da177e4 | 2770 | |
083958d3 | 2771 | kunmap_atomic(buf, KM_IRQ0); |
312f7da2 | 2772 | local_irq_restore(flags); |
7282aa4b AL |
2773 | |
2774 | qc->cursect++; | |
2775 | qc->cursg_ofs++; | |
2776 | ||
2777 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { | |
2778 | qc->cursg++; | |
2779 | qc->cursg_ofs = 0; | |
2780 | } | |
1da177e4 LT |
2781 | } |
2782 | ||
c71c1857 AL |
2783 | /** |
2784 | * atapi_send_cdb - Write CDB bytes to hardware | |
2785 | * @ap: Port to which ATAPI device is attached. | |
2786 | * @qc: Taskfile currently active | |
2787 | * | |
2788 | * When device has indicated its readiness to accept | |
2789 | * a CDB, this function is called. Send the CDB. | |
2790 | * | |
2791 | * LOCKING: | |
2792 | * caller. | |
2793 | */ | |
2794 | ||
2795 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
2796 | { | |
2797 | /* send SCSI cdb */ | |
2798 | DPRINTK("send cdb\n"); | |
2799 | assert(ap->cdb_len >= 12); | |
2800 | ||
2801 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
2802 | ata_altstatus(ap); /* flush */ | |
2803 | ||
2804 | switch (qc->tf.protocol) { | |
2805 | case ATA_PROT_ATAPI: | |
2806 | ap->hsm_task_state = HSM_ST; | |
2807 | break; | |
2808 | case ATA_PROT_ATAPI_NODATA: | |
2809 | ap->hsm_task_state = HSM_ST_LAST; | |
2810 | break; | |
2811 | case ATA_PROT_ATAPI_DMA: | |
2812 | ap->hsm_task_state = HSM_ST_LAST; | |
2813 | /* initiate bmdma */ | |
2814 | ap->ops->bmdma_start(qc); | |
2815 | break; | |
2816 | } | |
2817 | } | |
2818 | ||
2819 | /** | |
2820 | * ata_dataout_task - Write first data block to hardware | |
2821 | * @_data: Port to which ATA/ATAPI device is attached. | |
2822 | * | |
2823 | * When device has indicated its readiness to accept | |
2824 | * the data, this function sends out the CDB or | |
2825 | * the first data block by PIO. | |
2826 | * After this, | |
2827 | * - If polling, ata_pio_task() handles the rest. | |
2828 | * - Otherwise, interrupt handler takes over. | |
2829 | * | |
2830 | * LOCKING: | |
2831 | * Kernel thread context (may sleep) | |
2832 | */ | |
2833 | ||
2834 | static void ata_dataout_task(void *_data) | |
2835 | { | |
2836 | struct ata_port *ap = _data; | |
2837 | struct ata_queued_cmd *qc; | |
2838 | u8 status; | |
2839 | unsigned long flags; | |
2840 | ||
2841 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2842 | assert(qc != NULL); | |
2843 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
2844 | ||
2845 | /* sleep-wait for BSY to clear */ | |
2846 | DPRINTK("busy wait\n"); | |
2847 | if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) | |
2848 | goto err_out; | |
2849 | ||
2850 | /* make sure DRQ is set */ | |
2851 | status = ata_chk_status(ap); | |
2852 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) | |
2853 | goto err_out; | |
2854 | ||
2855 | /* Send the CDB (atapi) or the first data block (ata pio out). | |
2856 | * During the state transition, interrupt handler shouldn't | |
2857 | * be invoked before the data transfer is complete and | |
2858 | * hsm_task_state is changed. Hence, the following locking. | |
2859 | */ | |
2860 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2861 | ||
2862 | if (qc->tf.protocol == ATA_PROT_PIO) { | |
2863 | /* PIO data out protocol. | |
2864 | * send first data block. | |
2865 | */ | |
2866 | ||
2867 | /* ata_pio_sector() might change the state to HSM_ST_LAST. | |
2868 | * so, the state is changed here before ata_pio_sector(). | |
2869 | */ | |
2870 | ap->hsm_task_state = HSM_ST; | |
2871 | ata_pio_sector(qc); | |
2872 | ata_altstatus(ap); /* flush */ | |
2873 | } else | |
2874 | /* send CDB */ | |
2875 | atapi_send_cdb(ap, qc); | |
2876 | ||
2877 | /* if polling, ata_pio_task() handles the rest. | |
2878 | * otherwise, interrupt handler takes over from here. | |
2879 | */ | |
2880 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
2881 | queue_work(ata_wq, &ap->pio_task); | |
2882 | ||
2883 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2884 | ||
2885 | return; | |
2886 | ||
2887 | err_out: | |
2888 | ata_pio_error(ap); | |
2889 | } | |
2890 | ||
6ae4cfb5 AL |
2891 | /** |
2892 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
2893 | * @qc: Command on going | |
2894 | * @bytes: number of bytes | |
2895 | * | |
2896 | * Transfer Transfer data from/to the ATAPI device. | |
2897 | * | |
2898 | * LOCKING: | |
2899 | * Inherited from caller. | |
2900 | * | |
2901 | */ | |
2902 | ||
1da177e4 LT |
2903 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
2904 | { | |
2905 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2906 | struct scatterlist *sg = qc->sg; | |
2907 | struct ata_port *ap = qc->ap; | |
2908 | struct page *page; | |
2909 | unsigned char *buf; | |
2910 | unsigned int offset, count; | |
312f7da2 | 2911 | unsigned long flags; |
1da177e4 | 2912 | |
563a6e1f | 2913 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 2914 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
2915 | |
2916 | next_sg: | |
563a6e1f | 2917 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 2918 | /* |
563a6e1f AL |
2919 | * The end of qc->sg is reached and the device expects |
2920 | * more data to transfer. In order not to overrun qc->sg | |
2921 | * and fulfill length specified in the byte count register, | |
2922 | * - for read case, discard trailing data from the device | |
2923 | * - for write case, padding zero data to the device | |
2924 | */ | |
2925 | u16 pad_buf[1] = { 0 }; | |
2926 | unsigned int words = bytes >> 1; | |
2927 | unsigned int i; | |
2928 | ||
2929 | if (words) /* warning if bytes > 1 */ | |
7fb6ec28 | 2930 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", |
563a6e1f AL |
2931 | ap->id, bytes); |
2932 | ||
2933 | for (i = 0; i < words; i++) | |
2934 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | |
2935 | ||
14be71f4 | 2936 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
2937 | return; |
2938 | } | |
2939 | ||
1da177e4 LT |
2940 | sg = &qc->sg[qc->cursg]; |
2941 | ||
1da177e4 LT |
2942 | page = sg->page; |
2943 | offset = sg->offset + qc->cursg_ofs; | |
2944 | ||
2945 | /* get the current page and offset */ | |
2946 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2947 | offset %= PAGE_SIZE; | |
2948 | ||
6952df03 | 2949 | /* don't overrun current sg */ |
32529e01 | 2950 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
2951 | |
2952 | /* don't cross page boundaries */ | |
2953 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
2954 | ||
7282aa4b AL |
2955 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
2956 | ||
083958d3 AL |
2957 | local_irq_save(flags); |
2958 | buf = kmap_atomic(page, KM_IRQ0); | |
2959 | ||
7282aa4b | 2960 | /* do the actual data transfer */ |
083958d3 | 2961 | ata_data_xfer(ap, buf + offset, count, do_write); |
7282aa4b | 2962 | |
083958d3 | 2963 | kunmap_atomic(buf, KM_IRQ0); |
7282aa4b AL |
2964 | local_irq_restore(flags); |
2965 | ||
1da177e4 LT |
2966 | bytes -= count; |
2967 | qc->curbytes += count; | |
2968 | qc->cursg_ofs += count; | |
2969 | ||
32529e01 | 2970 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
2971 | qc->cursg++; |
2972 | qc->cursg_ofs = 0; | |
2973 | } | |
2974 | ||
563a6e1f | 2975 | if (bytes) |
1da177e4 | 2976 | goto next_sg; |
1da177e4 LT |
2977 | } |
2978 | ||
6ae4cfb5 AL |
2979 | /** |
2980 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
2981 | * @qc: Command on going | |
2982 | * | |
2983 | * Transfer Transfer data from/to the ATAPI device. | |
2984 | * | |
2985 | * LOCKING: | |
2986 | * Inherited from caller. | |
2987 | * | |
2988 | */ | |
2989 | ||
1da177e4 LT |
2990 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
2991 | { | |
2992 | struct ata_port *ap = qc->ap; | |
2993 | struct ata_device *dev = qc->dev; | |
2994 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
2995 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
2996 | ||
2997 | ap->ops->tf_read(ap, &qc->tf); | |
2998 | ireason = qc->tf.nsect; | |
2999 | bc_lo = qc->tf.lbam; | |
3000 | bc_hi = qc->tf.lbah; | |
3001 | bytes = (bc_hi << 8) | bc_lo; | |
3002 | ||
3003 | /* shall be cleared to zero, indicating xfer of data */ | |
3004 | if (ireason & (1 << 0)) | |
3005 | goto err_out; | |
3006 | ||
3007 | /* make sure transfer direction matches expected */ | |
3008 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
3009 | if (do_write != i_write) | |
3010 | goto err_out; | |
3011 | ||
312f7da2 AL |
3012 | VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes); |
3013 | ||
1da177e4 LT |
3014 | __atapi_pio_bytes(qc, bytes); |
3015 | ||
3016 | return; | |
3017 | ||
3018 | err_out: | |
3019 | printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", | |
3020 | ap->id, dev->devno); | |
14be71f4 | 3021 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3022 | } |
3023 | ||
3024 | /** | |
3025 | * ata_pio_sector - | |
3026 | * @ap: | |
3027 | * | |
3028 | * LOCKING: | |
0cba632b | 3029 | * None. (executing in kernel thread context) |
1da177e4 LT |
3030 | */ |
3031 | ||
3032 | static void ata_pio_block(struct ata_port *ap) | |
3033 | { | |
3034 | struct ata_queued_cmd *qc; | |
3035 | u8 status; | |
3036 | ||
3037 | /* | |
3038 | * This is purely hueristic. This is a fast path. | |
3039 | * Sometimes when we enter, BSY will be cleared in | |
3040 | * a chk-status or two. If not, the drive is probably seeking | |
3041 | * or something. Snooze for a couple msecs, then | |
3042 | * chk-status again. If still busy, fall back to | |
14be71f4 | 3043 | * HSM_ST_POLL state. |
1da177e4 LT |
3044 | */ |
3045 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
3046 | if (status & ATA_BUSY) { | |
3047 | msleep(2); | |
3048 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
3049 | if (status & ATA_BUSY) { | |
14be71f4 | 3050 | ap->hsm_task_state = HSM_ST_POLL; |
1da177e4 LT |
3051 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
3052 | return; | |
3053 | } | |
3054 | } | |
3055 | ||
3056 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3057 | assert(qc != NULL); | |
3058 | ||
3059 | if (is_atapi_taskfile(&qc->tf)) { | |
3060 | /* no more data to transfer or unsupported ATAPI command */ | |
3061 | if ((status & ATA_DRQ) == 0) { | |
14be71f4 | 3062 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3063 | return; |
3064 | } | |
3065 | ||
3066 | atapi_pio_bytes(qc); | |
3067 | } else { | |
3068 | /* handle BSY=0, DRQ=0 as error */ | |
3069 | if ((status & ATA_DRQ) == 0) { | |
14be71f4 | 3070 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3071 | return; |
3072 | } | |
3073 | ||
3074 | ata_pio_sector(qc); | |
3075 | } | |
3076 | } | |
3077 | ||
3078 | static void ata_pio_error(struct ata_port *ap) | |
3079 | { | |
3080 | struct ata_queued_cmd *qc; | |
3081 | u8 drv_stat; | |
3082 | ||
3083 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3084 | assert(qc != NULL); | |
3085 | ||
3086 | drv_stat = ata_chk_status(ap); | |
3087 | printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n", | |
3088 | ap->id, drv_stat); | |
3089 | ||
14be71f4 | 3090 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 3091 | |
40e8c82c | 3092 | ata_poll_qc_complete(qc, drv_stat | ATA_ERR); |
1da177e4 LT |
3093 | } |
3094 | ||
3095 | static void ata_pio_task(void *_data) | |
3096 | { | |
3097 | struct ata_port *ap = _data; | |
7fb6ec28 JG |
3098 | unsigned long timeout; |
3099 | int qc_completed; | |
3100 | ||
3101 | fsm_start: | |
3102 | timeout = 0; | |
3103 | qc_completed = 0; | |
1da177e4 | 3104 | |
14be71f4 AL |
3105 | switch (ap->hsm_task_state) { |
3106 | case HSM_ST_IDLE: | |
1da177e4 LT |
3107 | return; |
3108 | ||
14be71f4 | 3109 | case HSM_ST: |
1da177e4 LT |
3110 | ata_pio_block(ap); |
3111 | break; | |
3112 | ||
14be71f4 | 3113 | case HSM_ST_LAST: |
7fb6ec28 | 3114 | qc_completed = ata_pio_complete(ap); |
1da177e4 LT |
3115 | break; |
3116 | ||
14be71f4 AL |
3117 | case HSM_ST_POLL: |
3118 | case HSM_ST_LAST_POLL: | |
1da177e4 LT |
3119 | timeout = ata_pio_poll(ap); |
3120 | break; | |
3121 | ||
14be71f4 AL |
3122 | case HSM_ST_TMOUT: |
3123 | case HSM_ST_ERR: | |
1da177e4 LT |
3124 | ata_pio_error(ap); |
3125 | return; | |
3126 | } | |
3127 | ||
3128 | if (timeout) | |
7fb6ec28 JG |
3129 | queue_delayed_work(ata_wq, &ap->pio_task, timeout); |
3130 | else if (!qc_completed) | |
3131 | goto fsm_start; | |
1da177e4 LT |
3132 | } |
3133 | ||
1da177e4 LT |
3134 | /** |
3135 | * ata_qc_timeout - Handle timeout of queued command | |
3136 | * @qc: Command that timed out | |
3137 | * | |
3138 | * Some part of the kernel (currently, only the SCSI layer) | |
3139 | * has noticed that the active command on port @ap has not | |
3140 | * completed after a specified length of time. Handle this | |
3141 | * condition by disabling DMA (if necessary) and completing | |
3142 | * transactions, with error if necessary. | |
3143 | * | |
3144 | * This also handles the case of the "lost interrupt", where | |
3145 | * for some reason (possibly hardware bug, possibly driver bug) | |
3146 | * an interrupt was not delivered to the driver, even though the | |
3147 | * transaction completed successfully. | |
3148 | * | |
3149 | * LOCKING: | |
0cba632b | 3150 | * Inherited from SCSI layer (none, can sleep) |
1da177e4 LT |
3151 | */ |
3152 | ||
3153 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | |
3154 | { | |
3155 | struct ata_port *ap = qc->ap; | |
b8f6153e | 3156 | struct ata_host_set *host_set = ap->host_set; |
1da177e4 LT |
3157 | struct ata_device *dev = qc->dev; |
3158 | u8 host_stat = 0, drv_stat; | |
b8f6153e | 3159 | unsigned long flags; |
1da177e4 LT |
3160 | |
3161 | DPRINTK("ENTER\n"); | |
3162 | ||
3163 | /* FIXME: doesn't this conflict with timeout handling? */ | |
3164 | if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) { | |
3165 | struct scsi_cmnd *cmd = qc->scsicmd; | |
3166 | ||
3111b0d1 | 3167 | if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) { |
1da177e4 LT |
3168 | |
3169 | /* finish completing original command */ | |
b8f6153e | 3170 | spin_lock_irqsave(&host_set->lock, flags); |
1da177e4 | 3171 | __ata_qc_complete(qc); |
b8f6153e | 3172 | spin_unlock_irqrestore(&host_set->lock, flags); |
1da177e4 LT |
3173 | |
3174 | atapi_request_sense(ap, dev, cmd); | |
3175 | ||
3176 | cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16); | |
3177 | scsi_finish_command(cmd); | |
3178 | ||
3179 | goto out; | |
3180 | } | |
3181 | } | |
3182 | ||
b8f6153e JG |
3183 | spin_lock_irqsave(&host_set->lock, flags); |
3184 | ||
1da177e4 LT |
3185 | /* hack alert! We cannot use the supplied completion |
3186 | * function from inside the ->eh_strategy_handler() thread. | |
3187 | * libata is the only user of ->eh_strategy_handler() in | |
3188 | * any kernel, so the default scsi_done() assumes it is | |
3189 | * not being called from the SCSI EH. | |
3190 | */ | |
3191 | qc->scsidone = scsi_finish_command; | |
3192 | ||
3193 | switch (qc->tf.protocol) { | |
3194 | ||
3195 | case ATA_PROT_DMA: | |
3196 | case ATA_PROT_ATAPI_DMA: | |
3197 | host_stat = ap->ops->bmdma_status(ap); | |
3198 | ||
3199 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3200 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
3201 | |
3202 | /* fall through */ | |
3203 | ||
3204 | default: | |
3205 | ata_altstatus(ap); | |
3206 | drv_stat = ata_chk_status(ap); | |
3207 | ||
3208 | /* ack bmdma irq events */ | |
3209 | ap->ops->irq_clear(ap); | |
3210 | ||
3211 | printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n", | |
3212 | ap->id, qc->tf.command, drv_stat, host_stat); | |
3213 | ||
312f7da2 AL |
3214 | ap->hsm_task_state = HSM_ST_IDLE; |
3215 | ||
1da177e4 LT |
3216 | /* complete taskfile transaction */ |
3217 | ata_qc_complete(qc, drv_stat); | |
3218 | break; | |
3219 | } | |
b8f6153e JG |
3220 | |
3221 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3222 | ||
1da177e4 LT |
3223 | out: |
3224 | DPRINTK("EXIT\n"); | |
3225 | } | |
3226 | ||
3227 | /** | |
3228 | * ata_eng_timeout - Handle timeout of queued command | |
3229 | * @ap: Port on which timed-out command is active | |
3230 | * | |
3231 | * Some part of the kernel (currently, only the SCSI layer) | |
3232 | * has noticed that the active command on port @ap has not | |
3233 | * completed after a specified length of time. Handle this | |
3234 | * condition by disabling DMA (if necessary) and completing | |
3235 | * transactions, with error if necessary. | |
3236 | * | |
3237 | * This also handles the case of the "lost interrupt", where | |
3238 | * for some reason (possibly hardware bug, possibly driver bug) | |
3239 | * an interrupt was not delivered to the driver, even though the | |
3240 | * transaction completed successfully. | |
3241 | * | |
3242 | * LOCKING: | |
3243 | * Inherited from SCSI layer (none, can sleep) | |
3244 | */ | |
3245 | ||
3246 | void ata_eng_timeout(struct ata_port *ap) | |
3247 | { | |
3248 | struct ata_queued_cmd *qc; | |
3249 | ||
3250 | DPRINTK("ENTER\n"); | |
3251 | ||
3252 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
e12669e7 JG |
3253 | if (qc) |
3254 | ata_qc_timeout(qc); | |
3255 | else { | |
1da177e4 LT |
3256 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", |
3257 | ap->id); | |
3258 | goto out; | |
3259 | } | |
3260 | ||
1da177e4 LT |
3261 | out: |
3262 | DPRINTK("EXIT\n"); | |
3263 | } | |
3264 | ||
3265 | /** | |
3266 | * ata_qc_new - Request an available ATA command, for queueing | |
3267 | * @ap: Port associated with device @dev | |
3268 | * @dev: Device from whom we request an available command structure | |
3269 | * | |
3270 | * LOCKING: | |
0cba632b | 3271 | * None. |
1da177e4 LT |
3272 | */ |
3273 | ||
3274 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
3275 | { | |
3276 | struct ata_queued_cmd *qc = NULL; | |
3277 | unsigned int i; | |
3278 | ||
3279 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
3280 | if (!test_and_set_bit(i, &ap->qactive)) { | |
3281 | qc = ata_qc_from_tag(ap, i); | |
3282 | break; | |
3283 | } | |
3284 | ||
3285 | if (qc) | |
3286 | qc->tag = i; | |
3287 | ||
3288 | return qc; | |
3289 | } | |
3290 | ||
3291 | /** | |
3292 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
3293 | * @ap: Port associated with device @dev | |
3294 | * @dev: Device from whom we request an available command structure | |
3295 | * | |
3296 | * LOCKING: | |
0cba632b | 3297 | * None. |
1da177e4 LT |
3298 | */ |
3299 | ||
3300 | struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | |
3301 | struct ata_device *dev) | |
3302 | { | |
3303 | struct ata_queued_cmd *qc; | |
3304 | ||
3305 | qc = ata_qc_new(ap); | |
3306 | if (qc) { | |
3307 | qc->sg = NULL; | |
3308 | qc->flags = 0; | |
3309 | qc->scsicmd = NULL; | |
3310 | qc->ap = ap; | |
3311 | qc->dev = dev; | |
3312 | qc->cursect = qc->cursg = qc->cursg_ofs = 0; | |
3313 | qc->nsect = 0; | |
3314 | qc->nbytes = qc->curbytes = 0; | |
3315 | ||
3316 | ata_tf_init(ap, &qc->tf, dev->devno); | |
3317 | ||
8bf62ece AL |
3318 | if (dev->flags & ATA_DFLAG_LBA) { |
3319 | qc->tf.flags |= ATA_TFLAG_LBA; | |
3320 | ||
3321 | if (dev->flags & ATA_DFLAG_LBA48) | |
3322 | qc->tf.flags |= ATA_TFLAG_LBA48; | |
3323 | } | |
1da177e4 LT |
3324 | } |
3325 | ||
3326 | return qc; | |
3327 | } | |
3328 | ||
a939c963 | 3329 | int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat) |
1da177e4 LT |
3330 | { |
3331 | return 0; | |
3332 | } | |
3333 | ||
3334 | static void __ata_qc_complete(struct ata_queued_cmd *qc) | |
3335 | { | |
3336 | struct ata_port *ap = qc->ap; | |
3337 | unsigned int tag, do_clear = 0; | |
3338 | ||
3339 | qc->flags = 0; | |
3340 | tag = qc->tag; | |
3341 | if (likely(ata_tag_valid(tag))) { | |
3342 | if (tag == ap->active_tag) | |
3343 | ap->active_tag = ATA_TAG_POISON; | |
3344 | qc->tag = ATA_TAG_POISON; | |
3345 | do_clear = 1; | |
3346 | } | |
3347 | ||
3348 | if (qc->waiting) { | |
3349 | struct completion *waiting = qc->waiting; | |
3350 | qc->waiting = NULL; | |
3351 | complete(waiting); | |
3352 | } | |
3353 | ||
3354 | if (likely(do_clear)) | |
3355 | clear_bit(tag, &ap->qactive); | |
3356 | } | |
3357 | ||
3358 | /** | |
3359 | * ata_qc_free - free unused ata_queued_cmd | |
3360 | * @qc: Command to complete | |
3361 | * | |
3362 | * Designed to free unused ata_queued_cmd object | |
3363 | * in case something prevents using it. | |
3364 | * | |
3365 | * LOCKING: | |
0cba632b | 3366 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3367 | * |
3368 | */ | |
3369 | void ata_qc_free(struct ata_queued_cmd *qc) | |
3370 | { | |
3371 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3372 | assert(qc->waiting == NULL); /* nothing should be waiting */ | |
3373 | ||
3374 | __ata_qc_complete(qc); | |
3375 | } | |
3376 | ||
3377 | /** | |
3378 | * ata_qc_complete - Complete an active ATA command | |
3379 | * @qc: Command to complete | |
0cba632b JG |
3380 | * @drv_stat: ATA Status register contents |
3381 | * | |
3382 | * Indicate to the mid and upper layers that an ATA | |
3383 | * command has completed, with either an ok or not-ok status. | |
1da177e4 LT |
3384 | * |
3385 | * LOCKING: | |
0cba632b | 3386 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3387 | * |
3388 | */ | |
3389 | ||
3390 | void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |
3391 | { | |
3392 | int rc; | |
3393 | ||
3394 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3395 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3396 | ||
3397 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3398 | ata_sg_clean(qc); | |
3399 | ||
3f3791d3 AL |
3400 | /* atapi: mark qc as inactive to prevent the interrupt handler |
3401 | * from completing the command twice later, before the error handler | |
3402 | * is called. (when rc != 0 and atapi request sense is needed) | |
3403 | */ | |
3404 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
3405 | ||
1da177e4 LT |
3406 | /* call completion callback */ |
3407 | rc = qc->complete_fn(qc, drv_stat); | |
3408 | ||
3409 | /* if callback indicates not to complete command (non-zero), | |
3410 | * return immediately | |
3411 | */ | |
3412 | if (rc != 0) | |
3413 | return; | |
3414 | ||
3415 | __ata_qc_complete(qc); | |
3416 | ||
3417 | VPRINTK("EXIT\n"); | |
3418 | } | |
3419 | ||
3420 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
3421 | { | |
3422 | struct ata_port *ap = qc->ap; | |
3423 | ||
3424 | switch (qc->tf.protocol) { | |
3425 | case ATA_PROT_DMA: | |
3426 | case ATA_PROT_ATAPI_DMA: | |
3427 | return 1; | |
3428 | ||
3429 | case ATA_PROT_ATAPI: | |
3430 | case ATA_PROT_PIO: | |
3431 | case ATA_PROT_PIO_MULT: | |
3432 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
3433 | return 1; | |
3434 | ||
3435 | /* fall through */ | |
3436 | ||
3437 | default: | |
3438 | return 0; | |
3439 | } | |
3440 | ||
3441 | /* never reached */ | |
3442 | } | |
3443 | ||
3444 | /** | |
3445 | * ata_qc_issue - issue taskfile to device | |
3446 | * @qc: command to issue to device | |
3447 | * | |
3448 | * Prepare an ATA command to submission to device. | |
3449 | * This includes mapping the data into a DMA-able | |
3450 | * area, filling in the S/G table, and finally | |
3451 | * writing the taskfile to hardware, starting the command. | |
3452 | * | |
3453 | * LOCKING: | |
3454 | * spin_lock_irqsave(host_set lock) | |
3455 | * | |
3456 | * RETURNS: | |
3457 | * Zero on success, negative on error. | |
3458 | */ | |
3459 | ||
3460 | int ata_qc_issue(struct ata_queued_cmd *qc) | |
3461 | { | |
3462 | struct ata_port *ap = qc->ap; | |
3463 | ||
3464 | if (ata_should_dma_map(qc)) { | |
3465 | if (qc->flags & ATA_QCFLAG_SG) { | |
3466 | if (ata_sg_setup(qc)) | |
3467 | goto err_out; | |
3468 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { | |
3469 | if (ata_sg_setup_one(qc)) | |
3470 | goto err_out; | |
3471 | } | |
3472 | } else { | |
3473 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
3474 | } | |
3475 | ||
3476 | ap->ops->qc_prep(qc); | |
3477 | ||
3478 | qc->ap->active_tag = qc->tag; | |
3479 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
3480 | ||
3481 | return ap->ops->qc_issue(qc); | |
3482 | ||
3483 | err_out: | |
3484 | return -1; | |
3485 | } | |
3486 | ||
0baab86b | 3487 | |
1da177e4 LT |
3488 | /** |
3489 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
3490 | * @qc: command to issue to device | |
3491 | * | |
3492 | * Using various libata functions and hooks, this function | |
3493 | * starts an ATA command. ATA commands are grouped into | |
3494 | * classes called "protocols", and issuing each type of protocol | |
3495 | * is slightly different. | |
3496 | * | |
0baab86b EF |
3497 | * May be used as the qc_issue() entry in ata_port_operations. |
3498 | * | |
1da177e4 LT |
3499 | * LOCKING: |
3500 | * spin_lock_irqsave(host_set lock) | |
3501 | * | |
3502 | * RETURNS: | |
3503 | * Zero on success, negative on error. | |
3504 | */ | |
3505 | ||
3506 | int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |
3507 | { | |
3508 | struct ata_port *ap = qc->ap; | |
3509 | ||
e50362ec AL |
3510 | /* Use polling pio if the LLD doesn't handle |
3511 | * interrupt driven pio and atapi CDB interrupt. | |
3512 | */ | |
3513 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
3514 | switch (qc->tf.protocol) { | |
3515 | case ATA_PROT_PIO: | |
3516 | case ATA_PROT_ATAPI: | |
3517 | case ATA_PROT_ATAPI_NODATA: | |
3518 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
3519 | break; | |
3520 | case ATA_PROT_ATAPI_DMA: | |
3521 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
3522 | BUG(); | |
3523 | break; | |
3524 | default: | |
3525 | break; | |
3526 | } | |
3527 | } | |
3528 | ||
312f7da2 | 3529 | /* select the device */ |
1da177e4 LT |
3530 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
3531 | ||
312f7da2 | 3532 | /* start the command */ |
1da177e4 LT |
3533 | switch (qc->tf.protocol) { |
3534 | case ATA_PROT_NODATA: | |
312f7da2 AL |
3535 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
3536 | ata_qc_set_polling(qc); | |
3537 | ||
1da177e4 | 3538 | ata_tf_to_host_nolock(ap, &qc->tf); |
312f7da2 AL |
3539 | ap->hsm_task_state = HSM_ST_LAST; |
3540 | ||
3541 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
3542 | queue_work(ata_wq, &ap->pio_task); | |
3543 | ||
1da177e4 LT |
3544 | break; |
3545 | ||
3546 | case ATA_PROT_DMA: | |
312f7da2 AL |
3547 | assert(!(qc->tf.flags & ATA_TFLAG_POLLING)); |
3548 | ||
1da177e4 LT |
3549 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
3550 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3551 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 3552 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3553 | break; |
3554 | ||
312f7da2 AL |
3555 | case ATA_PROT_PIO: |
3556 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
3557 | ata_qc_set_polling(qc); | |
3558 | ||
1da177e4 | 3559 | ata_tf_to_host_nolock(ap, &qc->tf); |
312f7da2 | 3560 | |
54f00389 AL |
3561 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
3562 | /* PIO data out protocol */ | |
3563 | ap->hsm_task_state = HSM_ST_FIRST; | |
3564 | queue_work(ata_wq, &ap->dataout_task); | |
3565 | ||
3566 | /* always send first data block using | |
3567 | * the ata_dataout_task() codepath. | |
3568 | */ | |
312f7da2 | 3569 | } else { |
54f00389 AL |
3570 | /* PIO data in protocol */ |
3571 | ap->hsm_task_state = HSM_ST; | |
3572 | ||
3573 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
3574 | queue_work(ata_wq, &ap->pio_task); | |
3575 | ||
3576 | /* if polling, ata_pio_task() handles the rest. | |
3577 | * otherwise, interrupt handler takes over from here. | |
3578 | */ | |
312f7da2 AL |
3579 | } |
3580 | ||
1da177e4 LT |
3581 | break; |
3582 | ||
3583 | case ATA_PROT_ATAPI: | |
1da177e4 | 3584 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
3585 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
3586 | ata_qc_set_polling(qc); | |
3587 | ||
1da177e4 | 3588 | ata_tf_to_host_nolock(ap, &qc->tf); |
312f7da2 AL |
3589 | ap->hsm_task_state = HSM_ST_FIRST; |
3590 | ||
3591 | /* send cdb by polling if no cdb interrupt */ | |
3592 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
3593 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
f9997be9 | 3594 | queue_work(ata_wq, &ap->dataout_task); |
1da177e4 LT |
3595 | break; |
3596 | ||
3597 | case ATA_PROT_ATAPI_DMA: | |
312f7da2 AL |
3598 | assert(!(qc->tf.flags & ATA_TFLAG_POLLING)); |
3599 | ||
1da177e4 LT |
3600 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
3601 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
3602 | ap->hsm_task_state = HSM_ST_FIRST; |
3603 | ||
3604 | /* send cdb by polling if no cdb interrupt */ | |
3605 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
f9997be9 | 3606 | queue_work(ata_wq, &ap->dataout_task); |
1da177e4 LT |
3607 | break; |
3608 | ||
3609 | default: | |
3610 | WARN_ON(1); | |
3611 | return -1; | |
3612 | } | |
3613 | ||
3614 | return 0; | |
3615 | } | |
3616 | ||
3617 | /** | |
0baab86b | 3618 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction |
1da177e4 LT |
3619 | * @qc: Info associated with this ATA transaction. |
3620 | * | |
3621 | * LOCKING: | |
3622 | * spin_lock_irqsave(host_set lock) | |
3623 | */ | |
3624 | ||
3625 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |
3626 | { | |
3627 | struct ata_port *ap = qc->ap; | |
3628 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3629 | u8 dmactl; | |
3630 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3631 | ||
3632 | /* load PRD table addr. */ | |
3633 | mb(); /* make sure PRD table writes are visible to controller */ | |
3634 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); | |
3635 | ||
3636 | /* specify data direction, triple-check start bit is clear */ | |
3637 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3638 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3639 | if (!rw) | |
3640 | dmactl |= ATA_DMA_WR; | |
3641 | writeb(dmactl, mmio + ATA_DMA_CMD); | |
3642 | ||
3643 | /* issue r/w command */ | |
3644 | ap->ops->exec_command(ap, &qc->tf); | |
3645 | } | |
3646 | ||
3647 | /** | |
b73fc89f | 3648 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction |
1da177e4 LT |
3649 | * @qc: Info associated with this ATA transaction. |
3650 | * | |
3651 | * LOCKING: | |
3652 | * spin_lock_irqsave(host_set lock) | |
3653 | */ | |
3654 | ||
3655 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) | |
3656 | { | |
3657 | struct ata_port *ap = qc->ap; | |
3658 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3659 | u8 dmactl; | |
3660 | ||
3661 | /* start host DMA transaction */ | |
3662 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3663 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | |
3664 | ||
3665 | /* Strictly, one may wish to issue a readb() here, to | |
3666 | * flush the mmio write. However, control also passes | |
3667 | * to the hardware at this point, and it will interrupt | |
3668 | * us when we are to resume control. So, in effect, | |
3669 | * we don't care when the mmio write flushes. | |
3670 | * Further, a read of the DMA status register _immediately_ | |
3671 | * following the write may not be what certain flaky hardware | |
3672 | * is expected, so I think it is best to not add a readb() | |
3673 | * without first all the MMIO ATA cards/mobos. | |
3674 | * Or maybe I'm just being paranoid. | |
3675 | */ | |
3676 | } | |
3677 | ||
3678 | /** | |
3679 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) | |
3680 | * @qc: Info associated with this ATA transaction. | |
3681 | * | |
3682 | * LOCKING: | |
3683 | * spin_lock_irqsave(host_set lock) | |
3684 | */ | |
3685 | ||
3686 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) | |
3687 | { | |
3688 | struct ata_port *ap = qc->ap; | |
3689 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3690 | u8 dmactl; | |
3691 | ||
3692 | /* load PRD table addr. */ | |
3693 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); | |
3694 | ||
3695 | /* specify data direction, triple-check start bit is clear */ | |
3696 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3697 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3698 | if (!rw) | |
3699 | dmactl |= ATA_DMA_WR; | |
3700 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3701 | ||
3702 | /* issue r/w command */ | |
3703 | ap->ops->exec_command(ap, &qc->tf); | |
3704 | } | |
3705 | ||
3706 | /** | |
3707 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) | |
3708 | * @qc: Info associated with this ATA transaction. | |
3709 | * | |
3710 | * LOCKING: | |
3711 | * spin_lock_irqsave(host_set lock) | |
3712 | */ | |
3713 | ||
3714 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) | |
3715 | { | |
3716 | struct ata_port *ap = qc->ap; | |
3717 | u8 dmactl; | |
3718 | ||
3719 | /* start host DMA transaction */ | |
3720 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3721 | outb(dmactl | ATA_DMA_START, | |
3722 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3723 | } | |
3724 | ||
0baab86b EF |
3725 | |
3726 | /** | |
3727 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
3728 | * @qc: Info associated with this ATA transaction. | |
3729 | * | |
3730 | * Writes the ATA_DMA_START flag to the DMA command register. | |
3731 | * | |
3732 | * May be used as the bmdma_start() entry in ata_port_operations. | |
3733 | * | |
3734 | * LOCKING: | |
3735 | * spin_lock_irqsave(host_set lock) | |
3736 | */ | |
1da177e4 LT |
3737 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
3738 | { | |
3739 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3740 | ata_bmdma_start_mmio(qc); | |
3741 | else | |
3742 | ata_bmdma_start_pio(qc); | |
3743 | } | |
3744 | ||
0baab86b EF |
3745 | |
3746 | /** | |
3747 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction | |
3748 | * @qc: Info associated with this ATA transaction. | |
3749 | * | |
3750 | * Writes address of PRD table to device's PRD Table Address | |
3751 | * register, sets the DMA control register, and calls | |
3752 | * ops->exec_command() to start the transfer. | |
3753 | * | |
3754 | * May be used as the bmdma_setup() entry in ata_port_operations. | |
3755 | * | |
3756 | * LOCKING: | |
3757 | * spin_lock_irqsave(host_set lock) | |
3758 | */ | |
1da177e4 LT |
3759 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
3760 | { | |
3761 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3762 | ata_bmdma_setup_mmio(qc); | |
3763 | else | |
3764 | ata_bmdma_setup_pio(qc); | |
3765 | } | |
3766 | ||
0baab86b EF |
3767 | |
3768 | /** | |
3769 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | |
decc6d0b | 3770 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3771 | * |
3772 | * Clear interrupt and error flags in DMA status register. | |
3773 | * | |
3774 | * May be used as the irq_clear() entry in ata_port_operations. | |
3775 | * | |
3776 | * LOCKING: | |
3777 | * spin_lock_irqsave(host_set lock) | |
3778 | */ | |
3779 | ||
1da177e4 LT |
3780 | void ata_bmdma_irq_clear(struct ata_port *ap) |
3781 | { | |
3782 | if (ap->flags & ATA_FLAG_MMIO) { | |
3783 | void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; | |
3784 | writeb(readb(mmio), mmio); | |
3785 | } else { | |
3786 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; | |
3787 | outb(inb(addr), addr); | |
3788 | } | |
3789 | ||
3790 | } | |
3791 | ||
0baab86b EF |
3792 | |
3793 | /** | |
3794 | * ata_bmdma_status - Read PCI IDE BMDMA status | |
decc6d0b | 3795 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3796 | * |
3797 | * Read and return BMDMA status register. | |
3798 | * | |
3799 | * May be used as the bmdma_status() entry in ata_port_operations. | |
3800 | * | |
3801 | * LOCKING: | |
3802 | * spin_lock_irqsave(host_set lock) | |
3803 | */ | |
3804 | ||
1da177e4 LT |
3805 | u8 ata_bmdma_status(struct ata_port *ap) |
3806 | { | |
3807 | u8 host_stat; | |
3808 | if (ap->flags & ATA_FLAG_MMIO) { | |
3809 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3810 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
3811 | } else | |
ee500aab | 3812 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
1da177e4 LT |
3813 | return host_stat; |
3814 | } | |
3815 | ||
0baab86b EF |
3816 | |
3817 | /** | |
3818 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | |
b73fc89f | 3819 | * @qc: Command we are ending DMA for |
0baab86b EF |
3820 | * |
3821 | * Clears the ATA_DMA_START flag in the dma control register | |
3822 | * | |
3823 | * May be used as the bmdma_stop() entry in ata_port_operations. | |
3824 | * | |
3825 | * LOCKING: | |
3826 | * spin_lock_irqsave(host_set lock) | |
3827 | */ | |
3828 | ||
b73fc89f | 3829 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
1da177e4 | 3830 | { |
b73fc89f | 3831 | struct ata_port *ap = qc->ap; |
1da177e4 LT |
3832 | if (ap->flags & ATA_FLAG_MMIO) { |
3833 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3834 | ||
3835 | /* clear start/stop bit */ | |
3836 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3837 | mmio + ATA_DMA_CMD); | |
3838 | } else { | |
3839 | /* clear start/stop bit */ | |
3840 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3841 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3842 | } | |
3843 | ||
3844 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | |
3845 | ata_altstatus(ap); /* dummy read */ | |
3846 | } | |
3847 | ||
3848 | /** | |
3849 | * ata_host_intr - Handle host interrupt for given (port, task) | |
3850 | * @ap: Port on which interrupt arrived (possibly...) | |
3851 | * @qc: Taskfile currently active in engine | |
3852 | * | |
3853 | * Handle host interrupt for given queued command. Currently, | |
3854 | * only DMA interrupts are handled. All other commands are | |
3855 | * handled via polling with interrupts disabled (nIEN bit). | |
3856 | * | |
3857 | * LOCKING: | |
3858 | * spin_lock_irqsave(host_set lock) | |
3859 | * | |
3860 | * RETURNS: | |
3861 | * One if interrupt was handled, zero if not (shared irq). | |
3862 | */ | |
3863 | ||
3864 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
3865 | struct ata_queued_cmd *qc) | |
3866 | { | |
312f7da2 | 3867 | u8 status, host_stat = 0; |
1da177e4 | 3868 | |
312f7da2 AL |
3869 | VPRINTK("ata%u: protocol %d task_state %d\n", |
3870 | ap->id, qc->tf.protocol, ap->hsm_task_state); | |
1da177e4 | 3871 | |
312f7da2 AL |
3872 | /* Check whether we are expecting interrupt in this state */ |
3873 | switch (ap->hsm_task_state) { | |
3874 | case HSM_ST_FIRST: | |
3875 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. | |
3876 | * The flag was turned on only for atapi devices. | |
3877 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
3878 | */ | |
3879 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 3880 | goto idle_irq; |
312f7da2 AL |
3881 | break; |
3882 | case HSM_ST_LAST: | |
3883 | if (qc->tf.protocol == ATA_PROT_DMA || | |
3884 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
3885 | /* check status of DMA engine */ | |
3886 | host_stat = ap->ops->bmdma_status(ap); | |
3887 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
3888 | ||
3889 | /* if it's not our irq... */ | |
3890 | if (!(host_stat & ATA_DMA_INTR)) | |
3891 | goto idle_irq; | |
3892 | ||
3893 | /* before we do anything else, clear DMA-Start bit */ | |
3894 | ap->ops->bmdma_stop(qc); | |
3895 | } | |
3896 | break; | |
3897 | case HSM_ST: | |
3898 | break; | |
3899 | default: | |
3900 | goto idle_irq; | |
3901 | } | |
1da177e4 | 3902 | |
312f7da2 AL |
3903 | /* check altstatus */ |
3904 | status = ata_altstatus(ap); | |
3905 | if (status & ATA_BUSY) | |
3906 | goto idle_irq; | |
1da177e4 | 3907 | |
312f7da2 AL |
3908 | /* check main status, clearing INTRQ */ |
3909 | status = ata_chk_status(ap); | |
3910 | if (unlikely(status & ATA_BUSY)) | |
3911 | goto idle_irq; | |
1da177e4 | 3912 | |
312f7da2 AL |
3913 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
3914 | ap->id, qc->tf.protocol, ap->hsm_task_state, status); | |
1da177e4 | 3915 | |
312f7da2 AL |
3916 | /* ack bmdma irq events */ |
3917 | ap->ops->irq_clear(ap); | |
1da177e4 | 3918 | |
312f7da2 AL |
3919 | /* check error */ |
3920 | if (unlikely((status & ATA_ERR) || (host_stat & ATA_DMA_ERR))) | |
3921 | ap->hsm_task_state = HSM_ST_ERR; | |
3922 | ||
3923 | fsm_start: | |
3924 | switch (ap->hsm_task_state) { | |
3925 | case HSM_ST_FIRST: | |
3926 | /* Some pre-ATAPI-4 devices assert INTRQ | |
3927 | * at this state when ready to receive CDB. | |
3928 | */ | |
3929 | ||
3930 | /* check device status */ | |
3931 | if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) { | |
3932 | /* Wrong status. Let EH handle this */ | |
3933 | ap->hsm_task_state = HSM_ST_ERR; | |
3934 | goto fsm_start; | |
3935 | } | |
3936 | ||
3937 | atapi_send_cdb(ap, qc); | |
3938 | ||
3939 | break; | |
3940 | ||
3941 | case HSM_ST: | |
3942 | /* complete command or read/write the data register */ | |
3943 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
3944 | /* ATAPI PIO protocol */ | |
3945 | if ((status & ATA_DRQ) == 0) { | |
3946 | /* no more data to transfer */ | |
3947 | ap->hsm_task_state = HSM_ST_LAST; | |
3948 | goto fsm_start; | |
3949 | } | |
3950 | ||
3951 | atapi_pio_bytes(qc); | |
3952 | ||
3953 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) | |
3954 | /* bad ireason reported by device */ | |
3955 | goto fsm_start; | |
3956 | ||
3957 | } else { | |
3958 | /* ATA PIO protocol */ | |
3959 | if (unlikely((status & ATA_DRQ) == 0)) { | |
3960 | /* handle BSY=0, DRQ=0 as error */ | |
3961 | ap->hsm_task_state = HSM_ST_ERR; | |
3962 | goto fsm_start; | |
3963 | } | |
3964 | ||
3965 | ata_pio_sector(qc); | |
3966 | ||
3967 | if (ap->hsm_task_state == HSM_ST_LAST && | |
3968 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
3969 | /* all data read */ | |
3970 | ata_altstatus(ap); | |
3971 | status = ata_chk_status(ap); | |
3972 | goto fsm_start; | |
3973 | } | |
3974 | } | |
3975 | ||
3976 | ata_altstatus(ap); /* flush */ | |
3977 | break; | |
3978 | ||
3979 | case HSM_ST_LAST: | |
3980 | if (unlikely(status & ATA_DRQ)) { | |
3981 | /* handle DRQ=1 as error */ | |
3982 | ap->hsm_task_state = HSM_ST_ERR; | |
3983 | goto fsm_start; | |
3984 | } | |
3985 | ||
3986 | /* no more data to transfer */ | |
3987 | DPRINTK("ata%u: command complete, drv_stat 0x%x\n", | |
3988 | ap->id, status); | |
3989 | ||
3990 | ap->hsm_task_state = HSM_ST_IDLE; | |
1da177e4 LT |
3991 | |
3992 | /* complete taskfile transaction */ | |
3993 | ata_qc_complete(qc, status); | |
3994 | break; | |
3995 | ||
312f7da2 AL |
3996 | case HSM_ST_ERR: |
3997 | printk(KERN_ERR "ata%u: command error, drv_stat 0x%x host_stat 0x%x\n", | |
3998 | ap->id, status, host_stat); | |
3999 | ||
4000 | ap->hsm_task_state = HSM_ST_IDLE; | |
4001 | ata_qc_complete(qc, status | ATA_ERR); | |
4002 | break; | |
1da177e4 LT |
4003 | default: |
4004 | goto idle_irq; | |
4005 | } | |
4006 | ||
4007 | return 1; /* irq handled */ | |
4008 | ||
4009 | idle_irq: | |
4010 | ap->stats.idle_irq++; | |
4011 | ||
4012 | #ifdef ATA_IRQ_TRAP | |
4013 | if ((ap->stats.idle_irq % 1000) == 0) { | |
4014 | handled = 1; | |
4015 | ata_irq_ack(ap, 0); /* debug trap */ | |
4016 | printk(KERN_WARNING "ata%d: irq trap\n", ap->id); | |
4017 | } | |
4018 | #endif | |
4019 | return 0; /* irq not handled */ | |
4020 | } | |
4021 | ||
4022 | /** | |
4023 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
4024 | * @irq: irq line (unused) |
4025 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
4026 | * @regs: unused |
4027 | * | |
0cba632b JG |
4028 | * Default interrupt handler for PCI IDE devices. Calls |
4029 | * ata_host_intr() for each port that is not disabled. | |
4030 | * | |
1da177e4 | 4031 | * LOCKING: |
0cba632b | 4032 | * Obtains host_set lock during operation. |
1da177e4 LT |
4033 | * |
4034 | * RETURNS: | |
0cba632b | 4035 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
4036 | * |
4037 | */ | |
4038 | ||
4039 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
4040 | { | |
4041 | struct ata_host_set *host_set = dev_instance; | |
4042 | unsigned int i; | |
4043 | unsigned int handled = 0; | |
4044 | unsigned long flags; | |
4045 | ||
4046 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
4047 | spin_lock_irqsave(&host_set->lock, flags); | |
4048 | ||
4049 | for (i = 0; i < host_set->n_ports; i++) { | |
4050 | struct ata_port *ap; | |
4051 | ||
4052 | ap = host_set->ports[i]; | |
c1389503 | 4053 | if (ap && |
312f7da2 | 4054 | !(ap->flags & ATA_FLAG_PORT_DISABLED)) { |
1da177e4 LT |
4055 | struct ata_queued_cmd *qc; |
4056 | ||
4057 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
312f7da2 | 4058 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 4059 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
4060 | handled |= ata_host_intr(ap, qc); |
4061 | } | |
4062 | } | |
4063 | ||
4064 | spin_unlock_irqrestore(&host_set->lock, flags); | |
4065 | ||
4066 | return IRQ_RETVAL(handled); | |
4067 | } | |
4068 | ||
0baab86b EF |
4069 | /** |
4070 | * ata_port_start - Set port up for dma. | |
4071 | * @ap: Port to initialize | |
4072 | * | |
4073 | * Called just after data structures for each port are | |
4074 | * initialized. Allocates space for PRD table. | |
4075 | * | |
4076 | * May be used as the port_start() entry in ata_port_operations. | |
4077 | * | |
4078 | * LOCKING: | |
4079 | */ | |
4080 | ||
1da177e4 LT |
4081 | int ata_port_start (struct ata_port *ap) |
4082 | { | |
4083 | struct device *dev = ap->host_set->dev; | |
4084 | ||
4085 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
4086 | if (!ap->prd) | |
4087 | return -ENOMEM; | |
4088 | ||
4089 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); | |
4090 | ||
4091 | return 0; | |
4092 | } | |
4093 | ||
0baab86b EF |
4094 | |
4095 | /** | |
4096 | * ata_port_stop - Undo ata_port_start() | |
4097 | * @ap: Port to shut down | |
4098 | * | |
4099 | * Frees the PRD table. | |
4100 | * | |
4101 | * May be used as the port_stop() entry in ata_port_operations. | |
4102 | * | |
4103 | * LOCKING: | |
4104 | */ | |
4105 | ||
1da177e4 LT |
4106 | void ata_port_stop (struct ata_port *ap) |
4107 | { | |
4108 | struct device *dev = ap->host_set->dev; | |
4109 | ||
4110 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
4111 | } | |
4112 | ||
aa8f0dc6 JG |
4113 | void ata_host_stop (struct ata_host_set *host_set) |
4114 | { | |
4115 | if (host_set->mmio_base) | |
4116 | iounmap(host_set->mmio_base); | |
4117 | } | |
4118 | ||
4119 | ||
1da177e4 LT |
4120 | /** |
4121 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
4122 | * @ap: Port to unregister | |
4123 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
4124 | * | |
4125 | * LOCKING: | |
4126 | */ | |
4127 | ||
4128 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
4129 | { | |
4130 | struct Scsi_Host *sh = ap->host; | |
4131 | ||
4132 | DPRINTK("ENTER\n"); | |
4133 | ||
4134 | if (do_unregister) | |
4135 | scsi_remove_host(sh); | |
4136 | ||
4137 | ap->ops->port_stop(ap); | |
4138 | } | |
4139 | ||
4140 | /** | |
4141 | * ata_host_init - Initialize an ata_port structure | |
4142 | * @ap: Structure to initialize | |
4143 | * @host: associated SCSI mid-layer structure | |
4144 | * @host_set: Collection of hosts to which @ap belongs | |
4145 | * @ent: Probe information provided by low-level driver | |
4146 | * @port_no: Port number associated with this ata_port | |
4147 | * | |
0cba632b JG |
4148 | * Initialize a new ata_port structure, and its associated |
4149 | * scsi_host. | |
4150 | * | |
1da177e4 | 4151 | * LOCKING: |
0cba632b | 4152 | * Inherited from caller. |
1da177e4 LT |
4153 | * |
4154 | */ | |
4155 | ||
4156 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
4157 | struct ata_host_set *host_set, | |
4158 | struct ata_probe_ent *ent, unsigned int port_no) | |
4159 | { | |
4160 | unsigned int i; | |
4161 | ||
4162 | host->max_id = 16; | |
4163 | host->max_lun = 1; | |
4164 | host->max_channel = 1; | |
4165 | host->unique_id = ata_unique_id++; | |
4166 | host->max_cmd_len = 12; | |
12413197 | 4167 | |
1da177e4 LT |
4168 | scsi_assign_lock(host, &host_set->lock); |
4169 | ||
4170 | ap->flags = ATA_FLAG_PORT_DISABLED; | |
4171 | ap->id = host->unique_id; | |
4172 | ap->host = host; | |
4173 | ap->ctl = ATA_DEVCTL_OBS; | |
4174 | ap->host_set = host_set; | |
4175 | ap->port_no = port_no; | |
4176 | ap->hard_port_no = | |
4177 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
4178 | ap->pio_mask = ent->pio_mask; | |
4179 | ap->mwdma_mask = ent->mwdma_mask; | |
4180 | ap->udma_mask = ent->udma_mask; | |
4181 | ap->flags |= ent->host_flags; | |
4182 | ap->ops = ent->port_ops; | |
4183 | ap->cbl = ATA_CBL_NONE; | |
4184 | ap->active_tag = ATA_TAG_POISON; | |
4185 | ap->last_ctl = 0xFF; | |
4186 | ||
f9997be9 | 4187 | INIT_WORK(&ap->dataout_task, ata_dataout_task, ap); |
1da177e4 LT |
4188 | INIT_WORK(&ap->pio_task, ata_pio_task, ap); |
4189 | ||
4190 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
4191 | ap->device[i].devno = i; | |
4192 | ||
4193 | #ifdef ATA_IRQ_TRAP | |
4194 | ap->stats.unhandled_irq = 1; | |
4195 | ap->stats.idle_irq = 1; | |
4196 | #endif | |
4197 | ||
4198 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
4199 | } | |
4200 | ||
4201 | /** | |
4202 | * ata_host_add - Attach low-level ATA driver to system | |
4203 | * @ent: Information provided by low-level driver | |
4204 | * @host_set: Collections of ports to which we add | |
4205 | * @port_no: Port number associated with this host | |
4206 | * | |
0cba632b JG |
4207 | * Attach low-level ATA driver to system. |
4208 | * | |
1da177e4 | 4209 | * LOCKING: |
0cba632b | 4210 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4211 | * |
4212 | * RETURNS: | |
0cba632b | 4213 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
4214 | * |
4215 | */ | |
4216 | ||
4217 | static struct ata_port * ata_host_add(struct ata_probe_ent *ent, | |
4218 | struct ata_host_set *host_set, | |
4219 | unsigned int port_no) | |
4220 | { | |
4221 | struct Scsi_Host *host; | |
4222 | struct ata_port *ap; | |
4223 | int rc; | |
4224 | ||
4225 | DPRINTK("ENTER\n"); | |
4226 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
4227 | if (!host) | |
4228 | return NULL; | |
4229 | ||
4230 | ap = (struct ata_port *) &host->hostdata[0]; | |
4231 | ||
4232 | ata_host_init(ap, host, host_set, ent, port_no); | |
4233 | ||
4234 | rc = ap->ops->port_start(ap); | |
4235 | if (rc) | |
4236 | goto err_out; | |
4237 | ||
4238 | return ap; | |
4239 | ||
4240 | err_out: | |
4241 | scsi_host_put(host); | |
4242 | return NULL; | |
4243 | } | |
4244 | ||
4245 | /** | |
0cba632b JG |
4246 | * ata_device_add - Register hardware device with ATA and SCSI layers |
4247 | * @ent: Probe information describing hardware device to be registered | |
4248 | * | |
4249 | * This function processes the information provided in the probe | |
4250 | * information struct @ent, allocates the necessary ATA and SCSI | |
4251 | * host information structures, initializes them, and registers | |
4252 | * everything with requisite kernel subsystems. | |
4253 | * | |
4254 | * This function requests irqs, probes the ATA bus, and probes | |
4255 | * the SCSI bus. | |
1da177e4 LT |
4256 | * |
4257 | * LOCKING: | |
0cba632b | 4258 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4259 | * |
4260 | * RETURNS: | |
0cba632b | 4261 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 LT |
4262 | * |
4263 | */ | |
4264 | ||
4265 | int ata_device_add(struct ata_probe_ent *ent) | |
4266 | { | |
4267 | unsigned int count = 0, i; | |
4268 | struct device *dev = ent->dev; | |
4269 | struct ata_host_set *host_set; | |
4270 | ||
4271 | DPRINTK("ENTER\n"); | |
4272 | /* alloc a container for our list of ATA ports (buses) */ | |
4273 | host_set = kmalloc(sizeof(struct ata_host_set) + | |
4274 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); | |
4275 | if (!host_set) | |
4276 | return 0; | |
4277 | memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *))); | |
4278 | spin_lock_init(&host_set->lock); | |
4279 | ||
4280 | host_set->dev = dev; | |
4281 | host_set->n_ports = ent->n_ports; | |
4282 | host_set->irq = ent->irq; | |
4283 | host_set->mmio_base = ent->mmio_base; | |
4284 | host_set->private_data = ent->private_data; | |
4285 | host_set->ops = ent->port_ops; | |
4286 | ||
4287 | /* register each port bound to this device */ | |
4288 | for (i = 0; i < ent->n_ports; i++) { | |
4289 | struct ata_port *ap; | |
4290 | unsigned long xfer_mode_mask; | |
4291 | ||
4292 | ap = ata_host_add(ent, host_set, i); | |
4293 | if (!ap) | |
4294 | goto err_out; | |
4295 | ||
4296 | host_set->ports[i] = ap; | |
4297 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
4298 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
4299 | (ap->pio_mask << ATA_SHIFT_PIO); | |
4300 | ||
4301 | /* print per-port info to dmesg */ | |
4302 | printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX " | |
4303 | "bmdma 0x%lX irq %lu\n", | |
4304 | ap->id, | |
4305 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
4306 | ata_mode_string(xfer_mode_mask), | |
4307 | ap->ioaddr.cmd_addr, | |
4308 | ap->ioaddr.ctl_addr, | |
4309 | ap->ioaddr.bmdma_addr, | |
4310 | ent->irq); | |
4311 | ||
4312 | ata_chk_status(ap); | |
4313 | host_set->ops->irq_clear(ap); | |
4314 | count++; | |
4315 | } | |
4316 | ||
4317 | if (!count) { | |
4318 | kfree(host_set); | |
4319 | return 0; | |
4320 | } | |
4321 | ||
4322 | /* obtain irq, that is shared between channels */ | |
4323 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
4324 | DRV_NAME, host_set)) | |
4325 | goto err_out; | |
4326 | ||
4327 | /* perform each probe synchronously */ | |
4328 | DPRINTK("probe begin\n"); | |
4329 | for (i = 0; i < count; i++) { | |
4330 | struct ata_port *ap; | |
4331 | int rc; | |
4332 | ||
4333 | ap = host_set->ports[i]; | |
4334 | ||
4335 | DPRINTK("ata%u: probe begin\n", ap->id); | |
4336 | rc = ata_bus_probe(ap); | |
4337 | DPRINTK("ata%u: probe end\n", ap->id); | |
4338 | ||
4339 | if (rc) { | |
4340 | /* FIXME: do something useful here? | |
4341 | * Current libata behavior will | |
4342 | * tear down everything when | |
4343 | * the module is removed | |
4344 | * or the h/w is unplugged. | |
4345 | */ | |
4346 | } | |
4347 | ||
4348 | rc = scsi_add_host(ap->host, dev); | |
4349 | if (rc) { | |
4350 | printk(KERN_ERR "ata%u: scsi_add_host failed\n", | |
4351 | ap->id); | |
4352 | /* FIXME: do something useful here */ | |
4353 | /* FIXME: handle unconditional calls to | |
4354 | * scsi_scan_host and ata_host_remove, below, | |
4355 | * at the very least | |
4356 | */ | |
4357 | } | |
4358 | } | |
4359 | ||
4360 | /* probes are done, now scan each port's disk(s) */ | |
4361 | DPRINTK("probe begin\n"); | |
4362 | for (i = 0; i < count; i++) { | |
4363 | struct ata_port *ap = host_set->ports[i]; | |
4364 | ||
644dd0cc | 4365 | ata_scsi_scan_host(ap); |
1da177e4 LT |
4366 | } |
4367 | ||
4368 | dev_set_drvdata(dev, host_set); | |
4369 | ||
4370 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
4371 | return ent->n_ports; /* success */ | |
4372 | ||
4373 | err_out: | |
4374 | for (i = 0; i < count; i++) { | |
4375 | ata_host_remove(host_set->ports[i], 1); | |
4376 | scsi_host_put(host_set->ports[i]->host); | |
4377 | } | |
4378 | kfree(host_set); | |
4379 | VPRINTK("EXIT, returning 0\n"); | |
4380 | return 0; | |
4381 | } | |
4382 | ||
17b14451 AC |
4383 | /** |
4384 | * ata_host_set_remove - PCI layer callback for device removal | |
4385 | * @host_set: ATA host set that was removed | |
4386 | * | |
4387 | * Unregister all objects associated with this host set. Free those | |
4388 | * objects. | |
4389 | * | |
4390 | * LOCKING: | |
4391 | * Inherited from calling layer (may sleep). | |
4392 | */ | |
4393 | ||
4394 | ||
4395 | void ata_host_set_remove(struct ata_host_set *host_set) | |
4396 | { | |
4397 | struct ata_port *ap; | |
4398 | unsigned int i; | |
4399 | ||
4400 | for (i = 0; i < host_set->n_ports; i++) { | |
4401 | ap = host_set->ports[i]; | |
4402 | scsi_remove_host(ap->host); | |
4403 | } | |
4404 | ||
4405 | free_irq(host_set->irq, host_set); | |
4406 | ||
4407 | for (i = 0; i < host_set->n_ports; i++) { | |
4408 | ap = host_set->ports[i]; | |
4409 | ||
4410 | ata_scsi_release(ap->host); | |
4411 | ||
4412 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4413 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4414 | ||
4415 | if (ioaddr->cmd_addr == 0x1f0) | |
4416 | release_region(0x1f0, 8); | |
4417 | else if (ioaddr->cmd_addr == 0x170) | |
4418 | release_region(0x170, 8); | |
4419 | } | |
4420 | ||
4421 | scsi_host_put(ap->host); | |
4422 | } | |
4423 | ||
4424 | if (host_set->ops->host_stop) | |
4425 | host_set->ops->host_stop(host_set); | |
4426 | ||
4427 | kfree(host_set); | |
4428 | } | |
4429 | ||
1da177e4 LT |
4430 | /** |
4431 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4432 | * @host: libata host to be unloaded | |
4433 | * | |
4434 | * Performs all duties necessary to shut down a libata port... | |
4435 | * Kill port kthread, disable port, and release resources. | |
4436 | * | |
4437 | * LOCKING: | |
4438 | * Inherited from SCSI layer. | |
4439 | * | |
4440 | * RETURNS: | |
4441 | * One. | |
4442 | */ | |
4443 | ||
4444 | int ata_scsi_release(struct Scsi_Host *host) | |
4445 | { | |
4446 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | |
4447 | ||
4448 | DPRINTK("ENTER\n"); | |
4449 | ||
4450 | ap->ops->port_disable(ap); | |
4451 | ata_host_remove(ap, 0); | |
4452 | ||
4453 | DPRINTK("EXIT\n"); | |
4454 | return 1; | |
4455 | } | |
4456 | ||
4457 | /** | |
4458 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
4459 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
4460 | * |
4461 | * Utility function which initializes data_addr, error_addr, | |
4462 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
4463 | * device_addr, status_addr, and command_addr to standard offsets | |
4464 | * relative to cmd_addr. | |
4465 | * | |
4466 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 4467 | */ |
0baab86b | 4468 | |
1da177e4 LT |
4469 | void ata_std_ports(struct ata_ioports *ioaddr) |
4470 | { | |
4471 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
4472 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
4473 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
4474 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
4475 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
4476 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
4477 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
4478 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
4479 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
4480 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
4481 | } | |
4482 | ||
4483 | static struct ata_probe_ent * | |
4484 | ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port) | |
4485 | { | |
4486 | struct ata_probe_ent *probe_ent; | |
4487 | ||
4488 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); | |
4489 | if (!probe_ent) { | |
4490 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
4491 | kobject_name(&(dev->kobj))); | |
4492 | return NULL; | |
4493 | } | |
4494 | ||
4495 | memset(probe_ent, 0, sizeof(*probe_ent)); | |
4496 | ||
4497 | INIT_LIST_HEAD(&probe_ent->node); | |
4498 | probe_ent->dev = dev; | |
4499 | ||
4500 | probe_ent->sht = port->sht; | |
4501 | probe_ent->host_flags = port->host_flags; | |
4502 | probe_ent->pio_mask = port->pio_mask; | |
4503 | probe_ent->mwdma_mask = port->mwdma_mask; | |
4504 | probe_ent->udma_mask = port->udma_mask; | |
4505 | probe_ent->port_ops = port->port_ops; | |
4506 | ||
4507 | return probe_ent; | |
4508 | } | |
4509 | ||
0baab86b EF |
4510 | |
4511 | ||
374b1873 JG |
4512 | #ifdef CONFIG_PCI |
4513 | ||
4514 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
4515 | { | |
4516 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
4517 | ||
4518 | pci_iounmap(pdev, host_set->mmio_base); | |
4519 | } | |
4520 | ||
0baab86b EF |
4521 | /** |
4522 | * ata_pci_init_native_mode - Initialize native-mode driver | |
4523 | * @pdev: pci device to be initialized | |
4524 | * @port: array[2] of pointers to port info structures. | |
47a86593 | 4525 | * @ports: bitmap of ports present |
0baab86b EF |
4526 | * |
4527 | * Utility function which allocates and initializes an | |
4528 | * ata_probe_ent structure for a standard dual-port | |
4529 | * PIO-based IDE controller. The returned ata_probe_ent | |
4530 | * structure can be passed to ata_device_add(). The returned | |
4531 | * ata_probe_ent structure should then be freed with kfree(). | |
47a86593 AC |
4532 | * |
4533 | * The caller need only pass the address of the primary port, the | |
4534 | * secondary will be deduced automatically. If the device has non | |
4535 | * standard secondary port mappings this function can be called twice, | |
4536 | * once for each interface. | |
0baab86b EF |
4537 | */ |
4538 | ||
1da177e4 | 4539 | struct ata_probe_ent * |
47a86593 | 4540 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports) |
1da177e4 LT |
4541 | { |
4542 | struct ata_probe_ent *probe_ent = | |
4543 | ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
47a86593 AC |
4544 | int p = 0; |
4545 | ||
1da177e4 LT |
4546 | if (!probe_ent) |
4547 | return NULL; | |
4548 | ||
1da177e4 LT |
4549 | probe_ent->irq = pdev->irq; |
4550 | probe_ent->irq_flags = SA_SHIRQ; | |
4551 | ||
47a86593 AC |
4552 | if (ports & ATA_PORT_PRIMARY) { |
4553 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0); | |
4554 | probe_ent->port[p].altstatus_addr = | |
4555 | probe_ent->port[p].ctl_addr = | |
4556 | pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; | |
4557 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4); | |
4558 | ata_std_ports(&probe_ent->port[p]); | |
4559 | p++; | |
4560 | } | |
1da177e4 | 4561 | |
47a86593 AC |
4562 | if (ports & ATA_PORT_SECONDARY) { |
4563 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2); | |
4564 | probe_ent->port[p].altstatus_addr = | |
4565 | probe_ent->port[p].ctl_addr = | |
4566 | pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS; | |
4567 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8; | |
4568 | ata_std_ports(&probe_ent->port[p]); | |
4569 | p++; | |
4570 | } | |
1da177e4 | 4571 | |
47a86593 | 4572 | probe_ent->n_ports = p; |
1da177e4 LT |
4573 | return probe_ent; |
4574 | } | |
4575 | ||
47a86593 | 4576 | static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info **port, int port_num) |
1da177e4 | 4577 | { |
47a86593 | 4578 | struct ata_probe_ent *probe_ent; |
1da177e4 LT |
4579 | |
4580 | probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
4581 | if (!probe_ent) | |
4582 | return NULL; | |
1da177e4 | 4583 | |
47a86593 | 4584 | |
1da177e4 | 4585 | probe_ent->legacy_mode = 1; |
47a86593 AC |
4586 | probe_ent->n_ports = 1; |
4587 | probe_ent->hard_port_no = port_num; | |
4588 | ||
4589 | switch(port_num) | |
4590 | { | |
4591 | case 0: | |
4592 | probe_ent->irq = 14; | |
4593 | probe_ent->port[0].cmd_addr = 0x1f0; | |
4594 | probe_ent->port[0].altstatus_addr = | |
4595 | probe_ent->port[0].ctl_addr = 0x3f6; | |
4596 | break; | |
4597 | case 1: | |
4598 | probe_ent->irq = 15; | |
4599 | probe_ent->port[0].cmd_addr = 0x170; | |
4600 | probe_ent->port[0].altstatus_addr = | |
4601 | probe_ent->port[0].ctl_addr = 0x376; | |
4602 | break; | |
4603 | } | |
4604 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num; | |
1da177e4 | 4605 | ata_std_ports(&probe_ent->port[0]); |
1da177e4 LT |
4606 | return probe_ent; |
4607 | } | |
4608 | ||
4609 | /** | |
4610 | * ata_pci_init_one - Initialize/register PCI IDE host controller | |
4611 | * @pdev: Controller to be initialized | |
4612 | * @port_info: Information from low-level host driver | |
4613 | * @n_ports: Number of ports attached to host controller | |
4614 | * | |
0baab86b EF |
4615 | * This is a helper function which can be called from a driver's |
4616 | * xxx_init_one() probe function if the hardware uses traditional | |
4617 | * IDE taskfile registers. | |
4618 | * | |
4619 | * This function calls pci_enable_device(), reserves its register | |
4620 | * regions, sets the dma mask, enables bus master mode, and calls | |
4621 | * ata_device_add() | |
4622 | * | |
1da177e4 LT |
4623 | * LOCKING: |
4624 | * Inherited from PCI layer (may sleep). | |
4625 | * | |
4626 | * RETURNS: | |
0cba632b | 4627 | * Zero on success, negative on errno-based value on error. |
1da177e4 LT |
4628 | * |
4629 | */ | |
4630 | ||
4631 | int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, | |
4632 | unsigned int n_ports) | |
4633 | { | |
47a86593 | 4634 | struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL; |
1da177e4 LT |
4635 | struct ata_port_info *port[2]; |
4636 | u8 tmp8, mask; | |
4637 | unsigned int legacy_mode = 0; | |
4638 | int disable_dev_on_err = 1; | |
4639 | int rc; | |
4640 | ||
4641 | DPRINTK("ENTER\n"); | |
4642 | ||
4643 | port[0] = port_info[0]; | |
4644 | if (n_ports > 1) | |
4645 | port[1] = port_info[1]; | |
4646 | else | |
4647 | port[1] = port[0]; | |
4648 | ||
4649 | if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 | |
4650 | && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { | |
47a86593 | 4651 | /* TODO: What if one channel is in native mode ... */ |
1da177e4 LT |
4652 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); |
4653 | mask = (1 << 2) | (1 << 0); | |
4654 | if ((tmp8 & mask) != mask) | |
4655 | legacy_mode = (1 << 3); | |
4656 | } | |
4657 | ||
4658 | /* FIXME... */ | |
47a86593 AC |
4659 | if ((!legacy_mode) && (n_ports > 2)) { |
4660 | printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n"); | |
4661 | n_ports = 2; | |
4662 | /* For now */ | |
1da177e4 LT |
4663 | } |
4664 | ||
47a86593 AC |
4665 | /* FIXME: Really for ATA it isn't safe because the device may be |
4666 | multi-purpose and we want to leave it alone if it was already | |
4667 | enabled. Secondly for shared use as Arjan says we want refcounting | |
4668 | ||
4669 | Checking dev->is_enabled is insufficient as this is not set at | |
4670 | boot for the primary video which is BIOS enabled | |
4671 | */ | |
4672 | ||
1da177e4 LT |
4673 | rc = pci_enable_device(pdev); |
4674 | if (rc) | |
4675 | return rc; | |
4676 | ||
4677 | rc = pci_request_regions(pdev, DRV_NAME); | |
4678 | if (rc) { | |
4679 | disable_dev_on_err = 0; | |
4680 | goto err_out; | |
4681 | } | |
4682 | ||
47a86593 | 4683 | /* FIXME: Should use platform specific mappers for legacy port ranges */ |
1da177e4 LT |
4684 | if (legacy_mode) { |
4685 | if (!request_region(0x1f0, 8, "libata")) { | |
4686 | struct resource *conflict, res; | |
4687 | res.start = 0x1f0; | |
4688 | res.end = 0x1f0 + 8 - 1; | |
4689 | conflict = ____request_resource(&ioport_resource, &res); | |
4690 | if (!strcmp(conflict->name, "libata")) | |
4691 | legacy_mode |= (1 << 0); | |
4692 | else { | |
4693 | disable_dev_on_err = 0; | |
4694 | printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n"); | |
4695 | } | |
4696 | } else | |
4697 | legacy_mode |= (1 << 0); | |
4698 | ||
4699 | if (!request_region(0x170, 8, "libata")) { | |
4700 | struct resource *conflict, res; | |
4701 | res.start = 0x170; | |
4702 | res.end = 0x170 + 8 - 1; | |
4703 | conflict = ____request_resource(&ioport_resource, &res); | |
4704 | if (!strcmp(conflict->name, "libata")) | |
4705 | legacy_mode |= (1 << 1); | |
4706 | else { | |
4707 | disable_dev_on_err = 0; | |
4708 | printk(KERN_WARNING "ata: 0x170 IDE port busy\n"); | |
4709 | } | |
4710 | } else | |
4711 | legacy_mode |= (1 << 1); | |
4712 | } | |
4713 | ||
4714 | /* we have legacy mode, but all ports are unavailable */ | |
4715 | if (legacy_mode == (1 << 3)) { | |
4716 | rc = -EBUSY; | |
4717 | goto err_out_regions; | |
4718 | } | |
4719 | ||
4720 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
4721 | if (rc) | |
4722 | goto err_out_regions; | |
4723 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
4724 | if (rc) | |
4725 | goto err_out_regions; | |
4726 | ||
4727 | if (legacy_mode) { | |
47a86593 AC |
4728 | if (legacy_mode & (1 << 0)) |
4729 | probe_ent = ata_pci_init_legacy_port(pdev, port, 0); | |
4730 | if (legacy_mode & (1 << 1)) | |
4731 | probe_ent2 = ata_pci_init_legacy_port(pdev, port, 1); | |
4732 | } else { | |
4733 | if (n_ports == 2) | |
4734 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | |
4735 | else | |
4736 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY); | |
4737 | } | |
4738 | if (!probe_ent && !probe_ent2) { | |
1da177e4 LT |
4739 | rc = -ENOMEM; |
4740 | goto err_out_regions; | |
4741 | } | |
4742 | ||
4743 | pci_set_master(pdev); | |
4744 | ||
4745 | /* FIXME: check ata_device_add return */ | |
4746 | if (legacy_mode) { | |
4747 | if (legacy_mode & (1 << 0)) | |
4748 | ata_device_add(probe_ent); | |
4749 | if (legacy_mode & (1 << 1)) | |
4750 | ata_device_add(probe_ent2); | |
4751 | } else | |
4752 | ata_device_add(probe_ent); | |
4753 | ||
4754 | kfree(probe_ent); | |
4755 | kfree(probe_ent2); | |
4756 | ||
4757 | return 0; | |
4758 | ||
4759 | err_out_regions: | |
4760 | if (legacy_mode & (1 << 0)) | |
4761 | release_region(0x1f0, 8); | |
4762 | if (legacy_mode & (1 << 1)) | |
4763 | release_region(0x170, 8); | |
4764 | pci_release_regions(pdev); | |
4765 | err_out: | |
4766 | if (disable_dev_on_err) | |
4767 | pci_disable_device(pdev); | |
4768 | return rc; | |
4769 | } | |
4770 | ||
4771 | /** | |
4772 | * ata_pci_remove_one - PCI layer callback for device removal | |
4773 | * @pdev: PCI device that was removed | |
4774 | * | |
4775 | * PCI layer indicates to libata via this hook that | |
4776 | * hot-unplug or module unload event has occured. | |
4777 | * Handle this by unregistering all objects associated | |
4778 | * with this PCI device. Free those objects. Then finally | |
4779 | * release PCI resources and disable device. | |
4780 | * | |
4781 | * LOCKING: | |
4782 | * Inherited from PCI layer (may sleep). | |
4783 | */ | |
4784 | ||
4785 | void ata_pci_remove_one (struct pci_dev *pdev) | |
4786 | { | |
4787 | struct device *dev = pci_dev_to_dev(pdev); | |
4788 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
1da177e4 | 4789 | |
17b14451 | 4790 | ata_host_set_remove(host_set); |
1da177e4 LT |
4791 | pci_release_regions(pdev); |
4792 | pci_disable_device(pdev); | |
4793 | dev_set_drvdata(dev, NULL); | |
4794 | } | |
4795 | ||
4796 | /* move to PCI subsystem */ | |
4797 | int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits) | |
4798 | { | |
4799 | unsigned long tmp = 0; | |
4800 | ||
4801 | switch (bits->width) { | |
4802 | case 1: { | |
4803 | u8 tmp8 = 0; | |
4804 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
4805 | tmp = tmp8; | |
4806 | break; | |
4807 | } | |
4808 | case 2: { | |
4809 | u16 tmp16 = 0; | |
4810 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
4811 | tmp = tmp16; | |
4812 | break; | |
4813 | } | |
4814 | case 4: { | |
4815 | u32 tmp32 = 0; | |
4816 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
4817 | tmp = tmp32; | |
4818 | break; | |
4819 | } | |
4820 | ||
4821 | default: | |
4822 | return -EINVAL; | |
4823 | } | |
4824 | ||
4825 | tmp &= bits->mask; | |
4826 | ||
4827 | return (tmp == bits->val) ? 1 : 0; | |
4828 | } | |
4829 | #endif /* CONFIG_PCI */ | |
4830 | ||
4831 | ||
1da177e4 LT |
4832 | static int __init ata_init(void) |
4833 | { | |
4834 | ata_wq = create_workqueue("ata"); | |
4835 | if (!ata_wq) | |
4836 | return -ENOMEM; | |
4837 | ||
4838 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
4839 | return 0; | |
4840 | } | |
4841 | ||
4842 | static void __exit ata_exit(void) | |
4843 | { | |
4844 | destroy_workqueue(ata_wq); | |
4845 | } | |
4846 | ||
4847 | module_init(ata_init); | |
4848 | module_exit(ata_exit); | |
4849 | ||
67846b30 JG |
4850 | static unsigned long ratelimit_time; |
4851 | static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED; | |
4852 | ||
4853 | int ata_ratelimit(void) | |
4854 | { | |
4855 | int rc; | |
4856 | unsigned long flags; | |
4857 | ||
4858 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
4859 | ||
4860 | if (time_after(jiffies, ratelimit_time)) { | |
4861 | rc = 1; | |
4862 | ratelimit_time = jiffies + (HZ/5); | |
4863 | } else | |
4864 | rc = 0; | |
4865 | ||
4866 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
4867 | ||
4868 | return rc; | |
4869 | } | |
4870 | ||
1da177e4 LT |
4871 | /* |
4872 | * libata is essentially a library of internal helper functions for | |
4873 | * low-level ATA host controller drivers. As such, the API/ABI is | |
4874 | * likely to change as new drivers are added and updated. | |
4875 | * Do not depend on ABI/API stability. | |
4876 | */ | |
4877 | ||
4878 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
4879 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
4880 | EXPORT_SYMBOL_GPL(ata_device_add); | |
17b14451 | 4881 | EXPORT_SYMBOL_GPL(ata_host_set_remove); |
1da177e4 LT |
4882 | EXPORT_SYMBOL_GPL(ata_sg_init); |
4883 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
4884 | EXPORT_SYMBOL_GPL(ata_qc_complete); | |
4885 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); | |
4886 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
4887 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
4888 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
4889 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
4890 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
4891 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
4892 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
4893 | EXPORT_SYMBOL_GPL(ata_check_status); | |
4894 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
4895 | EXPORT_SYMBOL_GPL(ata_chk_err); | |
4896 | EXPORT_SYMBOL_GPL(ata_exec_command); | |
4897 | EXPORT_SYMBOL_GPL(ata_port_start); | |
4898 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 4899 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 LT |
4900 | EXPORT_SYMBOL_GPL(ata_interrupt); |
4901 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
4902 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
4903 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
4904 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
4905 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
4906 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
4907 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
4908 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
4909 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
4910 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
4911 | EXPORT_SYMBOL_GPL(ata_port_disable); | |
67846b30 | 4912 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
1da177e4 LT |
4913 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
4914 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
4915 | EXPORT_SYMBOL_GPL(ata_scsi_error); | |
4916 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
4917 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
4918 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
4919 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
4920 | EXPORT_SYMBOL_GPL(ata_dev_id_string); | |
6f2f3812 | 4921 | EXPORT_SYMBOL_GPL(ata_dev_config); |
1da177e4 LT |
4922 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
4923 | ||
4924 | #ifdef CONFIG_PCI | |
4925 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 4926 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
4927 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
4928 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
4929 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
4930 | #endif /* CONFIG_PCI */ |