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Merge libata upstream (which includes C/H/S support) include irq-pio branch.
[deliverable/linux.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
51#include <scsi/scsi.h>
52#include "scsi.h"
53#include "scsi_priv.h"
54#include <scsi/scsi_host.h>
55#include <linux/libata.h>
56#include <asm/io.h>
57#include <asm/semaphore.h>
58#include <asm/byteorder.h>
59
60#include "libata.h"
61
62static unsigned int ata_busy_sleep (struct ata_port *ap,
63 unsigned long tmout_pat,
64 unsigned long tmout);
8bf62ece 65static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
68static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift);
69static int fgb(u32 bitmap);
70static int ata_choose_xfer_mode(struct ata_port *ap,
71 u8 *xfer_mode_out,
72 unsigned int *xfer_shift_out);
73static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat);
74static void __ata_qc_complete(struct ata_queued_cmd *qc);
75
76static unsigned int ata_unique_id = 1;
77static struct workqueue_struct *ata_wq;
78
1623c81e
JG		 79int atapi_enabled = 0;
80module_param(atapi_enabled, int, 0444);
81MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82
1da177e4
LT		 83MODULE_AUTHOR("Jeff Garzik");
84MODULE_DESCRIPTION("Library module for ATA devices");
85MODULE_LICENSE("GPL");
86MODULE_VERSION(DRV_VERSION);
87
88/**
89 * ata_tf_load - send taskfile registers to host controller
90 * @ap: Port to which output is sent
91 * @tf: ATA taskfile register set
92 *
93 * Outputs ATA taskfile to standard ATA host controller.
94 *
95 * LOCKING:
96 * Inherited from caller.
97 */
98
99static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
100{
101 struct ata_ioports *ioaddr = &ap->ioaddr;
102 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
103
104 if (tf->ctl != ap->last_ctl) {
105 outb(tf->ctl, ioaddr->ctl_addr);
106 ap->last_ctl = tf->ctl;
107 ata_wait_idle(ap);
108 }
109
110 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
111 outb(tf->hob_feature, ioaddr->feature_addr);
112 outb(tf->hob_nsect, ioaddr->nsect_addr);
113 outb(tf->hob_lbal, ioaddr->lbal_addr);
114 outb(tf->hob_lbam, ioaddr->lbam_addr);
115 outb(tf->hob_lbah, ioaddr->lbah_addr);
116 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
117 tf->hob_feature,
118 tf->hob_nsect,
119 tf->hob_lbal,
120 tf->hob_lbam,
121 tf->hob_lbah);
122 }
123
124 if (is_addr) {
125 outb(tf->feature, ioaddr->feature_addr);
126 outb(tf->nsect, ioaddr->nsect_addr);
127 outb(tf->lbal, ioaddr->lbal_addr);
128 outb(tf->lbam, ioaddr->lbam_addr);
129 outb(tf->lbah, ioaddr->lbah_addr);
130 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
131 tf->feature,
132 tf->nsect,
133 tf->lbal,
134 tf->lbam,
135 tf->lbah);
136 }
137
138 if (tf->flags & ATA_TFLAG_DEVICE) {
139 outb(tf->device, ioaddr->device_addr);
140 VPRINTK("device 0x%X\n", tf->device);
141 }
142
143 ata_wait_idle(ap);
144}
145
146/**
147 * ata_tf_load_mmio - send taskfile registers to host controller
148 * @ap: Port to which output is sent
149 * @tf: ATA taskfile register set
150 *
151 * Outputs ATA taskfile to standard ATA host controller using MMIO.
152 *
153 * LOCKING:
154 * Inherited from caller.
155 */
156
157static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
158{
159 struct ata_ioports *ioaddr = &ap->ioaddr;
160 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
161
162 if (tf->ctl != ap->last_ctl) {
163 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
164 ap->last_ctl = tf->ctl;
165 ata_wait_idle(ap);
166 }
167
168 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
169 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
170 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
171 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
172 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
173 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
174 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
175 tf->hob_feature,
176 tf->hob_nsect,
177 tf->hob_lbal,
178 tf->hob_lbam,
179 tf->hob_lbah);
180 }
181
182 if (is_addr) {
183 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
184 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
185 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
186 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
187 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
188 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
189 tf->feature,
190 tf->nsect,
191 tf->lbal,
192 tf->lbam,
193 tf->lbah);
194 }
195
196 if (tf->flags & ATA_TFLAG_DEVICE) {
197 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
198 VPRINTK("device 0x%X\n", tf->device);
199 }
200
201 ata_wait_idle(ap);
202}
203
0baab86b
EF		 204
205/**
206 * ata_tf_load - send taskfile registers to host controller
207 * @ap: Port to which output is sent
208 * @tf: ATA taskfile register set
209 *
210 * Outputs ATA taskfile to standard ATA host controller using MMIO
211 * or PIO as indicated by the ATA_FLAG_MMIO flag.
212 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
213 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
214 * hob_lbal, hob_lbam, and hob_lbah.
215 *
216 * This function waits for idle (!BUSY and !DRQ) after writing
217 * registers. If the control register has a new value, this
218 * function also waits for idle after writing control and before
219 * writing the remaining registers.
220 *
221 * May be used as the tf_load() entry in ata_port_operations.
222 *
223 * LOCKING:
224 * Inherited from caller.
225 */
1da177e4
LT		 226void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
227{
228 if (ap->flags & ATA_FLAG_MMIO)
229 ata_tf_load_mmio(ap, tf);
230 else
231 ata_tf_load_pio(ap, tf);
232}
233
234/**
0baab86b 235 * ata_exec_command_pio - issue ATA command to host controller
1da177e4
LT		 236 * @ap: port to which command is being issued
237 * @tf: ATA taskfile register set
238 *
0baab86b 239 * Issues PIO write to ATA command register, with proper
1da177e4
LT		 240 * synchronization with interrupt handler / other threads.
241 *
242 * LOCKING:
243 * spin_lock_irqsave(host_set lock)
244 */
245
246static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf)
247{
248 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
249
250 outb(tf->command, ap->ioaddr.command_addr);
251 ata_pause(ap);
252}
253
254
255/**
256 * ata_exec_command_mmio - issue ATA command to host controller
257 * @ap: port to which command is being issued
258 * @tf: ATA taskfile register set
259 *
260 * Issues MMIO write to ATA command register, with proper
261 * synchronization with interrupt handler / other threads.
262 *
263 * LOCKING:
264 * spin_lock_irqsave(host_set lock)
265 */
266
267static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
268{
269 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
270
271 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
272 ata_pause(ap);
273}
274
0baab86b
EF		 275
276/**
277 * ata_exec_command - issue ATA command to host controller
278 * @ap: port to which command is being issued
279 * @tf: ATA taskfile register set
280 *
281 * Issues PIO/MMIO write to ATA command register, with proper
282 * synchronization with interrupt handler / other threads.
283 *
284 * LOCKING:
285 * spin_lock_irqsave(host_set lock)
286 */
1da177e4
LT		 287void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf)
288{
289 if (ap->flags & ATA_FLAG_MMIO)
290 ata_exec_command_mmio(ap, tf);
291 else
292 ata_exec_command_pio(ap, tf);
293}
294
295/**
296 * ata_exec - issue ATA command to host controller
297 * @ap: port to which command is being issued
298 * @tf: ATA taskfile register set
299 *
300 * Issues PIO/MMIO write to ATA command register, with proper
301 * synchronization with interrupt handler / other threads.
302 *
303 * LOCKING:
304 * Obtains host_set lock.
305 */
306
307static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf)
308{
309 unsigned long flags;
310
311 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
312 spin_lock_irqsave(&ap->host_set->lock, flags);
313 ap->ops->exec_command(ap, tf);
314 spin_unlock_irqrestore(&ap->host_set->lock, flags);
315}
316
317/**
318 * ata_tf_to_host - issue ATA taskfile to host controller
319 * @ap: port to which command is being issued
320 * @tf: ATA taskfile register set
321 *
322 * Issues ATA taskfile register set to ATA host controller,
323 * with proper synchronization with interrupt handler and
324 * other threads.
325 *
326 * LOCKING:
327 * Obtains host_set lock.
328 */
329
330static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf)
331{
332 ap->ops->tf_load(ap, tf);
333
334 ata_exec(ap, tf);
335}
336
337/**
338 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
339 * @ap: port to which command is being issued
340 * @tf: ATA taskfile register set
341 *
342 * Issues ATA taskfile register set to ATA host controller,
343 * with proper synchronization with interrupt handler and
344 * other threads.
345 *
346 * LOCKING:
347 * spin_lock_irqsave(host_set lock)
348 */
349
350void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf)
351{
352 ap->ops->tf_load(ap, tf);
353 ap->ops->exec_command(ap, tf);
354}
355
356/**
0baab86b 357 * ata_tf_read_pio - input device's ATA taskfile shadow registers
1da177e4
LT		 358 * @ap: Port from which input is read
359 * @tf: ATA taskfile register set for storing input
360 *
361 * Reads ATA taskfile registers for currently-selected device
362 * into @tf.
363 *
364 * LOCKING:
365 * Inherited from caller.
366 */
367
368static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
369{
370 struct ata_ioports *ioaddr = &ap->ioaddr;
371
372 tf->nsect = inb(ioaddr->nsect_addr);
373 tf->lbal = inb(ioaddr->lbal_addr);
374 tf->lbam = inb(ioaddr->lbam_addr);
375 tf->lbah = inb(ioaddr->lbah_addr);
376 tf->device = inb(ioaddr->device_addr);
377
378 if (tf->flags & ATA_TFLAG_LBA48) {
379 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
380 tf->hob_feature = inb(ioaddr->error_addr);
381 tf->hob_nsect = inb(ioaddr->nsect_addr);
382 tf->hob_lbal = inb(ioaddr->lbal_addr);
383 tf->hob_lbam = inb(ioaddr->lbam_addr);
384 tf->hob_lbah = inb(ioaddr->lbah_addr);
385 }
386}
387
388/**
389 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
390 * @ap: Port from which input is read
391 * @tf: ATA taskfile register set for storing input
392 *
393 * Reads ATA taskfile registers for currently-selected device
394 * into @tf via MMIO.
395 *
396 * LOCKING:
397 * Inherited from caller.
398 */
399
400static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
401{
402 struct ata_ioports *ioaddr = &ap->ioaddr;
403
404 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
405 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
406 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
407 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
408 tf->device = readb((void __iomem *)ioaddr->device_addr);
409
410 if (tf->flags & ATA_TFLAG_LBA48) {
411 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
412 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
413 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
414 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
415 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
416 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
417 }
418}
419
0baab86b
EF		 420
421/**
422 * ata_tf_read - input device's ATA taskfile shadow registers
423 * @ap: Port from which input is read
424 * @tf: ATA taskfile register set for storing input
425 *
426 * Reads ATA taskfile registers for currently-selected device
427 * into @tf.
428 *
429 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
430 * is set, also reads the hob registers.
431 *
432 * May be used as the tf_read() entry in ata_port_operations.
433 *
434 * LOCKING:
435 * Inherited from caller.
436 */
1da177e4
LT		 437void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
438{
439 if (ap->flags & ATA_FLAG_MMIO)
440 ata_tf_read_mmio(ap, tf);
441 else
442 ata_tf_read_pio(ap, tf);
443}
444
445/**
446 * ata_check_status_pio - Read device status reg & clear interrupt
447 * @ap: port where the device is
448 *
449 * Reads ATA taskfile status register for currently-selected device
0baab86b 450 * and return its value. This also clears pending interrupts
1da177e4
LT		 451 * from this device
452 *
453 * LOCKING:
454 * Inherited from caller.
455 */
456static u8 ata_check_status_pio(struct ata_port *ap)
457{
458 return inb(ap->ioaddr.status_addr);
459}
460
461/**
462 * ata_check_status_mmio - Read device status reg & clear interrupt
463 * @ap: port where the device is
464 *
465 * Reads ATA taskfile status register for currently-selected device
0baab86b 466 * via MMIO and return its value. This also clears pending interrupts
1da177e4
LT		 467 * from this device
468 *
469 * LOCKING:
470 * Inherited from caller.
471 */
472static u8 ata_check_status_mmio(struct ata_port *ap)
473{
474 return readb((void __iomem *) ap->ioaddr.status_addr);
475}
476
0baab86b
EF		 477
478/**
479 * ata_check_status - Read device status reg & clear interrupt
480 * @ap: port where the device is
481 *
482 * Reads ATA taskfile status register for currently-selected device
483 * and return its value. This also clears pending interrupts
484 * from this device
485 *
486 * May be used as the check_status() entry in ata_port_operations.
487 *
488 * LOCKING:
489 * Inherited from caller.
490 */
1da177e4
LT		 491u8 ata_check_status(struct ata_port *ap)
492{
493 if (ap->flags & ATA_FLAG_MMIO)
494 return ata_check_status_mmio(ap);
495 return ata_check_status_pio(ap);
496}
497
0baab86b
EF		 498
499/**
500 * ata_altstatus - Read device alternate status reg
501 * @ap: port where the device is
502 *
503 * Reads ATA taskfile alternate status register for
504 * currently-selected device and return its value.
505 *
506 * Note: may NOT be used as the check_altstatus() entry in
507 * ata_port_operations.
508 *
509 * LOCKING:
510 * Inherited from caller.
511 */
1da177e4
LT		 512u8 ata_altstatus(struct ata_port *ap)
513{
514 if (ap->ops->check_altstatus)
515 return ap->ops->check_altstatus(ap);
516
517 if (ap->flags & ATA_FLAG_MMIO)
518 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
519 return inb(ap->ioaddr.altstatus_addr);
520}
521
0baab86b
EF		 522
523/**
524 * ata_chk_err - Read device error reg
525 * @ap: port where the device is
526 *
527 * Reads ATA taskfile error register for
528 * currently-selected device and return its value.
529 *
530 * Note: may NOT be used as the check_err() entry in
531 * ata_port_operations.
532 *
533 * LOCKING:
534 * Inherited from caller.
535 */
1da177e4
LT		 536u8 ata_chk_err(struct ata_port *ap)
537{
538 if (ap->ops->check_err)
539 return ap->ops->check_err(ap);
540
541 if (ap->flags & ATA_FLAG_MMIO) {
542 return readb((void __iomem *) ap->ioaddr.error_addr);
543 }
544 return inb(ap->ioaddr.error_addr);
545}
546
547/**
548 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
549 * @tf: Taskfile to convert
550 * @fis: Buffer into which data will output
551 * @pmp: Port multiplier port
552 *
553 * Converts a standard ATA taskfile to a Serial ATA
554 * FIS structure (Register - Host to Device).
555 *
556 * LOCKING:
557 * Inherited from caller.
558 */
559
560void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp)
561{
562 fis[0] = 0x27; /* Register - Host to Device FIS */
563 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
564 bit 7 indicates Command FIS */
565 fis[2] = tf->command;
566 fis[3] = tf->feature;
567
568 fis[4] = tf->lbal;
569 fis[5] = tf->lbam;
570 fis[6] = tf->lbah;
571 fis[7] = tf->device;
572
573 fis[8] = tf->hob_lbal;
574 fis[9] = tf->hob_lbam;
575 fis[10] = tf->hob_lbah;
576 fis[11] = tf->hob_feature;
577
578 fis[12] = tf->nsect;
579 fis[13] = tf->hob_nsect;
580 fis[14] = 0;
581 fis[15] = tf->ctl;
582
583 fis[16] = 0;
584 fis[17] = 0;
585 fis[18] = 0;
586 fis[19] = 0;
587}
588
589/**
590 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
591 * @fis: Buffer from which data will be input
592 * @tf: Taskfile to output
593 *
594 * Converts a standard ATA taskfile to a Serial ATA
595 * FIS structure (Register - Host to Device).
596 *
597 * LOCKING:
598 * Inherited from caller.
599 */
600
601void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf)
602{
603 tf->command = fis[2]; /* status */
604 tf->feature = fis[3]; /* error */
605
606 tf->lbal = fis[4];
607 tf->lbam = fis[5];
608 tf->lbah = fis[6];
609 tf->device = fis[7];
610
611 tf->hob_lbal = fis[8];
612 tf->hob_lbam = fis[9];
613 tf->hob_lbah = fis[10];
614
615 tf->nsect = fis[12];
616 tf->hob_nsect = fis[13];
617}
618
619/**
620 * ata_prot_to_cmd - determine which read/write opcodes to use
621 * @protocol: ATA_PROT_xxx taskfile protocol
622 * @lba48: true is lba48 is present
623 *
624 * Given necessary input, determine which read/write commands
625 * to use to transfer data.
626 *
627 * LOCKING:
628 * None.
629 */
630static int ata_prot_to_cmd(int protocol, int lba48)
631{
632 int rcmd = 0, wcmd = 0;
633
634 switch (protocol) {
635 case ATA_PROT_PIO:
636 if (lba48) {
637 rcmd = ATA_CMD_PIO_READ_EXT;
638 wcmd = ATA_CMD_PIO_WRITE_EXT;
639 } else {
640 rcmd = ATA_CMD_PIO_READ;
641 wcmd = ATA_CMD_PIO_WRITE;
642 }
643 break;
644
645 case ATA_PROT_DMA:
646 if (lba48) {
647 rcmd = ATA_CMD_READ_EXT;
648 wcmd = ATA_CMD_WRITE_EXT;
649 } else {
650 rcmd = ATA_CMD_READ;
651 wcmd = ATA_CMD_WRITE;
652 }
653 break;
654
655 default:
656 return -1;
657 }
658
659 return rcmd | (wcmd << 8);
660}
661
662/**
663 * ata_dev_set_protocol - set taskfile protocol and r/w commands
664 * @dev: device to examine and configure
665 *
666 * Examine the device configuration, after we have
667 * read the identify-device page and configured the
668 * data transfer mode. Set internal state related to
669 * the ATA taskfile protocol (pio, pio mult, dma, etc.)
670 * and calculate the proper read/write commands to use.
671 *
672 * LOCKING:
673 * caller.
674 */
675static void ata_dev_set_protocol(struct ata_device *dev)
676{
677 int pio = (dev->flags & ATA_DFLAG_PIO);
678 int lba48 = (dev->flags & ATA_DFLAG_LBA48);
679 int proto, cmd;
680
681 if (pio)
682 proto = dev->xfer_protocol = ATA_PROT_PIO;
683 else
684 proto = dev->xfer_protocol = ATA_PROT_DMA;
685
686 cmd = ata_prot_to_cmd(proto, lba48);
687 if (cmd < 0)
688 BUG();
689
690 dev->read_cmd = cmd & 0xff;
691 dev->write_cmd = (cmd >> 8) & 0xff;
692}
693
694static const char * xfer_mode_str[] = {
695 "UDMA/16",
696 "UDMA/25",
697 "UDMA/33",
698 "UDMA/44",
699 "UDMA/66",
700 "UDMA/100",
701 "UDMA/133",
702 "UDMA7",
703 "MWDMA0",
704 "MWDMA1",
705 "MWDMA2",
706 "PIO0",
707 "PIO1",
708 "PIO2",
709 "PIO3",
710 "PIO4",
711};
712
713/**
714 * ata_udma_string - convert UDMA bit offset to string
715 * @mask: mask of bits supported; only highest bit counts.
716 *
717 * Determine string which represents the highest speed
718 * (highest bit in @udma_mask).
719 *
720 * LOCKING:
721 * None.
722 *
723 * RETURNS:
724 * Constant C string representing highest speed listed in
725 * @udma_mask, or the constant C string "<n/a>".
726 */
727
728static const char *ata_mode_string(unsigned int mask)
729{
730 int i;
731
732 for (i = 7; i >= 0; i--)
733 if (mask & (1 << i))
734 goto out;
735 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
736 if (mask & (1 << i))
737 goto out;
738 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
739 if (mask & (1 << i))
740 goto out;
741
742 return "<n/a>";
743
744out:
745 return xfer_mode_str[i];
746}
747
748/**
749 * ata_pio_devchk - PATA device presence detection
750 * @ap: ATA channel to examine
751 * @device: Device to examine (starting at zero)
752 *
753 * This technique was originally described in
754 * Hale Landis's ATADRVR (www.ata-atapi.com), and
755 * later found its way into the ATA/ATAPI spec.
756 *
757 * Write a pattern to the ATA shadow registers,
758 * and if a device is present, it will respond by
759 * correctly storing and echoing back the
760 * ATA shadow register contents.
761 *
762 * LOCKING:
763 * caller.
764 */
765
766static unsigned int ata_pio_devchk(struct ata_port *ap,
767 unsigned int device)
768{
769 struct ata_ioports *ioaddr = &ap->ioaddr;
770 u8 nsect, lbal;
771
772 ap->ops->dev_select(ap, device);
773
774 outb(0x55, ioaddr->nsect_addr);
775 outb(0xaa, ioaddr->lbal_addr);
776
777 outb(0xaa, ioaddr->nsect_addr);
778 outb(0x55, ioaddr->lbal_addr);
779
780 outb(0x55, ioaddr->nsect_addr);
781 outb(0xaa, ioaddr->lbal_addr);
782
783 nsect = inb(ioaddr->nsect_addr);
784 lbal = inb(ioaddr->lbal_addr);
785
786 if ((nsect == 0x55) && (lbal == 0xaa))
787 return 1; /* we found a device */
788
789 return 0; /* nothing found */
790}
791
792/**
793 * ata_mmio_devchk - PATA device presence detection
794 * @ap: ATA channel to examine
795 * @device: Device to examine (starting at zero)
796 *
797 * This technique was originally described in
798 * Hale Landis's ATADRVR (www.ata-atapi.com), and
799 * later found its way into the ATA/ATAPI spec.
800 *
801 * Write a pattern to the ATA shadow registers,
802 * and if a device is present, it will respond by
803 * correctly storing and echoing back the
804 * ATA shadow register contents.
805 *
806 * LOCKING:
807 * caller.
808 */
809
810static unsigned int ata_mmio_devchk(struct ata_port *ap,
811 unsigned int device)
812{
813 struct ata_ioports *ioaddr = &ap->ioaddr;
814 u8 nsect, lbal;
815
816 ap->ops->dev_select(ap, device);
817
818 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
819 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
820
821 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
822 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
823
824 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
825 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
826
827 nsect = readb((void __iomem *) ioaddr->nsect_addr);
828 lbal = readb((void __iomem *) ioaddr->lbal_addr);
829
830 if ((nsect == 0x55) && (lbal == 0xaa))
831 return 1; /* we found a device */
832
833 return 0; /* nothing found */
834}
835
836/**
837 * ata_devchk - PATA device presence detection
838 * @ap: ATA channel to examine
839 * @device: Device to examine (starting at zero)
840 *
841 * Dispatch ATA device presence detection, depending
842 * on whether we are using PIO or MMIO to talk to the
843 * ATA shadow registers.
844 *
845 * LOCKING:
846 * caller.
847 */
848
849static unsigned int ata_devchk(struct ata_port *ap,
850 unsigned int device)
851{
852 if (ap->flags & ATA_FLAG_MMIO)
853 return ata_mmio_devchk(ap, device);
854 return ata_pio_devchk(ap, device);
855}
856
857/**
858 * ata_dev_classify - determine device type based on ATA-spec signature
859 * @tf: ATA taskfile register set for device to be identified
860 *
861 * Determine from taskfile register contents whether a device is
862 * ATA or ATAPI, as per "Signature and persistence" section
863 * of ATA/PI spec (volume 1, sect 5.14).
864 *
865 * LOCKING:
866 * None.
867 *
868 * RETURNS:
869 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
870 * the event of failure.
871 */
872
873unsigned int ata_dev_classify(struct ata_taskfile *tf)
874{
875 /* Apple's open source Darwin code hints that some devices only
876 * put a proper signature into the LBA mid/high registers,
877 * So, we only check those. It's sufficient for uniqueness.
878 */
879
880 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
881 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
882 DPRINTK("found ATA device by sig\n");
883 return ATA_DEV_ATA;
884 }
885
886 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
887 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
888 DPRINTK("found ATAPI device by sig\n");
889 return ATA_DEV_ATAPI;
890 }
891
892 DPRINTK("unknown device\n");
893 return ATA_DEV_UNKNOWN;
894}
895
896/**
897 * ata_dev_try_classify - Parse returned ATA device signature
898 * @ap: ATA channel to examine
899 * @device: Device to examine (starting at zero)
900 *
901 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
902 * an ATA/ATAPI-defined set of values is placed in the ATA
903 * shadow registers, indicating the results of device detection
904 * and diagnostics.
905 *
906 * Select the ATA device, and read the values from the ATA shadow
907 * registers. Then parse according to the Error register value,
908 * and the spec-defined values examined by ata_dev_classify().
909 *
910 * LOCKING:
911 * caller.
912 */
913
914static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
915{
916 struct ata_device *dev = &ap->device[device];
917 struct ata_taskfile tf;
918 unsigned int class;
919 u8 err;
920
921 ap->ops->dev_select(ap, device);
922
923 memset(&tf, 0, sizeof(tf));
924
925 err = ata_chk_err(ap);
926 ap->ops->tf_read(ap, &tf);
927
928 dev->class = ATA_DEV_NONE;
929
930 /* see if device passed diags */
931 if (err == 1)
932 /* do nothing */ ;
933 else if ((device == 0) && (err == 0x81))
934 /* do nothing */ ;
935 else
936 return err;
937
938 /* determine if device if ATA or ATAPI */
939 class = ata_dev_classify(&tf);
940 if (class == ATA_DEV_UNKNOWN)
941 return err;
942 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
943 return err;
944
945 dev->class = class;
946
947 return err;
948}
949
950/**
951 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
952 * @id: IDENTIFY DEVICE results we will examine
953 * @s: string into which data is output
954 * @ofs: offset into identify device page
955 * @len: length of string to return. must be an even number.
956 *
957 * The strings in the IDENTIFY DEVICE page are broken up into
958 * 16-bit chunks. Run through the string, and output each
959 * 8-bit chunk linearly, regardless of platform.
960 *
961 * LOCKING:
962 * caller.
963 */
964
965void ata_dev_id_string(u16 *id, unsigned char *s,
966 unsigned int ofs, unsigned int len)
967{
968 unsigned int c;
969
970 while (len > 0) {
971 c = id[ofs] >> 8;
972 *s = c;
973 s++;
974
975 c = id[ofs] & 0xff;
976 *s = c;
977 s++;
978
979 ofs++;
980 len -= 2;
981 }
982}
983
0baab86b
EF		 984
985/**
986 * ata_noop_dev_select - Select device 0/1 on ATA bus
987 * @ap: ATA channel to manipulate
988 * @device: ATA device (numbered from zero) to select
989 *
990 * This function performs no actual function.
991 *
992 * May be used as the dev_select() entry in ata_port_operations.
993 *
994 * LOCKING:
995 * caller.
996 */
1da177e4
LT		 997void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
998{
999}
1000
0baab86b 1001
1da177e4
LT		 1002/**
1003 * ata_std_dev_select - Select device 0/1 on ATA bus
1004 * @ap: ATA channel to manipulate
1005 * @device: ATA device (numbered from zero) to select
1006 *
1007 * Use the method defined in the ATA specification to
1008 * make either device 0, or device 1, active on the
0baab86b
EF		 1009 * ATA channel. Works with both PIO and MMIO.
1010 *
1011 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 1012 *
1013 * LOCKING:
1014 * caller.
1015 */
1016
1017void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1018{
1019 u8 tmp;
1020
1021 if (device == 0)
1022 tmp = ATA_DEVICE_OBS;
1023 else
1024 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1025
1026 if (ap->flags & ATA_FLAG_MMIO) {
1027 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
1028 } else {
1029 outb(tmp, ap->ioaddr.device_addr);
1030 }
1031 ata_pause(ap); /* needed; also flushes, for mmio */
1032}
1033
1034/**
1035 * ata_dev_select - Select device 0/1 on ATA bus
1036 * @ap: ATA channel to manipulate
1037 * @device: ATA device (numbered from zero) to select
1038 * @wait: non-zero to wait for Status register BSY bit to clear
1039 * @can_sleep: non-zero if context allows sleeping
1040 *
1041 * Use the method defined in the ATA specification to
1042 * make either device 0, or device 1, active on the
1043 * ATA channel.
1044 *
1045 * This is a high-level version of ata_std_dev_select(),
1046 * which additionally provides the services of inserting
1047 * the proper pauses and status polling, where needed.
1048 *
1049 * LOCKING:
1050 * caller.
1051 */
1052
1053void ata_dev_select(struct ata_port *ap, unsigned int device,
1054 unsigned int wait, unsigned int can_sleep)
1055{
1056 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1057 ap->id, device, wait);
1058
1059 if (wait)
1060 ata_wait_idle(ap);
1061
1062 ap->ops->dev_select(ap, device);
1063
1064 if (wait) {
1065 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1066 msleep(150);
1067 ata_wait_idle(ap);
1068 }
1069}
1070
1071/**
1072 * ata_dump_id - IDENTIFY DEVICE info debugging output
1073 * @dev: Device whose IDENTIFY DEVICE page we will dump
1074 *
1075 * Dump selected 16-bit words from a detected device's
1076 * IDENTIFY PAGE page.
1077 *
1078 * LOCKING:
1079 * caller.
1080 */
1081
1082static inline void ata_dump_id(struct ata_device *dev)
1083{
1084 DPRINTK("49==0x%04x "
1085 "53==0x%04x "
1086 "63==0x%04x "
1087 "64==0x%04x "
1088 "75==0x%04x \n",
1089 dev->id[49],
1090 dev->id[53],
1091 dev->id[63],
1092 dev->id[64],
1093 dev->id[75]);
1094 DPRINTK("80==0x%04x "
1095 "81==0x%04x "
1096 "82==0x%04x "
1097 "83==0x%04x "
1098 "84==0x%04x \n",
1099 dev->id[80],
1100 dev->id[81],
1101 dev->id[82],
1102 dev->id[83],
1103 dev->id[84]);
1104 DPRINTK("88==0x%04x "
1105 "93==0x%04x\n",
1106 dev->id[88],
1107 dev->id[93]);
1108}
1109
1110/**
1111 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1112 * @ap: port on which device we wish to probe resides
1113 * @device: device bus address, starting at zero
1114 *
1115 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1116 * command, and read back the 512-byte device information page.
1117 * The device information page is fed to us via the standard
1118 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1119 * using standard PIO-IN paths)
1120 *
1121 * After reading the device information page, we use several
1122 * bits of information from it to initialize data structures
1123 * that will be used during the lifetime of the ata_device.
1124 * Other data from the info page is used to disqualify certain
1125 * older ATA devices we do not wish to support.
1126 *
1127 * LOCKING:
1128 * Inherited from caller. Some functions called by this function
1129 * obtain the host_set lock.
1130 */
1131
1132static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1133{
1134 struct ata_device *dev = &ap->device[device];
8bf62ece 1135 unsigned int major_version;
1da177e4
LT		 1136 u16 tmp;
1137 unsigned long xfer_modes;
1138 u8 status;
1139 unsigned int using_edd;
1140 DECLARE_COMPLETION(wait);
1141 struct ata_queued_cmd *qc;
1142 unsigned long flags;
1143 int rc;
1144
1145 if (!ata_dev_present(dev)) {
1146 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1147 ap->id, device);
1148 return;
1149 }
1150
1151 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1152 using_edd = 0;
1153 else
1154 using_edd = 1;
1155
1156 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1157
1158 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1159 dev->class == ATA_DEV_NONE);
1160
1161 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1162
1163 qc = ata_qc_new_init(ap, dev);
1164 BUG_ON(qc == NULL);
1165
1166 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1167 qc->dma_dir = DMA_FROM_DEVICE;
1168 qc->tf.protocol = ATA_PROT_PIO;
1169 qc->nsect = 1;
1170
1171retry:
1172 if (dev->class == ATA_DEV_ATA) {
1173 qc->tf.command = ATA_CMD_ID_ATA;
1174 DPRINTK("do ATA identify\n");
1175 } else {
1176 qc->tf.command = ATA_CMD_ID_ATAPI;
1177 DPRINTK("do ATAPI identify\n");
1178 }
1179
1180 qc->waiting = &wait;
1181 qc->complete_fn = ata_qc_complete_noop;
1182
1183 spin_lock_irqsave(&ap->host_set->lock, flags);
1184 rc = ata_qc_issue(qc);
1185 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1186
1187 if (rc)
1188 goto err_out;
1189 else
1190 wait_for_completion(&wait);
1191
1192 status = ata_chk_status(ap);
1193 if (status & ATA_ERR) {
1194 /*
1195 * arg! EDD works for all test cases, but seems to return
1196 * the ATA signature for some ATAPI devices. Until the
1197 * reason for this is found and fixed, we fix up the mess
1198 * here. If IDENTIFY DEVICE returns command aborted
1199 * (as ATAPI devices do), then we issue an
1200 * IDENTIFY PACKET DEVICE.
1201 *
1202 * ATA software reset (SRST, the default) does not appear
1203 * to have this problem.
1204 */
1205 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1206 u8 err = ata_chk_err(ap);
1207 if (err & ATA_ABORTED) {
1208 dev->class = ATA_DEV_ATAPI;
1209 qc->cursg = 0;
1210 qc->cursg_ofs = 0;
1211 qc->cursect = 0;
1212 qc->nsect = 1;
1213 goto retry;
1214 }
1215 }
1216 goto err_out;
1217 }
1218
1219 swap_buf_le16(dev->id, ATA_ID_WORDS);
1220
1221 /* print device capabilities */
1222 printk(KERN_DEBUG "ata%u: dev %u cfg "
1223 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1224 ap->id, device, dev->id[49],
1225 dev->id[82], dev->id[83], dev->id[84],
1226 dev->id[85], dev->id[86], dev->id[87],
1227 dev->id[88]);
1228
1229 /*
1230 * common ATA, ATAPI feature tests
1231 */
1232
8bf62ece
AL		 1233 /* we require DMA support (bits 8 of word 49) */
1234 if (!ata_id_has_dma(dev->id)) {
1235 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1da177e4
LT		 1236 goto err_out_nosup;
1237 }
1238
1239 /* quick-n-dirty find max transfer mode; for printk only */
1240 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1241 if (!xfer_modes)
1242 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1243 if (!xfer_modes) {
1244 xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3);
1245 xfer_modes |= (0x7 << ATA_SHIFT_PIO);
1246 }
1247
1248 ata_dump_id(dev);
1249
1250 /* ATA-specific feature tests */
1251 if (dev->class == ATA_DEV_ATA) {
1252 if (!ata_id_is_ata(dev->id)) /* sanity check */
1253 goto err_out_nosup;
1254
8bf62ece 1255 /* get major version */
1da177e4 1256 tmp = dev->id[ATA_ID_MAJOR_VER];
8bf62ece
AL		 1257 for (major_version = 14; major_version >= 1; major_version--)
1258 if (tmp & (1 << major_version))
1da177e4
LT		 1259 break;
1260
8bf62ece
AL		 1261 /*
1262 * The exact sequence expected by certain pre-ATA4 drives is:
1263 * SRST RESET
1264 * IDENTIFY
1265 * INITIALIZE DEVICE PARAMETERS
1266 * anything else..
1267 * Some drives were very specific about that exact sequence.
1268 */
1269 if (major_version < 4 || (!ata_id_has_lba(dev->id)))
1270 ata_dev_init_params(ap, dev);
1271
1272 if (ata_id_has_lba(dev->id)) {
1273 dev->flags |= ATA_DFLAG_LBA;
1274
1275 if (ata_id_has_lba48(dev->id)) {
1276 dev->flags |= ATA_DFLAG_LBA48;
1277 dev->n_sectors = ata_id_u64(dev->id, 100);
1278 } else {
1279 dev->n_sectors = ata_id_u32(dev->id, 60);
1280 }
1281
1282 /* print device info to dmesg */
1283 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1284 ap->id, device,
1285 major_version,
1286 ata_mode_string(xfer_modes),
1287 (unsigned long long)dev->n_sectors,
1288 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1289 } else {
1290 /* CHS */
1291
1292 /* Default translation */
1293 dev->cylinders = dev->id[1];
1294 dev->heads = dev->id[3];
1295 dev->sectors = dev->id[6];
1296 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1297
1298 if (ata_id_current_chs_valid(dev->id)) {
1299 /* Current CHS translation is valid. */
1300 dev->cylinders = dev->id[54];
1301 dev->heads = dev->id[55];
1302 dev->sectors = dev->id[56];
1303
1304 dev->n_sectors = ata_id_u32(dev->id, 57);
1305 }
1306
1307 /* print device info to dmesg */
1308 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1309 ap->id, device,
1310 major_version,
1311 ata_mode_string(xfer_modes),
1312 (unsigned long long)dev->n_sectors,
1313 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1da177e4 1314
1da177e4
LT		 1315 }
1316
1317 ap->host->max_cmd_len = 16;
1da177e4
LT		 1318 }
1319
1320 /* ATAPI-specific feature tests */
1321 else {
1322 if (ata_id_is_ata(dev->id)) /* sanity check */
1323 goto err_out_nosup;
1324
1325 rc = atapi_cdb_len(dev->id);
1326 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1327 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1328 goto err_out_nosup;
1329 }
1330 ap->cdb_len = (unsigned int) rc;
1331 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1332
312f7da2
AL		 1333 if (ata_id_cdb_intr(dev->id))
1334 dev->flags |= ATA_DFLAG_CDB_INTR;
1335
1da177e4
LT		 1336 /* print device info to dmesg */
1337 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1338 ap->id, device,
1339 ata_mode_string(xfer_modes));
1340 }
1341
1342 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1343 return;
1344
1345err_out_nosup:
1346 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1347 ap->id, device);
1348err_out:
1349 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1350 DPRINTK("EXIT, err\n");
1351}
1352
6f2f3812
BC		 1353
1354static inline u8 ata_dev_knobble(struct ata_port *ap)
1355{
1356 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1357}
1358
1359/**
1360 * ata_dev_config - Run device specific handlers and check for
1361 * SATA->PATA bridges
8a60a071 1362 * @ap: Bus
6f2f3812
BC		 1363 * @i: Device
1364 *
1365 * LOCKING:
1366 */
8a60a071 1367
6f2f3812
BC		 1368void ata_dev_config(struct ata_port *ap, unsigned int i)
1369{
1370 /* limit bridge transfers to udma5, 200 sectors */
1371 if (ata_dev_knobble(ap)) {
1372 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1373 ap->id, ap->device->devno);
1374 ap->udma_mask &= ATA_UDMA5;
1375 ap->host->max_sectors = ATA_MAX_SECTORS;
1376 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1377 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1378 }
1379
1380 if (ap->ops->dev_config)
1381 ap->ops->dev_config(ap, &ap->device[i]);
1382}
1383
1da177e4
LT		 1384/**
1385 * ata_bus_probe - Reset and probe ATA bus
1386 * @ap: Bus to probe
1387 *
0cba632b
JG		 1388 * Master ATA bus probing function. Initiates a hardware-dependent
1389 * bus reset, then attempts to identify any devices found on
1390 * the bus.
1391 *
1da177e4 1392 * LOCKING:
0cba632b 1393 * PCI/etc. bus probe sem.
1da177e4
LT		 1394 *
1395 * RETURNS:
1396 * Zero on success, non-zero on error.
1397 */
1398
1399static int ata_bus_probe(struct ata_port *ap)
1400{
1401 unsigned int i, found = 0;
1402
1403 ap->ops->phy_reset(ap);
1404 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1405 goto err_out;
1406
1407 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1408 ata_dev_identify(ap, i);
1409 if (ata_dev_present(&ap->device[i])) {
1410 found = 1;
6f2f3812 1411 ata_dev_config(ap,i);
1da177e4
LT		 1412 }
1413 }
1414
1415 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1416 goto err_out_disable;
1417
1418 ata_set_mode(ap);
1419 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1420 goto err_out_disable;
1421
1422 return 0;
1423
1424err_out_disable:
1425 ap->ops->port_disable(ap);
1426err_out:
1427 return -1;
1428}
1429
1430/**
0cba632b
JG		 1431 * ata_port_probe - Mark port as enabled
1432 * @ap: Port for which we indicate enablement
1da177e4 1433 *
0cba632b
JG		 1434 * Modify @ap data structure such that the system
1435 * thinks that the entire port is enabled.
1436 *
1437 * LOCKING: host_set lock, or some other form of
1438 * serialization.
1da177e4
LT		 1439 */
1440
1441void ata_port_probe(struct ata_port *ap)
1442{
1443 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1444}
1445
1446/**
780a87f7
JG		 1447 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1448 * @ap: SATA port associated with target SATA PHY.
1da177e4 1449 *
780a87f7
JG		 1450 * This function issues commands to standard SATA Sxxx
1451 * PHY registers, to wake up the phy (and device), and
1452 * clear any reset condition.
1da177e4
LT		 1453 *
1454 * LOCKING:
0cba632b 1455 * PCI/etc. bus probe sem.
1da177e4
LT		 1456 *
1457 */
1458void __sata_phy_reset(struct ata_port *ap)
1459{
1460 u32 sstatus;
1461 unsigned long timeout = jiffies + (HZ * 5);
1462
1463 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1464 /* issue phy wake/reset */
1465 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1466 /* Couldn't find anything in SATA I/II specs, but
1467 * AHCI-1.1 10.4.2 says at least 1 ms. */
1468 mdelay(1);
1da177e4 1469 }
cdcca89e 1470 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1471
1472 /* wait for phy to become ready, if necessary */
1473 do {
1474 msleep(200);
1475 sstatus = scr_read(ap, SCR_STATUS);
1476 if ((sstatus & 0xf) != 1)
1477 break;
1478 } while (time_before(jiffies, timeout));
1479
1480 /* TODO: phy layer with polling, timeouts, etc. */
1481 if (sata_dev_present(ap))
1482 ata_port_probe(ap);
1483 else {
1484 sstatus = scr_read(ap, SCR_STATUS);
1485 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1486 ap->id, sstatus);
1487 ata_port_disable(ap);
1488 }
1489
1490 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1491 return;
1492
1493 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1494 ata_port_disable(ap);
1495 return;
1496 }
1497
1498 ap->cbl = ATA_CBL_SATA;
1499}
1500
1501/**
780a87f7
JG		 1502 * sata_phy_reset - Reset SATA bus.
1503 * @ap: SATA port associated with target SATA PHY.
1da177e4 1504 *
780a87f7
JG		 1505 * This function resets the SATA bus, and then probes
1506 * the bus for devices.
1da177e4
LT		 1507 *
1508 * LOCKING:
0cba632b 1509 * PCI/etc. bus probe sem.
1da177e4
LT		 1510 *
1511 */
1512void sata_phy_reset(struct ata_port *ap)
1513{
1514 __sata_phy_reset(ap);
1515 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1516 return;
1517 ata_bus_reset(ap);
1518}
1519
1520/**
780a87f7
JG		 1521 * ata_port_disable - Disable port.
1522 * @ap: Port to be disabled.
1da177e4 1523 *
780a87f7
JG		 1524 * Modify @ap data structure such that the system
1525 * thinks that the entire port is disabled, and should
1526 * never attempt to probe or communicate with devices
1527 * on this port.
1528 *
1529 * LOCKING: host_set lock, or some other form of
1530 * serialization.
1da177e4
LT		 1531 */
1532
1533void ata_port_disable(struct ata_port *ap)
1534{
1535 ap->device[0].class = ATA_DEV_NONE;
1536 ap->device[1].class = ATA_DEV_NONE;
1537 ap->flags |= ATA_FLAG_PORT_DISABLED;
1538}
1539
1540static struct {
1541 unsigned int shift;
1542 u8 base;
1543} xfer_mode_classes[] = {
1544 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1545 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1546 { ATA_SHIFT_PIO, XFER_PIO_0 },
1547};
1548
1549static inline u8 base_from_shift(unsigned int shift)
1550{
1551 int i;
1552
1553 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1554 if (xfer_mode_classes[i].shift == shift)
1555 return xfer_mode_classes[i].base;
1556
1557 return 0xff;
1558}
1559
1560static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1561{
1562 int ofs, idx;
1563 u8 base;
1564
1565 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1566 return;
1567
1568 if (dev->xfer_shift == ATA_SHIFT_PIO)
1569 dev->flags |= ATA_DFLAG_PIO;
1570
1571 ata_dev_set_xfermode(ap, dev);
1572
1573 base = base_from_shift(dev->xfer_shift);
1574 ofs = dev->xfer_mode - base;
1575 idx = ofs + dev->xfer_shift;
1576 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1577
1578 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1579 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1580
1581 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1582 ap->id, dev->devno, xfer_mode_str[idx]);
1583}
1584
1585static int ata_host_set_pio(struct ata_port *ap)
1586{
1587 unsigned int mask;
1588 int x, i;
1589 u8 base, xfer_mode;
1590
1591 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1592 x = fgb(mask);
1593 if (x < 0) {
1594 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1595 return -1;
1596 }
1597
1598 base = base_from_shift(ATA_SHIFT_PIO);
1599 xfer_mode = base + x;
1600
1601 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1602 (int)base, (int)xfer_mode, mask, x);
1603
1604 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1605 struct ata_device *dev = &ap->device[i];
1606 if (ata_dev_present(dev)) {
1607 dev->pio_mode = xfer_mode;
1608 dev->xfer_mode = xfer_mode;
1609 dev->xfer_shift = ATA_SHIFT_PIO;
1610 if (ap->ops->set_piomode)
1611 ap->ops->set_piomode(ap, dev);
1612 }
1613 }
1614
1615 return 0;
1616}
1617
1618static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1619 unsigned int xfer_shift)
1620{
1621 int i;
1622
1623 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1624 struct ata_device *dev = &ap->device[i];
1625 if (ata_dev_present(dev)) {
1626 dev->dma_mode = xfer_mode;
1627 dev->xfer_mode = xfer_mode;
1628 dev->xfer_shift = xfer_shift;
1629 if (ap->ops->set_dmamode)
1630 ap->ops->set_dmamode(ap, dev);
1631 }
1632 }
1633}
1634
1635/**
1636 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1637 * @ap: port on which timings will be programmed
1638 *
780a87f7
JG		 1639 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1640 *
1da177e4 1641 * LOCKING:
0cba632b 1642 * PCI/etc. bus probe sem.
1da177e4
LT		 1643 *
1644 */
1645static void ata_set_mode(struct ata_port *ap)
1646{
1647 unsigned int i, xfer_shift;
1648 u8 xfer_mode;
1649 int rc;
1650
1651 /* step 1: always set host PIO timings */
1652 rc = ata_host_set_pio(ap);
1653 if (rc)
1654 goto err_out;
1655
1656 /* step 2: choose the best data xfer mode */
1657 xfer_mode = xfer_shift = 0;
1658 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1659 if (rc)
1660 goto err_out;
1661
1662 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1663 if (xfer_shift != ATA_SHIFT_PIO)
1664 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1665
1666 /* step 4: update devices' xfer mode */
1667 ata_dev_set_mode(ap, &ap->device[0]);
1668 ata_dev_set_mode(ap, &ap->device[1]);
1669
1670 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1671 return;
1672
1673 if (ap->ops->post_set_mode)
1674 ap->ops->post_set_mode(ap);
1675
1676 for (i = 0; i < 2; i++) {
1677 struct ata_device *dev = &ap->device[i];
1678 ata_dev_set_protocol(dev);
1679 }
1680
1681 return;
1682
1683err_out:
1684 ata_port_disable(ap);
1685}
1686
1687/**
1688 * ata_busy_sleep - sleep until BSY clears, or timeout
1689 * @ap: port containing status register to be polled
1690 * @tmout_pat: impatience timeout
1691 * @tmout: overall timeout
1692 *
780a87f7
JG		 1693 * Sleep until ATA Status register bit BSY clears,
1694 * or a timeout occurs.
1695 *
1696 * LOCKING: None.
1da177e4
LT		 1697 *
1698 */
1699
1700static unsigned int ata_busy_sleep (struct ata_port *ap,
1701 unsigned long tmout_pat,
1702 unsigned long tmout)
1703{
1704 unsigned long timer_start, timeout;
1705 u8 status;
1706
1707 status = ata_busy_wait(ap, ATA_BUSY, 300);
1708 timer_start = jiffies;
1709 timeout = timer_start + tmout_pat;
1710 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1711 msleep(50);
1712 status = ata_busy_wait(ap, ATA_BUSY, 3);
1713 }
1714
1715 if (status & ATA_BUSY)
1716 printk(KERN_WARNING "ata%u is slow to respond, "
1717 "please be patient\n", ap->id);
1718
1719 timeout = timer_start + tmout;
1720 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1721 msleep(50);
1722 status = ata_chk_status(ap);
1723 }
1724
1725 if (status & ATA_BUSY) {
1726 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1727 ap->id, tmout / HZ);
1728 return 1;
1729 }
1730
1731 return 0;
1732}
1733
1734static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1735{
1736 struct ata_ioports *ioaddr = &ap->ioaddr;
1737 unsigned int dev0 = devmask & (1 << 0);
1738 unsigned int dev1 = devmask & (1 << 1);
1739 unsigned long timeout;
1740
1741 /* if device 0 was found in ata_devchk, wait for its
1742 * BSY bit to clear
1743 */
1744 if (dev0)
1745 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1746
1747 /* if device 1 was found in ata_devchk, wait for
1748 * register access, then wait for BSY to clear
1749 */
1750 timeout = jiffies + ATA_TMOUT_BOOT;
1751 while (dev1) {
1752 u8 nsect, lbal;
1753
1754 ap->ops->dev_select(ap, 1);
1755 if (ap->flags & ATA_FLAG_MMIO) {
1756 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1757 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1758 } else {
1759 nsect = inb(ioaddr->nsect_addr);
1760 lbal = inb(ioaddr->lbal_addr);
1761 }
1762 if ((nsect == 1) && (lbal == 1))
1763 break;
1764 if (time_after(jiffies, timeout)) {
1765 dev1 = 0;
1766 break;
1767 }
1768 msleep(50); /* give drive a breather */
1769 }
1770 if (dev1)
1771 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1772
1773 /* is all this really necessary? */
1774 ap->ops->dev_select(ap, 0);
1775 if (dev1)
1776 ap->ops->dev_select(ap, 1);
1777 if (dev0)
1778 ap->ops->dev_select(ap, 0);
1779}
1780
1781/**
0cba632b
JG		 1782 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1783 * @ap: Port to reset and probe
1784 *
1785 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1786 * probe the bus. Not often used these days.
1da177e4
LT		 1787 *
1788 * LOCKING:
0cba632b 1789 * PCI/etc. bus probe sem.
1da177e4
LT		 1790 *
1791 */
1792
1793static unsigned int ata_bus_edd(struct ata_port *ap)
1794{
1795 struct ata_taskfile tf;
1796
1797 /* set up execute-device-diag (bus reset) taskfile */
1798 /* also, take interrupts to a known state (disabled) */
1799 DPRINTK("execute-device-diag\n");
1800 ata_tf_init(ap, &tf, 0);
1801 tf.ctl |= ATA_NIEN;
1802 tf.command = ATA_CMD_EDD;
1803 tf.protocol = ATA_PROT_NODATA;
1804
1805 /* do bus reset */
1806 ata_tf_to_host(ap, &tf);
1807
1808 /* spec says at least 2ms. but who knows with those
1809 * crazy ATAPI devices...
1810 */
1811 msleep(150);
1812
1813 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1814}
1815
1816static unsigned int ata_bus_softreset(struct ata_port *ap,
1817 unsigned int devmask)
1818{
1819 struct ata_ioports *ioaddr = &ap->ioaddr;
1820
1821 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1822
1823 /* software reset. causes dev0 to be selected */
1824 if (ap->flags & ATA_FLAG_MMIO) {
1825 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1826 udelay(20); /* FIXME: flush */
1827 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1828 udelay(20); /* FIXME: flush */
1829 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1830 } else {
1831 outb(ap->ctl, ioaddr->ctl_addr);
1832 udelay(10);
1833 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1834 udelay(10);
1835 outb(ap->ctl, ioaddr->ctl_addr);
1836 }
1837
1838 /* spec mandates ">= 2ms" before checking status.
1839 * We wait 150ms, because that was the magic delay used for
1840 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1841 * between when the ATA command register is written, and then
1842 * status is checked. Because waiting for "a while" before
1843 * checking status is fine, post SRST, we perform this magic
1844 * delay here as well.
1845 */
1846 msleep(150);
1847
1848 ata_bus_post_reset(ap, devmask);
1849
1850 return 0;
1851}
1852
1853/**
1854 * ata_bus_reset - reset host port and associated ATA channel
1855 * @ap: port to reset
1856 *
1857 * This is typically the first time we actually start issuing
1858 * commands to the ATA channel. We wait for BSY to clear, then
1859 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1860 * result. Determine what devices, if any, are on the channel
1861 * by looking at the device 0/1 error register. Look at the signature
1862 * stored in each device's taskfile registers, to determine if
1863 * the device is ATA or ATAPI.
1864 *
1865 * LOCKING:
0cba632b
JG		 1866 * PCI/etc. bus probe sem.
1867 * Obtains host_set lock.
1da177e4
LT		 1868 *
1869 * SIDE EFFECTS:
1870 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1871 */
1872
1873void ata_bus_reset(struct ata_port *ap)
1874{
1875 struct ata_ioports *ioaddr = &ap->ioaddr;
1876 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1877 u8 err;
1878 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1879
1880 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1881
1882 /* determine if device 0/1 are present */
1883 if (ap->flags & ATA_FLAG_SATA_RESET)
1884 dev0 = 1;
1885 else {
1886 dev0 = ata_devchk(ap, 0);
1887 if (slave_possible)
1888 dev1 = ata_devchk(ap, 1);
1889 }
1890
1891 if (dev0)
1892 devmask |= (1 << 0);
1893 if (dev1)
1894 devmask |= (1 << 1);
1895
1896 /* select device 0 again */
1897 ap->ops->dev_select(ap, 0);
1898
1899 /* issue bus reset */
1900 if (ap->flags & ATA_FLAG_SRST)
1901 rc = ata_bus_softreset(ap, devmask);
1902 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1903 /* set up device control */
1904 if (ap->flags & ATA_FLAG_MMIO)
1905 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1906 else
1907 outb(ap->ctl, ioaddr->ctl_addr);
1908 rc = ata_bus_edd(ap);
1909 }
1910
1911 if (rc)
1912 goto err_out;
1913
1914 /*
1915 * determine by signature whether we have ATA or ATAPI devices
1916 */
1917 err = ata_dev_try_classify(ap, 0);
1918 if ((slave_possible) && (err != 0x81))
1919 ata_dev_try_classify(ap, 1);
1920
1921 /* re-enable interrupts */
1922 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1923 ata_irq_on(ap);
1924
1925 /* is double-select really necessary? */
1926 if (ap->device[1].class != ATA_DEV_NONE)
1927 ap->ops->dev_select(ap, 1);
1928 if (ap->device[0].class != ATA_DEV_NONE)
1929 ap->ops->dev_select(ap, 0);
1930
1931 /* if no devices were detected, disable this port */
1932 if ((ap->device[0].class == ATA_DEV_NONE) &&
1933 (ap->device[1].class == ATA_DEV_NONE))
1934 goto err_out;
1935
1936 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1937 /* set up device control for ATA_FLAG_SATA_RESET */
1938 if (ap->flags & ATA_FLAG_MMIO)
1939 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1940 else
1941 outb(ap->ctl, ioaddr->ctl_addr);
1942 }
1943
1944 DPRINTK("EXIT\n");
1945 return;
1946
1947err_out:
1948 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1949 ap->ops->port_disable(ap);
1950
1951 DPRINTK("EXIT\n");
1952}
1953
1954static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev)
1955{
1956 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
1957 ap->id, dev->devno);
1958}
1959
1960static const char * ata_dma_blacklist [] = {
1961 "WDC AC11000H",
1962 "WDC AC22100H",
1963 "WDC AC32500H",
1964 "WDC AC33100H",
1965 "WDC AC31600H",
1966 "WDC AC32100H",
1967 "WDC AC23200L",
1968 "Compaq CRD-8241B",
1969 "CRD-8400B",
1970 "CRD-8480B",
1971 "CRD-8482B",
1972 "CRD-84",
1973 "SanDisk SDP3B",
1974 "SanDisk SDP3B-64",
1975 "SANYO CD-ROM CRD",
1976 "HITACHI CDR-8",
1977 "HITACHI CDR-8335",
1978 "HITACHI CDR-8435",
1979 "Toshiba CD-ROM XM-6202B",
e922256a 1980 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 1981 "CD-532E-A",
1982 "E-IDE CD-ROM CR-840",
1983 "CD-ROM Drive/F5A",
1984 "WPI CDD-820",
1985 "SAMSUNG CD-ROM SC-148C",
1986 "SAMSUNG CD-ROM SC",
1987 "SanDisk SDP3B-64",
1da177e4
LT		 1988 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
1989 "_NEC DV5800A",
1990};
1991
1992static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev)
1993{
1994 unsigned char model_num[40];
1995 char *s;
1996 unsigned int len;
1997 int i;
1998
1999 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2000 sizeof(model_num));
2001 s = &model_num[0];
2002 len = strnlen(s, sizeof(model_num));
2003
2004 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2005 while ((len > 0) && (s[len - 1] == ' ')) {
2006 len--;
2007 s[len] = 0;
2008 }
2009
2010 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2011 if (!strncmp(ata_dma_blacklist[i], s, len))
2012 return 1;
2013
2014 return 0;
2015}
2016
2017static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
2018{
2019 struct ata_device *master, *slave;
2020 unsigned int mask;
2021
2022 master = &ap->device[0];
2023 slave = &ap->device[1];
2024
2025 assert (ata_dev_present(master) || ata_dev_present(slave));
2026
2027 if (shift == ATA_SHIFT_UDMA) {
2028 mask = ap->udma_mask;
2029 if (ata_dev_present(master)) {
2030 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2031 if (ata_dma_blacklisted(ap, master)) {
2032 mask = 0;
2033 ata_pr_blacklisted(ap, master);
2034 }
2035 }
2036 if (ata_dev_present(slave)) {
2037 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2038 if (ata_dma_blacklisted(ap, slave)) {
2039 mask = 0;
2040 ata_pr_blacklisted(ap, slave);
2041 }
2042 }
2043 }
2044 else if (shift == ATA_SHIFT_MWDMA) {
2045 mask = ap->mwdma_mask;
2046 if (ata_dev_present(master)) {
2047 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2048 if (ata_dma_blacklisted(ap, master)) {
2049 mask = 0;
2050 ata_pr_blacklisted(ap, master);
2051 }
2052 }
2053 if (ata_dev_present(slave)) {
2054 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2055 if (ata_dma_blacklisted(ap, slave)) {
2056 mask = 0;
2057 ata_pr_blacklisted(ap, slave);
2058 }
2059 }
2060 }
2061 else if (shift == ATA_SHIFT_PIO) {
2062 mask = ap->pio_mask;
2063 if (ata_dev_present(master)) {
2064 /* spec doesn't return explicit support for
2065 * PIO0-2, so we fake it
2066 */
2067 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2068 tmp_mode <<= 3;
2069 tmp_mode |= 0x7;
2070 mask &= tmp_mode;
2071 }
2072 if (ata_dev_present(slave)) {
2073 /* spec doesn't return explicit support for
2074 * PIO0-2, so we fake it
2075 */
2076 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2077 tmp_mode <<= 3;
2078 tmp_mode |= 0x7;
2079 mask &= tmp_mode;
2080 }
2081 }
2082 else {
2083 mask = 0xffffffff; /* shut up compiler warning */
2084 BUG();
2085 }
2086
2087 return mask;
2088}
2089
2090/* find greatest bit */
2091static int fgb(u32 bitmap)
2092{
2093 unsigned int i;
2094 int x = -1;
2095
2096 for (i = 0; i < 32; i++)
2097 if (bitmap & (1 << i))
2098 x = i;
2099
2100 return x;
2101}
2102
2103/**
2104 * ata_choose_xfer_mode - attempt to find best transfer mode
2105 * @ap: Port for which an xfer mode will be selected
2106 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2107 * @xfer_shift_out: (output) bit shift that selects this mode
2108 *
0cba632b
JG		 2109 * Based on host and device capabilities, determine the
2110 * maximum transfer mode that is amenable to all.
2111 *
1da177e4 2112 * LOCKING:
0cba632b 2113 * PCI/etc. bus probe sem.
1da177e4
LT		 2114 *
2115 * RETURNS:
2116 * Zero on success, negative on error.
2117 */
2118
2119static int ata_choose_xfer_mode(struct ata_port *ap,
2120 u8 *xfer_mode_out,
2121 unsigned int *xfer_shift_out)
2122{
2123 unsigned int mask, shift;
2124 int x, i;
2125
2126 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2127 shift = xfer_mode_classes[i].shift;
2128 mask = ata_get_mode_mask(ap, shift);
2129
2130 x = fgb(mask);
2131 if (x >= 0) {
2132 *xfer_mode_out = xfer_mode_classes[i].base + x;
2133 *xfer_shift_out = shift;
2134 return 0;
2135 }
2136 }
2137
2138 return -1;
2139}
2140
2141/**
2142 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2143 * @ap: Port associated with device @dev
2144 * @dev: Device to which command will be sent
2145 *
780a87f7
JG		 2146 * Issue SET FEATURES - XFER MODE command to device @dev
2147 * on port @ap.
2148 *
1da177e4 2149 * LOCKING:
0cba632b 2150 * PCI/etc. bus probe sem.
1da177e4
LT		 2151 */
2152
2153static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2154{
2155 DECLARE_COMPLETION(wait);
2156 struct ata_queued_cmd *qc;
2157 int rc;
2158 unsigned long flags;
2159
2160 /* set up set-features taskfile */
2161 DPRINTK("set features - xfer mode\n");
2162
2163 qc = ata_qc_new_init(ap, dev);
2164 BUG_ON(qc == NULL);
2165
2166 qc->tf.command = ATA_CMD_SET_FEATURES;
2167 qc->tf.feature = SETFEATURES_XFER;
2168 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2169 qc->tf.protocol = ATA_PROT_NODATA;
2170 qc->tf.nsect = dev->xfer_mode;
2171
2172 qc->waiting = &wait;
2173 qc->complete_fn = ata_qc_complete_noop;
2174
2175 spin_lock_irqsave(&ap->host_set->lock, flags);
2176 rc = ata_qc_issue(qc);
2177 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2178
2179 if (rc)
2180 ata_port_disable(ap);
2181 else
2182 wait_for_completion(&wait);
2183
2184 DPRINTK("EXIT\n");
2185}
2186
8bf62ece
AL		 2187/**
2188 * ata_dev_init_params - Issue INIT DEV PARAMS command
2189 * @ap: Port associated with device @dev
2190 * @dev: Device to which command will be sent
2191 *
2192 * LOCKING:
2193 */
2194
2195static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2196{
2197 DECLARE_COMPLETION(wait);
2198 struct ata_queued_cmd *qc;
2199 int rc;
2200 unsigned long flags;
2201 u16 sectors = dev->id[6];
2202 u16 heads = dev->id[3];
2203
2204 /* Number of sectors per track 1-255. Number of heads 1-16 */
2205 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2206 return;
2207
2208 /* set up init dev params taskfile */
2209 DPRINTK("init dev params \n");
2210
2211 qc = ata_qc_new_init(ap, dev);
2212 BUG_ON(qc == NULL);
2213
2214 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2215 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2216 qc->tf.protocol = ATA_PROT_NODATA;
2217 qc->tf.nsect = sectors;
2218 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2219
2220 qc->waiting = &wait;
2221 qc->complete_fn = ata_qc_complete_noop;
2222
2223 spin_lock_irqsave(&ap->host_set->lock, flags);
2224 rc = ata_qc_issue(qc);
2225 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2226
2227 if (rc)
2228 ata_port_disable(ap);
2229 else
2230 wait_for_completion(&wait);
2231
2232 DPRINTK("EXIT\n");
2233}
2234
1da177e4 2235/**
0cba632b
JG		 2236 * ata_sg_clean - Unmap DMA memory associated with command
2237 * @qc: Command containing DMA memory to be released
2238 *
2239 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2240 *
2241 * LOCKING:
0cba632b 2242 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2243 */
2244
2245static void ata_sg_clean(struct ata_queued_cmd *qc)
2246{
2247 struct ata_port *ap = qc->ap;
2248 struct scatterlist *sg = qc->sg;
2249 int dir = qc->dma_dir;
2250
2251 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2252 assert(sg != NULL);
2253
2254 if (qc->flags & ATA_QCFLAG_SINGLE)
2255 assert(qc->n_elem == 1);
2256
2257 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2258
2259 if (qc->flags & ATA_QCFLAG_SG)
2260 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2261 else
2262 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2263 sg_dma_len(&sg[0]), dir);
2264
2265 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2266 qc->sg = NULL;
2267}
2268
2269/**
2270 * ata_fill_sg - Fill PCI IDE PRD table
2271 * @qc: Metadata associated with taskfile to be transferred
2272 *
780a87f7
JG		 2273 * Fill PCI IDE PRD (scatter-gather) table with segments
2274 * associated with the current disk command.
2275 *
1da177e4 2276 * LOCKING:
780a87f7 2277 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2278 *
2279 */
2280static void ata_fill_sg(struct ata_queued_cmd *qc)
2281{
2282 struct scatterlist *sg = qc->sg;
2283 struct ata_port *ap = qc->ap;
2284 unsigned int idx, nelem;
2285
2286 assert(sg != NULL);
2287 assert(qc->n_elem > 0);
2288
2289 idx = 0;
2290 for (nelem = qc->n_elem; nelem; nelem--,sg++) {
2291 u32 addr, offset;
2292 u32 sg_len, len;
2293
2294 /* determine if physical DMA addr spans 64K boundary.
2295 * Note h/w doesn't support 64-bit, so we unconditionally
2296 * truncate dma_addr_t to u32.
2297 */
2298 addr = (u32) sg_dma_address(sg);
2299 sg_len = sg_dma_len(sg);
2300
2301 while (sg_len) {
2302 offset = addr & 0xffff;
2303 len = sg_len;
2304 if ((offset + sg_len) > 0x10000)
2305 len = 0x10000 - offset;
2306
2307 ap->prd[idx].addr = cpu_to_le32(addr);
2308 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2309 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2310
2311 idx++;
2312 sg_len -= len;
2313 addr += len;
2314 }
2315 }
2316
2317 if (idx)
2318 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2319}
2320/**
2321 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2322 * @qc: Metadata associated with taskfile to check
2323 *
780a87f7
JG		 2324 * Allow low-level driver to filter ATA PACKET commands, returning
2325 * a status indicating whether or not it is OK to use DMA for the
2326 * supplied PACKET command.
2327 *
1da177e4 2328 * LOCKING:
0cba632b
JG		 2329 * spin_lock_irqsave(host_set lock)
2330 *
1da177e4
LT		 2331 * RETURNS: 0 when ATAPI DMA can be used
2332 * nonzero otherwise
2333 */
2334int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2335{
2336 struct ata_port *ap = qc->ap;
2337 int rc = 0; /* Assume ATAPI DMA is OK by default */
2338
2339 if (ap->ops->check_atapi_dma)
2340 rc = ap->ops->check_atapi_dma(qc);
2341
2342 return rc;
2343}
2344/**
2345 * ata_qc_prep - Prepare taskfile for submission
2346 * @qc: Metadata associated with taskfile to be prepared
2347 *
780a87f7
JG		 2348 * Prepare ATA taskfile for submission.
2349 *
1da177e4
LT		 2350 * LOCKING:
2351 * spin_lock_irqsave(host_set lock)
2352 */
2353void ata_qc_prep(struct ata_queued_cmd *qc)
2354{
2355 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2356 return;
2357
2358 ata_fill_sg(qc);
2359}
2360
0cba632b
JG		 2361/**
2362 * ata_sg_init_one - Associate command with memory buffer
2363 * @qc: Command to be associated
2364 * @buf: Memory buffer
2365 * @buflen: Length of memory buffer, in bytes.
2366 *
2367 * Initialize the data-related elements of queued_cmd @qc
2368 * to point to a single memory buffer, @buf of byte length @buflen.
2369 *
2370 * LOCKING:
2371 * spin_lock_irqsave(host_set lock)
2372 */
2373
1da177e4
LT		 2374void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2375{
2376 struct scatterlist *sg;
2377
2378 qc->flags |= ATA_QCFLAG_SINGLE;
2379
2380 memset(&qc->sgent, 0, sizeof(qc->sgent));
2381 qc->sg = &qc->sgent;
2382 qc->n_elem = 1;
2383 qc->buf_virt = buf;
2384
2385 sg = qc->sg;
2386 sg->page = virt_to_page(buf);
2387 sg->offset = (unsigned long) buf & ~PAGE_MASK;
32529e01 2388 sg->length = buflen;
1da177e4
LT		 2389}
2390
0cba632b
JG		 2391/**
2392 * ata_sg_init - Associate command with scatter-gather table.
2393 * @qc: Command to be associated
2394 * @sg: Scatter-gather table.
2395 * @n_elem: Number of elements in s/g table.
2396 *
2397 * Initialize the data-related elements of queued_cmd @qc
2398 * to point to a scatter-gather table @sg, containing @n_elem
2399 * elements.
2400 *
2401 * LOCKING:
2402 * spin_lock_irqsave(host_set lock)
2403 */
2404
1da177e4
LT		 2405void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2406 unsigned int n_elem)
2407{
2408 qc->flags |= ATA_QCFLAG_SG;
2409 qc->sg = sg;
2410 qc->n_elem = n_elem;
2411}
2412
2413/**
0cba632b
JG		 2414 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2415 * @qc: Command with memory buffer to be mapped.
2416 *
2417 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2418 *
2419 * LOCKING:
2420 * spin_lock_irqsave(host_set lock)
2421 *
2422 * RETURNS:
0cba632b 2423 * Zero on success, negative on error.
1da177e4
LT		 2424 */
2425
2426static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2427{
2428 struct ata_port *ap = qc->ap;
2429 int dir = qc->dma_dir;
2430 struct scatterlist *sg = qc->sg;
2431 dma_addr_t dma_address;
2432
2433 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2434 sg->length, dir);
1da177e4
LT		 2435 if (dma_mapping_error(dma_address))
2436 return -1;
2437
2438 sg_dma_address(sg) = dma_address;
32529e01 2439 sg_dma_len(sg) = sg->length;
1da177e4
LT		 2440
2441 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2442 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2443
2444 return 0;
2445}
2446
2447/**
0cba632b
JG		 2448 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2449 * @qc: Command with scatter-gather table to be mapped.
2450 *
2451 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2452 *
2453 * LOCKING:
2454 * spin_lock_irqsave(host_set lock)
2455 *
2456 * RETURNS:
0cba632b 2457 * Zero on success, negative on error.
1da177e4
LT		 2458 *
2459 */
2460
2461static int ata_sg_setup(struct ata_queued_cmd *qc)
2462{
2463 struct ata_port *ap = qc->ap;
2464 struct scatterlist *sg = qc->sg;
2465 int n_elem, dir;
2466
2467 VPRINTK("ENTER, ata%u\n", ap->id);
2468 assert(qc->flags & ATA_QCFLAG_SG);
2469
2470 dir = qc->dma_dir;
2471 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2472 if (n_elem < 1)
2473 return -1;
2474
2475 DPRINTK("%d sg elements mapped\n", n_elem);
2476
2477 qc->n_elem = n_elem;
2478
2479 return 0;
2480}
2481
40e8c82c
TH		 2482/**
2483 * ata_poll_qc_complete - turn irq back on and finish qc
2484 * @qc: Command to complete
2485 * @drv_stat: ATA status register content
2486 *
2487 * LOCKING:
2488 * None. (grabs host lock)
2489 */
2490
2491void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2492{
2493 struct ata_port *ap = qc->ap;
b8f6153e 2494 unsigned long flags;
40e8c82c 2495
b8f6153e 2496 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 2497 ata_irq_on(ap);
2498 ata_qc_complete(qc, drv_stat);
b8f6153e 2499 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 2500}
2501
1da177e4
LT		 2502/**
2503 * ata_pio_poll -
2504 * @ap:
2505 *
2506 * LOCKING:
0cba632b 2507 * None. (executing in kernel thread context)
1da177e4
LT		 2508 *
2509 * RETURNS:
2510 *
2511 */
2512
2513static unsigned long ata_pio_poll(struct ata_port *ap)
2514{
2515 u8 status;
14be71f4
AL		 2516 unsigned int poll_state = HSM_ST_UNKNOWN;
2517 unsigned int reg_state = HSM_ST_UNKNOWN;
2518 const unsigned int tmout_state = HSM_ST_TMOUT;
2519
2520 switch (ap->hsm_task_state) {
2521 case HSM_ST:
2522 case HSM_ST_POLL:
2523 poll_state = HSM_ST_POLL;
2524 reg_state = HSM_ST;
1da177e4 2525 break;
14be71f4
AL		 2526 case HSM_ST_LAST:
2527 case HSM_ST_LAST_POLL:
2528 poll_state = HSM_ST_LAST_POLL;
2529 reg_state = HSM_ST_LAST;
1da177e4
LT		 2530 break;
2531 default:
2532 BUG();
2533 break;
2534 }
2535
2536 status = ata_chk_status(ap);
2537 if (status & ATA_BUSY) {
2538 if (time_after(jiffies, ap->pio_task_timeout)) {
14be71f4 2539 ap->hsm_task_state = tmout_state;
1da177e4
LT		 2540 return 0;
2541 }
14be71f4 2542 ap->hsm_task_state = poll_state;
1da177e4
LT		 2543 return ATA_SHORT_PAUSE;
2544 }
2545
14be71f4 2546 ap->hsm_task_state = reg_state;
1da177e4
LT		 2547 return 0;
2548}
2549
2550/**
2551 * ata_pio_complete -
2552 * @ap:
2553 *
2554 * LOCKING:
0cba632b 2555 * None. (executing in kernel thread context)
7fb6ec28
JG		 2556 *
2557 * RETURNS:
2558 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 2559 */
2560
7fb6ec28 2561static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 2562{
2563 struct ata_queued_cmd *qc;
2564 u8 drv_stat;
2565
2566 /*
31433ea3
AC		 2567 * This is purely heuristic. This is a fast path. Sometimes when
2568 * we enter, BSY will be cleared in a chk-status or two. If not,
2569 * the drive is probably seeking or something. Snooze for a couple
2570 * msecs, then chk-status again. If still busy, fall back to
14be71f4 2571 * HSM_ST_POLL state.
1da177e4
LT		 2572 */
2573 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2574 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2575 msleep(2);
2576 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2577 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
14be71f4 2578 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 2579 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 2580 return 0;
1da177e4
LT		 2581 }
2582 }
2583
2584 drv_stat = ata_wait_idle(ap);
2585 if (!ata_ok(drv_stat)) {
14be71f4 2586 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 2587 return 0;
1da177e4
LT		 2588 }
2589
2590 qc = ata_qc_from_tag(ap, ap->active_tag);
2591 assert(qc != NULL);
2592
14be71f4 2593 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 2594
40e8c82c 2595 ata_poll_qc_complete(qc, drv_stat);
7fb6ec28
JG		 2596
2597 /* another command may start at this point */
2598
2599 return 1;
1da177e4
LT		 2600}
2601
0baab86b
EF		 2602
2603/**
2604 * swap_buf_le16 -
2605 * @buf: Buffer to swap
2606 * @buf_words: Number of 16-bit words in buffer.
2607 *
2608 * Swap halves of 16-bit words if needed to convert from
2609 * little-endian byte order to native cpu byte order, or
2610 * vice-versa.
2611 *
2612 * LOCKING:
2613 */
1da177e4
LT		 2614void swap_buf_le16(u16 *buf, unsigned int buf_words)
2615{
2616#ifdef __BIG_ENDIAN
2617 unsigned int i;
2618
2619 for (i = 0; i < buf_words; i++)
2620 buf[i] = le16_to_cpu(buf[i]);
2621#endif /* __BIG_ENDIAN */
2622}
2623
6ae4cfb5
AL		 2624/**
2625 * ata_mmio_data_xfer - Transfer data by MMIO
2626 * @ap: port to read/write
2627 * @buf: data buffer
2628 * @buflen: buffer length
344babaa 2629 * @write_data: read/write
6ae4cfb5
AL		 2630 *
2631 * Transfer data from/to the device data register by MMIO.
2632 *
2633 * LOCKING:
2634 * Inherited from caller.
2635 *
2636 */
2637
1da177e4
LT		 2638static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2639 unsigned int buflen, int write_data)
2640{
2641 unsigned int i;
2642 unsigned int words = buflen >> 1;
2643 u16 *buf16 = (u16 *) buf;
2644 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2645
6ae4cfb5 2646 /* Transfer multiple of 2 bytes */
1da177e4
LT		 2647 if (write_data) {
2648 for (i = 0; i < words; i++)
2649 writew(le16_to_cpu(buf16[i]), mmio);
2650 } else {
2651 for (i = 0; i < words; i++)
2652 buf16[i] = cpu_to_le16(readw(mmio));
2653 }
6ae4cfb5
AL		 2654
2655 /* Transfer trailing 1 byte, if any. */
2656 if (unlikely(buflen & 0x01)) {
2657 u16 align_buf[1] = { 0 };
2658 unsigned char *trailing_buf = buf + buflen - 1;
2659
2660 if (write_data) {
2661 memcpy(align_buf, trailing_buf, 1);
2662 writew(le16_to_cpu(align_buf[0]), mmio);
2663 } else {
2664 align_buf[0] = cpu_to_le16(readw(mmio));
2665 memcpy(trailing_buf, align_buf, 1);
2666 }
2667 }
1da177e4
LT		 2668}
2669
6ae4cfb5
AL		 2670/**
2671 * ata_pio_data_xfer - Transfer data by PIO
2672 * @ap: port to read/write
2673 * @buf: data buffer
2674 * @buflen: buffer length
344babaa 2675 * @write_data: read/write
6ae4cfb5
AL		 2676 *
2677 * Transfer data from/to the device data register by PIO.
2678 *
2679 * LOCKING:
2680 * Inherited from caller.
2681 *
2682 */
2683
1da177e4
LT		 2684static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2685 unsigned int buflen, int write_data)
2686{
6ae4cfb5 2687 unsigned int words = buflen >> 1;
1da177e4 2688
6ae4cfb5 2689 /* Transfer multiple of 2 bytes */
1da177e4 2690 if (write_data)
6ae4cfb5 2691 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 2692 else
6ae4cfb5
AL		 2693 insw(ap->ioaddr.data_addr, buf, words);
2694
2695 /* Transfer trailing 1 byte, if any. */
2696 if (unlikely(buflen & 0x01)) {
2697 u16 align_buf[1] = { 0 };
2698 unsigned char *trailing_buf = buf + buflen - 1;
2699
2700 if (write_data) {
2701 memcpy(align_buf, trailing_buf, 1);
2702 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2703 } else {
2704 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2705 memcpy(trailing_buf, align_buf, 1);
2706 }
2707 }
1da177e4
LT		 2708}
2709
6ae4cfb5
AL		 2710/**
2711 * ata_data_xfer - Transfer data from/to the data register.
2712 * @ap: port to read/write
2713 * @buf: data buffer
2714 * @buflen: buffer length
2715 * @do_write: read/write
2716 *
2717 * Transfer data from/to the device data register.
2718 *
2719 * LOCKING:
2720 * Inherited from caller.
2721 *
2722 */
2723
1da177e4
LT		 2724static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2725 unsigned int buflen, int do_write)
2726{
2727 if (ap->flags & ATA_FLAG_MMIO)
2728 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2729 else
2730 ata_pio_data_xfer(ap, buf, buflen, do_write);
2731}
2732
6ae4cfb5
AL		 2733/**
2734 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2735 * @qc: Command on going
2736 *
2737 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
2738 *
2739 * LOCKING:
2740 * Inherited from caller.
2741 */
2742
1da177e4
LT		 2743static void ata_pio_sector(struct ata_queued_cmd *qc)
2744{
2745 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2746 struct scatterlist *sg = qc->sg;
2747 struct ata_port *ap = qc->ap;
2748 struct page *page;
2749 unsigned int offset;
2750 unsigned char *buf;
312f7da2 2751 unsigned long flags;
1da177e4
LT		 2752
2753 if (qc->cursect == (qc->nsect - 1))
14be71f4 2754 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 2755
2756 page = sg[qc->cursg].page;
2757 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2758
2759 /* get the current page and offset */
2760 page = nth_page(page, (offset >> PAGE_SHIFT));
2761 offset %= PAGE_SIZE;
2762
312f7da2
AL		 2763 local_irq_save(flags);
2764 buf = kmap_atomic(page, KM_IRQ0) + offset;
1da177e4
LT		 2765
2766 qc->cursect++;
2767 qc->cursg_ofs++;
2768
32529e01 2769 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 2770 qc->cursg++;
2771 qc->cursg_ofs = 0;
2772 }
2773
2774 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2775
2776 /* do the actual data transfer */
2777 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2778 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
2779
312f7da2
AL		 2780 kunmap_atomic(buf - offset, KM_IRQ0);
2781 local_irq_restore(flags);
1da177e4
LT		 2782}
2783
6ae4cfb5
AL		 2784/**
2785 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
2786 * @qc: Command on going
2787 * @bytes: number of bytes
2788 *
2789 * Transfer Transfer data from/to the ATAPI device.
2790 *
2791 * LOCKING:
2792 * Inherited from caller.
2793 *
2794 */
2795
1da177e4
LT		 2796static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2797{
2798 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2799 struct scatterlist *sg = qc->sg;
2800 struct ata_port *ap = qc->ap;
2801 struct page *page;
2802 unsigned char *buf;
2803 unsigned int offset, count;
312f7da2 2804 unsigned long flags;
1da177e4 2805
563a6e1f 2806 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 2807 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 2808
2809next_sg:
563a6e1f 2810 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 2811 /*
563a6e1f
AL		 2812 * The end of qc->sg is reached and the device expects
2813 * more data to transfer. In order not to overrun qc->sg
2814 * and fulfill length specified in the byte count register,
2815 * - for read case, discard trailing data from the device
2816 * - for write case, padding zero data to the device
2817 */
2818 u16 pad_buf[1] = { 0 };
2819 unsigned int words = bytes >> 1;
2820 unsigned int i;
2821
2822 if (words) /* warning if bytes > 1 */
7fb6ec28 2823 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 2824 ap->id, bytes);
2825
2826 for (i = 0; i < words; i++)
2827 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
2828
14be71f4 2829 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 2830 return;
2831 }
2832
1da177e4
LT		 2833 sg = &qc->sg[qc->cursg];
2834
1da177e4
LT		 2835 page = sg->page;
2836 offset = sg->offset + qc->cursg_ofs;
2837
2838 /* get the current page and offset */
2839 page = nth_page(page, (offset >> PAGE_SHIFT));
2840 offset %= PAGE_SIZE;
2841
6952df03 2842 /* don't overrun current sg */
32529e01 2843 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 2844
2845 /* don't cross page boundaries */
2846 count = min(count, (unsigned int)PAGE_SIZE - offset);
2847
312f7da2
AL		 2848 local_irq_save(flags);
2849 buf = kmap_atomic(page, KM_IRQ0) + offset;
1da177e4
LT		 2850
2851 bytes -= count;
2852 qc->curbytes += count;
2853 qc->cursg_ofs += count;
2854
32529e01 2855 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 2856 qc->cursg++;
2857 qc->cursg_ofs = 0;
2858 }
2859
2860 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2861
2862 /* do the actual data transfer */
2863 ata_data_xfer(ap, buf, count, do_write);
2864
312f7da2
AL		 2865 kunmap_atomic(buf - offset, KM_IRQ0);
2866 local_irq_restore(flags);
1da177e4 2867
563a6e1f 2868 if (bytes)
1da177e4 2869 goto next_sg;
1da177e4
LT		 2870}
2871
6ae4cfb5
AL		 2872/**
2873 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
2874 * @qc: Command on going
2875 *
2876 * Transfer Transfer data from/to the ATAPI device.
2877 *
2878 * LOCKING:
2879 * Inherited from caller.
2880 *
2881 */
2882
1da177e4
LT		 2883static void atapi_pio_bytes(struct ata_queued_cmd *qc)
2884{
2885 struct ata_port *ap = qc->ap;
2886 struct ata_device *dev = qc->dev;
2887 unsigned int ireason, bc_lo, bc_hi, bytes;
2888 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
2889
2890 ap->ops->tf_read(ap, &qc->tf);
2891 ireason = qc->tf.nsect;
2892 bc_lo = qc->tf.lbam;
2893 bc_hi = qc->tf.lbah;
2894 bytes = (bc_hi << 8) | bc_lo;
2895
2896 /* shall be cleared to zero, indicating xfer of data */
2897 if (ireason & (1 << 0))
2898 goto err_out;
2899
2900 /* make sure transfer direction matches expected */
2901 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
2902 if (do_write != i_write)
2903 goto err_out;
2904
312f7da2
AL		 2905 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
2906
1da177e4
LT		 2907 __atapi_pio_bytes(qc, bytes);
2908
2909 return;
2910
2911err_out:
2912 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
2913 ap->id, dev->devno);
14be71f4 2914 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 2915}
2916
2917/**
2918 * ata_pio_sector -
2919 * @ap:
2920 *
2921 * LOCKING:
0cba632b 2922 * None. (executing in kernel thread context)
1da177e4
LT		 2923 */
2924
2925static void ata_pio_block(struct ata_port *ap)
2926{
2927 struct ata_queued_cmd *qc;
2928 u8 status;
2929
2930 /*
2931 * This is purely hueristic. This is a fast path.
2932 * Sometimes when we enter, BSY will be cleared in
2933 * a chk-status or two. If not, the drive is probably seeking
2934 * or something. Snooze for a couple msecs, then
2935 * chk-status again. If still busy, fall back to
14be71f4 2936 * HSM_ST_POLL state.
1da177e4
LT		 2937 */
2938 status = ata_busy_wait(ap, ATA_BUSY, 5);
2939 if (status & ATA_BUSY) {
2940 msleep(2);
2941 status = ata_busy_wait(ap, ATA_BUSY, 10);
2942 if (status & ATA_BUSY) {
14be71f4 2943 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 2944 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2945 return;
2946 }
2947 }
2948
2949 qc = ata_qc_from_tag(ap, ap->active_tag);
2950 assert(qc != NULL);
2951
2952 if (is_atapi_taskfile(&qc->tf)) {
2953 /* no more data to transfer or unsupported ATAPI command */
2954 if ((status & ATA_DRQ) == 0) {
14be71f4 2955 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 2956 return;
2957 }
2958
2959 atapi_pio_bytes(qc);
2960 } else {
2961 /* handle BSY=0, DRQ=0 as error */
2962 if ((status & ATA_DRQ) == 0) {
14be71f4 2963 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 2964 return;
2965 }
2966
2967 ata_pio_sector(qc);
2968 }
2969}
2970
2971static void ata_pio_error(struct ata_port *ap)
2972{
2973 struct ata_queued_cmd *qc;
2974 u8 drv_stat;
2975
2976 qc = ata_qc_from_tag(ap, ap->active_tag);
2977 assert(qc != NULL);
2978
2979 drv_stat = ata_chk_status(ap);
2980 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
2981 ap->id, drv_stat);
2982
14be71f4 2983 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 2984
40e8c82c 2985 ata_poll_qc_complete(qc, drv_stat | ATA_ERR);
1da177e4
LT		 2986}
2987
2988static void ata_pio_task(void *_data)
2989{
2990 struct ata_port *ap = _data;
7fb6ec28
JG		 2991 unsigned long timeout;
2992 int qc_completed;
2993
2994fsm_start:
2995 timeout = 0;
2996 qc_completed = 0;
1da177e4 2997
14be71f4
AL		 2998 switch (ap->hsm_task_state) {
2999 case HSM_ST_IDLE:
1da177e4
LT		 3000 return;
3001
14be71f4 3002 case HSM_ST:
1da177e4
LT		 3003 ata_pio_block(ap);
3004 break;
3005
14be71f4 3006 case HSM_ST_LAST:
7fb6ec28 3007 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3008 break;
3009
14be71f4
AL		 3010 case HSM_ST_POLL:
3011 case HSM_ST_LAST_POLL:
1da177e4
LT		 3012 timeout = ata_pio_poll(ap);
3013 break;
3014
14be71f4
AL		 3015 case HSM_ST_TMOUT:
3016 case HSM_ST_ERR:
1da177e4
LT		 3017 ata_pio_error(ap);
3018 return;
3019 }
3020
3021 if (timeout)
7fb6ec28
JG		 3022 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3023 else if (!qc_completed)
3024 goto fsm_start;
1da177e4
LT		 3025}
3026
3027static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
3028 struct scsi_cmnd *cmd)
3029{
3030 DECLARE_COMPLETION(wait);
3031 struct ata_queued_cmd *qc;
3032 unsigned long flags;
3033 int rc;
3034
3035 DPRINTK("ATAPI request sense\n");
3036
3037 qc = ata_qc_new_init(ap, dev);
3038 BUG_ON(qc == NULL);
3039
3040 /* FIXME: is this needed? */
3041 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
3042
3043 ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
3044 qc->dma_dir = DMA_FROM_DEVICE;
3045
21b1ed74 3046 memset(&qc->cdb, 0, ap->cdb_len);
1da177e4
LT		 3047 qc->cdb[0] = REQUEST_SENSE;
3048 qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;
3049
3050 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3051 qc->tf.command = ATA_CMD_PACKET;
3052
3053 qc->tf.protocol = ATA_PROT_ATAPI;
3054 qc->tf.lbam = (8 * 1024) & 0xff;
3055 qc->tf.lbah = (8 * 1024) >> 8;
3056 qc->nbytes = SCSI_SENSE_BUFFERSIZE;
3057
3058 qc->waiting = &wait;
3059 qc->complete_fn = ata_qc_complete_noop;
3060
3061 spin_lock_irqsave(&ap->host_set->lock, flags);
3062 rc = ata_qc_issue(qc);
3063 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3064
3065 if (rc)
3066 ata_port_disable(ap);
3067 else
3068 wait_for_completion(&wait);
3069
3070 DPRINTK("EXIT\n");
3071}
3072
3073/**
3074 * ata_qc_timeout - Handle timeout of queued command
3075 * @qc: Command that timed out
3076 *
3077 * Some part of the kernel (currently, only the SCSI layer)
3078 * has noticed that the active command on port @ap has not
3079 * completed after a specified length of time. Handle this
3080 * condition by disabling DMA (if necessary) and completing
3081 * transactions, with error if necessary.
3082 *
3083 * This also handles the case of the "lost interrupt", where
3084 * for some reason (possibly hardware bug, possibly driver bug)
3085 * an interrupt was not delivered to the driver, even though the
3086 * transaction completed successfully.
3087 *
3088 * LOCKING:
0cba632b 3089 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3090 */
3091
3092static void ata_qc_timeout(struct ata_queued_cmd *qc)
3093{
3094 struct ata_port *ap = qc->ap;
b8f6153e 3095 struct ata_host_set *host_set = ap->host_set;
1da177e4
LT		 3096 struct ata_device *dev = qc->dev;
3097 u8 host_stat = 0, drv_stat;
b8f6153e 3098 unsigned long flags;
1da177e4
LT		 3099
3100 DPRINTK("ENTER\n");
3101
3102 /* FIXME: doesn't this conflict with timeout handling? */
3103 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3104 struct scsi_cmnd *cmd = qc->scsicmd;
3105
3111b0d1 3106 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
1da177e4
LT		 3107
3108 /* finish completing original command */
b8f6153e 3109 spin_lock_irqsave(&host_set->lock, flags);
1da177e4 3110 __ata_qc_complete(qc);
b8f6153e 3111 spin_unlock_irqrestore(&host_set->lock, flags);
1da177e4
LT		 3112
3113 atapi_request_sense(ap, dev, cmd);
3114
3115 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3116 scsi_finish_command(cmd);
3117
3118 goto out;
3119 }
3120 }
3121
b8f6153e
JG		 3122 spin_lock_irqsave(&host_set->lock, flags);
3123
1da177e4
LT		 3124 /* hack alert! We cannot use the supplied completion
3125 * function from inside the ->eh_strategy_handler() thread.
3126 * libata is the only user of ->eh_strategy_handler() in
3127 * any kernel, so the default scsi_done() assumes it is
3128 * not being called from the SCSI EH.
3129 */
3130 qc->scsidone = scsi_finish_command;
3131
3132 switch (qc->tf.protocol) {
3133
3134 case ATA_PROT_DMA:
3135 case ATA_PROT_ATAPI_DMA:
3136 host_stat = ap->ops->bmdma_status(ap);
3137
3138 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3139 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3140
3141 /* fall through */
3142
3143 default:
3144 ata_altstatus(ap);
3145 drv_stat = ata_chk_status(ap);
3146
3147 /* ack bmdma irq events */
3148 ap->ops->irq_clear(ap);
3149
3150 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3151 ap->id, qc->tf.command, drv_stat, host_stat);
3152
312f7da2
AL		 3153 ap->hsm_task_state = HSM_ST_IDLE;
3154
1da177e4
LT		 3155 /* complete taskfile transaction */
3156 ata_qc_complete(qc, drv_stat);
3157 break;
3158 }
b8f6153e
JG		 3159
3160 spin_unlock_irqrestore(&host_set->lock, flags);
3161
1da177e4
LT		 3162out:
3163 DPRINTK("EXIT\n");
3164}
3165
3166/**
3167 * ata_eng_timeout - Handle timeout of queued command
3168 * @ap: Port on which timed-out command is active
3169 *
3170 * Some part of the kernel (currently, only the SCSI layer)
3171 * has noticed that the active command on port @ap has not
3172 * completed after a specified length of time. Handle this
3173 * condition by disabling DMA (if necessary) and completing
3174 * transactions, with error if necessary.
3175 *
3176 * This also handles the case of the "lost interrupt", where
3177 * for some reason (possibly hardware bug, possibly driver bug)
3178 * an interrupt was not delivered to the driver, even though the
3179 * transaction completed successfully.
3180 *
3181 * LOCKING:
3182 * Inherited from SCSI layer (none, can sleep)
3183 */
3184
3185void ata_eng_timeout(struct ata_port *ap)
3186{
3187 struct ata_queued_cmd *qc;
3188
3189 DPRINTK("ENTER\n");
3190
3191 qc = ata_qc_from_tag(ap, ap->active_tag);
3192 if (!qc) {
3193 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3194 ap->id);
3195 goto out;
3196 }
3197
3198 ata_qc_timeout(qc);
3199
3200out:
3201 DPRINTK("EXIT\n");
3202}
3203
3204/**
3205 * ata_qc_new - Request an available ATA command, for queueing
3206 * @ap: Port associated with device @dev
3207 * @dev: Device from whom we request an available command structure
3208 *
3209 * LOCKING:
0cba632b 3210 * None.
1da177e4
LT		 3211 */
3212
3213static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3214{
3215 struct ata_queued_cmd *qc = NULL;
3216 unsigned int i;
3217
3218 for (i = 0; i < ATA_MAX_QUEUE; i++)
3219 if (!test_and_set_bit(i, &ap->qactive)) {
3220 qc = ata_qc_from_tag(ap, i);
3221 break;
3222 }
3223
3224 if (qc)
3225 qc->tag = i;
3226
3227 return qc;
3228}
3229
3230/**
3231 * ata_qc_new_init - Request an available ATA command, and initialize it
3232 * @ap: Port associated with device @dev
3233 * @dev: Device from whom we request an available command structure
3234 *
3235 * LOCKING:
0cba632b 3236 * None.
1da177e4
LT		 3237 */
3238
3239struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3240 struct ata_device *dev)
3241{
3242 struct ata_queued_cmd *qc;
3243
3244 qc = ata_qc_new(ap);
3245 if (qc) {
3246 qc->sg = NULL;
3247 qc->flags = 0;
3248 qc->scsicmd = NULL;
3249 qc->ap = ap;
3250 qc->dev = dev;
3251 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3252 qc->nsect = 0;
3253 qc->nbytes = qc->curbytes = 0;
3254
3255 ata_tf_init(ap, &qc->tf, dev->devno);
3256
8bf62ece
AL		 3257 if (dev->flags & ATA_DFLAG_LBA) {
3258 qc->tf.flags |= ATA_TFLAG_LBA;
3259
3260 if (dev->flags & ATA_DFLAG_LBA48)
3261 qc->tf.flags |= ATA_TFLAG_LBA48;
3262 }
1da177e4
LT		 3263 }
3264
3265 return qc;
3266}
3267
3268static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
3269{
3270 return 0;
3271}
3272
3273static void __ata_qc_complete(struct ata_queued_cmd *qc)
3274{
3275 struct ata_port *ap = qc->ap;
3276 unsigned int tag, do_clear = 0;
3277
3278 qc->flags = 0;
3279 tag = qc->tag;
3280 if (likely(ata_tag_valid(tag))) {
3281 if (tag == ap->active_tag)
3282 ap->active_tag = ATA_TAG_POISON;
3283 qc->tag = ATA_TAG_POISON;
3284 do_clear = 1;
3285 }
3286
3287 if (qc->waiting) {
3288 struct completion *waiting = qc->waiting;
3289 qc->waiting = NULL;
3290 complete(waiting);
3291 }
3292
3293 if (likely(do_clear))
3294 clear_bit(tag, &ap->qactive);
3295}
3296
3297/**
3298 * ata_qc_free - free unused ata_queued_cmd
3299 * @qc: Command to complete
3300 *
3301 * Designed to free unused ata_queued_cmd object
3302 * in case something prevents using it.
3303 *
3304 * LOCKING:
0cba632b 3305 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3306 *
3307 */
3308void ata_qc_free(struct ata_queued_cmd *qc)
3309{
3310 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3311 assert(qc->waiting == NULL); /* nothing should be waiting */
3312
3313 __ata_qc_complete(qc);
3314}
3315
3316/**
3317 * ata_qc_complete - Complete an active ATA command
3318 * @qc: Command to complete
0cba632b
JG		 3319 * @drv_stat: ATA Status register contents
3320 *
3321 * Indicate to the mid and upper layers that an ATA
3322 * command has completed, with either an ok or not-ok status.
1da177e4
LT		 3323 *
3324 * LOCKING:
0cba632b 3325 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3326 *
3327 */
3328
3329void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3330{
3331 int rc;
3332
3333 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3334 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3335
3336 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3337 ata_sg_clean(qc);
3338
3f3791d3
AL		 3339 /* atapi: mark qc as inactive to prevent the interrupt handler
3340 * from completing the command twice later, before the error handler
3341 * is called. (when rc != 0 and atapi request sense is needed)
3342 */
3343 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3344
1da177e4
LT		 3345 /* call completion callback */
3346 rc = qc->complete_fn(qc, drv_stat);
3347
3348 /* if callback indicates not to complete command (non-zero),
3349 * return immediately
3350 */
3351 if (rc != 0)
3352 return;
3353
3354 __ata_qc_complete(qc);
3355
3356 VPRINTK("EXIT\n");
3357}
3358
3359static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3360{
3361 struct ata_port *ap = qc->ap;
3362
3363 switch (qc->tf.protocol) {
3364 case ATA_PROT_DMA:
3365 case ATA_PROT_ATAPI_DMA:
3366 return 1;
3367
3368 case ATA_PROT_ATAPI:
3369 case ATA_PROT_PIO:
3370 case ATA_PROT_PIO_MULT:
3371 if (ap->flags & ATA_FLAG_PIO_DMA)
3372 return 1;
3373
3374 /* fall through */
3375
3376 default:
3377 return 0;
3378 }
3379
3380 /* never reached */
3381}
3382
3383/**
3384 * ata_qc_issue - issue taskfile to device
3385 * @qc: command to issue to device
3386 *
3387 * Prepare an ATA command to submission to device.
3388 * This includes mapping the data into a DMA-able
3389 * area, filling in the S/G table, and finally
3390 * writing the taskfile to hardware, starting the command.
3391 *
3392 * LOCKING:
3393 * spin_lock_irqsave(host_set lock)
3394 *
3395 * RETURNS:
3396 * Zero on success, negative on error.
3397 */
3398
3399int ata_qc_issue(struct ata_queued_cmd *qc)
3400{
3401 struct ata_port *ap = qc->ap;
3402
3403 if (ata_should_dma_map(qc)) {
3404 if (qc->flags & ATA_QCFLAG_SG) {
3405 if (ata_sg_setup(qc))
3406 goto err_out;
3407 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3408 if (ata_sg_setup_one(qc))
3409 goto err_out;
3410 }
3411 } else {
3412 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3413 }
3414
3415 ap->ops->qc_prep(qc);
3416
3417 qc->ap->active_tag = qc->tag;
3418 qc->flags |= ATA_QCFLAG_ACTIVE;
3419
3420 return ap->ops->qc_issue(qc);
3421
3422err_out:
3423 return -1;
3424}
3425
0baab86b 3426
1da177e4
LT		 3427/**
3428 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3429 * @qc: command to issue to device
3430 *
3431 * Using various libata functions and hooks, this function
3432 * starts an ATA command. ATA commands are grouped into
3433 * classes called "protocols", and issuing each type of protocol
3434 * is slightly different.
3435 *
0baab86b
EF		 3436 * May be used as the qc_issue() entry in ata_port_operations.
3437 *
1da177e4
LT		 3438 * LOCKING:
3439 * spin_lock_irqsave(host_set lock)
3440 *
3441 * RETURNS:
3442 * Zero on success, negative on error.
3443 */
3444
3445int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3446{
3447 struct ata_port *ap = qc->ap;
3448
e50362ec
AL		 3449 /* Use polling pio if the LLD doesn't handle
3450 * interrupt driven pio and atapi CDB interrupt.
3451 */
3452 if (ap->flags & ATA_FLAG_PIO_POLLING) {
3453 switch (qc->tf.protocol) {
3454 case ATA_PROT_PIO:
3455 case ATA_PROT_ATAPI:
3456 case ATA_PROT_ATAPI_NODATA:
3457 qc->tf.flags |= ATA_TFLAG_POLLING;
3458 break;
3459 case ATA_PROT_ATAPI_DMA:
3460 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
3461 BUG();
3462 break;
3463 default:
3464 break;
3465 }
3466 }
3467
312f7da2 3468 /* select the device */
1da177e4
LT		 3469 ata_dev_select(ap, qc->dev->devno, 1, 0);
3470
312f7da2 3471 /* start the command */
1da177e4
LT		 3472 switch (qc->tf.protocol) {
3473 case ATA_PROT_NODATA:
312f7da2
AL		 3474 if (qc->tf.flags & ATA_TFLAG_POLLING)
3475 ata_qc_set_polling(qc);
3476
1da177e4 3477 ata_tf_to_host_nolock(ap, &qc->tf);
312f7da2
AL		 3478 ap->hsm_task_state = HSM_ST_LAST;
3479
3480 if (qc->tf.flags & ATA_TFLAG_POLLING)
3481 queue_work(ata_wq, &ap->pio_task);
3482
1da177e4
LT		 3483 break;
3484
3485 case ATA_PROT_DMA:
312f7da2
AL		 3486 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
3487
1da177e4
LT		 3488 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3489 ap->ops->bmdma_setup(qc); /* set up bmdma */
3490 ap->ops->bmdma_start(qc); /* initiate bmdma */
312f7da2 3491 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3492 break;
3493
312f7da2
AL		 3494 case ATA_PROT_PIO:
3495 if (qc->tf.flags & ATA_TFLAG_POLLING)
3496 ata_qc_set_polling(qc);
3497
1da177e4 3498 ata_tf_to_host_nolock(ap, &qc->tf);
312f7da2 3499
54f00389
AL		 3500 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3501 /* PIO data out protocol */
3502 ap->hsm_task_state = HSM_ST_FIRST;
3503 queue_work(ata_wq, &ap->dataout_task);
3504
3505 /* always send first data block using
3506 * the ata_dataout_task() codepath.
3507 */
312f7da2 3508 } else {
54f00389
AL		 3509 /* PIO data in protocol */
3510 ap->hsm_task_state = HSM_ST;
3511
3512 if (qc->tf.flags & ATA_TFLAG_POLLING)
3513 queue_work(ata_wq, &ap->pio_task);
3514
3515 /* if polling, ata_pio_task() handles the rest.
3516 * otherwise, interrupt handler takes over from here.
3517 */
312f7da2
AL		 3518 }
3519
1da177e4
LT		 3520 break;
3521
3522 case ATA_PROT_ATAPI:
1da177e4 3523 case ATA_PROT_ATAPI_NODATA:
312f7da2
AL		 3524 if (qc->tf.flags & ATA_TFLAG_POLLING)
3525 ata_qc_set_polling(qc);
3526
1da177e4 3527 ata_tf_to_host_nolock(ap, &qc->tf);
312f7da2
AL		 3528 ap->hsm_task_state = HSM_ST_FIRST;
3529
3530 /* send cdb by polling if no cdb interrupt */
3531 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
3532 (qc->tf.flags & ATA_TFLAG_POLLING))
f9997be9 3533 queue_work(ata_wq, &ap->dataout_task);
1da177e4
LT		 3534 break;
3535
3536 case ATA_PROT_ATAPI_DMA:
312f7da2
AL		 3537 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
3538
1da177e4
LT		 3539 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3540 ap->ops->bmdma_setup(qc); /* set up bmdma */
312f7da2
AL		 3541 ap->hsm_task_state = HSM_ST_FIRST;
3542
3543 /* send cdb by polling if no cdb interrupt */
3544 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
f9997be9 3545 queue_work(ata_wq, &ap->dataout_task);
1da177e4
LT		 3546 break;
3547
3548 default:
3549 WARN_ON(1);
3550 return -1;
3551 }
3552
3553 return 0;
3554}
3555
3556/**
0baab86b 3557 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 3558 * @qc: Info associated with this ATA transaction.
3559 *
3560 * LOCKING:
3561 * spin_lock_irqsave(host_set lock)
3562 */
3563
3564static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3565{
3566 struct ata_port *ap = qc->ap;
3567 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3568 u8 dmactl;
3569 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3570
3571 /* load PRD table addr. */
3572 mb(); /* make sure PRD table writes are visible to controller */
3573 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3574
3575 /* specify data direction, triple-check start bit is clear */
3576 dmactl = readb(mmio + ATA_DMA_CMD);
3577 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3578 if (!rw)
3579 dmactl |= ATA_DMA_WR;
3580 writeb(dmactl, mmio + ATA_DMA_CMD);
3581
3582 /* issue r/w command */
3583 ap->ops->exec_command(ap, &qc->tf);
3584}
3585
3586/**
b73fc89f 3587 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 3588 * @qc: Info associated with this ATA transaction.
3589 *
3590 * LOCKING:
3591 * spin_lock_irqsave(host_set lock)
3592 */
3593
3594static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3595{
3596 struct ata_port *ap = qc->ap;
3597 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3598 u8 dmactl;
3599
3600 /* start host DMA transaction */
3601 dmactl = readb(mmio + ATA_DMA_CMD);
3602 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3603
3604 /* Strictly, one may wish to issue a readb() here, to
3605 * flush the mmio write. However, control also passes
3606 * to the hardware at this point, and it will interrupt
3607 * us when we are to resume control. So, in effect,
3608 * we don't care when the mmio write flushes.
3609 * Further, a read of the DMA status register _immediately_
3610 * following the write may not be what certain flaky hardware
3611 * is expected, so I think it is best to not add a readb()
3612 * without first all the MMIO ATA cards/mobos.
3613 * Or maybe I'm just being paranoid.
3614 */
3615}
3616
3617/**
3618 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3619 * @qc: Info associated with this ATA transaction.
3620 *
3621 * LOCKING:
3622 * spin_lock_irqsave(host_set lock)
3623 */
3624
3625static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3626{
3627 struct ata_port *ap = qc->ap;
3628 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3629 u8 dmactl;
3630
3631 /* load PRD table addr. */
3632 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3633
3634 /* specify data direction, triple-check start bit is clear */
3635 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3636 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3637 if (!rw)
3638 dmactl |= ATA_DMA_WR;
3639 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3640
3641 /* issue r/w command */
3642 ap->ops->exec_command(ap, &qc->tf);
3643}
3644
3645/**
3646 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3647 * @qc: Info associated with this ATA transaction.
3648 *
3649 * LOCKING:
3650 * spin_lock_irqsave(host_set lock)
3651 */
3652
3653static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3654{
3655 struct ata_port *ap = qc->ap;
3656 u8 dmactl;
3657
3658 /* start host DMA transaction */
3659 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3660 outb(dmactl | ATA_DMA_START,
3661 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3662}
3663
0baab86b
EF		 3664
3665/**
3666 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3667 * @qc: Info associated with this ATA transaction.
3668 *
3669 * Writes the ATA_DMA_START flag to the DMA command register.
3670 *
3671 * May be used as the bmdma_start() entry in ata_port_operations.
3672 *
3673 * LOCKING:
3674 * spin_lock_irqsave(host_set lock)
3675 */
1da177e4
LT		 3676void ata_bmdma_start(struct ata_queued_cmd *qc)
3677{
3678 if (qc->ap->flags & ATA_FLAG_MMIO)
3679 ata_bmdma_start_mmio(qc);
3680 else
3681 ata_bmdma_start_pio(qc);
3682}
3683
0baab86b
EF		 3684
3685/**
3686 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3687 * @qc: Info associated with this ATA transaction.
3688 *
3689 * Writes address of PRD table to device's PRD Table Address
3690 * register, sets the DMA control register, and calls
3691 * ops->exec_command() to start the transfer.
3692 *
3693 * May be used as the bmdma_setup() entry in ata_port_operations.
3694 *
3695 * LOCKING:
3696 * spin_lock_irqsave(host_set lock)
3697 */
1da177e4
LT		 3698void ata_bmdma_setup(struct ata_queued_cmd *qc)
3699{
3700 if (qc->ap->flags & ATA_FLAG_MMIO)
3701 ata_bmdma_setup_mmio(qc);
3702 else
3703 ata_bmdma_setup_pio(qc);
3704}
3705
0baab86b
EF		 3706
3707/**
3708 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 3709 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3710 *
3711 * Clear interrupt and error flags in DMA status register.
3712 *
3713 * May be used as the irq_clear() entry in ata_port_operations.
3714 *
3715 * LOCKING:
3716 * spin_lock_irqsave(host_set lock)
3717 */
3718
1da177e4
LT		 3719void ata_bmdma_irq_clear(struct ata_port *ap)
3720{
3721 if (ap->flags & ATA_FLAG_MMIO) {
3722 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3723 writeb(readb(mmio), mmio);
3724 } else {
3725 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3726 outb(inb(addr), addr);
3727 }
3728
3729}
3730
0baab86b
EF		 3731
3732/**
3733 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 3734 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3735 *
3736 * Read and return BMDMA status register.
3737 *
3738 * May be used as the bmdma_status() entry in ata_port_operations.
3739 *
3740 * LOCKING:
3741 * spin_lock_irqsave(host_set lock)
3742 */
3743
1da177e4
LT		 3744u8 ata_bmdma_status(struct ata_port *ap)
3745{
3746 u8 host_stat;
3747 if (ap->flags & ATA_FLAG_MMIO) {
3748 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3749 host_stat = readb(mmio + ATA_DMA_STATUS);
3750 } else
ee500aab 3751 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 3752 return host_stat;
3753}
3754
0baab86b
EF		 3755
3756/**
3757 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 3758 * @qc: Command we are ending DMA for
0baab86b
EF		 3759 *
3760 * Clears the ATA_DMA_START flag in the dma control register
3761 *
3762 * May be used as the bmdma_stop() entry in ata_port_operations.
3763 *
3764 * LOCKING:
3765 * spin_lock_irqsave(host_set lock)
3766 */
3767
b73fc89f 3768void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 3769{
b73fc89f 3770 struct ata_port *ap = qc->ap;
1da177e4
LT		 3771 if (ap->flags & ATA_FLAG_MMIO) {
3772 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3773
3774 /* clear start/stop bit */
3775 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3776 mmio + ATA_DMA_CMD);
3777 } else {
3778 /* clear start/stop bit */
3779 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3780 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3781 }
3782
3783 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3784 ata_altstatus(ap); /* dummy read */
3785}
3786
312f7da2
AL		 3787/**
3788 * atapi_send_cdb - Write CDB bytes to hardware
3789 * @ap: Port to which ATAPI device is attached.
3790 * @qc: Taskfile currently active
3791 *
3792 * When device has indicated its readiness to accept
3793 * a CDB, this function is called. Send the CDB.
3794 *
3795 * LOCKING:
3796 * caller.
3797 */
3798
3799static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3800{
3801 /* send SCSI cdb */
3802 DPRINTK("send cdb\n");
3803 assert(ap->cdb_len >= 12);
3804
3805 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3806 ata_altstatus(ap); /* flush */
3807
3808 switch (qc->tf.protocol) {
3809 case ATA_PROT_ATAPI:
3810 ap->hsm_task_state = HSM_ST;
3811 break;
3812 case ATA_PROT_ATAPI_NODATA:
3813 ap->hsm_task_state = HSM_ST_LAST;
3814 break;
3815 case ATA_PROT_ATAPI_DMA:
3816 ap->hsm_task_state = HSM_ST_LAST;
3817 /* initiate bmdma */
3818 ap->ops->bmdma_start(qc);
3819 break;
3820 }
3821}
3822
1da177e4
LT		 3823/**
3824 * ata_host_intr - Handle host interrupt for given (port, task)
3825 * @ap: Port on which interrupt arrived (possibly...)
3826 * @qc: Taskfile currently active in engine
3827 *
3828 * Handle host interrupt for given queued command. Currently,
3829 * only DMA interrupts are handled. All other commands are
3830 * handled via polling with interrupts disabled (nIEN bit).
3831 *
3832 * LOCKING:
3833 * spin_lock_irqsave(host_set lock)
3834 *
3835 * RETURNS:
3836 * One if interrupt was handled, zero if not (shared irq).
3837 */
3838
3839inline unsigned int ata_host_intr (struct ata_port *ap,
3840 struct ata_queued_cmd *qc)
3841{
312f7da2 3842 u8 status, host_stat = 0;
1da177e4 3843
312f7da2
AL		 3844 VPRINTK("ata%u: protocol %d task_state %d\n",
3845 ap->id, qc->tf.protocol, ap->hsm_task_state);
1da177e4 3846
312f7da2
AL		 3847 /* Check whether we are expecting interrupt in this state */
3848 switch (ap->hsm_task_state) {
3849 case HSM_ST_FIRST:
3850 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
3851 * The flag was turned on only for atapi devices.
3852 * No need to check is_atapi_taskfile(&qc->tf) again.
3853 */
3854 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1da177e4 3855 goto idle_irq;
312f7da2
AL		 3856 break;
3857 case HSM_ST_LAST:
3858 if (qc->tf.protocol == ATA_PROT_DMA ||
3859 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
3860 /* check status of DMA engine */
3861 host_stat = ap->ops->bmdma_status(ap);
3862 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3863
3864 /* if it's not our irq... */
3865 if (!(host_stat & ATA_DMA_INTR))
3866 goto idle_irq;
3867
3868 /* before we do anything else, clear DMA-Start bit */
3869 ap->ops->bmdma_stop(qc);
3870 }
3871 break;
3872 case HSM_ST:
3873 break;
3874 default:
3875 goto idle_irq;
3876 }
1da177e4 3877
312f7da2
AL		 3878 /* check altstatus */
3879 status = ata_altstatus(ap);
3880 if (status & ATA_BUSY)
3881 goto idle_irq;
1da177e4 3882
312f7da2
AL		 3883 /* check main status, clearing INTRQ */
3884 status = ata_chk_status(ap);
3885 if (unlikely(status & ATA_BUSY))
3886 goto idle_irq;
1da177e4 3887
312f7da2
AL		 3888 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
3889 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
1da177e4 3890
312f7da2
AL		 3891 /* ack bmdma irq events */
3892 ap->ops->irq_clear(ap);
1da177e4 3893
312f7da2
AL		 3894 /* check error */
3895 if (unlikely((status & ATA_ERR) || (host_stat & ATA_DMA_ERR)))
3896 ap->hsm_task_state = HSM_ST_ERR;
3897
3898fsm_start:
3899 switch (ap->hsm_task_state) {
3900 case HSM_ST_FIRST:
3901 /* Some pre-ATAPI-4 devices assert INTRQ
3902 * at this state when ready to receive CDB.
3903 */
3904
3905 /* check device status */
3906 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
3907 /* Wrong status. Let EH handle this */
3908 ap->hsm_task_state = HSM_ST_ERR;
3909 goto fsm_start;
3910 }
3911
3912 atapi_send_cdb(ap, qc);
3913
3914 break;
3915
3916 case HSM_ST:
3917 /* complete command or read/write the data register */
3918 if (qc->tf.protocol == ATA_PROT_ATAPI) {
3919 /* ATAPI PIO protocol */
3920 if ((status & ATA_DRQ) == 0) {
3921 /* no more data to transfer */
3922 ap->hsm_task_state = HSM_ST_LAST;
3923 goto fsm_start;
3924 }
3925
3926 atapi_pio_bytes(qc);
3927
3928 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
3929 /* bad ireason reported by device */
3930 goto fsm_start;
3931
3932 } else {
3933 /* ATA PIO protocol */
3934 if (unlikely((status & ATA_DRQ) == 0)) {
3935 /* handle BSY=0, DRQ=0 as error */
3936 ap->hsm_task_state = HSM_ST_ERR;
3937 goto fsm_start;
3938 }
3939
3940 ata_pio_sector(qc);
3941
3942 if (ap->hsm_task_state == HSM_ST_LAST &&
3943 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
3944 /* all data read */
3945 ata_altstatus(ap);
3946 status = ata_chk_status(ap);
3947 goto fsm_start;
3948 }
3949 }
3950
3951 ata_altstatus(ap); /* flush */
3952 break;
3953
3954 case HSM_ST_LAST:
3955 if (unlikely(status & ATA_DRQ)) {
3956 /* handle DRQ=1 as error */
3957 ap->hsm_task_state = HSM_ST_ERR;
3958 goto fsm_start;
3959 }
3960
3961 /* no more data to transfer */
3962 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
3963 ap->id, status);
3964
3965 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4
LT		 3966
3967 /* complete taskfile transaction */
3968 ata_qc_complete(qc, status);
3969 break;
3970
312f7da2
AL		 3971 case HSM_ST_ERR:
3972 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x host_stat 0x%x\n",
3973 ap->id, status, host_stat);
3974
3975 ap->hsm_task_state = HSM_ST_IDLE;
3976 ata_qc_complete(qc, status | ATA_ERR);
3977 break;
1da177e4
LT		 3978 default:
3979 goto idle_irq;
3980 }
3981
3982 return 1; /* irq handled */
3983
3984idle_irq:
3985 ap->stats.idle_irq++;
3986
3987#ifdef ATA_IRQ_TRAP
3988 if ((ap->stats.idle_irq % 1000) == 0) {
3989 handled = 1;
3990 ata_irq_ack(ap, 0); /* debug trap */
3991 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3992 }
3993#endif
3994 return 0; /* irq not handled */
3995}
3996
3997/**
3998 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 3999 * @irq: irq line (unused)
4000 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4001 * @regs: unused
4002 *
0cba632b
JG		 4003 * Default interrupt handler for PCI IDE devices. Calls
4004 * ata_host_intr() for each port that is not disabled.
4005 *
1da177e4 4006 * LOCKING:
0cba632b 4007 * Obtains host_set lock during operation.
1da177e4
LT		 4008 *
4009 * RETURNS:
0cba632b 4010 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4011 *
4012 */
4013
4014irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4015{
4016 struct ata_host_set *host_set = dev_instance;
4017 unsigned int i;
4018 unsigned int handled = 0;
4019 unsigned long flags;
4020
4021 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4022 spin_lock_irqsave(&host_set->lock, flags);
4023
4024 for (i = 0; i < host_set->n_ports; i++) {
4025 struct ata_port *ap;
4026
4027 ap = host_set->ports[i];
c1389503 4028 if (ap &&
312f7da2 4029 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
1da177e4
LT		 4030 struct ata_queued_cmd *qc;
4031
4032 qc = ata_qc_from_tag(ap, ap->active_tag);
312f7da2 4033 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
21b1ed74 4034 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4035 handled |= ata_host_intr(ap, qc);
4036 }
4037 }
4038
4039 spin_unlock_irqrestore(&host_set->lock, flags);
4040
4041 return IRQ_RETVAL(handled);
4042}
4043
4044/**
f9997be9
AL		 4045 * ata_dataout_task - Write first data block to hardware
4046 * @_data: Port to which ATA/ATAPI device is attached.
1da177e4
LT		 4047 *
4048 * When device has indicated its readiness to accept
f9997be9
AL		 4049 * the data, this function sends out the CDB or
4050 * the first data block by PIO.
4051 * After this,
4052 * - If polling, ata_pio_task() handles the rest.
4053 * - Otherwise, interrupt handler takes over.
1da177e4
LT		 4054 *
4055 * LOCKING:
4056 * Kernel thread context (may sleep)
4057 */
4058
f9997be9 4059static void ata_dataout_task(void *_data)
1da177e4
LT		 4060{
4061 struct ata_port *ap = _data;
4062 struct ata_queued_cmd *qc;
4063 u8 status;
312f7da2 4064 unsigned long flags;
1da177e4
LT		 4065
4066 qc = ata_qc_from_tag(ap, ap->active_tag);
4067 assert(qc != NULL);
4068 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4069
4070 /* sleep-wait for BSY to clear */
4071 DPRINTK("busy wait\n");
f9997be9 4072 if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT))
1da177e4
LT		 4073 goto err_out;
4074
4075 /* make sure DRQ is set */
4076 status = ata_chk_status(ap);
4077 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
4078 goto err_out;
4079
312f7da2
AL		 4080 /* Send the CDB (atapi) or the first data block (ata pio out).
4081 * During the state transition, interrupt handler shouldn't
4082 * be invoked before the data transfer is complete and
4083 * hsm_task_state is changed. Hence, the following locking.
4084 */
4085 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 4086
86a7397c 4087 if (qc->tf.protocol == ATA_PROT_PIO) {
312f7da2
AL		 4088 /* PIO data out protocol.
4089 * send first data block.
4090 */
1da177e4 4091
312f7da2
AL		 4092 /* ata_pio_sector() might change the state to HSM_ST_LAST.
4093 * so, the state is changed here before ata_pio_sector().
4094 */
14be71f4 4095 ap->hsm_task_state = HSM_ST;
312f7da2
AL		 4096 ata_pio_sector(qc);
4097 ata_altstatus(ap); /* flush */
54f00389 4098 } else
86a7397c
AL		 4099 /* send CDB */
4100 atapi_send_cdb(ap, qc);
4101
54f00389
AL		 4102 /* if polling, ata_pio_task() handles the rest.
4103 * otherwise, interrupt handler takes over from here.
4104 */
4105 if (qc->tf.flags & ATA_TFLAG_POLLING)
4106 queue_work(ata_wq, &ap->pio_task);
1da177e4 4107
312f7da2
AL		 4108 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4109
1da177e4
LT		 4110 return;
4111
4112err_out:
312f7da2 4113 ata_pio_error(ap);
1da177e4
LT		 4114}
4115
0baab86b
EF		 4116
4117/**
4118 * ata_port_start - Set port up for dma.
4119 * @ap: Port to initialize
4120 *
4121 * Called just after data structures for each port are
4122 * initialized. Allocates space for PRD table.
4123 *
4124 * May be used as the port_start() entry in ata_port_operations.
4125 *
4126 * LOCKING:
4127 */
4128
1da177e4
LT		 4129int ata_port_start (struct ata_port *ap)
4130{
4131 struct device *dev = ap->host_set->dev;
4132
4133 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4134 if (!ap->prd)
4135 return -ENOMEM;
4136
4137 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4138
4139 return 0;
4140}
4141
0baab86b
EF		 4142
4143/**
4144 * ata_port_stop - Undo ata_port_start()
4145 * @ap: Port to shut down
4146 *
4147 * Frees the PRD table.
4148 *
4149 * May be used as the port_stop() entry in ata_port_operations.
4150 *
4151 * LOCKING:
4152 */
4153
1da177e4
LT		 4154void ata_port_stop (struct ata_port *ap)
4155{
4156 struct device *dev = ap->host_set->dev;
4157
4158 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4159}
4160
aa8f0dc6
JG		 4161void ata_host_stop (struct ata_host_set *host_set)
4162{
4163 if (host_set->mmio_base)
4164 iounmap(host_set->mmio_base);
4165}
4166
4167
1da177e4
LT		 4168/**
4169 * ata_host_remove - Unregister SCSI host structure with upper layers
4170 * @ap: Port to unregister
4171 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4172 *
4173 * LOCKING:
4174 */
4175
4176static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4177{
4178 struct Scsi_Host *sh = ap->host;
4179
4180 DPRINTK("ENTER\n");
4181
4182 if (do_unregister)
4183 scsi_remove_host(sh);
4184
4185 ap->ops->port_stop(ap);
4186}
4187
4188/**
4189 * ata_host_init - Initialize an ata_port structure
4190 * @ap: Structure to initialize
4191 * @host: associated SCSI mid-layer structure
4192 * @host_set: Collection of hosts to which @ap belongs
4193 * @ent: Probe information provided by low-level driver
4194 * @port_no: Port number associated with this ata_port
4195 *
0cba632b
JG		 4196 * Initialize a new ata_port structure, and its associated
4197 * scsi_host.
4198 *
1da177e4 4199 * LOCKING:
0cba632b 4200 * Inherited from caller.
1da177e4
LT		 4201 *
4202 */
4203
4204static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4205 struct ata_host_set *host_set,
4206 struct ata_probe_ent *ent, unsigned int port_no)
4207{
4208 unsigned int i;
4209
4210 host->max_id = 16;
4211 host->max_lun = 1;
4212 host->max_channel = 1;
4213 host->unique_id = ata_unique_id++;
4214 host->max_cmd_len = 12;
12413197 4215
1da177e4
LT		 4216 scsi_assign_lock(host, &host_set->lock);
4217
4218 ap->flags = ATA_FLAG_PORT_DISABLED;
4219 ap->id = host->unique_id;
4220 ap->host = host;
4221 ap->ctl = ATA_DEVCTL_OBS;
4222 ap->host_set = host_set;
4223 ap->port_no = port_no;
4224 ap->hard_port_no =
4225 ent->legacy_mode ? ent->hard_port_no : port_no;
4226 ap->pio_mask = ent->pio_mask;
4227 ap->mwdma_mask = ent->mwdma_mask;
4228 ap->udma_mask = ent->udma_mask;
4229 ap->flags |= ent->host_flags;
4230 ap->ops = ent->port_ops;
4231 ap->cbl = ATA_CBL_NONE;
4232 ap->active_tag = ATA_TAG_POISON;
4233 ap->last_ctl = 0xFF;
4234
f9997be9 4235 INIT_WORK(&ap->dataout_task, ata_dataout_task, ap);
1da177e4
LT		 4236 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4237
4238 for (i = 0; i < ATA_MAX_DEVICES; i++)
4239 ap->device[i].devno = i;
4240
4241#ifdef ATA_IRQ_TRAP
4242 ap->stats.unhandled_irq = 1;
4243 ap->stats.idle_irq = 1;
4244#endif
4245
4246 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4247}
4248
4249/**
4250 * ata_host_add - Attach low-level ATA driver to system
4251 * @ent: Information provided by low-level driver
4252 * @host_set: Collections of ports to which we add
4253 * @port_no: Port number associated with this host
4254 *
0cba632b
JG		 4255 * Attach low-level ATA driver to system.
4256 *
1da177e4 4257 * LOCKING:
0cba632b 4258 * PCI/etc. bus probe sem.
1da177e4
LT		 4259 *
4260 * RETURNS:
0cba632b 4261 * New ata_port on success, for NULL on error.
1da177e4
LT		 4262 *
4263 */
4264
4265static struct ata_port * ata_host_add(struct ata_probe_ent *ent,
4266 struct ata_host_set *host_set,
4267 unsigned int port_no)
4268{
4269 struct Scsi_Host *host;
4270 struct ata_port *ap;
4271 int rc;
4272
4273 DPRINTK("ENTER\n");
4274 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4275 if (!host)
4276 return NULL;
4277
4278 ap = (struct ata_port *) &host->hostdata[0];
4279
4280 ata_host_init(ap, host, host_set, ent, port_no);
4281
4282 rc = ap->ops->port_start(ap);
4283 if (rc)
4284 goto err_out;
4285
4286 return ap;
4287
4288err_out:
4289 scsi_host_put(host);
4290 return NULL;
4291}
4292
4293/**
0cba632b
JG		 4294 * ata_device_add - Register hardware device with ATA and SCSI layers
4295 * @ent: Probe information describing hardware device to be registered
4296 *
4297 * This function processes the information provided in the probe
4298 * information struct @ent, allocates the necessary ATA and SCSI
4299 * host information structures, initializes them, and registers
4300 * everything with requisite kernel subsystems.
4301 *
4302 * This function requests irqs, probes the ATA bus, and probes
4303 * the SCSI bus.
1da177e4
LT		 4304 *
4305 * LOCKING:
0cba632b 4306 * PCI/etc. bus probe sem.
1da177e4
LT		 4307 *
4308 * RETURNS:
0cba632b 4309 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4310 *
4311 */
4312
4313int ata_device_add(struct ata_probe_ent *ent)
4314{
4315 unsigned int count = 0, i;
4316 struct device *dev = ent->dev;
4317 struct ata_host_set *host_set;
4318
4319 DPRINTK("ENTER\n");
4320 /* alloc a container for our list of ATA ports (buses) */
4321 host_set = kmalloc(sizeof(struct ata_host_set) +
4322 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4323 if (!host_set)
4324 return 0;
4325 memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
4326 spin_lock_init(&host_set->lock);
4327
4328 host_set->dev = dev;
4329 host_set->n_ports = ent->n_ports;
4330 host_set->irq = ent->irq;
4331 host_set->mmio_base = ent->mmio_base;
4332 host_set->private_data = ent->private_data;
4333 host_set->ops = ent->port_ops;
4334
4335 /* register each port bound to this device */
4336 for (i = 0; i < ent->n_ports; i++) {
4337 struct ata_port *ap;
4338 unsigned long xfer_mode_mask;
4339
4340 ap = ata_host_add(ent, host_set, i);
4341 if (!ap)
4342 goto err_out;
4343
4344 host_set->ports[i] = ap;
4345 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4346 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4347 (ap->pio_mask << ATA_SHIFT_PIO);
4348
4349 /* print per-port info to dmesg */
4350 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4351 "bmdma 0x%lX irq %lu\n",
4352 ap->id,
4353 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4354 ata_mode_string(xfer_mode_mask),
4355 ap->ioaddr.cmd_addr,
4356 ap->ioaddr.ctl_addr,
4357 ap->ioaddr.bmdma_addr,
4358 ent->irq);
4359
4360 ata_chk_status(ap);
4361 host_set->ops->irq_clear(ap);
4362 count++;
4363 }
4364
4365 if (!count) {
4366 kfree(host_set);
4367 return 0;
4368 }
4369
4370 /* obtain irq, that is shared between channels */
4371 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4372 DRV_NAME, host_set))
4373 goto err_out;
4374
4375 /* perform each probe synchronously */
4376 DPRINTK("probe begin\n");
4377 for (i = 0; i < count; i++) {
4378 struct ata_port *ap;
4379 int rc;
4380
4381 ap = host_set->ports[i];
4382
4383 DPRINTK("ata%u: probe begin\n", ap->id);
4384 rc = ata_bus_probe(ap);
4385 DPRINTK("ata%u: probe end\n", ap->id);
4386
4387 if (rc) {
4388 /* FIXME: do something useful here?
4389 * Current libata behavior will
4390 * tear down everything when
4391 * the module is removed
4392 * or the h/w is unplugged.
4393 */
4394 }
4395
4396 rc = scsi_add_host(ap->host, dev);
4397 if (rc) {
4398 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4399 ap->id);
4400 /* FIXME: do something useful here */
4401 /* FIXME: handle unconditional calls to
4402 * scsi_scan_host and ata_host_remove, below,
4403 * at the very least
4404 */
4405 }
4406 }
4407
4408 /* probes are done, now scan each port's disk(s) */
4409 DPRINTK("probe begin\n");
4410 for (i = 0; i < count; i++) {
4411 struct ata_port *ap = host_set->ports[i];
4412
4413 scsi_scan_host(ap->host);
4414 }
4415
4416 dev_set_drvdata(dev, host_set);
4417
4418 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4419 return ent->n_ports; /* success */
4420
4421err_out:
4422 for (i = 0; i < count; i++) {
4423 ata_host_remove(host_set->ports[i], 1);
4424 scsi_host_put(host_set->ports[i]->host);
4425 }
4426 kfree(host_set);
4427 VPRINTK("EXIT, returning 0\n");
4428 return 0;
4429}
4430
17b14451
AC		 4431/**
4432 * ata_host_set_remove - PCI layer callback for device removal
4433 * @host_set: ATA host set that was removed
4434 *
4435 * Unregister all objects associated with this host set. Free those
4436 * objects.
4437 *
4438 * LOCKING:
4439 * Inherited from calling layer (may sleep).
4440 */
4441
4442
4443void ata_host_set_remove(struct ata_host_set *host_set)
4444{
4445 struct ata_port *ap;
4446 unsigned int i;
4447
4448 for (i = 0; i < host_set->n_ports; i++) {
4449 ap = host_set->ports[i];
4450 scsi_remove_host(ap->host);
4451 }
4452
4453 free_irq(host_set->irq, host_set);
4454
4455 for (i = 0; i < host_set->n_ports; i++) {
4456 ap = host_set->ports[i];
4457
4458 ata_scsi_release(ap->host);
4459
4460 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4461 struct ata_ioports *ioaddr = &ap->ioaddr;
4462
4463 if (ioaddr->cmd_addr == 0x1f0)
4464 release_region(0x1f0, 8);
4465 else if (ioaddr->cmd_addr == 0x170)
4466 release_region(0x170, 8);
4467 }
4468
4469 scsi_host_put(ap->host);
4470 }
4471
4472 if (host_set->ops->host_stop)
4473 host_set->ops->host_stop(host_set);
4474
4475 kfree(host_set);
4476}
4477
1da177e4
LT		 4478/**
4479 * ata_scsi_release - SCSI layer callback hook for host unload
4480 * @host: libata host to be unloaded
4481 *
4482 * Performs all duties necessary to shut down a libata port...
4483 * Kill port kthread, disable port, and release resources.
4484 *
4485 * LOCKING:
4486 * Inherited from SCSI layer.
4487 *
4488 * RETURNS:
4489 * One.
4490 */
4491
4492int ata_scsi_release(struct Scsi_Host *host)
4493{
4494 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4495
4496 DPRINTK("ENTER\n");
4497
4498 ap->ops->port_disable(ap);
4499 ata_host_remove(ap, 0);
4500
4501 DPRINTK("EXIT\n");
4502 return 1;
4503}
4504
4505/**
4506 * ata_std_ports - initialize ioaddr with standard port offsets.
4507 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4508 *
4509 * Utility function which initializes data_addr, error_addr,
4510 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4511 * device_addr, status_addr, and command_addr to standard offsets
4512 * relative to cmd_addr.
4513 *
4514 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4515 */
0baab86b 4516
1da177e4
LT		 4517void ata_std_ports(struct ata_ioports *ioaddr)
4518{
4519 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4520 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4521 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4522 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4523 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4524 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4525 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4526 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4527 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4528 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4529}
4530
4531static struct ata_probe_ent *
4532ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port)
4533{
4534 struct ata_probe_ent *probe_ent;
4535
4536 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
4537 if (!probe_ent) {
4538 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4539 kobject_name(&(dev->kobj)));
4540 return NULL;
4541 }
4542
4543 memset(probe_ent, 0, sizeof(*probe_ent));
4544
4545 INIT_LIST_HEAD(&probe_ent->node);
4546 probe_ent->dev = dev;
4547
4548 probe_ent->sht = port->sht;
4549 probe_ent->host_flags = port->host_flags;
4550 probe_ent->pio_mask = port->pio_mask;
4551 probe_ent->mwdma_mask = port->mwdma_mask;
4552 probe_ent->udma_mask = port->udma_mask;
4553 probe_ent->port_ops = port->port_ops;
4554
4555 return probe_ent;
4556}
4557
0baab86b
EF		 4558
4559
374b1873
JG		 4560#ifdef CONFIG_PCI
4561
4562void ata_pci_host_stop (struct ata_host_set *host_set)
4563{
4564 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4565
4566 pci_iounmap(pdev, host_set->mmio_base);
4567}
4568
0baab86b
EF		 4569/**
4570 * ata_pci_init_native_mode - Initialize native-mode driver
4571 * @pdev: pci device to be initialized
4572 * @port: array[2] of pointers to port info structures.
4573 *
4574 * Utility function which allocates and initializes an
4575 * ata_probe_ent structure for a standard dual-port
4576 * PIO-based IDE controller. The returned ata_probe_ent
4577 * structure can be passed to ata_device_add(). The returned
4578 * ata_probe_ent structure should then be freed with kfree().
4579 */
4580
1da177e4
LT		 4581struct ata_probe_ent *
4582ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port)
4583{
4584 struct ata_probe_ent *probe_ent =
4585 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4586 if (!probe_ent)
4587 return NULL;
4588
4589 probe_ent->n_ports = 2;
4590 probe_ent->irq = pdev->irq;
4591 probe_ent->irq_flags = SA_SHIRQ;
4592
4593 probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0);
4594 probe_ent->port[0].altstatus_addr =
4595 probe_ent->port[0].ctl_addr =
4596 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4597 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4598
4599 probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2);
4600 probe_ent->port[1].altstatus_addr =
4601 probe_ent->port[1].ctl_addr =
4602 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4603 probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4604
4605 ata_std_ports(&probe_ent->port[0]);
4606 ata_std_ports(&probe_ent->port[1]);
4607
4608 return probe_ent;
4609}
4610
4611static struct ata_probe_ent *
4612ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port,
4613 struct ata_probe_ent **ppe2)
4614{
4615 struct ata_probe_ent *probe_ent, *probe_ent2;
4616
4617 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4618 if (!probe_ent)
4619 return NULL;
4620 probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]);
4621 if (!probe_ent2) {
4622 kfree(probe_ent);
4623 return NULL;
4624 }
4625
4626 probe_ent->n_ports = 1;
4627 probe_ent->irq = 14;
4628
4629 probe_ent->hard_port_no = 0;
4630 probe_ent->legacy_mode = 1;
4631
4632 probe_ent2->n_ports = 1;
4633 probe_ent2->irq = 15;
4634
4635 probe_ent2->hard_port_no = 1;
4636 probe_ent2->legacy_mode = 1;
4637
4638 probe_ent->port[0].cmd_addr = 0x1f0;
4639 probe_ent->port[0].altstatus_addr =
4640 probe_ent->port[0].ctl_addr = 0x3f6;
4641 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4642
4643 probe_ent2->port[0].cmd_addr = 0x170;
4644 probe_ent2->port[0].altstatus_addr =
4645 probe_ent2->port[0].ctl_addr = 0x376;
4646 probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8;
4647
4648 ata_std_ports(&probe_ent->port[0]);
4649 ata_std_ports(&probe_ent2->port[0]);
4650
4651 *ppe2 = probe_ent2;
4652 return probe_ent;
4653}
4654
4655/**
4656 * ata_pci_init_one - Initialize/register PCI IDE host controller
4657 * @pdev: Controller to be initialized
4658 * @port_info: Information from low-level host driver
4659 * @n_ports: Number of ports attached to host controller
4660 *
0baab86b
EF		 4661 * This is a helper function which can be called from a driver's
4662 * xxx_init_one() probe function if the hardware uses traditional
4663 * IDE taskfile registers.
4664 *
4665 * This function calls pci_enable_device(), reserves its register
4666 * regions, sets the dma mask, enables bus master mode, and calls
4667 * ata_device_add()
4668 *
1da177e4
LT		 4669 * LOCKING:
4670 * Inherited from PCI layer (may sleep).
4671 *
4672 * RETURNS:
0cba632b 4673 * Zero on success, negative on errno-based value on error.
1da177e4
LT		 4674 *
4675 */
4676
4677int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4678 unsigned int n_ports)
4679{
4680 struct ata_probe_ent *probe_ent, *probe_ent2 = NULL;
4681 struct ata_port_info *port[2];
4682 u8 tmp8, mask;
4683 unsigned int legacy_mode = 0;
4684 int disable_dev_on_err = 1;
4685 int rc;
4686
4687 DPRINTK("ENTER\n");
4688
4689 port[0] = port_info[0];
4690 if (n_ports > 1)
4691 port[1] = port_info[1];
4692 else
4693 port[1] = port[0];
4694
4695 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4696 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4697 /* TODO: support transitioning to native mode? */
4698 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4699 mask = (1 << 2) | (1 << 0);
4700 if ((tmp8 & mask) != mask)
4701 legacy_mode = (1 << 3);
4702 }
4703
4704 /* FIXME... */
4705 if ((!legacy_mode) && (n_ports > 1)) {
4706 printk(KERN_ERR "ata: BUG: native mode, n_ports > 1\n");
4707 return -EINVAL;
4708 }
4709
4710 rc = pci_enable_device(pdev);
4711 if (rc)
4712 return rc;
4713
4714 rc = pci_request_regions(pdev, DRV_NAME);
4715 if (rc) {
4716 disable_dev_on_err = 0;
4717 goto err_out;
4718 }
4719
4720 if (legacy_mode) {
4721 if (!request_region(0x1f0, 8, "libata")) {
4722 struct resource *conflict, res;
4723 res.start = 0x1f0;
4724 res.end = 0x1f0 + 8 - 1;
4725 conflict = ____request_resource(&ioport_resource, &res);
4726 if (!strcmp(conflict->name, "libata"))
4727 legacy_mode |= (1 << 0);
4728 else {
4729 disable_dev_on_err = 0;
4730 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4731 }
4732 } else
4733 legacy_mode |= (1 << 0);
4734
4735 if (!request_region(0x170, 8, "libata")) {
4736 struct resource *conflict, res;
4737 res.start = 0x170;
4738 res.end = 0x170 + 8 - 1;
4739 conflict = ____request_resource(&ioport_resource, &res);
4740 if (!strcmp(conflict->name, "libata"))
4741 legacy_mode |= (1 << 1);
4742 else {
4743 disable_dev_on_err = 0;
4744 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4745 }
4746 } else
4747 legacy_mode |= (1 << 1);
4748 }
4749
4750 /* we have legacy mode, but all ports are unavailable */
4751 if (legacy_mode == (1 << 3)) {
4752 rc = -EBUSY;
4753 goto err_out_regions;
4754 }
4755
4756 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4757 if (rc)
4758 goto err_out_regions;
4759 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4760 if (rc)
4761 goto err_out_regions;
4762
4763 if (legacy_mode) {
4764 probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2);
4765 } else
4766 probe_ent = ata_pci_init_native_mode(pdev, port);
4767 if (!probe_ent) {
4768 rc = -ENOMEM;
4769 goto err_out_regions;
4770 }
4771
4772 pci_set_master(pdev);
4773
4774 /* FIXME: check ata_device_add return */
4775 if (legacy_mode) {
4776 if (legacy_mode & (1 << 0))
4777 ata_device_add(probe_ent);
4778 if (legacy_mode & (1 << 1))
4779 ata_device_add(probe_ent2);
4780 } else
4781 ata_device_add(probe_ent);
4782
4783 kfree(probe_ent);
4784 kfree(probe_ent2);
4785
4786 return 0;
4787
4788err_out_regions:
4789 if (legacy_mode & (1 << 0))
4790 release_region(0x1f0, 8);
4791 if (legacy_mode & (1 << 1))
4792 release_region(0x170, 8);
4793 pci_release_regions(pdev);
4794err_out:
4795 if (disable_dev_on_err)
4796 pci_disable_device(pdev);
4797 return rc;
4798}
4799
4800/**
4801 * ata_pci_remove_one - PCI layer callback for device removal
4802 * @pdev: PCI device that was removed
4803 *
4804 * PCI layer indicates to libata via this hook that
4805 * hot-unplug or module unload event has occured.
4806 * Handle this by unregistering all objects associated
4807 * with this PCI device. Free those objects. Then finally
4808 * release PCI resources and disable device.
4809 *
4810 * LOCKING:
4811 * Inherited from PCI layer (may sleep).
4812 */
4813
4814void ata_pci_remove_one (struct pci_dev *pdev)
4815{
4816 struct device *dev = pci_dev_to_dev(pdev);
4817 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4818
17b14451 4819 ata_host_set_remove(host_set);
1da177e4
LT		 4820 pci_release_regions(pdev);
4821 pci_disable_device(pdev);
4822 dev_set_drvdata(dev, NULL);
4823}
4824
4825/* move to PCI subsystem */
4826int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits)
4827{
4828 unsigned long tmp = 0;
4829
4830 switch (bits->width) {
4831 case 1: {
4832 u8 tmp8 = 0;
4833 pci_read_config_byte(pdev, bits->reg, &tmp8);
4834 tmp = tmp8;
4835 break;
4836 }
4837 case 2: {
4838 u16 tmp16 = 0;
4839 pci_read_config_word(pdev, bits->reg, &tmp16);
4840 tmp = tmp16;
4841 break;
4842 }
4843 case 4: {
4844 u32 tmp32 = 0;
4845 pci_read_config_dword(pdev, bits->reg, &tmp32);
4846 tmp = tmp32;
4847 break;
4848 }
4849
4850 default:
4851 return -EINVAL;
4852 }
4853
4854 tmp &= bits->mask;
4855
4856 return (tmp == bits->val) ? 1 : 0;
4857}
4858#endif /* CONFIG_PCI */
4859
4860
1da177e4
LT		 4861static int __init ata_init(void)
4862{
4863 ata_wq = create_workqueue("ata");
4864 if (!ata_wq)
4865 return -ENOMEM;
4866
4867 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4868 return 0;
4869}
4870
4871static void __exit ata_exit(void)
4872{
4873 destroy_workqueue(ata_wq);
4874}
4875
4876module_init(ata_init);
4877module_exit(ata_exit);
4878
4879/*
4880 * libata is essentially a library of internal helper functions for
4881 * low-level ATA host controller drivers. As such, the API/ABI is
4882 * likely to change as new drivers are added and updated.
4883 * Do not depend on ABI/API stability.
4884 */
4885
4886EXPORT_SYMBOL_GPL(ata_std_bios_param);
4887EXPORT_SYMBOL_GPL(ata_std_ports);
4888EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 4889EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 4890EXPORT_SYMBOL_GPL(ata_sg_init);
4891EXPORT_SYMBOL_GPL(ata_sg_init_one);
4892EXPORT_SYMBOL_GPL(ata_qc_complete);
4893EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4894EXPORT_SYMBOL_GPL(ata_eng_timeout);
4895EXPORT_SYMBOL_GPL(ata_tf_load);
4896EXPORT_SYMBOL_GPL(ata_tf_read);
4897EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4898EXPORT_SYMBOL_GPL(ata_std_dev_select);
4899EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4900EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4901EXPORT_SYMBOL_GPL(ata_check_status);
4902EXPORT_SYMBOL_GPL(ata_altstatus);
4903EXPORT_SYMBOL_GPL(ata_chk_err);
4904EXPORT_SYMBOL_GPL(ata_exec_command);
4905EXPORT_SYMBOL_GPL(ata_port_start);
4906EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 4907EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 4908EXPORT_SYMBOL_GPL(ata_interrupt);
4909EXPORT_SYMBOL_GPL(ata_qc_prep);
4910EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4911EXPORT_SYMBOL_GPL(ata_bmdma_start);
4912EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4913EXPORT_SYMBOL_GPL(ata_bmdma_status);
4914EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4915EXPORT_SYMBOL_GPL(ata_port_probe);
4916EXPORT_SYMBOL_GPL(sata_phy_reset);
4917EXPORT_SYMBOL_GPL(__sata_phy_reset);
4918EXPORT_SYMBOL_GPL(ata_bus_reset);
4919EXPORT_SYMBOL_GPL(ata_port_disable);
4920EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4921EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4922EXPORT_SYMBOL_GPL(ata_scsi_error);
4923EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4924EXPORT_SYMBOL_GPL(ata_scsi_release);
4925EXPORT_SYMBOL_GPL(ata_host_intr);
4926EXPORT_SYMBOL_GPL(ata_dev_classify);
4927EXPORT_SYMBOL_GPL(ata_dev_id_string);
6f2f3812 4928EXPORT_SYMBOL_GPL(ata_dev_config);
1da177e4
LT		 4929EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4930
4931#ifdef CONFIG_PCI
4932EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 4933EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 4934EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4935EXPORT_SYMBOL_GPL(ata_pci_init_one);
4936EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4937#endif /* CONFIG_PCI */
Linux kernel - Deliverables
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