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Merge branch 'upstream-fixes'
[deliverable/linux.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f
TH		 64static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
a6d5a51c
TH		 68static unsigned int ata_dev_xfermask(struct ata_port *ap,
69 struct ata_device *dev);
1da177e4
LT		 70
71static unsigned int ata_unique_id = 1;
72static struct workqueue_struct *ata_wq;
73
1623c81e
JG		 74int atapi_enabled = 0;
75module_param(atapi_enabled, int, 0444);
76MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
77
c3c013a2
JG		 78int libata_fua = 0;
79module_param_named(fua, libata_fua, int, 0444);
80MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
81
1da177e4
LT		 82MODULE_AUTHOR("Jeff Garzik");
83MODULE_DESCRIPTION("Library module for ATA devices");
84MODULE_LICENSE("GPL");
85MODULE_VERSION(DRV_VERSION);
86
0baab86b 87
1da177e4
LT		 88/**
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
93 *
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
96 *
97 * LOCKING:
98 * Inherited from caller.
99 */
100
057ace5e 101void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 102{
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
108
109 fis[4] = tf->lbal;
110 fis[5] = tf->lbam;
111 fis[6] = tf->lbah;
112 fis[7] = tf->device;
113
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
118
119 fis[12] = tf->nsect;
120 fis[13] = tf->hob_nsect;
121 fis[14] = 0;
122 fis[15] = tf->ctl;
123
124 fis[16] = 0;
125 fis[17] = 0;
126 fis[18] = 0;
127 fis[19] = 0;
128}
129
130/**
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
134 *
e12a1be6 135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 136 *
137 * LOCKING:
138 * Inherited from caller.
139 */
140
057ace5e 141void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 142{
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
145
146 tf->lbal = fis[4];
147 tf->lbam = fis[5];
148 tf->lbah = fis[6];
149 tf->device = fis[7];
150
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
154
155 tf->nsect = fis[12];
156 tf->hob_nsect = fis[13];
157}
158
8cbd6df1
AL		 159static const u8 ata_rw_cmds[] = {
160 /* pio multi */
161 ATA_CMD_READ_MULTI,
162 ATA_CMD_WRITE_MULTI,
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 165 0,
166 0,
167 0,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 169 /* pio */
170 ATA_CMD_PIO_READ,
171 ATA_CMD_PIO_WRITE,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 174 0,
175 0,
176 0,
177 0,
8cbd6df1
AL		 178 /* dma */
179 ATA_CMD_READ,
180 ATA_CMD_WRITE,
181 ATA_CMD_READ_EXT,
9a3dccc4
TH		 182 ATA_CMD_WRITE_EXT,
183 0,
184 0,
185 0,
186 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 187};
1da177e4
LT		 188
189/**
8cbd6df1
AL		 190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
1da177e4 192 *
8cbd6df1
AL		 193 * Examine the device configuration and tf->flags to calculate
194 * the proper read/write commands and protocol to use.
1da177e4
LT		 195 *
196 * LOCKING:
197 * caller.
198 */
9a3dccc4 199int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 200{
8cbd6df1
AL		 201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
9a3dccc4 203 u8 cmd;
1da177e4 204
9a3dccc4 205 int index, fua, lba48, write;
8cbd6df1 206
9a3dccc4 207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 210
8cbd6df1
AL		 211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
9a3dccc4 213 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
0565c26d 217 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 218 } else {
219 tf->protocol = ATA_PROT_DMA;
9a3dccc4 220 index = 16;
8cbd6df1 221 }
1da177e4 222
9a3dccc4
TH		 223 cmd = ata_rw_cmds[index + fua + lba48 + write];
224 if (cmd) {
225 tf->command = cmd;
226 return 0;
227 }
228 return -1;
1da177e4
LT		 229}
230
cb95d562
TH		 231/**
232 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
233 * @pio_mask: pio_mask
234 * @mwdma_mask: mwdma_mask
235 * @udma_mask: udma_mask
236 *
237 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
238 * unsigned int xfer_mask.
239 *
240 * LOCKING:
241 * None.
242 *
243 * RETURNS:
244 * Packed xfer_mask.
245 */
246static unsigned int ata_pack_xfermask(unsigned int pio_mask,
247 unsigned int mwdma_mask,
248 unsigned int udma_mask)
249{
250 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
251 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
252 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
253}
254
255static const struct ata_xfer_ent {
256 unsigned int shift, bits;
257 u8 base;
258} ata_xfer_tbl[] = {
259 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
260 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
261 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
262 { -1, },
263};
264
265/**
266 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
267 * @xfer_mask: xfer_mask of interest
268 *
269 * Return matching XFER_* value for @xfer_mask. Only the highest
270 * bit of @xfer_mask is considered.
271 *
272 * LOCKING:
273 * None.
274 *
275 * RETURNS:
276 * Matching XFER_* value, 0 if no match found.
277 */
278static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
279{
280 int highbit = fls(xfer_mask) - 1;
281 const struct ata_xfer_ent *ent;
282
283 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
284 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
285 return ent->base + highbit - ent->shift;
286 return 0;
287}
288
289/**
290 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
291 * @xfer_mode: XFER_* of interest
292 *
293 * Return matching xfer_mask for @xfer_mode.
294 *
295 * LOCKING:
296 * None.
297 *
298 * RETURNS:
299 * Matching xfer_mask, 0 if no match found.
300 */
301static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
302{
303 const struct ata_xfer_ent *ent;
304
305 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
306 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
307 return 1 << (ent->shift + xfer_mode - ent->base);
308 return 0;
309}
310
311/**
312 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
313 * @xfer_mode: XFER_* of interest
314 *
315 * Return matching xfer_shift for @xfer_mode.
316 *
317 * LOCKING:
318 * None.
319 *
320 * RETURNS:
321 * Matching xfer_shift, -1 if no match found.
322 */
323static int ata_xfer_mode2shift(unsigned int xfer_mode)
324{
325 const struct ata_xfer_ent *ent;
326
327 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
328 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
329 return ent->shift;
330 return -1;
331}
332
1da177e4 333/**
1da7b0d0
TH		 334 * ata_mode_string - convert xfer_mask to string
335 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 336 *
337 * Determine string which represents the highest speed
1da7b0d0 338 * (highest bit in @modemask).
1da177e4
LT		 339 *
340 * LOCKING:
341 * None.
342 *
343 * RETURNS:
344 * Constant C string representing highest speed listed in
1da7b0d0 345 * @mode_mask, or the constant C string "<n/a>".
1da177e4 346 */
1da7b0d0 347static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 348{
75f554bc
TH		 349 static const char * const xfer_mode_str[] = {
350 "PIO0",
351 "PIO1",
352 "PIO2",
353 "PIO3",
354 "PIO4",
355 "MWDMA0",
356 "MWDMA1",
357 "MWDMA2",
358 "UDMA/16",
359 "UDMA/25",
360 "UDMA/33",
361 "UDMA/44",
362 "UDMA/66",
363 "UDMA/100",
364 "UDMA/133",
365 "UDMA7",
366 };
1da7b0d0 367 int highbit;
1da177e4 368
1da7b0d0
TH		 369 highbit = fls(xfer_mask) - 1;
370 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
371 return xfer_mode_str[highbit];
1da177e4 372 return "<n/a>";
1da177e4
LT		 373}
374
375/**
376 * ata_pio_devchk - PATA device presence detection
377 * @ap: ATA channel to examine
378 * @device: Device to examine (starting at zero)
379 *
380 * This technique was originally described in
381 * Hale Landis's ATADRVR (www.ata-atapi.com), and
382 * later found its way into the ATA/ATAPI spec.
383 *
384 * Write a pattern to the ATA shadow registers,
385 * and if a device is present, it will respond by
386 * correctly storing and echoing back the
387 * ATA shadow register contents.
388 *
389 * LOCKING:
390 * caller.
391 */
392
393static unsigned int ata_pio_devchk(struct ata_port *ap,
394 unsigned int device)
395{
396 struct ata_ioports *ioaddr = &ap->ioaddr;
397 u8 nsect, lbal;
398
399 ap->ops->dev_select(ap, device);
400
401 outb(0x55, ioaddr->nsect_addr);
402 outb(0xaa, ioaddr->lbal_addr);
403
404 outb(0xaa, ioaddr->nsect_addr);
405 outb(0x55, ioaddr->lbal_addr);
406
407 outb(0x55, ioaddr->nsect_addr);
408 outb(0xaa, ioaddr->lbal_addr);
409
410 nsect = inb(ioaddr->nsect_addr);
411 lbal = inb(ioaddr->lbal_addr);
412
413 if ((nsect == 0x55) && (lbal == 0xaa))
414 return 1; /* we found a device */
415
416 return 0; /* nothing found */
417}
418
419/**
420 * ata_mmio_devchk - PATA device presence detection
421 * @ap: ATA channel to examine
422 * @device: Device to examine (starting at zero)
423 *
424 * This technique was originally described in
425 * Hale Landis's ATADRVR (www.ata-atapi.com), and
426 * later found its way into the ATA/ATAPI spec.
427 *
428 * Write a pattern to the ATA shadow registers,
429 * and if a device is present, it will respond by
430 * correctly storing and echoing back the
431 * ATA shadow register contents.
432 *
433 * LOCKING:
434 * caller.
435 */
436
437static unsigned int ata_mmio_devchk(struct ata_port *ap,
438 unsigned int device)
439{
440 struct ata_ioports *ioaddr = &ap->ioaddr;
441 u8 nsect, lbal;
442
443 ap->ops->dev_select(ap, device);
444
445 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
446 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
447
448 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
449 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
450
451 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
452 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
453
454 nsect = readb((void __iomem *) ioaddr->nsect_addr);
455 lbal = readb((void __iomem *) ioaddr->lbal_addr);
456
457 if ((nsect == 0x55) && (lbal == 0xaa))
458 return 1; /* we found a device */
459
460 return 0; /* nothing found */
461}
462
463/**
464 * ata_devchk - PATA device presence detection
465 * @ap: ATA channel to examine
466 * @device: Device to examine (starting at zero)
467 *
468 * Dispatch ATA device presence detection, depending
469 * on whether we are using PIO or MMIO to talk to the
470 * ATA shadow registers.
471 *
472 * LOCKING:
473 * caller.
474 */
475
476static unsigned int ata_devchk(struct ata_port *ap,
477 unsigned int device)
478{
479 if (ap->flags & ATA_FLAG_MMIO)
480 return ata_mmio_devchk(ap, device);
481 return ata_pio_devchk(ap, device);
482}
483
484/**
485 * ata_dev_classify - determine device type based on ATA-spec signature
486 * @tf: ATA taskfile register set for device to be identified
487 *
488 * Determine from taskfile register contents whether a device is
489 * ATA or ATAPI, as per "Signature and persistence" section
490 * of ATA/PI spec (volume 1, sect 5.14).
491 *
492 * LOCKING:
493 * None.
494 *
495 * RETURNS:
496 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
497 * the event of failure.
498 */
499
057ace5e 500unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 501{
502 /* Apple's open source Darwin code hints that some devices only
503 * put a proper signature into the LBA mid/high registers,
504 * So, we only check those. It's sufficient for uniqueness.
505 */
506
507 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
508 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
509 DPRINTK("found ATA device by sig\n");
510 return ATA_DEV_ATA;
511 }
512
513 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
514 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
515 DPRINTK("found ATAPI device by sig\n");
516 return ATA_DEV_ATAPI;
517 }
518
519 DPRINTK("unknown device\n");
520 return ATA_DEV_UNKNOWN;
521}
522
523/**
524 * ata_dev_try_classify - Parse returned ATA device signature
525 * @ap: ATA channel to examine
526 * @device: Device to examine (starting at zero)
b4dc7623 527 * @r_err: Value of error register on completion
1da177e4
LT		 528 *
529 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
530 * an ATA/ATAPI-defined set of values is placed in the ATA
531 * shadow registers, indicating the results of device detection
532 * and diagnostics.
533 *
534 * Select the ATA device, and read the values from the ATA shadow
535 * registers. Then parse according to the Error register value,
536 * and the spec-defined values examined by ata_dev_classify().
537 *
538 * LOCKING:
539 * caller.
b4dc7623
TH		 540 *
541 * RETURNS:
542 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 543 */
544
b4dc7623
TH		 545static unsigned int
546ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 547{
1da177e4
LT		 548 struct ata_taskfile tf;
549 unsigned int class;
550 u8 err;
551
552 ap->ops->dev_select(ap, device);
553
554 memset(&tf, 0, sizeof(tf));
555
1da177e4 556 ap->ops->tf_read(ap, &tf);
0169e284 557 err = tf.feature;
b4dc7623
TH		 558 if (r_err)
559 *r_err = err;
1da177e4
LT		 560
561 /* see if device passed diags */
562 if (err == 1)
563 /* do nothing */ ;
564 else if ((device == 0) && (err == 0x81))
565 /* do nothing */ ;
566 else
b4dc7623 567 return ATA_DEV_NONE;
1da177e4 568
b4dc7623 569 /* determine if device is ATA or ATAPI */
1da177e4 570 class = ata_dev_classify(&tf);
b4dc7623 571
1da177e4 572 if (class == ATA_DEV_UNKNOWN)
b4dc7623 573 return ATA_DEV_NONE;
1da177e4 574 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 575 return ATA_DEV_NONE;
576 return class;
1da177e4
LT		 577}
578
579/**
6a62a04d 580 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 581 * @id: IDENTIFY DEVICE results we will examine
582 * @s: string into which data is output
583 * @ofs: offset into identify device page
584 * @len: length of string to return. must be an even number.
585 *
586 * The strings in the IDENTIFY DEVICE page are broken up into
587 * 16-bit chunks. Run through the string, and output each
588 * 8-bit chunk linearly, regardless of platform.
589 *
590 * LOCKING:
591 * caller.
592 */
593
6a62a04d
TH		 594void ata_id_string(const u16 *id, unsigned char *s,
595 unsigned int ofs, unsigned int len)
1da177e4
LT		 596{
597 unsigned int c;
598
599 while (len > 0) {
600 c = id[ofs] >> 8;
601 *s = c;
602 s++;
603
604 c = id[ofs] & 0xff;
605 *s = c;
606 s++;
607
608 ofs++;
609 len -= 2;
610 }
611}
612
0e949ff3 613/**
6a62a04d 614 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 615 * @id: IDENTIFY DEVICE results we will examine
616 * @s: string into which data is output
617 * @ofs: offset into identify device page
618 * @len: length of string to return. must be an odd number.
619 *
6a62a04d 620 * This function is identical to ata_id_string except that it
0e949ff3
TH		 621 * trims trailing spaces and terminates the resulting string with
622 * null. @len must be actual maximum length (even number) + 1.
623 *
624 * LOCKING:
625 * caller.
626 */
6a62a04d
TH		 627void ata_id_c_string(const u16 *id, unsigned char *s,
628 unsigned int ofs, unsigned int len)
0e949ff3
TH		 629{
630 unsigned char *p;
631
632 WARN_ON(!(len & 1));
633
6a62a04d 634 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 635
636 p = s + strnlen(s, len - 1);
637 while (p > s && p[-1] == ' ')
638 p--;
639 *p = '\0';
640}
0baab86b 641
2940740b
TH		 642static u64 ata_id_n_sectors(const u16 *id)
643{
644 if (ata_id_has_lba(id)) {
645 if (ata_id_has_lba48(id))
646 return ata_id_u64(id, 100);
647 else
648 return ata_id_u32(id, 60);
649 } else {
650 if (ata_id_current_chs_valid(id))
651 return ata_id_u32(id, 57);
652 else
653 return id[1] * id[3] * id[6];
654 }
655}
656
0baab86b
EF		 657/**
658 * ata_noop_dev_select - Select device 0/1 on ATA bus
659 * @ap: ATA channel to manipulate
660 * @device: ATA device (numbered from zero) to select
661 *
662 * This function performs no actual function.
663 *
664 * May be used as the dev_select() entry in ata_port_operations.
665 *
666 * LOCKING:
667 * caller.
668 */
1da177e4
LT		 669void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
670{
671}
672
0baab86b 673
1da177e4
LT		 674/**
675 * ata_std_dev_select - Select device 0/1 on ATA bus
676 * @ap: ATA channel to manipulate
677 * @device: ATA device (numbered from zero) to select
678 *
679 * Use the method defined in the ATA specification to
680 * make either device 0, or device 1, active on the
0baab86b
EF		 681 * ATA channel. Works with both PIO and MMIO.
682 *
683 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 684 *
685 * LOCKING:
686 * caller.
687 */
688
689void ata_std_dev_select (struct ata_port *ap, unsigned int device)
690{
691 u8 tmp;
692
693 if (device == 0)
694 tmp = ATA_DEVICE_OBS;
695 else
696 tmp = ATA_DEVICE_OBS | ATA_DEV1;
697
698 if (ap->flags & ATA_FLAG_MMIO) {
699 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
700 } else {
701 outb(tmp, ap->ioaddr.device_addr);
702 }
703 ata_pause(ap); /* needed; also flushes, for mmio */
704}
705
706/**
707 * ata_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 * @wait: non-zero to wait for Status register BSY bit to clear
711 * @can_sleep: non-zero if context allows sleeping
712 *
713 * Use the method defined in the ATA specification to
714 * make either device 0, or device 1, active on the
715 * ATA channel.
716 *
717 * This is a high-level version of ata_std_dev_select(),
718 * which additionally provides the services of inserting
719 * the proper pauses and status polling, where needed.
720 *
721 * LOCKING:
722 * caller.
723 */
724
725void ata_dev_select(struct ata_port *ap, unsigned int device,
726 unsigned int wait, unsigned int can_sleep)
727{
728 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
729 ap->id, device, wait);
730
731 if (wait)
732 ata_wait_idle(ap);
733
734 ap->ops->dev_select(ap, device);
735
736 if (wait) {
737 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
738 msleep(150);
739 ata_wait_idle(ap);
740 }
741}
742
743/**
744 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 745 * @id: IDENTIFY DEVICE page to dump
1da177e4 746 *
0bd3300a
TH		 747 * Dump selected 16-bit words from the given IDENTIFY DEVICE
748 * page.
1da177e4
LT		 749 *
750 * LOCKING:
751 * caller.
752 */
753
0bd3300a 754static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 755{
756 DPRINTK("49==0x%04x "
757 "53==0x%04x "
758 "63==0x%04x "
759 "64==0x%04x "
760 "75==0x%04x \n",
0bd3300a
TH		 761 id[49],
762 id[53],
763 id[63],
764 id[64],
765 id[75]);
1da177e4
LT		 766 DPRINTK("80==0x%04x "
767 "81==0x%04x "
768 "82==0x%04x "
769 "83==0x%04x "
770 "84==0x%04x \n",
0bd3300a
TH		 771 id[80],
772 id[81],
773 id[82],
774 id[83],
775 id[84]);
1da177e4
LT		 776 DPRINTK("88==0x%04x "
777 "93==0x%04x\n",
0bd3300a
TH		 778 id[88],
779 id[93]);
1da177e4
LT		 780}
781
cb95d562
TH		 782/**
783 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
784 * @id: IDENTIFY data to compute xfer mask from
785 *
786 * Compute the xfermask for this device. This is not as trivial
787 * as it seems if we must consider early devices correctly.
788 *
789 * FIXME: pre IDE drive timing (do we care ?).
790 *
791 * LOCKING:
792 * None.
793 *
794 * RETURNS:
795 * Computed xfermask
796 */
797static unsigned int ata_id_xfermask(const u16 *id)
798{
799 unsigned int pio_mask, mwdma_mask, udma_mask;
800
801 /* Usual case. Word 53 indicates word 64 is valid */
802 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
803 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
804 pio_mask <<= 3;
805 pio_mask |= 0x7;
806 } else {
807 /* If word 64 isn't valid then Word 51 high byte holds
808 * the PIO timing number for the maximum. Turn it into
809 * a mask.
810 */
811 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
812
813 /* But wait.. there's more. Design your standards by
814 * committee and you too can get a free iordy field to
815 * process. However its the speeds not the modes that
816 * are supported... Note drivers using the timing API
817 * will get this right anyway
818 */
819 }
820
821 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
822 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
823
824 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
825}
826
86e45b6b
TH		 827/**
828 * ata_port_queue_task - Queue port_task
829 * @ap: The ata_port to queue port_task for
830 *
831 * Schedule @fn(@data) for execution after @delay jiffies using
832 * port_task. There is one port_task per port and it's the
833 * user(low level driver)'s responsibility to make sure that only
834 * one task is active at any given time.
835 *
836 * libata core layer takes care of synchronization between
837 * port_task and EH. ata_port_queue_task() may be ignored for EH
838 * synchronization.
839 *
840 * LOCKING:
841 * Inherited from caller.
842 */
843void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
844 unsigned long delay)
845{
846 int rc;
847
2e755f68 848 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 849 return;
850
851 PREPARE_WORK(&ap->port_task, fn, data);
852
853 if (!delay)
854 rc = queue_work(ata_wq, &ap->port_task);
855 else
856 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
857
858 /* rc == 0 means that another user is using port task */
859 WARN_ON(rc == 0);
860}
861
862/**
863 * ata_port_flush_task - Flush port_task
864 * @ap: The ata_port to flush port_task for
865 *
866 * After this function completes, port_task is guranteed not to
867 * be running or scheduled.
868 *
869 * LOCKING:
870 * Kernel thread context (may sleep)
871 */
872void ata_port_flush_task(struct ata_port *ap)
873{
874 unsigned long flags;
875
876 DPRINTK("ENTER\n");
877
878 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 879 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 880 spin_unlock_irqrestore(&ap->host_set->lock, flags);
881
882 DPRINTK("flush #1\n");
883 flush_workqueue(ata_wq);
884
885 /*
886 * At this point, if a task is running, it's guaranteed to see
887 * the FLUSH flag; thus, it will never queue pio tasks again.
888 * Cancel and flush.
889 */
890 if (!cancel_delayed_work(&ap->port_task)) {
891 DPRINTK("flush #2\n");
892 flush_workqueue(ata_wq);
893 }
894
895 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 896 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 897 spin_unlock_irqrestore(&ap->host_set->lock, flags);
898
899 DPRINTK("EXIT\n");
900}
901
77853bf2 902void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 903{
77853bf2 904 struct completion *waiting = qc->private_data;
a2a7a662 905
77853bf2 906 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 907 complete(waiting);
a2a7a662
TH		 908}
909
910/**
911 * ata_exec_internal - execute libata internal command
912 * @ap: Port to which the command is sent
913 * @dev: Device to which the command is sent
914 * @tf: Taskfile registers for the command and the result
915 * @dma_dir: Data tranfer direction of the command
916 * @buf: Data buffer of the command
917 * @buflen: Length of data buffer
918 *
919 * Executes libata internal command with timeout. @tf contains
920 * command on entry and result on return. Timeout and error
921 * conditions are reported via return value. No recovery action
922 * is taken after a command times out. It's caller's duty to
923 * clean up after timeout.
924 *
925 * LOCKING:
926 * None. Should be called with kernel context, might sleep.
927 */
928
929static unsigned
930ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
931 struct ata_taskfile *tf,
932 int dma_dir, void *buf, unsigned int buflen)
933{
934 u8 command = tf->command;
935 struct ata_queued_cmd *qc;
936 DECLARE_COMPLETION(wait);
937 unsigned long flags;
77853bf2 938 unsigned int err_mask;
a2a7a662
TH		 939
940 spin_lock_irqsave(&ap->host_set->lock, flags);
941
942 qc = ata_qc_new_init(ap, dev);
943 BUG_ON(qc == NULL);
944
945 qc->tf = *tf;
946 qc->dma_dir = dma_dir;
947 if (dma_dir != DMA_NONE) {
948 ata_sg_init_one(qc, buf, buflen);
949 qc->nsect = buflen / ATA_SECT_SIZE;
950 }
951
77853bf2 952 qc->private_data = &wait;
a2a7a662
TH		 953 qc->complete_fn = ata_qc_complete_internal;
954
9a3d9eb0
TH		 955 qc->err_mask = ata_qc_issue(qc);
956 if (qc->err_mask)
8e436af9 957 ata_qc_complete(qc);
a2a7a662
TH		 958
959 spin_unlock_irqrestore(&ap->host_set->lock, flags);
960
961 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
962 spin_lock_irqsave(&ap->host_set->lock, flags);
963
964 /* We're racing with irq here. If we lose, the
965 * following test prevents us from completing the qc
966 * again. If completion irq occurs after here but
967 * before the caller cleans up, it will result in a
968 * spurious interrupt. We can live with that.
969 */
77853bf2 970 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 971 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 972 ata_qc_complete(qc);
973 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
974 ap->id, command);
975 }
976
977 spin_unlock_irqrestore(&ap->host_set->lock, flags);
978 }
979
77853bf2
TH		 980 *tf = qc->tf;
981 err_mask = qc->err_mask;
982
983 ata_qc_free(qc);
984
985 return err_mask;
a2a7a662
TH		 986}
987
1bc4ccff
AC		 988/**
989 * ata_pio_need_iordy - check if iordy needed
990 * @adev: ATA device
991 *
992 * Check if the current speed of the device requires IORDY. Used
993 * by various controllers for chip configuration.
994 */
995
996unsigned int ata_pio_need_iordy(const struct ata_device *adev)
997{
998 int pio;
999 int speed = adev->pio_mode - XFER_PIO_0;
1000
1001 if (speed < 2)
1002 return 0;
1003 if (speed > 2)
1004 return 1;
1005
1006 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1007
1008 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1009 pio = adev->id[ATA_ID_EIDE_PIO];
1010 /* Is the speed faster than the drive allows non IORDY ? */
1011 if (pio) {
1012 /* This is cycle times not frequency - watch the logic! */
1013 if (pio > 240) /* PIO2 is 240nS per cycle */
1014 return 1;
1015 return 0;
1016 }
1017 }
1018 return 0;
1019}
1020
1da177e4 1021/**
49016aca
TH		 1022 * ata_dev_read_id - Read ID data from the specified device
1023 * @ap: port on which target device resides
1024 * @dev: target device
1025 * @p_class: pointer to class of the target device (may be changed)
1026 * @post_reset: is this read ID post-reset?
d9572b1d 1027 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1028 *
49016aca
TH		 1029 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1030 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1031 * devices. This function also takes care of EDD signature
1032 * misreporting (to be removed once EDD support is gone) and
1033 * issues ATA_CMD_INIT_DEV_PARAMS for pre-ATA4 drives.
1da177e4
LT		 1034 *
1035 * LOCKING:
49016aca
TH		 1036 * Kernel thread context (may sleep)
1037 *
1038 * RETURNS:
1039 * 0 on success, -errno otherwise.
1da177e4 1040 */
49016aca 1041static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1042 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1043{
49016aca 1044 unsigned int class = *p_class;
1da177e4 1045 unsigned int using_edd;
a0123703 1046 struct ata_taskfile tf;
49016aca 1047 unsigned int err_mask = 0;
d9572b1d 1048 u16 *id;
49016aca
TH		 1049 const char *reason;
1050 int rc;
1da177e4 1051
49016aca 1052 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1053
61eb066a
TH		 1054 if (ap->ops->probe_reset ||
1055 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1da177e4
LT		 1056 using_edd = 0;
1057 else
1058 using_edd = 1;
1059
49016aca 1060 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1061
d9572b1d
TH		 1062 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1063 if (id == NULL) {
1064 rc = -ENOMEM;
1065 reason = "out of memory";
1066 goto err_out;
1067 }
1068
49016aca
TH		 1069 retry:
1070 ata_tf_init(ap, &tf, dev->devno);
a0123703 1071
49016aca
TH		 1072 switch (class) {
1073 case ATA_DEV_ATA:
a0123703 1074 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1075 break;
1076 case ATA_DEV_ATAPI:
a0123703 1077 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1078 break;
1079 default:
1080 rc = -ENODEV;
1081 reason = "unsupported class";
1082 goto err_out;
1da177e4
LT		 1083 }
1084
a0123703 1085 tf.protocol = ATA_PROT_PIO;
1da177e4 1086
a0123703 1087 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1088 id, sizeof(id[0]) * ATA_ID_WORDS);
1da177e4 1089
a0123703 1090 if (err_mask) {
49016aca
TH		 1091 rc = -EIO;
1092 reason = "I/O error";
1093
a0123703
TH		 1094 if (err_mask & ~AC_ERR_DEV)
1095 goto err_out;
0169e284 1096
1da177e4
LT		 1097 /*
1098 * arg! EDD works for all test cases, but seems to return
1099 * the ATA signature for some ATAPI devices. Until the
1100 * reason for this is found and fixed, we fix up the mess
1101 * here. If IDENTIFY DEVICE returns command aborted
1102 * (as ATAPI devices do), then we issue an
1103 * IDENTIFY PACKET DEVICE.
1104 *
1105 * ATA software reset (SRST, the default) does not appear
1106 * to have this problem.
1107 */
49016aca 1108 if ((using_edd) && (class == ATA_DEV_ATA)) {
a0123703 1109 u8 err = tf.feature;
1da177e4 1110 if (err & ATA_ABORTED) {
49016aca 1111 class = ATA_DEV_ATAPI;
1da177e4
LT		 1112 goto retry;
1113 }
1114 }
1115 goto err_out;
1116 }
1117
49016aca 1118 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4
LT		 1119
1120 /* print device capabilities */
1121 printk(KERN_DEBUG "ata%u: dev %u cfg "
1122 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
49016aca
TH		 1123 ap->id, dev->devno,
1124 id[49], id[82], id[83], id[84], id[85], id[86], id[87], id[88]);
1125
1126 /* sanity check */
1127 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1128 rc = -EINVAL;
1129 reason = "device reports illegal type";
1130 goto err_out;
1131 }
1132
1133 if (post_reset && class == ATA_DEV_ATA) {
1134 /*
1135 * The exact sequence expected by certain pre-ATA4 drives is:
1136 * SRST RESET
1137 * IDENTIFY
1138 * INITIALIZE DEVICE PARAMETERS
1139 * anything else..
1140 * Some drives were very specific about that exact sequence.
1141 */
1142 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1143 err_mask = ata_dev_init_params(ap, dev);
1144 if (err_mask) {
1145 rc = -EIO;
1146 reason = "INIT_DEV_PARAMS failed";
1147 goto err_out;
1148 }
1149
1150 /* current CHS translation info (id[53-58]) might be
1151 * changed. reread the identify device info.
1152 */
1153 post_reset = 0;
1154 goto retry;
1155 }
1156 }
1157
1158 *p_class = class;
d9572b1d 1159 *p_id = id;
49016aca
TH		 1160 return 0;
1161
1162 err_out:
1163 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1164 ap->id, dev->devno, reason);
d9572b1d 1165 kfree(id);
49016aca
TH		 1166 return rc;
1167}
1168
4b2f3ede
TH		 1169static inline u8 ata_dev_knobble(const struct ata_port *ap,
1170 struct ata_device *dev)
1171{
1172 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1173}
1174
49016aca 1175/**
ffeae418
TH		 1176 * ata_dev_configure - Configure the specified ATA/ATAPI device
1177 * @ap: Port on which target device resides
1178 * @dev: Target device to configure
4c2d721a 1179 * @print_info: Enable device info printout
ffeae418
TH		 1180 *
1181 * Configure @dev according to @dev->id. Generic and low-level
1182 * driver specific fixups are also applied.
49016aca
TH		 1183 *
1184 * LOCKING:
ffeae418
TH		 1185 * Kernel thread context (may sleep)
1186 *
1187 * RETURNS:
1188 * 0 on success, -errno otherwise
49016aca 1189 */
4c2d721a
TH		 1190static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1191 int print_info)
49016aca 1192{
ff8854b2 1193 unsigned int xfer_mask;
49016aca
TH		 1194 int i, rc;
1195
1196 if (!ata_dev_present(dev)) {
1197 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1198 ap->id, dev->devno);
1199 return 0;
49016aca
TH		 1200 }
1201
ffeae418 1202 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1203
208a9933
TH		 1204 /* initialize to-be-configured parameters */
1205 dev->flags = 0;
1206 dev->max_sectors = 0;
1207 dev->cdb_len = 0;
1208 dev->n_sectors = 0;
1209 dev->cylinders = 0;
1210 dev->heads = 0;
1211 dev->sectors = 0;
1212
1da177e4
LT		 1213 /*
1214 * common ATA, ATAPI feature tests
1215 */
1216
8bf62ece
AL		 1217 /* we require DMA support (bits 8 of word 49) */
1218 if (!ata_id_has_dma(dev->id)) {
1219 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
ffeae418 1220 rc = -EINVAL;
1da177e4
LT		 1221 goto err_out_nosup;
1222 }
1223
ff8854b2
TH		 1224 /* find max transfer mode; for printk only */
1225 xfer_mask = ata_id_xfermask(dev->id);
1da177e4 1226
0bd3300a 1227 ata_dump_id(dev->id);
1da177e4
LT		 1228
1229 /* ATA-specific feature tests */
1230 if (dev->class == ATA_DEV_ATA) {
2940740b
TH		 1231 dev->n_sectors = ata_id_n_sectors(dev->id);
1232
8bf62ece 1233 if (ata_id_has_lba(dev->id)) {
4c2d721a 1234 const char *lba_desc;
8bf62ece 1235
4c2d721a
TH		 1236 lba_desc = "LBA";
1237 dev->flags |= ATA_DFLAG_LBA;
1238 if (ata_id_has_lba48(dev->id)) {
8bf62ece 1239 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1240 lba_desc = "LBA48";
1241 }
8bf62ece
AL		 1242
1243 /* print device info to dmesg */
4c2d721a
TH		 1244 if (print_info)
1245 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1246 "max %s, %Lu sectors: %s\n",
1247 ap->id, dev->devno,
1248 ata_id_major_version(dev->id),
ff8854b2 1249 ata_mode_string(xfer_mask),
4c2d721a
TH		 1250 (unsigned long long)dev->n_sectors,
1251 lba_desc);
ffeae418 1252 } else {
8bf62ece
AL		 1253 /* CHS */
1254
1255 /* Default translation */
1256 dev->cylinders = dev->id[1];
1257 dev->heads = dev->id[3];
1258 dev->sectors = dev->id[6];
8bf62ece
AL		 1259
1260 if (ata_id_current_chs_valid(dev->id)) {
1261 /* Current CHS translation is valid. */
1262 dev->cylinders = dev->id[54];
1263 dev->heads = dev->id[55];
1264 dev->sectors = dev->id[56];
8bf62ece
AL		 1265 }
1266
1267 /* print device info to dmesg */
4c2d721a
TH		 1268 if (print_info)
1269 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1270 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1271 ap->id, dev->devno,
1272 ata_id_major_version(dev->id),
ff8854b2 1273 ata_mode_string(xfer_mask),
4c2d721a
TH		 1274 (unsigned long long)dev->n_sectors,
1275 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1276 }
1277
6e7846e9 1278 dev->cdb_len = 16;
1da177e4
LT		 1279 }
1280
1281 /* ATAPI-specific feature tests */
2c13b7ce 1282 else if (dev->class == ATA_DEV_ATAPI) {
1da177e4
LT		 1283 rc = atapi_cdb_len(dev->id);
1284 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1285 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1286 rc = -EINVAL;
1da177e4
LT		 1287 goto err_out_nosup;
1288 }
6e7846e9 1289 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1290
1291 /* print device info to dmesg */
4c2d721a
TH		 1292 if (print_info)
1293 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1294 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1295 }
1296
6e7846e9
TH		 1297 ap->host->max_cmd_len = 0;
1298 for (i = 0; i < ATA_MAX_DEVICES; i++)
1299 ap->host->max_cmd_len = max_t(unsigned int,
1300 ap->host->max_cmd_len,
1301 ap->device[i].cdb_len);
1302
4b2f3ede
TH		 1303 /* limit bridge transfers to udma5, 200 sectors */
1304 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1305 if (print_info)
1306 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1307 ap->id, dev->devno);
4b2f3ede
TH		 1308 ap->udma_mask &= ATA_UDMA5;
1309 dev->max_sectors = ATA_MAX_SECTORS;
1310 }
1311
1312 if (ap->ops->dev_config)
1313 ap->ops->dev_config(ap, dev);
1314
1da177e4 1315 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1316 return 0;
1da177e4
LT		 1317
1318err_out_nosup:
1319 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
ffeae418 1320 ap->id, dev->devno);
1da177e4 1321 DPRINTK("EXIT, err\n");
ffeae418 1322 return rc;
1da177e4
LT		 1323}
1324
1325/**
1326 * ata_bus_probe - Reset and probe ATA bus
1327 * @ap: Bus to probe
1328 *
0cba632b
JG		 1329 * Master ATA bus probing function. Initiates a hardware-dependent
1330 * bus reset, then attempts to identify any devices found on
1331 * the bus.
1332 *
1da177e4 1333 * LOCKING:
0cba632b 1334 * PCI/etc. bus probe sem.
1da177e4
LT		 1335 *
1336 * RETURNS:
1337 * Zero on success, non-zero on error.
1338 */
1339
1340static int ata_bus_probe(struct ata_port *ap)
1341{
28ca5c57
TH		 1342 unsigned int classes[ATA_MAX_DEVICES];
1343 unsigned int i, rc, found = 0;
1da177e4 1344
28ca5c57 1345 ata_port_probe(ap);
c19ba8af 1346
28ca5c57
TH		 1347 /* reset */
1348 if (ap->ops->probe_reset) {
2061a47a
TH		 1349 for (i = 0; i < ATA_MAX_DEVICES; i++)
1350 classes[i] = ATA_DEV_UNKNOWN;
1351
c19ba8af 1352 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1353 if (rc) {
1354 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1355 return rc;
c19ba8af 1356 }
28ca5c57
TH		 1357
1358 for (i = 0; i < ATA_MAX_DEVICES; i++)
1359 if (classes[i] == ATA_DEV_UNKNOWN)
1360 classes[i] = ATA_DEV_NONE;
1361 } else {
c19ba8af
TH		 1362 ap->ops->phy_reset(ap);
1363
28ca5c57
TH		 1364 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1365 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1366 classes[i] = ap->device[i].class;
1367 else
1368 ap->device[i].class = ATA_DEV_UNKNOWN;
1369 }
1370 ata_port_probe(ap);
1371 }
1da177e4 1372
28ca5c57 1373 /* read IDENTIFY page and configure devices */
1da177e4 1374 for (i = 0; i < ATA_MAX_DEVICES; i++) {
ffeae418
TH		 1375 struct ata_device *dev = &ap->device[i];
1376
28ca5c57
TH		 1377 dev->class = classes[i];
1378
ffeae418
TH		 1379 if (!ata_dev_present(dev))
1380 continue;
1381
1382 WARN_ON(dev->id != NULL);
1383 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1384 dev->class = ATA_DEV_NONE;
1385 continue;
1386 }
1387
4c2d721a 1388 if (ata_dev_configure(ap, dev, 1)) {
ffeae418
TH		 1389 dev->class++; /* disable device */
1390 continue;
1da177e4 1391 }
ffeae418 1392
ffeae418 1393 found = 1;
1da177e4
LT		 1394 }
1395
28ca5c57 1396 if (!found)
1da177e4
LT		 1397 goto err_out_disable;
1398
1399 ata_set_mode(ap);
1400 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1401 goto err_out_disable;
1402
1403 return 0;
1404
1405err_out_disable:
1406 ap->ops->port_disable(ap);
1da177e4
LT		 1407 return -1;
1408}
1409
1410/**
0cba632b
JG		 1411 * ata_port_probe - Mark port as enabled
1412 * @ap: Port for which we indicate enablement
1da177e4 1413 *
0cba632b
JG		 1414 * Modify @ap data structure such that the system
1415 * thinks that the entire port is enabled.
1416 *
1417 * LOCKING: host_set lock, or some other form of
1418 * serialization.
1da177e4
LT		 1419 */
1420
1421void ata_port_probe(struct ata_port *ap)
1422{
1423 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1424}
1425
3be680b7
TH		 1426/**
1427 * sata_print_link_status - Print SATA link status
1428 * @ap: SATA port to printk link status about
1429 *
1430 * This function prints link speed and status of a SATA link.
1431 *
1432 * LOCKING:
1433 * None.
1434 */
1435static void sata_print_link_status(struct ata_port *ap)
1436{
1437 u32 sstatus, tmp;
1438 const char *speed;
1439
1440 if (!ap->ops->scr_read)
1441 return;
1442
1443 sstatus = scr_read(ap, SCR_STATUS);
1444
1445 if (sata_dev_present(ap)) {
1446 tmp = (sstatus >> 4) & 0xf;
1447 if (tmp & (1 << 0))
1448 speed = "1.5";
1449 else if (tmp & (1 << 1))
1450 speed = "3.0";
1451 else
1452 speed = "<unknown>";
1453 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1454 ap->id, speed, sstatus);
1455 } else {
1456 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1457 ap->id, sstatus);
1458 }
1459}
1460
1da177e4 1461/**
780a87f7
JG		 1462 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1463 * @ap: SATA port associated with target SATA PHY.
1da177e4 1464 *
780a87f7
JG		 1465 * This function issues commands to standard SATA Sxxx
1466 * PHY registers, to wake up the phy (and device), and
1467 * clear any reset condition.
1da177e4
LT		 1468 *
1469 * LOCKING:
0cba632b 1470 * PCI/etc. bus probe sem.
1da177e4
LT		 1471 *
1472 */
1473void __sata_phy_reset(struct ata_port *ap)
1474{
1475 u32 sstatus;
1476 unsigned long timeout = jiffies + (HZ * 5);
1477
1478 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1479 /* issue phy wake/reset */
1480 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1481 /* Couldn't find anything in SATA I/II specs, but
1482 * AHCI-1.1 10.4.2 says at least 1 ms. */
1483 mdelay(1);
1da177e4 1484 }
cdcca89e 1485 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1486
1487 /* wait for phy to become ready, if necessary */
1488 do {
1489 msleep(200);
1490 sstatus = scr_read(ap, SCR_STATUS);
1491 if ((sstatus & 0xf) != 1)
1492 break;
1493 } while (time_before(jiffies, timeout));
1494
3be680b7
TH		 1495 /* print link status */
1496 sata_print_link_status(ap);
656563e3 1497
3be680b7
TH		 1498 /* TODO: phy layer with polling, timeouts, etc. */
1499 if (sata_dev_present(ap))
1da177e4 1500 ata_port_probe(ap);
3be680b7 1501 else
1da177e4 1502 ata_port_disable(ap);
1da177e4
LT		 1503
1504 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1505 return;
1506
1507 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1508 ata_port_disable(ap);
1509 return;
1510 }
1511
1512 ap->cbl = ATA_CBL_SATA;
1513}
1514
1515/**
780a87f7
JG		 1516 * sata_phy_reset - Reset SATA bus.
1517 * @ap: SATA port associated with target SATA PHY.
1da177e4 1518 *
780a87f7
JG		 1519 * This function resets the SATA bus, and then probes
1520 * the bus for devices.
1da177e4
LT		 1521 *
1522 * LOCKING:
0cba632b 1523 * PCI/etc. bus probe sem.
1da177e4
LT		 1524 *
1525 */
1526void sata_phy_reset(struct ata_port *ap)
1527{
1528 __sata_phy_reset(ap);
1529 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1530 return;
1531 ata_bus_reset(ap);
1532}
1533
1534/**
780a87f7
JG		 1535 * ata_port_disable - Disable port.
1536 * @ap: Port to be disabled.
1da177e4 1537 *
780a87f7
JG		 1538 * Modify @ap data structure such that the system
1539 * thinks that the entire port is disabled, and should
1540 * never attempt to probe or communicate with devices
1541 * on this port.
1542 *
1543 * LOCKING: host_set lock, or some other form of
1544 * serialization.
1da177e4
LT		 1545 */
1546
1547void ata_port_disable(struct ata_port *ap)
1548{
1549 ap->device[0].class = ATA_DEV_NONE;
1550 ap->device[1].class = ATA_DEV_NONE;
1551 ap->flags |= ATA_FLAG_PORT_DISABLED;
1552}
1553
452503f9
AC		 1554/*
1555 * This mode timing computation functionality is ported over from
1556 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1557 */
1558/*
1559 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1560 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1561 * for PIO 5, which is a nonstandard extension and UDMA6, which
1562 * is currently supported only by Maxtor drives.
1563 */
1564
1565static const struct ata_timing ata_timing[] = {
1566
1567 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1568 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1569 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1570 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1571
1572 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1573 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1574 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1575
1576/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1577
1578 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1579 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1580 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1581
1582 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1583 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1584 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1585
1586/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1587 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1588 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1589
1590 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1591 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1592 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1593
1594/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1595
1596 { 0xFF }
1597};
1598
1599#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1600#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1601
1602static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1603{
1604 q->setup = EZ(t->setup * 1000, T);
1605 q->act8b = EZ(t->act8b * 1000, T);
1606 q->rec8b = EZ(t->rec8b * 1000, T);
1607 q->cyc8b = EZ(t->cyc8b * 1000, T);
1608 q->active = EZ(t->active * 1000, T);
1609 q->recover = EZ(t->recover * 1000, T);
1610 q->cycle = EZ(t->cycle * 1000, T);
1611 q->udma = EZ(t->udma * 1000, UT);
1612}
1613
1614void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1615 struct ata_timing *m, unsigned int what)
1616{
1617 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1618 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1619 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1620 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1621 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1622 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1623 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1624 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1625}
1626
1627static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1628{
1629 const struct ata_timing *t;
1630
1631 for (t = ata_timing; t->mode != speed; t++)
91190758 1632 if (t->mode == 0xFF)
452503f9
AC		 1633 return NULL;
1634 return t;
1635}
1636
1637int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1638 struct ata_timing *t, int T, int UT)
1639{
1640 const struct ata_timing *s;
1641 struct ata_timing p;
1642
1643 /*
1644 * Find the mode.
75b1f2f8 1645 */
452503f9
AC		 1646
1647 if (!(s = ata_timing_find_mode(speed)))
1648 return -EINVAL;
1649
75b1f2f8
AL		 1650 memcpy(t, s, sizeof(*s));
1651
452503f9
AC		 1652 /*
1653 * If the drive is an EIDE drive, it can tell us it needs extended
1654 * PIO/MW_DMA cycle timing.
1655 */
1656
1657 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1658 memset(&p, 0, sizeof(p));
1659 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1660 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1661 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1662 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1663 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1664 }
1665 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1666 }
1667
1668 /*
1669 * Convert the timing to bus clock counts.
1670 */
1671
75b1f2f8 1672 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1673
1674 /*
c893a3ae
RD		 1675 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1676 * S.M.A.R.T * and some other commands. We have to ensure that the
1677 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1678 */
1679
1680 if (speed > XFER_PIO_4) {
1681 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1682 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1683 }
1684
1685 /*
c893a3ae 1686 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1687 */
1688
1689 if (t->act8b + t->rec8b < t->cyc8b) {
1690 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1691 t->rec8b = t->cyc8b - t->act8b;
1692 }
1693
1694 if (t->active + t->recover < t->cycle) {
1695 t->active += (t->cycle - (t->active + t->recover)) / 2;
1696 t->recover = t->cycle - t->active;
1697 }
1698
1699 return 0;
1700}
1701
1da177e4
LT		 1702static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1703{
1da177e4
LT		 1704 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1705 return;
1706
1707 if (dev->xfer_shift == ATA_SHIFT_PIO)
1708 dev->flags |= ATA_DFLAG_PIO;
1709
1710 ata_dev_set_xfermode(ap, dev);
1711
48a8a14f
TH		 1712 if (ata_dev_revalidate(ap, dev, 0)) {
1713 printk(KERN_ERR "ata%u: failed to revalidate after set "
1714 "xfermode, disabled\n", ap->id);
1715 ata_port_disable(ap);
1716 }
1717
23e71c3d
TH		 1718 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1719 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1720
1721 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1722 ap->id, dev->devno,
1723 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1da177e4
LT		 1724}
1725
1726static int ata_host_set_pio(struct ata_port *ap)
1727{
a6d5a51c 1728 int i;
1da177e4
LT		 1729
1730 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1731 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1732
1733 if (!ata_dev_present(dev))
1734 continue;
1735
1736 if (!dev->pio_mode) {
1737 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1738 return -1;
1da177e4 1739 }
a6d5a51c
TH		 1740
1741 dev->xfer_mode = dev->pio_mode;
1742 dev->xfer_shift = ATA_SHIFT_PIO;
1743 if (ap->ops->set_piomode)
1744 ap->ops->set_piomode(ap, dev);
1da177e4
LT		 1745 }
1746
1747 return 0;
1748}
1749
a6d5a51c 1750static void ata_host_set_dma(struct ata_port *ap)
1da177e4
LT		 1751{
1752 int i;
1753
1754 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1755 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1756
1757 if (!ata_dev_present(dev) || !dev->dma_mode)
1758 continue;
1759
1760 dev->xfer_mode = dev->dma_mode;
1761 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1762 if (ap->ops->set_dmamode)
1763 ap->ops->set_dmamode(ap, dev);
1da177e4
LT		 1764 }
1765}
1766
1767/**
1768 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1769 * @ap: port on which timings will be programmed
1770 *
780a87f7
JG		 1771 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1772 *
1da177e4 1773 * LOCKING:
0cba632b 1774 * PCI/etc. bus probe sem.
1da177e4
LT		 1775 */
1776static void ata_set_mode(struct ata_port *ap)
1777{
a6d5a51c 1778 int i, rc;
1da177e4 1779
a6d5a51c
TH		 1780 /* step 1: calculate xfer_mask */
1781 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1782 struct ata_device *dev = &ap->device[i];
1783 unsigned int xfer_mask;
1784
1785 if (!ata_dev_present(dev))
1786 continue;
1787
1788 xfer_mask = ata_dev_xfermask(ap, dev);
1da177e4 1789
a6d5a51c
TH		 1790 dev->pio_mode = ata_xfer_mask2mode(xfer_mask & ATA_MASK_PIO);
1791 dev->dma_mode = ata_xfer_mask2mode(xfer_mask & (ATA_MASK_MWDMA |
1792 ATA_MASK_UDMA));
1793 }
1794
1795 /* step 2: always set host PIO timings */
1796 rc = ata_host_set_pio(ap);
1da177e4
LT		 1797 if (rc)
1798 goto err_out;
1799
a6d5a51c
TH		 1800 /* step 3: set host DMA timings */
1801 ata_host_set_dma(ap);
1da177e4
LT		 1802
1803 /* step 4: update devices' xfer mode */
a6d5a51c
TH		 1804 for (i = 0; i < ATA_MAX_DEVICES; i++)
1805 ata_dev_set_mode(ap, &ap->device[i]);
1da177e4
LT		 1806
1807 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1808 return;
1809
1810 if (ap->ops->post_set_mode)
1811 ap->ops->post_set_mode(ap);
1812
1da177e4
LT		 1813 return;
1814
1815err_out:
1816 ata_port_disable(ap);
1817}
1818
1fdffbce
JG		 1819/**
1820 * ata_tf_to_host - issue ATA taskfile to host controller
1821 * @ap: port to which command is being issued
1822 * @tf: ATA taskfile register set
1823 *
1824 * Issues ATA taskfile register set to ATA host controller,
1825 * with proper synchronization with interrupt handler and
1826 * other threads.
1827 *
1828 * LOCKING:
1829 * spin_lock_irqsave(host_set lock)
1830 */
1831
1832static inline void ata_tf_to_host(struct ata_port *ap,
1833 const struct ata_taskfile *tf)
1834{
1835 ap->ops->tf_load(ap, tf);
1836 ap->ops->exec_command(ap, tf);
1837}
1838
1da177e4
LT		 1839/**
1840 * ata_busy_sleep - sleep until BSY clears, or timeout
1841 * @ap: port containing status register to be polled
1842 * @tmout_pat: impatience timeout
1843 * @tmout: overall timeout
1844 *
780a87f7
JG		 1845 * Sleep until ATA Status register bit BSY clears,
1846 * or a timeout occurs.
1847 *
1848 * LOCKING: None.
1da177e4
LT		 1849 */
1850
6f8b9958
TH		 1851unsigned int ata_busy_sleep (struct ata_port *ap,
1852 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1853{
1854 unsigned long timer_start, timeout;
1855 u8 status;
1856
1857 status = ata_busy_wait(ap, ATA_BUSY, 300);
1858 timer_start = jiffies;
1859 timeout = timer_start + tmout_pat;
1860 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1861 msleep(50);
1862 status = ata_busy_wait(ap, ATA_BUSY, 3);
1863 }
1864
1865 if (status & ATA_BUSY)
1866 printk(KERN_WARNING "ata%u is slow to respond, "
1867 "please be patient\n", ap->id);
1868
1869 timeout = timer_start + tmout;
1870 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1871 msleep(50);
1872 status = ata_chk_status(ap);
1873 }
1874
1875 if (status & ATA_BUSY) {
1876 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1877 ap->id, tmout / HZ);
1878 return 1;
1879 }
1880
1881 return 0;
1882}
1883
1884static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1885{
1886 struct ata_ioports *ioaddr = &ap->ioaddr;
1887 unsigned int dev0 = devmask & (1 << 0);
1888 unsigned int dev1 = devmask & (1 << 1);
1889 unsigned long timeout;
1890
1891 /* if device 0 was found in ata_devchk, wait for its
1892 * BSY bit to clear
1893 */
1894 if (dev0)
1895 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1896
1897 /* if device 1 was found in ata_devchk, wait for
1898 * register access, then wait for BSY to clear
1899 */
1900 timeout = jiffies + ATA_TMOUT_BOOT;
1901 while (dev1) {
1902 u8 nsect, lbal;
1903
1904 ap->ops->dev_select(ap, 1);
1905 if (ap->flags & ATA_FLAG_MMIO) {
1906 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1907 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1908 } else {
1909 nsect = inb(ioaddr->nsect_addr);
1910 lbal = inb(ioaddr->lbal_addr);
1911 }
1912 if ((nsect == 1) && (lbal == 1))
1913 break;
1914 if (time_after(jiffies, timeout)) {
1915 dev1 = 0;
1916 break;
1917 }
1918 msleep(50); /* give drive a breather */
1919 }
1920 if (dev1)
1921 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1922
1923 /* is all this really necessary? */
1924 ap->ops->dev_select(ap, 0);
1925 if (dev1)
1926 ap->ops->dev_select(ap, 1);
1927 if (dev0)
1928 ap->ops->dev_select(ap, 0);
1929}
1930
1931/**
0cba632b
JG		 1932 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1933 * @ap: Port to reset and probe
1934 *
1935 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1936 * probe the bus. Not often used these days.
1da177e4
LT		 1937 *
1938 * LOCKING:
0cba632b 1939 * PCI/etc. bus probe sem.
e5338254 1940 * Obtains host_set lock.
1da177e4
LT		 1941 *
1942 */
1943
1944static unsigned int ata_bus_edd(struct ata_port *ap)
1945{
1946 struct ata_taskfile tf;
e5338254 1947 unsigned long flags;
1da177e4
LT		 1948
1949 /* set up execute-device-diag (bus reset) taskfile */
1950 /* also, take interrupts to a known state (disabled) */
1951 DPRINTK("execute-device-diag\n");
1952 ata_tf_init(ap, &tf, 0);
1953 tf.ctl |= ATA_NIEN;
1954 tf.command = ATA_CMD_EDD;
1955 tf.protocol = ATA_PROT_NODATA;
1956
1957 /* do bus reset */
e5338254 1958 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1959 ata_tf_to_host(ap, &tf);
e5338254 1960 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1961
1962 /* spec says at least 2ms. but who knows with those
1963 * crazy ATAPI devices...
1964 */
1965 msleep(150);
1966
1967 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1968}
1969
1970static unsigned int ata_bus_softreset(struct ata_port *ap,
1971 unsigned int devmask)
1972{
1973 struct ata_ioports *ioaddr = &ap->ioaddr;
1974
1975 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1976
1977 /* software reset. causes dev0 to be selected */
1978 if (ap->flags & ATA_FLAG_MMIO) {
1979 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1980 udelay(20); /* FIXME: flush */
1981 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1982 udelay(20); /* FIXME: flush */
1983 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1984 } else {
1985 outb(ap->ctl, ioaddr->ctl_addr);
1986 udelay(10);
1987 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1988 udelay(10);
1989 outb(ap->ctl, ioaddr->ctl_addr);
1990 }
1991
1992 /* spec mandates ">= 2ms" before checking status.
1993 * We wait 150ms, because that was the magic delay used for
1994 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1995 * between when the ATA command register is written, and then
1996 * status is checked. Because waiting for "a while" before
1997 * checking status is fine, post SRST, we perform this magic
1998 * delay here as well.
1999 */
2000 msleep(150);
2001
2002 ata_bus_post_reset(ap, devmask);
2003
2004 return 0;
2005}
2006
2007/**
2008 * ata_bus_reset - reset host port and associated ATA channel
2009 * @ap: port to reset
2010 *
2011 * This is typically the first time we actually start issuing
2012 * commands to the ATA channel. We wait for BSY to clear, then
2013 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2014 * result. Determine what devices, if any, are on the channel
2015 * by looking at the device 0/1 error register. Look at the signature
2016 * stored in each device's taskfile registers, to determine if
2017 * the device is ATA or ATAPI.
2018 *
2019 * LOCKING:
0cba632b
JG		 2020 * PCI/etc. bus probe sem.
2021 * Obtains host_set lock.
1da177e4
LT		 2022 *
2023 * SIDE EFFECTS:
2024 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2025 */
2026
2027void ata_bus_reset(struct ata_port *ap)
2028{
2029 struct ata_ioports *ioaddr = &ap->ioaddr;
2030 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2031 u8 err;
2032 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2033
2034 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2035
2036 /* determine if device 0/1 are present */
2037 if (ap->flags & ATA_FLAG_SATA_RESET)
2038 dev0 = 1;
2039 else {
2040 dev0 = ata_devchk(ap, 0);
2041 if (slave_possible)
2042 dev1 = ata_devchk(ap, 1);
2043 }
2044
2045 if (dev0)
2046 devmask |= (1 << 0);
2047 if (dev1)
2048 devmask |= (1 << 1);
2049
2050 /* select device 0 again */
2051 ap->ops->dev_select(ap, 0);
2052
2053 /* issue bus reset */
2054 if (ap->flags & ATA_FLAG_SRST)
2055 rc = ata_bus_softreset(ap, devmask);
2056 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2057 /* set up device control */
2058 if (ap->flags & ATA_FLAG_MMIO)
2059 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2060 else
2061 outb(ap->ctl, ioaddr->ctl_addr);
2062 rc = ata_bus_edd(ap);
2063 }
2064
2065 if (rc)
2066 goto err_out;
2067
2068 /*
2069 * determine by signature whether we have ATA or ATAPI devices
2070 */
b4dc7623 2071 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2072 if ((slave_possible) && (err != 0x81))
b4dc7623 2073 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2074
2075 /* re-enable interrupts */
2076 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2077 ata_irq_on(ap);
2078
2079 /* is double-select really necessary? */
2080 if (ap->device[1].class != ATA_DEV_NONE)
2081 ap->ops->dev_select(ap, 1);
2082 if (ap->device[0].class != ATA_DEV_NONE)
2083 ap->ops->dev_select(ap, 0);
2084
2085 /* if no devices were detected, disable this port */
2086 if ((ap->device[0].class == ATA_DEV_NONE) &&
2087 (ap->device[1].class == ATA_DEV_NONE))
2088 goto err_out;
2089
2090 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2091 /* set up device control for ATA_FLAG_SATA_RESET */
2092 if (ap->flags & ATA_FLAG_MMIO)
2093 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2094 else
2095 outb(ap->ctl, ioaddr->ctl_addr);
2096 }
2097
2098 DPRINTK("EXIT\n");
2099 return;
2100
2101err_out:
2102 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2103 ap->ops->port_disable(ap);
2104
2105 DPRINTK("EXIT\n");
2106}
2107
7a7921e8
TH		 2108static int sata_phy_resume(struct ata_port *ap)
2109{
2110 unsigned long timeout = jiffies + (HZ * 5);
2111 u32 sstatus;
2112
2113 scr_write_flush(ap, SCR_CONTROL, 0x300);
2114
2115 /* Wait for phy to become ready, if necessary. */
2116 do {
2117 msleep(200);
2118 sstatus = scr_read(ap, SCR_STATUS);
2119 if ((sstatus & 0xf) != 1)
2120 return 0;
2121 } while (time_before(jiffies, timeout));
2122
2123 return -1;
2124}
2125
8a19ac89
TH		 2126/**
2127 * ata_std_probeinit - initialize probing
2128 * @ap: port to be probed
2129 *
2130 * @ap is about to be probed. Initialize it. This function is
2131 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2132 *
2133 * NOTE!!! Do not use this function as probeinit if a low level
2134 * driver implements only hardreset. Just pass NULL as probeinit
2135 * in that case. Using this function is probably okay but doing
2136 * so makes reset sequence different from the original
2137 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 2138 */
2139extern void ata_std_probeinit(struct ata_port *ap)
2140{
3a39746a 2141 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 2142 sata_phy_resume(ap);
3a39746a
TH		 2143 if (sata_dev_present(ap))
2144 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2145 }
8a19ac89
TH		 2146}
2147
c2bd5804
TH		 2148/**
2149 * ata_std_softreset - reset host port via ATA SRST
2150 * @ap: port to reset
2151 * @verbose: fail verbosely
2152 * @classes: resulting classes of attached devices
2153 *
2154 * Reset host port using ATA SRST. This function is to be used
2155 * as standard callback for ata_drive_*_reset() functions.
2156 *
2157 * LOCKING:
2158 * Kernel thread context (may sleep)
2159 *
2160 * RETURNS:
2161 * 0 on success, -errno otherwise.
2162 */
2163int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2164{
2165 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2166 unsigned int devmask = 0, err_mask;
2167 u8 err;
2168
2169 DPRINTK("ENTER\n");
2170
3a39746a
TH		 2171 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2172 classes[0] = ATA_DEV_NONE;
2173 goto out;
2174 }
2175
c2bd5804
TH		 2176 /* determine if device 0/1 are present */
2177 if (ata_devchk(ap, 0))
2178 devmask |= (1 << 0);
2179 if (slave_possible && ata_devchk(ap, 1))
2180 devmask |= (1 << 1);
2181
c2bd5804
TH		 2182 /* select device 0 again */
2183 ap->ops->dev_select(ap, 0);
2184
2185 /* issue bus reset */
2186 DPRINTK("about to softreset, devmask=%x\n", devmask);
2187 err_mask = ata_bus_softreset(ap, devmask);
2188 if (err_mask) {
2189 if (verbose)
2190 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2191 ap->id, err_mask);
2192 else
2193 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2194 err_mask);
2195 return -EIO;
2196 }
2197
2198 /* determine by signature whether we have ATA or ATAPI devices */
2199 classes[0] = ata_dev_try_classify(ap, 0, &err);
2200 if (slave_possible && err != 0x81)
2201 classes[1] = ata_dev_try_classify(ap, 1, &err);
2202
3a39746a 2203 out:
c2bd5804
TH		 2204 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2205 return 0;
2206}
2207
2208/**
2209 * sata_std_hardreset - reset host port via SATA phy reset
2210 * @ap: port to reset
2211 * @verbose: fail verbosely
2212 * @class: resulting class of attached device
2213 *
2214 * SATA phy-reset host port using DET bits of SControl register.
2215 * This function is to be used as standard callback for
2216 * ata_drive_*_reset().
2217 *
2218 * LOCKING:
2219 * Kernel thread context (may sleep)
2220 *
2221 * RETURNS:
2222 * 0 on success, -errno otherwise.
2223 */
2224int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2225{
c2bd5804
TH		 2226 DPRINTK("ENTER\n");
2227
2228 /* Issue phy wake/reset */
2229 scr_write_flush(ap, SCR_CONTROL, 0x301);
2230
2231 /*
2232 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2233 * 10.4.2 says at least 1 ms.
2234 */
2235 msleep(1);
2236
7a7921e8
TH		 2237 /* Bring phy back */
2238 sata_phy_resume(ap);
c2bd5804 2239
c2bd5804
TH		 2240 /* TODO: phy layer with polling, timeouts, etc. */
2241 if (!sata_dev_present(ap)) {
2242 *class = ATA_DEV_NONE;
2243 DPRINTK("EXIT, link offline\n");
2244 return 0;
2245 }
2246
2247 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2248 if (verbose)
2249 printk(KERN_ERR "ata%u: COMRESET failed "
2250 "(device not ready)\n", ap->id);
2251 else
2252 DPRINTK("EXIT, device not ready\n");
2253 return -EIO;
2254 }
2255
3a39746a
TH		 2256 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2257
c2bd5804
TH		 2258 *class = ata_dev_try_classify(ap, 0, NULL);
2259
2260 DPRINTK("EXIT, class=%u\n", *class);
2261 return 0;
2262}
2263
2264/**
2265 * ata_std_postreset - standard postreset callback
2266 * @ap: the target ata_port
2267 * @classes: classes of attached devices
2268 *
2269 * This function is invoked after a successful reset. Note that
2270 * the device might have been reset more than once using
2271 * different reset methods before postreset is invoked.
c2bd5804
TH		 2272 *
2273 * This function is to be used as standard callback for
2274 * ata_drive_*_reset().
2275 *
2276 * LOCKING:
2277 * Kernel thread context (may sleep)
2278 */
2279void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2280{
2281 DPRINTK("ENTER\n");
2282
56497bd5 2283 /* set cable type if it isn't already set */
c2bd5804
TH		 2284 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2285 ap->cbl = ATA_CBL_SATA;
2286
2287 /* print link status */
2288 if (ap->cbl == ATA_CBL_SATA)
2289 sata_print_link_status(ap);
2290
3a39746a
TH		 2291 /* re-enable interrupts */
2292 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2293 ata_irq_on(ap);
c2bd5804
TH		 2294
2295 /* is double-select really necessary? */
2296 if (classes[0] != ATA_DEV_NONE)
2297 ap->ops->dev_select(ap, 1);
2298 if (classes[1] != ATA_DEV_NONE)
2299 ap->ops->dev_select(ap, 0);
2300
3a39746a
TH		 2301 /* bail out if no device is present */
2302 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2303 DPRINTK("EXIT, no device\n");
2304 return;
2305 }
2306
2307 /* set up device control */
2308 if (ap->ioaddr.ctl_addr) {
2309 if (ap->flags & ATA_FLAG_MMIO)
2310 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2311 else
2312 outb(ap->ctl, ap->ioaddr.ctl_addr);
2313 }
c2bd5804
TH		 2314
2315 DPRINTK("EXIT\n");
2316}
2317
2318/**
2319 * ata_std_probe_reset - standard probe reset method
2320 * @ap: prot to perform probe-reset
2321 * @classes: resulting classes of attached devices
2322 *
2323 * The stock off-the-shelf ->probe_reset method.
2324 *
2325 * LOCKING:
2326 * Kernel thread context (may sleep)
2327 *
2328 * RETURNS:
2329 * 0 on success, -errno otherwise.
2330 */
2331int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2332{
2333 ata_reset_fn_t hardreset;
2334
2335 hardreset = NULL;
b911fc3a 2336 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2337 hardreset = sata_std_hardreset;
2338
8a19ac89 2339 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2340 ata_std_softreset, hardreset,
c2bd5804
TH		 2341 ata_std_postreset, classes);
2342}
2343
a62c0fc5
TH		 2344static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2345 ata_postreset_fn_t postreset,
2346 unsigned int *classes)
2347{
2348 int i, rc;
2349
2350 for (i = 0; i < ATA_MAX_DEVICES; i++)
2351 classes[i] = ATA_DEV_UNKNOWN;
2352
2353 rc = reset(ap, 0, classes);
2354 if (rc)
2355 return rc;
2356
2357 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2358 * is complete and convert all ATA_DEV_UNKNOWN to
2359 * ATA_DEV_NONE.
2360 */
2361 for (i = 0; i < ATA_MAX_DEVICES; i++)
2362 if (classes[i] != ATA_DEV_UNKNOWN)
2363 break;
2364
2365 if (i < ATA_MAX_DEVICES)
2366 for (i = 0; i < ATA_MAX_DEVICES; i++)
2367 if (classes[i] == ATA_DEV_UNKNOWN)
2368 classes[i] = ATA_DEV_NONE;
2369
2370 if (postreset)
2371 postreset(ap, classes);
2372
2373 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2374}
2375
2376/**
2377 * ata_drive_probe_reset - Perform probe reset with given methods
2378 * @ap: port to reset
7944ea95 2379 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2380 * @softreset: softreset method (can be NULL)
2381 * @hardreset: hardreset method (can be NULL)
2382 * @postreset: postreset method (can be NULL)
2383 * @classes: resulting classes of attached devices
2384 *
2385 * Reset the specified port and classify attached devices using
2386 * given methods. This function prefers softreset but tries all
2387 * possible reset sequences to reset and classify devices. This
2388 * function is intended to be used for constructing ->probe_reset
2389 * callback by low level drivers.
2390 *
2391 * Reset methods should follow the following rules.
2392 *
2393 * - Return 0 on sucess, -errno on failure.
2394 * - If classification is supported, fill classes[] with
2395 * recognized class codes.
2396 * - If classification is not supported, leave classes[] alone.
2397 * - If verbose is non-zero, print error message on failure;
2398 * otherwise, shut up.
2399 *
2400 * LOCKING:
2401 * Kernel thread context (may sleep)
2402 *
2403 * RETURNS:
2404 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2405 * if classification fails, and any error code from reset
2406 * methods.
2407 */
7944ea95 2408int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2409 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2410 ata_postreset_fn_t postreset, unsigned int *classes)
2411{
2412 int rc = -EINVAL;
2413
7944ea95
TH		 2414 if (probeinit)
2415 probeinit(ap);
2416
a62c0fc5
TH		 2417 if (softreset) {
2418 rc = do_probe_reset(ap, softreset, postreset, classes);
2419 if (rc == 0)
2420 return 0;
2421 }
2422
2423 if (!hardreset)
2424 return rc;
2425
2426 rc = do_probe_reset(ap, hardreset, postreset, classes);
2427 if (rc == 0 || rc != -ENODEV)
2428 return rc;
2429
2430 if (softreset)
2431 rc = do_probe_reset(ap, softreset, postreset, classes);
2432
2433 return rc;
2434}
2435
623a3128
TH		 2436/**
2437 * ata_dev_same_device - Determine whether new ID matches configured device
2438 * @ap: port on which the device to compare against resides
2439 * @dev: device to compare against
2440 * @new_class: class of the new device
2441 * @new_id: IDENTIFY page of the new device
2442 *
2443 * Compare @new_class and @new_id against @dev and determine
2444 * whether @dev is the device indicated by @new_class and
2445 * @new_id.
2446 *
2447 * LOCKING:
2448 * None.
2449 *
2450 * RETURNS:
2451 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2452 */
2453static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2454 unsigned int new_class, const u16 *new_id)
2455{
2456 const u16 *old_id = dev->id;
2457 unsigned char model[2][41], serial[2][21];
2458 u64 new_n_sectors;
2459
2460 if (dev->class != new_class) {
2461 printk(KERN_INFO
2462 "ata%u: dev %u class mismatch %d != %d\n",
2463 ap->id, dev->devno, dev->class, new_class);
2464 return 0;
2465 }
2466
2467 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2468 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2469 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2470 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2471 new_n_sectors = ata_id_n_sectors(new_id);
2472
2473 if (strcmp(model[0], model[1])) {
2474 printk(KERN_INFO
2475 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2476 ap->id, dev->devno, model[0], model[1]);
2477 return 0;
2478 }
2479
2480 if (strcmp(serial[0], serial[1])) {
2481 printk(KERN_INFO
2482 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2483 ap->id, dev->devno, serial[0], serial[1]);
2484 return 0;
2485 }
2486
2487 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2488 printk(KERN_INFO
2489 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2490 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2491 (unsigned long long)new_n_sectors);
2492 return 0;
2493 }
2494
2495 return 1;
2496}
2497
2498/**
2499 * ata_dev_revalidate - Revalidate ATA device
2500 * @ap: port on which the device to revalidate resides
2501 * @dev: device to revalidate
2502 * @post_reset: is this revalidation after reset?
2503 *
2504 * Re-read IDENTIFY page and make sure @dev is still attached to
2505 * the port.
2506 *
2507 * LOCKING:
2508 * Kernel thread context (may sleep)
2509 *
2510 * RETURNS:
2511 * 0 on success, negative errno otherwise
2512 */
2513int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2514 int post_reset)
2515{
2516 unsigned int class;
2517 u16 *id;
2518 int rc;
2519
2520 if (!ata_dev_present(dev))
2521 return -ENODEV;
2522
2523 class = dev->class;
2524 id = NULL;
2525
2526 /* allocate & read ID data */
2527 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2528 if (rc)
2529 goto fail;
2530
2531 /* is the device still there? */
2532 if (!ata_dev_same_device(ap, dev, class, id)) {
2533 rc = -ENODEV;
2534 goto fail;
2535 }
2536
2537 kfree(dev->id);
2538 dev->id = id;
2539
2540 /* configure device according to the new ID */
2541 return ata_dev_configure(ap, dev, 0);
2542
2543 fail:
2544 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2545 ap->id, dev->devno, rc);
2546 kfree(id);
2547 return rc;
2548}
2549
98ac62de 2550static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2551 "WDC AC11000H",
2552 "WDC AC22100H",
2553 "WDC AC32500H",
2554 "WDC AC33100H",
2555 "WDC AC31600H",
2556 "WDC AC32100H",
2557 "WDC AC23200L",
2558 "Compaq CRD-8241B",
2559 "CRD-8400B",
2560 "CRD-8480B",
2561 "CRD-8482B",
2562 "CRD-84",
2563 "SanDisk SDP3B",
2564 "SanDisk SDP3B-64",
2565 "SANYO CD-ROM CRD",
2566 "HITACHI CDR-8",
2567 "HITACHI CDR-8335",
2568 "HITACHI CDR-8435",
2569 "Toshiba CD-ROM XM-6202B",
e922256a 2570 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2571 "CD-532E-A",
2572 "E-IDE CD-ROM CR-840",
2573 "CD-ROM Drive/F5A",
2574 "WPI CDD-820",
2575 "SAMSUNG CD-ROM SC-148C",
2576 "SAMSUNG CD-ROM SC",
2577 "SanDisk SDP3B-64",
1da177e4
LT		 2578 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2579 "_NEC DV5800A",
2580};
2581
057ace5e 2582static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2583{
2e02671d 2584 unsigned char model_num[41];
1da177e4
LT		 2585 int i;
2586
6a62a04d 2587 ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num));
1da177e4
LT		 2588
2589 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2590 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2591 return 1;
2592
2593 return 0;
2594}
2595
a6d5a51c
TH		 2596/**
2597 * ata_dev_xfermask - Compute supported xfermask of the given device
2598 * @ap: Port on which the device to compute xfermask for resides
2599 * @dev: Device to compute xfermask for
2600 *
2601 * Compute supported xfermask of @dev. This function is
2602 * responsible for applying all known limits including host
2603 * controller limits, device blacklist, etc...
2604 *
2605 * LOCKING:
2606 * None.
2607 *
2608 * RETURNS:
2609 * Computed xfermask.
2610 */
2611static unsigned int ata_dev_xfermask(struct ata_port *ap,
2612 struct ata_device *dev)
1da177e4 2613{
a6d5a51c
TH		 2614 unsigned long xfer_mask;
2615 int i;
1da177e4 2616
a6d5a51c
TH		 2617 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2618 ap->udma_mask);
1da177e4 2619
a6d5a51c
TH		 2620 /* use port-wide xfermask for now */
2621 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2622 struct ata_device *d = &ap->device[i];
2623 if (!ata_dev_present(d))
2624 continue;
2625 xfer_mask &= ata_id_xfermask(d->id);
2626 if (ata_dma_blacklisted(d))
2627 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2628 }
2629
a6d5a51c
TH		 2630 if (ata_dma_blacklisted(dev))
2631 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2632 "disabling DMA\n", ap->id, dev->devno);
2633
2634 return xfer_mask;
1da177e4
LT		 2635}
2636
1da177e4
LT		 2637/**
2638 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2639 * @ap: Port associated with device @dev
2640 * @dev: Device to which command will be sent
2641 *
780a87f7
JG		 2642 * Issue SET FEATURES - XFER MODE command to device @dev
2643 * on port @ap.
2644 *
1da177e4 2645 * LOCKING:
0cba632b 2646 * PCI/etc. bus probe sem.
1da177e4
LT		 2647 */
2648
2649static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2650{
a0123703 2651 struct ata_taskfile tf;
1da177e4
LT		 2652
2653 /* set up set-features taskfile */
2654 DPRINTK("set features - xfer mode\n");
2655
a0123703
TH		 2656 ata_tf_init(ap, &tf, dev->devno);
2657 tf.command = ATA_CMD_SET_FEATURES;
2658 tf.feature = SETFEATURES_XFER;
2659 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2660 tf.protocol = ATA_PROT_NODATA;
2661 tf.nsect = dev->xfer_mode;
1da177e4 2662
a0123703
TH		 2663 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2664 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2665 ap->id);
1da177e4 2666 ata_port_disable(ap);
a0123703 2667 }
1da177e4
LT		 2668
2669 DPRINTK("EXIT\n");
2670}
2671
8bf62ece
AL		 2672/**
2673 * ata_dev_init_params - Issue INIT DEV PARAMS command
2674 * @ap: Port associated with device @dev
2675 * @dev: Device to which command will be sent
2676 *
2677 * LOCKING:
6aff8f1f
TH		 2678 * Kernel thread context (may sleep)
2679 *
2680 * RETURNS:
2681 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2682 */
2683
6aff8f1f
TH		 2684static unsigned int ata_dev_init_params(struct ata_port *ap,
2685 struct ata_device *dev)
8bf62ece 2686{
a0123703 2687 struct ata_taskfile tf;
6aff8f1f 2688 unsigned int err_mask;
8bf62ece
AL		 2689 u16 sectors = dev->id[6];
2690 u16 heads = dev->id[3];
2691
2692 /* Number of sectors per track 1-255. Number of heads 1-16 */
2693 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
6aff8f1f 2694 return 0;
8bf62ece
AL		 2695
2696 /* set up init dev params taskfile */
2697 DPRINTK("init dev params \n");
2698
a0123703
TH		 2699 ata_tf_init(ap, &tf, dev->devno);
2700 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2701 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2702 tf.protocol = ATA_PROT_NODATA;
2703 tf.nsect = sectors;
2704 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2705
6aff8f1f 2706 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2707
6aff8f1f
TH		 2708 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2709 return err_mask;
8bf62ece
AL		 2710}
2711
1da177e4 2712/**
0cba632b
JG		 2713 * ata_sg_clean - Unmap DMA memory associated with command
2714 * @qc: Command containing DMA memory to be released
2715 *
2716 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2717 *
2718 * LOCKING:
0cba632b 2719 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2720 */
2721
2722static void ata_sg_clean(struct ata_queued_cmd *qc)
2723{
2724 struct ata_port *ap = qc->ap;
cedc9a47 2725 struct scatterlist *sg = qc->__sg;
1da177e4 2726 int dir = qc->dma_dir;
cedc9a47 2727 void *pad_buf = NULL;
1da177e4 2728
a4631474
TH		 2729 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2730 WARN_ON(sg == NULL);
1da177e4
LT		 2731
2732 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2733 WARN_ON(qc->n_elem > 1);
1da177e4 2734
2c13b7ce 2735 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2736
cedc9a47
JG		 2737 /* if we padded the buffer out to 32-bit bound, and data
2738 * xfer direction is from-device, we must copy from the
2739 * pad buffer back into the supplied buffer
2740 */
2741 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2742 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2743
2744 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2745 if (qc->n_elem)
2746 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2747 /* restore last sg */
2748 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2749 if (pad_buf) {
2750 struct scatterlist *psg = &qc->pad_sgent;
2751 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2752 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2753 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2754 }
2755 } else {
2e242fa9 2756 if (qc->n_elem)
e1410f2d
JG		 2757 dma_unmap_single(ap->host_set->dev,
2758 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2759 dir);
cedc9a47
JG		 2760 /* restore sg */
2761 sg->length += qc->pad_len;
2762 if (pad_buf)
2763 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2764 pad_buf, qc->pad_len);
2765 }
1da177e4
LT		 2766
2767 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2768 qc->__sg = NULL;
1da177e4
LT		 2769}
2770
2771/**
2772 * ata_fill_sg - Fill PCI IDE PRD table
2773 * @qc: Metadata associated with taskfile to be transferred
2774 *
780a87f7
JG		 2775 * Fill PCI IDE PRD (scatter-gather) table with segments
2776 * associated with the current disk command.
2777 *
1da177e4 2778 * LOCKING:
780a87f7 2779 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2780 *
2781 */
2782static void ata_fill_sg(struct ata_queued_cmd *qc)
2783{
1da177e4 2784 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2785 struct scatterlist *sg;
2786 unsigned int idx;
1da177e4 2787
a4631474 2788 WARN_ON(qc->__sg == NULL);
f131883e 2789 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2790
2791 idx = 0;
cedc9a47 2792 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2793 u32 addr, offset;
2794 u32 sg_len, len;
2795
2796 /* determine if physical DMA addr spans 64K boundary.
2797 * Note h/w doesn't support 64-bit, so we unconditionally
2798 * truncate dma_addr_t to u32.
2799 */
2800 addr = (u32) sg_dma_address(sg);
2801 sg_len = sg_dma_len(sg);
2802
2803 while (sg_len) {
2804 offset = addr & 0xffff;
2805 len = sg_len;
2806 if ((offset + sg_len) > 0x10000)
2807 len = 0x10000 - offset;
2808
2809 ap->prd[idx].addr = cpu_to_le32(addr);
2810 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2811 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2812
2813 idx++;
2814 sg_len -= len;
2815 addr += len;
2816 }
2817 }
2818
2819 if (idx)
2820 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2821}
2822/**
2823 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2824 * @qc: Metadata associated with taskfile to check
2825 *
780a87f7
JG		 2826 * Allow low-level driver to filter ATA PACKET commands, returning
2827 * a status indicating whether or not it is OK to use DMA for the
2828 * supplied PACKET command.
2829 *
1da177e4 2830 * LOCKING:
0cba632b
JG		 2831 * spin_lock_irqsave(host_set lock)
2832 *
1da177e4
LT		 2833 * RETURNS: 0 when ATAPI DMA can be used
2834 * nonzero otherwise
2835 */
2836int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2837{
2838 struct ata_port *ap = qc->ap;
2839 int rc = 0; /* Assume ATAPI DMA is OK by default */
2840
2841 if (ap->ops->check_atapi_dma)
2842 rc = ap->ops->check_atapi_dma(qc);
2843
2844 return rc;
2845}
2846/**
2847 * ata_qc_prep - Prepare taskfile for submission
2848 * @qc: Metadata associated with taskfile to be prepared
2849 *
780a87f7
JG		 2850 * Prepare ATA taskfile for submission.
2851 *
1da177e4
LT		 2852 * LOCKING:
2853 * spin_lock_irqsave(host_set lock)
2854 */
2855void ata_qc_prep(struct ata_queued_cmd *qc)
2856{
2857 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2858 return;
2859
2860 ata_fill_sg(qc);
2861}
2862
0cba632b
JG		 2863/**
2864 * ata_sg_init_one - Associate command with memory buffer
2865 * @qc: Command to be associated
2866 * @buf: Memory buffer
2867 * @buflen: Length of memory buffer, in bytes.
2868 *
2869 * Initialize the data-related elements of queued_cmd @qc
2870 * to point to a single memory buffer, @buf of byte length @buflen.
2871 *
2872 * LOCKING:
2873 * spin_lock_irqsave(host_set lock)
2874 */
2875
1da177e4
LT		 2876void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2877{
2878 struct scatterlist *sg;
2879
2880 qc->flags |= ATA_QCFLAG_SINGLE;
2881
2882 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2883 qc->__sg = &qc->sgent;
1da177e4 2884 qc->n_elem = 1;
cedc9a47 2885 qc->orig_n_elem = 1;
1da177e4
LT		 2886 qc->buf_virt = buf;
2887
cedc9a47 2888 sg = qc->__sg;
f0612bbc 2889 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2890}
2891
0cba632b
JG		 2892/**
2893 * ata_sg_init - Associate command with scatter-gather table.
2894 * @qc: Command to be associated
2895 * @sg: Scatter-gather table.
2896 * @n_elem: Number of elements in s/g table.
2897 *
2898 * Initialize the data-related elements of queued_cmd @qc
2899 * to point to a scatter-gather table @sg, containing @n_elem
2900 * elements.
2901 *
2902 * LOCKING:
2903 * spin_lock_irqsave(host_set lock)
2904 */
2905
1da177e4
LT		 2906void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2907 unsigned int n_elem)
2908{
2909 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2910 qc->__sg = sg;
1da177e4 2911 qc->n_elem = n_elem;
cedc9a47 2912 qc->orig_n_elem = n_elem;
1da177e4
LT		 2913}
2914
2915/**
0cba632b
JG		 2916 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2917 * @qc: Command with memory buffer to be mapped.
2918 *
2919 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2920 *
2921 * LOCKING:
2922 * spin_lock_irqsave(host_set lock)
2923 *
2924 * RETURNS:
0cba632b 2925 * Zero on success, negative on error.
1da177e4
LT		 2926 */
2927
2928static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2929{
2930 struct ata_port *ap = qc->ap;
2931 int dir = qc->dma_dir;
cedc9a47 2932 struct scatterlist *sg = qc->__sg;
1da177e4 2933 dma_addr_t dma_address;
2e242fa9 2934 int trim_sg = 0;
1da177e4 2935
cedc9a47
JG		 2936 /* we must lengthen transfers to end on a 32-bit boundary */
2937 qc->pad_len = sg->length & 3;
2938 if (qc->pad_len) {
2939 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2940 struct scatterlist *psg = &qc->pad_sgent;
2941
a4631474 2942 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2943
2944 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2945
2946 if (qc->tf.flags & ATA_TFLAG_WRITE)
2947 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2948 qc->pad_len);
2949
2950 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2951 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2952 /* trim sg */
2953 sg->length -= qc->pad_len;
2e242fa9
TH		 2954 if (sg->length == 0)
2955 trim_sg = 1;
cedc9a47
JG		 2956
2957 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2958 sg->length, qc->pad_len);
2959 }
2960
2e242fa9
TH		 2961 if (trim_sg) {
2962 qc->n_elem--;
e1410f2d
JG		 2963 goto skip_map;
2964 }
2965
1da177e4 2966 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2967 sg->length, dir);
537a95d9
TH		 2968 if (dma_mapping_error(dma_address)) {
2969 /* restore sg */
2970 sg->length += qc->pad_len;
1da177e4 2971 return -1;
537a95d9 2972 }
1da177e4
LT		 2973
2974 sg_dma_address(sg) = dma_address;
32529e01 2975 sg_dma_len(sg) = sg->length;
1da177e4 2976
2e242fa9 2977skip_map:
1da177e4
LT		 2978 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2979 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2980
2981 return 0;
2982}
2983
2984/**
0cba632b
JG		 2985 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2986 * @qc: Command with scatter-gather table to be mapped.
2987 *
2988 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2989 *
2990 * LOCKING:
2991 * spin_lock_irqsave(host_set lock)
2992 *
2993 * RETURNS:
0cba632b 2994 * Zero on success, negative on error.
1da177e4
LT		 2995 *
2996 */
2997
2998static int ata_sg_setup(struct ata_queued_cmd *qc)
2999{
3000 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3001 struct scatterlist *sg = qc->__sg;
3002 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3003 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3004
3005 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3006 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3007
cedc9a47
JG		 3008 /* we must lengthen transfers to end on a 32-bit boundary */
3009 qc->pad_len = lsg->length & 3;
3010 if (qc->pad_len) {
3011 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3012 struct scatterlist *psg = &qc->pad_sgent;
3013 unsigned int offset;
3014
a4631474 3015 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3016
3017 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3018
3019 /*
3020 * psg->page/offset are used to copy to-be-written
3021 * data in this function or read data in ata_sg_clean.
3022 */
3023 offset = lsg->offset + lsg->length - qc->pad_len;
3024 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3025 psg->offset = offset_in_page(offset);
3026
3027 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3028 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3029 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3030 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3031 }
3032
3033 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3034 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3035 /* trim last sg */
3036 lsg->length -= qc->pad_len;
e1410f2d
JG		 3037 if (lsg->length == 0)
3038 trim_sg = 1;
cedc9a47
JG		 3039
3040 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3041 qc->n_elem - 1, lsg->length, qc->pad_len);
3042 }
3043
e1410f2d
JG		 3044 pre_n_elem = qc->n_elem;
3045 if (trim_sg && pre_n_elem)
3046 pre_n_elem--;
3047
3048 if (!pre_n_elem) {
3049 n_elem = 0;
3050 goto skip_map;
3051 }
3052
1da177e4 3053 dir = qc->dma_dir;
e1410f2d 3054 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3055 if (n_elem < 1) {
3056 /* restore last sg */
3057 lsg->length += qc->pad_len;
1da177e4 3058 return -1;
537a95d9 3059 }
1da177e4
LT		 3060
3061 DPRINTK("%d sg elements mapped\n", n_elem);
3062
e1410f2d 3063skip_map:
1da177e4
LT		 3064 qc->n_elem = n_elem;
3065
3066 return 0;
3067}
3068
40e8c82c
TH		 3069/**
3070 * ata_poll_qc_complete - turn irq back on and finish qc
3071 * @qc: Command to complete
8e8b77dd 3072 * @err_mask: ATA status register content
40e8c82c
TH		 3073 *
3074 * LOCKING:
3075 * None. (grabs host lock)
3076 */
3077
a22e2eb0 3078void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3079{
3080 struct ata_port *ap = qc->ap;
b8f6153e 3081 unsigned long flags;
40e8c82c 3082
b8f6153e 3083 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3084 ap->flags &= ~ATA_FLAG_NOINTR;
3085 ata_irq_on(ap);
a22e2eb0 3086 ata_qc_complete(qc);
b8f6153e 3087 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3088}
3089
1da177e4 3090/**
c893a3ae 3091 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3092 * @ap: the target ata_port
1da177e4
LT		 3093 *
3094 * LOCKING:
0cba632b 3095 * None. (executing in kernel thread context)
1da177e4
LT		 3096 *
3097 * RETURNS:
6f0ef4fa 3098 * timeout value to use
1da177e4
LT		 3099 */
3100
3101static unsigned long ata_pio_poll(struct ata_port *ap)
3102{
c14b8331 3103 struct ata_queued_cmd *qc;
1da177e4 3104 u8 status;
14be71f4
AL		 3105 unsigned int poll_state = HSM_ST_UNKNOWN;
3106 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3107
c14b8331 3108 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3109 WARN_ON(qc == NULL);
c14b8331 3110
14be71f4
AL		 3111 switch (ap->hsm_task_state) {
3112 case HSM_ST:
3113 case HSM_ST_POLL:
3114 poll_state = HSM_ST_POLL;
3115 reg_state = HSM_ST;
1da177e4 3116 break;
14be71f4
AL		 3117 case HSM_ST_LAST:
3118 case HSM_ST_LAST_POLL:
3119 poll_state = HSM_ST_LAST_POLL;
3120 reg_state = HSM_ST_LAST;
1da177e4
LT		 3121 break;
3122 default:
3123 BUG();
3124 break;
3125 }
3126
3127 status = ata_chk_status(ap);
3128 if (status & ATA_BUSY) {
3129 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3130 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3131 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3132 return 0;
3133 }
14be71f4 3134 ap->hsm_task_state = poll_state;
1da177e4
LT		 3135 return ATA_SHORT_PAUSE;
3136 }
3137
14be71f4 3138 ap->hsm_task_state = reg_state;
1da177e4
LT		 3139 return 0;
3140}
3141
3142/**
6f0ef4fa
RD		 3143 * ata_pio_complete - check if drive is busy or idle
3144 * @ap: the target ata_port
1da177e4
LT		 3145 *
3146 * LOCKING:
0cba632b 3147 * None. (executing in kernel thread context)
7fb6ec28
JG		 3148 *
3149 * RETURNS:
3150 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3151 */
3152
7fb6ec28 3153static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3154{
3155 struct ata_queued_cmd *qc;
3156 u8 drv_stat;
3157
3158 /*
31433ea3
AC		 3159 * This is purely heuristic. This is a fast path. Sometimes when
3160 * we enter, BSY will be cleared in a chk-status or two. If not,
3161 * the drive is probably seeking or something. Snooze for a couple
3162 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3163 * HSM_ST_POLL state.
1da177e4 3164 */
fe79e683
AL		 3165 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3166 if (drv_stat & ATA_BUSY) {
1da177e4 3167 msleep(2);
fe79e683
AL		 3168 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3169 if (drv_stat & ATA_BUSY) {
14be71f4 3170 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3171 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3172 return 0;
1da177e4
LT		 3173 }
3174 }
3175
c14b8331 3176 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3177 WARN_ON(qc == NULL);
c14b8331 3178
1da177e4
LT		 3179 drv_stat = ata_wait_idle(ap);
3180 if (!ata_ok(drv_stat)) {
1c848984 3181 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3182 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3183 return 0;
1da177e4
LT		 3184 }
3185
14be71f4 3186 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3187
a4631474 3188 WARN_ON(qc->err_mask);
a22e2eb0 3189 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3190
3191 /* another command may start at this point */
3192
3193 return 1;
1da177e4
LT		 3194}
3195
0baab86b
EF		 3196
3197/**
c893a3ae 3198 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3199 * @buf: Buffer to swap
3200 * @buf_words: Number of 16-bit words in buffer.
3201 *
3202 * Swap halves of 16-bit words if needed to convert from
3203 * little-endian byte order to native cpu byte order, or
3204 * vice-versa.
3205 *
3206 * LOCKING:
6f0ef4fa 3207 * Inherited from caller.
0baab86b 3208 */
1da177e4
LT		 3209void swap_buf_le16(u16 *buf, unsigned int buf_words)
3210{
3211#ifdef __BIG_ENDIAN
3212 unsigned int i;
3213
3214 for (i = 0; i < buf_words; i++)
3215 buf[i] = le16_to_cpu(buf[i]);
3216#endif /* __BIG_ENDIAN */
3217}
3218
6ae4cfb5
AL		 3219/**
3220 * ata_mmio_data_xfer - Transfer data by MMIO
3221 * @ap: port to read/write
3222 * @buf: data buffer
3223 * @buflen: buffer length
344babaa 3224 * @write_data: read/write
6ae4cfb5
AL		 3225 *
3226 * Transfer data from/to the device data register by MMIO.
3227 *
3228 * LOCKING:
3229 * Inherited from caller.
6ae4cfb5
AL		 3230 */
3231
1da177e4
LT		 3232static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3233 unsigned int buflen, int write_data)
3234{
3235 unsigned int i;
3236 unsigned int words = buflen >> 1;
3237 u16 *buf16 = (u16 *) buf;
3238 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3239
6ae4cfb5 3240 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3241 if (write_data) {
3242 for (i = 0; i < words; i++)
3243 writew(le16_to_cpu(buf16[i]), mmio);
3244 } else {
3245 for (i = 0; i < words; i++)
3246 buf16[i] = cpu_to_le16(readw(mmio));
3247 }
6ae4cfb5
AL		 3248
3249 /* Transfer trailing 1 byte, if any. */
3250 if (unlikely(buflen & 0x01)) {
3251 u16 align_buf[1] = { 0 };
3252 unsigned char *trailing_buf = buf + buflen - 1;
3253
3254 if (write_data) {
3255 memcpy(align_buf, trailing_buf, 1);
3256 writew(le16_to_cpu(align_buf[0]), mmio);
3257 } else {
3258 align_buf[0] = cpu_to_le16(readw(mmio));
3259 memcpy(trailing_buf, align_buf, 1);
3260 }
3261 }
1da177e4
LT		 3262}
3263
6ae4cfb5
AL		 3264/**
3265 * ata_pio_data_xfer - Transfer data by PIO
3266 * @ap: port to read/write
3267 * @buf: data buffer
3268 * @buflen: buffer length
344babaa 3269 * @write_data: read/write
6ae4cfb5
AL		 3270 *
3271 * Transfer data from/to the device data register by PIO.
3272 *
3273 * LOCKING:
3274 * Inherited from caller.
6ae4cfb5
AL		 3275 */
3276
1da177e4
LT		 3277static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3278 unsigned int buflen, int write_data)
3279{
6ae4cfb5 3280 unsigned int words = buflen >> 1;
1da177e4 3281
6ae4cfb5 3282 /* Transfer multiple of 2 bytes */
1da177e4 3283 if (write_data)
6ae4cfb5 3284 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3285 else
6ae4cfb5
AL		 3286 insw(ap->ioaddr.data_addr, buf, words);
3287
3288 /* Transfer trailing 1 byte, if any. */
3289 if (unlikely(buflen & 0x01)) {
3290 u16 align_buf[1] = { 0 };
3291 unsigned char *trailing_buf = buf + buflen - 1;
3292
3293 if (write_data) {
3294 memcpy(align_buf, trailing_buf, 1);
3295 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3296 } else {
3297 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3298 memcpy(trailing_buf, align_buf, 1);
3299 }
3300 }
1da177e4
LT		 3301}
3302
6ae4cfb5
AL		 3303/**
3304 * ata_data_xfer - Transfer data from/to the data register.
3305 * @ap: port to read/write
3306 * @buf: data buffer
3307 * @buflen: buffer length
3308 * @do_write: read/write
3309 *
3310 * Transfer data from/to the device data register.
3311 *
3312 * LOCKING:
3313 * Inherited from caller.
6ae4cfb5
AL		 3314 */
3315
1da177e4
LT		 3316static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3317 unsigned int buflen, int do_write)
3318{
a1bd9e68
AC		 3319 /* Make the crap hardware pay the costs not the good stuff */
3320 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3321 unsigned long flags;
3322 local_irq_save(flags);
3323 if (ap->flags & ATA_FLAG_MMIO)
3324 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3325 else
3326 ata_pio_data_xfer(ap, buf, buflen, do_write);
3327 local_irq_restore(flags);
3328 } else {
3329 if (ap->flags & ATA_FLAG_MMIO)
3330 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3331 else
3332 ata_pio_data_xfer(ap, buf, buflen, do_write);
3333 }
1da177e4
LT		 3334}
3335
6ae4cfb5
AL		 3336/**
3337 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3338 * @qc: Command on going
3339 *
3340 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3341 *
3342 * LOCKING:
3343 * Inherited from caller.
3344 */
3345
1da177e4
LT		 3346static void ata_pio_sector(struct ata_queued_cmd *qc)
3347{
3348 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3349 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3350 struct ata_port *ap = qc->ap;
3351 struct page *page;
3352 unsigned int offset;
3353 unsigned char *buf;
3354
3355 if (qc->cursect == (qc->nsect - 1))
14be71f4 3356 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3357
3358 page = sg[qc->cursg].page;
3359 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3360
3361 /* get the current page and offset */
3362 page = nth_page(page, (offset >> PAGE_SHIFT));
3363 offset %= PAGE_SIZE;
3364
3365 buf = kmap(page) + offset;
3366
3367 qc->cursect++;
3368 qc->cursg_ofs++;
3369
32529e01 3370 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3371 qc->cursg++;
3372 qc->cursg_ofs = 0;
3373 }
3374
3375 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3376
3377 /* do the actual data transfer */
3378 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3379 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3380
3381 kunmap(page);
3382}
3383
6ae4cfb5
AL		 3384/**
3385 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3386 * @qc: Command on going
3387 * @bytes: number of bytes
3388 *
3389 * Transfer Transfer data from/to the ATAPI device.
3390 *
3391 * LOCKING:
3392 * Inherited from caller.
3393 *
3394 */
3395
1da177e4
LT		 3396static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3397{
3398 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3399 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3400 struct ata_port *ap = qc->ap;
3401 struct page *page;
3402 unsigned char *buf;
3403 unsigned int offset, count;
3404
563a6e1f 3405 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3406 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3407
3408next_sg:
563a6e1f 3409 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3410 /*
563a6e1f
AL		 3411 * The end of qc->sg is reached and the device expects
3412 * more data to transfer. In order not to overrun qc->sg
3413 * and fulfill length specified in the byte count register,
3414 * - for read case, discard trailing data from the device
3415 * - for write case, padding zero data to the device
3416 */
3417 u16 pad_buf[1] = { 0 };
3418 unsigned int words = bytes >> 1;
3419 unsigned int i;
3420
3421 if (words) /* warning if bytes > 1 */
7fb6ec28 3422 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3423 ap->id, bytes);
3424
3425 for (i = 0; i < words; i++)
3426 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3427
14be71f4 3428 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3429 return;
3430 }
3431
cedc9a47 3432 sg = &qc->__sg[qc->cursg];
1da177e4 3433
1da177e4
LT		 3434 page = sg->page;
3435 offset = sg->offset + qc->cursg_ofs;
3436
3437 /* get the current page and offset */
3438 page = nth_page(page, (offset >> PAGE_SHIFT));
3439 offset %= PAGE_SIZE;
3440
6952df03 3441 /* don't overrun current sg */
32529e01 3442 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3443
3444 /* don't cross page boundaries */
3445 count = min(count, (unsigned int)PAGE_SIZE - offset);
3446
3447 buf = kmap(page) + offset;
3448
3449 bytes -= count;
3450 qc->curbytes += count;
3451 qc->cursg_ofs += count;
3452
32529e01 3453 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3454 qc->cursg++;
3455 qc->cursg_ofs = 0;
3456 }
3457
3458 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3459
3460 /* do the actual data transfer */
3461 ata_data_xfer(ap, buf, count, do_write);
3462
3463 kunmap(page);
3464
563a6e1f 3465 if (bytes)
1da177e4 3466 goto next_sg;
1da177e4
LT		 3467}
3468
6ae4cfb5
AL		 3469/**
3470 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3471 * @qc: Command on going
3472 *
3473 * Transfer Transfer data from/to the ATAPI device.
3474 *
3475 * LOCKING:
3476 * Inherited from caller.
6ae4cfb5
AL		 3477 */
3478
1da177e4
LT		 3479static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3480{
3481 struct ata_port *ap = qc->ap;
3482 struct ata_device *dev = qc->dev;
3483 unsigned int ireason, bc_lo, bc_hi, bytes;
3484 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3485
3486 ap->ops->tf_read(ap, &qc->tf);
3487 ireason = qc->tf.nsect;
3488 bc_lo = qc->tf.lbam;
3489 bc_hi = qc->tf.lbah;
3490 bytes = (bc_hi << 8) | bc_lo;
3491
3492 /* shall be cleared to zero, indicating xfer of data */
3493 if (ireason & (1 << 0))
3494 goto err_out;
3495
3496 /* make sure transfer direction matches expected */
3497 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3498 if (do_write != i_write)
3499 goto err_out;
3500
3501 __atapi_pio_bytes(qc, bytes);
3502
3503 return;
3504
3505err_out:
3506 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3507 ap->id, dev->devno);
11a56d24 3508 qc->err_mask |= AC_ERR_HSM;
14be71f4 3509 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3510}
3511
3512/**
6f0ef4fa
RD		 3513 * ata_pio_block - start PIO on a block
3514 * @ap: the target ata_port
1da177e4
LT		 3515 *
3516 * LOCKING:
0cba632b 3517 * None. (executing in kernel thread context)
1da177e4
LT		 3518 */
3519
3520static void ata_pio_block(struct ata_port *ap)
3521{
3522 struct ata_queued_cmd *qc;
3523 u8 status;
3524
3525 /*
6f0ef4fa 3526 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3527 * Sometimes when we enter, BSY will be cleared in
3528 * a chk-status or two. If not, the drive is probably seeking
3529 * or something. Snooze for a couple msecs, then
3530 * chk-status again. If still busy, fall back to
14be71f4 3531 * HSM_ST_POLL state.
1da177e4
LT		 3532 */
3533 status = ata_busy_wait(ap, ATA_BUSY, 5);
3534 if (status & ATA_BUSY) {
3535 msleep(2);
3536 status = ata_busy_wait(ap, ATA_BUSY, 10);
3537 if (status & ATA_BUSY) {
14be71f4 3538 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3539 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3540 return;
3541 }
3542 }
3543
3544 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3545 WARN_ON(qc == NULL);
1da177e4 3546
fe79e683
AL		 3547 /* check error */
3548 if (status & (ATA_ERR | ATA_DF)) {
3549 qc->err_mask |= AC_ERR_DEV;
3550 ap->hsm_task_state = HSM_ST_ERR;
3551 return;
3552 }
3553
3554 /* transfer data if any */
1da177e4 3555 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3556 /* DRQ=0 means no more data to transfer */
1da177e4 3557 if ((status & ATA_DRQ) == 0) {
14be71f4 3558 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3559 return;
3560 }
3561
3562 atapi_pio_bytes(qc);
3563 } else {
3564 /* handle BSY=0, DRQ=0 as error */
3565 if ((status & ATA_DRQ) == 0) {
11a56d24 3566 qc->err_mask |= AC_ERR_HSM;
14be71f4 3567 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3568 return;
3569 }
3570
3571 ata_pio_sector(qc);
3572 }
3573}
3574
3575static void ata_pio_error(struct ata_port *ap)
3576{
3577 struct ata_queued_cmd *qc;
a7dac447 3578
1da177e4 3579 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3580 WARN_ON(qc == NULL);
1da177e4 3581
0565c26d
AL		 3582 if (qc->tf.command != ATA_CMD_PACKET)
3583 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3584
1c848984
AL		 3585 /* make sure qc->err_mask is available to
3586 * know what's wrong and recover
3587 */
a4631474 3588 WARN_ON(qc->err_mask == 0);
1c848984 3589
14be71f4 3590 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3591
a22e2eb0 3592 ata_poll_qc_complete(qc);
1da177e4
LT		 3593}
3594
3595static void ata_pio_task(void *_data)
3596{
3597 struct ata_port *ap = _data;
7fb6ec28
JG		 3598 unsigned long timeout;
3599 int qc_completed;
3600
3601fsm_start:
3602 timeout = 0;
3603 qc_completed = 0;
1da177e4 3604
14be71f4
AL		 3605 switch (ap->hsm_task_state) {
3606 case HSM_ST_IDLE:
1da177e4
LT		 3607 return;
3608
14be71f4 3609 case HSM_ST:
1da177e4
LT		 3610 ata_pio_block(ap);
3611 break;
3612
14be71f4 3613 case HSM_ST_LAST:
7fb6ec28 3614 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3615 break;
3616
14be71f4
AL		 3617 case HSM_ST_POLL:
3618 case HSM_ST_LAST_POLL:
1da177e4
LT		 3619 timeout = ata_pio_poll(ap);
3620 break;
3621
14be71f4
AL		 3622 case HSM_ST_TMOUT:
3623 case HSM_ST_ERR:
1da177e4
LT		 3624 ata_pio_error(ap);
3625 return;
3626 }
3627
3628 if (timeout)
8061f5f0 3629 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3630 else if (!qc_completed)
3631 goto fsm_start;
1da177e4
LT		 3632}
3633
8061f5f0
TH		 3634/**
3635 * atapi_packet_task - Write CDB bytes to hardware
3636 * @_data: Port to which ATAPI device is attached.
3637 *
3638 * When device has indicated its readiness to accept
3639 * a CDB, this function is called. Send the CDB.
3640 * If DMA is to be performed, exit immediately.
3641 * Otherwise, we are in polling mode, so poll
3642 * status under operation succeeds or fails.
3643 *
3644 * LOCKING:
3645 * Kernel thread context (may sleep)
3646 */
3647
3648static void atapi_packet_task(void *_data)
3649{
3650 struct ata_port *ap = _data;
3651 struct ata_queued_cmd *qc;
3652 u8 status;
3653
3654 qc = ata_qc_from_tag(ap, ap->active_tag);
3655 WARN_ON(qc == NULL);
3656 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3657
3658 /* sleep-wait for BSY to clear */
3659 DPRINTK("busy wait\n");
3660 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3661 qc->err_mask |= AC_ERR_TIMEOUT;
3662 goto err_out;
3663 }
3664
3665 /* make sure DRQ is set */
3666 status = ata_chk_status(ap);
3667 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3668 qc->err_mask |= AC_ERR_HSM;
3669 goto err_out;
3670 }
3671
3672 /* send SCSI cdb */
3673 DPRINTK("send cdb\n");
3674 WARN_ON(qc->dev->cdb_len < 12);
3675
3676 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3677 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3678 unsigned long flags;
3679
3680 /* Once we're done issuing command and kicking bmdma,
3681 * irq handler takes over. To not lose irq, we need
3682 * to clear NOINTR flag before sending cdb, but
3683 * interrupt handler shouldn't be invoked before we're
3684 * finished. Hence, the following locking.
3685 */
3686 spin_lock_irqsave(&ap->host_set->lock, flags);
3687 ap->flags &= ~ATA_FLAG_NOINTR;
3688 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3689 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3690 ap->ops->bmdma_start(qc); /* initiate bmdma */
3691 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3692 } else {
3693 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3694
3695 /* PIO commands are handled by polling */
3696 ap->hsm_task_state = HSM_ST;
3697 ata_port_queue_task(ap, ata_pio_task, ap, 0);
3698 }
3699
3700 return;
3701
3702err_out:
3703 ata_poll_qc_complete(qc);
3704}
3705
1da177e4
LT		 3706/**
3707 * ata_qc_timeout - Handle timeout of queued command
3708 * @qc: Command that timed out
3709 *
3710 * Some part of the kernel (currently, only the SCSI layer)
3711 * has noticed that the active command on port @ap has not
3712 * completed after a specified length of time. Handle this
3713 * condition by disabling DMA (if necessary) and completing
3714 * transactions, with error if necessary.
3715 *
3716 * This also handles the case of the "lost interrupt", where
3717 * for some reason (possibly hardware bug, possibly driver bug)
3718 * an interrupt was not delivered to the driver, even though the
3719 * transaction completed successfully.
3720 *
3721 * LOCKING:
0cba632b 3722 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3723 */
3724
3725static void ata_qc_timeout(struct ata_queued_cmd *qc)
3726{
3727 struct ata_port *ap = qc->ap;
b8f6153e 3728 struct ata_host_set *host_set = ap->host_set;
1da177e4 3729 u8 host_stat = 0, drv_stat;
b8f6153e 3730 unsigned long flags;
1da177e4
LT		 3731
3732 DPRINTK("ENTER\n");
3733
c18d06f8
TH		 3734 ap->hsm_task_state = HSM_ST_IDLE;
3735
b8f6153e
JG		 3736 spin_lock_irqsave(&host_set->lock, flags);
3737
1da177e4
LT		 3738 switch (qc->tf.protocol) {
3739
3740 case ATA_PROT_DMA:
3741 case ATA_PROT_ATAPI_DMA:
3742 host_stat = ap->ops->bmdma_status(ap);
3743
3744 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3745 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3746
3747 /* fall through */
3748
3749 default:
3750 ata_altstatus(ap);
3751 drv_stat = ata_chk_status(ap);
3752
3753 /* ack bmdma irq events */
3754 ap->ops->irq_clear(ap);
3755
3756 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3757 ap->id, qc->tf.command, drv_stat, host_stat);
3758
3759 /* complete taskfile transaction */
a22e2eb0 3760 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3761 break;
3762 }
b8f6153e
JG		 3763
3764 spin_unlock_irqrestore(&host_set->lock, flags);
3765
a72ec4ce
TH		 3766 ata_eh_qc_complete(qc);
3767
1da177e4
LT		 3768 DPRINTK("EXIT\n");
3769}
3770
3771/**
3772 * ata_eng_timeout - Handle timeout of queued command
3773 * @ap: Port on which timed-out command is active
3774 *
3775 * Some part of the kernel (currently, only the SCSI layer)
3776 * has noticed that the active command on port @ap has not
3777 * completed after a specified length of time. Handle this
3778 * condition by disabling DMA (if necessary) and completing
3779 * transactions, with error if necessary.
3780 *
3781 * This also handles the case of the "lost interrupt", where
3782 * for some reason (possibly hardware bug, possibly driver bug)
3783 * an interrupt was not delivered to the driver, even though the
3784 * transaction completed successfully.
3785 *
3786 * LOCKING:
3787 * Inherited from SCSI layer (none, can sleep)
3788 */
3789
3790void ata_eng_timeout(struct ata_port *ap)
3791{
1da177e4
LT		 3792 DPRINTK("ENTER\n");
3793
f6379020 3794 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3795
1da177e4
LT		 3796 DPRINTK("EXIT\n");
3797}
3798
3799/**
3800 * ata_qc_new - Request an available ATA command, for queueing
3801 * @ap: Port associated with device @dev
3802 * @dev: Device from whom we request an available command structure
3803 *
3804 * LOCKING:
0cba632b 3805 * None.
1da177e4
LT		 3806 */
3807
3808static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3809{
3810 struct ata_queued_cmd *qc = NULL;
3811 unsigned int i;
3812
3813 for (i = 0; i < ATA_MAX_QUEUE; i++)
3814 if (!test_and_set_bit(i, &ap->qactive)) {
3815 qc = ata_qc_from_tag(ap, i);
3816 break;
3817 }
3818
3819 if (qc)
3820 qc->tag = i;
3821
3822 return qc;
3823}
3824
3825/**
3826 * ata_qc_new_init - Request an available ATA command, and initialize it
3827 * @ap: Port associated with device @dev
3828 * @dev: Device from whom we request an available command structure
3829 *
3830 * LOCKING:
0cba632b 3831 * None.
1da177e4
LT		 3832 */
3833
3834struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3835 struct ata_device *dev)
3836{
3837 struct ata_queued_cmd *qc;
3838
3839 qc = ata_qc_new(ap);
3840 if (qc) {
1da177e4
LT		 3841 qc->scsicmd = NULL;
3842 qc->ap = ap;
3843 qc->dev = dev;
1da177e4 3844
2c13b7ce 3845 ata_qc_reinit(qc);
1da177e4
LT		 3846 }
3847
3848 return qc;
3849}
3850
1da177e4
LT		 3851/**
3852 * ata_qc_free - free unused ata_queued_cmd
3853 * @qc: Command to complete
3854 *
3855 * Designed to free unused ata_queued_cmd object
3856 * in case something prevents using it.
3857 *
3858 * LOCKING:
0cba632b 3859 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3860 */
3861void ata_qc_free(struct ata_queued_cmd *qc)
3862{
4ba946e9
TH		 3863 struct ata_port *ap = qc->ap;
3864 unsigned int tag;
3865
a4631474 3866 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3867
4ba946e9
TH		 3868 qc->flags = 0;
3869 tag = qc->tag;
3870 if (likely(ata_tag_valid(tag))) {
3871 if (tag == ap->active_tag)
3872 ap->active_tag = ATA_TAG_POISON;
3873 qc->tag = ATA_TAG_POISON;
3874 clear_bit(tag, &ap->qactive);
3875 }
1da177e4
LT		 3876}
3877
76014427 3878void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3879{
a4631474
TH		 3880 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3881 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3882
3883 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3884 ata_sg_clean(qc);
3885
3f3791d3
AL		 3886 /* atapi: mark qc as inactive to prevent the interrupt handler
3887 * from completing the command twice later, before the error handler
3888 * is called. (when rc != 0 and atapi request sense is needed)
3889 */
3890 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3891
1da177e4 3892 /* call completion callback */
77853bf2 3893 qc->complete_fn(qc);
1da177e4
LT		 3894}
3895
3896static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3897{
3898 struct ata_port *ap = qc->ap;
3899
3900 switch (qc->tf.protocol) {
3901 case ATA_PROT_DMA:
3902 case ATA_PROT_ATAPI_DMA:
3903 return 1;
3904
3905 case ATA_PROT_ATAPI:
3906 case ATA_PROT_PIO:
3907 case ATA_PROT_PIO_MULT:
3908 if (ap->flags & ATA_FLAG_PIO_DMA)
3909 return 1;
3910
3911 /* fall through */
3912
3913 default:
3914 return 0;
3915 }
3916
3917 /* never reached */
3918}
3919
3920/**
3921 * ata_qc_issue - issue taskfile to device
3922 * @qc: command to issue to device
3923 *
3924 * Prepare an ATA command to submission to device.
3925 * This includes mapping the data into a DMA-able
3926 * area, filling in the S/G table, and finally
3927 * writing the taskfile to hardware, starting the command.
3928 *
3929 * LOCKING:
3930 * spin_lock_irqsave(host_set lock)
3931 *
3932 * RETURNS:
9a3d9eb0 3933 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3934 */
3935
9a3d9eb0 3936unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3937{
3938 struct ata_port *ap = qc->ap;
3939
3940 if (ata_should_dma_map(qc)) {
3941 if (qc->flags & ATA_QCFLAG_SG) {
3942 if (ata_sg_setup(qc))
8e436af9 3943 goto sg_err;
1da177e4
LT		 3944 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3945 if (ata_sg_setup_one(qc))
8e436af9 3946 goto sg_err;
1da177e4
LT		 3947 }
3948 } else {
3949 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3950 }
3951
3952 ap->ops->qc_prep(qc);
3953
3954 qc->ap->active_tag = qc->tag;
3955 qc->flags |= ATA_QCFLAG_ACTIVE;
3956
3957 return ap->ops->qc_issue(qc);
3958
8e436af9
TH		 3959sg_err:
3960 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 3961 return AC_ERR_SYSTEM;
1da177e4
LT		 3962}
3963
0baab86b 3964
1da177e4
LT		 3965/**
3966 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3967 * @qc: command to issue to device
3968 *
3969 * Using various libata functions and hooks, this function
3970 * starts an ATA command. ATA commands are grouped into
3971 * classes called "protocols", and issuing each type of protocol
3972 * is slightly different.
3973 *
0baab86b
EF		 3974 * May be used as the qc_issue() entry in ata_port_operations.
3975 *
1da177e4
LT		 3976 * LOCKING:
3977 * spin_lock_irqsave(host_set lock)
3978 *
3979 * RETURNS:
9a3d9eb0 3980 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3981 */
3982
9a3d9eb0 3983unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 3984{
3985 struct ata_port *ap = qc->ap;
3986
3987 ata_dev_select(ap, qc->dev->devno, 1, 0);
3988
3989 switch (qc->tf.protocol) {
3990 case ATA_PROT_NODATA:
e5338254 3991 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 3992 break;
3993
3994 case ATA_PROT_DMA:
3995 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3996 ap->ops->bmdma_setup(qc); /* set up bmdma */
3997 ap->ops->bmdma_start(qc); /* initiate bmdma */
3998 break;
3999
4000 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4001 ata_qc_set_polling(qc);
e5338254 4002 ata_tf_to_host(ap, &qc->tf);
14be71f4 4003 ap->hsm_task_state = HSM_ST;
8061f5f0 4004 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4005 break;
4006
4007 case ATA_PROT_ATAPI:
4008 ata_qc_set_polling(qc);
e5338254 4009 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4010 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4011 break;
4012
4013 case ATA_PROT_ATAPI_NODATA:
c1389503 4014 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4015 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4016 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4017 break;
4018
4019 case ATA_PROT_ATAPI_DMA:
c1389503 4020 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4021 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4022 ap->ops->bmdma_setup(qc); /* set up bmdma */
8061f5f0 4023 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4024 break;
4025
4026 default:
4027 WARN_ON(1);
9a3d9eb0 4028 return AC_ERR_SYSTEM;
1da177e4
LT		 4029 }
4030
4031 return 0;
4032}
4033
4034/**
0baab86b 4035 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 4036 * @qc: Info associated with this ATA transaction.
4037 *
4038 * LOCKING:
4039 * spin_lock_irqsave(host_set lock)
4040 */
4041
4042static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
4043{
4044 struct ata_port *ap = qc->ap;
4045 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4046 u8 dmactl;
4047 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4048
4049 /* load PRD table addr. */
4050 mb(); /* make sure PRD table writes are visible to controller */
4051 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
4052
4053 /* specify data direction, triple-check start bit is clear */
4054 dmactl = readb(mmio + ATA_DMA_CMD);
4055 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4056 if (!rw)
4057 dmactl |= ATA_DMA_WR;
4058 writeb(dmactl, mmio + ATA_DMA_CMD);
4059
4060 /* issue r/w command */
4061 ap->ops->exec_command(ap, &qc->tf);
4062}
4063
4064/**
b73fc89f 4065 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 4066 * @qc: Info associated with this ATA transaction.
4067 *
4068 * LOCKING:
4069 * spin_lock_irqsave(host_set lock)
4070 */
4071
4072static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4073{
4074 struct ata_port *ap = qc->ap;
4075 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4076 u8 dmactl;
4077
4078 /* start host DMA transaction */
4079 dmactl = readb(mmio + ATA_DMA_CMD);
4080 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4081
4082 /* Strictly, one may wish to issue a readb() here, to
4083 * flush the mmio write. However, control also passes
4084 * to the hardware at this point, and it will interrupt
4085 * us when we are to resume control. So, in effect,
4086 * we don't care when the mmio write flushes.
4087 * Further, a read of the DMA status register _immediately_
4088 * following the write may not be what certain flaky hardware
4089 * is expected, so I think it is best to not add a readb()
4090 * without first all the MMIO ATA cards/mobos.
4091 * Or maybe I'm just being paranoid.
4092 */
4093}
4094
4095/**
4096 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4097 * @qc: Info associated with this ATA transaction.
4098 *
4099 * LOCKING:
4100 * spin_lock_irqsave(host_set lock)
4101 */
4102
4103static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4104{
4105 struct ata_port *ap = qc->ap;
4106 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4107 u8 dmactl;
4108
4109 /* load PRD table addr. */
4110 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4111
4112 /* specify data direction, triple-check start bit is clear */
4113 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4114 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4115 if (!rw)
4116 dmactl |= ATA_DMA_WR;
4117 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4118
4119 /* issue r/w command */
4120 ap->ops->exec_command(ap, &qc->tf);
4121}
4122
4123/**
4124 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4125 * @qc: Info associated with this ATA transaction.
4126 *
4127 * LOCKING:
4128 * spin_lock_irqsave(host_set lock)
4129 */
4130
4131static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4132{
4133 struct ata_port *ap = qc->ap;
4134 u8 dmactl;
4135
4136 /* start host DMA transaction */
4137 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4138 outb(dmactl | ATA_DMA_START,
4139 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4140}
4141
0baab86b
EF		 4142
4143/**
4144 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4145 * @qc: Info associated with this ATA transaction.
4146 *
4147 * Writes the ATA_DMA_START flag to the DMA command register.
4148 *
4149 * May be used as the bmdma_start() entry in ata_port_operations.
4150 *
4151 * LOCKING:
4152 * spin_lock_irqsave(host_set lock)
4153 */
1da177e4
LT		 4154void ata_bmdma_start(struct ata_queued_cmd *qc)
4155{
4156 if (qc->ap->flags & ATA_FLAG_MMIO)
4157 ata_bmdma_start_mmio(qc);
4158 else
4159 ata_bmdma_start_pio(qc);
4160}
4161
0baab86b
EF		 4162
4163/**
4164 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4165 * @qc: Info associated with this ATA transaction.
4166 *
4167 * Writes address of PRD table to device's PRD Table Address
4168 * register, sets the DMA control register, and calls
4169 * ops->exec_command() to start the transfer.
4170 *
4171 * May be used as the bmdma_setup() entry in ata_port_operations.
4172 *
4173 * LOCKING:
4174 * spin_lock_irqsave(host_set lock)
4175 */
1da177e4
LT		 4176void ata_bmdma_setup(struct ata_queued_cmd *qc)
4177{
4178 if (qc->ap->flags & ATA_FLAG_MMIO)
4179 ata_bmdma_setup_mmio(qc);
4180 else
4181 ata_bmdma_setup_pio(qc);
4182}
4183
0baab86b
EF		 4184
4185/**
4186 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 4187 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4188 *
4189 * Clear interrupt and error flags in DMA status register.
4190 *
4191 * May be used as the irq_clear() entry in ata_port_operations.
4192 *
4193 * LOCKING:
4194 * spin_lock_irqsave(host_set lock)
4195 */
4196
1da177e4
LT		 4197void ata_bmdma_irq_clear(struct ata_port *ap)
4198{
4199 if (ap->flags & ATA_FLAG_MMIO) {
4200 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4201 writeb(readb(mmio), mmio);
4202 } else {
4203 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4204 outb(inb(addr), addr);
4205 }
4206
4207}
4208
0baab86b
EF		 4209
4210/**
4211 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 4212 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4213 *
4214 * Read and return BMDMA status register.
4215 *
4216 * May be used as the bmdma_status() entry in ata_port_operations.
4217 *
4218 * LOCKING:
4219 * spin_lock_irqsave(host_set lock)
4220 */
4221
1da177e4
LT		 4222u8 ata_bmdma_status(struct ata_port *ap)
4223{
4224 u8 host_stat;
4225 if (ap->flags & ATA_FLAG_MMIO) {
4226 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4227 host_stat = readb(mmio + ATA_DMA_STATUS);
4228 } else
ee500aab 4229 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 4230 return host_stat;
4231}
4232
0baab86b
EF		 4233
4234/**
4235 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4236 * @qc: Command we are ending DMA for
0baab86b
EF		 4237 *
4238 * Clears the ATA_DMA_START flag in the dma control register
4239 *
4240 * May be used as the bmdma_stop() entry in ata_port_operations.
4241 *
4242 * LOCKING:
4243 * spin_lock_irqsave(host_set lock)
4244 */
4245
b73fc89f 4246void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4247{
b73fc89f 4248 struct ata_port *ap = qc->ap;
1da177e4
LT		 4249 if (ap->flags & ATA_FLAG_MMIO) {
4250 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4251
4252 /* clear start/stop bit */
4253 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4254 mmio + ATA_DMA_CMD);
4255 } else {
4256 /* clear start/stop bit */
4257 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4258 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4259 }
4260
4261 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4262 ata_altstatus(ap); /* dummy read */
4263}
4264
4265/**
4266 * ata_host_intr - Handle host interrupt for given (port, task)
4267 * @ap: Port on which interrupt arrived (possibly...)
4268 * @qc: Taskfile currently active in engine
4269 *
4270 * Handle host interrupt for given queued command. Currently,
4271 * only DMA interrupts are handled. All other commands are
4272 * handled via polling with interrupts disabled (nIEN bit).
4273 *
4274 * LOCKING:
4275 * spin_lock_irqsave(host_set lock)
4276 *
4277 * RETURNS:
4278 * One if interrupt was handled, zero if not (shared irq).
4279 */
4280
4281inline unsigned int ata_host_intr (struct ata_port *ap,
4282 struct ata_queued_cmd *qc)
4283{
4284 u8 status, host_stat;
4285
4286 switch (qc->tf.protocol) {
4287
4288 case ATA_PROT_DMA:
4289 case ATA_PROT_ATAPI_DMA:
4290 case ATA_PROT_ATAPI:
4291 /* check status of DMA engine */
4292 host_stat = ap->ops->bmdma_status(ap);
4293 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4294
4295 /* if it's not our irq... */
4296 if (!(host_stat & ATA_DMA_INTR))
4297 goto idle_irq;
4298
4299 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4300 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4301
4302 /* fall through */
4303
4304 case ATA_PROT_ATAPI_NODATA:
4305 case ATA_PROT_NODATA:
4306 /* check altstatus */
4307 status = ata_altstatus(ap);
4308 if (status & ATA_BUSY)
4309 goto idle_irq;
4310
4311 /* check main status, clearing INTRQ */
4312 status = ata_chk_status(ap);
4313 if (unlikely(status & ATA_BUSY))
4314 goto idle_irq;
4315 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4316 ap->id, qc->tf.protocol, status);
4317
4318 /* ack bmdma irq events */
4319 ap->ops->irq_clear(ap);
4320
4321 /* complete taskfile transaction */
a22e2eb0
AL		 4322 qc->err_mask |= ac_err_mask(status);
4323 ata_qc_complete(qc);
1da177e4
LT		 4324 break;
4325
4326 default:
4327 goto idle_irq;
4328 }
4329
4330 return 1; /* irq handled */
4331
4332idle_irq:
4333 ap->stats.idle_irq++;
4334
4335#ifdef ATA_IRQ_TRAP
4336 if ((ap->stats.idle_irq % 1000) == 0) {
4337 handled = 1;
4338 ata_irq_ack(ap, 0); /* debug trap */
4339 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4340 }
4341#endif
4342 return 0; /* irq not handled */
4343}
4344
4345/**
4346 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4347 * @irq: irq line (unused)
4348 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4349 * @regs: unused
4350 *
0cba632b
JG		 4351 * Default interrupt handler for PCI IDE devices. Calls
4352 * ata_host_intr() for each port that is not disabled.
4353 *
1da177e4 4354 * LOCKING:
0cba632b 4355 * Obtains host_set lock during operation.
1da177e4
LT		 4356 *
4357 * RETURNS:
0cba632b 4358 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4359 */
4360
4361irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4362{
4363 struct ata_host_set *host_set = dev_instance;
4364 unsigned int i;
4365 unsigned int handled = 0;
4366 unsigned long flags;
4367
4368 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4369 spin_lock_irqsave(&host_set->lock, flags);
4370
4371 for (i = 0; i < host_set->n_ports; i++) {
4372 struct ata_port *ap;
4373
4374 ap = host_set->ports[i];
c1389503
TH		 4375 if (ap &&
4376 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4377 struct ata_queued_cmd *qc;
4378
4379 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4380 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4381 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4382 handled |= ata_host_intr(ap, qc);
4383 }
4384 }
4385
4386 spin_unlock_irqrestore(&host_set->lock, flags);
4387
4388 return IRQ_RETVAL(handled);
4389}
4390
0baab86b 4391
9b847548
JA		 4392/*
4393 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4394 * without filling any other registers
4395 */
4396static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4397 u8 cmd)
4398{
4399 struct ata_taskfile tf;
4400 int err;
4401
4402 ata_tf_init(ap, &tf, dev->devno);
4403
4404 tf.command = cmd;
4405 tf.flags |= ATA_TFLAG_DEVICE;
4406 tf.protocol = ATA_PROT_NODATA;
4407
4408 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4409 if (err)
4410 printk(KERN_ERR "%s: ata command failed: %d\n",
4411 __FUNCTION__, err);
4412
4413 return err;
4414}
4415
4416static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4417{
4418 u8 cmd;
4419
4420 if (!ata_try_flush_cache(dev))
4421 return 0;
4422
4423 if (ata_id_has_flush_ext(dev->id))
4424 cmd = ATA_CMD_FLUSH_EXT;
4425 else
4426 cmd = ATA_CMD_FLUSH;
4427
4428 return ata_do_simple_cmd(ap, dev, cmd);
4429}
4430
4431static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4432{
4433 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4434}
4435
4436static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4437{
4438 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4439}
4440
4441/**
4442 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4443 * @ap: port the device is connected to
4444 * @dev: the device to resume
9b847548
JA		 4445 *
4446 * Kick the drive back into action, by sending it an idle immediate
4447 * command and making sure its transfer mode matches between drive
4448 * and host.
4449 *
4450 */
4451int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4452{
4453 if (ap->flags & ATA_FLAG_SUSPENDED) {
4454 ap->flags &= ~ATA_FLAG_SUSPENDED;
4455 ata_set_mode(ap);
4456 }
4457 if (!ata_dev_present(dev))
4458 return 0;
4459 if (dev->class == ATA_DEV_ATA)
4460 ata_start_drive(ap, dev);
4461
4462 return 0;
4463}
4464
4465/**
4466 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4467 * @ap: port the device is connected to
4468 * @dev: the device to suspend
9b847548
JA		 4469 *
4470 * Flush the cache on the drive, if appropriate, then issue a
4471 * standbynow command.
9b847548
JA		 4472 */
4473int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4474{
4475 if (!ata_dev_present(dev))
4476 return 0;
4477 if (dev->class == ATA_DEV_ATA)
4478 ata_flush_cache(ap, dev);
4479
4480 ata_standby_drive(ap, dev);
4481 ap->flags |= ATA_FLAG_SUSPENDED;
4482 return 0;
4483}
4484
c893a3ae
RD		 4485/**
4486 * ata_port_start - Set port up for dma.
4487 * @ap: Port to initialize
4488 *
4489 * Called just after data structures for each port are
4490 * initialized. Allocates space for PRD table.
4491 *
4492 * May be used as the port_start() entry in ata_port_operations.
4493 *
4494 * LOCKING:
4495 * Inherited from caller.
4496 */
4497
1da177e4
LT		 4498int ata_port_start (struct ata_port *ap)
4499{
4500 struct device *dev = ap->host_set->dev;
6037d6bb 4501 int rc;
1da177e4
LT		 4502
4503 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4504 if (!ap->prd)
4505 return -ENOMEM;
4506
6037d6bb
JG		 4507 rc = ata_pad_alloc(ap, dev);
4508 if (rc) {
cedc9a47 4509 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4510 return rc;
cedc9a47
JG		 4511 }
4512
1da177e4
LT		 4513 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4514
4515 return 0;
4516}
4517
0baab86b
EF		 4518
4519/**
4520 * ata_port_stop - Undo ata_port_start()
4521 * @ap: Port to shut down
4522 *
4523 * Frees the PRD table.
4524 *
4525 * May be used as the port_stop() entry in ata_port_operations.
4526 *
4527 * LOCKING:
6f0ef4fa 4528 * Inherited from caller.
0baab86b
EF		 4529 */
4530
1da177e4
LT		 4531void ata_port_stop (struct ata_port *ap)
4532{
4533 struct device *dev = ap->host_set->dev;
4534
4535 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4536 ata_pad_free(ap, dev);
1da177e4
LT		 4537}
4538
aa8f0dc6
JG		 4539void ata_host_stop (struct ata_host_set *host_set)
4540{
4541 if (host_set->mmio_base)
4542 iounmap(host_set->mmio_base);
4543}
4544
4545
1da177e4
LT		 4546/**
4547 * ata_host_remove - Unregister SCSI host structure with upper layers
4548 * @ap: Port to unregister
4549 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4550 *
4551 * LOCKING:
6f0ef4fa 4552 * Inherited from caller.
1da177e4
LT		 4553 */
4554
4555static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4556{
4557 struct Scsi_Host *sh = ap->host;
4558
4559 DPRINTK("ENTER\n");
4560
4561 if (do_unregister)
4562 scsi_remove_host(sh);
4563
4564 ap->ops->port_stop(ap);
4565}
4566
4567/**
4568 * ata_host_init - Initialize an ata_port structure
4569 * @ap: Structure to initialize
4570 * @host: associated SCSI mid-layer structure
4571 * @host_set: Collection of hosts to which @ap belongs
4572 * @ent: Probe information provided by low-level driver
4573 * @port_no: Port number associated with this ata_port
4574 *
0cba632b
JG		 4575 * Initialize a new ata_port structure, and its associated
4576 * scsi_host.
4577 *
1da177e4 4578 * LOCKING:
0cba632b 4579 * Inherited from caller.
1da177e4
LT		 4580 */
4581
4582static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4583 struct ata_host_set *host_set,
057ace5e 4584 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4585{
4586 unsigned int i;
4587
4588 host->max_id = 16;
4589 host->max_lun = 1;
4590 host->max_channel = 1;
4591 host->unique_id = ata_unique_id++;
4592 host->max_cmd_len = 12;
12413197 4593
1da177e4
LT		 4594 ap->flags = ATA_FLAG_PORT_DISABLED;
4595 ap->id = host->unique_id;
4596 ap->host = host;
4597 ap->ctl = ATA_DEVCTL_OBS;
4598 ap->host_set = host_set;
4599 ap->port_no = port_no;
4600 ap->hard_port_no =
4601 ent->legacy_mode ? ent->hard_port_no : port_no;
4602 ap->pio_mask = ent->pio_mask;
4603 ap->mwdma_mask = ent->mwdma_mask;
4604 ap->udma_mask = ent->udma_mask;
4605 ap->flags |= ent->host_flags;
4606 ap->ops = ent->port_ops;
4607 ap->cbl = ATA_CBL_NONE;
4608 ap->active_tag = ATA_TAG_POISON;
4609 ap->last_ctl = 0xFF;
4610
86e45b6b 4611 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4612 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4613
4614 for (i = 0; i < ATA_MAX_DEVICES; i++)
4615 ap->device[i].devno = i;
4616
4617#ifdef ATA_IRQ_TRAP
4618 ap->stats.unhandled_irq = 1;
4619 ap->stats.idle_irq = 1;
4620#endif
4621
4622 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4623}
4624
4625/**
4626 * ata_host_add - Attach low-level ATA driver to system
4627 * @ent: Information provided by low-level driver
4628 * @host_set: Collections of ports to which we add
4629 * @port_no: Port number associated with this host
4630 *
0cba632b
JG		 4631 * Attach low-level ATA driver to system.
4632 *
1da177e4 4633 * LOCKING:
0cba632b 4634 * PCI/etc. bus probe sem.
1da177e4
LT		 4635 *
4636 * RETURNS:
0cba632b 4637 * New ata_port on success, for NULL on error.
1da177e4
LT		 4638 */
4639
057ace5e 4640static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4641 struct ata_host_set *host_set,
4642 unsigned int port_no)
4643{
4644 struct Scsi_Host *host;
4645 struct ata_port *ap;
4646 int rc;
4647
4648 DPRINTK("ENTER\n");
4649 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4650 if (!host)
4651 return NULL;
4652
4653 ap = (struct ata_port *) &host->hostdata[0];
4654
4655 ata_host_init(ap, host, host_set, ent, port_no);
4656
4657 rc = ap->ops->port_start(ap);
4658 if (rc)
4659 goto err_out;
4660
4661 return ap;
4662
4663err_out:
4664 scsi_host_put(host);
4665 return NULL;
4666}
4667
4668/**
0cba632b
JG		 4669 * ata_device_add - Register hardware device with ATA and SCSI layers
4670 * @ent: Probe information describing hardware device to be registered
4671 *
4672 * This function processes the information provided in the probe
4673 * information struct @ent, allocates the necessary ATA and SCSI
4674 * host information structures, initializes them, and registers
4675 * everything with requisite kernel subsystems.
4676 *
4677 * This function requests irqs, probes the ATA bus, and probes
4678 * the SCSI bus.
1da177e4
LT		 4679 *
4680 * LOCKING:
0cba632b 4681 * PCI/etc. bus probe sem.
1da177e4
LT		 4682 *
4683 * RETURNS:
0cba632b 4684 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4685 */
4686
057ace5e 4687int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4688{
4689 unsigned int count = 0, i;
4690 struct device *dev = ent->dev;
4691 struct ata_host_set *host_set;
4692
4693 DPRINTK("ENTER\n");
4694 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4695 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4696 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4697 if (!host_set)
4698 return 0;
1da177e4
LT		 4699 spin_lock_init(&host_set->lock);
4700
4701 host_set->dev = dev;
4702 host_set->n_ports = ent->n_ports;
4703 host_set->irq = ent->irq;
4704 host_set->mmio_base = ent->mmio_base;
4705 host_set->private_data = ent->private_data;
4706 host_set->ops = ent->port_ops;
4707
4708 /* register each port bound to this device */
4709 for (i = 0; i < ent->n_ports; i++) {
4710 struct ata_port *ap;
4711 unsigned long xfer_mode_mask;
4712
4713 ap = ata_host_add(ent, host_set, i);
4714 if (!ap)
4715 goto err_out;
4716
4717 host_set->ports[i] = ap;
4718 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4719 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4720 (ap->pio_mask << ATA_SHIFT_PIO);
4721
4722 /* print per-port info to dmesg */
4723 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4724 "bmdma 0x%lX irq %lu\n",
4725 ap->id,
4726 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4727 ata_mode_string(xfer_mode_mask),
4728 ap->ioaddr.cmd_addr,
4729 ap->ioaddr.ctl_addr,
4730 ap->ioaddr.bmdma_addr,
4731 ent->irq);
4732
4733 ata_chk_status(ap);
4734 host_set->ops->irq_clear(ap);
4735 count++;
4736 }
4737
57f3bda8
RD		 4738 if (!count)
4739 goto err_free_ret;
1da177e4
LT		 4740
4741 /* obtain irq, that is shared between channels */
4742 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4743 DRV_NAME, host_set))
4744 goto err_out;
4745
4746 /* perform each probe synchronously */
4747 DPRINTK("probe begin\n");
4748 for (i = 0; i < count; i++) {
4749 struct ata_port *ap;
4750 int rc;
4751
4752 ap = host_set->ports[i];
4753
c893a3ae 4754 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4755 rc = ata_bus_probe(ap);
c893a3ae 4756 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4757
4758 if (rc) {
4759 /* FIXME: do something useful here?
4760 * Current libata behavior will
4761 * tear down everything when
4762 * the module is removed
4763 * or the h/w is unplugged.
4764 */
4765 }
4766
4767 rc = scsi_add_host(ap->host, dev);
4768 if (rc) {
4769 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4770 ap->id);
4771 /* FIXME: do something useful here */
4772 /* FIXME: handle unconditional calls to
4773 * scsi_scan_host and ata_host_remove, below,
4774 * at the very least
4775 */
4776 }
4777 }
4778
4779 /* probes are done, now scan each port's disk(s) */
c893a3ae 4780 DPRINTK("host probe begin\n");
1da177e4
LT		 4781 for (i = 0; i < count; i++) {
4782 struct ata_port *ap = host_set->ports[i];
4783
644dd0cc 4784 ata_scsi_scan_host(ap);
1da177e4
LT		 4785 }
4786
4787 dev_set_drvdata(dev, host_set);
4788
4789 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4790 return ent->n_ports; /* success */
4791
4792err_out:
4793 for (i = 0; i < count; i++) {
4794 ata_host_remove(host_set->ports[i], 1);
4795 scsi_host_put(host_set->ports[i]->host);
4796 }
57f3bda8 4797err_free_ret:
1da177e4
LT		 4798 kfree(host_set);
4799 VPRINTK("EXIT, returning 0\n");
4800 return 0;
4801}
4802
17b14451
AC		 4803/**
4804 * ata_host_set_remove - PCI layer callback for device removal
4805 * @host_set: ATA host set that was removed
4806 *
4807 * Unregister all objects associated with this host set. Free those
4808 * objects.
4809 *
4810 * LOCKING:
4811 * Inherited from calling layer (may sleep).
4812 */
4813
17b14451
AC		 4814void ata_host_set_remove(struct ata_host_set *host_set)
4815{
4816 struct ata_port *ap;
4817 unsigned int i;
4818
4819 for (i = 0; i < host_set->n_ports; i++) {
4820 ap = host_set->ports[i];
4821 scsi_remove_host(ap->host);
4822 }
4823
4824 free_irq(host_set->irq, host_set);
4825
4826 for (i = 0; i < host_set->n_ports; i++) {
4827 ap = host_set->ports[i];
4828
4829 ata_scsi_release(ap->host);
4830
4831 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4832 struct ata_ioports *ioaddr = &ap->ioaddr;
4833
4834 if (ioaddr->cmd_addr == 0x1f0)
4835 release_region(0x1f0, 8);
4836 else if (ioaddr->cmd_addr == 0x170)
4837 release_region(0x170, 8);
4838 }
4839
4840 scsi_host_put(ap->host);
4841 }
4842
4843 if (host_set->ops->host_stop)
4844 host_set->ops->host_stop(host_set);
4845
4846 kfree(host_set);
4847}
4848
1da177e4
LT		 4849/**
4850 * ata_scsi_release - SCSI layer callback hook for host unload
4851 * @host: libata host to be unloaded
4852 *
4853 * Performs all duties necessary to shut down a libata port...
4854 * Kill port kthread, disable port, and release resources.
4855 *
4856 * LOCKING:
4857 * Inherited from SCSI layer.
4858 *
4859 * RETURNS:
4860 * One.
4861 */
4862
4863int ata_scsi_release(struct Scsi_Host *host)
4864{
4865 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4866 int i;
1da177e4
LT		 4867
4868 DPRINTK("ENTER\n");
4869
4870 ap->ops->port_disable(ap);
4871 ata_host_remove(ap, 0);
d9572b1d
TH		 4872 for (i = 0; i < ATA_MAX_DEVICES; i++)
4873 kfree(ap->device[i].id);
1da177e4
LT		 4874
4875 DPRINTK("EXIT\n");
4876 return 1;
4877}
4878
4879/**
4880 * ata_std_ports - initialize ioaddr with standard port offsets.
4881 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4882 *
4883 * Utility function which initializes data_addr, error_addr,
4884 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4885 * device_addr, status_addr, and command_addr to standard offsets
4886 * relative to cmd_addr.
4887 *
4888 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4889 */
0baab86b 4890
1da177e4
LT		 4891void ata_std_ports(struct ata_ioports *ioaddr)
4892{
4893 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4894 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4895 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4896 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4897 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4898 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4899 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4900 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4901 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4902 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4903}
4904
0baab86b 4905
374b1873
JG		 4906#ifdef CONFIG_PCI
4907
4908void ata_pci_host_stop (struct ata_host_set *host_set)
4909{
4910 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4911
4912 pci_iounmap(pdev, host_set->mmio_base);
4913}
4914
1da177e4
LT		 4915/**
4916 * ata_pci_remove_one - PCI layer callback for device removal
4917 * @pdev: PCI device that was removed
4918 *
4919 * PCI layer indicates to libata via this hook that
6f0ef4fa 4920 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4921 * Handle this by unregistering all objects associated
4922 * with this PCI device. Free those objects. Then finally
4923 * release PCI resources and disable device.
4924 *
4925 * LOCKING:
4926 * Inherited from PCI layer (may sleep).
4927 */
4928
4929void ata_pci_remove_one (struct pci_dev *pdev)
4930{
4931 struct device *dev = pci_dev_to_dev(pdev);
4932 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4933
17b14451 4934 ata_host_set_remove(host_set);
1da177e4
LT		 4935 pci_release_regions(pdev);
4936 pci_disable_device(pdev);
4937 dev_set_drvdata(dev, NULL);
4938}
4939
4940/* move to PCI subsystem */
057ace5e 4941int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4942{
4943 unsigned long tmp = 0;
4944
4945 switch (bits->width) {
4946 case 1: {
4947 u8 tmp8 = 0;
4948 pci_read_config_byte(pdev, bits->reg, &tmp8);
4949 tmp = tmp8;
4950 break;
4951 }
4952 case 2: {
4953 u16 tmp16 = 0;
4954 pci_read_config_word(pdev, bits->reg, &tmp16);
4955 tmp = tmp16;
4956 break;
4957 }
4958 case 4: {
4959 u32 tmp32 = 0;
4960 pci_read_config_dword(pdev, bits->reg, &tmp32);
4961 tmp = tmp32;
4962 break;
4963 }
4964
4965 default:
4966 return -EINVAL;
4967 }
4968
4969 tmp &= bits->mask;
4970
4971 return (tmp == bits->val) ? 1 : 0;
4972}
9b847548
JA		 4973
4974int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4975{
4976 pci_save_state(pdev);
4977 pci_disable_device(pdev);
4978 pci_set_power_state(pdev, PCI_D3hot);
4979 return 0;
4980}
4981
4982int ata_pci_device_resume(struct pci_dev *pdev)
4983{
4984 pci_set_power_state(pdev, PCI_D0);
4985 pci_restore_state(pdev);
4986 pci_enable_device(pdev);
4987 pci_set_master(pdev);
4988 return 0;
4989}
1da177e4
LT		 4990#endif /* CONFIG_PCI */
4991
4992
1da177e4
LT		 4993static int __init ata_init(void)
4994{
4995 ata_wq = create_workqueue("ata");
4996 if (!ata_wq)
4997 return -ENOMEM;
4998
4999 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5000 return 0;
5001}
5002
5003static void __exit ata_exit(void)
5004{
5005 destroy_workqueue(ata_wq);
5006}
5007
5008module_init(ata_init);
5009module_exit(ata_exit);
5010
67846b30
JG		 5011static unsigned long ratelimit_time;
5012static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5013
5014int ata_ratelimit(void)
5015{
5016 int rc;
5017 unsigned long flags;
5018
5019 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5020
5021 if (time_after(jiffies, ratelimit_time)) {
5022 rc = 1;
5023 ratelimit_time = jiffies + (HZ/5);
5024 } else
5025 rc = 0;
5026
5027 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5028
5029 return rc;
5030}
5031
1da177e4
LT		 5032/*
5033 * libata is essentially a library of internal helper functions for
5034 * low-level ATA host controller drivers. As such, the API/ABI is
5035 * likely to change as new drivers are added and updated.
5036 * Do not depend on ABI/API stability.
5037 */
5038
5039EXPORT_SYMBOL_GPL(ata_std_bios_param);
5040EXPORT_SYMBOL_GPL(ata_std_ports);
5041EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5042EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5043EXPORT_SYMBOL_GPL(ata_sg_init);
5044EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5045EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5046EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5047EXPORT_SYMBOL_GPL(ata_eng_timeout);
5048EXPORT_SYMBOL_GPL(ata_tf_load);
5049EXPORT_SYMBOL_GPL(ata_tf_read);
5050EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5051EXPORT_SYMBOL_GPL(ata_std_dev_select);
5052EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5053EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5054EXPORT_SYMBOL_GPL(ata_check_status);
5055EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5056EXPORT_SYMBOL_GPL(ata_exec_command);
5057EXPORT_SYMBOL_GPL(ata_port_start);
5058EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5059EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5060EXPORT_SYMBOL_GPL(ata_interrupt);
5061EXPORT_SYMBOL_GPL(ata_qc_prep);
5062EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5063EXPORT_SYMBOL_GPL(ata_bmdma_start);
5064EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5065EXPORT_SYMBOL_GPL(ata_bmdma_status);
5066EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5067EXPORT_SYMBOL_GPL(ata_port_probe);
5068EXPORT_SYMBOL_GPL(sata_phy_reset);
5069EXPORT_SYMBOL_GPL(__sata_phy_reset);
5070EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5071EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5072EXPORT_SYMBOL_GPL(ata_std_softreset);
5073EXPORT_SYMBOL_GPL(sata_std_hardreset);
5074EXPORT_SYMBOL_GPL(ata_std_postreset);
5075EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5076EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5077EXPORT_SYMBOL_GPL(ata_dev_revalidate);
1da177e4 5078EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5079EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5080EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5081EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5082EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5083EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 5084EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 5085EXPORT_SYMBOL_GPL(ata_scsi_error);
5086EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5087EXPORT_SYMBOL_GPL(ata_scsi_release);
5088EXPORT_SYMBOL_GPL(ata_host_intr);
5089EXPORT_SYMBOL_GPL(ata_dev_classify);
6a62a04d
TH		 5090EXPORT_SYMBOL_GPL(ata_id_string);
5091EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5092EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5093EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5094EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5095
1bc4ccff 5096EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5097EXPORT_SYMBOL_GPL(ata_timing_compute);
5098EXPORT_SYMBOL_GPL(ata_timing_merge);
5099
1da177e4
LT		 5100#ifdef CONFIG_PCI
5101EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5102EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5103EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5104EXPORT_SYMBOL_GPL(ata_pci_init_one);
5105EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5106EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5107EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 5108#endif /* CONFIG_PCI */
9b847548
JA		 5109
5110EXPORT_SYMBOL_GPL(ata_device_suspend);
5111EXPORT_SYMBOL_GPL(ata_device_resume);
5112EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5113EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux kernel - Deliverables
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