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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
67846b30 | 51 | #include <linux/jiffies.h> |
378f058c | 52 | #include <linux/scatterlist.h> |
1da177e4 | 53 | #include <scsi/scsi.h> |
1da177e4 | 54 | #include "scsi_priv.h" |
193515d5 | 55 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
56 | #include <scsi/scsi_host.h> |
57 | #include <linux/libata.h> | |
58 | #include <asm/io.h> | |
59 | #include <asm/semaphore.h> | |
60 | #include <asm/byteorder.h> | |
61 | ||
62 | #include "libata.h" | |
63 | ||
64 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
65 | unsigned long tmout_pat, | |
66 | unsigned long tmout); | |
59a10b17 | 67 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev); |
8bf62ece | 68 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev); |
1da177e4 LT |
69 | static void ata_set_mode(struct ata_port *ap); |
70 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | |
057ace5e | 71 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift); |
1da177e4 | 72 | static int fgb(u32 bitmap); |
057ace5e | 73 | static int ata_choose_xfer_mode(const struct ata_port *ap, |
1da177e4 LT |
74 | u8 *xfer_mode_out, |
75 | unsigned int *xfer_shift_out); | |
1da177e4 LT |
76 | static void __ata_qc_complete(struct ata_queued_cmd *qc); |
77 | ||
78 | static unsigned int ata_unique_id = 1; | |
79 | static struct workqueue_struct *ata_wq; | |
80 | ||
1623c81e JG |
81 | int atapi_enabled = 0; |
82 | module_param(atapi_enabled, int, 0444); | |
83 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
84 | ||
1da177e4 LT |
85 | MODULE_AUTHOR("Jeff Garzik"); |
86 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
87 | MODULE_LICENSE("GPL"); | |
88 | MODULE_VERSION(DRV_VERSION); | |
89 | ||
90 | /** | |
6f0ef4fa | 91 | * ata_tf_load_pio - send taskfile registers to host controller |
1da177e4 LT |
92 | * @ap: Port to which output is sent |
93 | * @tf: ATA taskfile register set | |
94 | * | |
95 | * Outputs ATA taskfile to standard ATA host controller. | |
96 | * | |
97 | * LOCKING: | |
98 | * Inherited from caller. | |
99 | */ | |
100 | ||
057ace5e | 101 | static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
102 | { |
103 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
104 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
105 | ||
106 | if (tf->ctl != ap->last_ctl) { | |
107 | outb(tf->ctl, ioaddr->ctl_addr); | |
108 | ap->last_ctl = tf->ctl; | |
109 | ata_wait_idle(ap); | |
110 | } | |
111 | ||
112 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
113 | outb(tf->hob_feature, ioaddr->feature_addr); | |
114 | outb(tf->hob_nsect, ioaddr->nsect_addr); | |
115 | outb(tf->hob_lbal, ioaddr->lbal_addr); | |
116 | outb(tf->hob_lbam, ioaddr->lbam_addr); | |
117 | outb(tf->hob_lbah, ioaddr->lbah_addr); | |
118 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
119 | tf->hob_feature, | |
120 | tf->hob_nsect, | |
121 | tf->hob_lbal, | |
122 | tf->hob_lbam, | |
123 | tf->hob_lbah); | |
124 | } | |
125 | ||
126 | if (is_addr) { | |
127 | outb(tf->feature, ioaddr->feature_addr); | |
128 | outb(tf->nsect, ioaddr->nsect_addr); | |
129 | outb(tf->lbal, ioaddr->lbal_addr); | |
130 | outb(tf->lbam, ioaddr->lbam_addr); | |
131 | outb(tf->lbah, ioaddr->lbah_addr); | |
132 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
133 | tf->feature, | |
134 | tf->nsect, | |
135 | tf->lbal, | |
136 | tf->lbam, | |
137 | tf->lbah); | |
138 | } | |
139 | ||
140 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
141 | outb(tf->device, ioaddr->device_addr); | |
142 | VPRINTK("device 0x%X\n", tf->device); | |
143 | } | |
144 | ||
145 | ata_wait_idle(ap); | |
146 | } | |
147 | ||
148 | /** | |
149 | * ata_tf_load_mmio - send taskfile registers to host controller | |
150 | * @ap: Port to which output is sent | |
151 | * @tf: ATA taskfile register set | |
152 | * | |
153 | * Outputs ATA taskfile to standard ATA host controller using MMIO. | |
154 | * | |
155 | * LOCKING: | |
156 | * Inherited from caller. | |
157 | */ | |
158 | ||
057ace5e | 159 | static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
160 | { |
161 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
162 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
163 | ||
164 | if (tf->ctl != ap->last_ctl) { | |
165 | writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
166 | ap->last_ctl = tf->ctl; | |
167 | ata_wait_idle(ap); | |
168 | } | |
169 | ||
170 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
171 | writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr); | |
172 | writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr); | |
173 | writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr); | |
174 | writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr); | |
175 | writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr); | |
176 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
177 | tf->hob_feature, | |
178 | tf->hob_nsect, | |
179 | tf->hob_lbal, | |
180 | tf->hob_lbam, | |
181 | tf->hob_lbah); | |
182 | } | |
183 | ||
184 | if (is_addr) { | |
185 | writeb(tf->feature, (void __iomem *) ioaddr->feature_addr); | |
186 | writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr); | |
187 | writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr); | |
188 | writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr); | |
189 | writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr); | |
190 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
191 | tf->feature, | |
192 | tf->nsect, | |
193 | tf->lbal, | |
194 | tf->lbam, | |
195 | tf->lbah); | |
196 | } | |
197 | ||
198 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
199 | writeb(tf->device, (void __iomem *) ioaddr->device_addr); | |
200 | VPRINTK("device 0x%X\n", tf->device); | |
201 | } | |
202 | ||
203 | ata_wait_idle(ap); | |
204 | } | |
205 | ||
0baab86b EF |
206 | |
207 | /** | |
208 | * ata_tf_load - send taskfile registers to host controller | |
209 | * @ap: Port to which output is sent | |
210 | * @tf: ATA taskfile register set | |
211 | * | |
212 | * Outputs ATA taskfile to standard ATA host controller using MMIO | |
213 | * or PIO as indicated by the ATA_FLAG_MMIO flag. | |
214 | * Writes the control, feature, nsect, lbal, lbam, and lbah registers. | |
215 | * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect, | |
216 | * hob_lbal, hob_lbam, and hob_lbah. | |
217 | * | |
218 | * This function waits for idle (!BUSY and !DRQ) after writing | |
219 | * registers. If the control register has a new value, this | |
220 | * function also waits for idle after writing control and before | |
221 | * writing the remaining registers. | |
222 | * | |
223 | * May be used as the tf_load() entry in ata_port_operations. | |
224 | * | |
225 | * LOCKING: | |
226 | * Inherited from caller. | |
227 | */ | |
057ace5e | 228 | void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
229 | { |
230 | if (ap->flags & ATA_FLAG_MMIO) | |
231 | ata_tf_load_mmio(ap, tf); | |
232 | else | |
233 | ata_tf_load_pio(ap, tf); | |
234 | } | |
235 | ||
236 | /** | |
0baab86b | 237 | * ata_exec_command_pio - issue ATA command to host controller |
1da177e4 LT |
238 | * @ap: port to which command is being issued |
239 | * @tf: ATA taskfile register set | |
240 | * | |
0baab86b | 241 | * Issues PIO write to ATA command register, with proper |
1da177e4 LT |
242 | * synchronization with interrupt handler / other threads. |
243 | * | |
244 | * LOCKING: | |
245 | * spin_lock_irqsave(host_set lock) | |
246 | */ | |
247 | ||
057ace5e | 248 | static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
249 | { |
250 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
251 | ||
252 | outb(tf->command, ap->ioaddr.command_addr); | |
253 | ata_pause(ap); | |
254 | } | |
255 | ||
256 | ||
257 | /** | |
258 | * ata_exec_command_mmio - issue ATA command to host controller | |
259 | * @ap: port to which command is being issued | |
260 | * @tf: ATA taskfile register set | |
261 | * | |
262 | * Issues MMIO write to ATA command register, with proper | |
263 | * synchronization with interrupt handler / other threads. | |
264 | * | |
265 | * LOCKING: | |
266 | * spin_lock_irqsave(host_set lock) | |
267 | */ | |
268 | ||
057ace5e | 269 | static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
270 | { |
271 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
272 | ||
273 | writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr); | |
274 | ata_pause(ap); | |
275 | } | |
276 | ||
0baab86b EF |
277 | |
278 | /** | |
279 | * ata_exec_command - issue ATA command to host controller | |
280 | * @ap: port to which command is being issued | |
281 | * @tf: ATA taskfile register set | |
282 | * | |
283 | * Issues PIO/MMIO write to ATA command register, with proper | |
284 | * synchronization with interrupt handler / other threads. | |
285 | * | |
286 | * LOCKING: | |
287 | * spin_lock_irqsave(host_set lock) | |
288 | */ | |
057ace5e | 289 | void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
290 | { |
291 | if (ap->flags & ATA_FLAG_MMIO) | |
292 | ata_exec_command_mmio(ap, tf); | |
293 | else | |
294 | ata_exec_command_pio(ap, tf); | |
295 | } | |
296 | ||
1da177e4 LT |
297 | /** |
298 | * ata_tf_to_host - issue ATA taskfile to host controller | |
299 | * @ap: port to which command is being issued | |
300 | * @tf: ATA taskfile register set | |
301 | * | |
302 | * Issues ATA taskfile register set to ATA host controller, | |
303 | * with proper synchronization with interrupt handler and | |
304 | * other threads. | |
305 | * | |
306 | * LOCKING: | |
1da177e4 LT |
307 | * spin_lock_irqsave(host_set lock) |
308 | */ | |
309 | ||
e5338254 JG |
310 | static inline void ata_tf_to_host(struct ata_port *ap, |
311 | const struct ata_taskfile *tf) | |
1da177e4 LT |
312 | { |
313 | ap->ops->tf_load(ap, tf); | |
314 | ap->ops->exec_command(ap, tf); | |
315 | } | |
316 | ||
317 | /** | |
0baab86b | 318 | * ata_tf_read_pio - input device's ATA taskfile shadow registers |
1da177e4 LT |
319 | * @ap: Port from which input is read |
320 | * @tf: ATA taskfile register set for storing input | |
321 | * | |
322 | * Reads ATA taskfile registers for currently-selected device | |
323 | * into @tf. | |
324 | * | |
325 | * LOCKING: | |
326 | * Inherited from caller. | |
327 | */ | |
328 | ||
329 | static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
330 | { | |
331 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
332 | ||
ac19bff2 | 333 | tf->command = ata_check_status(ap); |
0169e284 | 334 | tf->feature = inb(ioaddr->error_addr); |
1da177e4 LT |
335 | tf->nsect = inb(ioaddr->nsect_addr); |
336 | tf->lbal = inb(ioaddr->lbal_addr); | |
337 | tf->lbam = inb(ioaddr->lbam_addr); | |
338 | tf->lbah = inb(ioaddr->lbah_addr); | |
339 | tf->device = inb(ioaddr->device_addr); | |
340 | ||
341 | if (tf->flags & ATA_TFLAG_LBA48) { | |
342 | outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); | |
343 | tf->hob_feature = inb(ioaddr->error_addr); | |
344 | tf->hob_nsect = inb(ioaddr->nsect_addr); | |
345 | tf->hob_lbal = inb(ioaddr->lbal_addr); | |
346 | tf->hob_lbam = inb(ioaddr->lbam_addr); | |
347 | tf->hob_lbah = inb(ioaddr->lbah_addr); | |
348 | } | |
349 | } | |
350 | ||
351 | /** | |
352 | * ata_tf_read_mmio - input device's ATA taskfile shadow registers | |
353 | * @ap: Port from which input is read | |
354 | * @tf: ATA taskfile register set for storing input | |
355 | * | |
356 | * Reads ATA taskfile registers for currently-selected device | |
357 | * into @tf via MMIO. | |
358 | * | |
359 | * LOCKING: | |
360 | * Inherited from caller. | |
361 | */ | |
362 | ||
363 | static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
364 | { | |
365 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
366 | ||
ac19bff2 | 367 | tf->command = ata_check_status(ap); |
0169e284 | 368 | tf->feature = readb((void __iomem *)ioaddr->error_addr); |
1da177e4 LT |
369 | tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); |
370 | tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
371 | tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
372 | tf->lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
373 | tf->device = readb((void __iomem *)ioaddr->device_addr); | |
374 | ||
375 | if (tf->flags & ATA_TFLAG_LBA48) { | |
376 | writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr); | |
377 | tf->hob_feature = readb((void __iomem *)ioaddr->error_addr); | |
378 | tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
379 | tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
380 | tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
381 | tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
382 | } | |
383 | } | |
384 | ||
0baab86b EF |
385 | |
386 | /** | |
387 | * ata_tf_read - input device's ATA taskfile shadow registers | |
388 | * @ap: Port from which input is read | |
389 | * @tf: ATA taskfile register set for storing input | |
390 | * | |
391 | * Reads ATA taskfile registers for currently-selected device | |
392 | * into @tf. | |
393 | * | |
394 | * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48 | |
395 | * is set, also reads the hob registers. | |
396 | * | |
397 | * May be used as the tf_read() entry in ata_port_operations. | |
398 | * | |
399 | * LOCKING: | |
400 | * Inherited from caller. | |
401 | */ | |
1da177e4 LT |
402 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
403 | { | |
404 | if (ap->flags & ATA_FLAG_MMIO) | |
405 | ata_tf_read_mmio(ap, tf); | |
406 | else | |
407 | ata_tf_read_pio(ap, tf); | |
408 | } | |
409 | ||
410 | /** | |
411 | * ata_check_status_pio - Read device status reg & clear interrupt | |
412 | * @ap: port where the device is | |
413 | * | |
414 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 415 | * and return its value. This also clears pending interrupts |
1da177e4 LT |
416 | * from this device |
417 | * | |
418 | * LOCKING: | |
419 | * Inherited from caller. | |
420 | */ | |
421 | static u8 ata_check_status_pio(struct ata_port *ap) | |
422 | { | |
423 | return inb(ap->ioaddr.status_addr); | |
424 | } | |
425 | ||
426 | /** | |
427 | * ata_check_status_mmio - Read device status reg & clear interrupt | |
428 | * @ap: port where the device is | |
429 | * | |
430 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 431 | * via MMIO and return its value. This also clears pending interrupts |
1da177e4 LT |
432 | * from this device |
433 | * | |
434 | * LOCKING: | |
435 | * Inherited from caller. | |
436 | */ | |
437 | static u8 ata_check_status_mmio(struct ata_port *ap) | |
438 | { | |
439 | return readb((void __iomem *) ap->ioaddr.status_addr); | |
440 | } | |
441 | ||
0baab86b EF |
442 | |
443 | /** | |
444 | * ata_check_status - Read device status reg & clear interrupt | |
445 | * @ap: port where the device is | |
446 | * | |
447 | * Reads ATA taskfile status register for currently-selected device | |
448 | * and return its value. This also clears pending interrupts | |
449 | * from this device | |
450 | * | |
451 | * May be used as the check_status() entry in ata_port_operations. | |
452 | * | |
453 | * LOCKING: | |
454 | * Inherited from caller. | |
455 | */ | |
1da177e4 LT |
456 | u8 ata_check_status(struct ata_port *ap) |
457 | { | |
458 | if (ap->flags & ATA_FLAG_MMIO) | |
459 | return ata_check_status_mmio(ap); | |
460 | return ata_check_status_pio(ap); | |
461 | } | |
462 | ||
0baab86b EF |
463 | |
464 | /** | |
465 | * ata_altstatus - Read device alternate status reg | |
466 | * @ap: port where the device is | |
467 | * | |
468 | * Reads ATA taskfile alternate status register for | |
469 | * currently-selected device and return its value. | |
470 | * | |
471 | * Note: may NOT be used as the check_altstatus() entry in | |
472 | * ata_port_operations. | |
473 | * | |
474 | * LOCKING: | |
475 | * Inherited from caller. | |
476 | */ | |
1da177e4 LT |
477 | u8 ata_altstatus(struct ata_port *ap) |
478 | { | |
479 | if (ap->ops->check_altstatus) | |
480 | return ap->ops->check_altstatus(ap); | |
481 | ||
482 | if (ap->flags & ATA_FLAG_MMIO) | |
483 | return readb((void __iomem *)ap->ioaddr.altstatus_addr); | |
484 | return inb(ap->ioaddr.altstatus_addr); | |
485 | } | |
486 | ||
0baab86b | 487 | |
1da177e4 LT |
488 | /** |
489 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
490 | * @tf: Taskfile to convert | |
491 | * @fis: Buffer into which data will output | |
492 | * @pmp: Port multiplier port | |
493 | * | |
494 | * Converts a standard ATA taskfile to a Serial ATA | |
495 | * FIS structure (Register - Host to Device). | |
496 | * | |
497 | * LOCKING: | |
498 | * Inherited from caller. | |
499 | */ | |
500 | ||
057ace5e | 501 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
502 | { |
503 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
504 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
505 | bit 7 indicates Command FIS */ | |
506 | fis[2] = tf->command; | |
507 | fis[3] = tf->feature; | |
508 | ||
509 | fis[4] = tf->lbal; | |
510 | fis[5] = tf->lbam; | |
511 | fis[6] = tf->lbah; | |
512 | fis[7] = tf->device; | |
513 | ||
514 | fis[8] = tf->hob_lbal; | |
515 | fis[9] = tf->hob_lbam; | |
516 | fis[10] = tf->hob_lbah; | |
517 | fis[11] = tf->hob_feature; | |
518 | ||
519 | fis[12] = tf->nsect; | |
520 | fis[13] = tf->hob_nsect; | |
521 | fis[14] = 0; | |
522 | fis[15] = tf->ctl; | |
523 | ||
524 | fis[16] = 0; | |
525 | fis[17] = 0; | |
526 | fis[18] = 0; | |
527 | fis[19] = 0; | |
528 | } | |
529 | ||
530 | /** | |
531 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
532 | * @fis: Buffer from which data will be input | |
533 | * @tf: Taskfile to output | |
534 | * | |
e12a1be6 | 535 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
536 | * |
537 | * LOCKING: | |
538 | * Inherited from caller. | |
539 | */ | |
540 | ||
057ace5e | 541 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
542 | { |
543 | tf->command = fis[2]; /* status */ | |
544 | tf->feature = fis[3]; /* error */ | |
545 | ||
546 | tf->lbal = fis[4]; | |
547 | tf->lbam = fis[5]; | |
548 | tf->lbah = fis[6]; | |
549 | tf->device = fis[7]; | |
550 | ||
551 | tf->hob_lbal = fis[8]; | |
552 | tf->hob_lbam = fis[9]; | |
553 | tf->hob_lbah = fis[10]; | |
554 | ||
555 | tf->nsect = fis[12]; | |
556 | tf->hob_nsect = fis[13]; | |
557 | } | |
558 | ||
8cbd6df1 AL |
559 | static const u8 ata_rw_cmds[] = { |
560 | /* pio multi */ | |
561 | ATA_CMD_READ_MULTI, | |
562 | ATA_CMD_WRITE_MULTI, | |
563 | ATA_CMD_READ_MULTI_EXT, | |
564 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
565 | 0, |
566 | 0, | |
567 | 0, | |
568 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
569 | /* pio */ |
570 | ATA_CMD_PIO_READ, | |
571 | ATA_CMD_PIO_WRITE, | |
572 | ATA_CMD_PIO_READ_EXT, | |
573 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
574 | 0, |
575 | 0, | |
576 | 0, | |
577 | 0, | |
8cbd6df1 AL |
578 | /* dma */ |
579 | ATA_CMD_READ, | |
580 | ATA_CMD_WRITE, | |
581 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
582 | ATA_CMD_WRITE_EXT, |
583 | 0, | |
584 | 0, | |
585 | 0, | |
586 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 587 | }; |
1da177e4 LT |
588 | |
589 | /** | |
8cbd6df1 AL |
590 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
591 | * @qc: command to examine and configure | |
1da177e4 | 592 | * |
8cbd6df1 AL |
593 | * Examine the device configuration and tf->flags to calculate |
594 | * the proper read/write commands and protocol to use. | |
1da177e4 LT |
595 | * |
596 | * LOCKING: | |
597 | * caller. | |
598 | */ | |
9a3dccc4 | 599 | int ata_rwcmd_protocol(struct ata_queued_cmd *qc) |
1da177e4 | 600 | { |
8cbd6df1 AL |
601 | struct ata_taskfile *tf = &qc->tf; |
602 | struct ata_device *dev = qc->dev; | |
9a3dccc4 | 603 | u8 cmd; |
1da177e4 | 604 | |
9a3dccc4 | 605 | int index, fua, lba48, write; |
8cbd6df1 | 606 | |
9a3dccc4 | 607 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
608 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
609 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 610 | |
8cbd6df1 AL |
611 | if (dev->flags & ATA_DFLAG_PIO) { |
612 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 613 | index = dev->multi_count ? 0 : 8; |
8d238e01 AC |
614 | } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) { |
615 | /* Unable to use DMA due to host limitation */ | |
616 | tf->protocol = ATA_PROT_PIO; | |
617 | index = dev->multi_count ? 0 : 4; | |
8cbd6df1 AL |
618 | } else { |
619 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 620 | index = 16; |
8cbd6df1 | 621 | } |
1da177e4 | 622 | |
9a3dccc4 TH |
623 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
624 | if (cmd) { | |
625 | tf->command = cmd; | |
626 | return 0; | |
627 | } | |
628 | return -1; | |
1da177e4 LT |
629 | } |
630 | ||
98ac62de | 631 | static const char * const xfer_mode_str[] = { |
1da177e4 LT |
632 | "UDMA/16", |
633 | "UDMA/25", | |
634 | "UDMA/33", | |
635 | "UDMA/44", | |
636 | "UDMA/66", | |
637 | "UDMA/100", | |
638 | "UDMA/133", | |
639 | "UDMA7", | |
640 | "MWDMA0", | |
641 | "MWDMA1", | |
642 | "MWDMA2", | |
643 | "PIO0", | |
644 | "PIO1", | |
645 | "PIO2", | |
646 | "PIO3", | |
647 | "PIO4", | |
648 | }; | |
649 | ||
650 | /** | |
651 | * ata_udma_string - convert UDMA bit offset to string | |
652 | * @mask: mask of bits supported; only highest bit counts. | |
653 | * | |
654 | * Determine string which represents the highest speed | |
655 | * (highest bit in @udma_mask). | |
656 | * | |
657 | * LOCKING: | |
658 | * None. | |
659 | * | |
660 | * RETURNS: | |
661 | * Constant C string representing highest speed listed in | |
662 | * @udma_mask, or the constant C string "<n/a>". | |
663 | */ | |
664 | ||
665 | static const char *ata_mode_string(unsigned int mask) | |
666 | { | |
667 | int i; | |
668 | ||
669 | for (i = 7; i >= 0; i--) | |
670 | if (mask & (1 << i)) | |
671 | goto out; | |
672 | for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--) | |
673 | if (mask & (1 << i)) | |
674 | goto out; | |
675 | for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--) | |
676 | if (mask & (1 << i)) | |
677 | goto out; | |
678 | ||
679 | return "<n/a>"; | |
680 | ||
681 | out: | |
682 | return xfer_mode_str[i]; | |
683 | } | |
684 | ||
685 | /** | |
686 | * ata_pio_devchk - PATA device presence detection | |
687 | * @ap: ATA channel to examine | |
688 | * @device: Device to examine (starting at zero) | |
689 | * | |
690 | * This technique was originally described in | |
691 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
692 | * later found its way into the ATA/ATAPI spec. | |
693 | * | |
694 | * Write a pattern to the ATA shadow registers, | |
695 | * and if a device is present, it will respond by | |
696 | * correctly storing and echoing back the | |
697 | * ATA shadow register contents. | |
698 | * | |
699 | * LOCKING: | |
700 | * caller. | |
701 | */ | |
702 | ||
703 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
704 | unsigned int device) | |
705 | { | |
706 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
707 | u8 nsect, lbal; | |
708 | ||
709 | ap->ops->dev_select(ap, device); | |
710 | ||
711 | outb(0x55, ioaddr->nsect_addr); | |
712 | outb(0xaa, ioaddr->lbal_addr); | |
713 | ||
714 | outb(0xaa, ioaddr->nsect_addr); | |
715 | outb(0x55, ioaddr->lbal_addr); | |
716 | ||
717 | outb(0x55, ioaddr->nsect_addr); | |
718 | outb(0xaa, ioaddr->lbal_addr); | |
719 | ||
720 | nsect = inb(ioaddr->nsect_addr); | |
721 | lbal = inb(ioaddr->lbal_addr); | |
722 | ||
723 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
724 | return 1; /* we found a device */ | |
725 | ||
726 | return 0; /* nothing found */ | |
727 | } | |
728 | ||
729 | /** | |
730 | * ata_mmio_devchk - PATA device presence detection | |
731 | * @ap: ATA channel to examine | |
732 | * @device: Device to examine (starting at zero) | |
733 | * | |
734 | * This technique was originally described in | |
735 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
736 | * later found its way into the ATA/ATAPI spec. | |
737 | * | |
738 | * Write a pattern to the ATA shadow registers, | |
739 | * and if a device is present, it will respond by | |
740 | * correctly storing and echoing back the | |
741 | * ATA shadow register contents. | |
742 | * | |
743 | * LOCKING: | |
744 | * caller. | |
745 | */ | |
746 | ||
747 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
748 | unsigned int device) | |
749 | { | |
750 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
751 | u8 nsect, lbal; | |
752 | ||
753 | ap->ops->dev_select(ap, device); | |
754 | ||
755 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
756 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
757 | ||
758 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
759 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
760 | ||
761 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
762 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
763 | ||
764 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
765 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
766 | ||
767 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
768 | return 1; /* we found a device */ | |
769 | ||
770 | return 0; /* nothing found */ | |
771 | } | |
772 | ||
773 | /** | |
774 | * ata_devchk - PATA device presence detection | |
775 | * @ap: ATA channel to examine | |
776 | * @device: Device to examine (starting at zero) | |
777 | * | |
778 | * Dispatch ATA device presence detection, depending | |
779 | * on whether we are using PIO or MMIO to talk to the | |
780 | * ATA shadow registers. | |
781 | * | |
782 | * LOCKING: | |
783 | * caller. | |
784 | */ | |
785 | ||
786 | static unsigned int ata_devchk(struct ata_port *ap, | |
787 | unsigned int device) | |
788 | { | |
789 | if (ap->flags & ATA_FLAG_MMIO) | |
790 | return ata_mmio_devchk(ap, device); | |
791 | return ata_pio_devchk(ap, device); | |
792 | } | |
793 | ||
794 | /** | |
795 | * ata_dev_classify - determine device type based on ATA-spec signature | |
796 | * @tf: ATA taskfile register set for device to be identified | |
797 | * | |
798 | * Determine from taskfile register contents whether a device is | |
799 | * ATA or ATAPI, as per "Signature and persistence" section | |
800 | * of ATA/PI spec (volume 1, sect 5.14). | |
801 | * | |
802 | * LOCKING: | |
803 | * None. | |
804 | * | |
805 | * RETURNS: | |
806 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
807 | * the event of failure. | |
808 | */ | |
809 | ||
057ace5e | 810 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
811 | { |
812 | /* Apple's open source Darwin code hints that some devices only | |
813 | * put a proper signature into the LBA mid/high registers, | |
814 | * So, we only check those. It's sufficient for uniqueness. | |
815 | */ | |
816 | ||
817 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
818 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
819 | DPRINTK("found ATA device by sig\n"); | |
820 | return ATA_DEV_ATA; | |
821 | } | |
822 | ||
823 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
824 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
825 | DPRINTK("found ATAPI device by sig\n"); | |
826 | return ATA_DEV_ATAPI; | |
827 | } | |
828 | ||
829 | DPRINTK("unknown device\n"); | |
830 | return ATA_DEV_UNKNOWN; | |
831 | } | |
832 | ||
833 | /** | |
834 | * ata_dev_try_classify - Parse returned ATA device signature | |
835 | * @ap: ATA channel to examine | |
836 | * @device: Device to examine (starting at zero) | |
837 | * | |
838 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
839 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
840 | * shadow registers, indicating the results of device detection | |
841 | * and diagnostics. | |
842 | * | |
843 | * Select the ATA device, and read the values from the ATA shadow | |
844 | * registers. Then parse according to the Error register value, | |
845 | * and the spec-defined values examined by ata_dev_classify(). | |
846 | * | |
847 | * LOCKING: | |
848 | * caller. | |
849 | */ | |
850 | ||
851 | static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device) | |
852 | { | |
853 | struct ata_device *dev = &ap->device[device]; | |
854 | struct ata_taskfile tf; | |
855 | unsigned int class; | |
856 | u8 err; | |
857 | ||
858 | ap->ops->dev_select(ap, device); | |
859 | ||
860 | memset(&tf, 0, sizeof(tf)); | |
861 | ||
1da177e4 | 862 | ap->ops->tf_read(ap, &tf); |
0169e284 | 863 | err = tf.feature; |
1da177e4 LT |
864 | |
865 | dev->class = ATA_DEV_NONE; | |
866 | ||
867 | /* see if device passed diags */ | |
868 | if (err == 1) | |
869 | /* do nothing */ ; | |
870 | else if ((device == 0) && (err == 0x81)) | |
871 | /* do nothing */ ; | |
872 | else | |
873 | return err; | |
874 | ||
875 | /* determine if device if ATA or ATAPI */ | |
876 | class = ata_dev_classify(&tf); | |
877 | if (class == ATA_DEV_UNKNOWN) | |
878 | return err; | |
879 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
880 | return err; | |
881 | ||
882 | dev->class = class; | |
883 | ||
884 | return err; | |
885 | } | |
886 | ||
887 | /** | |
888 | * ata_dev_id_string - Convert IDENTIFY DEVICE page into string | |
889 | * @id: IDENTIFY DEVICE results we will examine | |
890 | * @s: string into which data is output | |
891 | * @ofs: offset into identify device page | |
892 | * @len: length of string to return. must be an even number. | |
893 | * | |
894 | * The strings in the IDENTIFY DEVICE page are broken up into | |
895 | * 16-bit chunks. Run through the string, and output each | |
896 | * 8-bit chunk linearly, regardless of platform. | |
897 | * | |
898 | * LOCKING: | |
899 | * caller. | |
900 | */ | |
901 | ||
057ace5e | 902 | void ata_dev_id_string(const u16 *id, unsigned char *s, |
1da177e4 LT |
903 | unsigned int ofs, unsigned int len) |
904 | { | |
905 | unsigned int c; | |
906 | ||
907 | while (len > 0) { | |
908 | c = id[ofs] >> 8; | |
909 | *s = c; | |
910 | s++; | |
911 | ||
912 | c = id[ofs] & 0xff; | |
913 | *s = c; | |
914 | s++; | |
915 | ||
916 | ofs++; | |
917 | len -= 2; | |
918 | } | |
919 | } | |
920 | ||
0baab86b EF |
921 | |
922 | /** | |
923 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
924 | * @ap: ATA channel to manipulate | |
925 | * @device: ATA device (numbered from zero) to select | |
926 | * | |
927 | * This function performs no actual function. | |
928 | * | |
929 | * May be used as the dev_select() entry in ata_port_operations. | |
930 | * | |
931 | * LOCKING: | |
932 | * caller. | |
933 | */ | |
1da177e4 LT |
934 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
935 | { | |
936 | } | |
937 | ||
0baab86b | 938 | |
1da177e4 LT |
939 | /** |
940 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
941 | * @ap: ATA channel to manipulate | |
942 | * @device: ATA device (numbered from zero) to select | |
943 | * | |
944 | * Use the method defined in the ATA specification to | |
945 | * make either device 0, or device 1, active on the | |
0baab86b EF |
946 | * ATA channel. Works with both PIO and MMIO. |
947 | * | |
948 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
949 | * |
950 | * LOCKING: | |
951 | * caller. | |
952 | */ | |
953 | ||
954 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
955 | { | |
956 | u8 tmp; | |
957 | ||
958 | if (device == 0) | |
959 | tmp = ATA_DEVICE_OBS; | |
960 | else | |
961 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
962 | ||
963 | if (ap->flags & ATA_FLAG_MMIO) { | |
964 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
965 | } else { | |
966 | outb(tmp, ap->ioaddr.device_addr); | |
967 | } | |
968 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
969 | } | |
970 | ||
971 | /** | |
972 | * ata_dev_select - Select device 0/1 on ATA bus | |
973 | * @ap: ATA channel to manipulate | |
974 | * @device: ATA device (numbered from zero) to select | |
975 | * @wait: non-zero to wait for Status register BSY bit to clear | |
976 | * @can_sleep: non-zero if context allows sleeping | |
977 | * | |
978 | * Use the method defined in the ATA specification to | |
979 | * make either device 0, or device 1, active on the | |
980 | * ATA channel. | |
981 | * | |
982 | * This is a high-level version of ata_std_dev_select(), | |
983 | * which additionally provides the services of inserting | |
984 | * the proper pauses and status polling, where needed. | |
985 | * | |
986 | * LOCKING: | |
987 | * caller. | |
988 | */ | |
989 | ||
990 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
991 | unsigned int wait, unsigned int can_sleep) | |
992 | { | |
993 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
994 | ap->id, device, wait); | |
995 | ||
996 | if (wait) | |
997 | ata_wait_idle(ap); | |
998 | ||
999 | ap->ops->dev_select(ap, device); | |
1000 | ||
1001 | if (wait) { | |
1002 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
1003 | msleep(150); | |
1004 | ata_wait_idle(ap); | |
1005 | } | |
1006 | } | |
1007 | ||
1008 | /** | |
1009 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
1010 | * @dev: Device whose IDENTIFY DEVICE page we will dump | |
1011 | * | |
1012 | * Dump selected 16-bit words from a detected device's | |
1013 | * IDENTIFY PAGE page. | |
1014 | * | |
1015 | * LOCKING: | |
1016 | * caller. | |
1017 | */ | |
1018 | ||
057ace5e | 1019 | static inline void ata_dump_id(const struct ata_device *dev) |
1da177e4 LT |
1020 | { |
1021 | DPRINTK("49==0x%04x " | |
1022 | "53==0x%04x " | |
1023 | "63==0x%04x " | |
1024 | "64==0x%04x " | |
1025 | "75==0x%04x \n", | |
1026 | dev->id[49], | |
1027 | dev->id[53], | |
1028 | dev->id[63], | |
1029 | dev->id[64], | |
1030 | dev->id[75]); | |
1031 | DPRINTK("80==0x%04x " | |
1032 | "81==0x%04x " | |
1033 | "82==0x%04x " | |
1034 | "83==0x%04x " | |
1035 | "84==0x%04x \n", | |
1036 | dev->id[80], | |
1037 | dev->id[81], | |
1038 | dev->id[82], | |
1039 | dev->id[83], | |
1040 | dev->id[84]); | |
1041 | DPRINTK("88==0x%04x " | |
1042 | "93==0x%04x\n", | |
1043 | dev->id[88], | |
1044 | dev->id[93]); | |
1045 | } | |
1046 | ||
11e29e21 AC |
1047 | /* |
1048 | * Compute the PIO modes available for this device. This is not as | |
1049 | * trivial as it seems if we must consider early devices correctly. | |
1050 | * | |
1051 | * FIXME: pre IDE drive timing (do we care ?). | |
1052 | */ | |
1053 | ||
057ace5e | 1054 | static unsigned int ata_pio_modes(const struct ata_device *adev) |
11e29e21 AC |
1055 | { |
1056 | u16 modes; | |
1057 | ||
ffa29456 AC |
1058 | /* Usual case. Word 53 indicates word 64 is valid */ |
1059 | if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
11e29e21 AC |
1060 | modes = adev->id[ATA_ID_PIO_MODES] & 0x03; |
1061 | modes <<= 3; | |
1062 | modes |= 0x7; | |
1063 | return modes; | |
1064 | } | |
1065 | ||
ffa29456 AC |
1066 | /* If word 64 isn't valid then Word 51 high byte holds the PIO timing |
1067 | number for the maximum. Turn it into a mask and return it */ | |
1068 | modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ; | |
11e29e21 | 1069 | return modes; |
ffa29456 AC |
1070 | /* But wait.. there's more. Design your standards by committee and |
1071 | you too can get a free iordy field to process. However its the | |
1072 | speeds not the modes that are supported... Note drivers using the | |
1073 | timing API will get this right anyway */ | |
11e29e21 AC |
1074 | } |
1075 | ||
a2a7a662 TH |
1076 | struct ata_exec_internal_arg { |
1077 | unsigned int err_mask; | |
1078 | struct ata_taskfile *tf; | |
1079 | struct completion *waiting; | |
1080 | }; | |
1081 | ||
1082 | int ata_qc_complete_internal(struct ata_queued_cmd *qc) | |
1083 | { | |
1084 | struct ata_exec_internal_arg *arg = qc->private_data; | |
1085 | struct completion *waiting = arg->waiting; | |
1086 | ||
1087 | if (!(qc->err_mask & ~AC_ERR_DEV)) | |
1088 | qc->ap->ops->tf_read(qc->ap, arg->tf); | |
1089 | arg->err_mask = qc->err_mask; | |
1090 | arg->waiting = NULL; | |
1091 | complete(waiting); | |
1092 | ||
1093 | return 0; | |
1094 | } | |
1095 | ||
1096 | /** | |
1097 | * ata_exec_internal - execute libata internal command | |
1098 | * @ap: Port to which the command is sent | |
1099 | * @dev: Device to which the command is sent | |
1100 | * @tf: Taskfile registers for the command and the result | |
1101 | * @dma_dir: Data tranfer direction of the command | |
1102 | * @buf: Data buffer of the command | |
1103 | * @buflen: Length of data buffer | |
1104 | * | |
1105 | * Executes libata internal command with timeout. @tf contains | |
1106 | * command on entry and result on return. Timeout and error | |
1107 | * conditions are reported via return value. No recovery action | |
1108 | * is taken after a command times out. It's caller's duty to | |
1109 | * clean up after timeout. | |
1110 | * | |
1111 | * LOCKING: | |
1112 | * None. Should be called with kernel context, might sleep. | |
1113 | */ | |
1114 | ||
1115 | static unsigned | |
1116 | ata_exec_internal(struct ata_port *ap, struct ata_device *dev, | |
1117 | struct ata_taskfile *tf, | |
1118 | int dma_dir, void *buf, unsigned int buflen) | |
1119 | { | |
1120 | u8 command = tf->command; | |
1121 | struct ata_queued_cmd *qc; | |
1122 | DECLARE_COMPLETION(wait); | |
1123 | unsigned long flags; | |
1124 | struct ata_exec_internal_arg arg; | |
1125 | ||
1126 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1127 | ||
1128 | qc = ata_qc_new_init(ap, dev); | |
1129 | BUG_ON(qc == NULL); | |
1130 | ||
1131 | qc->tf = *tf; | |
1132 | qc->dma_dir = dma_dir; | |
1133 | if (dma_dir != DMA_NONE) { | |
1134 | ata_sg_init_one(qc, buf, buflen); | |
1135 | qc->nsect = buflen / ATA_SECT_SIZE; | |
1136 | } | |
1137 | ||
1138 | arg.waiting = &wait; | |
1139 | arg.tf = tf; | |
1140 | qc->private_data = &arg; | |
1141 | qc->complete_fn = ata_qc_complete_internal; | |
1142 | ||
1143 | if (ata_qc_issue(qc)) | |
1144 | goto issue_fail; | |
1145 | ||
1146 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1147 | ||
1148 | if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) { | |
1149 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1150 | ||
1151 | /* We're racing with irq here. If we lose, the | |
1152 | * following test prevents us from completing the qc | |
1153 | * again. If completion irq occurs after here but | |
1154 | * before the caller cleans up, it will result in a | |
1155 | * spurious interrupt. We can live with that. | |
1156 | */ | |
1157 | if (arg.waiting) { | |
1158 | qc->err_mask = AC_ERR_OTHER; | |
1159 | ata_qc_complete(qc); | |
1160 | printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n", | |
1161 | ap->id, command); | |
1162 | } | |
1163 | ||
1164 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1165 | } | |
1166 | ||
1167 | return arg.err_mask; | |
1168 | ||
1169 | issue_fail: | |
1170 | ata_qc_free(qc); | |
1171 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1172 | return AC_ERR_OTHER; | |
1173 | } | |
1174 | ||
1bc4ccff AC |
1175 | /** |
1176 | * ata_pio_need_iordy - check if iordy needed | |
1177 | * @adev: ATA device | |
1178 | * | |
1179 | * Check if the current speed of the device requires IORDY. Used | |
1180 | * by various controllers for chip configuration. | |
1181 | */ | |
1182 | ||
1183 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |
1184 | { | |
1185 | int pio; | |
1186 | int speed = adev->pio_mode - XFER_PIO_0; | |
1187 | ||
1188 | if (speed < 2) | |
1189 | return 0; | |
1190 | if (speed > 2) | |
1191 | return 1; | |
1192 | ||
1193 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ | |
1194 | ||
1195 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ | |
1196 | pio = adev->id[ATA_ID_EIDE_PIO]; | |
1197 | /* Is the speed faster than the drive allows non IORDY ? */ | |
1198 | if (pio) { | |
1199 | /* This is cycle times not frequency - watch the logic! */ | |
1200 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
1201 | return 1; | |
1202 | return 0; | |
1203 | } | |
1204 | } | |
1205 | return 0; | |
1206 | } | |
1207 | ||
1da177e4 LT |
1208 | /** |
1209 | * ata_dev_identify - obtain IDENTIFY x DEVICE page | |
1210 | * @ap: port on which device we wish to probe resides | |
1211 | * @device: device bus address, starting at zero | |
1212 | * | |
1213 | * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE | |
1214 | * command, and read back the 512-byte device information page. | |
1215 | * The device information page is fed to us via the standard | |
1216 | * PIO-IN protocol, but we hand-code it here. (TODO: investigate | |
1217 | * using standard PIO-IN paths) | |
1218 | * | |
1219 | * After reading the device information page, we use several | |
1220 | * bits of information from it to initialize data structures | |
1221 | * that will be used during the lifetime of the ata_device. | |
1222 | * Other data from the info page is used to disqualify certain | |
1223 | * older ATA devices we do not wish to support. | |
1224 | * | |
1225 | * LOCKING: | |
1226 | * Inherited from caller. Some functions called by this function | |
1227 | * obtain the host_set lock. | |
1228 | */ | |
1229 | ||
1230 | static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |
1231 | { | |
1232 | struct ata_device *dev = &ap->device[device]; | |
8bf62ece | 1233 | unsigned int major_version; |
1da177e4 LT |
1234 | u16 tmp; |
1235 | unsigned long xfer_modes; | |
1da177e4 | 1236 | unsigned int using_edd; |
a0123703 TH |
1237 | struct ata_taskfile tf; |
1238 | unsigned int err_mask; | |
1da177e4 LT |
1239 | int rc; |
1240 | ||
1241 | if (!ata_dev_present(dev)) { | |
1242 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1243 | ap->id, device); | |
1244 | return; | |
1245 | } | |
1246 | ||
1247 | if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET)) | |
1248 | using_edd = 0; | |
1249 | else | |
1250 | using_edd = 1; | |
1251 | ||
1252 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, device); | |
1253 | ||
1254 | assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI || | |
1255 | dev->class == ATA_DEV_NONE); | |
1256 | ||
1257 | ata_dev_select(ap, device, 1, 1); /* select device 0/1 */ | |
1258 | ||
1da177e4 | 1259 | retry: |
a0123703 TH |
1260 | ata_tf_init(ap, &tf, device); |
1261 | ||
1da177e4 | 1262 | if (dev->class == ATA_DEV_ATA) { |
a0123703 | 1263 | tf.command = ATA_CMD_ID_ATA; |
1da177e4 LT |
1264 | DPRINTK("do ATA identify\n"); |
1265 | } else { | |
a0123703 | 1266 | tf.command = ATA_CMD_ID_ATAPI; |
1da177e4 LT |
1267 | DPRINTK("do ATAPI identify\n"); |
1268 | } | |
1269 | ||
a0123703 | 1270 | tf.protocol = ATA_PROT_PIO; |
1da177e4 | 1271 | |
a0123703 TH |
1272 | err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE, |
1273 | dev->id, sizeof(dev->id)); | |
1da177e4 | 1274 | |
a0123703 TH |
1275 | if (err_mask) { |
1276 | if (err_mask & ~AC_ERR_DEV) | |
1277 | goto err_out; | |
0169e284 | 1278 | |
1da177e4 LT |
1279 | /* |
1280 | * arg! EDD works for all test cases, but seems to return | |
1281 | * the ATA signature for some ATAPI devices. Until the | |
1282 | * reason for this is found and fixed, we fix up the mess | |
1283 | * here. If IDENTIFY DEVICE returns command aborted | |
1284 | * (as ATAPI devices do), then we issue an | |
1285 | * IDENTIFY PACKET DEVICE. | |
1286 | * | |
1287 | * ATA software reset (SRST, the default) does not appear | |
1288 | * to have this problem. | |
1289 | */ | |
7c398335 | 1290 | if ((using_edd) && (dev->class == ATA_DEV_ATA)) { |
a0123703 | 1291 | u8 err = tf.feature; |
1da177e4 LT |
1292 | if (err & ATA_ABORTED) { |
1293 | dev->class = ATA_DEV_ATAPI; | |
1da177e4 LT |
1294 | goto retry; |
1295 | } | |
1296 | } | |
1297 | goto err_out; | |
1298 | } | |
1299 | ||
1300 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
1301 | ||
1302 | /* print device capabilities */ | |
1303 | printk(KERN_DEBUG "ata%u: dev %u cfg " | |
1304 | "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1305 | ap->id, device, dev->id[49], | |
1306 | dev->id[82], dev->id[83], dev->id[84], | |
1307 | dev->id[85], dev->id[86], dev->id[87], | |
1308 | dev->id[88]); | |
1309 | ||
1310 | /* | |
1311 | * common ATA, ATAPI feature tests | |
1312 | */ | |
1313 | ||
8bf62ece AL |
1314 | /* we require DMA support (bits 8 of word 49) */ |
1315 | if (!ata_id_has_dma(dev->id)) { | |
1316 | printk(KERN_DEBUG "ata%u: no dma\n", ap->id); | |
1da177e4 LT |
1317 | goto err_out_nosup; |
1318 | } | |
1319 | ||
1320 | /* quick-n-dirty find max transfer mode; for printk only */ | |
1321 | xfer_modes = dev->id[ATA_ID_UDMA_MODES]; | |
1322 | if (!xfer_modes) | |
1323 | xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; | |
11e29e21 AC |
1324 | if (!xfer_modes) |
1325 | xfer_modes = ata_pio_modes(dev); | |
1da177e4 LT |
1326 | |
1327 | ata_dump_id(dev); | |
1328 | ||
1329 | /* ATA-specific feature tests */ | |
1330 | if (dev->class == ATA_DEV_ATA) { | |
1331 | if (!ata_id_is_ata(dev->id)) /* sanity check */ | |
1332 | goto err_out_nosup; | |
1333 | ||
8bf62ece | 1334 | /* get major version */ |
1da177e4 | 1335 | tmp = dev->id[ATA_ID_MAJOR_VER]; |
8bf62ece AL |
1336 | for (major_version = 14; major_version >= 1; major_version--) |
1337 | if (tmp & (1 << major_version)) | |
1da177e4 LT |
1338 | break; |
1339 | ||
8bf62ece AL |
1340 | /* |
1341 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1342 | * SRST RESET | |
1343 | * IDENTIFY | |
1344 | * INITIALIZE DEVICE PARAMETERS | |
1345 | * anything else.. | |
1346 | * Some drives were very specific about that exact sequence. | |
1347 | */ | |
59a10b17 | 1348 | if (major_version < 4 || (!ata_id_has_lba(dev->id))) { |
8bf62ece AL |
1349 | ata_dev_init_params(ap, dev); |
1350 | ||
59a10b17 AL |
1351 | /* current CHS translation info (id[53-58]) might be |
1352 | * changed. reread the identify device info. | |
1353 | */ | |
1354 | ata_dev_reread_id(ap, dev); | |
1355 | } | |
1356 | ||
8bf62ece AL |
1357 | if (ata_id_has_lba(dev->id)) { |
1358 | dev->flags |= ATA_DFLAG_LBA; | |
1359 | ||
1360 | if (ata_id_has_lba48(dev->id)) { | |
1361 | dev->flags |= ATA_DFLAG_LBA48; | |
1362 | dev->n_sectors = ata_id_u64(dev->id, 100); | |
1363 | } else { | |
1364 | dev->n_sectors = ata_id_u32(dev->id, 60); | |
1365 | } | |
1366 | ||
1367 | /* print device info to dmesg */ | |
1368 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n", | |
1369 | ap->id, device, | |
1370 | major_version, | |
1371 | ata_mode_string(xfer_modes), | |
1372 | (unsigned long long)dev->n_sectors, | |
1373 | dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA"); | |
1374 | } else { | |
1375 | /* CHS */ | |
1376 | ||
1377 | /* Default translation */ | |
1378 | dev->cylinders = dev->id[1]; | |
1379 | dev->heads = dev->id[3]; | |
1380 | dev->sectors = dev->id[6]; | |
1381 | dev->n_sectors = dev->cylinders * dev->heads * dev->sectors; | |
1382 | ||
1383 | if (ata_id_current_chs_valid(dev->id)) { | |
1384 | /* Current CHS translation is valid. */ | |
1385 | dev->cylinders = dev->id[54]; | |
1386 | dev->heads = dev->id[55]; | |
1387 | dev->sectors = dev->id[56]; | |
1388 | ||
1389 | dev->n_sectors = ata_id_u32(dev->id, 57); | |
1390 | } | |
1391 | ||
1392 | /* print device info to dmesg */ | |
1393 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n", | |
1394 | ap->id, device, | |
1395 | major_version, | |
1396 | ata_mode_string(xfer_modes), | |
1397 | (unsigned long long)dev->n_sectors, | |
1398 | (int)dev->cylinders, (int)dev->heads, (int)dev->sectors); | |
1da177e4 | 1399 | |
1da177e4 LT |
1400 | } |
1401 | ||
1402 | ap->host->max_cmd_len = 16; | |
1da177e4 LT |
1403 | } |
1404 | ||
1405 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1406 | else if (dev->class == ATA_DEV_ATAPI) { |
1da177e4 LT |
1407 | if (ata_id_is_ata(dev->id)) /* sanity check */ |
1408 | goto err_out_nosup; | |
1409 | ||
1410 | rc = atapi_cdb_len(dev->id); | |
1411 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1412 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | |
1413 | goto err_out_nosup; | |
1414 | } | |
1415 | ap->cdb_len = (unsigned int) rc; | |
1416 | ap->host->max_cmd_len = (unsigned char) ap->cdb_len; | |
1417 | ||
1418 | /* print device info to dmesg */ | |
1419 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | |
1420 | ap->id, device, | |
1421 | ata_mode_string(xfer_modes)); | |
1422 | } | |
1423 | ||
1424 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | |
1425 | return; | |
1426 | ||
1427 | err_out_nosup: | |
1428 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | |
1429 | ap->id, device); | |
1430 | err_out: | |
1431 | dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */ | |
1432 | DPRINTK("EXIT, err\n"); | |
1433 | } | |
1434 | ||
6f2f3812 | 1435 | |
057ace5e | 1436 | static inline u8 ata_dev_knobble(const struct ata_port *ap) |
6f2f3812 BC |
1437 | { |
1438 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id))); | |
1439 | } | |
1440 | ||
1441 | /** | |
1442 | * ata_dev_config - Run device specific handlers and check for | |
1443 | * SATA->PATA bridges | |
8a60a071 | 1444 | * @ap: Bus |
6f2f3812 BC |
1445 | * @i: Device |
1446 | * | |
1447 | * LOCKING: | |
1448 | */ | |
8a60a071 | 1449 | |
6f2f3812 BC |
1450 | void ata_dev_config(struct ata_port *ap, unsigned int i) |
1451 | { | |
1452 | /* limit bridge transfers to udma5, 200 sectors */ | |
1453 | if (ata_dev_knobble(ap)) { | |
1454 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", | |
1455 | ap->id, ap->device->devno); | |
1456 | ap->udma_mask &= ATA_UDMA5; | |
1457 | ap->host->max_sectors = ATA_MAX_SECTORS; | |
1458 | ap->host->hostt->max_sectors = ATA_MAX_SECTORS; | |
9d824d07 | 1459 | ap->device[i].flags |= ATA_DFLAG_LOCK_SECTORS; |
6f2f3812 BC |
1460 | } |
1461 | ||
1462 | if (ap->ops->dev_config) | |
1463 | ap->ops->dev_config(ap, &ap->device[i]); | |
1464 | } | |
1465 | ||
1da177e4 LT |
1466 | /** |
1467 | * ata_bus_probe - Reset and probe ATA bus | |
1468 | * @ap: Bus to probe | |
1469 | * | |
0cba632b JG |
1470 | * Master ATA bus probing function. Initiates a hardware-dependent |
1471 | * bus reset, then attempts to identify any devices found on | |
1472 | * the bus. | |
1473 | * | |
1da177e4 | 1474 | * LOCKING: |
0cba632b | 1475 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1476 | * |
1477 | * RETURNS: | |
1478 | * Zero on success, non-zero on error. | |
1479 | */ | |
1480 | ||
1481 | static int ata_bus_probe(struct ata_port *ap) | |
1482 | { | |
1483 | unsigned int i, found = 0; | |
1484 | ||
1485 | ap->ops->phy_reset(ap); | |
1486 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1487 | goto err_out; | |
1488 | ||
1489 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1490 | ata_dev_identify(ap, i); | |
1491 | if (ata_dev_present(&ap->device[i])) { | |
1492 | found = 1; | |
6f2f3812 | 1493 | ata_dev_config(ap,i); |
1da177e4 LT |
1494 | } |
1495 | } | |
1496 | ||
1497 | if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1498 | goto err_out_disable; | |
1499 | ||
1500 | ata_set_mode(ap); | |
1501 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1502 | goto err_out_disable; | |
1503 | ||
1504 | return 0; | |
1505 | ||
1506 | err_out_disable: | |
1507 | ap->ops->port_disable(ap); | |
1508 | err_out: | |
1509 | return -1; | |
1510 | } | |
1511 | ||
1512 | /** | |
0cba632b JG |
1513 | * ata_port_probe - Mark port as enabled |
1514 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1515 | * |
0cba632b JG |
1516 | * Modify @ap data structure such that the system |
1517 | * thinks that the entire port is enabled. | |
1518 | * | |
1519 | * LOCKING: host_set lock, or some other form of | |
1520 | * serialization. | |
1da177e4 LT |
1521 | */ |
1522 | ||
1523 | void ata_port_probe(struct ata_port *ap) | |
1524 | { | |
1525 | ap->flags &= ~ATA_FLAG_PORT_DISABLED; | |
1526 | } | |
1527 | ||
1528 | /** | |
780a87f7 JG |
1529 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1530 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1531 | * |
780a87f7 JG |
1532 | * This function issues commands to standard SATA Sxxx |
1533 | * PHY registers, to wake up the phy (and device), and | |
1534 | * clear any reset condition. | |
1da177e4 LT |
1535 | * |
1536 | * LOCKING: | |
0cba632b | 1537 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1538 | * |
1539 | */ | |
1540 | void __sata_phy_reset(struct ata_port *ap) | |
1541 | { | |
1542 | u32 sstatus; | |
1543 | unsigned long timeout = jiffies + (HZ * 5); | |
1544 | ||
1545 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e BR |
1546 | /* issue phy wake/reset */ |
1547 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
62ba2841 TH |
1548 | /* Couldn't find anything in SATA I/II specs, but |
1549 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1550 | mdelay(1); | |
1da177e4 | 1551 | } |
cdcca89e | 1552 | scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */ |
1da177e4 LT |
1553 | |
1554 | /* wait for phy to become ready, if necessary */ | |
1555 | do { | |
1556 | msleep(200); | |
1557 | sstatus = scr_read(ap, SCR_STATUS); | |
1558 | if ((sstatus & 0xf) != 1) | |
1559 | break; | |
1560 | } while (time_before(jiffies, timeout)); | |
1561 | ||
1562 | /* TODO: phy layer with polling, timeouts, etc. */ | |
656563e3 JG |
1563 | sstatus = scr_read(ap, SCR_STATUS); |
1564 | if (sata_dev_present(ap)) { | |
1565 | const char *speed; | |
1566 | u32 tmp; | |
1567 | ||
1568 | tmp = (sstatus >> 4) & 0xf; | |
1569 | if (tmp & (1 << 0)) | |
1570 | speed = "1.5"; | |
1571 | else if (tmp & (1 << 1)) | |
1572 | speed = "3.0"; | |
1573 | else | |
1574 | speed = "<unknown>"; | |
1575 | printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n", | |
1576 | ap->id, speed, sstatus); | |
1da177e4 | 1577 | ata_port_probe(ap); |
656563e3 JG |
1578 | } else { |
1579 | printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n", | |
1da177e4 LT |
1580 | ap->id, sstatus); |
1581 | ata_port_disable(ap); | |
1582 | } | |
1583 | ||
1584 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1585 | return; | |
1586 | ||
1587 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1588 | ata_port_disable(ap); | |
1589 | return; | |
1590 | } | |
1591 | ||
1592 | ap->cbl = ATA_CBL_SATA; | |
1593 | } | |
1594 | ||
1595 | /** | |
780a87f7 JG |
1596 | * sata_phy_reset - Reset SATA bus. |
1597 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1598 | * |
780a87f7 JG |
1599 | * This function resets the SATA bus, and then probes |
1600 | * the bus for devices. | |
1da177e4 LT |
1601 | * |
1602 | * LOCKING: | |
0cba632b | 1603 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1604 | * |
1605 | */ | |
1606 | void sata_phy_reset(struct ata_port *ap) | |
1607 | { | |
1608 | __sata_phy_reset(ap); | |
1609 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1610 | return; | |
1611 | ata_bus_reset(ap); | |
1612 | } | |
1613 | ||
1614 | /** | |
780a87f7 JG |
1615 | * ata_port_disable - Disable port. |
1616 | * @ap: Port to be disabled. | |
1da177e4 | 1617 | * |
780a87f7 JG |
1618 | * Modify @ap data structure such that the system |
1619 | * thinks that the entire port is disabled, and should | |
1620 | * never attempt to probe or communicate with devices | |
1621 | * on this port. | |
1622 | * | |
1623 | * LOCKING: host_set lock, or some other form of | |
1624 | * serialization. | |
1da177e4 LT |
1625 | */ |
1626 | ||
1627 | void ata_port_disable(struct ata_port *ap) | |
1628 | { | |
1629 | ap->device[0].class = ATA_DEV_NONE; | |
1630 | ap->device[1].class = ATA_DEV_NONE; | |
1631 | ap->flags |= ATA_FLAG_PORT_DISABLED; | |
1632 | } | |
1633 | ||
452503f9 AC |
1634 | /* |
1635 | * This mode timing computation functionality is ported over from | |
1636 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
1637 | */ | |
1638 | /* | |
1639 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | |
1640 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | |
1641 | * for PIO 5, which is a nonstandard extension and UDMA6, which | |
1642 | * is currently supported only by Maxtor drives. | |
1643 | */ | |
1644 | ||
1645 | static const struct ata_timing ata_timing[] = { | |
1646 | ||
1647 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
1648 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
1649 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
1650 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
1651 | ||
1652 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, | |
1653 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
1654 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
1655 | ||
1656 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
1657 | ||
1658 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, | |
1659 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
1660 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
1661 | ||
1662 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, | |
1663 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
1664 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
1665 | ||
1666 | /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */ | |
1667 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, | |
1668 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
1669 | ||
1670 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
1671 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
1672 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
1673 | ||
1674 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
1675 | ||
1676 | { 0xFF } | |
1677 | }; | |
1678 | ||
1679 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
1680 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
1681 | ||
1682 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
1683 | { | |
1684 | q->setup = EZ(t->setup * 1000, T); | |
1685 | q->act8b = EZ(t->act8b * 1000, T); | |
1686 | q->rec8b = EZ(t->rec8b * 1000, T); | |
1687 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
1688 | q->active = EZ(t->active * 1000, T); | |
1689 | q->recover = EZ(t->recover * 1000, T); | |
1690 | q->cycle = EZ(t->cycle * 1000, T); | |
1691 | q->udma = EZ(t->udma * 1000, UT); | |
1692 | } | |
1693 | ||
1694 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
1695 | struct ata_timing *m, unsigned int what) | |
1696 | { | |
1697 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
1698 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
1699 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
1700 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
1701 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
1702 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
1703 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
1704 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
1705 | } | |
1706 | ||
1707 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
1708 | { | |
1709 | const struct ata_timing *t; | |
1710 | ||
1711 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 1712 | if (t->mode == 0xFF) |
452503f9 AC |
1713 | return NULL; |
1714 | return t; | |
1715 | } | |
1716 | ||
1717 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
1718 | struct ata_timing *t, int T, int UT) | |
1719 | { | |
1720 | const struct ata_timing *s; | |
1721 | struct ata_timing p; | |
1722 | ||
1723 | /* | |
1724 | * Find the mode. | |
75b1f2f8 | 1725 | */ |
452503f9 AC |
1726 | |
1727 | if (!(s = ata_timing_find_mode(speed))) | |
1728 | return -EINVAL; | |
1729 | ||
75b1f2f8 AL |
1730 | memcpy(t, s, sizeof(*s)); |
1731 | ||
452503f9 AC |
1732 | /* |
1733 | * If the drive is an EIDE drive, it can tell us it needs extended | |
1734 | * PIO/MW_DMA cycle timing. | |
1735 | */ | |
1736 | ||
1737 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
1738 | memset(&p, 0, sizeof(p)); | |
1739 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
1740 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
1741 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
1742 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
1743 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
1744 | } | |
1745 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
1746 | } | |
1747 | ||
1748 | /* | |
1749 | * Convert the timing to bus clock counts. | |
1750 | */ | |
1751 | ||
75b1f2f8 | 1752 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
1753 | |
1754 | /* | |
1755 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T | |
1756 | * and some other commands. We have to ensure that the DMA cycle timing is | |
1757 | * slower/equal than the fastest PIO timing. | |
1758 | */ | |
1759 | ||
1760 | if (speed > XFER_PIO_4) { | |
1761 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
1762 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
1763 | } | |
1764 | ||
1765 | /* | |
1766 | * Lenghten active & recovery time so that cycle time is correct. | |
1767 | */ | |
1768 | ||
1769 | if (t->act8b + t->rec8b < t->cyc8b) { | |
1770 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
1771 | t->rec8b = t->cyc8b - t->act8b; | |
1772 | } | |
1773 | ||
1774 | if (t->active + t->recover < t->cycle) { | |
1775 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
1776 | t->recover = t->cycle - t->active; | |
1777 | } | |
1778 | ||
1779 | return 0; | |
1780 | } | |
1781 | ||
057ace5e | 1782 | static const struct { |
1da177e4 LT |
1783 | unsigned int shift; |
1784 | u8 base; | |
1785 | } xfer_mode_classes[] = { | |
1786 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | |
1787 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | |
1788 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | |
1789 | }; | |
1790 | ||
858119e1 | 1791 | static u8 base_from_shift(unsigned int shift) |
1da177e4 LT |
1792 | { |
1793 | int i; | |
1794 | ||
1795 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | |
1796 | if (xfer_mode_classes[i].shift == shift) | |
1797 | return xfer_mode_classes[i].base; | |
1798 | ||
1799 | return 0xff; | |
1800 | } | |
1801 | ||
1802 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |
1803 | { | |
1804 | int ofs, idx; | |
1805 | u8 base; | |
1806 | ||
1807 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1808 | return; | |
1809 | ||
1810 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
1811 | dev->flags |= ATA_DFLAG_PIO; | |
1812 | ||
1813 | ata_dev_set_xfermode(ap, dev); | |
1814 | ||
1815 | base = base_from_shift(dev->xfer_shift); | |
1816 | ofs = dev->xfer_mode - base; | |
1817 | idx = ofs + dev->xfer_shift; | |
1818 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | |
1819 | ||
1820 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", | |
1821 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | |
1822 | ||
1823 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | |
1824 | ap->id, dev->devno, xfer_mode_str[idx]); | |
1825 | } | |
1826 | ||
1827 | static int ata_host_set_pio(struct ata_port *ap) | |
1828 | { | |
1829 | unsigned int mask; | |
1830 | int x, i; | |
1831 | u8 base, xfer_mode; | |
1832 | ||
1833 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | |
1834 | x = fgb(mask); | |
1835 | if (x < 0) { | |
1836 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | |
1837 | return -1; | |
1838 | } | |
1839 | ||
1840 | base = base_from_shift(ATA_SHIFT_PIO); | |
1841 | xfer_mode = base + x; | |
1842 | ||
1843 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | |
1844 | (int)base, (int)xfer_mode, mask, x); | |
1845 | ||
1846 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1847 | struct ata_device *dev = &ap->device[i]; | |
1848 | if (ata_dev_present(dev)) { | |
1849 | dev->pio_mode = xfer_mode; | |
1850 | dev->xfer_mode = xfer_mode; | |
1851 | dev->xfer_shift = ATA_SHIFT_PIO; | |
1852 | if (ap->ops->set_piomode) | |
1853 | ap->ops->set_piomode(ap, dev); | |
1854 | } | |
1855 | } | |
1856 | ||
1857 | return 0; | |
1858 | } | |
1859 | ||
1860 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |
1861 | unsigned int xfer_shift) | |
1862 | { | |
1863 | int i; | |
1864 | ||
1865 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1866 | struct ata_device *dev = &ap->device[i]; | |
1867 | if (ata_dev_present(dev)) { | |
1868 | dev->dma_mode = xfer_mode; | |
1869 | dev->xfer_mode = xfer_mode; | |
1870 | dev->xfer_shift = xfer_shift; | |
1871 | if (ap->ops->set_dmamode) | |
1872 | ap->ops->set_dmamode(ap, dev); | |
1873 | } | |
1874 | } | |
1875 | } | |
1876 | ||
1877 | /** | |
1878 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1879 | * @ap: port on which timings will be programmed | |
1880 | * | |
780a87f7 JG |
1881 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). |
1882 | * | |
1da177e4 | 1883 | * LOCKING: |
0cba632b | 1884 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1885 | * |
1886 | */ | |
1887 | static void ata_set_mode(struct ata_port *ap) | |
1888 | { | |
8cbd6df1 | 1889 | unsigned int xfer_shift; |
1da177e4 LT |
1890 | u8 xfer_mode; |
1891 | int rc; | |
1892 | ||
1893 | /* step 1: always set host PIO timings */ | |
1894 | rc = ata_host_set_pio(ap); | |
1895 | if (rc) | |
1896 | goto err_out; | |
1897 | ||
1898 | /* step 2: choose the best data xfer mode */ | |
1899 | xfer_mode = xfer_shift = 0; | |
1900 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | |
1901 | if (rc) | |
1902 | goto err_out; | |
1903 | ||
1904 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | |
1905 | if (xfer_shift != ATA_SHIFT_PIO) | |
1906 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | |
1907 | ||
1908 | /* step 4: update devices' xfer mode */ | |
1909 | ata_dev_set_mode(ap, &ap->device[0]); | |
1910 | ata_dev_set_mode(ap, &ap->device[1]); | |
1911 | ||
1912 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1913 | return; | |
1914 | ||
1915 | if (ap->ops->post_set_mode) | |
1916 | ap->ops->post_set_mode(ap); | |
1917 | ||
1da177e4 LT |
1918 | return; |
1919 | ||
1920 | err_out: | |
1921 | ata_port_disable(ap); | |
1922 | } | |
1923 | ||
1924 | /** | |
1925 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
1926 | * @ap: port containing status register to be polled | |
1927 | * @tmout_pat: impatience timeout | |
1928 | * @tmout: overall timeout | |
1929 | * | |
780a87f7 JG |
1930 | * Sleep until ATA Status register bit BSY clears, |
1931 | * or a timeout occurs. | |
1932 | * | |
1933 | * LOCKING: None. | |
1da177e4 LT |
1934 | * |
1935 | */ | |
1936 | ||
1937 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
1938 | unsigned long tmout_pat, | |
1939 | unsigned long tmout) | |
1940 | { | |
1941 | unsigned long timer_start, timeout; | |
1942 | u8 status; | |
1943 | ||
1944 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
1945 | timer_start = jiffies; | |
1946 | timeout = timer_start + tmout_pat; | |
1947 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1948 | msleep(50); | |
1949 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
1950 | } | |
1951 | ||
1952 | if (status & ATA_BUSY) | |
1953 | printk(KERN_WARNING "ata%u is slow to respond, " | |
1954 | "please be patient\n", ap->id); | |
1955 | ||
1956 | timeout = timer_start + tmout; | |
1957 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1958 | msleep(50); | |
1959 | status = ata_chk_status(ap); | |
1960 | } | |
1961 | ||
1962 | if (status & ATA_BUSY) { | |
1963 | printk(KERN_ERR "ata%u failed to respond (%lu secs)\n", | |
1964 | ap->id, tmout / HZ); | |
1965 | return 1; | |
1966 | } | |
1967 | ||
1968 | return 0; | |
1969 | } | |
1970 | ||
1971 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
1972 | { | |
1973 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1974 | unsigned int dev0 = devmask & (1 << 0); | |
1975 | unsigned int dev1 = devmask & (1 << 1); | |
1976 | unsigned long timeout; | |
1977 | ||
1978 | /* if device 0 was found in ata_devchk, wait for its | |
1979 | * BSY bit to clear | |
1980 | */ | |
1981 | if (dev0) | |
1982 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1983 | ||
1984 | /* if device 1 was found in ata_devchk, wait for | |
1985 | * register access, then wait for BSY to clear | |
1986 | */ | |
1987 | timeout = jiffies + ATA_TMOUT_BOOT; | |
1988 | while (dev1) { | |
1989 | u8 nsect, lbal; | |
1990 | ||
1991 | ap->ops->dev_select(ap, 1); | |
1992 | if (ap->flags & ATA_FLAG_MMIO) { | |
1993 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
1994 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
1995 | } else { | |
1996 | nsect = inb(ioaddr->nsect_addr); | |
1997 | lbal = inb(ioaddr->lbal_addr); | |
1998 | } | |
1999 | if ((nsect == 1) && (lbal == 1)) | |
2000 | break; | |
2001 | if (time_after(jiffies, timeout)) { | |
2002 | dev1 = 0; | |
2003 | break; | |
2004 | } | |
2005 | msleep(50); /* give drive a breather */ | |
2006 | } | |
2007 | if (dev1) | |
2008 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2009 | ||
2010 | /* is all this really necessary? */ | |
2011 | ap->ops->dev_select(ap, 0); | |
2012 | if (dev1) | |
2013 | ap->ops->dev_select(ap, 1); | |
2014 | if (dev0) | |
2015 | ap->ops->dev_select(ap, 0); | |
2016 | } | |
2017 | ||
2018 | /** | |
0cba632b JG |
2019 | * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command. |
2020 | * @ap: Port to reset and probe | |
2021 | * | |
2022 | * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and | |
2023 | * probe the bus. Not often used these days. | |
1da177e4 LT |
2024 | * |
2025 | * LOCKING: | |
0cba632b | 2026 | * PCI/etc. bus probe sem. |
e5338254 | 2027 | * Obtains host_set lock. |
1da177e4 LT |
2028 | * |
2029 | */ | |
2030 | ||
2031 | static unsigned int ata_bus_edd(struct ata_port *ap) | |
2032 | { | |
2033 | struct ata_taskfile tf; | |
e5338254 | 2034 | unsigned long flags; |
1da177e4 LT |
2035 | |
2036 | /* set up execute-device-diag (bus reset) taskfile */ | |
2037 | /* also, take interrupts to a known state (disabled) */ | |
2038 | DPRINTK("execute-device-diag\n"); | |
2039 | ata_tf_init(ap, &tf, 0); | |
2040 | tf.ctl |= ATA_NIEN; | |
2041 | tf.command = ATA_CMD_EDD; | |
2042 | tf.protocol = ATA_PROT_NODATA; | |
2043 | ||
2044 | /* do bus reset */ | |
e5338254 | 2045 | spin_lock_irqsave(&ap->host_set->lock, flags); |
1da177e4 | 2046 | ata_tf_to_host(ap, &tf); |
e5338254 | 2047 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
1da177e4 LT |
2048 | |
2049 | /* spec says at least 2ms. but who knows with those | |
2050 | * crazy ATAPI devices... | |
2051 | */ | |
2052 | msleep(150); | |
2053 | ||
2054 | return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2055 | } | |
2056 | ||
2057 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
2058 | unsigned int devmask) | |
2059 | { | |
2060 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2061 | ||
2062 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
2063 | ||
2064 | /* software reset. causes dev0 to be selected */ | |
2065 | if (ap->flags & ATA_FLAG_MMIO) { | |
2066 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2067 | udelay(20); /* FIXME: flush */ | |
2068 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
2069 | udelay(20); /* FIXME: flush */ | |
2070 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2071 | } else { | |
2072 | outb(ap->ctl, ioaddr->ctl_addr); | |
2073 | udelay(10); | |
2074 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2075 | udelay(10); | |
2076 | outb(ap->ctl, ioaddr->ctl_addr); | |
2077 | } | |
2078 | ||
2079 | /* spec mandates ">= 2ms" before checking status. | |
2080 | * We wait 150ms, because that was the magic delay used for | |
2081 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2082 | * between when the ATA command register is written, and then | |
2083 | * status is checked. Because waiting for "a while" before | |
2084 | * checking status is fine, post SRST, we perform this magic | |
2085 | * delay here as well. | |
2086 | */ | |
2087 | msleep(150); | |
2088 | ||
2089 | ata_bus_post_reset(ap, devmask); | |
2090 | ||
2091 | return 0; | |
2092 | } | |
2093 | ||
2094 | /** | |
2095 | * ata_bus_reset - reset host port and associated ATA channel | |
2096 | * @ap: port to reset | |
2097 | * | |
2098 | * This is typically the first time we actually start issuing | |
2099 | * commands to the ATA channel. We wait for BSY to clear, then | |
2100 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2101 | * result. Determine what devices, if any, are on the channel | |
2102 | * by looking at the device 0/1 error register. Look at the signature | |
2103 | * stored in each device's taskfile registers, to determine if | |
2104 | * the device is ATA or ATAPI. | |
2105 | * | |
2106 | * LOCKING: | |
0cba632b JG |
2107 | * PCI/etc. bus probe sem. |
2108 | * Obtains host_set lock. | |
1da177e4 LT |
2109 | * |
2110 | * SIDE EFFECTS: | |
2111 | * Sets ATA_FLAG_PORT_DISABLED if bus reset fails. | |
2112 | */ | |
2113 | ||
2114 | void ata_bus_reset(struct ata_port *ap) | |
2115 | { | |
2116 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2117 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2118 | u8 err; | |
2119 | unsigned int dev0, dev1 = 0, rc = 0, devmask = 0; | |
2120 | ||
2121 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2122 | ||
2123 | /* determine if device 0/1 are present */ | |
2124 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2125 | dev0 = 1; | |
2126 | else { | |
2127 | dev0 = ata_devchk(ap, 0); | |
2128 | if (slave_possible) | |
2129 | dev1 = ata_devchk(ap, 1); | |
2130 | } | |
2131 | ||
2132 | if (dev0) | |
2133 | devmask |= (1 << 0); | |
2134 | if (dev1) | |
2135 | devmask |= (1 << 1); | |
2136 | ||
2137 | /* select device 0 again */ | |
2138 | ap->ops->dev_select(ap, 0); | |
2139 | ||
2140 | /* issue bus reset */ | |
2141 | if (ap->flags & ATA_FLAG_SRST) | |
2142 | rc = ata_bus_softreset(ap, devmask); | |
2143 | else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) { | |
2144 | /* set up device control */ | |
2145 | if (ap->flags & ATA_FLAG_MMIO) | |
2146 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2147 | else | |
2148 | outb(ap->ctl, ioaddr->ctl_addr); | |
2149 | rc = ata_bus_edd(ap); | |
2150 | } | |
2151 | ||
2152 | if (rc) | |
2153 | goto err_out; | |
2154 | ||
2155 | /* | |
2156 | * determine by signature whether we have ATA or ATAPI devices | |
2157 | */ | |
2158 | err = ata_dev_try_classify(ap, 0); | |
2159 | if ((slave_possible) && (err != 0x81)) | |
2160 | ata_dev_try_classify(ap, 1); | |
2161 | ||
2162 | /* re-enable interrupts */ | |
2163 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2164 | ata_irq_on(ap); | |
2165 | ||
2166 | /* is double-select really necessary? */ | |
2167 | if (ap->device[1].class != ATA_DEV_NONE) | |
2168 | ap->ops->dev_select(ap, 1); | |
2169 | if (ap->device[0].class != ATA_DEV_NONE) | |
2170 | ap->ops->dev_select(ap, 0); | |
2171 | ||
2172 | /* if no devices were detected, disable this port */ | |
2173 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2174 | (ap->device[1].class == ATA_DEV_NONE)) | |
2175 | goto err_out; | |
2176 | ||
2177 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2178 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2179 | if (ap->flags & ATA_FLAG_MMIO) | |
2180 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2181 | else | |
2182 | outb(ap->ctl, ioaddr->ctl_addr); | |
2183 | } | |
2184 | ||
2185 | DPRINTK("EXIT\n"); | |
2186 | return; | |
2187 | ||
2188 | err_out: | |
2189 | printk(KERN_ERR "ata%u: disabling port\n", ap->id); | |
2190 | ap->ops->port_disable(ap); | |
2191 | ||
2192 | DPRINTK("EXIT\n"); | |
2193 | } | |
2194 | ||
057ace5e JG |
2195 | static void ata_pr_blacklisted(const struct ata_port *ap, |
2196 | const struct ata_device *dev) | |
1da177e4 LT |
2197 | { |
2198 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | |
2199 | ap->id, dev->devno); | |
2200 | } | |
2201 | ||
98ac62de | 2202 | static const char * const ata_dma_blacklist [] = { |
1da177e4 LT |
2203 | "WDC AC11000H", |
2204 | "WDC AC22100H", | |
2205 | "WDC AC32500H", | |
2206 | "WDC AC33100H", | |
2207 | "WDC AC31600H", | |
2208 | "WDC AC32100H", | |
2209 | "WDC AC23200L", | |
2210 | "Compaq CRD-8241B", | |
2211 | "CRD-8400B", | |
2212 | "CRD-8480B", | |
2213 | "CRD-8482B", | |
2214 | "CRD-84", | |
2215 | "SanDisk SDP3B", | |
2216 | "SanDisk SDP3B-64", | |
2217 | "SANYO CD-ROM CRD", | |
2218 | "HITACHI CDR-8", | |
2219 | "HITACHI CDR-8335", | |
2220 | "HITACHI CDR-8435", | |
2221 | "Toshiba CD-ROM XM-6202B", | |
e922256a | 2222 | "TOSHIBA CD-ROM XM-1702BC", |
1da177e4 LT |
2223 | "CD-532E-A", |
2224 | "E-IDE CD-ROM CR-840", | |
2225 | "CD-ROM Drive/F5A", | |
2226 | "WPI CDD-820", | |
2227 | "SAMSUNG CD-ROM SC-148C", | |
2228 | "SAMSUNG CD-ROM SC", | |
2229 | "SanDisk SDP3B-64", | |
1da177e4 LT |
2230 | "ATAPI CD-ROM DRIVE 40X MAXIMUM", |
2231 | "_NEC DV5800A", | |
2232 | }; | |
2233 | ||
057ace5e | 2234 | static int ata_dma_blacklisted(const struct ata_device *dev) |
1da177e4 LT |
2235 | { |
2236 | unsigned char model_num[40]; | |
2237 | char *s; | |
2238 | unsigned int len; | |
2239 | int i; | |
2240 | ||
2241 | ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS, | |
2242 | sizeof(model_num)); | |
2243 | s = &model_num[0]; | |
2244 | len = strnlen(s, sizeof(model_num)); | |
2245 | ||
2246 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
2247 | while ((len > 0) && (s[len - 1] == ' ')) { | |
2248 | len--; | |
2249 | s[len] = 0; | |
2250 | } | |
2251 | ||
2252 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) | |
2253 | if (!strncmp(ata_dma_blacklist[i], s, len)) | |
2254 | return 1; | |
2255 | ||
2256 | return 0; | |
2257 | } | |
2258 | ||
057ace5e | 2259 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift) |
1da177e4 | 2260 | { |
057ace5e | 2261 | const struct ata_device *master, *slave; |
1da177e4 LT |
2262 | unsigned int mask; |
2263 | ||
2264 | master = &ap->device[0]; | |
2265 | slave = &ap->device[1]; | |
2266 | ||
2267 | assert (ata_dev_present(master) || ata_dev_present(slave)); | |
2268 | ||
2269 | if (shift == ATA_SHIFT_UDMA) { | |
2270 | mask = ap->udma_mask; | |
2271 | if (ata_dev_present(master)) { | |
2272 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | |
057ace5e | 2273 | if (ata_dma_blacklisted(master)) { |
1da177e4 LT |
2274 | mask = 0; |
2275 | ata_pr_blacklisted(ap, master); | |
2276 | } | |
2277 | } | |
2278 | if (ata_dev_present(slave)) { | |
2279 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | |
057ace5e | 2280 | if (ata_dma_blacklisted(slave)) { |
1da177e4 LT |
2281 | mask = 0; |
2282 | ata_pr_blacklisted(ap, slave); | |
2283 | } | |
2284 | } | |
2285 | } | |
2286 | else if (shift == ATA_SHIFT_MWDMA) { | |
2287 | mask = ap->mwdma_mask; | |
2288 | if (ata_dev_present(master)) { | |
2289 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | |
057ace5e | 2290 | if (ata_dma_blacklisted(master)) { |
1da177e4 LT |
2291 | mask = 0; |
2292 | ata_pr_blacklisted(ap, master); | |
2293 | } | |
2294 | } | |
2295 | if (ata_dev_present(slave)) { | |
2296 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | |
057ace5e | 2297 | if (ata_dma_blacklisted(slave)) { |
1da177e4 LT |
2298 | mask = 0; |
2299 | ata_pr_blacklisted(ap, slave); | |
2300 | } | |
2301 | } | |
2302 | } | |
2303 | else if (shift == ATA_SHIFT_PIO) { | |
2304 | mask = ap->pio_mask; | |
2305 | if (ata_dev_present(master)) { | |
2306 | /* spec doesn't return explicit support for | |
2307 | * PIO0-2, so we fake it | |
2308 | */ | |
2309 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | |
2310 | tmp_mode <<= 3; | |
2311 | tmp_mode |= 0x7; | |
2312 | mask &= tmp_mode; | |
2313 | } | |
2314 | if (ata_dev_present(slave)) { | |
2315 | /* spec doesn't return explicit support for | |
2316 | * PIO0-2, so we fake it | |
2317 | */ | |
2318 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | |
2319 | tmp_mode <<= 3; | |
2320 | tmp_mode |= 0x7; | |
2321 | mask &= tmp_mode; | |
2322 | } | |
2323 | } | |
2324 | else { | |
2325 | mask = 0xffffffff; /* shut up compiler warning */ | |
2326 | BUG(); | |
2327 | } | |
2328 | ||
2329 | return mask; | |
2330 | } | |
2331 | ||
2332 | /* find greatest bit */ | |
2333 | static int fgb(u32 bitmap) | |
2334 | { | |
2335 | unsigned int i; | |
2336 | int x = -1; | |
2337 | ||
2338 | for (i = 0; i < 32; i++) | |
2339 | if (bitmap & (1 << i)) | |
2340 | x = i; | |
2341 | ||
2342 | return x; | |
2343 | } | |
2344 | ||
2345 | /** | |
2346 | * ata_choose_xfer_mode - attempt to find best transfer mode | |
2347 | * @ap: Port for which an xfer mode will be selected | |
2348 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | |
2349 | * @xfer_shift_out: (output) bit shift that selects this mode | |
2350 | * | |
0cba632b JG |
2351 | * Based on host and device capabilities, determine the |
2352 | * maximum transfer mode that is amenable to all. | |
2353 | * | |
1da177e4 | 2354 | * LOCKING: |
0cba632b | 2355 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2356 | * |
2357 | * RETURNS: | |
2358 | * Zero on success, negative on error. | |
2359 | */ | |
2360 | ||
057ace5e | 2361 | static int ata_choose_xfer_mode(const struct ata_port *ap, |
1da177e4 LT |
2362 | u8 *xfer_mode_out, |
2363 | unsigned int *xfer_shift_out) | |
2364 | { | |
2365 | unsigned int mask, shift; | |
2366 | int x, i; | |
2367 | ||
2368 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | |
2369 | shift = xfer_mode_classes[i].shift; | |
2370 | mask = ata_get_mode_mask(ap, shift); | |
2371 | ||
2372 | x = fgb(mask); | |
2373 | if (x >= 0) { | |
2374 | *xfer_mode_out = xfer_mode_classes[i].base + x; | |
2375 | *xfer_shift_out = shift; | |
2376 | return 0; | |
2377 | } | |
2378 | } | |
2379 | ||
2380 | return -1; | |
2381 | } | |
2382 | ||
2383 | /** | |
2384 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
2385 | * @ap: Port associated with device @dev | |
2386 | * @dev: Device to which command will be sent | |
2387 | * | |
780a87f7 JG |
2388 | * Issue SET FEATURES - XFER MODE command to device @dev |
2389 | * on port @ap. | |
2390 | * | |
1da177e4 | 2391 | * LOCKING: |
0cba632b | 2392 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2393 | */ |
2394 | ||
2395 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) | |
2396 | { | |
a0123703 | 2397 | struct ata_taskfile tf; |
1da177e4 LT |
2398 | |
2399 | /* set up set-features taskfile */ | |
2400 | DPRINTK("set features - xfer mode\n"); | |
2401 | ||
a0123703 TH |
2402 | ata_tf_init(ap, &tf, dev->devno); |
2403 | tf.command = ATA_CMD_SET_FEATURES; | |
2404 | tf.feature = SETFEATURES_XFER; | |
2405 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2406 | tf.protocol = ATA_PROT_NODATA; | |
2407 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 2408 | |
a0123703 TH |
2409 | if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) { |
2410 | printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n", | |
2411 | ap->id); | |
1da177e4 | 2412 | ata_port_disable(ap); |
a0123703 | 2413 | } |
1da177e4 LT |
2414 | |
2415 | DPRINTK("EXIT\n"); | |
2416 | } | |
2417 | ||
59a10b17 AL |
2418 | /** |
2419 | * ata_dev_reread_id - Reread the device identify device info | |
2420 | * @ap: port where the device is | |
2421 | * @dev: device to reread the identify device info | |
2422 | * | |
2423 | * LOCKING: | |
2424 | */ | |
2425 | ||
2426 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev) | |
2427 | { | |
a0123703 | 2428 | struct ata_taskfile tf; |
59a10b17 | 2429 | |
a0123703 | 2430 | ata_tf_init(ap, &tf, dev->devno); |
59a10b17 AL |
2431 | |
2432 | if (dev->class == ATA_DEV_ATA) { | |
a0123703 | 2433 | tf.command = ATA_CMD_ID_ATA; |
59a10b17 AL |
2434 | DPRINTK("do ATA identify\n"); |
2435 | } else { | |
a0123703 | 2436 | tf.command = ATA_CMD_ID_ATAPI; |
59a10b17 AL |
2437 | DPRINTK("do ATAPI identify\n"); |
2438 | } | |
2439 | ||
a0123703 TH |
2440 | tf.flags |= ATA_TFLAG_DEVICE; |
2441 | tf.protocol = ATA_PROT_PIO; | |
59a10b17 | 2442 | |
a0123703 TH |
2443 | if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE, |
2444 | dev->id, sizeof(dev->id))) | |
59a10b17 AL |
2445 | goto err_out; |
2446 | ||
59a10b17 AL |
2447 | swap_buf_le16(dev->id, ATA_ID_WORDS); |
2448 | ||
2449 | ata_dump_id(dev); | |
2450 | ||
2451 | DPRINTK("EXIT\n"); | |
2452 | ||
2453 | return; | |
2454 | err_out: | |
a0123703 | 2455 | printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id); |
59a10b17 AL |
2456 | ata_port_disable(ap); |
2457 | } | |
2458 | ||
8bf62ece AL |
2459 | /** |
2460 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
2461 | * @ap: Port associated with device @dev | |
2462 | * @dev: Device to which command will be sent | |
2463 | * | |
2464 | * LOCKING: | |
2465 | */ | |
2466 | ||
2467 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev) | |
2468 | { | |
a0123703 | 2469 | struct ata_taskfile tf; |
8bf62ece AL |
2470 | u16 sectors = dev->id[6]; |
2471 | u16 heads = dev->id[3]; | |
2472 | ||
2473 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
2474 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
2475 | return; | |
2476 | ||
2477 | /* set up init dev params taskfile */ | |
2478 | DPRINTK("init dev params \n"); | |
2479 | ||
a0123703 TH |
2480 | ata_tf_init(ap, &tf, dev->devno); |
2481 | tf.command = ATA_CMD_INIT_DEV_PARAMS; | |
2482 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2483 | tf.protocol = ATA_PROT_NODATA; | |
2484 | tf.nsect = sectors; | |
2485 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 2486 | |
a0123703 TH |
2487 | if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) { |
2488 | printk(KERN_ERR "ata%u: failed to init parameters, disabled\n", | |
2489 | ap->id); | |
8bf62ece | 2490 | ata_port_disable(ap); |
a0123703 | 2491 | } |
8bf62ece AL |
2492 | |
2493 | DPRINTK("EXIT\n"); | |
2494 | } | |
2495 | ||
1da177e4 | 2496 | /** |
0cba632b JG |
2497 | * ata_sg_clean - Unmap DMA memory associated with command |
2498 | * @qc: Command containing DMA memory to be released | |
2499 | * | |
2500 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
2501 | * |
2502 | * LOCKING: | |
0cba632b | 2503 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2504 | */ |
2505 | ||
2506 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
2507 | { | |
2508 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 2509 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 2510 | int dir = qc->dma_dir; |
cedc9a47 | 2511 | void *pad_buf = NULL; |
1da177e4 LT |
2512 | |
2513 | assert(qc->flags & ATA_QCFLAG_DMAMAP); | |
2514 | assert(sg != NULL); | |
2515 | ||
2516 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
2517 | assert(qc->n_elem == 1); | |
2518 | ||
2c13b7ce | 2519 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 2520 | |
cedc9a47 JG |
2521 | /* if we padded the buffer out to 32-bit bound, and data |
2522 | * xfer direction is from-device, we must copy from the | |
2523 | * pad buffer back into the supplied buffer | |
2524 | */ | |
2525 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
2526 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2527 | ||
2528 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d JG |
2529 | if (qc->n_elem) |
2530 | dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
cedc9a47 JG |
2531 | /* restore last sg */ |
2532 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
2533 | if (pad_buf) { | |
2534 | struct scatterlist *psg = &qc->pad_sgent; | |
2535 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
2536 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 2537 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
2538 | } |
2539 | } else { | |
e1410f2d JG |
2540 | if (sg_dma_len(&sg[0]) > 0) |
2541 | dma_unmap_single(ap->host_set->dev, | |
2542 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), | |
2543 | dir); | |
cedc9a47 JG |
2544 | /* restore sg */ |
2545 | sg->length += qc->pad_len; | |
2546 | if (pad_buf) | |
2547 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
2548 | pad_buf, qc->pad_len); | |
2549 | } | |
1da177e4 LT |
2550 | |
2551 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 2552 | qc->__sg = NULL; |
1da177e4 LT |
2553 | } |
2554 | ||
2555 | /** | |
2556 | * ata_fill_sg - Fill PCI IDE PRD table | |
2557 | * @qc: Metadata associated with taskfile to be transferred | |
2558 | * | |
780a87f7 JG |
2559 | * Fill PCI IDE PRD (scatter-gather) table with segments |
2560 | * associated with the current disk command. | |
2561 | * | |
1da177e4 | 2562 | * LOCKING: |
780a87f7 | 2563 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2564 | * |
2565 | */ | |
2566 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
2567 | { | |
1da177e4 | 2568 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
2569 | struct scatterlist *sg; |
2570 | unsigned int idx; | |
1da177e4 | 2571 | |
cedc9a47 | 2572 | assert(qc->__sg != NULL); |
1da177e4 LT |
2573 | assert(qc->n_elem > 0); |
2574 | ||
2575 | idx = 0; | |
cedc9a47 | 2576 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
2577 | u32 addr, offset; |
2578 | u32 sg_len, len; | |
2579 | ||
2580 | /* determine if physical DMA addr spans 64K boundary. | |
2581 | * Note h/w doesn't support 64-bit, so we unconditionally | |
2582 | * truncate dma_addr_t to u32. | |
2583 | */ | |
2584 | addr = (u32) sg_dma_address(sg); | |
2585 | sg_len = sg_dma_len(sg); | |
2586 | ||
2587 | while (sg_len) { | |
2588 | offset = addr & 0xffff; | |
2589 | len = sg_len; | |
2590 | if ((offset + sg_len) > 0x10000) | |
2591 | len = 0x10000 - offset; | |
2592 | ||
2593 | ap->prd[idx].addr = cpu_to_le32(addr); | |
2594 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
2595 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
2596 | ||
2597 | idx++; | |
2598 | sg_len -= len; | |
2599 | addr += len; | |
2600 | } | |
2601 | } | |
2602 | ||
2603 | if (idx) | |
2604 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
2605 | } | |
2606 | /** | |
2607 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
2608 | * @qc: Metadata associated with taskfile to check | |
2609 | * | |
780a87f7 JG |
2610 | * Allow low-level driver to filter ATA PACKET commands, returning |
2611 | * a status indicating whether or not it is OK to use DMA for the | |
2612 | * supplied PACKET command. | |
2613 | * | |
1da177e4 | 2614 | * LOCKING: |
0cba632b JG |
2615 | * spin_lock_irqsave(host_set lock) |
2616 | * | |
1da177e4 LT |
2617 | * RETURNS: 0 when ATAPI DMA can be used |
2618 | * nonzero otherwise | |
2619 | */ | |
2620 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
2621 | { | |
2622 | struct ata_port *ap = qc->ap; | |
2623 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
2624 | ||
2625 | if (ap->ops->check_atapi_dma) | |
2626 | rc = ap->ops->check_atapi_dma(qc); | |
2627 | ||
2628 | return rc; | |
2629 | } | |
2630 | /** | |
2631 | * ata_qc_prep - Prepare taskfile for submission | |
2632 | * @qc: Metadata associated with taskfile to be prepared | |
2633 | * | |
780a87f7 JG |
2634 | * Prepare ATA taskfile for submission. |
2635 | * | |
1da177e4 LT |
2636 | * LOCKING: |
2637 | * spin_lock_irqsave(host_set lock) | |
2638 | */ | |
2639 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
2640 | { | |
2641 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
2642 | return; | |
2643 | ||
2644 | ata_fill_sg(qc); | |
2645 | } | |
2646 | ||
0cba632b JG |
2647 | /** |
2648 | * ata_sg_init_one - Associate command with memory buffer | |
2649 | * @qc: Command to be associated | |
2650 | * @buf: Memory buffer | |
2651 | * @buflen: Length of memory buffer, in bytes. | |
2652 | * | |
2653 | * Initialize the data-related elements of queued_cmd @qc | |
2654 | * to point to a single memory buffer, @buf of byte length @buflen. | |
2655 | * | |
2656 | * LOCKING: | |
2657 | * spin_lock_irqsave(host_set lock) | |
2658 | */ | |
2659 | ||
1da177e4 LT |
2660 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
2661 | { | |
2662 | struct scatterlist *sg; | |
2663 | ||
2664 | qc->flags |= ATA_QCFLAG_SINGLE; | |
2665 | ||
2666 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
cedc9a47 | 2667 | qc->__sg = &qc->sgent; |
1da177e4 | 2668 | qc->n_elem = 1; |
cedc9a47 | 2669 | qc->orig_n_elem = 1; |
1da177e4 LT |
2670 | qc->buf_virt = buf; |
2671 | ||
cedc9a47 | 2672 | sg = qc->__sg; |
f0612bbc | 2673 | sg_init_one(sg, buf, buflen); |
1da177e4 LT |
2674 | } |
2675 | ||
0cba632b JG |
2676 | /** |
2677 | * ata_sg_init - Associate command with scatter-gather table. | |
2678 | * @qc: Command to be associated | |
2679 | * @sg: Scatter-gather table. | |
2680 | * @n_elem: Number of elements in s/g table. | |
2681 | * | |
2682 | * Initialize the data-related elements of queued_cmd @qc | |
2683 | * to point to a scatter-gather table @sg, containing @n_elem | |
2684 | * elements. | |
2685 | * | |
2686 | * LOCKING: | |
2687 | * spin_lock_irqsave(host_set lock) | |
2688 | */ | |
2689 | ||
1da177e4 LT |
2690 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
2691 | unsigned int n_elem) | |
2692 | { | |
2693 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 2694 | qc->__sg = sg; |
1da177e4 | 2695 | qc->n_elem = n_elem; |
cedc9a47 | 2696 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
2697 | } |
2698 | ||
2699 | /** | |
0cba632b JG |
2700 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
2701 | * @qc: Command with memory buffer to be mapped. | |
2702 | * | |
2703 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
2704 | * |
2705 | * LOCKING: | |
2706 | * spin_lock_irqsave(host_set lock) | |
2707 | * | |
2708 | * RETURNS: | |
0cba632b | 2709 | * Zero on success, negative on error. |
1da177e4 LT |
2710 | */ |
2711 | ||
2712 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
2713 | { | |
2714 | struct ata_port *ap = qc->ap; | |
2715 | int dir = qc->dma_dir; | |
cedc9a47 | 2716 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
2717 | dma_addr_t dma_address; |
2718 | ||
cedc9a47 JG |
2719 | /* we must lengthen transfers to end on a 32-bit boundary */ |
2720 | qc->pad_len = sg->length & 3; | |
2721 | if (qc->pad_len) { | |
2722 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2723 | struct scatterlist *psg = &qc->pad_sgent; | |
2724 | ||
2725 | assert(qc->dev->class == ATA_DEV_ATAPI); | |
2726 | ||
2727 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
2728 | ||
2729 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
2730 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
2731 | qc->pad_len); | |
2732 | ||
2733 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
2734 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
2735 | /* trim sg */ | |
2736 | sg->length -= qc->pad_len; | |
2737 | ||
2738 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
2739 | sg->length, qc->pad_len); | |
2740 | } | |
2741 | ||
e1410f2d JG |
2742 | if (!sg->length) { |
2743 | sg_dma_address(sg) = 0; | |
2744 | goto skip_map; | |
2745 | } | |
2746 | ||
1da177e4 | 2747 | dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt, |
32529e01 | 2748 | sg->length, dir); |
537a95d9 TH |
2749 | if (dma_mapping_error(dma_address)) { |
2750 | /* restore sg */ | |
2751 | sg->length += qc->pad_len; | |
1da177e4 | 2752 | return -1; |
537a95d9 | 2753 | } |
1da177e4 LT |
2754 | |
2755 | sg_dma_address(sg) = dma_address; | |
e1410f2d | 2756 | skip_map: |
32529e01 | 2757 | sg_dma_len(sg) = sg->length; |
1da177e4 LT |
2758 | |
2759 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), | |
2760 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2761 | ||
2762 | return 0; | |
2763 | } | |
2764 | ||
2765 | /** | |
0cba632b JG |
2766 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
2767 | * @qc: Command with scatter-gather table to be mapped. | |
2768 | * | |
2769 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
2770 | * |
2771 | * LOCKING: | |
2772 | * spin_lock_irqsave(host_set lock) | |
2773 | * | |
2774 | * RETURNS: | |
0cba632b | 2775 | * Zero on success, negative on error. |
1da177e4 LT |
2776 | * |
2777 | */ | |
2778 | ||
2779 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
2780 | { | |
2781 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
2782 | struct scatterlist *sg = qc->__sg; |
2783 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 2784 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 LT |
2785 | |
2786 | VPRINTK("ENTER, ata%u\n", ap->id); | |
2787 | assert(qc->flags & ATA_QCFLAG_SG); | |
2788 | ||
cedc9a47 JG |
2789 | /* we must lengthen transfers to end on a 32-bit boundary */ |
2790 | qc->pad_len = lsg->length & 3; | |
2791 | if (qc->pad_len) { | |
2792 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2793 | struct scatterlist *psg = &qc->pad_sgent; | |
2794 | unsigned int offset; | |
2795 | ||
2796 | assert(qc->dev->class == ATA_DEV_ATAPI); | |
2797 | ||
2798 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
2799 | ||
2800 | /* | |
2801 | * psg->page/offset are used to copy to-be-written | |
2802 | * data in this function or read data in ata_sg_clean. | |
2803 | */ | |
2804 | offset = lsg->offset + lsg->length - qc->pad_len; | |
2805 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
2806 | psg->offset = offset_in_page(offset); | |
2807 | ||
2808 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
2809 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
2810 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 2811 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
2812 | } |
2813 | ||
2814 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
2815 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
2816 | /* trim last sg */ | |
2817 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
2818 | if (lsg->length == 0) |
2819 | trim_sg = 1; | |
cedc9a47 JG |
2820 | |
2821 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
2822 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
2823 | } | |
2824 | ||
e1410f2d JG |
2825 | pre_n_elem = qc->n_elem; |
2826 | if (trim_sg && pre_n_elem) | |
2827 | pre_n_elem--; | |
2828 | ||
2829 | if (!pre_n_elem) { | |
2830 | n_elem = 0; | |
2831 | goto skip_map; | |
2832 | } | |
2833 | ||
1da177e4 | 2834 | dir = qc->dma_dir; |
e1410f2d | 2835 | n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
2836 | if (n_elem < 1) { |
2837 | /* restore last sg */ | |
2838 | lsg->length += qc->pad_len; | |
1da177e4 | 2839 | return -1; |
537a95d9 | 2840 | } |
1da177e4 LT |
2841 | |
2842 | DPRINTK("%d sg elements mapped\n", n_elem); | |
2843 | ||
e1410f2d | 2844 | skip_map: |
1da177e4 LT |
2845 | qc->n_elem = n_elem; |
2846 | ||
2847 | return 0; | |
2848 | } | |
2849 | ||
40e8c82c TH |
2850 | /** |
2851 | * ata_poll_qc_complete - turn irq back on and finish qc | |
2852 | * @qc: Command to complete | |
8e8b77dd | 2853 | * @err_mask: ATA status register content |
40e8c82c TH |
2854 | * |
2855 | * LOCKING: | |
2856 | * None. (grabs host lock) | |
2857 | */ | |
2858 | ||
a22e2eb0 | 2859 | void ata_poll_qc_complete(struct ata_queued_cmd *qc) |
40e8c82c TH |
2860 | { |
2861 | struct ata_port *ap = qc->ap; | |
b8f6153e | 2862 | unsigned long flags; |
40e8c82c | 2863 | |
b8f6153e | 2864 | spin_lock_irqsave(&ap->host_set->lock, flags); |
40e8c82c TH |
2865 | ap->flags &= ~ATA_FLAG_NOINTR; |
2866 | ata_irq_on(ap); | |
a22e2eb0 | 2867 | ata_qc_complete(qc); |
b8f6153e | 2868 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
40e8c82c TH |
2869 | } |
2870 | ||
1da177e4 LT |
2871 | /** |
2872 | * ata_pio_poll - | |
6f0ef4fa | 2873 | * @ap: the target ata_port |
1da177e4 LT |
2874 | * |
2875 | * LOCKING: | |
0cba632b | 2876 | * None. (executing in kernel thread context) |
1da177e4 LT |
2877 | * |
2878 | * RETURNS: | |
6f0ef4fa | 2879 | * timeout value to use |
1da177e4 LT |
2880 | */ |
2881 | ||
2882 | static unsigned long ata_pio_poll(struct ata_port *ap) | |
2883 | { | |
c14b8331 | 2884 | struct ata_queued_cmd *qc; |
1da177e4 | 2885 | u8 status; |
14be71f4 AL |
2886 | unsigned int poll_state = HSM_ST_UNKNOWN; |
2887 | unsigned int reg_state = HSM_ST_UNKNOWN; | |
14be71f4 | 2888 | |
c14b8331 AL |
2889 | qc = ata_qc_from_tag(ap, ap->active_tag); |
2890 | assert(qc != NULL); | |
2891 | ||
14be71f4 AL |
2892 | switch (ap->hsm_task_state) { |
2893 | case HSM_ST: | |
2894 | case HSM_ST_POLL: | |
2895 | poll_state = HSM_ST_POLL; | |
2896 | reg_state = HSM_ST; | |
1da177e4 | 2897 | break; |
14be71f4 AL |
2898 | case HSM_ST_LAST: |
2899 | case HSM_ST_LAST_POLL: | |
2900 | poll_state = HSM_ST_LAST_POLL; | |
2901 | reg_state = HSM_ST_LAST; | |
1da177e4 LT |
2902 | break; |
2903 | default: | |
2904 | BUG(); | |
2905 | break; | |
2906 | } | |
2907 | ||
2908 | status = ata_chk_status(ap); | |
2909 | if (status & ATA_BUSY) { | |
2910 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
1c848984 | 2911 | qc->err_mask |= AC_ERR_ATA_BUS; |
7c398335 | 2912 | ap->hsm_task_state = HSM_ST_TMOUT; |
1da177e4 LT |
2913 | return 0; |
2914 | } | |
14be71f4 | 2915 | ap->hsm_task_state = poll_state; |
1da177e4 LT |
2916 | return ATA_SHORT_PAUSE; |
2917 | } | |
2918 | ||
14be71f4 | 2919 | ap->hsm_task_state = reg_state; |
1da177e4 LT |
2920 | return 0; |
2921 | } | |
2922 | ||
2923 | /** | |
6f0ef4fa RD |
2924 | * ata_pio_complete - check if drive is busy or idle |
2925 | * @ap: the target ata_port | |
1da177e4 LT |
2926 | * |
2927 | * LOCKING: | |
0cba632b | 2928 | * None. (executing in kernel thread context) |
7fb6ec28 JG |
2929 | * |
2930 | * RETURNS: | |
2931 | * Non-zero if qc completed, zero otherwise. | |
1da177e4 LT |
2932 | */ |
2933 | ||
7fb6ec28 | 2934 | static int ata_pio_complete (struct ata_port *ap) |
1da177e4 LT |
2935 | { |
2936 | struct ata_queued_cmd *qc; | |
2937 | u8 drv_stat; | |
2938 | ||
2939 | /* | |
31433ea3 AC |
2940 | * This is purely heuristic. This is a fast path. Sometimes when |
2941 | * we enter, BSY will be cleared in a chk-status or two. If not, | |
2942 | * the drive is probably seeking or something. Snooze for a couple | |
2943 | * msecs, then chk-status again. If still busy, fall back to | |
14be71f4 | 2944 | * HSM_ST_POLL state. |
1da177e4 | 2945 | */ |
fe79e683 AL |
2946 | drv_stat = ata_busy_wait(ap, ATA_BUSY, 10); |
2947 | if (drv_stat & ATA_BUSY) { | |
1da177e4 | 2948 | msleep(2); |
fe79e683 AL |
2949 | drv_stat = ata_busy_wait(ap, ATA_BUSY, 10); |
2950 | if (drv_stat & ATA_BUSY) { | |
14be71f4 | 2951 | ap->hsm_task_state = HSM_ST_LAST_POLL; |
1da177e4 | 2952 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
7fb6ec28 | 2953 | return 0; |
1da177e4 LT |
2954 | } |
2955 | } | |
2956 | ||
c14b8331 AL |
2957 | qc = ata_qc_from_tag(ap, ap->active_tag); |
2958 | assert(qc != NULL); | |
2959 | ||
1da177e4 LT |
2960 | drv_stat = ata_wait_idle(ap); |
2961 | if (!ata_ok(drv_stat)) { | |
1c848984 | 2962 | qc->err_mask |= __ac_err_mask(drv_stat); |
14be71f4 | 2963 | ap->hsm_task_state = HSM_ST_ERR; |
7fb6ec28 | 2964 | return 0; |
1da177e4 LT |
2965 | } |
2966 | ||
14be71f4 | 2967 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 2968 | |
a22e2eb0 AL |
2969 | assert(qc->err_mask == 0); |
2970 | ata_poll_qc_complete(qc); | |
7fb6ec28 JG |
2971 | |
2972 | /* another command may start at this point */ | |
2973 | ||
2974 | return 1; | |
1da177e4 LT |
2975 | } |
2976 | ||
0baab86b EF |
2977 | |
2978 | /** | |
6f0ef4fa | 2979 | * swap_buf_le16 - swap halves of 16-words in place |
0baab86b EF |
2980 | * @buf: Buffer to swap |
2981 | * @buf_words: Number of 16-bit words in buffer. | |
2982 | * | |
2983 | * Swap halves of 16-bit words if needed to convert from | |
2984 | * little-endian byte order to native cpu byte order, or | |
2985 | * vice-versa. | |
2986 | * | |
2987 | * LOCKING: | |
6f0ef4fa | 2988 | * Inherited from caller. |
0baab86b | 2989 | */ |
1da177e4 LT |
2990 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
2991 | { | |
2992 | #ifdef __BIG_ENDIAN | |
2993 | unsigned int i; | |
2994 | ||
2995 | for (i = 0; i < buf_words; i++) | |
2996 | buf[i] = le16_to_cpu(buf[i]); | |
2997 | #endif /* __BIG_ENDIAN */ | |
2998 | } | |
2999 | ||
6ae4cfb5 AL |
3000 | /** |
3001 | * ata_mmio_data_xfer - Transfer data by MMIO | |
3002 | * @ap: port to read/write | |
3003 | * @buf: data buffer | |
3004 | * @buflen: buffer length | |
344babaa | 3005 | * @write_data: read/write |
6ae4cfb5 AL |
3006 | * |
3007 | * Transfer data from/to the device data register by MMIO. | |
3008 | * | |
3009 | * LOCKING: | |
3010 | * Inherited from caller. | |
6ae4cfb5 AL |
3011 | */ |
3012 | ||
1da177e4 LT |
3013 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
3014 | unsigned int buflen, int write_data) | |
3015 | { | |
3016 | unsigned int i; | |
3017 | unsigned int words = buflen >> 1; | |
3018 | u16 *buf16 = (u16 *) buf; | |
3019 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
3020 | ||
6ae4cfb5 | 3021 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
3022 | if (write_data) { |
3023 | for (i = 0; i < words; i++) | |
3024 | writew(le16_to_cpu(buf16[i]), mmio); | |
3025 | } else { | |
3026 | for (i = 0; i < words; i++) | |
3027 | buf16[i] = cpu_to_le16(readw(mmio)); | |
3028 | } | |
6ae4cfb5 AL |
3029 | |
3030 | /* Transfer trailing 1 byte, if any. */ | |
3031 | if (unlikely(buflen & 0x01)) { | |
3032 | u16 align_buf[1] = { 0 }; | |
3033 | unsigned char *trailing_buf = buf + buflen - 1; | |
3034 | ||
3035 | if (write_data) { | |
3036 | memcpy(align_buf, trailing_buf, 1); | |
3037 | writew(le16_to_cpu(align_buf[0]), mmio); | |
3038 | } else { | |
3039 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
3040 | memcpy(trailing_buf, align_buf, 1); | |
3041 | } | |
3042 | } | |
1da177e4 LT |
3043 | } |
3044 | ||
6ae4cfb5 AL |
3045 | /** |
3046 | * ata_pio_data_xfer - Transfer data by PIO | |
3047 | * @ap: port to read/write | |
3048 | * @buf: data buffer | |
3049 | * @buflen: buffer length | |
344babaa | 3050 | * @write_data: read/write |
6ae4cfb5 AL |
3051 | * |
3052 | * Transfer data from/to the device data register by PIO. | |
3053 | * | |
3054 | * LOCKING: | |
3055 | * Inherited from caller. | |
6ae4cfb5 AL |
3056 | */ |
3057 | ||
1da177e4 LT |
3058 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
3059 | unsigned int buflen, int write_data) | |
3060 | { | |
6ae4cfb5 | 3061 | unsigned int words = buflen >> 1; |
1da177e4 | 3062 | |
6ae4cfb5 | 3063 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 3064 | if (write_data) |
6ae4cfb5 | 3065 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 3066 | else |
6ae4cfb5 AL |
3067 | insw(ap->ioaddr.data_addr, buf, words); |
3068 | ||
3069 | /* Transfer trailing 1 byte, if any. */ | |
3070 | if (unlikely(buflen & 0x01)) { | |
3071 | u16 align_buf[1] = { 0 }; | |
3072 | unsigned char *trailing_buf = buf + buflen - 1; | |
3073 | ||
3074 | if (write_data) { | |
3075 | memcpy(align_buf, trailing_buf, 1); | |
3076 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3077 | } else { | |
3078 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
3079 | memcpy(trailing_buf, align_buf, 1); | |
3080 | } | |
3081 | } | |
1da177e4 LT |
3082 | } |
3083 | ||
6ae4cfb5 AL |
3084 | /** |
3085 | * ata_data_xfer - Transfer data from/to the data register. | |
3086 | * @ap: port to read/write | |
3087 | * @buf: data buffer | |
3088 | * @buflen: buffer length | |
3089 | * @do_write: read/write | |
3090 | * | |
3091 | * Transfer data from/to the device data register. | |
3092 | * | |
3093 | * LOCKING: | |
3094 | * Inherited from caller. | |
6ae4cfb5 AL |
3095 | */ |
3096 | ||
1da177e4 LT |
3097 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
3098 | unsigned int buflen, int do_write) | |
3099 | { | |
a1bd9e68 AC |
3100 | /* Make the crap hardware pay the costs not the good stuff */ |
3101 | if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) { | |
3102 | unsigned long flags; | |
3103 | local_irq_save(flags); | |
3104 | if (ap->flags & ATA_FLAG_MMIO) | |
3105 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
3106 | else | |
3107 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
3108 | local_irq_restore(flags); | |
3109 | } else { | |
3110 | if (ap->flags & ATA_FLAG_MMIO) | |
3111 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
3112 | else | |
3113 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
3114 | } | |
1da177e4 LT |
3115 | } |
3116 | ||
6ae4cfb5 AL |
3117 | /** |
3118 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
3119 | * @qc: Command on going | |
3120 | * | |
3121 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
3122 | * | |
3123 | * LOCKING: | |
3124 | * Inherited from caller. | |
3125 | */ | |
3126 | ||
1da177e4 LT |
3127 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
3128 | { | |
3129 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3130 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3131 | struct ata_port *ap = qc->ap; |
3132 | struct page *page; | |
3133 | unsigned int offset; | |
3134 | unsigned char *buf; | |
3135 | ||
3136 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 3137 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3138 | |
3139 | page = sg[qc->cursg].page; | |
3140 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
3141 | ||
3142 | /* get the current page and offset */ | |
3143 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3144 | offset %= PAGE_SIZE; | |
3145 | ||
3146 | buf = kmap(page) + offset; | |
3147 | ||
3148 | qc->cursect++; | |
3149 | qc->cursg_ofs++; | |
3150 | ||
32529e01 | 3151 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
3152 | qc->cursg++; |
3153 | qc->cursg_ofs = 0; | |
3154 | } | |
3155 | ||
3156 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3157 | ||
3158 | /* do the actual data transfer */ | |
3159 | do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3160 | ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write); | |
3161 | ||
3162 | kunmap(page); | |
3163 | } | |
3164 | ||
6ae4cfb5 AL |
3165 | /** |
3166 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3167 | * @qc: Command on going | |
3168 | * @bytes: number of bytes | |
3169 | * | |
3170 | * Transfer Transfer data from/to the ATAPI device. | |
3171 | * | |
3172 | * LOCKING: | |
3173 | * Inherited from caller. | |
3174 | * | |
3175 | */ | |
3176 | ||
1da177e4 LT |
3177 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
3178 | { | |
3179 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3180 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3181 | struct ata_port *ap = qc->ap; |
3182 | struct page *page; | |
3183 | unsigned char *buf; | |
3184 | unsigned int offset, count; | |
3185 | ||
563a6e1f | 3186 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 3187 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3188 | |
3189 | next_sg: | |
563a6e1f | 3190 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 3191 | /* |
563a6e1f AL |
3192 | * The end of qc->sg is reached and the device expects |
3193 | * more data to transfer. In order not to overrun qc->sg | |
3194 | * and fulfill length specified in the byte count register, | |
3195 | * - for read case, discard trailing data from the device | |
3196 | * - for write case, padding zero data to the device | |
3197 | */ | |
3198 | u16 pad_buf[1] = { 0 }; | |
3199 | unsigned int words = bytes >> 1; | |
3200 | unsigned int i; | |
3201 | ||
3202 | if (words) /* warning if bytes > 1 */ | |
7fb6ec28 | 3203 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", |
563a6e1f AL |
3204 | ap->id, bytes); |
3205 | ||
3206 | for (i = 0; i < words; i++) | |
3207 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | |
3208 | ||
14be71f4 | 3209 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
3210 | return; |
3211 | } | |
3212 | ||
cedc9a47 | 3213 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 3214 | |
1da177e4 LT |
3215 | page = sg->page; |
3216 | offset = sg->offset + qc->cursg_ofs; | |
3217 | ||
3218 | /* get the current page and offset */ | |
3219 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3220 | offset %= PAGE_SIZE; | |
3221 | ||
6952df03 | 3222 | /* don't overrun current sg */ |
32529e01 | 3223 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
3224 | |
3225 | /* don't cross page boundaries */ | |
3226 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
3227 | ||
3228 | buf = kmap(page) + offset; | |
3229 | ||
3230 | bytes -= count; | |
3231 | qc->curbytes += count; | |
3232 | qc->cursg_ofs += count; | |
3233 | ||
32529e01 | 3234 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
3235 | qc->cursg++; |
3236 | qc->cursg_ofs = 0; | |
3237 | } | |
3238 | ||
3239 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3240 | ||
3241 | /* do the actual data transfer */ | |
3242 | ata_data_xfer(ap, buf, count, do_write); | |
3243 | ||
3244 | kunmap(page); | |
3245 | ||
563a6e1f | 3246 | if (bytes) |
1da177e4 | 3247 | goto next_sg; |
1da177e4 LT |
3248 | } |
3249 | ||
6ae4cfb5 AL |
3250 | /** |
3251 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3252 | * @qc: Command on going | |
3253 | * | |
3254 | * Transfer Transfer data from/to the ATAPI device. | |
3255 | * | |
3256 | * LOCKING: | |
3257 | * Inherited from caller. | |
6ae4cfb5 AL |
3258 | */ |
3259 | ||
1da177e4 LT |
3260 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
3261 | { | |
3262 | struct ata_port *ap = qc->ap; | |
3263 | struct ata_device *dev = qc->dev; | |
3264 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
3265 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
3266 | ||
3267 | ap->ops->tf_read(ap, &qc->tf); | |
3268 | ireason = qc->tf.nsect; | |
3269 | bc_lo = qc->tf.lbam; | |
3270 | bc_hi = qc->tf.lbah; | |
3271 | bytes = (bc_hi << 8) | bc_lo; | |
3272 | ||
3273 | /* shall be cleared to zero, indicating xfer of data */ | |
3274 | if (ireason & (1 << 0)) | |
3275 | goto err_out; | |
3276 | ||
3277 | /* make sure transfer direction matches expected */ | |
3278 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
3279 | if (do_write != i_write) | |
3280 | goto err_out; | |
3281 | ||
3282 | __atapi_pio_bytes(qc, bytes); | |
3283 | ||
3284 | return; | |
3285 | ||
3286 | err_out: | |
3287 | printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", | |
3288 | ap->id, dev->devno); | |
1c848984 | 3289 | qc->err_mask |= AC_ERR_ATA_BUS; |
14be71f4 | 3290 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3291 | } |
3292 | ||
3293 | /** | |
6f0ef4fa RD |
3294 | * ata_pio_block - start PIO on a block |
3295 | * @ap: the target ata_port | |
1da177e4 LT |
3296 | * |
3297 | * LOCKING: | |
0cba632b | 3298 | * None. (executing in kernel thread context) |
1da177e4 LT |
3299 | */ |
3300 | ||
3301 | static void ata_pio_block(struct ata_port *ap) | |
3302 | { | |
3303 | struct ata_queued_cmd *qc; | |
3304 | u8 status; | |
3305 | ||
3306 | /* | |
6f0ef4fa | 3307 | * This is purely heuristic. This is a fast path. |
1da177e4 LT |
3308 | * Sometimes when we enter, BSY will be cleared in |
3309 | * a chk-status or two. If not, the drive is probably seeking | |
3310 | * or something. Snooze for a couple msecs, then | |
3311 | * chk-status again. If still busy, fall back to | |
14be71f4 | 3312 | * HSM_ST_POLL state. |
1da177e4 LT |
3313 | */ |
3314 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
3315 | if (status & ATA_BUSY) { | |
3316 | msleep(2); | |
3317 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
3318 | if (status & ATA_BUSY) { | |
14be71f4 | 3319 | ap->hsm_task_state = HSM_ST_POLL; |
1da177e4 LT |
3320 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
3321 | return; | |
3322 | } | |
3323 | } | |
3324 | ||
3325 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3326 | assert(qc != NULL); | |
3327 | ||
fe79e683 AL |
3328 | /* check error */ |
3329 | if (status & (ATA_ERR | ATA_DF)) { | |
3330 | qc->err_mask |= AC_ERR_DEV; | |
3331 | ap->hsm_task_state = HSM_ST_ERR; | |
3332 | return; | |
3333 | } | |
3334 | ||
3335 | /* transfer data if any */ | |
1da177e4 | 3336 | if (is_atapi_taskfile(&qc->tf)) { |
fe79e683 | 3337 | /* DRQ=0 means no more data to transfer */ |
1da177e4 | 3338 | if ((status & ATA_DRQ) == 0) { |
14be71f4 | 3339 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3340 | return; |
3341 | } | |
3342 | ||
3343 | atapi_pio_bytes(qc); | |
3344 | } else { | |
3345 | /* handle BSY=0, DRQ=0 as error */ | |
3346 | if ((status & ATA_DRQ) == 0) { | |
1c848984 | 3347 | qc->err_mask |= AC_ERR_ATA_BUS; |
14be71f4 | 3348 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3349 | return; |
3350 | } | |
3351 | ||
3352 | ata_pio_sector(qc); | |
3353 | } | |
3354 | } | |
3355 | ||
3356 | static void ata_pio_error(struct ata_port *ap) | |
3357 | { | |
3358 | struct ata_queued_cmd *qc; | |
a7dac447 JG |
3359 | |
3360 | printk(KERN_WARNING "ata%u: PIO error\n", ap->id); | |
1da177e4 LT |
3361 | |
3362 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3363 | assert(qc != NULL); | |
3364 | ||
1c848984 AL |
3365 | /* make sure qc->err_mask is available to |
3366 | * know what's wrong and recover | |
3367 | */ | |
3368 | assert(qc->err_mask); | |
3369 | ||
14be71f4 | 3370 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 3371 | |
a22e2eb0 | 3372 | ata_poll_qc_complete(qc); |
1da177e4 LT |
3373 | } |
3374 | ||
3375 | static void ata_pio_task(void *_data) | |
3376 | { | |
3377 | struct ata_port *ap = _data; | |
7fb6ec28 JG |
3378 | unsigned long timeout; |
3379 | int qc_completed; | |
3380 | ||
3381 | fsm_start: | |
3382 | timeout = 0; | |
3383 | qc_completed = 0; | |
1da177e4 | 3384 | |
14be71f4 AL |
3385 | switch (ap->hsm_task_state) { |
3386 | case HSM_ST_IDLE: | |
1da177e4 LT |
3387 | return; |
3388 | ||
14be71f4 | 3389 | case HSM_ST: |
1da177e4 LT |
3390 | ata_pio_block(ap); |
3391 | break; | |
3392 | ||
14be71f4 | 3393 | case HSM_ST_LAST: |
7fb6ec28 | 3394 | qc_completed = ata_pio_complete(ap); |
1da177e4 LT |
3395 | break; |
3396 | ||
14be71f4 AL |
3397 | case HSM_ST_POLL: |
3398 | case HSM_ST_LAST_POLL: | |
1da177e4 LT |
3399 | timeout = ata_pio_poll(ap); |
3400 | break; | |
3401 | ||
14be71f4 AL |
3402 | case HSM_ST_TMOUT: |
3403 | case HSM_ST_ERR: | |
1da177e4 LT |
3404 | ata_pio_error(ap); |
3405 | return; | |
3406 | } | |
3407 | ||
3408 | if (timeout) | |
7fb6ec28 JG |
3409 | queue_delayed_work(ata_wq, &ap->pio_task, timeout); |
3410 | else if (!qc_completed) | |
3411 | goto fsm_start; | |
1da177e4 LT |
3412 | } |
3413 | ||
1da177e4 LT |
3414 | /** |
3415 | * ata_qc_timeout - Handle timeout of queued command | |
3416 | * @qc: Command that timed out | |
3417 | * | |
3418 | * Some part of the kernel (currently, only the SCSI layer) | |
3419 | * has noticed that the active command on port @ap has not | |
3420 | * completed after a specified length of time. Handle this | |
3421 | * condition by disabling DMA (if necessary) and completing | |
3422 | * transactions, with error if necessary. | |
3423 | * | |
3424 | * This also handles the case of the "lost interrupt", where | |
3425 | * for some reason (possibly hardware bug, possibly driver bug) | |
3426 | * an interrupt was not delivered to the driver, even though the | |
3427 | * transaction completed successfully. | |
3428 | * | |
3429 | * LOCKING: | |
0cba632b | 3430 | * Inherited from SCSI layer (none, can sleep) |
1da177e4 LT |
3431 | */ |
3432 | ||
3433 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | |
3434 | { | |
3435 | struct ata_port *ap = qc->ap; | |
b8f6153e | 3436 | struct ata_host_set *host_set = ap->host_set; |
1da177e4 | 3437 | u8 host_stat = 0, drv_stat; |
b8f6153e | 3438 | unsigned long flags; |
1da177e4 LT |
3439 | |
3440 | DPRINTK("ENTER\n"); | |
3441 | ||
b8f6153e JG |
3442 | spin_lock_irqsave(&host_set->lock, flags); |
3443 | ||
1da177e4 LT |
3444 | /* hack alert! We cannot use the supplied completion |
3445 | * function from inside the ->eh_strategy_handler() thread. | |
3446 | * libata is the only user of ->eh_strategy_handler() in | |
3447 | * any kernel, so the default scsi_done() assumes it is | |
3448 | * not being called from the SCSI EH. | |
3449 | */ | |
3450 | qc->scsidone = scsi_finish_command; | |
3451 | ||
3452 | switch (qc->tf.protocol) { | |
3453 | ||
3454 | case ATA_PROT_DMA: | |
3455 | case ATA_PROT_ATAPI_DMA: | |
3456 | host_stat = ap->ops->bmdma_status(ap); | |
3457 | ||
3458 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3459 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
3460 | |
3461 | /* fall through */ | |
3462 | ||
3463 | default: | |
3464 | ata_altstatus(ap); | |
3465 | drv_stat = ata_chk_status(ap); | |
3466 | ||
3467 | /* ack bmdma irq events */ | |
3468 | ap->ops->irq_clear(ap); | |
3469 | ||
3470 | printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n", | |
3471 | ap->id, qc->tf.command, drv_stat, host_stat); | |
3472 | ||
3473 | /* complete taskfile transaction */ | |
a22e2eb0 AL |
3474 | qc->err_mask |= ac_err_mask(drv_stat); |
3475 | ata_qc_complete(qc); | |
1da177e4 LT |
3476 | break; |
3477 | } | |
b8f6153e JG |
3478 | |
3479 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3480 | ||
1da177e4 LT |
3481 | DPRINTK("EXIT\n"); |
3482 | } | |
3483 | ||
3484 | /** | |
3485 | * ata_eng_timeout - Handle timeout of queued command | |
3486 | * @ap: Port on which timed-out command is active | |
3487 | * | |
3488 | * Some part of the kernel (currently, only the SCSI layer) | |
3489 | * has noticed that the active command on port @ap has not | |
3490 | * completed after a specified length of time. Handle this | |
3491 | * condition by disabling DMA (if necessary) and completing | |
3492 | * transactions, with error if necessary. | |
3493 | * | |
3494 | * This also handles the case of the "lost interrupt", where | |
3495 | * for some reason (possibly hardware bug, possibly driver bug) | |
3496 | * an interrupt was not delivered to the driver, even though the | |
3497 | * transaction completed successfully. | |
3498 | * | |
3499 | * LOCKING: | |
3500 | * Inherited from SCSI layer (none, can sleep) | |
3501 | */ | |
3502 | ||
3503 | void ata_eng_timeout(struct ata_port *ap) | |
3504 | { | |
3505 | struct ata_queued_cmd *qc; | |
3506 | ||
3507 | DPRINTK("ENTER\n"); | |
3508 | ||
3509 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
e12669e7 JG |
3510 | if (qc) |
3511 | ata_qc_timeout(qc); | |
3512 | else { | |
1da177e4 LT |
3513 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", |
3514 | ap->id); | |
3515 | goto out; | |
3516 | } | |
3517 | ||
1da177e4 LT |
3518 | out: |
3519 | DPRINTK("EXIT\n"); | |
3520 | } | |
3521 | ||
3522 | /** | |
3523 | * ata_qc_new - Request an available ATA command, for queueing | |
3524 | * @ap: Port associated with device @dev | |
3525 | * @dev: Device from whom we request an available command structure | |
3526 | * | |
3527 | * LOCKING: | |
0cba632b | 3528 | * None. |
1da177e4 LT |
3529 | */ |
3530 | ||
3531 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
3532 | { | |
3533 | struct ata_queued_cmd *qc = NULL; | |
3534 | unsigned int i; | |
3535 | ||
3536 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
3537 | if (!test_and_set_bit(i, &ap->qactive)) { | |
3538 | qc = ata_qc_from_tag(ap, i); | |
3539 | break; | |
3540 | } | |
3541 | ||
3542 | if (qc) | |
3543 | qc->tag = i; | |
3544 | ||
3545 | return qc; | |
3546 | } | |
3547 | ||
3548 | /** | |
3549 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
3550 | * @ap: Port associated with device @dev | |
3551 | * @dev: Device from whom we request an available command structure | |
3552 | * | |
3553 | * LOCKING: | |
0cba632b | 3554 | * None. |
1da177e4 LT |
3555 | */ |
3556 | ||
3557 | struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | |
3558 | struct ata_device *dev) | |
3559 | { | |
3560 | struct ata_queued_cmd *qc; | |
3561 | ||
3562 | qc = ata_qc_new(ap); | |
3563 | if (qc) { | |
1da177e4 LT |
3564 | qc->scsicmd = NULL; |
3565 | qc->ap = ap; | |
3566 | qc->dev = dev; | |
1da177e4 | 3567 | |
2c13b7ce | 3568 | ata_qc_reinit(qc); |
1da177e4 LT |
3569 | } |
3570 | ||
3571 | return qc; | |
3572 | } | |
3573 | ||
1da177e4 LT |
3574 | static void __ata_qc_complete(struct ata_queued_cmd *qc) |
3575 | { | |
3576 | struct ata_port *ap = qc->ap; | |
b5632303 | 3577 | unsigned int tag; |
1da177e4 LT |
3578 | |
3579 | qc->flags = 0; | |
3580 | tag = qc->tag; | |
3581 | if (likely(ata_tag_valid(tag))) { | |
3582 | if (tag == ap->active_tag) | |
3583 | ap->active_tag = ATA_TAG_POISON; | |
3584 | qc->tag = ATA_TAG_POISON; | |
1da177e4 | 3585 | clear_bit(tag, &ap->qactive); |
b5632303 | 3586 | } |
1da177e4 LT |
3587 | } |
3588 | ||
3589 | /** | |
3590 | * ata_qc_free - free unused ata_queued_cmd | |
3591 | * @qc: Command to complete | |
3592 | * | |
3593 | * Designed to free unused ata_queued_cmd object | |
3594 | * in case something prevents using it. | |
3595 | * | |
3596 | * LOCKING: | |
0cba632b | 3597 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3598 | */ |
3599 | void ata_qc_free(struct ata_queued_cmd *qc) | |
3600 | { | |
3601 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
1da177e4 LT |
3602 | |
3603 | __ata_qc_complete(qc); | |
3604 | } | |
3605 | ||
3606 | /** | |
3607 | * ata_qc_complete - Complete an active ATA command | |
3608 | * @qc: Command to complete | |
8e8b77dd | 3609 | * @err_mask: ATA Status register contents |
0cba632b JG |
3610 | * |
3611 | * Indicate to the mid and upper layers that an ATA | |
3612 | * command has completed, with either an ok or not-ok status. | |
1da177e4 LT |
3613 | * |
3614 | * LOCKING: | |
0cba632b | 3615 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3616 | */ |
3617 | ||
a22e2eb0 | 3618 | void ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 LT |
3619 | { |
3620 | int rc; | |
3621 | ||
3622 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3623 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3624 | ||
3625 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3626 | ata_sg_clean(qc); | |
3627 | ||
3f3791d3 AL |
3628 | /* atapi: mark qc as inactive to prevent the interrupt handler |
3629 | * from completing the command twice later, before the error handler | |
3630 | * is called. (when rc != 0 and atapi request sense is needed) | |
3631 | */ | |
3632 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
3633 | ||
1da177e4 | 3634 | /* call completion callback */ |
a22e2eb0 | 3635 | rc = qc->complete_fn(qc); |
1da177e4 LT |
3636 | |
3637 | /* if callback indicates not to complete command (non-zero), | |
3638 | * return immediately | |
3639 | */ | |
3640 | if (rc != 0) | |
3641 | return; | |
3642 | ||
3643 | __ata_qc_complete(qc); | |
3644 | ||
3645 | VPRINTK("EXIT\n"); | |
3646 | } | |
3647 | ||
3648 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
3649 | { | |
3650 | struct ata_port *ap = qc->ap; | |
3651 | ||
3652 | switch (qc->tf.protocol) { | |
3653 | case ATA_PROT_DMA: | |
3654 | case ATA_PROT_ATAPI_DMA: | |
3655 | return 1; | |
3656 | ||
3657 | case ATA_PROT_ATAPI: | |
3658 | case ATA_PROT_PIO: | |
3659 | case ATA_PROT_PIO_MULT: | |
3660 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
3661 | return 1; | |
3662 | ||
3663 | /* fall through */ | |
3664 | ||
3665 | default: | |
3666 | return 0; | |
3667 | } | |
3668 | ||
3669 | /* never reached */ | |
3670 | } | |
3671 | ||
3672 | /** | |
3673 | * ata_qc_issue - issue taskfile to device | |
3674 | * @qc: command to issue to device | |
3675 | * | |
3676 | * Prepare an ATA command to submission to device. | |
3677 | * This includes mapping the data into a DMA-able | |
3678 | * area, filling in the S/G table, and finally | |
3679 | * writing the taskfile to hardware, starting the command. | |
3680 | * | |
3681 | * LOCKING: | |
3682 | * spin_lock_irqsave(host_set lock) | |
3683 | * | |
3684 | * RETURNS: | |
3685 | * Zero on success, negative on error. | |
3686 | */ | |
3687 | ||
3688 | int ata_qc_issue(struct ata_queued_cmd *qc) | |
3689 | { | |
3690 | struct ata_port *ap = qc->ap; | |
3691 | ||
3692 | if (ata_should_dma_map(qc)) { | |
3693 | if (qc->flags & ATA_QCFLAG_SG) { | |
3694 | if (ata_sg_setup(qc)) | |
3695 | goto err_out; | |
3696 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { | |
3697 | if (ata_sg_setup_one(qc)) | |
3698 | goto err_out; | |
3699 | } | |
3700 | } else { | |
3701 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
3702 | } | |
3703 | ||
3704 | ap->ops->qc_prep(qc); | |
3705 | ||
3706 | qc->ap->active_tag = qc->tag; | |
3707 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
3708 | ||
3709 | return ap->ops->qc_issue(qc); | |
3710 | ||
3711 | err_out: | |
3712 | return -1; | |
3713 | } | |
3714 | ||
0baab86b | 3715 | |
1da177e4 LT |
3716 | /** |
3717 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
3718 | * @qc: command to issue to device | |
3719 | * | |
3720 | * Using various libata functions and hooks, this function | |
3721 | * starts an ATA command. ATA commands are grouped into | |
3722 | * classes called "protocols", and issuing each type of protocol | |
3723 | * is slightly different. | |
3724 | * | |
0baab86b EF |
3725 | * May be used as the qc_issue() entry in ata_port_operations. |
3726 | * | |
1da177e4 LT |
3727 | * LOCKING: |
3728 | * spin_lock_irqsave(host_set lock) | |
3729 | * | |
3730 | * RETURNS: | |
3731 | * Zero on success, negative on error. | |
3732 | */ | |
3733 | ||
3734 | int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |
3735 | { | |
3736 | struct ata_port *ap = qc->ap; | |
3737 | ||
3738 | ata_dev_select(ap, qc->dev->devno, 1, 0); | |
3739 | ||
3740 | switch (qc->tf.protocol) { | |
3741 | case ATA_PROT_NODATA: | |
e5338254 | 3742 | ata_tf_to_host(ap, &qc->tf); |
1da177e4 LT |
3743 | break; |
3744 | ||
3745 | case ATA_PROT_DMA: | |
3746 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
3747 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3748 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3749 | break; | |
3750 | ||
3751 | case ATA_PROT_PIO: /* load tf registers, initiate polling pio */ | |
3752 | ata_qc_set_polling(qc); | |
e5338254 | 3753 | ata_tf_to_host(ap, &qc->tf); |
14be71f4 | 3754 | ap->hsm_task_state = HSM_ST; |
1da177e4 LT |
3755 | queue_work(ata_wq, &ap->pio_task); |
3756 | break; | |
3757 | ||
3758 | case ATA_PROT_ATAPI: | |
3759 | ata_qc_set_polling(qc); | |
e5338254 | 3760 | ata_tf_to_host(ap, &qc->tf); |
1da177e4 LT |
3761 | queue_work(ata_wq, &ap->packet_task); |
3762 | break; | |
3763 | ||
3764 | case ATA_PROT_ATAPI_NODATA: | |
c1389503 | 3765 | ap->flags |= ATA_FLAG_NOINTR; |
e5338254 | 3766 | ata_tf_to_host(ap, &qc->tf); |
1da177e4 LT |
3767 | queue_work(ata_wq, &ap->packet_task); |
3768 | break; | |
3769 | ||
3770 | case ATA_PROT_ATAPI_DMA: | |
c1389503 | 3771 | ap->flags |= ATA_FLAG_NOINTR; |
1da177e4 LT |
3772 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
3773 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3774 | queue_work(ata_wq, &ap->packet_task); | |
3775 | break; | |
3776 | ||
3777 | default: | |
3778 | WARN_ON(1); | |
3779 | return -1; | |
3780 | } | |
3781 | ||
3782 | return 0; | |
3783 | } | |
3784 | ||
3785 | /** | |
0baab86b | 3786 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction |
1da177e4 LT |
3787 | * @qc: Info associated with this ATA transaction. |
3788 | * | |
3789 | * LOCKING: | |
3790 | * spin_lock_irqsave(host_set lock) | |
3791 | */ | |
3792 | ||
3793 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |
3794 | { | |
3795 | struct ata_port *ap = qc->ap; | |
3796 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3797 | u8 dmactl; | |
3798 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3799 | ||
3800 | /* load PRD table addr. */ | |
3801 | mb(); /* make sure PRD table writes are visible to controller */ | |
3802 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); | |
3803 | ||
3804 | /* specify data direction, triple-check start bit is clear */ | |
3805 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3806 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3807 | if (!rw) | |
3808 | dmactl |= ATA_DMA_WR; | |
3809 | writeb(dmactl, mmio + ATA_DMA_CMD); | |
3810 | ||
3811 | /* issue r/w command */ | |
3812 | ap->ops->exec_command(ap, &qc->tf); | |
3813 | } | |
3814 | ||
3815 | /** | |
b73fc89f | 3816 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction |
1da177e4 LT |
3817 | * @qc: Info associated with this ATA transaction. |
3818 | * | |
3819 | * LOCKING: | |
3820 | * spin_lock_irqsave(host_set lock) | |
3821 | */ | |
3822 | ||
3823 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) | |
3824 | { | |
3825 | struct ata_port *ap = qc->ap; | |
3826 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3827 | u8 dmactl; | |
3828 | ||
3829 | /* start host DMA transaction */ | |
3830 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3831 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | |
3832 | ||
3833 | /* Strictly, one may wish to issue a readb() here, to | |
3834 | * flush the mmio write. However, control also passes | |
3835 | * to the hardware at this point, and it will interrupt | |
3836 | * us when we are to resume control. So, in effect, | |
3837 | * we don't care when the mmio write flushes. | |
3838 | * Further, a read of the DMA status register _immediately_ | |
3839 | * following the write may not be what certain flaky hardware | |
3840 | * is expected, so I think it is best to not add a readb() | |
3841 | * without first all the MMIO ATA cards/mobos. | |
3842 | * Or maybe I'm just being paranoid. | |
3843 | */ | |
3844 | } | |
3845 | ||
3846 | /** | |
3847 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) | |
3848 | * @qc: Info associated with this ATA transaction. | |
3849 | * | |
3850 | * LOCKING: | |
3851 | * spin_lock_irqsave(host_set lock) | |
3852 | */ | |
3853 | ||
3854 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) | |
3855 | { | |
3856 | struct ata_port *ap = qc->ap; | |
3857 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3858 | u8 dmactl; | |
3859 | ||
3860 | /* load PRD table addr. */ | |
3861 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); | |
3862 | ||
3863 | /* specify data direction, triple-check start bit is clear */ | |
3864 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3865 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3866 | if (!rw) | |
3867 | dmactl |= ATA_DMA_WR; | |
3868 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3869 | ||
3870 | /* issue r/w command */ | |
3871 | ap->ops->exec_command(ap, &qc->tf); | |
3872 | } | |
3873 | ||
3874 | /** | |
3875 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) | |
3876 | * @qc: Info associated with this ATA transaction. | |
3877 | * | |
3878 | * LOCKING: | |
3879 | * spin_lock_irqsave(host_set lock) | |
3880 | */ | |
3881 | ||
3882 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) | |
3883 | { | |
3884 | struct ata_port *ap = qc->ap; | |
3885 | u8 dmactl; | |
3886 | ||
3887 | /* start host DMA transaction */ | |
3888 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3889 | outb(dmactl | ATA_DMA_START, | |
3890 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3891 | } | |
3892 | ||
0baab86b EF |
3893 | |
3894 | /** | |
3895 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
3896 | * @qc: Info associated with this ATA transaction. | |
3897 | * | |
3898 | * Writes the ATA_DMA_START flag to the DMA command register. | |
3899 | * | |
3900 | * May be used as the bmdma_start() entry in ata_port_operations. | |
3901 | * | |
3902 | * LOCKING: | |
3903 | * spin_lock_irqsave(host_set lock) | |
3904 | */ | |
1da177e4 LT |
3905 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
3906 | { | |
3907 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3908 | ata_bmdma_start_mmio(qc); | |
3909 | else | |
3910 | ata_bmdma_start_pio(qc); | |
3911 | } | |
3912 | ||
0baab86b EF |
3913 | |
3914 | /** | |
3915 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction | |
3916 | * @qc: Info associated with this ATA transaction. | |
3917 | * | |
3918 | * Writes address of PRD table to device's PRD Table Address | |
3919 | * register, sets the DMA control register, and calls | |
3920 | * ops->exec_command() to start the transfer. | |
3921 | * | |
3922 | * May be used as the bmdma_setup() entry in ata_port_operations. | |
3923 | * | |
3924 | * LOCKING: | |
3925 | * spin_lock_irqsave(host_set lock) | |
3926 | */ | |
1da177e4 LT |
3927 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
3928 | { | |
3929 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3930 | ata_bmdma_setup_mmio(qc); | |
3931 | else | |
3932 | ata_bmdma_setup_pio(qc); | |
3933 | } | |
3934 | ||
0baab86b EF |
3935 | |
3936 | /** | |
3937 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | |
decc6d0b | 3938 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3939 | * |
3940 | * Clear interrupt and error flags in DMA status register. | |
3941 | * | |
3942 | * May be used as the irq_clear() entry in ata_port_operations. | |
3943 | * | |
3944 | * LOCKING: | |
3945 | * spin_lock_irqsave(host_set lock) | |
3946 | */ | |
3947 | ||
1da177e4 LT |
3948 | void ata_bmdma_irq_clear(struct ata_port *ap) |
3949 | { | |
3950 | if (ap->flags & ATA_FLAG_MMIO) { | |
3951 | void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; | |
3952 | writeb(readb(mmio), mmio); | |
3953 | } else { | |
3954 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; | |
3955 | outb(inb(addr), addr); | |
3956 | } | |
3957 | ||
3958 | } | |
3959 | ||
0baab86b EF |
3960 | |
3961 | /** | |
3962 | * ata_bmdma_status - Read PCI IDE BMDMA status | |
decc6d0b | 3963 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3964 | * |
3965 | * Read and return BMDMA status register. | |
3966 | * | |
3967 | * May be used as the bmdma_status() entry in ata_port_operations. | |
3968 | * | |
3969 | * LOCKING: | |
3970 | * spin_lock_irqsave(host_set lock) | |
3971 | */ | |
3972 | ||
1da177e4 LT |
3973 | u8 ata_bmdma_status(struct ata_port *ap) |
3974 | { | |
3975 | u8 host_stat; | |
3976 | if (ap->flags & ATA_FLAG_MMIO) { | |
3977 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3978 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
3979 | } else | |
ee500aab | 3980 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
1da177e4 LT |
3981 | return host_stat; |
3982 | } | |
3983 | ||
0baab86b EF |
3984 | |
3985 | /** | |
3986 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | |
b73fc89f | 3987 | * @qc: Command we are ending DMA for |
0baab86b EF |
3988 | * |
3989 | * Clears the ATA_DMA_START flag in the dma control register | |
3990 | * | |
3991 | * May be used as the bmdma_stop() entry in ata_port_operations. | |
3992 | * | |
3993 | * LOCKING: | |
3994 | * spin_lock_irqsave(host_set lock) | |
3995 | */ | |
3996 | ||
b73fc89f | 3997 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
1da177e4 | 3998 | { |
b73fc89f | 3999 | struct ata_port *ap = qc->ap; |
1da177e4 LT |
4000 | if (ap->flags & ATA_FLAG_MMIO) { |
4001 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
4002 | ||
4003 | /* clear start/stop bit */ | |
4004 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, | |
4005 | mmio + ATA_DMA_CMD); | |
4006 | } else { | |
4007 | /* clear start/stop bit */ | |
4008 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, | |
4009 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
4010 | } | |
4011 | ||
4012 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | |
4013 | ata_altstatus(ap); /* dummy read */ | |
4014 | } | |
4015 | ||
4016 | /** | |
4017 | * ata_host_intr - Handle host interrupt for given (port, task) | |
4018 | * @ap: Port on which interrupt arrived (possibly...) | |
4019 | * @qc: Taskfile currently active in engine | |
4020 | * | |
4021 | * Handle host interrupt for given queued command. Currently, | |
4022 | * only DMA interrupts are handled. All other commands are | |
4023 | * handled via polling with interrupts disabled (nIEN bit). | |
4024 | * | |
4025 | * LOCKING: | |
4026 | * spin_lock_irqsave(host_set lock) | |
4027 | * | |
4028 | * RETURNS: | |
4029 | * One if interrupt was handled, zero if not (shared irq). | |
4030 | */ | |
4031 | ||
4032 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
4033 | struct ata_queued_cmd *qc) | |
4034 | { | |
4035 | u8 status, host_stat; | |
4036 | ||
4037 | switch (qc->tf.protocol) { | |
4038 | ||
4039 | case ATA_PROT_DMA: | |
4040 | case ATA_PROT_ATAPI_DMA: | |
4041 | case ATA_PROT_ATAPI: | |
4042 | /* check status of DMA engine */ | |
4043 | host_stat = ap->ops->bmdma_status(ap); | |
4044 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
4045 | ||
4046 | /* if it's not our irq... */ | |
4047 | if (!(host_stat & ATA_DMA_INTR)) | |
4048 | goto idle_irq; | |
4049 | ||
4050 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 4051 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
4052 | |
4053 | /* fall through */ | |
4054 | ||
4055 | case ATA_PROT_ATAPI_NODATA: | |
4056 | case ATA_PROT_NODATA: | |
4057 | /* check altstatus */ | |
4058 | status = ata_altstatus(ap); | |
4059 | if (status & ATA_BUSY) | |
4060 | goto idle_irq; | |
4061 | ||
4062 | /* check main status, clearing INTRQ */ | |
4063 | status = ata_chk_status(ap); | |
4064 | if (unlikely(status & ATA_BUSY)) | |
4065 | goto idle_irq; | |
4066 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | |
4067 | ap->id, qc->tf.protocol, status); | |
4068 | ||
4069 | /* ack bmdma irq events */ | |
4070 | ap->ops->irq_clear(ap); | |
4071 | ||
4072 | /* complete taskfile transaction */ | |
a22e2eb0 AL |
4073 | qc->err_mask |= ac_err_mask(status); |
4074 | ata_qc_complete(qc); | |
1da177e4 LT |
4075 | break; |
4076 | ||
4077 | default: | |
4078 | goto idle_irq; | |
4079 | } | |
4080 | ||
4081 | return 1; /* irq handled */ | |
4082 | ||
4083 | idle_irq: | |
4084 | ap->stats.idle_irq++; | |
4085 | ||
4086 | #ifdef ATA_IRQ_TRAP | |
4087 | if ((ap->stats.idle_irq % 1000) == 0) { | |
4088 | handled = 1; | |
4089 | ata_irq_ack(ap, 0); /* debug trap */ | |
4090 | printk(KERN_WARNING "ata%d: irq trap\n", ap->id); | |
4091 | } | |
4092 | #endif | |
4093 | return 0; /* irq not handled */ | |
4094 | } | |
4095 | ||
4096 | /** | |
4097 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
4098 | * @irq: irq line (unused) |
4099 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
4100 | * @regs: unused |
4101 | * | |
0cba632b JG |
4102 | * Default interrupt handler for PCI IDE devices. Calls |
4103 | * ata_host_intr() for each port that is not disabled. | |
4104 | * | |
1da177e4 | 4105 | * LOCKING: |
0cba632b | 4106 | * Obtains host_set lock during operation. |
1da177e4 LT |
4107 | * |
4108 | * RETURNS: | |
0cba632b | 4109 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
4110 | */ |
4111 | ||
4112 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
4113 | { | |
4114 | struct ata_host_set *host_set = dev_instance; | |
4115 | unsigned int i; | |
4116 | unsigned int handled = 0; | |
4117 | unsigned long flags; | |
4118 | ||
4119 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
4120 | spin_lock_irqsave(&host_set->lock, flags); | |
4121 | ||
4122 | for (i = 0; i < host_set->n_ports; i++) { | |
4123 | struct ata_port *ap; | |
4124 | ||
4125 | ap = host_set->ports[i]; | |
c1389503 TH |
4126 | if (ap && |
4127 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | |
1da177e4 LT |
4128 | struct ata_queued_cmd *qc; |
4129 | ||
4130 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
21b1ed74 AL |
4131 | if (qc && (!(qc->tf.ctl & ATA_NIEN)) && |
4132 | (qc->flags & ATA_QCFLAG_ACTIVE)) | |
1da177e4 LT |
4133 | handled |= ata_host_intr(ap, qc); |
4134 | } | |
4135 | } | |
4136 | ||
4137 | spin_unlock_irqrestore(&host_set->lock, flags); | |
4138 | ||
4139 | return IRQ_RETVAL(handled); | |
4140 | } | |
4141 | ||
4142 | /** | |
4143 | * atapi_packet_task - Write CDB bytes to hardware | |
4144 | * @_data: Port to which ATAPI device is attached. | |
4145 | * | |
4146 | * When device has indicated its readiness to accept | |
4147 | * a CDB, this function is called. Send the CDB. | |
4148 | * If DMA is to be performed, exit immediately. | |
4149 | * Otherwise, we are in polling mode, so poll | |
4150 | * status under operation succeeds or fails. | |
4151 | * | |
4152 | * LOCKING: | |
4153 | * Kernel thread context (may sleep) | |
4154 | */ | |
4155 | ||
4156 | static void atapi_packet_task(void *_data) | |
4157 | { | |
4158 | struct ata_port *ap = _data; | |
4159 | struct ata_queued_cmd *qc; | |
4160 | u8 status; | |
4161 | ||
4162 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
4163 | assert(qc != NULL); | |
4164 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
4165 | ||
4166 | /* sleep-wait for BSY to clear */ | |
4167 | DPRINTK("busy wait\n"); | |
d8fe452b AL |
4168 | if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) { |
4169 | qc->err_mask |= AC_ERR_ATA_BUS; | |
4170 | goto err_out; | |
4171 | } | |
1da177e4 LT |
4172 | |
4173 | /* make sure DRQ is set */ | |
4174 | status = ata_chk_status(ap); | |
d8fe452b AL |
4175 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) { |
4176 | qc->err_mask |= AC_ERR_ATA_BUS; | |
1da177e4 | 4177 | goto err_out; |
d8fe452b | 4178 | } |
1da177e4 LT |
4179 | |
4180 | /* send SCSI cdb */ | |
4181 | DPRINTK("send cdb\n"); | |
4182 | assert(ap->cdb_len >= 12); | |
1da177e4 | 4183 | |
c1389503 TH |
4184 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || |
4185 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | |
4186 | unsigned long flags; | |
1da177e4 | 4187 | |
c1389503 TH |
4188 | /* Once we're done issuing command and kicking bmdma, |
4189 | * irq handler takes over. To not lose irq, we need | |
4190 | * to clear NOINTR flag before sending cdb, but | |
4191 | * interrupt handler shouldn't be invoked before we're | |
4192 | * finished. Hence, the following locking. | |
4193 | */ | |
4194 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
4195 | ap->flags &= ~ATA_FLAG_NOINTR; | |
4196 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
4197 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | |
4198 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
4199 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
4200 | } else { | |
4201 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
1da177e4 | 4202 | |
c1389503 | 4203 | /* PIO commands are handled by polling */ |
14be71f4 | 4204 | ap->hsm_task_state = HSM_ST; |
1da177e4 LT |
4205 | queue_work(ata_wq, &ap->pio_task); |
4206 | } | |
4207 | ||
4208 | return; | |
4209 | ||
4210 | err_out: | |
a22e2eb0 | 4211 | ata_poll_qc_complete(qc); |
1da177e4 LT |
4212 | } |
4213 | ||
0baab86b EF |
4214 | |
4215 | /** | |
4216 | * ata_port_start - Set port up for dma. | |
4217 | * @ap: Port to initialize | |
4218 | * | |
4219 | * Called just after data structures for each port are | |
4220 | * initialized. Allocates space for PRD table. | |
4221 | * | |
4222 | * May be used as the port_start() entry in ata_port_operations. | |
4223 | * | |
4224 | * LOCKING: | |
6f0ef4fa | 4225 | * Inherited from caller. |
0baab86b EF |
4226 | */ |
4227 | ||
9b847548 JA |
4228 | /* |
4229 | * Execute a 'simple' command, that only consists of the opcode 'cmd' itself, | |
4230 | * without filling any other registers | |
4231 | */ | |
4232 | static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev, | |
4233 | u8 cmd) | |
4234 | { | |
4235 | struct ata_taskfile tf; | |
4236 | int err; | |
4237 | ||
4238 | ata_tf_init(ap, &tf, dev->devno); | |
4239 | ||
4240 | tf.command = cmd; | |
4241 | tf.flags |= ATA_TFLAG_DEVICE; | |
4242 | tf.protocol = ATA_PROT_NODATA; | |
4243 | ||
4244 | err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0); | |
4245 | if (err) | |
4246 | printk(KERN_ERR "%s: ata command failed: %d\n", | |
4247 | __FUNCTION__, err); | |
4248 | ||
4249 | return err; | |
4250 | } | |
4251 | ||
4252 | static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev) | |
4253 | { | |
4254 | u8 cmd; | |
4255 | ||
4256 | if (!ata_try_flush_cache(dev)) | |
4257 | return 0; | |
4258 | ||
4259 | if (ata_id_has_flush_ext(dev->id)) | |
4260 | cmd = ATA_CMD_FLUSH_EXT; | |
4261 | else | |
4262 | cmd = ATA_CMD_FLUSH; | |
4263 | ||
4264 | return ata_do_simple_cmd(ap, dev, cmd); | |
4265 | } | |
4266 | ||
4267 | static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev) | |
4268 | { | |
4269 | return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1); | |
4270 | } | |
4271 | ||
4272 | static int ata_start_drive(struct ata_port *ap, struct ata_device *dev) | |
4273 | { | |
4274 | return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE); | |
4275 | } | |
4276 | ||
4277 | /** | |
4278 | * ata_device_resume - wakeup a previously suspended devices | |
4279 | * | |
4280 | * Kick the drive back into action, by sending it an idle immediate | |
4281 | * command and making sure its transfer mode matches between drive | |
4282 | * and host. | |
4283 | * | |
4284 | */ | |
4285 | int ata_device_resume(struct ata_port *ap, struct ata_device *dev) | |
4286 | { | |
4287 | if (ap->flags & ATA_FLAG_SUSPENDED) { | |
4288 | ap->flags &= ~ATA_FLAG_SUSPENDED; | |
4289 | ata_set_mode(ap); | |
4290 | } | |
4291 | if (!ata_dev_present(dev)) | |
4292 | return 0; | |
4293 | if (dev->class == ATA_DEV_ATA) | |
4294 | ata_start_drive(ap, dev); | |
4295 | ||
4296 | return 0; | |
4297 | } | |
4298 | ||
4299 | /** | |
4300 | * ata_device_suspend - prepare a device for suspend | |
4301 | * | |
4302 | * Flush the cache on the drive, if appropriate, then issue a | |
4303 | * standbynow command. | |
4304 | * | |
4305 | */ | |
4306 | int ata_device_suspend(struct ata_port *ap, struct ata_device *dev) | |
4307 | { | |
4308 | if (!ata_dev_present(dev)) | |
4309 | return 0; | |
4310 | if (dev->class == ATA_DEV_ATA) | |
4311 | ata_flush_cache(ap, dev); | |
4312 | ||
4313 | ata_standby_drive(ap, dev); | |
4314 | ap->flags |= ATA_FLAG_SUSPENDED; | |
4315 | return 0; | |
4316 | } | |
4317 | ||
1da177e4 LT |
4318 | int ata_port_start (struct ata_port *ap) |
4319 | { | |
4320 | struct device *dev = ap->host_set->dev; | |
6037d6bb | 4321 | int rc; |
1da177e4 LT |
4322 | |
4323 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
4324 | if (!ap->prd) | |
4325 | return -ENOMEM; | |
4326 | ||
6037d6bb JG |
4327 | rc = ata_pad_alloc(ap, dev); |
4328 | if (rc) { | |
cedc9a47 | 4329 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 4330 | return rc; |
cedc9a47 JG |
4331 | } |
4332 | ||
1da177e4 LT |
4333 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
4334 | ||
4335 | return 0; | |
4336 | } | |
4337 | ||
0baab86b EF |
4338 | |
4339 | /** | |
4340 | * ata_port_stop - Undo ata_port_start() | |
4341 | * @ap: Port to shut down | |
4342 | * | |
4343 | * Frees the PRD table. | |
4344 | * | |
4345 | * May be used as the port_stop() entry in ata_port_operations. | |
4346 | * | |
4347 | * LOCKING: | |
6f0ef4fa | 4348 | * Inherited from caller. |
0baab86b EF |
4349 | */ |
4350 | ||
1da177e4 LT |
4351 | void ata_port_stop (struct ata_port *ap) |
4352 | { | |
4353 | struct device *dev = ap->host_set->dev; | |
4354 | ||
4355 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 4356 | ata_pad_free(ap, dev); |
1da177e4 LT |
4357 | } |
4358 | ||
aa8f0dc6 JG |
4359 | void ata_host_stop (struct ata_host_set *host_set) |
4360 | { | |
4361 | if (host_set->mmio_base) | |
4362 | iounmap(host_set->mmio_base); | |
4363 | } | |
4364 | ||
4365 | ||
1da177e4 LT |
4366 | /** |
4367 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
4368 | * @ap: Port to unregister | |
4369 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
4370 | * | |
4371 | * LOCKING: | |
6f0ef4fa | 4372 | * Inherited from caller. |
1da177e4 LT |
4373 | */ |
4374 | ||
4375 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
4376 | { | |
4377 | struct Scsi_Host *sh = ap->host; | |
4378 | ||
4379 | DPRINTK("ENTER\n"); | |
4380 | ||
4381 | if (do_unregister) | |
4382 | scsi_remove_host(sh); | |
4383 | ||
4384 | ap->ops->port_stop(ap); | |
4385 | } | |
4386 | ||
4387 | /** | |
4388 | * ata_host_init - Initialize an ata_port structure | |
4389 | * @ap: Structure to initialize | |
4390 | * @host: associated SCSI mid-layer structure | |
4391 | * @host_set: Collection of hosts to which @ap belongs | |
4392 | * @ent: Probe information provided by low-level driver | |
4393 | * @port_no: Port number associated with this ata_port | |
4394 | * | |
0cba632b JG |
4395 | * Initialize a new ata_port structure, and its associated |
4396 | * scsi_host. | |
4397 | * | |
1da177e4 | 4398 | * LOCKING: |
0cba632b | 4399 | * Inherited from caller. |
1da177e4 LT |
4400 | */ |
4401 | ||
4402 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
4403 | struct ata_host_set *host_set, | |
057ace5e | 4404 | const struct ata_probe_ent *ent, unsigned int port_no) |
1da177e4 LT |
4405 | { |
4406 | unsigned int i; | |
4407 | ||
4408 | host->max_id = 16; | |
4409 | host->max_lun = 1; | |
4410 | host->max_channel = 1; | |
4411 | host->unique_id = ata_unique_id++; | |
4412 | host->max_cmd_len = 12; | |
12413197 | 4413 | |
1da177e4 LT |
4414 | ap->flags = ATA_FLAG_PORT_DISABLED; |
4415 | ap->id = host->unique_id; | |
4416 | ap->host = host; | |
4417 | ap->ctl = ATA_DEVCTL_OBS; | |
4418 | ap->host_set = host_set; | |
4419 | ap->port_no = port_no; | |
4420 | ap->hard_port_no = | |
4421 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
4422 | ap->pio_mask = ent->pio_mask; | |
4423 | ap->mwdma_mask = ent->mwdma_mask; | |
4424 | ap->udma_mask = ent->udma_mask; | |
4425 | ap->flags |= ent->host_flags; | |
4426 | ap->ops = ent->port_ops; | |
4427 | ap->cbl = ATA_CBL_NONE; | |
4428 | ap->active_tag = ATA_TAG_POISON; | |
4429 | ap->last_ctl = 0xFF; | |
4430 | ||
4431 | INIT_WORK(&ap->packet_task, atapi_packet_task, ap); | |
4432 | INIT_WORK(&ap->pio_task, ata_pio_task, ap); | |
4433 | ||
4434 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
4435 | ap->device[i].devno = i; | |
4436 | ||
4437 | #ifdef ATA_IRQ_TRAP | |
4438 | ap->stats.unhandled_irq = 1; | |
4439 | ap->stats.idle_irq = 1; | |
4440 | #endif | |
4441 | ||
4442 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
4443 | } | |
4444 | ||
4445 | /** | |
4446 | * ata_host_add - Attach low-level ATA driver to system | |
4447 | * @ent: Information provided by low-level driver | |
4448 | * @host_set: Collections of ports to which we add | |
4449 | * @port_no: Port number associated with this host | |
4450 | * | |
0cba632b JG |
4451 | * Attach low-level ATA driver to system. |
4452 | * | |
1da177e4 | 4453 | * LOCKING: |
0cba632b | 4454 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4455 | * |
4456 | * RETURNS: | |
0cba632b | 4457 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
4458 | */ |
4459 | ||
057ace5e | 4460 | static struct ata_port * ata_host_add(const struct ata_probe_ent *ent, |
1da177e4 LT |
4461 | struct ata_host_set *host_set, |
4462 | unsigned int port_no) | |
4463 | { | |
4464 | struct Scsi_Host *host; | |
4465 | struct ata_port *ap; | |
4466 | int rc; | |
4467 | ||
4468 | DPRINTK("ENTER\n"); | |
4469 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
4470 | if (!host) | |
4471 | return NULL; | |
4472 | ||
4473 | ap = (struct ata_port *) &host->hostdata[0]; | |
4474 | ||
4475 | ata_host_init(ap, host, host_set, ent, port_no); | |
4476 | ||
4477 | rc = ap->ops->port_start(ap); | |
4478 | if (rc) | |
4479 | goto err_out; | |
4480 | ||
4481 | return ap; | |
4482 | ||
4483 | err_out: | |
4484 | scsi_host_put(host); | |
4485 | return NULL; | |
4486 | } | |
4487 | ||
4488 | /** | |
0cba632b JG |
4489 | * ata_device_add - Register hardware device with ATA and SCSI layers |
4490 | * @ent: Probe information describing hardware device to be registered | |
4491 | * | |
4492 | * This function processes the information provided in the probe | |
4493 | * information struct @ent, allocates the necessary ATA and SCSI | |
4494 | * host information structures, initializes them, and registers | |
4495 | * everything with requisite kernel subsystems. | |
4496 | * | |
4497 | * This function requests irqs, probes the ATA bus, and probes | |
4498 | * the SCSI bus. | |
1da177e4 LT |
4499 | * |
4500 | * LOCKING: | |
0cba632b | 4501 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4502 | * |
4503 | * RETURNS: | |
0cba632b | 4504 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 LT |
4505 | */ |
4506 | ||
057ace5e | 4507 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 LT |
4508 | { |
4509 | unsigned int count = 0, i; | |
4510 | struct device *dev = ent->dev; | |
4511 | struct ata_host_set *host_set; | |
4512 | ||
4513 | DPRINTK("ENTER\n"); | |
4514 | /* alloc a container for our list of ATA ports (buses) */ | |
57f3bda8 | 4515 | host_set = kzalloc(sizeof(struct ata_host_set) + |
1da177e4 LT |
4516 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); |
4517 | if (!host_set) | |
4518 | return 0; | |
1da177e4 LT |
4519 | spin_lock_init(&host_set->lock); |
4520 | ||
4521 | host_set->dev = dev; | |
4522 | host_set->n_ports = ent->n_ports; | |
4523 | host_set->irq = ent->irq; | |
4524 | host_set->mmio_base = ent->mmio_base; | |
4525 | host_set->private_data = ent->private_data; | |
4526 | host_set->ops = ent->port_ops; | |
4527 | ||
4528 | /* register each port bound to this device */ | |
4529 | for (i = 0; i < ent->n_ports; i++) { | |
4530 | struct ata_port *ap; | |
4531 | unsigned long xfer_mode_mask; | |
4532 | ||
4533 | ap = ata_host_add(ent, host_set, i); | |
4534 | if (!ap) | |
4535 | goto err_out; | |
4536 | ||
4537 | host_set->ports[i] = ap; | |
4538 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
4539 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
4540 | (ap->pio_mask << ATA_SHIFT_PIO); | |
4541 | ||
4542 | /* print per-port info to dmesg */ | |
4543 | printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX " | |
4544 | "bmdma 0x%lX irq %lu\n", | |
4545 | ap->id, | |
4546 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
4547 | ata_mode_string(xfer_mode_mask), | |
4548 | ap->ioaddr.cmd_addr, | |
4549 | ap->ioaddr.ctl_addr, | |
4550 | ap->ioaddr.bmdma_addr, | |
4551 | ent->irq); | |
4552 | ||
4553 | ata_chk_status(ap); | |
4554 | host_set->ops->irq_clear(ap); | |
4555 | count++; | |
4556 | } | |
4557 | ||
57f3bda8 RD |
4558 | if (!count) |
4559 | goto err_free_ret; | |
1da177e4 LT |
4560 | |
4561 | /* obtain irq, that is shared between channels */ | |
4562 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
4563 | DRV_NAME, host_set)) | |
4564 | goto err_out; | |
4565 | ||
4566 | /* perform each probe synchronously */ | |
4567 | DPRINTK("probe begin\n"); | |
4568 | for (i = 0; i < count; i++) { | |
4569 | struct ata_port *ap; | |
4570 | int rc; | |
4571 | ||
4572 | ap = host_set->ports[i]; | |
4573 | ||
4574 | DPRINTK("ata%u: probe begin\n", ap->id); | |
4575 | rc = ata_bus_probe(ap); | |
4576 | DPRINTK("ata%u: probe end\n", ap->id); | |
4577 | ||
4578 | if (rc) { | |
4579 | /* FIXME: do something useful here? | |
4580 | * Current libata behavior will | |
4581 | * tear down everything when | |
4582 | * the module is removed | |
4583 | * or the h/w is unplugged. | |
4584 | */ | |
4585 | } | |
4586 | ||
4587 | rc = scsi_add_host(ap->host, dev); | |
4588 | if (rc) { | |
4589 | printk(KERN_ERR "ata%u: scsi_add_host failed\n", | |
4590 | ap->id); | |
4591 | /* FIXME: do something useful here */ | |
4592 | /* FIXME: handle unconditional calls to | |
4593 | * scsi_scan_host and ata_host_remove, below, | |
4594 | * at the very least | |
4595 | */ | |
4596 | } | |
4597 | } | |
4598 | ||
4599 | /* probes are done, now scan each port's disk(s) */ | |
4600 | DPRINTK("probe begin\n"); | |
4601 | for (i = 0; i < count; i++) { | |
4602 | struct ata_port *ap = host_set->ports[i]; | |
4603 | ||
644dd0cc | 4604 | ata_scsi_scan_host(ap); |
1da177e4 LT |
4605 | } |
4606 | ||
4607 | dev_set_drvdata(dev, host_set); | |
4608 | ||
4609 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
4610 | return ent->n_ports; /* success */ | |
4611 | ||
4612 | err_out: | |
4613 | for (i = 0; i < count; i++) { | |
4614 | ata_host_remove(host_set->ports[i], 1); | |
4615 | scsi_host_put(host_set->ports[i]->host); | |
4616 | } | |
57f3bda8 | 4617 | err_free_ret: |
1da177e4 LT |
4618 | kfree(host_set); |
4619 | VPRINTK("EXIT, returning 0\n"); | |
4620 | return 0; | |
4621 | } | |
4622 | ||
17b14451 AC |
4623 | /** |
4624 | * ata_host_set_remove - PCI layer callback for device removal | |
4625 | * @host_set: ATA host set that was removed | |
4626 | * | |
4627 | * Unregister all objects associated with this host set. Free those | |
4628 | * objects. | |
4629 | * | |
4630 | * LOCKING: | |
4631 | * Inherited from calling layer (may sleep). | |
4632 | */ | |
4633 | ||
17b14451 AC |
4634 | void ata_host_set_remove(struct ata_host_set *host_set) |
4635 | { | |
4636 | struct ata_port *ap; | |
4637 | unsigned int i; | |
4638 | ||
4639 | for (i = 0; i < host_set->n_ports; i++) { | |
4640 | ap = host_set->ports[i]; | |
4641 | scsi_remove_host(ap->host); | |
4642 | } | |
4643 | ||
4644 | free_irq(host_set->irq, host_set); | |
4645 | ||
4646 | for (i = 0; i < host_set->n_ports; i++) { | |
4647 | ap = host_set->ports[i]; | |
4648 | ||
4649 | ata_scsi_release(ap->host); | |
4650 | ||
4651 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4652 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4653 | ||
4654 | if (ioaddr->cmd_addr == 0x1f0) | |
4655 | release_region(0x1f0, 8); | |
4656 | else if (ioaddr->cmd_addr == 0x170) | |
4657 | release_region(0x170, 8); | |
4658 | } | |
4659 | ||
4660 | scsi_host_put(ap->host); | |
4661 | } | |
4662 | ||
4663 | if (host_set->ops->host_stop) | |
4664 | host_set->ops->host_stop(host_set); | |
4665 | ||
4666 | kfree(host_set); | |
4667 | } | |
4668 | ||
1da177e4 LT |
4669 | /** |
4670 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4671 | * @host: libata host to be unloaded | |
4672 | * | |
4673 | * Performs all duties necessary to shut down a libata port... | |
4674 | * Kill port kthread, disable port, and release resources. | |
4675 | * | |
4676 | * LOCKING: | |
4677 | * Inherited from SCSI layer. | |
4678 | * | |
4679 | * RETURNS: | |
4680 | * One. | |
4681 | */ | |
4682 | ||
4683 | int ata_scsi_release(struct Scsi_Host *host) | |
4684 | { | |
4685 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | |
4686 | ||
4687 | DPRINTK("ENTER\n"); | |
4688 | ||
4689 | ap->ops->port_disable(ap); | |
4690 | ata_host_remove(ap, 0); | |
4691 | ||
4692 | DPRINTK("EXIT\n"); | |
4693 | return 1; | |
4694 | } | |
4695 | ||
4696 | /** | |
4697 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
4698 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
4699 | * |
4700 | * Utility function which initializes data_addr, error_addr, | |
4701 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
4702 | * device_addr, status_addr, and command_addr to standard offsets | |
4703 | * relative to cmd_addr. | |
4704 | * | |
4705 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 4706 | */ |
0baab86b | 4707 | |
1da177e4 LT |
4708 | void ata_std_ports(struct ata_ioports *ioaddr) |
4709 | { | |
4710 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
4711 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
4712 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
4713 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
4714 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
4715 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
4716 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
4717 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
4718 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
4719 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
4720 | } | |
4721 | ||
4722 | static struct ata_probe_ent * | |
057ace5e | 4723 | ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port) |
1da177e4 LT |
4724 | { |
4725 | struct ata_probe_ent *probe_ent; | |
4726 | ||
57f3bda8 | 4727 | probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); |
1da177e4 LT |
4728 | if (!probe_ent) { |
4729 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
4730 | kobject_name(&(dev->kobj))); | |
4731 | return NULL; | |
4732 | } | |
4733 | ||
1da177e4 LT |
4734 | INIT_LIST_HEAD(&probe_ent->node); |
4735 | probe_ent->dev = dev; | |
4736 | ||
4737 | probe_ent->sht = port->sht; | |
4738 | probe_ent->host_flags = port->host_flags; | |
4739 | probe_ent->pio_mask = port->pio_mask; | |
4740 | probe_ent->mwdma_mask = port->mwdma_mask; | |
4741 | probe_ent->udma_mask = port->udma_mask; | |
4742 | probe_ent->port_ops = port->port_ops; | |
4743 | ||
4744 | return probe_ent; | |
4745 | } | |
4746 | ||
0baab86b EF |
4747 | |
4748 | ||
374b1873 JG |
4749 | #ifdef CONFIG_PCI |
4750 | ||
4751 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
4752 | { | |
4753 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
4754 | ||
4755 | pci_iounmap(pdev, host_set->mmio_base); | |
4756 | } | |
4757 | ||
0baab86b EF |
4758 | /** |
4759 | * ata_pci_init_native_mode - Initialize native-mode driver | |
4760 | * @pdev: pci device to be initialized | |
4761 | * @port: array[2] of pointers to port info structures. | |
47a86593 | 4762 | * @ports: bitmap of ports present |
0baab86b EF |
4763 | * |
4764 | * Utility function which allocates and initializes an | |
4765 | * ata_probe_ent structure for a standard dual-port | |
4766 | * PIO-based IDE controller. The returned ata_probe_ent | |
4767 | * structure can be passed to ata_device_add(). The returned | |
4768 | * ata_probe_ent structure should then be freed with kfree(). | |
47a86593 AC |
4769 | * |
4770 | * The caller need only pass the address of the primary port, the | |
4771 | * secondary will be deduced automatically. If the device has non | |
4772 | * standard secondary port mappings this function can be called twice, | |
4773 | * once for each interface. | |
0baab86b EF |
4774 | */ |
4775 | ||
1da177e4 | 4776 | struct ata_probe_ent * |
47a86593 | 4777 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports) |
1da177e4 LT |
4778 | { |
4779 | struct ata_probe_ent *probe_ent = | |
4780 | ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
47a86593 AC |
4781 | int p = 0; |
4782 | ||
1da177e4 LT |
4783 | if (!probe_ent) |
4784 | return NULL; | |
4785 | ||
1da177e4 LT |
4786 | probe_ent->irq = pdev->irq; |
4787 | probe_ent->irq_flags = SA_SHIRQ; | |
e99f8b5e | 4788 | probe_ent->private_data = port[0]->private_data; |
1da177e4 | 4789 | |
47a86593 AC |
4790 | if (ports & ATA_PORT_PRIMARY) { |
4791 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0); | |
4792 | probe_ent->port[p].altstatus_addr = | |
4793 | probe_ent->port[p].ctl_addr = | |
4794 | pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; | |
4795 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4); | |
4796 | ata_std_ports(&probe_ent->port[p]); | |
4797 | p++; | |
4798 | } | |
1da177e4 | 4799 | |
47a86593 AC |
4800 | if (ports & ATA_PORT_SECONDARY) { |
4801 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2); | |
4802 | probe_ent->port[p].altstatus_addr = | |
4803 | probe_ent->port[p].ctl_addr = | |
4804 | pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS; | |
4805 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8; | |
4806 | ata_std_ports(&probe_ent->port[p]); | |
4807 | p++; | |
4808 | } | |
1da177e4 | 4809 | |
47a86593 | 4810 | probe_ent->n_ports = p; |
1da177e4 LT |
4811 | return probe_ent; |
4812 | } | |
4813 | ||
0f0d5192 | 4814 | static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num) |
1da177e4 | 4815 | { |
47a86593 | 4816 | struct ata_probe_ent *probe_ent; |
1da177e4 | 4817 | |
0f0d5192 | 4818 | probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port); |
1da177e4 LT |
4819 | if (!probe_ent) |
4820 | return NULL; | |
1da177e4 | 4821 | |
1da177e4 | 4822 | probe_ent->legacy_mode = 1; |
47a86593 AC |
4823 | probe_ent->n_ports = 1; |
4824 | probe_ent->hard_port_no = port_num; | |
e99f8b5e | 4825 | probe_ent->private_data = port->private_data; |
47a86593 AC |
4826 | |
4827 | switch(port_num) | |
4828 | { | |
4829 | case 0: | |
4830 | probe_ent->irq = 14; | |
4831 | probe_ent->port[0].cmd_addr = 0x1f0; | |
4832 | probe_ent->port[0].altstatus_addr = | |
4833 | probe_ent->port[0].ctl_addr = 0x3f6; | |
4834 | break; | |
4835 | case 1: | |
4836 | probe_ent->irq = 15; | |
4837 | probe_ent->port[0].cmd_addr = 0x170; | |
4838 | probe_ent->port[0].altstatus_addr = | |
4839 | probe_ent->port[0].ctl_addr = 0x376; | |
4840 | break; | |
4841 | } | |
4842 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num; | |
1da177e4 | 4843 | ata_std_ports(&probe_ent->port[0]); |
1da177e4 LT |
4844 | return probe_ent; |
4845 | } | |
4846 | ||
4847 | /** | |
4848 | * ata_pci_init_one - Initialize/register PCI IDE host controller | |
4849 | * @pdev: Controller to be initialized | |
4850 | * @port_info: Information from low-level host driver | |
4851 | * @n_ports: Number of ports attached to host controller | |
4852 | * | |
0baab86b EF |
4853 | * This is a helper function which can be called from a driver's |
4854 | * xxx_init_one() probe function if the hardware uses traditional | |
4855 | * IDE taskfile registers. | |
4856 | * | |
4857 | * This function calls pci_enable_device(), reserves its register | |
4858 | * regions, sets the dma mask, enables bus master mode, and calls | |
4859 | * ata_device_add() | |
4860 | * | |
1da177e4 LT |
4861 | * LOCKING: |
4862 | * Inherited from PCI layer (may sleep). | |
4863 | * | |
4864 | * RETURNS: | |
0cba632b | 4865 | * Zero on success, negative on errno-based value on error. |
1da177e4 LT |
4866 | */ |
4867 | ||
4868 | int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, | |
4869 | unsigned int n_ports) | |
4870 | { | |
47a86593 | 4871 | struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL; |
1da177e4 LT |
4872 | struct ata_port_info *port[2]; |
4873 | u8 tmp8, mask; | |
4874 | unsigned int legacy_mode = 0; | |
4875 | int disable_dev_on_err = 1; | |
4876 | int rc; | |
4877 | ||
4878 | DPRINTK("ENTER\n"); | |
4879 | ||
4880 | port[0] = port_info[0]; | |
4881 | if (n_ports > 1) | |
4882 | port[1] = port_info[1]; | |
4883 | else | |
4884 | port[1] = port[0]; | |
4885 | ||
4886 | if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 | |
4887 | && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { | |
47a86593 | 4888 | /* TODO: What if one channel is in native mode ... */ |
1da177e4 LT |
4889 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); |
4890 | mask = (1 << 2) | (1 << 0); | |
4891 | if ((tmp8 & mask) != mask) | |
4892 | legacy_mode = (1 << 3); | |
4893 | } | |
4894 | ||
4895 | /* FIXME... */ | |
47a86593 AC |
4896 | if ((!legacy_mode) && (n_ports > 2)) { |
4897 | printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n"); | |
4898 | n_ports = 2; | |
4899 | /* For now */ | |
1da177e4 LT |
4900 | } |
4901 | ||
47a86593 AC |
4902 | /* FIXME: Really for ATA it isn't safe because the device may be |
4903 | multi-purpose and we want to leave it alone if it was already | |
4904 | enabled. Secondly for shared use as Arjan says we want refcounting | |
4905 | ||
4906 | Checking dev->is_enabled is insufficient as this is not set at | |
4907 | boot for the primary video which is BIOS enabled | |
4908 | */ | |
4909 | ||
1da177e4 LT |
4910 | rc = pci_enable_device(pdev); |
4911 | if (rc) | |
4912 | return rc; | |
4913 | ||
4914 | rc = pci_request_regions(pdev, DRV_NAME); | |
4915 | if (rc) { | |
4916 | disable_dev_on_err = 0; | |
4917 | goto err_out; | |
4918 | } | |
4919 | ||
47a86593 | 4920 | /* FIXME: Should use platform specific mappers for legacy port ranges */ |
1da177e4 LT |
4921 | if (legacy_mode) { |
4922 | if (!request_region(0x1f0, 8, "libata")) { | |
4923 | struct resource *conflict, res; | |
4924 | res.start = 0x1f0; | |
4925 | res.end = 0x1f0 + 8 - 1; | |
4926 | conflict = ____request_resource(&ioport_resource, &res); | |
4927 | if (!strcmp(conflict->name, "libata")) | |
4928 | legacy_mode |= (1 << 0); | |
4929 | else { | |
4930 | disable_dev_on_err = 0; | |
4931 | printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n"); | |
4932 | } | |
4933 | } else | |
4934 | legacy_mode |= (1 << 0); | |
4935 | ||
4936 | if (!request_region(0x170, 8, "libata")) { | |
4937 | struct resource *conflict, res; | |
4938 | res.start = 0x170; | |
4939 | res.end = 0x170 + 8 - 1; | |
4940 | conflict = ____request_resource(&ioport_resource, &res); | |
4941 | if (!strcmp(conflict->name, "libata")) | |
4942 | legacy_mode |= (1 << 1); | |
4943 | else { | |
4944 | disable_dev_on_err = 0; | |
4945 | printk(KERN_WARNING "ata: 0x170 IDE port busy\n"); | |
4946 | } | |
4947 | } else | |
4948 | legacy_mode |= (1 << 1); | |
4949 | } | |
4950 | ||
4951 | /* we have legacy mode, but all ports are unavailable */ | |
4952 | if (legacy_mode == (1 << 3)) { | |
4953 | rc = -EBUSY; | |
4954 | goto err_out_regions; | |
4955 | } | |
4956 | ||
4957 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
4958 | if (rc) | |
4959 | goto err_out_regions; | |
4960 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
4961 | if (rc) | |
4962 | goto err_out_regions; | |
4963 | ||
4964 | if (legacy_mode) { | |
47a86593 | 4965 | if (legacy_mode & (1 << 0)) |
0f0d5192 | 4966 | probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0); |
47a86593 | 4967 | if (legacy_mode & (1 << 1)) |
0f0d5192 | 4968 | probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1); |
47a86593 AC |
4969 | } else { |
4970 | if (n_ports == 2) | |
4971 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | |
4972 | else | |
4973 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY); | |
4974 | } | |
4975 | if (!probe_ent && !probe_ent2) { | |
1da177e4 LT |
4976 | rc = -ENOMEM; |
4977 | goto err_out_regions; | |
4978 | } | |
4979 | ||
4980 | pci_set_master(pdev); | |
4981 | ||
4982 | /* FIXME: check ata_device_add return */ | |
4983 | if (legacy_mode) { | |
4984 | if (legacy_mode & (1 << 0)) | |
4985 | ata_device_add(probe_ent); | |
4986 | if (legacy_mode & (1 << 1)) | |
4987 | ata_device_add(probe_ent2); | |
4988 | } else | |
4989 | ata_device_add(probe_ent); | |
4990 | ||
4991 | kfree(probe_ent); | |
4992 | kfree(probe_ent2); | |
4993 | ||
4994 | return 0; | |
4995 | ||
4996 | err_out_regions: | |
4997 | if (legacy_mode & (1 << 0)) | |
4998 | release_region(0x1f0, 8); | |
4999 | if (legacy_mode & (1 << 1)) | |
5000 | release_region(0x170, 8); | |
5001 | pci_release_regions(pdev); | |
5002 | err_out: | |
5003 | if (disable_dev_on_err) | |
5004 | pci_disable_device(pdev); | |
5005 | return rc; | |
5006 | } | |
5007 | ||
5008 | /** | |
5009 | * ata_pci_remove_one - PCI layer callback for device removal | |
5010 | * @pdev: PCI device that was removed | |
5011 | * | |
5012 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 5013 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
5014 | * Handle this by unregistering all objects associated |
5015 | * with this PCI device. Free those objects. Then finally | |
5016 | * release PCI resources and disable device. | |
5017 | * | |
5018 | * LOCKING: | |
5019 | * Inherited from PCI layer (may sleep). | |
5020 | */ | |
5021 | ||
5022 | void ata_pci_remove_one (struct pci_dev *pdev) | |
5023 | { | |
5024 | struct device *dev = pci_dev_to_dev(pdev); | |
5025 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
1da177e4 | 5026 | |
17b14451 | 5027 | ata_host_set_remove(host_set); |
1da177e4 LT |
5028 | pci_release_regions(pdev); |
5029 | pci_disable_device(pdev); | |
5030 | dev_set_drvdata(dev, NULL); | |
5031 | } | |
5032 | ||
5033 | /* move to PCI subsystem */ | |
057ace5e | 5034 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
5035 | { |
5036 | unsigned long tmp = 0; | |
5037 | ||
5038 | switch (bits->width) { | |
5039 | case 1: { | |
5040 | u8 tmp8 = 0; | |
5041 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
5042 | tmp = tmp8; | |
5043 | break; | |
5044 | } | |
5045 | case 2: { | |
5046 | u16 tmp16 = 0; | |
5047 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
5048 | tmp = tmp16; | |
5049 | break; | |
5050 | } | |
5051 | case 4: { | |
5052 | u32 tmp32 = 0; | |
5053 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
5054 | tmp = tmp32; | |
5055 | break; | |
5056 | } | |
5057 | ||
5058 | default: | |
5059 | return -EINVAL; | |
5060 | } | |
5061 | ||
5062 | tmp &= bits->mask; | |
5063 | ||
5064 | return (tmp == bits->val) ? 1 : 0; | |
5065 | } | |
9b847548 JA |
5066 | |
5067 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state) | |
5068 | { | |
5069 | pci_save_state(pdev); | |
5070 | pci_disable_device(pdev); | |
5071 | pci_set_power_state(pdev, PCI_D3hot); | |
5072 | return 0; | |
5073 | } | |
5074 | ||
5075 | int ata_pci_device_resume(struct pci_dev *pdev) | |
5076 | { | |
5077 | pci_set_power_state(pdev, PCI_D0); | |
5078 | pci_restore_state(pdev); | |
5079 | pci_enable_device(pdev); | |
5080 | pci_set_master(pdev); | |
5081 | return 0; | |
5082 | } | |
1da177e4 LT |
5083 | #endif /* CONFIG_PCI */ |
5084 | ||
5085 | ||
1da177e4 LT |
5086 | static int __init ata_init(void) |
5087 | { | |
5088 | ata_wq = create_workqueue("ata"); | |
5089 | if (!ata_wq) | |
5090 | return -ENOMEM; | |
5091 | ||
5092 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
5093 | return 0; | |
5094 | } | |
5095 | ||
5096 | static void __exit ata_exit(void) | |
5097 | { | |
5098 | destroy_workqueue(ata_wq); | |
5099 | } | |
5100 | ||
5101 | module_init(ata_init); | |
5102 | module_exit(ata_exit); | |
5103 | ||
67846b30 JG |
5104 | static unsigned long ratelimit_time; |
5105 | static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED; | |
5106 | ||
5107 | int ata_ratelimit(void) | |
5108 | { | |
5109 | int rc; | |
5110 | unsigned long flags; | |
5111 | ||
5112 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
5113 | ||
5114 | if (time_after(jiffies, ratelimit_time)) { | |
5115 | rc = 1; | |
5116 | ratelimit_time = jiffies + (HZ/5); | |
5117 | } else | |
5118 | rc = 0; | |
5119 | ||
5120 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
5121 | ||
5122 | return rc; | |
5123 | } | |
5124 | ||
1da177e4 LT |
5125 | /* |
5126 | * libata is essentially a library of internal helper functions for | |
5127 | * low-level ATA host controller drivers. As such, the API/ABI is | |
5128 | * likely to change as new drivers are added and updated. | |
5129 | * Do not depend on ABI/API stability. | |
5130 | */ | |
5131 | ||
5132 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
5133 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
5134 | EXPORT_SYMBOL_GPL(ata_device_add); | |
17b14451 | 5135 | EXPORT_SYMBOL_GPL(ata_host_set_remove); |
1da177e4 LT |
5136 | EXPORT_SYMBOL_GPL(ata_sg_init); |
5137 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
5138 | EXPORT_SYMBOL_GPL(ata_qc_complete); | |
5139 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); | |
5140 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
5141 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
5142 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
5143 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
5144 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
5145 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
5146 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
5147 | EXPORT_SYMBOL_GPL(ata_check_status); | |
5148 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
5149 | EXPORT_SYMBOL_GPL(ata_exec_command); |
5150 | EXPORT_SYMBOL_GPL(ata_port_start); | |
5151 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 5152 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 LT |
5153 | EXPORT_SYMBOL_GPL(ata_interrupt); |
5154 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
5155 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
5156 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
5157 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
5158 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
5159 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
5160 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
5161 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
5162 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
5163 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
5164 | EXPORT_SYMBOL_GPL(ata_port_disable); | |
67846b30 | 5165 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
1da177e4 LT |
5166 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
5167 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
5168 | EXPORT_SYMBOL_GPL(ata_scsi_error); | |
5169 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
5170 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
5171 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
5172 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
5173 | EXPORT_SYMBOL_GPL(ata_dev_id_string); | |
6f2f3812 | 5174 | EXPORT_SYMBOL_GPL(ata_dev_config); |
1da177e4 LT |
5175 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
5176 | ||
1bc4ccff | 5177 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
5178 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
5179 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
5180 | ||
1da177e4 LT |
5181 | #ifdef CONFIG_PCI |
5182 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 5183 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
5184 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
5185 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
5186 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
9b847548 JA |
5187 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
5188 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
1da177e4 | 5189 | #endif /* CONFIG_PCI */ |
9b847548 JA |
5190 | |
5191 | EXPORT_SYMBOL_GPL(ata_device_suspend); | |
5192 | EXPORT_SYMBOL_GPL(ata_device_resume); | |
5193 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); | |
5194 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); |