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[deliverable/linux.git] / drivers / scsi / libata-core.c
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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
59a10b17 64static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
8bf62ece 65static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
057ace5e 68static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
1da177e4 69static int fgb(u32 bitmap);
057ace5e 70static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 71 u8 *xfer_mode_out,
72 unsigned int *xfer_shift_out);
e33b9dfa 73static void ata_pio_error(struct ata_port *ap);
1da177e4
LT		 74
75static unsigned int ata_unique_id = 1;
76static struct workqueue_struct *ata_wq;
77
1623c81e
JG		 78int atapi_enabled = 0;
79module_param(atapi_enabled, int, 0444);
80MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
81
1da177e4
LT		 82MODULE_AUTHOR("Jeff Garzik");
83MODULE_DESCRIPTION("Library module for ATA devices");
84MODULE_LICENSE("GPL");
85MODULE_VERSION(DRV_VERSION);
86
0baab86b 87
1da177e4
LT		 88/**
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
93 *
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
96 *
97 * LOCKING:
98 * Inherited from caller.
99 */
100
057ace5e 101void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 102{
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
108
109 fis[4] = tf->lbal;
110 fis[5] = tf->lbam;
111 fis[6] = tf->lbah;
112 fis[7] = tf->device;
113
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
118
119 fis[12] = tf->nsect;
120 fis[13] = tf->hob_nsect;
121 fis[14] = 0;
122 fis[15] = tf->ctl;
123
124 fis[16] = 0;
125 fis[17] = 0;
126 fis[18] = 0;
127 fis[19] = 0;
128}
129
130/**
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
134 *
e12a1be6 135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 136 *
137 * LOCKING:
138 * Inherited from caller.
139 */
140
057ace5e 141void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 142{
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
145
146 tf->lbal = fis[4];
147 tf->lbam = fis[5];
148 tf->lbah = fis[6];
149 tf->device = fis[7];
150
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
154
155 tf->nsect = fis[12];
156 tf->hob_nsect = fis[13];
157}
158
8cbd6df1
AL		 159static const u8 ata_rw_cmds[] = {
160 /* pio multi */
161 ATA_CMD_READ_MULTI,
162 ATA_CMD_WRITE_MULTI,
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 165 0,
166 0,
167 0,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 169 /* pio */
170 ATA_CMD_PIO_READ,
171 ATA_CMD_PIO_WRITE,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 174 0,
175 0,
176 0,
177 0,
8cbd6df1
AL		 178 /* dma */
179 ATA_CMD_READ,
180 ATA_CMD_WRITE,
181 ATA_CMD_READ_EXT,
9a3dccc4
TH		 182 ATA_CMD_WRITE_EXT,
183 0,
184 0,
185 0,
186 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 187};
1da177e4
LT		 188
189/**
8cbd6df1
AL		 190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
1da177e4 192 *
8cbd6df1
AL		 193 * Examine the device configuration and tf->flags to calculate
194 * the proper read/write commands and protocol to use.
1da177e4
LT		 195 *
196 * LOCKING:
197 * caller.
198 */
9a3dccc4 199int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 200{
8cbd6df1
AL		 201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
9a3dccc4 203 u8 cmd;
1da177e4 204
9a3dccc4 205 int index, fua, lba48, write;
8cbd6df1 206
9a3dccc4 207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 210
8cbd6df1
AL		 211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
9a3dccc4 213 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
aef9d533 217 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 218 } else {
219 tf->protocol = ATA_PROT_DMA;
9a3dccc4 220 index = 16;
8cbd6df1 221 }
1da177e4 222
9a3dccc4
TH		 223 cmd = ata_rw_cmds[index + fua + lba48 + write];
224 if (cmd) {
225 tf->command = cmd;
226 return 0;
227 }
228 return -1;
1da177e4
LT		 229}
230
98ac62de 231static const char * const xfer_mode_str[] = {
1da177e4
LT		 232 "UDMA/16",
233 "UDMA/25",
234 "UDMA/33",
235 "UDMA/44",
236 "UDMA/66",
237 "UDMA/100",
238 "UDMA/133",
239 "UDMA7",
240 "MWDMA0",
241 "MWDMA1",
242 "MWDMA2",
243 "PIO0",
244 "PIO1",
245 "PIO2",
246 "PIO3",
247 "PIO4",
248};
249
250/**
251 * ata_udma_string - convert UDMA bit offset to string
252 * @mask: mask of bits supported; only highest bit counts.
253 *
254 * Determine string which represents the highest speed
255 * (highest bit in @udma_mask).
256 *
257 * LOCKING:
258 * None.
259 *
260 * RETURNS:
261 * Constant C string representing highest speed listed in
262 * @udma_mask, or the constant C string "<n/a>".
263 */
264
265static const char *ata_mode_string(unsigned int mask)
266{
267 int i;
268
269 for (i = 7; i >= 0; i--)
270 if (mask & (1 << i))
271 goto out;
272 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
273 if (mask & (1 << i))
274 goto out;
275 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
276 if (mask & (1 << i))
277 goto out;
278
279 return "<n/a>";
280
281out:
282 return xfer_mode_str[i];
283}
284
285/**
286 * ata_pio_devchk - PATA device presence detection
287 * @ap: ATA channel to examine
288 * @device: Device to examine (starting at zero)
289 *
290 * This technique was originally described in
291 * Hale Landis's ATADRVR (www.ata-atapi.com), and
292 * later found its way into the ATA/ATAPI spec.
293 *
294 * Write a pattern to the ATA shadow registers,
295 * and if a device is present, it will respond by
296 * correctly storing and echoing back the
297 * ATA shadow register contents.
298 *
299 * LOCKING:
300 * caller.
301 */
302
303static unsigned int ata_pio_devchk(struct ata_port *ap,
304 unsigned int device)
305{
306 struct ata_ioports *ioaddr = &ap->ioaddr;
307 u8 nsect, lbal;
308
309 ap->ops->dev_select(ap, device);
310
311 outb(0x55, ioaddr->nsect_addr);
312 outb(0xaa, ioaddr->lbal_addr);
313
314 outb(0xaa, ioaddr->nsect_addr);
315 outb(0x55, ioaddr->lbal_addr);
316
317 outb(0x55, ioaddr->nsect_addr);
318 outb(0xaa, ioaddr->lbal_addr);
319
320 nsect = inb(ioaddr->nsect_addr);
321 lbal = inb(ioaddr->lbal_addr);
322
323 if ((nsect == 0x55) && (lbal == 0xaa))
324 return 1; /* we found a device */
325
326 return 0; /* nothing found */
327}
328
329/**
330 * ata_mmio_devchk - PATA device presence detection
331 * @ap: ATA channel to examine
332 * @device: Device to examine (starting at zero)
333 *
334 * This technique was originally described in
335 * Hale Landis's ATADRVR (www.ata-atapi.com), and
336 * later found its way into the ATA/ATAPI spec.
337 *
338 * Write a pattern to the ATA shadow registers,
339 * and if a device is present, it will respond by
340 * correctly storing and echoing back the
341 * ATA shadow register contents.
342 *
343 * LOCKING:
344 * caller.
345 */
346
347static unsigned int ata_mmio_devchk(struct ata_port *ap,
348 unsigned int device)
349{
350 struct ata_ioports *ioaddr = &ap->ioaddr;
351 u8 nsect, lbal;
352
353 ap->ops->dev_select(ap, device);
354
355 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
356 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
357
358 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
359 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
360
361 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
362 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
363
364 nsect = readb((void __iomem *) ioaddr->nsect_addr);
365 lbal = readb((void __iomem *) ioaddr->lbal_addr);
366
367 if ((nsect == 0x55) && (lbal == 0xaa))
368 return 1; /* we found a device */
369
370 return 0; /* nothing found */
371}
372
373/**
374 * ata_devchk - PATA device presence detection
375 * @ap: ATA channel to examine
376 * @device: Device to examine (starting at zero)
377 *
378 * Dispatch ATA device presence detection, depending
379 * on whether we are using PIO or MMIO to talk to the
380 * ATA shadow registers.
381 *
382 * LOCKING:
383 * caller.
384 */
385
386static unsigned int ata_devchk(struct ata_port *ap,
387 unsigned int device)
388{
389 if (ap->flags & ATA_FLAG_MMIO)
390 return ata_mmio_devchk(ap, device);
391 return ata_pio_devchk(ap, device);
392}
393
394/**
395 * ata_dev_classify - determine device type based on ATA-spec signature
396 * @tf: ATA taskfile register set for device to be identified
397 *
398 * Determine from taskfile register contents whether a device is
399 * ATA or ATAPI, as per "Signature and persistence" section
400 * of ATA/PI spec (volume 1, sect 5.14).
401 *
402 * LOCKING:
403 * None.
404 *
405 * RETURNS:
406 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
407 * the event of failure.
408 */
409
057ace5e 410unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 411{
412 /* Apple's open source Darwin code hints that some devices only
413 * put a proper signature into the LBA mid/high registers,
414 * So, we only check those. It's sufficient for uniqueness.
415 */
416
417 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
418 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
419 DPRINTK("found ATA device by sig\n");
420 return ATA_DEV_ATA;
421 }
422
423 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
424 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
425 DPRINTK("found ATAPI device by sig\n");
426 return ATA_DEV_ATAPI;
427 }
428
429 DPRINTK("unknown device\n");
430 return ATA_DEV_UNKNOWN;
431}
432
433/**
434 * ata_dev_try_classify - Parse returned ATA device signature
435 * @ap: ATA channel to examine
436 * @device: Device to examine (starting at zero)
b4dc7623 437 * @r_err: Value of error register on completion
1da177e4
LT		 438 *
439 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
440 * an ATA/ATAPI-defined set of values is placed in the ATA
441 * shadow registers, indicating the results of device detection
442 * and diagnostics.
443 *
444 * Select the ATA device, and read the values from the ATA shadow
445 * registers. Then parse according to the Error register value,
446 * and the spec-defined values examined by ata_dev_classify().
447 *
448 * LOCKING:
449 * caller.
b4dc7623
TH		 450 *
451 * RETURNS:
452 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 453 */
454
b4dc7623
TH		 455static unsigned int
456ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 457{
1da177e4
LT		 458 struct ata_taskfile tf;
459 unsigned int class;
460 u8 err;
461
462 ap->ops->dev_select(ap, device);
463
464 memset(&tf, 0, sizeof(tf));
465
1da177e4 466 ap->ops->tf_read(ap, &tf);
0169e284 467 err = tf.feature;
b4dc7623
TH		 468 if (r_err)
469 *r_err = err;
1da177e4
LT		 470
471 /* see if device passed diags */
472 if (err == 1)
473 /* do nothing */ ;
474 else if ((device == 0) && (err == 0x81))
475 /* do nothing */ ;
476 else
b4dc7623 477 return ATA_DEV_NONE;
1da177e4 478
b4dc7623 479 /* determine if device is ATA or ATAPI */
1da177e4 480 class = ata_dev_classify(&tf);
b4dc7623 481
1da177e4 482 if (class == ATA_DEV_UNKNOWN)
b4dc7623 483 return ATA_DEV_NONE;
1da177e4 484 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 485 return ATA_DEV_NONE;
486 return class;
1da177e4
LT		 487}
488
489/**
490 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
491 * @id: IDENTIFY DEVICE results we will examine
492 * @s: string into which data is output
493 * @ofs: offset into identify device page
494 * @len: length of string to return. must be an even number.
495 *
496 * The strings in the IDENTIFY DEVICE page are broken up into
497 * 16-bit chunks. Run through the string, and output each
498 * 8-bit chunk linearly, regardless of platform.
499 *
500 * LOCKING:
501 * caller.
502 */
503
057ace5e 504void ata_dev_id_string(const u16 *id, unsigned char *s,
1da177e4
LT		 505 unsigned int ofs, unsigned int len)
506{
507 unsigned int c;
508
509 while (len > 0) {
510 c = id[ofs] >> 8;
511 *s = c;
512 s++;
513
514 c = id[ofs] & 0xff;
515 *s = c;
516 s++;
517
518 ofs++;
519 len -= 2;
520 }
521}
522
0e949ff3
TH		 523/**
524 * ata_dev_id_c_string - Convert IDENTIFY DEVICE page into C string
525 * @id: IDENTIFY DEVICE results we will examine
526 * @s: string into which data is output
527 * @ofs: offset into identify device page
528 * @len: length of string to return. must be an odd number.
529 *
530 * This function is identical to ata_dev_id_string except that it
531 * trims trailing spaces and terminates the resulting string with
532 * null. @len must be actual maximum length (even number) + 1.
533 *
534 * LOCKING:
535 * caller.
536 */
537void ata_dev_id_c_string(const u16 *id, unsigned char *s,
538 unsigned int ofs, unsigned int len)
539{
540 unsigned char *p;
541
542 WARN_ON(!(len & 1));
543
544 ata_dev_id_string(id, s, ofs, len - 1);
545
546 p = s + strnlen(s, len - 1);
547 while (p > s && p[-1] == ' ')
548 p--;
549 *p = '\0';
550}
0baab86b 551
2940740b
TH		 552static u64 ata_id_n_sectors(const u16 *id)
553{
554 if (ata_id_has_lba(id)) {
555 if (ata_id_has_lba48(id))
556 return ata_id_u64(id, 100);
557 else
558 return ata_id_u32(id, 60);
559 } else {
560 if (ata_id_current_chs_valid(id))
561 return ata_id_u32(id, 57);
562 else
563 return id[1] * id[3] * id[6];
564 }
565}
0baab86b
EF		 566
567/**
568 * ata_noop_dev_select - Select device 0/1 on ATA bus
569 * @ap: ATA channel to manipulate
570 * @device: ATA device (numbered from zero) to select
571 *
572 * This function performs no actual function.
573 *
574 * May be used as the dev_select() entry in ata_port_operations.
575 *
576 * LOCKING:
577 * caller.
578 */
1da177e4
LT		 579void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
580{
581}
582
0baab86b 583
1da177e4
LT		 584/**
585 * ata_std_dev_select - Select device 0/1 on ATA bus
586 * @ap: ATA channel to manipulate
587 * @device: ATA device (numbered from zero) to select
588 *
589 * Use the method defined in the ATA specification to
590 * make either device 0, or device 1, active on the
0baab86b
EF		 591 * ATA channel. Works with both PIO and MMIO.
592 *
593 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 594 *
595 * LOCKING:
596 * caller.
597 */
598
599void ata_std_dev_select (struct ata_port *ap, unsigned int device)
600{
601 u8 tmp;
602
603 if (device == 0)
604 tmp = ATA_DEVICE_OBS;
605 else
606 tmp = ATA_DEVICE_OBS | ATA_DEV1;
607
608 if (ap->flags & ATA_FLAG_MMIO) {
609 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
610 } else {
611 outb(tmp, ap->ioaddr.device_addr);
612 }
613 ata_pause(ap); /* needed; also flushes, for mmio */
614}
615
616/**
617 * ata_dev_select - Select device 0/1 on ATA bus
618 * @ap: ATA channel to manipulate
619 * @device: ATA device (numbered from zero) to select
620 * @wait: non-zero to wait for Status register BSY bit to clear
621 * @can_sleep: non-zero if context allows sleeping
622 *
623 * Use the method defined in the ATA specification to
624 * make either device 0, or device 1, active on the
625 * ATA channel.
626 *
627 * This is a high-level version of ata_std_dev_select(),
628 * which additionally provides the services of inserting
629 * the proper pauses and status polling, where needed.
630 *
631 * LOCKING:
632 * caller.
633 */
634
635void ata_dev_select(struct ata_port *ap, unsigned int device,
636 unsigned int wait, unsigned int can_sleep)
637{
638 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
639 ap->id, device, wait);
640
641 if (wait)
642 ata_wait_idle(ap);
643
644 ap->ops->dev_select(ap, device);
645
646 if (wait) {
647 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
648 msleep(150);
649 ata_wait_idle(ap);
650 }
651}
652
653/**
654 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 655 * @id: IDENTIFY DEVICE page to dump
1da177e4 656 *
0bd3300a
TH		 657 * Dump selected 16-bit words from the given IDENTIFY DEVICE
658 * page.
1da177e4
LT		 659 *
660 * LOCKING:
661 * caller.
662 */
663
0bd3300a 664static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 665{
666 DPRINTK("49==0x%04x "
667 "53==0x%04x "
668 "63==0x%04x "
669 "64==0x%04x "
670 "75==0x%04x \n",
0bd3300a
TH		 671 id[49],
672 id[53],
673 id[63],
674 id[64],
675 id[75]);
1da177e4
LT		 676 DPRINTK("80==0x%04x "
677 "81==0x%04x "
678 "82==0x%04x "
679 "83==0x%04x "
680 "84==0x%04x \n",
0bd3300a
TH		 681 id[80],
682 id[81],
683 id[82],
684 id[83],
685 id[84]);
1da177e4
LT		 686 DPRINTK("88==0x%04x "
687 "93==0x%04x\n",
0bd3300a
TH		 688 id[88],
689 id[93]);
1da177e4
LT		 690}
691
11e29e21
AC		 692/*
693 * Compute the PIO modes available for this device. This is not as
694 * trivial as it seems if we must consider early devices correctly.
695 *
696 * FIXME: pre IDE drive timing (do we care ?).
697 */
698
057ace5e 699static unsigned int ata_pio_modes(const struct ata_device *adev)
11e29e21
AC		 700{
701 u16 modes;
702
ffa29456
AC		 703 /* Usual case. Word 53 indicates word 64 is valid */
704 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
11e29e21
AC		 705 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
706 modes <<= 3;
707 modes |= 0x7;
708 return modes;
709 }
710
ffa29456
AC		 711 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
712 number for the maximum. Turn it into a mask and return it */
713 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
11e29e21 714 return modes;
ffa29456
AC		 715 /* But wait.. there's more. Design your standards by committee and
716 you too can get a free iordy field to process. However its the
717 speeds not the modes that are supported... Note drivers using the
718 timing API will get this right anyway */
11e29e21
AC		 719}
720
95064379
TH		 721static inline void
722ata_queue_pio_task(struct ata_port *ap)
723{
c18d06f8
TH		 724 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
725 queue_work(ata_wq, &ap->pio_task);
95064379
TH		 726}
727
728static inline void
729ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
730{
c18d06f8
TH		 731 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
732 queue_delayed_work(ata_wq, &ap->pio_task, delay);
733}
734
735/**
41232d3e 736 * ata_flush_pio_tasks - Flush pio_task
c18d06f8
TH		 737 * @ap: the target ata_port
738 *
41232d3e 739 * After this function completes, pio_task is
c18d06f8
TH		 740 * guranteed not to be running or scheduled.
741 *
742 * LOCKING:
743 * Kernel thread context (may sleep)
744 */
745
746static void ata_flush_pio_tasks(struct ata_port *ap)
747{
748 int tmp = 0;
749 unsigned long flags;
750
751 DPRINTK("ENTER\n");
752
753 spin_lock_irqsave(&ap->host_set->lock, flags);
754 ap->flags |= ATA_FLAG_FLUSH_PIO_TASK;
755 spin_unlock_irqrestore(&ap->host_set->lock, flags);
756
757 DPRINTK("flush #1\n");
758 flush_workqueue(ata_wq);
759
760 /*
761 * At this point, if a task is running, it's guaranteed to see
762 * the FLUSH flag; thus, it will never queue pio tasks again.
763 * Cancel and flush.
764 */
765 tmp |= cancel_delayed_work(&ap->pio_task);
c18d06f8
TH		 766 if (!tmp) {
767 DPRINTK("flush #2\n");
768 flush_workqueue(ata_wq);
769 }
770
771 spin_lock_irqsave(&ap->host_set->lock, flags);
772 ap->flags &= ~ATA_FLAG_FLUSH_PIO_TASK;
773 spin_unlock_irqrestore(&ap->host_set->lock, flags);
774
775 DPRINTK("EXIT\n");
95064379
TH		 776}
777
77853bf2 778void ata_qc_complete_internal(struct ata_queued_cmd *qc)
64f043d8 779{
77853bf2 780 struct completion *waiting = qc->private_data;
64f043d8 781
77853bf2 782 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 783 complete(waiting);
a2a7a662
TH		 784}
785
786/**
787 * ata_exec_internal - execute libata internal command
788 * @ap: Port to which the command is sent
789 * @dev: Device to which the command is sent
790 * @tf: Taskfile registers for the command and the result
791 * @dma_dir: Data tranfer direction of the command
792 * @buf: Data buffer of the command
793 * @buflen: Length of data buffer
794 *
795 * Executes libata internal command with timeout. @tf contains
796 * command on entry and result on return. Timeout and error
797 * conditions are reported via return value. No recovery action
798 * is taken after a command times out. It's caller's duty to
799 * clean up after timeout.
800 *
801 * LOCKING:
802 * None. Should be called with kernel context, might sleep.
803 */
804
805static unsigned
806ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
807 struct ata_taskfile *tf,
808 int dma_dir, void *buf, unsigned int buflen)
809{
810 u8 command = tf->command;
811 struct ata_queued_cmd *qc;
812 DECLARE_COMPLETION(wait);
813 unsigned long flags;
77853bf2 814 unsigned int err_mask;
a2a7a662
TH		 815
816 spin_lock_irqsave(&ap->host_set->lock, flags);
817
818 qc = ata_qc_new_init(ap, dev);
819 BUG_ON(qc == NULL);
820
821 qc->tf = *tf;
822 qc->dma_dir = dma_dir;
823 if (dma_dir != DMA_NONE) {
824 ata_sg_init_one(qc, buf, buflen);
825 qc->nsect = buflen / ATA_SECT_SIZE;
826 }
827
77853bf2 828 qc->private_data = &wait;
a2a7a662
TH		 829 qc->complete_fn = ata_qc_complete_internal;
830
9a3d9eb0
TH		 831 qc->err_mask = ata_qc_issue(qc);
832 if (qc->err_mask)
8e436af9 833 ata_qc_complete(qc);
a2a7a662
TH		 834
835 spin_unlock_irqrestore(&ap->host_set->lock, flags);
836
837 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
838 spin_lock_irqsave(&ap->host_set->lock, flags);
839
840 /* We're racing with irq here. If we lose, the
841 * following test prevents us from completing the qc
842 * again. If completion irq occurs after here but
843 * before the caller cleans up, it will result in a
844 * spurious interrupt. We can live with that.
845 */
77853bf2 846 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 847 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 848 ata_qc_complete(qc);
849 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
850 ap->id, command);
64f043d8
JG		 851 }
852
a2a7a662 853 spin_unlock_irqrestore(&ap->host_set->lock, flags);
64f043d8
JG		 854 }
855
77853bf2
TH		 856 *tf = qc->tf;
857 err_mask = qc->err_mask;
858
859 ata_qc_free(qc);
860
861 return err_mask;
64f043d8
JG		 862}
863
1bc4ccff
AC		 864/**
865 * ata_pio_need_iordy - check if iordy needed
866 * @adev: ATA device
867 *
868 * Check if the current speed of the device requires IORDY. Used
869 * by various controllers for chip configuration.
870 */
871
872unsigned int ata_pio_need_iordy(const struct ata_device *adev)
873{
874 int pio;
875 int speed = adev->pio_mode - XFER_PIO_0;
876
877 if (speed < 2)
878 return 0;
879 if (speed > 2)
880 return 1;
881
882 /* If we have no drive specific rule, then PIO 2 is non IORDY */
883
884 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
885 pio = adev->id[ATA_ID_EIDE_PIO];
886 /* Is the speed faster than the drive allows non IORDY ? */
887 if (pio) {
888 /* This is cycle times not frequency - watch the logic! */
889 if (pio > 240) /* PIO2 is 240nS per cycle */
890 return 1;
891 return 0;
892 }
893 }
894 return 0;
895}
896
1da177e4
LT		 897/**
898 * ata_dev_identify - obtain IDENTIFY x DEVICE page
899 * @ap: port on which device we wish to probe resides
900 * @device: device bus address, starting at zero
901 *
902 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
903 * command, and read back the 512-byte device information page.
904 * The device information page is fed to us via the standard
905 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
906 * using standard PIO-IN paths)
907 *
908 * After reading the device information page, we use several
909 * bits of information from it to initialize data structures
910 * that will be used during the lifetime of the ata_device.
911 * Other data from the info page is used to disqualify certain
912 * older ATA devices we do not wish to support.
913 *
914 * LOCKING:
915 * Inherited from caller. Some functions called by this function
916 * obtain the host_set lock.
917 */
918
919static void ata_dev_identify(struct ata_port *ap, unsigned int device)
920{
921 struct ata_device *dev = &ap->device[device];
8bf62ece 922 unsigned int major_version;
1da177e4 923 unsigned long xfer_modes;
1da177e4 924 unsigned int using_edd;
a0123703
TH		 925 struct ata_taskfile tf;
926 unsigned int err_mask;
6e7846e9 927 int i, rc;
1da177e4
LT		 928
929 if (!ata_dev_present(dev)) {
930 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
931 ap->id, device);
932 return;
933 }
934
61eb066a
TH		 935 if (ap->ops->probe_reset ||
936 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1da177e4
LT		 937 using_edd = 0;
938 else
939 using_edd = 1;
940
941 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
942
a4631474
TH		 943 WARN_ON(dev->class != ATA_DEV_ATA && dev->class != ATA_DEV_ATAPI &&
944 dev->class != ATA_DEV_NONE);
1da177e4
LT		 945
946 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
947
1da177e4 948retry:
a0123703
TH		 949 ata_tf_init(ap, &tf, device);
950
1da177e4 951 if (dev->class == ATA_DEV_ATA) {
a0123703 952 tf.command = ATA_CMD_ID_ATA;
1da177e4
LT		 953 DPRINTK("do ATA identify\n");
954 } else {
a0123703 955 tf.command = ATA_CMD_ID_ATAPI;
1da177e4
LT		 956 DPRINTK("do ATAPI identify\n");
957 }
958
a0123703 959 tf.protocol = ATA_PROT_PIO;
1da177e4 960
a0123703
TH		 961 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
962 dev->id, sizeof(dev->id));
1da177e4 963
a0123703
TH		 964 if (err_mask) {
965 if (err_mask & ~AC_ERR_DEV)
966 goto err_out;
1da177e4 967
1da177e4
LT		 968 /*
969 * arg! EDD works for all test cases, but seems to return
970 * the ATA signature for some ATAPI devices. Until the
971 * reason for this is found and fixed, we fix up the mess
972 * here. If IDENTIFY DEVICE returns command aborted
973 * (as ATAPI devices do), then we issue an
974 * IDENTIFY PACKET DEVICE.
975 *
976 * ATA software reset (SRST, the default) does not appear
977 * to have this problem.
978 */
7c398335 979 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
a0123703 980 u8 err = tf.feature;
1da177e4
LT		 981 if (err & ATA_ABORTED) {
982 dev->class = ATA_DEV_ATAPI;
1da177e4
LT		 983 goto retry;
984 }
985 }
986 goto err_out;
987 }
988
989 swap_buf_le16(dev->id, ATA_ID_WORDS);
990
991 /* print device capabilities */
992 printk(KERN_DEBUG "ata%u: dev %u cfg "
993 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
994 ap->id, device, dev->id[49],
995 dev->id[82], dev->id[83], dev->id[84],
996 dev->id[85], dev->id[86], dev->id[87],
997 dev->id[88]);
998
999 /*
1000 * common ATA, ATAPI feature tests
1001 */
1002
8bf62ece
AL		 1003 /* we require DMA support (bits 8 of word 49) */
1004 if (!ata_id_has_dma(dev->id)) {
1005 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1da177e4
LT		 1006 goto err_out_nosup;
1007 }
1008
1009 /* quick-n-dirty find max transfer mode; for printk only */
1010 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1011 if (!xfer_modes)
1012 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
11e29e21
AC		 1013 if (!xfer_modes)
1014 xfer_modes = ata_pio_modes(dev);
1da177e4 1015
0bd3300a 1016 ata_dump_id(dev->id);
1da177e4
LT		 1017
1018 /* ATA-specific feature tests */
1019 if (dev->class == ATA_DEV_ATA) {
2940740b
TH		 1020 dev->n_sectors = ata_id_n_sectors(dev->id);
1021
1da177e4
LT		 1022 if (!ata_id_is_ata(dev->id)) /* sanity check */
1023 goto err_out_nosup;
1024
8bf62ece 1025 /* get major version */
3d2ca910 1026 major_version = ata_id_major_version(dev->id);
1da177e4 1027
8bf62ece
AL		 1028 /*
1029 * The exact sequence expected by certain pre-ATA4 drives is:
1030 * SRST RESET
1031 * IDENTIFY
1032 * INITIALIZE DEVICE PARAMETERS
1033 * anything else..
1034 * Some drives were very specific about that exact sequence.
1035 */
59a10b17 1036 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
8bf62ece
AL		 1037 ata_dev_init_params(ap, dev);
1038
59a10b17
AL		 1039 /* current CHS translation info (id[53-58]) might be
1040 * changed. reread the identify device info.
1041 */
1042 ata_dev_reread_id(ap, dev);
1043 }
1044
8bf62ece
AL		 1045 if (ata_id_has_lba(dev->id)) {
1046 dev->flags |= ATA_DFLAG_LBA;
1047
2940740b 1048 if (ata_id_has_lba48(dev->id))
8bf62ece 1049 dev->flags |= ATA_DFLAG_LBA48;
8bf62ece
AL		 1050
1051 /* print device info to dmesg */
1052 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1053 ap->id, device,
1054 major_version,
1055 ata_mode_string(xfer_modes),
1056 (unsigned long long)dev->n_sectors,
1057 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1058 } else {
1059 /* CHS */
1060
1061 /* Default translation */
1062 dev->cylinders = dev->id[1];
1063 dev->heads = dev->id[3];
1064 dev->sectors = dev->id[6];
8bf62ece
AL		 1065
1066 if (ata_id_current_chs_valid(dev->id)) {
1067 /* Current CHS translation is valid. */
1068 dev->cylinders = dev->id[54];
1069 dev->heads = dev->id[55];
1070 dev->sectors = dev->id[56];
8bf62ece
AL		 1071 }
1072
1073 /* print device info to dmesg */
1074 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1075 ap->id, device,
1076 major_version,
1077 ata_mode_string(xfer_modes),
1078 (unsigned long long)dev->n_sectors,
1079 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1da177e4 1080
1da177e4
LT		 1081 }
1082
07f6f7d0
AL		 1083 if (dev->id[59] & 0x100) {
1084 dev->multi_count = dev->id[59] & 0xff;
1085 DPRINTK("ata%u: dev %u multi count %u\n",
1086 ap->id, device, dev->multi_count);
1087 }
1088
1da177e4
LT		 1089 }
1090
1091 /* ATAPI-specific feature tests */
2c13b7ce 1092 else if (dev->class == ATA_DEV_ATAPI) {
1da177e4
LT		 1093 if (ata_id_is_ata(dev->id)) /* sanity check */
1094 goto err_out_nosup;
1095
1096 rc = atapi_cdb_len(dev->id);
1097 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1098 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1099 goto err_out_nosup;
1100 }
6e7846e9 1101 dev->cdb_len = (unsigned int) rc;
1da177e4 1102
312f7da2
AL		 1103 if (ata_id_cdb_intr(dev->id))
1104 dev->flags |= ATA_DFLAG_CDB_INTR;
1105
1da177e4
LT		 1106 /* print device info to dmesg */
1107 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1108 ap->id, device,
1109 ata_mode_string(xfer_modes));
1110 }
1111
6e7846e9
TH		 1112 ap->host->max_cmd_len = 0;
1113 for (i = 0; i < ATA_MAX_DEVICES; i++)
1114 ap->host->max_cmd_len = max_t(unsigned int,
1115 ap->host->max_cmd_len,
1116 ap->device[i].cdb_len);
1117
1da177e4
LT		 1118 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1119 return;
1120
1121err_out_nosup:
1122 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1123 ap->id, device);
1124err_out:
1125 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1126 DPRINTK("EXIT, err\n");
1127}
1128
6f2f3812 1129
8eabd02c
TH		 1130static inline u8 ata_dev_knobble(const struct ata_port *ap,
1131 struct ata_device *dev)
6f2f3812 1132{
8eabd02c 1133 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
6f2f3812
BC		 1134}
1135
1136/**
c893a3ae
RD		 1137 * ata_dev_config - Run device specific handlers & check for SATA->PATA bridges
1138 * @ap: Bus
1139 * @i: Device
6f2f3812 1140 *
c893a3ae 1141 * LOCKING:
6f2f3812 1142 */
8a60a071 1143
6f2f3812
BC		 1144void ata_dev_config(struct ata_port *ap, unsigned int i)
1145{
1146 /* limit bridge transfers to udma5, 200 sectors */
8eabd02c 1147 if (ata_dev_knobble(ap, &ap->device[i])) {
6f2f3812 1148 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
8eabd02c 1149 ap->id, i);
6f2f3812 1150 ap->udma_mask &= ATA_UDMA5;
b00eec1d 1151 ap->device[i].max_sectors = ATA_MAX_SECTORS;
6f2f3812
BC		 1152 }
1153
1154 if (ap->ops->dev_config)
1155 ap->ops->dev_config(ap, &ap->device[i]);
1156}
1157
1da177e4
LT		 1158/**
1159 * ata_bus_probe - Reset and probe ATA bus
1160 * @ap: Bus to probe
1161 *
0cba632b
JG		 1162 * Master ATA bus probing function. Initiates a hardware-dependent
1163 * bus reset, then attempts to identify any devices found on
1164 * the bus.
1165 *
1da177e4 1166 * LOCKING:
0cba632b 1167 * PCI/etc. bus probe sem.
1da177e4
LT		 1168 *
1169 * RETURNS:
1170 * Zero on success, non-zero on error.
1171 */
1172
1173static int ata_bus_probe(struct ata_port *ap)
1174{
1175 unsigned int i, found = 0;
1176
c19ba8af
TH		 1177 if (ap->ops->probe_reset) {
1178 unsigned int classes[ATA_MAX_DEVICES];
1179 int rc;
1180
1181 ata_port_probe(ap);
1182
1183 rc = ap->ops->probe_reset(ap, classes);
1184 if (rc == 0) {
06ab7822
TH		 1185 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1186 if (classes[i] == ATA_DEV_UNKNOWN)
1187 classes[i] = ATA_DEV_NONE;
c19ba8af 1188 ap->device[i].class = classes[i];
06ab7822 1189 }
c19ba8af
TH		 1190 } else {
1191 printk(KERN_ERR "ata%u: probe reset failed, "
1192 "disabling port\n", ap->id);
1193 ata_port_disable(ap);
1194 }
1195 } else
1196 ap->ops->phy_reset(ap);
1197
1da177e4
LT		 1198 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1199 goto err_out;
1200
1201 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1202 ata_dev_identify(ap, i);
1203 if (ata_dev_present(&ap->device[i])) {
1204 found = 1;
6f2f3812 1205 ata_dev_config(ap,i);
1da177e4
LT		 1206 }
1207 }
1208
1209 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1210 goto err_out_disable;
1211
1212 ata_set_mode(ap);
1213 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1214 goto err_out_disable;
1215
1216 return 0;
1217
1218err_out_disable:
1219 ap->ops->port_disable(ap);
1220err_out:
1221 return -1;
1222}
1223
1224/**
0cba632b
JG		 1225 * ata_port_probe - Mark port as enabled
1226 * @ap: Port for which we indicate enablement
1da177e4 1227 *
0cba632b
JG		 1228 * Modify @ap data structure such that the system
1229 * thinks that the entire port is enabled.
1230 *
1231 * LOCKING: host_set lock, or some other form of
1232 * serialization.
1da177e4
LT		 1233 */
1234
1235void ata_port_probe(struct ata_port *ap)
1236{
1237 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1238}
1239
3be680b7
TH		 1240/**
1241 * sata_print_link_status - Print SATA link status
1242 * @ap: SATA port to printk link status about
1243 *
1244 * This function prints link speed and status of a SATA link.
1245 *
1246 * LOCKING:
1247 * None.
1248 */
1249static void sata_print_link_status(struct ata_port *ap)
1250{
1251 u32 sstatus, tmp;
1252 const char *speed;
1253
1254 if (!ap->ops->scr_read)
1255 return;
1256
1257 sstatus = scr_read(ap, SCR_STATUS);
1258
1259 if (sata_dev_present(ap)) {
1260 tmp = (sstatus >> 4) & 0xf;
1261 if (tmp & (1 << 0))
1262 speed = "1.5";
1263 else if (tmp & (1 << 1))
1264 speed = "3.0";
1265 else
1266 speed = "<unknown>";
1267 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1268 ap->id, speed, sstatus);
1269 } else {
1270 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1271 ap->id, sstatus);
1272 }
1273}
1274
1da177e4 1275/**
780a87f7
JG		 1276 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1277 * @ap: SATA port associated with target SATA PHY.
1da177e4 1278 *
780a87f7
JG		 1279 * This function issues commands to standard SATA Sxxx
1280 * PHY registers, to wake up the phy (and device), and
1281 * clear any reset condition.
1da177e4
LT		 1282 *
1283 * LOCKING:
0cba632b 1284 * PCI/etc. bus probe sem.
1da177e4
LT		 1285 *
1286 */
1287void __sata_phy_reset(struct ata_port *ap)
1288{
1289 u32 sstatus;
1290 unsigned long timeout = jiffies + (HZ * 5);
1291
1292 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1293 /* issue phy wake/reset */
1294 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1295 /* Couldn't find anything in SATA I/II specs, but
1296 * AHCI-1.1 10.4.2 says at least 1 ms. */
1297 mdelay(1);
1da177e4 1298 }
cdcca89e 1299 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1300
1301 /* wait for phy to become ready, if necessary */
1302 do {
1303 msleep(200);
1304 sstatus = scr_read(ap, SCR_STATUS);
1305 if ((sstatus & 0xf) != 1)
1306 break;
1307 } while (time_before(jiffies, timeout));
1308
3be680b7
TH		 1309 /* print link status */
1310 sata_print_link_status(ap);
656563e3 1311
3be680b7
TH		 1312 /* TODO: phy layer with polling, timeouts, etc. */
1313 if (sata_dev_present(ap))
1da177e4 1314 ata_port_probe(ap);
3be680b7 1315 else
1da177e4 1316 ata_port_disable(ap);
1da177e4
LT		 1317
1318 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1319 return;
1320
1321 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1322 ata_port_disable(ap);
1323 return;
1324 }
1325
1326 ap->cbl = ATA_CBL_SATA;
1327}
1328
1329/**
780a87f7
JG		 1330 * sata_phy_reset - Reset SATA bus.
1331 * @ap: SATA port associated with target SATA PHY.
1da177e4 1332 *
780a87f7
JG		 1333 * This function resets the SATA bus, and then probes
1334 * the bus for devices.
1da177e4
LT		 1335 *
1336 * LOCKING:
0cba632b 1337 * PCI/etc. bus probe sem.
1da177e4
LT		 1338 *
1339 */
1340void sata_phy_reset(struct ata_port *ap)
1341{
1342 __sata_phy_reset(ap);
1343 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1344 return;
1345 ata_bus_reset(ap);
1346}
1347
1348/**
780a87f7
JG		 1349 * ata_port_disable - Disable port.
1350 * @ap: Port to be disabled.
1da177e4 1351 *
780a87f7
JG		 1352 * Modify @ap data structure such that the system
1353 * thinks that the entire port is disabled, and should
1354 * never attempt to probe or communicate with devices
1355 * on this port.
1356 *
1357 * LOCKING: host_set lock, or some other form of
1358 * serialization.
1da177e4
LT		 1359 */
1360
1361void ata_port_disable(struct ata_port *ap)
1362{
1363 ap->device[0].class = ATA_DEV_NONE;
1364 ap->device[1].class = ATA_DEV_NONE;
1365 ap->flags |= ATA_FLAG_PORT_DISABLED;
1366}
1367
452503f9
AC		 1368/*
1369 * This mode timing computation functionality is ported over from
1370 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1371 */
1372/*
1373 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1374 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1375 * for PIO 5, which is a nonstandard extension and UDMA6, which
1376 * is currently supported only by Maxtor drives.
1377 */
1378
1379static const struct ata_timing ata_timing[] = {
1380
1381 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1382 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1383 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1384 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1385
1386 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1387 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1388 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1389
1390/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1391
1392 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1393 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1394 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1395
1396 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1397 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1398 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1399
1400/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1401 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1402 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1403
1404 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1405 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1406 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1407
1408/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1409
1410 { 0xFF }
1411};
1412
1413#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1414#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1415
1416static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1417{
1418 q->setup = EZ(t->setup * 1000, T);
1419 q->act8b = EZ(t->act8b * 1000, T);
1420 q->rec8b = EZ(t->rec8b * 1000, T);
1421 q->cyc8b = EZ(t->cyc8b * 1000, T);
1422 q->active = EZ(t->active * 1000, T);
1423 q->recover = EZ(t->recover * 1000, T);
1424 q->cycle = EZ(t->cycle * 1000, T);
1425 q->udma = EZ(t->udma * 1000, UT);
1426}
1427
1428void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1429 struct ata_timing *m, unsigned int what)
1430{
1431 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1432 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1433 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1434 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1435 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1436 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1437 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1438 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1439}
1440
1441static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1442{
1443 const struct ata_timing *t;
1444
1445 for (t = ata_timing; t->mode != speed; t++)
91190758 1446 if (t->mode == 0xFF)
452503f9
AC		 1447 return NULL;
1448 return t;
1449}
1450
1451int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1452 struct ata_timing *t, int T, int UT)
1453{
1454 const struct ata_timing *s;
1455 struct ata_timing p;
1456
1457 /*
1458 * Find the mode.
75b1f2f8 1459 */
452503f9
AC		 1460
1461 if (!(s = ata_timing_find_mode(speed)))
1462 return -EINVAL;
1463
75b1f2f8
AL		 1464 memcpy(t, s, sizeof(*s));
1465
452503f9
AC		 1466 /*
1467 * If the drive is an EIDE drive, it can tell us it needs extended
1468 * PIO/MW_DMA cycle timing.
1469 */
1470
1471 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1472 memset(&p, 0, sizeof(p));
1473 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1474 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1475 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1476 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1477 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1478 }
1479 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1480 }
1481
1482 /*
1483 * Convert the timing to bus clock counts.
1484 */
1485
75b1f2f8 1486 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1487
1488 /*
c893a3ae
RD		 1489 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1490 * S.M.A.R.T * and some other commands. We have to ensure that the
1491 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1492 */
1493
1494 if (speed > XFER_PIO_4) {
1495 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1496 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1497 }
1498
1499 /*
c893a3ae 1500 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1501 */
1502
1503 if (t->act8b + t->rec8b < t->cyc8b) {
1504 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1505 t->rec8b = t->cyc8b - t->act8b;
1506 }
1507
1508 if (t->active + t->recover < t->cycle) {
1509 t->active += (t->cycle - (t->active + t->recover)) / 2;
1510 t->recover = t->cycle - t->active;
1511 }
1512
1513 return 0;
1514}
1515
057ace5e 1516static const struct {
1da177e4
LT		 1517 unsigned int shift;
1518 u8 base;
1519} xfer_mode_classes[] = {
1520 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1521 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1522 { ATA_SHIFT_PIO, XFER_PIO_0 },
1523};
1524
858119e1 1525static u8 base_from_shift(unsigned int shift)
1da177e4
LT		 1526{
1527 int i;
1528
1529 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1530 if (xfer_mode_classes[i].shift == shift)
1531 return xfer_mode_classes[i].base;
1532
1533 return 0xff;
1534}
1535
1536static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1537{
1538 int ofs, idx;
1539 u8 base;
1540
1541 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1542 return;
1543
1544 if (dev->xfer_shift == ATA_SHIFT_PIO)
1545 dev->flags |= ATA_DFLAG_PIO;
1546
1547 ata_dev_set_xfermode(ap, dev);
1548
1549 base = base_from_shift(dev->xfer_shift);
1550 ofs = dev->xfer_mode - base;
1551 idx = ofs + dev->xfer_shift;
1552 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1553
1554 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1555 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1556
1557 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1558 ap->id, dev->devno, xfer_mode_str[idx]);
1559}
1560
1561static int ata_host_set_pio(struct ata_port *ap)
1562{
1563 unsigned int mask;
1564 int x, i;
1565 u8 base, xfer_mode;
1566
1567 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1568 x = fgb(mask);
1569 if (x < 0) {
1570 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1571 return -1;
1572 }
1573
1574 base = base_from_shift(ATA_SHIFT_PIO);
1575 xfer_mode = base + x;
1576
1577 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1578 (int)base, (int)xfer_mode, mask, x);
1579
1580 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1581 struct ata_device *dev = &ap->device[i];
1582 if (ata_dev_present(dev)) {
1583 dev->pio_mode = xfer_mode;
1584 dev->xfer_mode = xfer_mode;
1585 dev->xfer_shift = ATA_SHIFT_PIO;
1586 if (ap->ops->set_piomode)
1587 ap->ops->set_piomode(ap, dev);
1588 }
1589 }
1590
1591 return 0;
1592}
1593
1594static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1595 unsigned int xfer_shift)
1596{
1597 int i;
1598
1599 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1600 struct ata_device *dev = &ap->device[i];
1601 if (ata_dev_present(dev)) {
1602 dev->dma_mode = xfer_mode;
1603 dev->xfer_mode = xfer_mode;
1604 dev->xfer_shift = xfer_shift;
1605 if (ap->ops->set_dmamode)
1606 ap->ops->set_dmamode(ap, dev);
1607 }
1608 }
1609}
1610
1611/**
1612 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1613 * @ap: port on which timings will be programmed
1614 *
780a87f7
JG		 1615 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1616 *
1da177e4 1617 * LOCKING:
0cba632b 1618 * PCI/etc. bus probe sem.
1da177e4
LT		 1619 */
1620static void ata_set_mode(struct ata_port *ap)
1621{
8cbd6df1 1622 unsigned int xfer_shift;
1da177e4
LT		 1623 u8 xfer_mode;
1624 int rc;
1625
1626 /* step 1: always set host PIO timings */
1627 rc = ata_host_set_pio(ap);
1628 if (rc)
1629 goto err_out;
1630
1631 /* step 2: choose the best data xfer mode */
1632 xfer_mode = xfer_shift = 0;
1633 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1634 if (rc)
1635 goto err_out;
1636
1637 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1638 if (xfer_shift != ATA_SHIFT_PIO)
1639 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1640
1641 /* step 4: update devices' xfer mode */
1642 ata_dev_set_mode(ap, &ap->device[0]);
1643 ata_dev_set_mode(ap, &ap->device[1]);
1644
1645 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1646 return;
1647
1648 if (ap->ops->post_set_mode)
1649 ap->ops->post_set_mode(ap);
1650
1da177e4
LT		 1651 return;
1652
1653err_out:
1654 ata_port_disable(ap);
1655}
1656
1fdffbce
JG		 1657/**
1658 * ata_tf_to_host - issue ATA taskfile to host controller
1659 * @ap: port to which command is being issued
1660 * @tf: ATA taskfile register set
1661 *
1662 * Issues ATA taskfile register set to ATA host controller,
1663 * with proper synchronization with interrupt handler and
1664 * other threads.
1665 *
1666 * LOCKING:
1667 * spin_lock_irqsave(host_set lock)
1668 */
1669
1670static inline void ata_tf_to_host(struct ata_port *ap,
1671 const struct ata_taskfile *tf)
1672{
1673 ap->ops->tf_load(ap, tf);
1674 ap->ops->exec_command(ap, tf);
1675}
1676
1da177e4
LT		 1677/**
1678 * ata_busy_sleep - sleep until BSY clears, or timeout
1679 * @ap: port containing status register to be polled
1680 * @tmout_pat: impatience timeout
1681 * @tmout: overall timeout
1682 *
780a87f7
JG		 1683 * Sleep until ATA Status register bit BSY clears,
1684 * or a timeout occurs.
1685 *
1686 * LOCKING: None.
1da177e4
LT		 1687 */
1688
6f8b9958
TH		 1689unsigned int ata_busy_sleep (struct ata_port *ap,
1690 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1691{
1692 unsigned long timer_start, timeout;
1693 u8 status;
1694
1695 status = ata_busy_wait(ap, ATA_BUSY, 300);
1696 timer_start = jiffies;
1697 timeout = timer_start + tmout_pat;
1698 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1699 msleep(50);
1700 status = ata_busy_wait(ap, ATA_BUSY, 3);
1701 }
1702
1703 if (status & ATA_BUSY)
1704 printk(KERN_WARNING "ata%u is slow to respond, "
1705 "please be patient\n", ap->id);
1706
1707 timeout = timer_start + tmout;
1708 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1709 msleep(50);
1710 status = ata_chk_status(ap);
1711 }
1712
1713 if (status & ATA_BUSY) {
1714 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1715 ap->id, tmout / HZ);
1716 return 1;
1717 }
1718
1719 return 0;
1720}
1721
1722static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1723{
1724 struct ata_ioports *ioaddr = &ap->ioaddr;
1725 unsigned int dev0 = devmask & (1 << 0);
1726 unsigned int dev1 = devmask & (1 << 1);
1727 unsigned long timeout;
1728
1729 /* if device 0 was found in ata_devchk, wait for its
1730 * BSY bit to clear
1731 */
1732 if (dev0)
1733 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1734
1735 /* if device 1 was found in ata_devchk, wait for
1736 * register access, then wait for BSY to clear
1737 */
1738 timeout = jiffies + ATA_TMOUT_BOOT;
1739 while (dev1) {
1740 u8 nsect, lbal;
1741
1742 ap->ops->dev_select(ap, 1);
1743 if (ap->flags & ATA_FLAG_MMIO) {
1744 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1745 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1746 } else {
1747 nsect = inb(ioaddr->nsect_addr);
1748 lbal = inb(ioaddr->lbal_addr);
1749 }
1750 if ((nsect == 1) && (lbal == 1))
1751 break;
1752 if (time_after(jiffies, timeout)) {
1753 dev1 = 0;
1754 break;
1755 }
1756 msleep(50); /* give drive a breather */
1757 }
1758 if (dev1)
1759 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1760
1761 /* is all this really necessary? */
1762 ap->ops->dev_select(ap, 0);
1763 if (dev1)
1764 ap->ops->dev_select(ap, 1);
1765 if (dev0)
1766 ap->ops->dev_select(ap, 0);
1767}
1768
1769/**
0cba632b
JG		 1770 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1771 * @ap: Port to reset and probe
1772 *
1773 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1774 * probe the bus. Not often used these days.
1da177e4
LT		 1775 *
1776 * LOCKING:
0cba632b 1777 * PCI/etc. bus probe sem.
e5338254 1778 * Obtains host_set lock.
1da177e4
LT		 1779 *
1780 */
1781
1782static unsigned int ata_bus_edd(struct ata_port *ap)
1783{
1784 struct ata_taskfile tf;
e5338254 1785 unsigned long flags;
1da177e4
LT		 1786
1787 /* set up execute-device-diag (bus reset) taskfile */
1788 /* also, take interrupts to a known state (disabled) */
1789 DPRINTK("execute-device-diag\n");
1790 ata_tf_init(ap, &tf, 0);
1791 tf.ctl |= ATA_NIEN;
1792 tf.command = ATA_CMD_EDD;
1793 tf.protocol = ATA_PROT_NODATA;
1794
1795 /* do bus reset */
e5338254 1796 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1797 ata_tf_to_host(ap, &tf);
e5338254 1798 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1799
1800 /* spec says at least 2ms. but who knows with those
1801 * crazy ATAPI devices...
1802 */
1803 msleep(150);
1804
1805 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1806}
1807
1808static unsigned int ata_bus_softreset(struct ata_port *ap,
1809 unsigned int devmask)
1810{
1811 struct ata_ioports *ioaddr = &ap->ioaddr;
1812
1813 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1814
1815 /* software reset. causes dev0 to be selected */
1816 if (ap->flags & ATA_FLAG_MMIO) {
1817 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1818 udelay(20); /* FIXME: flush */
1819 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1820 udelay(20); /* FIXME: flush */
1821 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1822 } else {
1823 outb(ap->ctl, ioaddr->ctl_addr);
1824 udelay(10);
1825 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1826 udelay(10);
1827 outb(ap->ctl, ioaddr->ctl_addr);
1828 }
1829
1830 /* spec mandates ">= 2ms" before checking status.
1831 * We wait 150ms, because that was the magic delay used for
1832 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1833 * between when the ATA command register is written, and then
1834 * status is checked. Because waiting for "a while" before
1835 * checking status is fine, post SRST, we perform this magic
1836 * delay here as well.
1837 */
1838 msleep(150);
1839
1840 ata_bus_post_reset(ap, devmask);
1841
1842 return 0;
1843}
1844
1845/**
1846 * ata_bus_reset - reset host port and associated ATA channel
1847 * @ap: port to reset
1848 *
1849 * This is typically the first time we actually start issuing
1850 * commands to the ATA channel. We wait for BSY to clear, then
1851 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1852 * result. Determine what devices, if any, are on the channel
1853 * by looking at the device 0/1 error register. Look at the signature
1854 * stored in each device's taskfile registers, to determine if
1855 * the device is ATA or ATAPI.
1856 *
1857 * LOCKING:
0cba632b
JG		 1858 * PCI/etc. bus probe sem.
1859 * Obtains host_set lock.
1da177e4
LT		 1860 *
1861 * SIDE EFFECTS:
1862 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1863 */
1864
1865void ata_bus_reset(struct ata_port *ap)
1866{
1867 struct ata_ioports *ioaddr = &ap->ioaddr;
1868 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1869 u8 err;
1870 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1871
1872 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1873
1874 /* determine if device 0/1 are present */
1875 if (ap->flags & ATA_FLAG_SATA_RESET)
1876 dev0 = 1;
1877 else {
1878 dev0 = ata_devchk(ap, 0);
1879 if (slave_possible)
1880 dev1 = ata_devchk(ap, 1);
1881 }
1882
1883 if (dev0)
1884 devmask |= (1 << 0);
1885 if (dev1)
1886 devmask |= (1 << 1);
1887
1888 /* select device 0 again */
1889 ap->ops->dev_select(ap, 0);
1890
1891 /* issue bus reset */
1892 if (ap->flags & ATA_FLAG_SRST)
1893 rc = ata_bus_softreset(ap, devmask);
1894 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1895 /* set up device control */
1896 if (ap->flags & ATA_FLAG_MMIO)
1897 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1898 else
1899 outb(ap->ctl, ioaddr->ctl_addr);
1900 rc = ata_bus_edd(ap);
1901 }
1902
1903 if (rc)
1904 goto err_out;
1905
1906 /*
1907 * determine by signature whether we have ATA or ATAPI devices
1908 */
b4dc7623 1909 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 1910 if ((slave_possible) && (err != 0x81))
b4dc7623 1911 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 1912
1913 /* re-enable interrupts */
1914 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1915 ata_irq_on(ap);
1916
1917 /* is double-select really necessary? */
1918 if (ap->device[1].class != ATA_DEV_NONE)
1919 ap->ops->dev_select(ap, 1);
1920 if (ap->device[0].class != ATA_DEV_NONE)
1921 ap->ops->dev_select(ap, 0);
1922
1923 /* if no devices were detected, disable this port */
1924 if ((ap->device[0].class == ATA_DEV_NONE) &&
1925 (ap->device[1].class == ATA_DEV_NONE))
1926 goto err_out;
1927
1928 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1929 /* set up device control for ATA_FLAG_SATA_RESET */
1930 if (ap->flags & ATA_FLAG_MMIO)
1931 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1932 else
1933 outb(ap->ctl, ioaddr->ctl_addr);
1934 }
1935
1936 DPRINTK("EXIT\n");
1937 return;
1938
1939err_out:
1940 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1941 ap->ops->port_disable(ap);
1942
1943 DPRINTK("EXIT\n");
1944}
1945
7a7921e8
TH		 1946static int sata_phy_resume(struct ata_port *ap)
1947{
1948 unsigned long timeout = jiffies + (HZ * 5);
1949 u32 sstatus;
1950
1951 scr_write_flush(ap, SCR_CONTROL, 0x300);
1952
1953 /* Wait for phy to become ready, if necessary. */
1954 do {
1955 msleep(200);
1956 sstatus = scr_read(ap, SCR_STATUS);
1957 if ((sstatus & 0xf) != 1)
1958 return 0;
1959 } while (time_before(jiffies, timeout));
1960
1961 return -1;
1962}
1963
8a19ac89
TH		 1964/**
1965 * ata_std_probeinit - initialize probing
1966 * @ap: port to be probed
1967 *
1968 * @ap is about to be probed. Initialize it. This function is
1969 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 1970 *
1971 * NOTE!!! Do not use this function as probeinit if a low level
1972 * driver implements only hardreset. Just pass NULL as probeinit
1973 * in that case. Using this function is probably okay but doing
1974 * so makes reset sequence different from the original
1975 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 1976 */
1977extern void ata_std_probeinit(struct ata_port *ap)
1978{
3a39746a 1979 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 1980 sata_phy_resume(ap);
3a39746a
TH		 1981 if (sata_dev_present(ap))
1982 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1983 }
8a19ac89
TH		 1984}
1985
c2bd5804
TH		 1986/**
1987 * ata_std_softreset - reset host port via ATA SRST
1988 * @ap: port to reset
1989 * @verbose: fail verbosely
1990 * @classes: resulting classes of attached devices
1991 *
1992 * Reset host port using ATA SRST. This function is to be used
1993 * as standard callback for ata_drive_*_reset() functions.
1994 *
1995 * LOCKING:
1996 * Kernel thread context (may sleep)
1997 *
1998 * RETURNS:
1999 * 0 on success, -errno otherwise.
2000 */
2001int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2002{
2003 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2004 unsigned int devmask = 0, err_mask;
2005 u8 err;
2006
2007 DPRINTK("ENTER\n");
2008
3a39746a
TH		 2009 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2010 classes[0] = ATA_DEV_NONE;
2011 goto out;
2012 }
2013
c2bd5804
TH		 2014 /* determine if device 0/1 are present */
2015 if (ata_devchk(ap, 0))
2016 devmask |= (1 << 0);
2017 if (slave_possible && ata_devchk(ap, 1))
2018 devmask |= (1 << 1);
2019
c2bd5804
TH		 2020 /* select device 0 again */
2021 ap->ops->dev_select(ap, 0);
2022
2023 /* issue bus reset */
2024 DPRINTK("about to softreset, devmask=%x\n", devmask);
2025 err_mask = ata_bus_softreset(ap, devmask);
2026 if (err_mask) {
2027 if (verbose)
2028 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2029 ap->id, err_mask);
2030 else
2031 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2032 err_mask);
2033 return -EIO;
2034 }
2035
2036 /* determine by signature whether we have ATA or ATAPI devices */
2037 classes[0] = ata_dev_try_classify(ap, 0, &err);
2038 if (slave_possible && err != 0x81)
2039 classes[1] = ata_dev_try_classify(ap, 1, &err);
2040
3a39746a 2041 out:
c2bd5804
TH		 2042 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2043 return 0;
2044}
2045
2046/**
2047 * sata_std_hardreset - reset host port via SATA phy reset
2048 * @ap: port to reset
2049 * @verbose: fail verbosely
2050 * @class: resulting class of attached device
2051 *
2052 * SATA phy-reset host port using DET bits of SControl register.
2053 * This function is to be used as standard callback for
2054 * ata_drive_*_reset().
2055 *
2056 * LOCKING:
2057 * Kernel thread context (may sleep)
2058 *
2059 * RETURNS:
2060 * 0 on success, -errno otherwise.
2061 */
2062int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2063{
c2bd5804
TH		 2064 DPRINTK("ENTER\n");
2065
2066 /* Issue phy wake/reset */
2067 scr_write_flush(ap, SCR_CONTROL, 0x301);
2068
2069 /*
2070 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2071 * 10.4.2 says at least 1 ms.
2072 */
2073 msleep(1);
2074
7a7921e8
TH		 2075 /* Bring phy back */
2076 sata_phy_resume(ap);
c2bd5804 2077
c2bd5804
TH		 2078 /* TODO: phy layer with polling, timeouts, etc. */
2079 if (!sata_dev_present(ap)) {
2080 *class = ATA_DEV_NONE;
2081 DPRINTK("EXIT, link offline\n");
2082 return 0;
2083 }
2084
2085 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2086 if (verbose)
2087 printk(KERN_ERR "ata%u: COMRESET failed "
2088 "(device not ready)\n", ap->id);
2089 else
2090 DPRINTK("EXIT, device not ready\n");
2091 return -EIO;
2092 }
2093
3a39746a
TH		 2094 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2095
c2bd5804
TH		 2096 *class = ata_dev_try_classify(ap, 0, NULL);
2097
2098 DPRINTK("EXIT, class=%u\n", *class);
2099 return 0;
2100}
2101
2102/**
2103 * ata_std_postreset - standard postreset callback
2104 * @ap: the target ata_port
2105 * @classes: classes of attached devices
2106 *
2107 * This function is invoked after a successful reset. Note that
2108 * the device might have been reset more than once using
2109 * different reset methods before postreset is invoked.
2110 * postreset is also reponsible for setting cable type.
2111 *
2112 * This function is to be used as standard callback for
2113 * ata_drive_*_reset().
2114 *
2115 * LOCKING:
2116 * Kernel thread context (may sleep)
2117 */
2118void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2119{
2120 DPRINTK("ENTER\n");
2121
2122 /* set cable type */
2123 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2124 ap->cbl = ATA_CBL_SATA;
2125
2126 /* print link status */
2127 if (ap->cbl == ATA_CBL_SATA)
2128 sata_print_link_status(ap);
2129
3a39746a
TH		 2130 /* re-enable interrupts */
2131 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2132 ata_irq_on(ap);
c2bd5804
TH		 2133
2134 /* is double-select really necessary? */
2135 if (classes[0] != ATA_DEV_NONE)
2136 ap->ops->dev_select(ap, 1);
2137 if (classes[1] != ATA_DEV_NONE)
2138 ap->ops->dev_select(ap, 0);
2139
3a39746a
TH		 2140 /* bail out if no device is present */
2141 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2142 DPRINTK("EXIT, no device\n");
2143 return;
2144 }
2145
2146 /* set up device control */
2147 if (ap->ioaddr.ctl_addr) {
2148 if (ap->flags & ATA_FLAG_MMIO)
2149 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2150 else
2151 outb(ap->ctl, ap->ioaddr.ctl_addr);
2152 }
c2bd5804
TH		 2153
2154 DPRINTK("EXIT\n");
2155}
2156
2157/**
2158 * ata_std_probe_reset - standard probe reset method
2159 * @ap: prot to perform probe-reset
2160 * @classes: resulting classes of attached devices
2161 *
2162 * The stock off-the-shelf ->probe_reset method.
2163 *
2164 * LOCKING:
2165 * Kernel thread context (may sleep)
2166 *
2167 * RETURNS:
2168 * 0 on success, -errno otherwise.
2169 */
2170int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2171{
2172 ata_reset_fn_t hardreset;
2173
2174 hardreset = NULL;
b911fc3a 2175 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2176 hardreset = sata_std_hardreset;
2177
8a19ac89 2178 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2179 ata_std_softreset, hardreset,
c2bd5804
TH		 2180 ata_std_postreset, classes);
2181}
2182
a62c0fc5
TH		 2183static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2184 ata_postreset_fn_t postreset,
2185 unsigned int *classes)
2186{
2187 int i, rc;
2188
2189 for (i = 0; i < ATA_MAX_DEVICES; i++)
2190 classes[i] = ATA_DEV_UNKNOWN;
2191
2192 rc = reset(ap, 0, classes);
2193 if (rc)
2194 return rc;
2195
2196 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2197 * is complete and convert all ATA_DEV_UNKNOWN to
2198 * ATA_DEV_NONE.
2199 */
2200 for (i = 0; i < ATA_MAX_DEVICES; i++)
2201 if (classes[i] != ATA_DEV_UNKNOWN)
2202 break;
2203
2204 if (i < ATA_MAX_DEVICES)
2205 for (i = 0; i < ATA_MAX_DEVICES; i++)
2206 if (classes[i] == ATA_DEV_UNKNOWN)
2207 classes[i] = ATA_DEV_NONE;
2208
2209 if (postreset)
2210 postreset(ap, classes);
2211
2212 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2213}
2214
2215/**
2216 * ata_drive_probe_reset - Perform probe reset with given methods
2217 * @ap: port to reset
7944ea95 2218 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2219 * @softreset: softreset method (can be NULL)
2220 * @hardreset: hardreset method (can be NULL)
2221 * @postreset: postreset method (can be NULL)
2222 * @classes: resulting classes of attached devices
2223 *
2224 * Reset the specified port and classify attached devices using
2225 * given methods. This function prefers softreset but tries all
2226 * possible reset sequences to reset and classify devices. This
2227 * function is intended to be used for constructing ->probe_reset
2228 * callback by low level drivers.
2229 *
2230 * Reset methods should follow the following rules.
2231 *
2232 * - Return 0 on sucess, -errno on failure.
2233 * - If classification is supported, fill classes[] with
2234 * recognized class codes.
2235 * - If classification is not supported, leave classes[] alone.
2236 * - If verbose is non-zero, print error message on failure;
2237 * otherwise, shut up.
2238 *
2239 * LOCKING:
2240 * Kernel thread context (may sleep)
2241 *
2242 * RETURNS:
2243 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2244 * if classification fails, and any error code from reset
2245 * methods.
2246 */
7944ea95 2247int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2248 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2249 ata_postreset_fn_t postreset, unsigned int *classes)
2250{
2251 int rc = -EINVAL;
2252
7944ea95
TH		 2253 if (probeinit)
2254 probeinit(ap);
2255
a62c0fc5
TH		 2256 if (softreset) {
2257 rc = do_probe_reset(ap, softreset, postreset, classes);
2258 if (rc == 0)
2259 return 0;
2260 }
2261
2262 if (!hardreset)
2263 return rc;
2264
2265 rc = do_probe_reset(ap, hardreset, postreset, classes);
2266 if (rc == 0 || rc != -ENODEV)
2267 return rc;
2268
2269 if (softreset)
2270 rc = do_probe_reset(ap, softreset, postreset, classes);
2271
2272 return rc;
2273}
2274
057ace5e
JG		 2275static void ata_pr_blacklisted(const struct ata_port *ap,
2276 const struct ata_device *dev)
1da177e4
LT		 2277{
2278 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2279 ap->id, dev->devno);
2280}
2281
98ac62de 2282static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2283 "WDC AC11000H",
2284 "WDC AC22100H",
2285 "WDC AC32500H",
2286 "WDC AC33100H",
2287 "WDC AC31600H",
2288 "WDC AC32100H",
2289 "WDC AC23200L",
2290 "Compaq CRD-8241B",
2291 "CRD-8400B",
2292 "CRD-8480B",
2293 "CRD-8482B",
2294 "CRD-84",
2295 "SanDisk SDP3B",
2296 "SanDisk SDP3B-64",
2297 "SANYO CD-ROM CRD",
2298 "HITACHI CDR-8",
2299 "HITACHI CDR-8335",
2300 "HITACHI CDR-8435",
2301 "Toshiba CD-ROM XM-6202B",
e922256a 2302 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2303 "CD-532E-A",
2304 "E-IDE CD-ROM CR-840",
2305 "CD-ROM Drive/F5A",
2306 "WPI CDD-820",
2307 "SAMSUNG CD-ROM SC-148C",
2308 "SAMSUNG CD-ROM SC",
2309 "SanDisk SDP3B-64",
1da177e4
LT		 2310 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2311 "_NEC DV5800A",
2312};
2313
057ace5e 2314static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2315{
2e02671d 2316 unsigned char model_num[41];
1da177e4
LT		 2317 int i;
2318
2e02671d
TH		 2319 ata_dev_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS,
2320 sizeof(model_num));
1da177e4
LT		 2321
2322 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2323 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2324 return 1;
2325
2326 return 0;
2327}
2328
057ace5e 2329static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
1da177e4 2330{
057ace5e 2331 const struct ata_device *master, *slave;
1da177e4
LT		 2332 unsigned int mask;
2333
2334 master = &ap->device[0];
2335 slave = &ap->device[1];
2336
a4631474 2337 WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave));
1da177e4
LT		 2338
2339 if (shift == ATA_SHIFT_UDMA) {
2340 mask = ap->udma_mask;
2341 if (ata_dev_present(master)) {
2342 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2343 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2344 mask = 0;
2345 ata_pr_blacklisted(ap, master);
2346 }
2347 }
2348 if (ata_dev_present(slave)) {
2349 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2350 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2351 mask = 0;
2352 ata_pr_blacklisted(ap, slave);
2353 }
2354 }
2355 }
2356 else if (shift == ATA_SHIFT_MWDMA) {
2357 mask = ap->mwdma_mask;
2358 if (ata_dev_present(master)) {
2359 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2360 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2361 mask = 0;
2362 ata_pr_blacklisted(ap, master);
2363 }
2364 }
2365 if (ata_dev_present(slave)) {
2366 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2367 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2368 mask = 0;
2369 ata_pr_blacklisted(ap, slave);
2370 }
2371 }
2372 }
2373 else if (shift == ATA_SHIFT_PIO) {
2374 mask = ap->pio_mask;
2375 if (ata_dev_present(master)) {
2376 /* spec doesn't return explicit support for
2377 * PIO0-2, so we fake it
2378 */
2379 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2380 tmp_mode <<= 3;
2381 tmp_mode |= 0x7;
2382 mask &= tmp_mode;
2383 }
2384 if (ata_dev_present(slave)) {
2385 /* spec doesn't return explicit support for
2386 * PIO0-2, so we fake it
2387 */
2388 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2389 tmp_mode <<= 3;
2390 tmp_mode |= 0x7;
2391 mask &= tmp_mode;
2392 }
2393 }
2394 else {
2395 mask = 0xffffffff; /* shut up compiler warning */
2396 BUG();
2397 }
2398
2399 return mask;
2400}
2401
2402/* find greatest bit */
2403static int fgb(u32 bitmap)
2404{
2405 unsigned int i;
2406 int x = -1;
2407
2408 for (i = 0; i < 32; i++)
2409 if (bitmap & (1 << i))
2410 x = i;
2411
2412 return x;
2413}
2414
2415/**
2416 * ata_choose_xfer_mode - attempt to find best transfer mode
2417 * @ap: Port for which an xfer mode will be selected
2418 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2419 * @xfer_shift_out: (output) bit shift that selects this mode
2420 *
0cba632b
JG		 2421 * Based on host and device capabilities, determine the
2422 * maximum transfer mode that is amenable to all.
2423 *
1da177e4 2424 * LOCKING:
0cba632b 2425 * PCI/etc. bus probe sem.
1da177e4
LT		 2426 *
2427 * RETURNS:
2428 * Zero on success, negative on error.
2429 */
2430
057ace5e 2431static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 2432 u8 *xfer_mode_out,
2433 unsigned int *xfer_shift_out)
2434{
2435 unsigned int mask, shift;
2436 int x, i;
2437
2438 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2439 shift = xfer_mode_classes[i].shift;
2440 mask = ata_get_mode_mask(ap, shift);
2441
2442 x = fgb(mask);
2443 if (x >= 0) {
2444 *xfer_mode_out = xfer_mode_classes[i].base + x;
2445 *xfer_shift_out = shift;
2446 return 0;
2447 }
2448 }
2449
2450 return -1;
2451}
2452
2453/**
2454 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2455 * @ap: Port associated with device @dev
2456 * @dev: Device to which command will be sent
2457 *
780a87f7
JG		 2458 * Issue SET FEATURES - XFER MODE command to device @dev
2459 * on port @ap.
2460 *
1da177e4 2461 * LOCKING:
0cba632b 2462 * PCI/etc. bus probe sem.
1da177e4
LT		 2463 */
2464
2465static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2466{
a0123703 2467 struct ata_taskfile tf;
1da177e4
LT		 2468
2469 /* set up set-features taskfile */
2470 DPRINTK("set features - xfer mode\n");
2471
a0123703
TH		 2472 ata_tf_init(ap, &tf, dev->devno);
2473 tf.command = ATA_CMD_SET_FEATURES;
2474 tf.feature = SETFEATURES_XFER;
2475 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2476 tf.protocol = ATA_PROT_NODATA;
2477 tf.nsect = dev->xfer_mode;
1da177e4 2478
a0123703
TH		 2479 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2480 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2481 ap->id);
1da177e4 2482 ata_port_disable(ap);
a0123703 2483 }
1da177e4
LT		 2484
2485 DPRINTK("EXIT\n");
2486}
2487
59a10b17
AL		 2488/**
2489 * ata_dev_reread_id - Reread the device identify device info
2490 * @ap: port where the device is
2491 * @dev: device to reread the identify device info
2492 *
2493 * LOCKING:
2494 */
2495
2496static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2497{
a0123703 2498 struct ata_taskfile tf;
59a10b17 2499
a0123703 2500 ata_tf_init(ap, &tf, dev->devno);
59a10b17
AL		 2501
2502 if (dev->class == ATA_DEV_ATA) {
a0123703 2503 tf.command = ATA_CMD_ID_ATA;
59a10b17
AL		 2504 DPRINTK("do ATA identify\n");
2505 } else {
a0123703 2506 tf.command = ATA_CMD_ID_ATAPI;
59a10b17
AL		 2507 DPRINTK("do ATAPI identify\n");
2508 }
2509
a0123703
TH		 2510 tf.flags |= ATA_TFLAG_DEVICE;
2511 tf.protocol = ATA_PROT_PIO;
59a10b17 2512
a0123703
TH		 2513 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2514 dev->id, sizeof(dev->id)))
59a10b17
AL		 2515 goto err_out;
2516
59a10b17
AL		 2517 swap_buf_le16(dev->id, ATA_ID_WORDS);
2518
0bd3300a 2519 ata_dump_id(dev->id);
59a10b17
AL		 2520
2521 DPRINTK("EXIT\n");
2522
2523 return;
2524err_out:
a0123703 2525 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
59a10b17
AL		 2526 ata_port_disable(ap);
2527}
2528
8bf62ece
AL		 2529/**
2530 * ata_dev_init_params - Issue INIT DEV PARAMS command
2531 * @ap: Port associated with device @dev
2532 * @dev: Device to which command will be sent
2533 *
2534 * LOCKING:
2535 */
2536
2537static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2538{
a0123703 2539 struct ata_taskfile tf;
8bf62ece
AL		 2540 u16 sectors = dev->id[6];
2541 u16 heads = dev->id[3];
2542
2543 /* Number of sectors per track 1-255. Number of heads 1-16 */
2544 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2545 return;
2546
2547 /* set up init dev params taskfile */
2548 DPRINTK("init dev params \n");
2549
a0123703
TH		 2550 ata_tf_init(ap, &tf, dev->devno);
2551 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2552 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2553 tf.protocol = ATA_PROT_NODATA;
2554 tf.nsect = sectors;
2555 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2556
a0123703
TH		 2557 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2558 printk(KERN_ERR "ata%u: failed to init parameters, disabled\n",
2559 ap->id);
8bf62ece 2560 ata_port_disable(ap);
a0123703 2561 }
8bf62ece
AL		 2562
2563 DPRINTK("EXIT\n");
2564}
2565
1da177e4 2566/**
0cba632b
JG		 2567 * ata_sg_clean - Unmap DMA memory associated with command
2568 * @qc: Command containing DMA memory to be released
2569 *
2570 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2571 *
2572 * LOCKING:
0cba632b 2573 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2574 */
2575
2576static void ata_sg_clean(struct ata_queued_cmd *qc)
2577{
2578 struct ata_port *ap = qc->ap;
cedc9a47 2579 struct scatterlist *sg = qc->__sg;
1da177e4 2580 int dir = qc->dma_dir;
cedc9a47 2581 void *pad_buf = NULL;
1da177e4 2582
a4631474
TH		 2583 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2584 WARN_ON(sg == NULL);
1da177e4
LT		 2585
2586 if (qc->flags & ATA_QCFLAG_SINGLE)
a4631474 2587 WARN_ON(qc->n_elem != 1);
1da177e4 2588
2c13b7ce 2589 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2590
cedc9a47
JG		 2591 /* if we padded the buffer out to 32-bit bound, and data
2592 * xfer direction is from-device, we must copy from the
2593 * pad buffer back into the supplied buffer
2594 */
2595 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2596 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2597
2598 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2599 if (qc->n_elem)
2600 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2601 /* restore last sg */
2602 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2603 if (pad_buf) {
2604 struct scatterlist *psg = &qc->pad_sgent;
2605 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2606 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2607 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2608 }
2609 } else {
e1410f2d
JG		 2610 if (sg_dma_len(&sg[0]) > 0)
2611 dma_unmap_single(ap->host_set->dev,
2612 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2613 dir);
cedc9a47
JG		 2614 /* restore sg */
2615 sg->length += qc->pad_len;
2616 if (pad_buf)
2617 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2618 pad_buf, qc->pad_len);
2619 }
1da177e4
LT		 2620
2621 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2622 qc->__sg = NULL;
1da177e4
LT		 2623}
2624
2625/**
2626 * ata_fill_sg - Fill PCI IDE PRD table
2627 * @qc: Metadata associated with taskfile to be transferred
2628 *
780a87f7
JG		 2629 * Fill PCI IDE PRD (scatter-gather) table with segments
2630 * associated with the current disk command.
2631 *
1da177e4 2632 * LOCKING:
780a87f7 2633 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2634 *
2635 */
2636static void ata_fill_sg(struct ata_queued_cmd *qc)
2637{
1da177e4 2638 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2639 struct scatterlist *sg;
2640 unsigned int idx;
1da177e4 2641
a4631474
TH		 2642 WARN_ON(qc->__sg == NULL);
2643 WARN_ON(qc->n_elem == 0);
1da177e4
LT		 2644
2645 idx = 0;
cedc9a47 2646 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2647 u32 addr, offset;
2648 u32 sg_len, len;
2649
2650 /* determine if physical DMA addr spans 64K boundary.
2651 * Note h/w doesn't support 64-bit, so we unconditionally
2652 * truncate dma_addr_t to u32.
2653 */
2654 addr = (u32) sg_dma_address(sg);
2655 sg_len = sg_dma_len(sg);
2656
2657 while (sg_len) {
2658 offset = addr & 0xffff;
2659 len = sg_len;
2660 if ((offset + sg_len) > 0x10000)
2661 len = 0x10000 - offset;
2662
2663 ap->prd[idx].addr = cpu_to_le32(addr);
2664 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2665 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2666
2667 idx++;
2668 sg_len -= len;
2669 addr += len;
2670 }
2671 }
2672
2673 if (idx)
2674 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2675}
2676/**
2677 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2678 * @qc: Metadata associated with taskfile to check
2679 *
780a87f7
JG		 2680 * Allow low-level driver to filter ATA PACKET commands, returning
2681 * a status indicating whether or not it is OK to use DMA for the
2682 * supplied PACKET command.
2683 *
1da177e4 2684 * LOCKING:
0cba632b
JG		 2685 * spin_lock_irqsave(host_set lock)
2686 *
1da177e4
LT		 2687 * RETURNS: 0 when ATAPI DMA can be used
2688 * nonzero otherwise
2689 */
2690int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2691{
2692 struct ata_port *ap = qc->ap;
2693 int rc = 0; /* Assume ATAPI DMA is OK by default */
2694
2695 if (ap->ops->check_atapi_dma)
2696 rc = ap->ops->check_atapi_dma(qc);
2697
2698 return rc;
2699}
2700/**
2701 * ata_qc_prep - Prepare taskfile for submission
2702 * @qc: Metadata associated with taskfile to be prepared
2703 *
780a87f7
JG		 2704 * Prepare ATA taskfile for submission.
2705 *
1da177e4
LT		 2706 * LOCKING:
2707 * spin_lock_irqsave(host_set lock)
2708 */
2709void ata_qc_prep(struct ata_queued_cmd *qc)
2710{
2711 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2712 return;
2713
2714 ata_fill_sg(qc);
2715}
2716
0cba632b
JG		 2717/**
2718 * ata_sg_init_one - Associate command with memory buffer
2719 * @qc: Command to be associated
2720 * @buf: Memory buffer
2721 * @buflen: Length of memory buffer, in bytes.
2722 *
2723 * Initialize the data-related elements of queued_cmd @qc
2724 * to point to a single memory buffer, @buf of byte length @buflen.
2725 *
2726 * LOCKING:
2727 * spin_lock_irqsave(host_set lock)
2728 */
2729
1da177e4
LT		 2730void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2731{
2732 struct scatterlist *sg;
2733
2734 qc->flags |= ATA_QCFLAG_SINGLE;
2735
2736 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2737 qc->__sg = &qc->sgent;
1da177e4 2738 qc->n_elem = 1;
cedc9a47 2739 qc->orig_n_elem = 1;
1da177e4
LT		 2740 qc->buf_virt = buf;
2741
cedc9a47 2742 sg = qc->__sg;
f0612bbc 2743 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2744}
2745
0cba632b
JG		 2746/**
2747 * ata_sg_init - Associate command with scatter-gather table.
2748 * @qc: Command to be associated
2749 * @sg: Scatter-gather table.
2750 * @n_elem: Number of elements in s/g table.
2751 *
2752 * Initialize the data-related elements of queued_cmd @qc
2753 * to point to a scatter-gather table @sg, containing @n_elem
2754 * elements.
2755 *
2756 * LOCKING:
2757 * spin_lock_irqsave(host_set lock)
2758 */
2759
1da177e4
LT		 2760void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2761 unsigned int n_elem)
2762{
2763 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2764 qc->__sg = sg;
1da177e4 2765 qc->n_elem = n_elem;
cedc9a47 2766 qc->orig_n_elem = n_elem;
1da177e4
LT		 2767}
2768
2769/**
0cba632b
JG		 2770 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2771 * @qc: Command with memory buffer to be mapped.
2772 *
2773 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2774 *
2775 * LOCKING:
2776 * spin_lock_irqsave(host_set lock)
2777 *
2778 * RETURNS:
0cba632b 2779 * Zero on success, negative on error.
1da177e4
LT		 2780 */
2781
2782static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2783{
2784 struct ata_port *ap = qc->ap;
2785 int dir = qc->dma_dir;
cedc9a47 2786 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 2787 dma_addr_t dma_address;
2788
cedc9a47
JG		 2789 /* we must lengthen transfers to end on a 32-bit boundary */
2790 qc->pad_len = sg->length & 3;
2791 if (qc->pad_len) {
2792 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2793 struct scatterlist *psg = &qc->pad_sgent;
2794
a4631474 2795 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2796
2797 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2798
2799 if (qc->tf.flags & ATA_TFLAG_WRITE)
2800 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2801 qc->pad_len);
2802
2803 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2804 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2805 /* trim sg */
2806 sg->length -= qc->pad_len;
2807
2808 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2809 sg->length, qc->pad_len);
2810 }
2811
e1410f2d
JG		 2812 if (!sg->length) {
2813 sg_dma_address(sg) = 0;
2814 goto skip_map;
2815 }
2816
1da177e4 2817 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2818 sg->length, dir);
537a95d9
TH		 2819 if (dma_mapping_error(dma_address)) {
2820 /* restore sg */
2821 sg->length += qc->pad_len;
1da177e4 2822 return -1;
537a95d9 2823 }
1da177e4
LT		 2824
2825 sg_dma_address(sg) = dma_address;
e1410f2d 2826skip_map:
32529e01 2827 sg_dma_len(sg) = sg->length;
1da177e4
LT		 2828
2829 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2830 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2831
2832 return 0;
2833}
2834
2835/**
0cba632b
JG		 2836 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2837 * @qc: Command with scatter-gather table to be mapped.
2838 *
2839 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2840 *
2841 * LOCKING:
2842 * spin_lock_irqsave(host_set lock)
2843 *
2844 * RETURNS:
0cba632b 2845 * Zero on success, negative on error.
1da177e4
LT		 2846 *
2847 */
2848
2849static int ata_sg_setup(struct ata_queued_cmd *qc)
2850{
2851 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2852 struct scatterlist *sg = qc->__sg;
2853 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 2854 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 2855
2856 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 2857 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 2858
cedc9a47
JG		 2859 /* we must lengthen transfers to end on a 32-bit boundary */
2860 qc->pad_len = lsg->length & 3;
2861 if (qc->pad_len) {
2862 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2863 struct scatterlist *psg = &qc->pad_sgent;
2864 unsigned int offset;
2865
a4631474 2866 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2867
2868 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2869
2870 /*
2871 * psg->page/offset are used to copy to-be-written
2872 * data in this function or read data in ata_sg_clean.
2873 */
2874 offset = lsg->offset + lsg->length - qc->pad_len;
2875 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2876 psg->offset = offset_in_page(offset);
2877
2878 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2879 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2880 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 2881 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2882 }
2883
2884 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2885 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2886 /* trim last sg */
2887 lsg->length -= qc->pad_len;
e1410f2d
JG		 2888 if (lsg->length == 0)
2889 trim_sg = 1;
cedc9a47
JG		 2890
2891 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2892 qc->n_elem - 1, lsg->length, qc->pad_len);
2893 }
2894
e1410f2d
JG		 2895 pre_n_elem = qc->n_elem;
2896 if (trim_sg && pre_n_elem)
2897 pre_n_elem--;
2898
2899 if (!pre_n_elem) {
2900 n_elem = 0;
2901 goto skip_map;
2902 }
2903
1da177e4 2904 dir = qc->dma_dir;
e1410f2d 2905 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 2906 if (n_elem < 1) {
2907 /* restore last sg */
2908 lsg->length += qc->pad_len;
1da177e4 2909 return -1;
537a95d9 2910 }
1da177e4
LT		 2911
2912 DPRINTK("%d sg elements mapped\n", n_elem);
2913
e1410f2d 2914skip_map:
1da177e4
LT		 2915 qc->n_elem = n_elem;
2916
2917 return 0;
2918}
2919
40e8c82c
TH		 2920/**
2921 * ata_poll_qc_complete - turn irq back on and finish qc
2922 * @qc: Command to complete
8e8b77dd 2923 * @err_mask: ATA status register content
40e8c82c
TH		 2924 *
2925 * LOCKING:
2926 * None. (grabs host lock)
2927 */
2928
a22e2eb0 2929void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 2930{
2931 struct ata_port *ap = qc->ap;
b8f6153e 2932 unsigned long flags;
40e8c82c 2933
b8f6153e 2934 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c 2935 ata_irq_on(ap);
a22e2eb0 2936 ata_qc_complete(qc);
b8f6153e 2937 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 2938}
2939
1da177e4 2940/**
c893a3ae 2941 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 2942 * @ap: the target ata_port
1da177e4
LT		 2943 *
2944 * LOCKING:
0cba632b 2945 * None. (executing in kernel thread context)
1da177e4
LT		 2946 *
2947 * RETURNS:
6f0ef4fa 2948 * timeout value to use
1da177e4
LT		 2949 */
2950
2951static unsigned long ata_pio_poll(struct ata_port *ap)
2952{
c14b8331 2953 struct ata_queued_cmd *qc;
1da177e4 2954 u8 status;
14be71f4
AL		 2955 unsigned int poll_state = HSM_ST_UNKNOWN;
2956 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 2957
c14b8331 2958 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 2959 WARN_ON(qc == NULL);
c14b8331 2960
14be71f4
AL		 2961 switch (ap->hsm_task_state) {
2962 case HSM_ST:
2963 case HSM_ST_POLL:
2964 poll_state = HSM_ST_POLL;
2965 reg_state = HSM_ST;
1da177e4 2966 break;
14be71f4
AL		 2967 case HSM_ST_LAST:
2968 case HSM_ST_LAST_POLL:
2969 poll_state = HSM_ST_LAST_POLL;
2970 reg_state = HSM_ST_LAST;
1da177e4
LT		 2971 break;
2972 default:
2973 BUG();
2974 break;
2975 }
2976
2977 status = ata_chk_status(ap);
2978 if (status & ATA_BUSY) {
2979 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 2980 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 2981 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 2982 return 0;
2983 }
14be71f4 2984 ap->hsm_task_state = poll_state;
1da177e4
LT		 2985 return ATA_SHORT_PAUSE;
2986 }
2987
14be71f4 2988 ap->hsm_task_state = reg_state;
1da177e4
LT		 2989 return 0;
2990}
2991
2992/**
6f0ef4fa
RD		 2993 * ata_pio_complete - check if drive is busy or idle
2994 * @ap: the target ata_port
1da177e4
LT		 2995 *
2996 * LOCKING:
0cba632b 2997 * None. (executing in kernel thread context)
7fb6ec28
JG		 2998 *
2999 * RETURNS:
fbcdd80b
AL		 3000 * Zero if qc completed.
3001 * Non-zero if has next.
1da177e4
LT		 3002 */
3003
7fb6ec28 3004static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3005{
3006 struct ata_queued_cmd *qc;
3007 u8 drv_stat;
3008
3009 /*
31433ea3
AC		 3010 * This is purely heuristic. This is a fast path. Sometimes when
3011 * we enter, BSY will be cleared in a chk-status or two. If not,
3012 * the drive is probably seeking or something. Snooze for a couple
3013 * msecs, then chk-status again. If still busy, fall back to
07f6f7d0 3014 * HSM_ST_LAST_POLL state.
1da177e4 3015 */
fe79e683
AL		 3016 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3017 if (drv_stat & ATA_BUSY) {
1da177e4 3018 msleep(2);
fe79e683
AL		 3019 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3020 if (drv_stat & ATA_BUSY) {
14be71f4 3021 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3022 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
fbcdd80b 3023 return 1;
1da177e4
LT		 3024 }
3025 }
3026
c14b8331 3027 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3028 WARN_ON(qc == NULL);
c14b8331 3029
1da177e4
LT		 3030 drv_stat = ata_wait_idle(ap);
3031 if (!ata_ok(drv_stat)) {
1c848984 3032 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3033 ap->hsm_task_state = HSM_ST_ERR;
fbcdd80b 3034 return 1;
1da177e4
LT		 3035 }
3036
14be71f4 3037 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3038
a4631474 3039 WARN_ON(qc->err_mask);
a22e2eb0 3040 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3041
3042 /* another command may start at this point */
3043
fbcdd80b 3044 return 0;
1da177e4
LT		 3045}
3046
0baab86b
EF		 3047
3048/**
c893a3ae 3049 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3050 * @buf: Buffer to swap
3051 * @buf_words: Number of 16-bit words in buffer.
3052 *
3053 * Swap halves of 16-bit words if needed to convert from
3054 * little-endian byte order to native cpu byte order, or
3055 * vice-versa.
3056 *
3057 * LOCKING:
6f0ef4fa 3058 * Inherited from caller.
0baab86b 3059 */
1da177e4
LT		 3060void swap_buf_le16(u16 *buf, unsigned int buf_words)
3061{
3062#ifdef __BIG_ENDIAN
3063 unsigned int i;
3064
3065 for (i = 0; i < buf_words; i++)
3066 buf[i] = le16_to_cpu(buf[i]);
3067#endif /* __BIG_ENDIAN */
3068}
3069
6ae4cfb5
AL		 3070/**
3071 * ata_mmio_data_xfer - Transfer data by MMIO
3072 * @ap: port to read/write
3073 * @buf: data buffer
3074 * @buflen: buffer length
344babaa 3075 * @write_data: read/write
6ae4cfb5
AL		 3076 *
3077 * Transfer data from/to the device data register by MMIO.
3078 *
3079 * LOCKING:
3080 * Inherited from caller.
6ae4cfb5
AL		 3081 */
3082
1da177e4
LT		 3083static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3084 unsigned int buflen, int write_data)
3085{
3086 unsigned int i;
3087 unsigned int words = buflen >> 1;
3088 u16 *buf16 = (u16 *) buf;
3089 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3090
6ae4cfb5 3091 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3092 if (write_data) {
3093 for (i = 0; i < words; i++)
3094 writew(le16_to_cpu(buf16[i]), mmio);
3095 } else {
3096 for (i = 0; i < words; i++)
3097 buf16[i] = cpu_to_le16(readw(mmio));
3098 }
6ae4cfb5
AL		 3099
3100 /* Transfer trailing 1 byte, if any. */
3101 if (unlikely(buflen & 0x01)) {
3102 u16 align_buf[1] = { 0 };
3103 unsigned char *trailing_buf = buf + buflen - 1;
3104
3105 if (write_data) {
3106 memcpy(align_buf, trailing_buf, 1);
3107 writew(le16_to_cpu(align_buf[0]), mmio);
3108 } else {
3109 align_buf[0] = cpu_to_le16(readw(mmio));
3110 memcpy(trailing_buf, align_buf, 1);
3111 }
3112 }
1da177e4
LT		 3113}
3114
6ae4cfb5
AL		 3115/**
3116 * ata_pio_data_xfer - Transfer data by PIO
3117 * @ap: port to read/write
3118 * @buf: data buffer
3119 * @buflen: buffer length
344babaa 3120 * @write_data: read/write
6ae4cfb5
AL		 3121 *
3122 * Transfer data from/to the device data register by PIO.
3123 *
3124 * LOCKING:
3125 * Inherited from caller.
6ae4cfb5
AL		 3126 */
3127
1da177e4
LT		 3128static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3129 unsigned int buflen, int write_data)
3130{
6ae4cfb5 3131 unsigned int words = buflen >> 1;
1da177e4 3132
6ae4cfb5 3133 /* Transfer multiple of 2 bytes */
1da177e4 3134 if (write_data)
6ae4cfb5 3135 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3136 else
6ae4cfb5
AL		 3137 insw(ap->ioaddr.data_addr, buf, words);
3138
3139 /* Transfer trailing 1 byte, if any. */
3140 if (unlikely(buflen & 0x01)) {
3141 u16 align_buf[1] = { 0 };
3142 unsigned char *trailing_buf = buf + buflen - 1;
3143
3144 if (write_data) {
3145 memcpy(align_buf, trailing_buf, 1);
3146 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3147 } else {
3148 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3149 memcpy(trailing_buf, align_buf, 1);
3150 }
3151 }
1da177e4
LT		 3152}
3153
6ae4cfb5
AL		 3154/**
3155 * ata_data_xfer - Transfer data from/to the data register.
3156 * @ap: port to read/write
3157 * @buf: data buffer
3158 * @buflen: buffer length
3159 * @do_write: read/write
3160 *
3161 * Transfer data from/to the device data register.
3162 *
3163 * LOCKING:
3164 * Inherited from caller.
6ae4cfb5
AL		 3165 */
3166
1da177e4
LT		 3167static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3168 unsigned int buflen, int do_write)
3169{
a1bd9e68
AC		 3170 /* Make the crap hardware pay the costs not the good stuff */
3171 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3172 unsigned long flags;
3173 local_irq_save(flags);
3174 if (ap->flags & ATA_FLAG_MMIO)
3175 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3176 else
3177 ata_pio_data_xfer(ap, buf, buflen, do_write);
3178 local_irq_restore(flags);
3179 } else {
3180 if (ap->flags & ATA_FLAG_MMIO)
3181 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3182 else
3183 ata_pio_data_xfer(ap, buf, buflen, do_write);
3184 }
1da177e4
LT		 3185}
3186
6ae4cfb5
AL		 3187/**
3188 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3189 * @qc: Command on going
3190 *
3191 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3192 *
3193 * LOCKING:
3194 * Inherited from caller.
3195 */
3196
1da177e4
LT		 3197static void ata_pio_sector(struct ata_queued_cmd *qc)
3198{
3199 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3200 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3201 struct ata_port *ap = qc->ap;
3202 struct page *page;
3203 unsigned int offset;
3204 unsigned char *buf;
3205
3206 if (qc->cursect == (qc->nsect - 1))
14be71f4 3207 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3208
3209 page = sg[qc->cursg].page;
3210 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3211
3212 /* get the current page and offset */
3213 page = nth_page(page, (offset >> PAGE_SHIFT));
3214 offset %= PAGE_SIZE;
3215
1da177e4
LT		 3216 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3217
91b8b313
AL		 3218 if (PageHighMem(page)) {
3219 unsigned long flags;
3220
3221 local_irq_save(flags);
3222 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3223
91b8b313
AL		 3224 /* do the actual data transfer */
3225 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
1da177e4 3226
91b8b313
AL		 3227 kunmap_atomic(buf, KM_IRQ0);
3228 local_irq_restore(flags);
3229 } else {
3230 buf = page_address(page);
3231 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3232 }
7282aa4b
AL		 3233
3234 qc->cursect++;
3235 qc->cursg_ofs++;
3236
3237 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3238 qc->cursg++;
3239 qc->cursg_ofs = 0;
3240 }
1da177e4
LT		 3241}
3242
07f6f7d0
AL		 3243/**
3244 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3245 * @qc: Command on going
3246 *
3247 * Transfer one or many ATA_SECT_SIZE of data from/to the
3248 * ATA device for the DRQ request.
3249 *
3250 * LOCKING:
3251 * Inherited from caller.
3252 */
3253
3254static void ata_pio_sectors(struct ata_queued_cmd *qc)
3255{
3256 if (is_multi_taskfile(&qc->tf)) {
3257 /* READ/WRITE MULTIPLE */
3258 unsigned int nsect;
3259
587005de 3260 WARN_ON(qc->dev->multi_count == 0);
07f6f7d0
AL		 3261
3262 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3263 while (nsect--)
3264 ata_pio_sector(qc);
3265 } else
3266 ata_pio_sector(qc);
3267}
3268
c71c1857
AL		 3269/**
3270 * atapi_send_cdb - Write CDB bytes to hardware
3271 * @ap: Port to which ATAPI device is attached.
3272 * @qc: Taskfile currently active
3273 *
3274 * When device has indicated its readiness to accept
3275 * a CDB, this function is called. Send the CDB.
3276 *
3277 * LOCKING:
3278 * caller.
3279 */
3280
3281static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3282{
3283 /* send SCSI cdb */
3284 DPRINTK("send cdb\n");
587005de 3285 WARN_ON(ap->cdb_len < 12);
c71c1857
AL		 3286
3287 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3288 ata_altstatus(ap); /* flush */
3289
3290 switch (qc->tf.protocol) {
3291 case ATA_PROT_ATAPI:
3292 ap->hsm_task_state = HSM_ST;
3293 break;
3294 case ATA_PROT_ATAPI_NODATA:
3295 ap->hsm_task_state = HSM_ST_LAST;
3296 break;
3297 case ATA_PROT_ATAPI_DMA:
3298 ap->hsm_task_state = HSM_ST_LAST;
3299 /* initiate bmdma */
3300 ap->ops->bmdma_start(qc);
3301 break;
3302 }
3303}
3304
3305/**
e27486db
AL		 3306 * ata_pio_first_block - Write first data block to hardware
3307 * @ap: Port to which ATA/ATAPI device is attached.
c71c1857
AL		 3308 *
3309 * When device has indicated its readiness to accept
3310 * the data, this function sends out the CDB or
3311 * the first data block by PIO.
3312 * After this,
3313 * - If polling, ata_pio_task() handles the rest.
3314 * - Otherwise, interrupt handler takes over.
3315 *
3316 * LOCKING:
3317 * Kernel thread context (may sleep)
fbcdd80b
AL		 3318 *
3319 * RETURNS:
3320 * Zero if irq handler takes over
3321 * Non-zero if has next (polling).
c71c1857
AL		 3322 */
3323
fbcdd80b 3324static int ata_pio_first_block(struct ata_port *ap)
c71c1857 3325{
c71c1857
AL		 3326 struct ata_queued_cmd *qc;
3327 u8 status;
3328 unsigned long flags;
fbcdd80b 3329 int has_next;
c71c1857
AL		 3330
3331 qc = ata_qc_from_tag(ap, ap->active_tag);
587005de
JG		 3332 WARN_ON(qc == NULL);
3333 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
c71c1857 3334
fbcdd80b
AL		 3335 /* if polling, we will stay in the work queue after sending the data.
3336 * otherwise, interrupt handler takes over after sending the data.
3337 */
3338 has_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3339
c71c1857
AL		 3340 /* sleep-wait for BSY to clear */
3341 DPRINTK("busy wait\n");
fbcdd80b 3342 if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) {
555a8965 3343 qc->err_mask |= AC_ERR_TIMEOUT;
fbcdd80b 3344 ap->hsm_task_state = HSM_ST_TMOUT;
c71c1857 3345 goto err_out;
fbcdd80b 3346 }
c71c1857
AL		 3347
3348 /* make sure DRQ is set */
3349 status = ata_chk_status(ap);
fbcdd80b
AL		 3350 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3351 /* device status error */
555a8965 3352 qc->err_mask |= AC_ERR_HSM;
fbcdd80b 3353 ap->hsm_task_state = HSM_ST_ERR;
c71c1857 3354 goto err_out;
fbcdd80b 3355 }
c71c1857
AL		 3356
3357 /* Send the CDB (atapi) or the first data block (ata pio out).
3358 * During the state transition, interrupt handler shouldn't
3359 * be invoked before the data transfer is complete and
3360 * hsm_task_state is changed. Hence, the following locking.
3361 */
3362 spin_lock_irqsave(&ap->host_set->lock, flags);
3363
3364 if (qc->tf.protocol == ATA_PROT_PIO) {
3365 /* PIO data out protocol.
3366 * send first data block.
3367 */
3368
07f6f7d0
AL		 3369 /* ata_pio_sectors() might change the state to HSM_ST_LAST.
3370 * so, the state is changed here before ata_pio_sectors().
c71c1857
AL		 3371 */
3372 ap->hsm_task_state = HSM_ST;
07f6f7d0 3373 ata_pio_sectors(qc);
c71c1857
AL		 3374 ata_altstatus(ap); /* flush */
3375 } else
3376 /* send CDB */
3377 atapi_send_cdb(ap, qc);
3378
fbcdd80b
AL		 3379 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3380
c71c1857
AL		 3381 /* if polling, ata_pio_task() handles the rest.
3382 * otherwise, interrupt handler takes over from here.
3383 */
fbcdd80b 3384 return has_next;
c71c1857
AL		 3385
3386err_out:
fbcdd80b 3387 return 1; /* has next */
c71c1857
AL		 3388}
3389
6ae4cfb5
AL		 3390/**
3391 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3392 * @qc: Command on going
3393 * @bytes: number of bytes
3394 *
3395 * Transfer Transfer data from/to the ATAPI device.
3396 *
3397 * LOCKING:
3398 * Inherited from caller.
3399 *
3400 */
3401
1da177e4
LT		 3402static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3403{
3404 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3405 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3406 struct ata_port *ap = qc->ap;
3407 struct page *page;
3408 unsigned char *buf;
3409 unsigned int offset, count;
3410
563a6e1f 3411 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3412 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3413
3414next_sg:
563a6e1f 3415 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3416 /*
563a6e1f
AL		 3417 * The end of qc->sg is reached and the device expects
3418 * more data to transfer. In order not to overrun qc->sg
3419 * and fulfill length specified in the byte count register,
3420 * - for read case, discard trailing data from the device
3421 * - for write case, padding zero data to the device
3422 */
3423 u16 pad_buf[1] = { 0 };
3424 unsigned int words = bytes >> 1;
3425 unsigned int i;
3426
3427 if (words) /* warning if bytes > 1 */
7fb6ec28 3428 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3429 ap->id, bytes);
3430
3431 for (i = 0; i < words; i++)
3432 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3433
14be71f4 3434 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3435 return;
3436 }
3437
cedc9a47 3438 sg = &qc->__sg[qc->cursg];
1da177e4 3439
1da177e4
LT		 3440 page = sg->page;
3441 offset = sg->offset + qc->cursg_ofs;
3442
3443 /* get the current page and offset */
3444 page = nth_page(page, (offset >> PAGE_SHIFT));
3445 offset %= PAGE_SIZE;
3446
6952df03 3447 /* don't overrun current sg */
32529e01 3448 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3449
3450 /* don't cross page boundaries */
3451 count = min(count, (unsigned int)PAGE_SIZE - offset);
3452
7282aa4b
AL		 3453 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3454
91b8b313
AL		 3455 if (PageHighMem(page)) {
3456 unsigned long flags;
3457
3458 local_irq_save(flags);
3459 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3460
91b8b313
AL		 3461 /* do the actual data transfer */
3462 ata_data_xfer(ap, buf + offset, count, do_write);
7282aa4b 3463
91b8b313
AL		 3464 kunmap_atomic(buf, KM_IRQ0);
3465 local_irq_restore(flags);
3466 } else {
3467 buf = page_address(page);
3468 ata_data_xfer(ap, buf + offset, count, do_write);
3469 }
7282aa4b 3470
1da177e4
LT		 3471 bytes -= count;
3472 qc->curbytes += count;
3473 qc->cursg_ofs += count;
3474
32529e01 3475 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3476 qc->cursg++;
3477 qc->cursg_ofs = 0;
3478 }
3479
563a6e1f 3480 if (bytes)
1da177e4 3481 goto next_sg;
1da177e4
LT		 3482}
3483
6ae4cfb5
AL		 3484/**
3485 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3486 * @qc: Command on going
3487 *
3488 * Transfer Transfer data from/to the ATAPI device.
3489 *
3490 * LOCKING:
3491 * Inherited from caller.
6ae4cfb5
AL		 3492 */
3493
1da177e4
LT		 3494static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3495{
3496 struct ata_port *ap = qc->ap;
3497 struct ata_device *dev = qc->dev;
3498 unsigned int ireason, bc_lo, bc_hi, bytes;
3499 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3500
3501 ap->ops->tf_read(ap, &qc->tf);
3502 ireason = qc->tf.nsect;
3503 bc_lo = qc->tf.lbam;
3504 bc_hi = qc->tf.lbah;
3505 bytes = (bc_hi << 8) | bc_lo;
3506
3507 /* shall be cleared to zero, indicating xfer of data */
3508 if (ireason & (1 << 0))
3509 goto err_out;
3510
3511 /* make sure transfer direction matches expected */
3512 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3513 if (do_write != i_write)
3514 goto err_out;
3515
312f7da2
AL		 3516 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3517
1da177e4
LT		 3518 __atapi_pio_bytes(qc, bytes);
3519
3520 return;
3521
3522err_out:
3523 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3524 ap->id, dev->devno);
11a56d24 3525 qc->err_mask |= AC_ERR_HSM;
14be71f4 3526 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3527}
3528
3529/**
6f0ef4fa
RD		 3530 * ata_pio_block - start PIO on a block
3531 * @ap: the target ata_port
1da177e4
LT		 3532 *
3533 * LOCKING:
0cba632b 3534 * None. (executing in kernel thread context)
1da177e4
LT		 3535 */
3536
3537static void ata_pio_block(struct ata_port *ap)
3538{
3539 struct ata_queued_cmd *qc;
3540 u8 status;
3541
3542 /*
6f0ef4fa 3543 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3544 * Sometimes when we enter, BSY will be cleared in
3545 * a chk-status or two. If not, the drive is probably seeking
3546 * or something. Snooze for a couple msecs, then
3547 * chk-status again. If still busy, fall back to
14be71f4 3548 * HSM_ST_POLL state.
1da177e4
LT		 3549 */
3550 status = ata_busy_wait(ap, ATA_BUSY, 5);
3551 if (status & ATA_BUSY) {
3552 msleep(2);
3553 status = ata_busy_wait(ap, ATA_BUSY, 10);
3554 if (status & ATA_BUSY) {
14be71f4 3555 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3556 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3557 return;
3558 }
3559 }
3560
3561 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3562 WARN_ON(qc == NULL);
1da177e4 3563
fe79e683
AL		 3564 /* check error */
3565 if (status & (ATA_ERR | ATA_DF)) {
3566 qc->err_mask |= AC_ERR_DEV;
3567 ap->hsm_task_state = HSM_ST_ERR;
3568 return;
3569 }
3570
3571 /* transfer data if any */
1da177e4 3572 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3573 /* DRQ=0 means no more data to transfer */
1da177e4 3574 if ((status & ATA_DRQ) == 0) {
14be71f4 3575 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3576 return;
3577 }
3578
3579 atapi_pio_bytes(qc);
3580 } else {
3581 /* handle BSY=0, DRQ=0 as error */
3582 if ((status & ATA_DRQ) == 0) {
11a56d24 3583 qc->err_mask |= AC_ERR_HSM;
14be71f4 3584 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3585 return;
3586 }
3587
07f6f7d0 3588 ata_pio_sectors(qc);
1da177e4 3589 }
467b16d4
AL		 3590
3591 ata_altstatus(ap); /* flush */
1da177e4
LT		 3592}
3593
3594static void ata_pio_error(struct ata_port *ap)
3595{
3596 struct ata_queued_cmd *qc;
a7dac447 3597
1da177e4 3598 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3599 WARN_ON(qc == NULL);
1da177e4 3600
000080c3
AL		 3601 if (qc->tf.command != ATA_CMD_PACKET)
3602 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3603
1c848984
AL		 3604 /* make sure qc->err_mask is available to
3605 * know what's wrong and recover
3606 */
a4631474 3607 WARN_ON(qc->err_mask == 0);
1c848984 3608
14be71f4 3609 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3610
a22e2eb0 3611 ata_poll_qc_complete(qc);
1da177e4
LT		 3612}
3613
3614static void ata_pio_task(void *_data)
3615{
3616 struct ata_port *ap = _data;
7fb6ec28 3617 unsigned long timeout;
fbcdd80b 3618 int has_next;
7fb6ec28
JG		 3619
3620fsm_start:
3621 timeout = 0;
fbcdd80b 3622 has_next = 1;
1da177e4 3623
14be71f4 3624 switch (ap->hsm_task_state) {
e27486db 3625 case HSM_ST_FIRST:
fbcdd80b
AL		 3626 has_next = ata_pio_first_block(ap);
3627 break;
e27486db 3628
14be71f4 3629 case HSM_ST:
1da177e4
LT		 3630 ata_pio_block(ap);
3631 break;
3632
14be71f4 3633 case HSM_ST_LAST:
fbcdd80b 3634 has_next = ata_pio_complete(ap);
1da177e4
LT		 3635 break;
3636
14be71f4
AL		 3637 case HSM_ST_POLL:
3638 case HSM_ST_LAST_POLL:
1da177e4
LT		 3639 timeout = ata_pio_poll(ap);
3640 break;
3641
14be71f4
AL		 3642 case HSM_ST_TMOUT:
3643 case HSM_ST_ERR:
1da177e4
LT		 3644 ata_pio_error(ap);
3645 return;
467b16d4
AL		 3646
3647 default:
3648 BUG();
3649 return;
1da177e4
LT		 3650 }
3651
3652 if (timeout)
95064379 3653 ata_queue_delayed_pio_task(ap, timeout);
fbcdd80b 3654 else if (has_next)
7fb6ec28 3655 goto fsm_start;
1da177e4
LT		 3656}
3657
1da177e4
LT		 3658/**
3659 * ata_qc_timeout - Handle timeout of queued command
3660 * @qc: Command that timed out
3661 *
3662 * Some part of the kernel (currently, only the SCSI layer)
3663 * has noticed that the active command on port @ap has not
3664 * completed after a specified length of time. Handle this
3665 * condition by disabling DMA (if necessary) and completing
3666 * transactions, with error if necessary.
3667 *
3668 * This also handles the case of the "lost interrupt", where
3669 * for some reason (possibly hardware bug, possibly driver bug)
3670 * an interrupt was not delivered to the driver, even though the
3671 * transaction completed successfully.
3672 *
3673 * LOCKING:
0cba632b 3674 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3675 */
3676
3677static void ata_qc_timeout(struct ata_queued_cmd *qc)
3678{
3679 struct ata_port *ap = qc->ap;
b8f6153e 3680 struct ata_host_set *host_set = ap->host_set;
1da177e4 3681 u8 host_stat = 0, drv_stat;
b8f6153e 3682 unsigned long flags;
1da177e4
LT		 3683
3684 DPRINTK("ENTER\n");
3685
c18d06f8
TH		 3686 ata_flush_pio_tasks(ap);
3687 ap->hsm_task_state = HSM_ST_IDLE;
3688
b8f6153e
JG		 3689 spin_lock_irqsave(&host_set->lock, flags);
3690
1da177e4
LT		 3691 switch (qc->tf.protocol) {
3692
3693 case ATA_PROT_DMA:
3694 case ATA_PROT_ATAPI_DMA:
3695 host_stat = ap->ops->bmdma_status(ap);
3696
3697 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3698 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3699
3700 /* fall through */
3701
3702 default:
3703 ata_altstatus(ap);
3704 drv_stat = ata_chk_status(ap);
3705
3706 /* ack bmdma irq events */
3707 ap->ops->irq_clear(ap);
3708
3709 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3710 ap->id, qc->tf.command, drv_stat, host_stat);
3711
312f7da2
AL		 3712 ap->hsm_task_state = HSM_ST_IDLE;
3713
1da177e4 3714 /* complete taskfile transaction */
555a8965 3715 qc->err_mask |= AC_ERR_TIMEOUT;
1da177e4
LT		 3716 break;
3717 }
b8f6153e
JG		 3718
3719 spin_unlock_irqrestore(&host_set->lock, flags);
3720
a72ec4ce
TH		 3721 ata_eh_qc_complete(qc);
3722
1da177e4
LT		 3723 DPRINTK("EXIT\n");
3724}
3725
3726/**
3727 * ata_eng_timeout - Handle timeout of queued command
3728 * @ap: Port on which timed-out command is active
3729 *
3730 * Some part of the kernel (currently, only the SCSI layer)
3731 * has noticed that the active command on port @ap has not
3732 * completed after a specified length of time. Handle this
3733 * condition by disabling DMA (if necessary) and completing
3734 * transactions, with error if necessary.
3735 *
3736 * This also handles the case of the "lost interrupt", where
3737 * for some reason (possibly hardware bug, possibly driver bug)
3738 * an interrupt was not delivered to the driver, even though the
3739 * transaction completed successfully.
3740 *
3741 * LOCKING:
3742 * Inherited from SCSI layer (none, can sleep)
3743 */
3744
3745void ata_eng_timeout(struct ata_port *ap)
3746{
1da177e4
LT		 3747 DPRINTK("ENTER\n");
3748
f6379020 3749 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3750
1da177e4
LT		 3751 DPRINTK("EXIT\n");
3752}
3753
3754/**
3755 * ata_qc_new - Request an available ATA command, for queueing
3756 * @ap: Port associated with device @dev
3757 * @dev: Device from whom we request an available command structure
3758 *
3759 * LOCKING:
0cba632b 3760 * None.
1da177e4
LT		 3761 */
3762
3763static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3764{
3765 struct ata_queued_cmd *qc = NULL;
3766 unsigned int i;
3767
3768 for (i = 0; i < ATA_MAX_QUEUE; i++)
3769 if (!test_and_set_bit(i, &ap->qactive)) {
3770 qc = ata_qc_from_tag(ap, i);
3771 break;
3772 }
3773
3774 if (qc)
3775 qc->tag = i;
3776
3777 return qc;
3778}
3779
3780/**
3781 * ata_qc_new_init - Request an available ATA command, and initialize it
3782 * @ap: Port associated with device @dev
3783 * @dev: Device from whom we request an available command structure
3784 *
3785 * LOCKING:
0cba632b 3786 * None.
1da177e4
LT		 3787 */
3788
3789struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3790 struct ata_device *dev)
3791{
3792 struct ata_queued_cmd *qc;
3793
3794 qc = ata_qc_new(ap);
3795 if (qc) {
1da177e4
LT		 3796 qc->scsicmd = NULL;
3797 qc->ap = ap;
3798 qc->dev = dev;
1da177e4 3799
2c13b7ce 3800 ata_qc_reinit(qc);
1da177e4
LT		 3801 }
3802
3803 return qc;
3804}
3805
1da177e4
LT		 3806/**
3807 * ata_qc_free - free unused ata_queued_cmd
3808 * @qc: Command to complete
3809 *
3810 * Designed to free unused ata_queued_cmd object
3811 * in case something prevents using it.
3812 *
3813 * LOCKING:
0cba632b 3814 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3815 */
3816void ata_qc_free(struct ata_queued_cmd *qc)
3817{
4ba946e9
TH		 3818 struct ata_port *ap = qc->ap;
3819 unsigned int tag;
3820
a4631474 3821 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3822
4ba946e9
TH		 3823 qc->flags = 0;
3824 tag = qc->tag;
3825 if (likely(ata_tag_valid(tag))) {
3826 if (tag == ap->active_tag)
3827 ap->active_tag = ATA_TAG_POISON;
3828 qc->tag = ATA_TAG_POISON;
3829 clear_bit(tag, &ap->qactive);
3830 }
1da177e4
LT		 3831}
3832
76014427 3833void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3834{
a4631474
TH		 3835 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3836 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3837
3838 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3839 ata_sg_clean(qc);
3840
3f3791d3
AL		 3841 /* atapi: mark qc as inactive to prevent the interrupt handler
3842 * from completing the command twice later, before the error handler
3843 * is called. (when rc != 0 and atapi request sense is needed)
3844 */
3845 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3846
1da177e4 3847 /* call completion callback */
77853bf2 3848 qc->complete_fn(qc);
1da177e4
LT		 3849}
3850
3851static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3852{
3853 struct ata_port *ap = qc->ap;
3854
3855 switch (qc->tf.protocol) {
3856 case ATA_PROT_DMA:
3857 case ATA_PROT_ATAPI_DMA:
3858 return 1;
3859
3860 case ATA_PROT_ATAPI:
3861 case ATA_PROT_PIO:
3862 case ATA_PROT_PIO_MULT:
3863 if (ap->flags & ATA_FLAG_PIO_DMA)
3864 return 1;
3865
3866 /* fall through */
3867
3868 default:
3869 return 0;
3870 }
3871
3872 /* never reached */
3873}
3874
3875/**
3876 * ata_qc_issue - issue taskfile to device
3877 * @qc: command to issue to device
3878 *
3879 * Prepare an ATA command to submission to device.
3880 * This includes mapping the data into a DMA-able
3881 * area, filling in the S/G table, and finally
3882 * writing the taskfile to hardware, starting the command.
3883 *
3884 * LOCKING:
3885 * spin_lock_irqsave(host_set lock)
3886 *
3887 * RETURNS:
9a3d9eb0 3888 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3889 */
3890
9a3d9eb0 3891unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3892{
3893 struct ata_port *ap = qc->ap;
3894
3895 if (ata_should_dma_map(qc)) {
3896 if (qc->flags & ATA_QCFLAG_SG) {
3897 if (ata_sg_setup(qc))
8e436af9 3898 goto sg_err;
1da177e4
LT		 3899 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3900 if (ata_sg_setup_one(qc))
8e436af9 3901 goto sg_err;
1da177e4
LT		 3902 }
3903 } else {
3904 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3905 }
3906
3907 ap->ops->qc_prep(qc);
3908
3909 qc->ap->active_tag = qc->tag;
3910 qc->flags |= ATA_QCFLAG_ACTIVE;
3911
3912 return ap->ops->qc_issue(qc);
3913
8e436af9
TH		 3914sg_err:
3915 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 3916 return AC_ERR_SYSTEM;
1da177e4
LT		 3917}
3918
0baab86b 3919
1da177e4
LT		 3920/**
3921 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3922 * @qc: command to issue to device
3923 *
3924 * Using various libata functions and hooks, this function
3925 * starts an ATA command. ATA commands are grouped into
3926 * classes called "protocols", and issuing each type of protocol
3927 * is slightly different.
3928 *
0baab86b
EF		 3929 * May be used as the qc_issue() entry in ata_port_operations.
3930 *
1da177e4
LT		 3931 * LOCKING:
3932 * spin_lock_irqsave(host_set lock)
3933 *
3934 * RETURNS:
9a3d9eb0 3935 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3936 */
3937
9a3d9eb0 3938unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 3939{
3940 struct ata_port *ap = qc->ap;
3941
e50362ec
AL		 3942 /* Use polling pio if the LLD doesn't handle
3943 * interrupt driven pio and atapi CDB interrupt.
3944 */
3945 if (ap->flags & ATA_FLAG_PIO_POLLING) {
3946 switch (qc->tf.protocol) {
3947 case ATA_PROT_PIO:
3948 case ATA_PROT_ATAPI:
3949 case ATA_PROT_ATAPI_NODATA:
3950 qc->tf.flags |= ATA_TFLAG_POLLING;
3951 break;
3952 case ATA_PROT_ATAPI_DMA:
3953 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
3954 BUG();
3955 break;
3956 default:
3957 break;
3958 }
3959 }
3960
312f7da2 3961 /* select the device */
1da177e4
LT		 3962 ata_dev_select(ap, qc->dev->devno, 1, 0);
3963
312f7da2 3964 /* start the command */
1da177e4
LT		 3965 switch (qc->tf.protocol) {
3966 case ATA_PROT_NODATA:
312f7da2
AL		 3967 if (qc->tf.flags & ATA_TFLAG_POLLING)
3968 ata_qc_set_polling(qc);
3969
e5338254 3970 ata_tf_to_host(ap, &qc->tf);
312f7da2
AL		 3971 ap->hsm_task_state = HSM_ST_LAST;
3972
3973 if (qc->tf.flags & ATA_TFLAG_POLLING)
20ea079e 3974 ata_queue_pio_task(ap);
312f7da2 3975
1da177e4
LT		 3976 break;
3977
3978 case ATA_PROT_DMA:
587005de 3979 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 3980
1da177e4
LT		 3981 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3982 ap->ops->bmdma_setup(qc); /* set up bmdma */
3983 ap->ops->bmdma_start(qc); /* initiate bmdma */
312f7da2 3984 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3985 break;
3986
312f7da2
AL		 3987 case ATA_PROT_PIO:
3988 if (qc->tf.flags & ATA_TFLAG_POLLING)
3989 ata_qc_set_polling(qc);
3990
e5338254 3991 ata_tf_to_host(ap, &qc->tf);
312f7da2 3992
54f00389
AL		 3993 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3994 /* PIO data out protocol */
3995 ap->hsm_task_state = HSM_ST_FIRST;
f6ef65e6 3996 ata_queue_pio_task(ap);
54f00389
AL		 3997
3998 /* always send first data block using
e27486db 3999 * the ata_pio_task() codepath.
54f00389 4000 */
312f7da2 4001 } else {
54f00389
AL		 4002 /* PIO data in protocol */
4003 ap->hsm_task_state = HSM_ST;
4004
4005 if (qc->tf.flags & ATA_TFLAG_POLLING)
f6ef65e6 4006 ata_queue_pio_task(ap);
54f00389
AL		 4007
4008 /* if polling, ata_pio_task() handles the rest.
4009 * otherwise, interrupt handler takes over from here.
4010 */
312f7da2
AL		 4011 }
4012
1da177e4
LT		 4013 break;
4014
4015 case ATA_PROT_ATAPI:
1da177e4 4016 case ATA_PROT_ATAPI_NODATA:
312f7da2
AL		 4017 if (qc->tf.flags & ATA_TFLAG_POLLING)
4018 ata_qc_set_polling(qc);
4019
e5338254 4020 ata_tf_to_host(ap, &qc->tf);
f6ef65e6 4021
312f7da2
AL		 4022 ap->hsm_task_state = HSM_ST_FIRST;
4023
4024 /* send cdb by polling if no cdb interrupt */
4025 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4026 (qc->tf.flags & ATA_TFLAG_POLLING))
20ea079e 4027 ata_queue_pio_task(ap);
1da177e4
LT		 4028 break;
4029
4030 case ATA_PROT_ATAPI_DMA:
587005de 4031 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 4032
1da177e4
LT		 4033 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4034 ap->ops->bmdma_setup(qc); /* set up bmdma */
312f7da2
AL		 4035 ap->hsm_task_state = HSM_ST_FIRST;
4036
4037 /* send cdb by polling if no cdb interrupt */
4038 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
20ea079e 4039 ata_queue_pio_task(ap);
1da177e4
LT		 4040 break;
4041
4042 default:
4043 WARN_ON(1);
9a3d9eb0 4044 return AC_ERR_SYSTEM;
1da177e4
LT		 4045 }
4046
4047 return 0;
4048}
4049
4050/**
0baab86b 4051 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 4052 * @qc: Info associated with this ATA transaction.
4053 *
4054 * LOCKING:
4055 * spin_lock_irqsave(host_set lock)
4056 */
4057
4058static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
4059{
4060 struct ata_port *ap = qc->ap;
4061 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4062 u8 dmactl;
4063 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4064
4065 /* load PRD table addr. */
4066 mb(); /* make sure PRD table writes are visible to controller */
4067 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
4068
4069 /* specify data direction, triple-check start bit is clear */
4070 dmactl = readb(mmio + ATA_DMA_CMD);
4071 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4072 if (!rw)
4073 dmactl |= ATA_DMA_WR;
4074 writeb(dmactl, mmio + ATA_DMA_CMD);
4075
4076 /* issue r/w command */
4077 ap->ops->exec_command(ap, &qc->tf);
4078}
4079
4080/**
b73fc89f 4081 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 4082 * @qc: Info associated with this ATA transaction.
4083 *
4084 * LOCKING:
4085 * spin_lock_irqsave(host_set lock)
4086 */
4087
4088static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4089{
4090 struct ata_port *ap = qc->ap;
4091 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4092 u8 dmactl;
4093
4094 /* start host DMA transaction */
4095 dmactl = readb(mmio + ATA_DMA_CMD);
4096 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4097
4098 /* Strictly, one may wish to issue a readb() here, to
4099 * flush the mmio write. However, control also passes
4100 * to the hardware at this point, and it will interrupt
4101 * us when we are to resume control. So, in effect,
4102 * we don't care when the mmio write flushes.
4103 * Further, a read of the DMA status register _immediately_
4104 * following the write may not be what certain flaky hardware
4105 * is expected, so I think it is best to not add a readb()
4106 * without first all the MMIO ATA cards/mobos.
4107 * Or maybe I'm just being paranoid.
4108 */
4109}
4110
4111/**
4112 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4113 * @qc: Info associated with this ATA transaction.
4114 *
4115 * LOCKING:
4116 * spin_lock_irqsave(host_set lock)
4117 */
4118
4119static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4120{
4121 struct ata_port *ap = qc->ap;
4122 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4123 u8 dmactl;
4124
4125 /* load PRD table addr. */
4126 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4127
4128 /* specify data direction, triple-check start bit is clear */
4129 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4130 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4131 if (!rw)
4132 dmactl |= ATA_DMA_WR;
4133 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4134
4135 /* issue r/w command */
4136 ap->ops->exec_command(ap, &qc->tf);
4137}
4138
4139/**
4140 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4141 * @qc: Info associated with this ATA transaction.
4142 *
4143 * LOCKING:
4144 * spin_lock_irqsave(host_set lock)
4145 */
4146
4147static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4148{
4149 struct ata_port *ap = qc->ap;
4150 u8 dmactl;
4151
4152 /* start host DMA transaction */
4153 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4154 outb(dmactl | ATA_DMA_START,
4155 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4156}
4157
0baab86b
EF		 4158
4159/**
4160 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4161 * @qc: Info associated with this ATA transaction.
4162 *
4163 * Writes the ATA_DMA_START flag to the DMA command register.
4164 *
4165 * May be used as the bmdma_start() entry in ata_port_operations.
4166 *
4167 * LOCKING:
4168 * spin_lock_irqsave(host_set lock)
4169 */
1da177e4
LT		 4170void ata_bmdma_start(struct ata_queued_cmd *qc)
4171{
4172 if (qc->ap->flags & ATA_FLAG_MMIO)
4173 ata_bmdma_start_mmio(qc);
4174 else
4175 ata_bmdma_start_pio(qc);
4176}
4177
0baab86b
EF		 4178
4179/**
4180 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4181 * @qc: Info associated with this ATA transaction.
4182 *
4183 * Writes address of PRD table to device's PRD Table Address
4184 * register, sets the DMA control register, and calls
4185 * ops->exec_command() to start the transfer.
4186 *
4187 * May be used as the bmdma_setup() entry in ata_port_operations.
4188 *
4189 * LOCKING:
4190 * spin_lock_irqsave(host_set lock)
4191 */
1da177e4
LT		 4192void ata_bmdma_setup(struct ata_queued_cmd *qc)
4193{
4194 if (qc->ap->flags & ATA_FLAG_MMIO)
4195 ata_bmdma_setup_mmio(qc);
4196 else
4197 ata_bmdma_setup_pio(qc);
4198}
4199
0baab86b
EF		 4200
4201/**
4202 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 4203 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4204 *
4205 * Clear interrupt and error flags in DMA status register.
4206 *
4207 * May be used as the irq_clear() entry in ata_port_operations.
4208 *
4209 * LOCKING:
4210 * spin_lock_irqsave(host_set lock)
4211 */
4212
1da177e4
LT		 4213void ata_bmdma_irq_clear(struct ata_port *ap)
4214{
4215 if (ap->flags & ATA_FLAG_MMIO) {
4216 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4217 writeb(readb(mmio), mmio);
4218 } else {
4219 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4220 outb(inb(addr), addr);
4221 }
4222
4223}
4224
0baab86b
EF		 4225
4226/**
4227 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 4228 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4229 *
4230 * Read and return BMDMA status register.
4231 *
4232 * May be used as the bmdma_status() entry in ata_port_operations.
4233 *
4234 * LOCKING:
4235 * spin_lock_irqsave(host_set lock)
4236 */
4237
1da177e4
LT		 4238u8 ata_bmdma_status(struct ata_port *ap)
4239{
4240 u8 host_stat;
4241 if (ap->flags & ATA_FLAG_MMIO) {
4242 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4243 host_stat = readb(mmio + ATA_DMA_STATUS);
4244 } else
ee500aab 4245 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 4246 return host_stat;
4247}
4248
0baab86b
EF		 4249
4250/**
4251 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4252 * @qc: Command we are ending DMA for
0baab86b
EF		 4253 *
4254 * Clears the ATA_DMA_START flag in the dma control register
4255 *
4256 * May be used as the bmdma_stop() entry in ata_port_operations.
4257 *
4258 * LOCKING:
4259 * spin_lock_irqsave(host_set lock)
4260 */
4261
b73fc89f 4262void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4263{
b73fc89f 4264 struct ata_port *ap = qc->ap;
1da177e4
LT		 4265 if (ap->flags & ATA_FLAG_MMIO) {
4266 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4267
4268 /* clear start/stop bit */
4269 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4270 mmio + ATA_DMA_CMD);
4271 } else {
4272 /* clear start/stop bit */
4273 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4274 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4275 }
4276
4277 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4278 ata_altstatus(ap); /* dummy read */
4279}
4280
4281/**
4282 * ata_host_intr - Handle host interrupt for given (port, task)
4283 * @ap: Port on which interrupt arrived (possibly...)
4284 * @qc: Taskfile currently active in engine
4285 *
4286 * Handle host interrupt for given queued command. Currently,
4287 * only DMA interrupts are handled. All other commands are
4288 * handled via polling with interrupts disabled (nIEN bit).
4289 *
4290 * LOCKING:
4291 * spin_lock_irqsave(host_set lock)
4292 *
4293 * RETURNS:
4294 * One if interrupt was handled, zero if not (shared irq).
4295 */
4296
4297inline unsigned int ata_host_intr (struct ata_port *ap,
4298 struct ata_queued_cmd *qc)
4299{
312f7da2 4300 u8 status, host_stat = 0;
1da177e4 4301
312f7da2
AL		 4302 VPRINTK("ata%u: protocol %d task_state %d\n",
4303 ap->id, qc->tf.protocol, ap->hsm_task_state);
1da177e4 4304
312f7da2
AL		 4305 /* Check whether we are expecting interrupt in this state */
4306 switch (ap->hsm_task_state) {
4307 case HSM_ST_FIRST:
4308 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4309 * The flag was turned on only for atapi devices.
4310 * No need to check is_atapi_taskfile(&qc->tf) again.
4311 */
4312 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1da177e4 4313 goto idle_irq;
312f7da2
AL		 4314 break;
4315 case HSM_ST_LAST:
4316 if (qc->tf.protocol == ATA_PROT_DMA ||
4317 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4318 /* check status of DMA engine */
4319 host_stat = ap->ops->bmdma_status(ap);
4320 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4321
4322 /* if it's not our irq... */
4323 if (!(host_stat & ATA_DMA_INTR))
4324 goto idle_irq;
4325
4326 /* before we do anything else, clear DMA-Start bit */
4327 ap->ops->bmdma_stop(qc);
a4f16610
AL		 4328
4329 if (unlikely(host_stat & ATA_DMA_ERR)) {
4330 /* error when transfering data to/from memory */
4331 qc->err_mask |= AC_ERR_HOST_BUS;
4332 ap->hsm_task_state = HSM_ST_ERR;
4333 }
312f7da2
AL		 4334 }
4335 break;
4336 case HSM_ST:
4337 break;
4338 default:
4339 goto idle_irq;
4340 }
1da177e4 4341
312f7da2
AL		 4342 /* check altstatus */
4343 status = ata_altstatus(ap);
4344 if (status & ATA_BUSY)
4345 goto idle_irq;
1da177e4 4346
312f7da2
AL		 4347 /* check main status, clearing INTRQ */
4348 status = ata_chk_status(ap);
4349 if (unlikely(status & ATA_BUSY))
4350 goto idle_irq;
1da177e4 4351
312f7da2
AL		 4352 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4353 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
1da177e4 4354
312f7da2
AL		 4355 /* ack bmdma irq events */
4356 ap->ops->irq_clear(ap);
1da177e4 4357
312f7da2 4358 /* check error */
a4f16610
AL		 4359 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4360 qc->err_mask |= AC_ERR_DEV;
312f7da2 4361 ap->hsm_task_state = HSM_ST_ERR;
a4f16610 4362 }
312f7da2
AL		 4363
4364fsm_start:
4365 switch (ap->hsm_task_state) {
4366 case HSM_ST_FIRST:
4367 /* Some pre-ATAPI-4 devices assert INTRQ
4368 * at this state when ready to receive CDB.
4369 */
4370
4371 /* check device status */
4372 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
4373 /* Wrong status. Let EH handle this */
555a8965 4374 qc->err_mask |= AC_ERR_HSM;
312f7da2
AL		 4375 ap->hsm_task_state = HSM_ST_ERR;
4376 goto fsm_start;
4377 }
4378
4379 atapi_send_cdb(ap, qc);
4380
4381 break;
4382
4383 case HSM_ST:
4384 /* complete command or read/write the data register */
4385 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4386 /* ATAPI PIO protocol */
4387 if ((status & ATA_DRQ) == 0) {
4388 /* no more data to transfer */
4389 ap->hsm_task_state = HSM_ST_LAST;
4390 goto fsm_start;
4391 }
4392
4393 atapi_pio_bytes(qc);
4394
4395 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4396 /* bad ireason reported by device */
4397 goto fsm_start;
4398
4399 } else {
4400 /* ATA PIO protocol */
4401 if (unlikely((status & ATA_DRQ) == 0)) {
4402 /* handle BSY=0, DRQ=0 as error */
555a8965 4403 qc->err_mask |= AC_ERR_HSM;
312f7da2
AL		 4404 ap->hsm_task_state = HSM_ST_ERR;
4405 goto fsm_start;
4406 }
4407
07f6f7d0 4408 ata_pio_sectors(qc);
312f7da2
AL		 4409
4410 if (ap->hsm_task_state == HSM_ST_LAST &&
4411 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4412 /* all data read */
4413 ata_altstatus(ap);
4414 status = ata_chk_status(ap);
4415 goto fsm_start;
4416 }
4417 }
4418
4419 ata_altstatus(ap); /* flush */
4420 break;
4421
4422 case HSM_ST_LAST:
4423 if (unlikely(status & ATA_DRQ)) {
4424 /* handle DRQ=1 as error */
555a8965 4425 qc->err_mask |= AC_ERR_HSM;
312f7da2
AL		 4426 ap->hsm_task_state = HSM_ST_ERR;
4427 goto fsm_start;
4428 }
4429
4430 /* no more data to transfer */
4431 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
4432 ap->id, status);
4433
4434 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4
LT		 4435
4436 /* complete taskfile transaction */
a22e2eb0
AL		 4437 qc->err_mask |= ac_err_mask(status);
4438 ata_qc_complete(qc);
1da177e4
LT		 4439 break;
4440
312f7da2 4441 case HSM_ST_ERR:
000080c3
AL		 4442 if (qc->tf.command != ATA_CMD_PACKET)
4443 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x host_stat 0x%x\n",
4444 ap->id, status, host_stat);
312f7da2 4445
a4f16610
AL		 4446 /* make sure qc->err_mask is available to
4447 * know what's wrong and recover
4448 */
587005de 4449 WARN_ON(qc->err_mask == 0);
a4f16610 4450
312f7da2 4451 ap->hsm_task_state = HSM_ST_IDLE;
278efe95 4452 ata_qc_complete(qc);
312f7da2 4453 break;
1da177e4
LT		 4454 default:
4455 goto idle_irq;
4456 }
4457
4458 return 1; /* irq handled */
4459
4460idle_irq:
4461 ap->stats.idle_irq++;
4462
4463#ifdef ATA_IRQ_TRAP
4464 if ((ap->stats.idle_irq % 1000) == 0) {
4465 handled = 1;
4466 ata_irq_ack(ap, 0); /* debug trap */
4467 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4468 }
4469#endif
4470 return 0; /* irq not handled */
4471}
4472
4473/**
4474 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4475 * @irq: irq line (unused)
4476 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4477 * @regs: unused
4478 *
0cba632b
JG		 4479 * Default interrupt handler for PCI IDE devices. Calls
4480 * ata_host_intr() for each port that is not disabled.
4481 *
1da177e4 4482 * LOCKING:
0cba632b 4483 * Obtains host_set lock during operation.
1da177e4
LT		 4484 *
4485 * RETURNS:
0cba632b 4486 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4487 */
4488
4489irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4490{
4491 struct ata_host_set *host_set = dev_instance;
4492 unsigned int i;
4493 unsigned int handled = 0;
4494 unsigned long flags;
4495
4496 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4497 spin_lock_irqsave(&host_set->lock, flags);
4498
4499 for (i = 0; i < host_set->n_ports; i++) {
4500 struct ata_port *ap;
4501
4502 ap = host_set->ports[i];
c1389503 4503 if (ap &&
312f7da2 4504 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
1da177e4
LT		 4505 struct ata_queued_cmd *qc;
4506
4507 qc = ata_qc_from_tag(ap, ap->active_tag);
312f7da2 4508 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
21b1ed74 4509 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4510 handled |= ata_host_intr(ap, qc);
4511 }
4512 }
4513
4514 spin_unlock_irqrestore(&host_set->lock, flags);
4515
4516 return IRQ_RETVAL(handled);
4517}
4518
9b847548
JA		 4519/*
4520 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4521 * without filling any other registers
4522 */
4523static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4524 u8 cmd)
4525{
4526 struct ata_taskfile tf;
4527 int err;
4528
4529 ata_tf_init(ap, &tf, dev->devno);
4530
4531 tf.command = cmd;
4532 tf.flags |= ATA_TFLAG_DEVICE;
4533 tf.protocol = ATA_PROT_NODATA;
4534
4535 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4536 if (err)
4537 printk(KERN_ERR "%s: ata command failed: %d\n",
4538 __FUNCTION__, err);
4539
4540 return err;
4541}
4542
4543static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4544{
4545 u8 cmd;
4546
4547 if (!ata_try_flush_cache(dev))
4548 return 0;
4549
4550 if (ata_id_has_flush_ext(dev->id))
4551 cmd = ATA_CMD_FLUSH_EXT;
4552 else
4553 cmd = ATA_CMD_FLUSH;
4554
4555 return ata_do_simple_cmd(ap, dev, cmd);
4556}
4557
4558static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4559{
4560 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4561}
4562
4563static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4564{
4565 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4566}
4567
4568/**
4569 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4570 * @ap: port the device is connected to
4571 * @dev: the device to resume
9b847548
JA		 4572 *
4573 * Kick the drive back into action, by sending it an idle immediate
4574 * command and making sure its transfer mode matches between drive
4575 * and host.
4576 *
4577 */
4578int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4579{
4580 if (ap->flags & ATA_FLAG_SUSPENDED) {
4581 ap->flags &= ~ATA_FLAG_SUSPENDED;
4582 ata_set_mode(ap);
4583 }
4584 if (!ata_dev_present(dev))
4585 return 0;
4586 if (dev->class == ATA_DEV_ATA)
4587 ata_start_drive(ap, dev);
4588
4589 return 0;
4590}
4591
4592/**
4593 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4594 * @ap: port the device is connected to
4595 * @dev: the device to suspend
9b847548
JA		 4596 *
4597 * Flush the cache on the drive, if appropriate, then issue a
4598 * standbynow command.
9b847548
JA		 4599 */
4600int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4601{
4602 if (!ata_dev_present(dev))
4603 return 0;
4604 if (dev->class == ATA_DEV_ATA)
4605 ata_flush_cache(ap, dev);
4606
4607 ata_standby_drive(ap, dev);
4608 ap->flags |= ATA_FLAG_SUSPENDED;
4609 return 0;
4610}
4611
332b5a52
AL		 4612/**
4613 * ata_port_start - Set port up for dma.
4614 * @ap: Port to initialize
4615 *
4616 * Called just after data structures for each port are
4617 * initialized. Allocates space for PRD table.
4618 *
4619 * May be used as the port_start() entry in ata_port_operations.
4620 *
4621 * LOCKING:
4622 * Inherited from caller.
4623 */
4624
1da177e4
LT		 4625int ata_port_start (struct ata_port *ap)
4626{
4627 struct device *dev = ap->host_set->dev;
6037d6bb 4628 int rc;
1da177e4
LT		 4629
4630 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4631 if (!ap->prd)
4632 return -ENOMEM;
4633
6037d6bb
JG		 4634 rc = ata_pad_alloc(ap, dev);
4635 if (rc) {
cedc9a47 4636 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4637 return rc;
cedc9a47
JG		 4638 }
4639
1da177e4
LT		 4640 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4641
4642 return 0;
4643}
4644
0baab86b
EF		 4645
4646/**
4647 * ata_port_stop - Undo ata_port_start()
4648 * @ap: Port to shut down
4649 *
4650 * Frees the PRD table.
4651 *
4652 * May be used as the port_stop() entry in ata_port_operations.
4653 *
4654 * LOCKING:
6f0ef4fa 4655 * Inherited from caller.
0baab86b
EF		 4656 */
4657
1da177e4
LT		 4658void ata_port_stop (struct ata_port *ap)
4659{
4660 struct device *dev = ap->host_set->dev;
4661
4662 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4663 ata_pad_free(ap, dev);
1da177e4
LT		 4664}
4665
aa8f0dc6
JG		 4666void ata_host_stop (struct ata_host_set *host_set)
4667{
4668 if (host_set->mmio_base)
4669 iounmap(host_set->mmio_base);
4670}
4671
4672
1da177e4
LT		 4673/**
4674 * ata_host_remove - Unregister SCSI host structure with upper layers
4675 * @ap: Port to unregister
4676 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4677 *
4678 * LOCKING:
6f0ef4fa 4679 * Inherited from caller.
1da177e4
LT		 4680 */
4681
4682static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4683{
4684 struct Scsi_Host *sh = ap->host;
4685
4686 DPRINTK("ENTER\n");
4687
4688 if (do_unregister)
4689 scsi_remove_host(sh);
4690
4691 ap->ops->port_stop(ap);
4692}
4693
4694/**
4695 * ata_host_init - Initialize an ata_port structure
4696 * @ap: Structure to initialize
4697 * @host: associated SCSI mid-layer structure
4698 * @host_set: Collection of hosts to which @ap belongs
4699 * @ent: Probe information provided by low-level driver
4700 * @port_no: Port number associated with this ata_port
4701 *
0cba632b
JG		 4702 * Initialize a new ata_port structure, and its associated
4703 * scsi_host.
4704 *
1da177e4 4705 * LOCKING:
0cba632b 4706 * Inherited from caller.
1da177e4
LT		 4707 */
4708
4709static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4710 struct ata_host_set *host_set,
057ace5e 4711 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4712{
4713 unsigned int i;
4714
4715 host->max_id = 16;
4716 host->max_lun = 1;
4717 host->max_channel = 1;
4718 host->unique_id = ata_unique_id++;
4719 host->max_cmd_len = 12;
12413197 4720
1da177e4
LT		 4721 ap->flags = ATA_FLAG_PORT_DISABLED;
4722 ap->id = host->unique_id;
4723 ap->host = host;
4724 ap->ctl = ATA_DEVCTL_OBS;
4725 ap->host_set = host_set;
4726 ap->port_no = port_no;
4727 ap->hard_port_no =
4728 ent->legacy_mode ? ent->hard_port_no : port_no;
4729 ap->pio_mask = ent->pio_mask;
4730 ap->mwdma_mask = ent->mwdma_mask;
4731 ap->udma_mask = ent->udma_mask;
4732 ap->flags |= ent->host_flags;
4733 ap->ops = ent->port_ops;
4734 ap->cbl = ATA_CBL_NONE;
4735 ap->active_tag = ATA_TAG_POISON;
4736 ap->last_ctl = 0xFF;
4737
1da177e4 4738 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
a72ec4ce 4739 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4740
4741 for (i = 0; i < ATA_MAX_DEVICES; i++)
4742 ap->device[i].devno = i;
4743
4744#ifdef ATA_IRQ_TRAP
4745 ap->stats.unhandled_irq = 1;
4746 ap->stats.idle_irq = 1;
4747#endif
4748
4749 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4750}
4751
4752/**
4753 * ata_host_add - Attach low-level ATA driver to system
4754 * @ent: Information provided by low-level driver
4755 * @host_set: Collections of ports to which we add
4756 * @port_no: Port number associated with this host
4757 *
0cba632b
JG		 4758 * Attach low-level ATA driver to system.
4759 *
1da177e4 4760 * LOCKING:
0cba632b 4761 * PCI/etc. bus probe sem.
1da177e4
LT		 4762 *
4763 * RETURNS:
0cba632b 4764 * New ata_port on success, for NULL on error.
1da177e4
LT		 4765 */
4766
057ace5e 4767static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4768 struct ata_host_set *host_set,
4769 unsigned int port_no)
4770{
4771 struct Scsi_Host *host;
4772 struct ata_port *ap;
4773 int rc;
4774
4775 DPRINTK("ENTER\n");
4776 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4777 if (!host)
4778 return NULL;
4779
4780 ap = (struct ata_port *) &host->hostdata[0];
4781
4782 ata_host_init(ap, host, host_set, ent, port_no);
4783
4784 rc = ap->ops->port_start(ap);
4785 if (rc)
4786 goto err_out;
4787
4788 return ap;
4789
4790err_out:
4791 scsi_host_put(host);
4792 return NULL;
4793}
4794
4795/**
0cba632b
JG		 4796 * ata_device_add - Register hardware device with ATA and SCSI layers
4797 * @ent: Probe information describing hardware device to be registered
4798 *
4799 * This function processes the information provided in the probe
4800 * information struct @ent, allocates the necessary ATA and SCSI
4801 * host information structures, initializes them, and registers
4802 * everything with requisite kernel subsystems.
4803 *
4804 * This function requests irqs, probes the ATA bus, and probes
4805 * the SCSI bus.
1da177e4
LT		 4806 *
4807 * LOCKING:
0cba632b 4808 * PCI/etc. bus probe sem.
1da177e4
LT		 4809 *
4810 * RETURNS:
0cba632b 4811 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4812 */
4813
057ace5e 4814int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4815{
4816 unsigned int count = 0, i;
4817 struct device *dev = ent->dev;
4818 struct ata_host_set *host_set;
4819
4820 DPRINTK("ENTER\n");
4821 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4822 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4823 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4824 if (!host_set)
4825 return 0;
1da177e4
LT		 4826 spin_lock_init(&host_set->lock);
4827
4828 host_set->dev = dev;
4829 host_set->n_ports = ent->n_ports;
4830 host_set->irq = ent->irq;
4831 host_set->mmio_base = ent->mmio_base;
4832 host_set->private_data = ent->private_data;
4833 host_set->ops = ent->port_ops;
4834
4835 /* register each port bound to this device */
4836 for (i = 0; i < ent->n_ports; i++) {
4837 struct ata_port *ap;
4838 unsigned long xfer_mode_mask;
4839
4840 ap = ata_host_add(ent, host_set, i);
4841 if (!ap)
4842 goto err_out;
4843
4844 host_set->ports[i] = ap;
4845 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4846 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4847 (ap->pio_mask << ATA_SHIFT_PIO);
4848
4849 /* print per-port info to dmesg */
4850 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4851 "bmdma 0x%lX irq %lu\n",
4852 ap->id,
4853 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4854 ata_mode_string(xfer_mode_mask),
4855 ap->ioaddr.cmd_addr,
4856 ap->ioaddr.ctl_addr,
4857 ap->ioaddr.bmdma_addr,
4858 ent->irq);
4859
4860 ata_chk_status(ap);
4861 host_set->ops->irq_clear(ap);
4862 count++;
4863 }
4864
57f3bda8
RD		 4865 if (!count)
4866 goto err_free_ret;
1da177e4
LT		 4867
4868 /* obtain irq, that is shared between channels */
4869 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4870 DRV_NAME, host_set))
4871 goto err_out;
4872
4873 /* perform each probe synchronously */
4874 DPRINTK("probe begin\n");
4875 for (i = 0; i < count; i++) {
4876 struct ata_port *ap;
4877 int rc;
4878
4879 ap = host_set->ports[i];
4880
c893a3ae 4881 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4882 rc = ata_bus_probe(ap);
c893a3ae 4883 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4884
4885 if (rc) {
4886 /* FIXME: do something useful here?
4887 * Current libata behavior will
4888 * tear down everything when
4889 * the module is removed
4890 * or the h/w is unplugged.
4891 */
4892 }
4893
4894 rc = scsi_add_host(ap->host, dev);
4895 if (rc) {
4896 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4897 ap->id);
4898 /* FIXME: do something useful here */
4899 /* FIXME: handle unconditional calls to
4900 * scsi_scan_host and ata_host_remove, below,
4901 * at the very least
4902 */
4903 }
4904 }
4905
4906 /* probes are done, now scan each port's disk(s) */
c893a3ae 4907 DPRINTK("host probe begin\n");
1da177e4
LT		 4908 for (i = 0; i < count; i++) {
4909 struct ata_port *ap = host_set->ports[i];
4910
644dd0cc 4911 ata_scsi_scan_host(ap);
1da177e4
LT		 4912 }
4913
4914 dev_set_drvdata(dev, host_set);
4915
4916 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4917 return ent->n_ports; /* success */
4918
4919err_out:
4920 for (i = 0; i < count; i++) {
4921 ata_host_remove(host_set->ports[i], 1);
4922 scsi_host_put(host_set->ports[i]->host);
4923 }
57f3bda8 4924err_free_ret:
1da177e4
LT		 4925 kfree(host_set);
4926 VPRINTK("EXIT, returning 0\n");
4927 return 0;
4928}
4929
17b14451
AC		 4930/**
4931 * ata_host_set_remove - PCI layer callback for device removal
4932 * @host_set: ATA host set that was removed
4933 *
4934 * Unregister all objects associated with this host set. Free those
4935 * objects.
4936 *
4937 * LOCKING:
4938 * Inherited from calling layer (may sleep).
4939 */
4940
17b14451
AC		 4941void ata_host_set_remove(struct ata_host_set *host_set)
4942{
4943 struct ata_port *ap;
4944 unsigned int i;
4945
4946 for (i = 0; i < host_set->n_ports; i++) {
4947 ap = host_set->ports[i];
4948 scsi_remove_host(ap->host);
4949 }
4950
4951 free_irq(host_set->irq, host_set);
4952
4953 for (i = 0; i < host_set->n_ports; i++) {
4954 ap = host_set->ports[i];
4955
4956 ata_scsi_release(ap->host);
4957
4958 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4959 struct ata_ioports *ioaddr = &ap->ioaddr;
4960
4961 if (ioaddr->cmd_addr == 0x1f0)
4962 release_region(0x1f0, 8);
4963 else if (ioaddr->cmd_addr == 0x170)
4964 release_region(0x170, 8);
4965 }
4966
4967 scsi_host_put(ap->host);
4968 }
4969
4970 if (host_set->ops->host_stop)
4971 host_set->ops->host_stop(host_set);
4972
4973 kfree(host_set);
4974}
4975
1da177e4
LT		 4976/**
4977 * ata_scsi_release - SCSI layer callback hook for host unload
4978 * @host: libata host to be unloaded
4979 *
4980 * Performs all duties necessary to shut down a libata port...
4981 * Kill port kthread, disable port, and release resources.
4982 *
4983 * LOCKING:
4984 * Inherited from SCSI layer.
4985 *
4986 * RETURNS:
4987 * One.
4988 */
4989
4990int ata_scsi_release(struct Scsi_Host *host)
4991{
4992 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4993
4994 DPRINTK("ENTER\n");
4995
4996 ap->ops->port_disable(ap);
4997 ata_host_remove(ap, 0);
4998
4999 DPRINTK("EXIT\n");
5000 return 1;
5001}
5002
5003/**
5004 * ata_std_ports - initialize ioaddr with standard port offsets.
5005 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 5006 *
5007 * Utility function which initializes data_addr, error_addr,
5008 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5009 * device_addr, status_addr, and command_addr to standard offsets
5010 * relative to cmd_addr.
5011 *
5012 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 5013 */
0baab86b 5014
1da177e4
LT		 5015void ata_std_ports(struct ata_ioports *ioaddr)
5016{
5017 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5018 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5019 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5020 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5021 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5022 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5023 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5024 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5025 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5026 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5027}
5028
0baab86b 5029
374b1873
JG		 5030#ifdef CONFIG_PCI
5031
5032void ata_pci_host_stop (struct ata_host_set *host_set)
5033{
5034 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5035
5036 pci_iounmap(pdev, host_set->mmio_base);
5037}
5038
1da177e4
LT		 5039/**
5040 * ata_pci_remove_one - PCI layer callback for device removal
5041 * @pdev: PCI device that was removed
5042 *
5043 * PCI layer indicates to libata via this hook that
6f0ef4fa 5044 * hot-unplug or module unload event has occurred.
1da177e4
LT		 5045 * Handle this by unregistering all objects associated
5046 * with this PCI device. Free those objects. Then finally
5047 * release PCI resources and disable device.
5048 *
5049 * LOCKING:
5050 * Inherited from PCI layer (may sleep).
5051 */
5052
5053void ata_pci_remove_one (struct pci_dev *pdev)
5054{
5055 struct device *dev = pci_dev_to_dev(pdev);
5056 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 5057
17b14451 5058 ata_host_set_remove(host_set);
1da177e4
LT		 5059 pci_release_regions(pdev);
5060 pci_disable_device(pdev);
5061 dev_set_drvdata(dev, NULL);
5062}
5063
5064/* move to PCI subsystem */
057ace5e 5065int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 5066{
5067 unsigned long tmp = 0;
5068
5069 switch (bits->width) {
5070 case 1: {
5071 u8 tmp8 = 0;
5072 pci_read_config_byte(pdev, bits->reg, &tmp8);
5073 tmp = tmp8;
5074 break;
5075 }
5076 case 2: {
5077 u16 tmp16 = 0;
5078 pci_read_config_word(pdev, bits->reg, &tmp16);
5079 tmp = tmp16;
5080 break;
5081 }
5082 case 4: {
5083 u32 tmp32 = 0;
5084 pci_read_config_dword(pdev, bits->reg, &tmp32);
5085 tmp = tmp32;
5086 break;
5087 }
5088
5089 default:
5090 return -EINVAL;
5091 }
5092
5093 tmp &= bits->mask;
5094
5095 return (tmp == bits->val) ? 1 : 0;
5096}
9b847548
JA		 5097
5098int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5099{
5100 pci_save_state(pdev);
5101 pci_disable_device(pdev);
5102 pci_set_power_state(pdev, PCI_D3hot);
5103 return 0;
5104}
5105
5106int ata_pci_device_resume(struct pci_dev *pdev)
5107{
5108 pci_set_power_state(pdev, PCI_D0);
5109 pci_restore_state(pdev);
5110 pci_enable_device(pdev);
5111 pci_set_master(pdev);
5112 return 0;
5113}
1da177e4
LT		 5114#endif /* CONFIG_PCI */
5115
5116
1da177e4
LT		 5117static int __init ata_init(void)
5118{
5119 ata_wq = create_workqueue("ata");
5120 if (!ata_wq)
5121 return -ENOMEM;
5122
5123 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5124 return 0;
5125}
5126
5127static void __exit ata_exit(void)
5128{
5129 destroy_workqueue(ata_wq);
5130}
5131
5132module_init(ata_init);
5133module_exit(ata_exit);
5134
67846b30
JG		 5135static unsigned long ratelimit_time;
5136static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5137
5138int ata_ratelimit(void)
5139{
5140 int rc;
5141 unsigned long flags;
5142
5143 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5144
5145 if (time_after(jiffies, ratelimit_time)) {
5146 rc = 1;
5147 ratelimit_time = jiffies + (HZ/5);
5148 } else
5149 rc = 0;
5150
5151 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5152
5153 return rc;
5154}
5155
1da177e4
LT		 5156/*
5157 * libata is essentially a library of internal helper functions for
5158 * low-level ATA host controller drivers. As such, the API/ABI is
5159 * likely to change as new drivers are added and updated.
5160 * Do not depend on ABI/API stability.
5161 */
5162
5163EXPORT_SYMBOL_GPL(ata_std_bios_param);
5164EXPORT_SYMBOL_GPL(ata_std_ports);
5165EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5166EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5167EXPORT_SYMBOL_GPL(ata_sg_init);
5168EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5169EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5170EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5171EXPORT_SYMBOL_GPL(ata_eng_timeout);
5172EXPORT_SYMBOL_GPL(ata_tf_load);
5173EXPORT_SYMBOL_GPL(ata_tf_read);
5174EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5175EXPORT_SYMBOL_GPL(ata_std_dev_select);
5176EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5177EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5178EXPORT_SYMBOL_GPL(ata_check_status);
5179EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5180EXPORT_SYMBOL_GPL(ata_exec_command);
5181EXPORT_SYMBOL_GPL(ata_port_start);
5182EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5183EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5184EXPORT_SYMBOL_GPL(ata_interrupt);
5185EXPORT_SYMBOL_GPL(ata_qc_prep);
5186EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5187EXPORT_SYMBOL_GPL(ata_bmdma_start);
5188EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5189EXPORT_SYMBOL_GPL(ata_bmdma_status);
5190EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5191EXPORT_SYMBOL_GPL(ata_port_probe);
5192EXPORT_SYMBOL_GPL(sata_phy_reset);
5193EXPORT_SYMBOL_GPL(__sata_phy_reset);
5194EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5195EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5196EXPORT_SYMBOL_GPL(ata_std_softreset);
5197EXPORT_SYMBOL_GPL(sata_std_hardreset);
5198EXPORT_SYMBOL_GPL(ata_std_postreset);
5199EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5200EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
1da177e4 5201EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5202EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5203EXPORT_SYMBOL_GPL(ata_busy_sleep);
1da177e4
LT		 5204EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5205EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 5206EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 5207EXPORT_SYMBOL_GPL(ata_scsi_error);
5208EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5209EXPORT_SYMBOL_GPL(ata_scsi_release);
5210EXPORT_SYMBOL_GPL(ata_host_intr);
5211EXPORT_SYMBOL_GPL(ata_dev_classify);
5212EXPORT_SYMBOL_GPL(ata_dev_id_string);
0e949ff3 5213EXPORT_SYMBOL_GPL(ata_dev_id_c_string);
6f2f3812 5214EXPORT_SYMBOL_GPL(ata_dev_config);
1da177e4 5215EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5216EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5217EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5218
1bc4ccff 5219EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5220EXPORT_SYMBOL_GPL(ata_timing_compute);
5221EXPORT_SYMBOL_GPL(ata_timing_merge);
5222
1da177e4
LT		 5223#ifdef CONFIG_PCI
5224EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5225EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5226EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5227EXPORT_SYMBOL_GPL(ata_pci_init_one);
5228EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5229EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5230EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 5231#endif /* CONFIG_PCI */
9b847548
JA		 5232
5233EXPORT_SYMBOL_GPL(ata_device_suspend);
5234EXPORT_SYMBOL_GPL(ata_device_resume);
5235EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5236EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux kernel - Deliverables
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