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[PATCH] libata: separate out ata_spd_string()
[deliverable/linux.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
1da177e4 68static void ata_set_mode(struct ata_port *ap);
83206a29
TH		 69static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
70 struct ata_device *dev);
acf356b1 71static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 72
73static unsigned int ata_unique_id = 1;
74static struct workqueue_struct *ata_wq;
75
418dc1f5 76int atapi_enabled = 1;
1623c81e
JG		 77module_param(atapi_enabled, int, 0444);
78MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
79
c3c013a2
JG		 80int libata_fua = 0;
81module_param_named(fua, libata_fua, int, 0444);
82MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
83
1da177e4
LT		 84MODULE_AUTHOR("Jeff Garzik");
85MODULE_DESCRIPTION("Library module for ATA devices");
86MODULE_LICENSE("GPL");
87MODULE_VERSION(DRV_VERSION);
88
0baab86b 89
1da177e4
LT		 90/**
91 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
92 * @tf: Taskfile to convert
93 * @fis: Buffer into which data will output
94 * @pmp: Port multiplier port
95 *
96 * Converts a standard ATA taskfile to a Serial ATA
97 * FIS structure (Register - Host to Device).
98 *
99 * LOCKING:
100 * Inherited from caller.
101 */
102
057ace5e 103void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 104{
105 fis[0] = 0x27; /* Register - Host to Device FIS */
106 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
107 bit 7 indicates Command FIS */
108 fis[2] = tf->command;
109 fis[3] = tf->feature;
110
111 fis[4] = tf->lbal;
112 fis[5] = tf->lbam;
113 fis[6] = tf->lbah;
114 fis[7] = tf->device;
115
116 fis[8] = tf->hob_lbal;
117 fis[9] = tf->hob_lbam;
118 fis[10] = tf->hob_lbah;
119 fis[11] = tf->hob_feature;
120
121 fis[12] = tf->nsect;
122 fis[13] = tf->hob_nsect;
123 fis[14] = 0;
124 fis[15] = tf->ctl;
125
126 fis[16] = 0;
127 fis[17] = 0;
128 fis[18] = 0;
129 fis[19] = 0;
130}
131
132/**
133 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
134 * @fis: Buffer from which data will be input
135 * @tf: Taskfile to output
136 *
e12a1be6 137 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 138 *
139 * LOCKING:
140 * Inherited from caller.
141 */
142
057ace5e 143void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 144{
145 tf->command = fis[2]; /* status */
146 tf->feature = fis[3]; /* error */
147
148 tf->lbal = fis[4];
149 tf->lbam = fis[5];
150 tf->lbah = fis[6];
151 tf->device = fis[7];
152
153 tf->hob_lbal = fis[8];
154 tf->hob_lbam = fis[9];
155 tf->hob_lbah = fis[10];
156
157 tf->nsect = fis[12];
158 tf->hob_nsect = fis[13];
159}
160
8cbd6df1
AL		 161static const u8 ata_rw_cmds[] = {
162 /* pio multi */
163 ATA_CMD_READ_MULTI,
164 ATA_CMD_WRITE_MULTI,
165 ATA_CMD_READ_MULTI_EXT,
166 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 167 0,
168 0,
169 0,
170 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 171 /* pio */
172 ATA_CMD_PIO_READ,
173 ATA_CMD_PIO_WRITE,
174 ATA_CMD_PIO_READ_EXT,
175 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 176 0,
177 0,
178 0,
179 0,
8cbd6df1
AL		 180 /* dma */
181 ATA_CMD_READ,
182 ATA_CMD_WRITE,
183 ATA_CMD_READ_EXT,
9a3dccc4
TH		 184 ATA_CMD_WRITE_EXT,
185 0,
186 0,
187 0,
188 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 189};
1da177e4
LT		 190
191/**
8cbd6df1
AL		 192 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
193 * @qc: command to examine and configure
1da177e4 194 *
2e9edbf8 195 * Examine the device configuration and tf->flags to calculate
8cbd6df1 196 * the proper read/write commands and protocol to use.
1da177e4
LT		 197 *
198 * LOCKING:
199 * caller.
200 */
9a3dccc4 201int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 202{
8cbd6df1
AL		 203 struct ata_taskfile *tf = &qc->tf;
204 struct ata_device *dev = qc->dev;
9a3dccc4 205 u8 cmd;
1da177e4 206
9a3dccc4 207 int index, fua, lba48, write;
2e9edbf8 208
9a3dccc4 209 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 210 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
211 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 212
8cbd6df1
AL		 213 if (dev->flags & ATA_DFLAG_PIO) {
214 tf->protocol = ATA_PROT_PIO;
9a3dccc4 215 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 216 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
217 /* Unable to use DMA due to host limitation */
218 tf->protocol = ATA_PROT_PIO;
0565c26d 219 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 220 } else {
221 tf->protocol = ATA_PROT_DMA;
9a3dccc4 222 index = 16;
8cbd6df1 223 }
1da177e4 224
9a3dccc4
TH		 225 cmd = ata_rw_cmds[index + fua + lba48 + write];
226 if (cmd) {
227 tf->command = cmd;
228 return 0;
229 }
230 return -1;
1da177e4
LT		 231}
232
cb95d562
TH		 233/**
234 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
235 * @pio_mask: pio_mask
236 * @mwdma_mask: mwdma_mask
237 * @udma_mask: udma_mask
238 *
239 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
240 * unsigned int xfer_mask.
241 *
242 * LOCKING:
243 * None.
244 *
245 * RETURNS:
246 * Packed xfer_mask.
247 */
248static unsigned int ata_pack_xfermask(unsigned int pio_mask,
249 unsigned int mwdma_mask,
250 unsigned int udma_mask)
251{
252 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
253 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
254 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
255}
256
c0489e4e
TH		 257/**
258 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
259 * @xfer_mask: xfer_mask to unpack
260 * @pio_mask: resulting pio_mask
261 * @mwdma_mask: resulting mwdma_mask
262 * @udma_mask: resulting udma_mask
263 *
264 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
265 * Any NULL distination masks will be ignored.
266 */
267static void ata_unpack_xfermask(unsigned int xfer_mask,
268 unsigned int *pio_mask,
269 unsigned int *mwdma_mask,
270 unsigned int *udma_mask)
271{
272 if (pio_mask)
273 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
274 if (mwdma_mask)
275 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
276 if (udma_mask)
277 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
278}
279
cb95d562 280static const struct ata_xfer_ent {
be9a50c8 281 int shift, bits;
cb95d562
TH		 282 u8 base;
283} ata_xfer_tbl[] = {
284 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
285 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
286 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
287 { -1, },
288};
289
290/**
291 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
292 * @xfer_mask: xfer_mask of interest
293 *
294 * Return matching XFER_* value for @xfer_mask. Only the highest
295 * bit of @xfer_mask is considered.
296 *
297 * LOCKING:
298 * None.
299 *
300 * RETURNS:
301 * Matching XFER_* value, 0 if no match found.
302 */
303static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
304{
305 int highbit = fls(xfer_mask) - 1;
306 const struct ata_xfer_ent *ent;
307
308 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
309 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
310 return ent->base + highbit - ent->shift;
311 return 0;
312}
313
314/**
315 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
316 * @xfer_mode: XFER_* of interest
317 *
318 * Return matching xfer_mask for @xfer_mode.
319 *
320 * LOCKING:
321 * None.
322 *
323 * RETURNS:
324 * Matching xfer_mask, 0 if no match found.
325 */
326static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
327{
328 const struct ata_xfer_ent *ent;
329
330 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
331 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
332 return 1 << (ent->shift + xfer_mode - ent->base);
333 return 0;
334}
335
336/**
337 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
338 * @xfer_mode: XFER_* of interest
339 *
340 * Return matching xfer_shift for @xfer_mode.
341 *
342 * LOCKING:
343 * None.
344 *
345 * RETURNS:
346 * Matching xfer_shift, -1 if no match found.
347 */
348static int ata_xfer_mode2shift(unsigned int xfer_mode)
349{
350 const struct ata_xfer_ent *ent;
351
352 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
353 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
354 return ent->shift;
355 return -1;
356}
357
1da177e4 358/**
1da7b0d0
TH		 359 * ata_mode_string - convert xfer_mask to string
360 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 361 *
362 * Determine string which represents the highest speed
1da7b0d0 363 * (highest bit in @modemask).
1da177e4
LT		 364 *
365 * LOCKING:
366 * None.
367 *
368 * RETURNS:
369 * Constant C string representing highest speed listed in
1da7b0d0 370 * @mode_mask, or the constant C string "<n/a>".
1da177e4 371 */
1da7b0d0 372static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 373{
75f554bc
TH		 374 static const char * const xfer_mode_str[] = {
375 "PIO0",
376 "PIO1",
377 "PIO2",
378 "PIO3",
379 "PIO4",
380 "MWDMA0",
381 "MWDMA1",
382 "MWDMA2",
383 "UDMA/16",
384 "UDMA/25",
385 "UDMA/33",
386 "UDMA/44",
387 "UDMA/66",
388 "UDMA/100",
389 "UDMA/133",
390 "UDMA7",
391 };
1da7b0d0 392 int highbit;
1da177e4 393
1da7b0d0
TH		 394 highbit = fls(xfer_mask) - 1;
395 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
396 return xfer_mode_str[highbit];
1da177e4 397 return "<n/a>";
1da177e4
LT		 398}
399
4c360c81
TH		 400static const char *sata_spd_string(unsigned int spd)
401{
402 static const char * const spd_str[] = {
403 "1.5 Gbps",
404 "3.0 Gbps",
405 };
406
407 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
408 return "<unknown>";
409 return spd_str[spd - 1];
410}
411
0b8efb0a
TH		 412static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
413{
414 if (ata_dev_present(dev)) {
415 printk(KERN_WARNING "ata%u: dev %u disabled\n",
416 ap->id, dev->devno);
417 dev->class++;
418 }
419}
420
1da177e4
LT		 421/**
422 * ata_pio_devchk - PATA device presence detection
423 * @ap: ATA channel to examine
424 * @device: Device to examine (starting at zero)
425 *
426 * This technique was originally described in
427 * Hale Landis's ATADRVR (www.ata-atapi.com), and
428 * later found its way into the ATA/ATAPI spec.
429 *
430 * Write a pattern to the ATA shadow registers,
431 * and if a device is present, it will respond by
432 * correctly storing and echoing back the
433 * ATA shadow register contents.
434 *
435 * LOCKING:
436 * caller.
437 */
438
439static unsigned int ata_pio_devchk(struct ata_port *ap,
440 unsigned int device)
441{
442 struct ata_ioports *ioaddr = &ap->ioaddr;
443 u8 nsect, lbal;
444
445 ap->ops->dev_select(ap, device);
446
447 outb(0x55, ioaddr->nsect_addr);
448 outb(0xaa, ioaddr->lbal_addr);
449
450 outb(0xaa, ioaddr->nsect_addr);
451 outb(0x55, ioaddr->lbal_addr);
452
453 outb(0x55, ioaddr->nsect_addr);
454 outb(0xaa, ioaddr->lbal_addr);
455
456 nsect = inb(ioaddr->nsect_addr);
457 lbal = inb(ioaddr->lbal_addr);
458
459 if ((nsect == 0x55) && (lbal == 0xaa))
460 return 1; /* we found a device */
461
462 return 0; /* nothing found */
463}
464
465/**
466 * ata_mmio_devchk - PATA device presence detection
467 * @ap: ATA channel to examine
468 * @device: Device to examine (starting at zero)
469 *
470 * This technique was originally described in
471 * Hale Landis's ATADRVR (www.ata-atapi.com), and
472 * later found its way into the ATA/ATAPI spec.
473 *
474 * Write a pattern to the ATA shadow registers,
475 * and if a device is present, it will respond by
476 * correctly storing and echoing back the
477 * ATA shadow register contents.
478 *
479 * LOCKING:
480 * caller.
481 */
482
483static unsigned int ata_mmio_devchk(struct ata_port *ap,
484 unsigned int device)
485{
486 struct ata_ioports *ioaddr = &ap->ioaddr;
487 u8 nsect, lbal;
488
489 ap->ops->dev_select(ap, device);
490
491 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
492 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
493
494 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
499
500 nsect = readb((void __iomem *) ioaddr->nsect_addr);
501 lbal = readb((void __iomem *) ioaddr->lbal_addr);
502
503 if ((nsect == 0x55) && (lbal == 0xaa))
504 return 1; /* we found a device */
505
506 return 0; /* nothing found */
507}
508
509/**
510 * ata_devchk - PATA device presence detection
511 * @ap: ATA channel to examine
512 * @device: Device to examine (starting at zero)
513 *
514 * Dispatch ATA device presence detection, depending
515 * on whether we are using PIO or MMIO to talk to the
516 * ATA shadow registers.
517 *
518 * LOCKING:
519 * caller.
520 */
521
522static unsigned int ata_devchk(struct ata_port *ap,
523 unsigned int device)
524{
525 if (ap->flags & ATA_FLAG_MMIO)
526 return ata_mmio_devchk(ap, device);
527 return ata_pio_devchk(ap, device);
528}
529
530/**
531 * ata_dev_classify - determine device type based on ATA-spec signature
532 * @tf: ATA taskfile register set for device to be identified
533 *
534 * Determine from taskfile register contents whether a device is
535 * ATA or ATAPI, as per "Signature and persistence" section
536 * of ATA/PI spec (volume 1, sect 5.14).
537 *
538 * LOCKING:
539 * None.
540 *
541 * RETURNS:
542 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
543 * the event of failure.
544 */
545
057ace5e 546unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 547{
548 /* Apple's open source Darwin code hints that some devices only
549 * put a proper signature into the LBA mid/high registers,
550 * So, we only check those. It's sufficient for uniqueness.
551 */
552
553 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
554 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
555 DPRINTK("found ATA device by sig\n");
556 return ATA_DEV_ATA;
557 }
558
559 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
560 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
561 DPRINTK("found ATAPI device by sig\n");
562 return ATA_DEV_ATAPI;
563 }
564
565 DPRINTK("unknown device\n");
566 return ATA_DEV_UNKNOWN;
567}
568
569/**
570 * ata_dev_try_classify - Parse returned ATA device signature
571 * @ap: ATA channel to examine
572 * @device: Device to examine (starting at zero)
b4dc7623 573 * @r_err: Value of error register on completion
1da177e4
LT		 574 *
575 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
576 * an ATA/ATAPI-defined set of values is placed in the ATA
577 * shadow registers, indicating the results of device detection
578 * and diagnostics.
579 *
580 * Select the ATA device, and read the values from the ATA shadow
581 * registers. Then parse according to the Error register value,
582 * and the spec-defined values examined by ata_dev_classify().
583 *
584 * LOCKING:
585 * caller.
b4dc7623
TH		 586 *
587 * RETURNS:
588 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 589 */
590
b4dc7623
TH		 591static unsigned int
592ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 593{
1da177e4
LT		 594 struct ata_taskfile tf;
595 unsigned int class;
596 u8 err;
597
598 ap->ops->dev_select(ap, device);
599
600 memset(&tf, 0, sizeof(tf));
601
1da177e4 602 ap->ops->tf_read(ap, &tf);
0169e284 603 err = tf.feature;
b4dc7623
TH		 604 if (r_err)
605 *r_err = err;
1da177e4
LT		 606
607 /* see if device passed diags */
608 if (err == 1)
609 /* do nothing */ ;
610 else if ((device == 0) && (err == 0x81))
611 /* do nothing */ ;
612 else
b4dc7623 613 return ATA_DEV_NONE;
1da177e4 614
b4dc7623 615 /* determine if device is ATA or ATAPI */
1da177e4 616 class = ata_dev_classify(&tf);
b4dc7623 617
1da177e4 618 if (class == ATA_DEV_UNKNOWN)
b4dc7623 619 return ATA_DEV_NONE;
1da177e4 620 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 621 return ATA_DEV_NONE;
622 return class;
1da177e4
LT		 623}
624
625/**
6a62a04d 626 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 627 * @id: IDENTIFY DEVICE results we will examine
628 * @s: string into which data is output
629 * @ofs: offset into identify device page
630 * @len: length of string to return. must be an even number.
631 *
632 * The strings in the IDENTIFY DEVICE page are broken up into
633 * 16-bit chunks. Run through the string, and output each
634 * 8-bit chunk linearly, regardless of platform.
635 *
636 * LOCKING:
637 * caller.
638 */
639
6a62a04d
TH		 640void ata_id_string(const u16 *id, unsigned char *s,
641 unsigned int ofs, unsigned int len)
1da177e4
LT		 642{
643 unsigned int c;
644
645 while (len > 0) {
646 c = id[ofs] >> 8;
647 *s = c;
648 s++;
649
650 c = id[ofs] & 0xff;
651 *s = c;
652 s++;
653
654 ofs++;
655 len -= 2;
656 }
657}
658
0e949ff3 659/**
6a62a04d 660 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 661 * @id: IDENTIFY DEVICE results we will examine
662 * @s: string into which data is output
663 * @ofs: offset into identify device page
664 * @len: length of string to return. must be an odd number.
665 *
6a62a04d 666 * This function is identical to ata_id_string except that it
0e949ff3
TH		 667 * trims trailing spaces and terminates the resulting string with
668 * null. @len must be actual maximum length (even number) + 1.
669 *
670 * LOCKING:
671 * caller.
672 */
6a62a04d
TH		 673void ata_id_c_string(const u16 *id, unsigned char *s,
674 unsigned int ofs, unsigned int len)
0e949ff3
TH		 675{
676 unsigned char *p;
677
678 WARN_ON(!(len & 1));
679
6a62a04d 680 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 681
682 p = s + strnlen(s, len - 1);
683 while (p > s && p[-1] == ' ')
684 p--;
685 *p = '\0';
686}
0baab86b 687
2940740b
TH		 688static u64 ata_id_n_sectors(const u16 *id)
689{
690 if (ata_id_has_lba(id)) {
691 if (ata_id_has_lba48(id))
692 return ata_id_u64(id, 100);
693 else
694 return ata_id_u32(id, 60);
695 } else {
696 if (ata_id_current_chs_valid(id))
697 return ata_id_u32(id, 57);
698 else
699 return id[1] * id[3] * id[6];
700 }
701}
702
0baab86b
EF		 703/**
704 * ata_noop_dev_select - Select device 0/1 on ATA bus
705 * @ap: ATA channel to manipulate
706 * @device: ATA device (numbered from zero) to select
707 *
708 * This function performs no actual function.
709 *
710 * May be used as the dev_select() entry in ata_port_operations.
711 *
712 * LOCKING:
713 * caller.
714 */
1da177e4
LT		 715void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
716{
717}
718
0baab86b 719
1da177e4
LT		 720/**
721 * ata_std_dev_select - Select device 0/1 on ATA bus
722 * @ap: ATA channel to manipulate
723 * @device: ATA device (numbered from zero) to select
724 *
725 * Use the method defined in the ATA specification to
726 * make either device 0, or device 1, active on the
0baab86b
EF		 727 * ATA channel. Works with both PIO and MMIO.
728 *
729 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 730 *
731 * LOCKING:
732 * caller.
733 */
734
735void ata_std_dev_select (struct ata_port *ap, unsigned int device)
736{
737 u8 tmp;
738
739 if (device == 0)
740 tmp = ATA_DEVICE_OBS;
741 else
742 tmp = ATA_DEVICE_OBS | ATA_DEV1;
743
744 if (ap->flags & ATA_FLAG_MMIO) {
745 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
746 } else {
747 outb(tmp, ap->ioaddr.device_addr);
748 }
749 ata_pause(ap); /* needed; also flushes, for mmio */
750}
751
752/**
753 * ata_dev_select - Select device 0/1 on ATA bus
754 * @ap: ATA channel to manipulate
755 * @device: ATA device (numbered from zero) to select
756 * @wait: non-zero to wait for Status register BSY bit to clear
757 * @can_sleep: non-zero if context allows sleeping
758 *
759 * Use the method defined in the ATA specification to
760 * make either device 0, or device 1, active on the
761 * ATA channel.
762 *
763 * This is a high-level version of ata_std_dev_select(),
764 * which additionally provides the services of inserting
765 * the proper pauses and status polling, where needed.
766 *
767 * LOCKING:
768 * caller.
769 */
770
771void ata_dev_select(struct ata_port *ap, unsigned int device,
772 unsigned int wait, unsigned int can_sleep)
773{
774 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
775 ap->id, device, wait);
776
777 if (wait)
778 ata_wait_idle(ap);
779
780 ap->ops->dev_select(ap, device);
781
782 if (wait) {
783 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
784 msleep(150);
785 ata_wait_idle(ap);
786 }
787}
788
789/**
790 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 791 * @id: IDENTIFY DEVICE page to dump
1da177e4 792 *
0bd3300a
TH		 793 * Dump selected 16-bit words from the given IDENTIFY DEVICE
794 * page.
1da177e4
LT		 795 *
796 * LOCKING:
797 * caller.
798 */
799
0bd3300a 800static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 801{
802 DPRINTK("49==0x%04x "
803 "53==0x%04x "
804 "63==0x%04x "
805 "64==0x%04x "
806 "75==0x%04x \n",
0bd3300a
TH		 807 id[49],
808 id[53],
809 id[63],
810 id[64],
811 id[75]);
1da177e4
LT		 812 DPRINTK("80==0x%04x "
813 "81==0x%04x "
814 "82==0x%04x "
815 "83==0x%04x "
816 "84==0x%04x \n",
0bd3300a
TH		 817 id[80],
818 id[81],
819 id[82],
820 id[83],
821 id[84]);
1da177e4
LT		 822 DPRINTK("88==0x%04x "
823 "93==0x%04x\n",
0bd3300a
TH		 824 id[88],
825 id[93]);
1da177e4
LT		 826}
827
cb95d562
TH		 828/**
829 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
830 * @id: IDENTIFY data to compute xfer mask from
831 *
832 * Compute the xfermask for this device. This is not as trivial
833 * as it seems if we must consider early devices correctly.
834 *
835 * FIXME: pre IDE drive timing (do we care ?).
836 *
837 * LOCKING:
838 * None.
839 *
840 * RETURNS:
841 * Computed xfermask
842 */
843static unsigned int ata_id_xfermask(const u16 *id)
844{
845 unsigned int pio_mask, mwdma_mask, udma_mask;
846
847 /* Usual case. Word 53 indicates word 64 is valid */
848 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
849 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
850 pio_mask <<= 3;
851 pio_mask |= 0x7;
852 } else {
853 /* If word 64 isn't valid then Word 51 high byte holds
854 * the PIO timing number for the maximum. Turn it into
855 * a mask.
856 */
857 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
858
859 /* But wait.. there's more. Design your standards by
860 * committee and you too can get a free iordy field to
861 * process. However its the speeds not the modes that
862 * are supported... Note drivers using the timing API
863 * will get this right anyway
864 */
865 }
866
867 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 868
869 udma_mask = 0;
870 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
871 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 872
873 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
874}
875
86e45b6b
TH		 876/**
877 * ata_port_queue_task - Queue port_task
878 * @ap: The ata_port to queue port_task for
879 *
880 * Schedule @fn(@data) for execution after @delay jiffies using
881 * port_task. There is one port_task per port and it's the
882 * user(low level driver)'s responsibility to make sure that only
883 * one task is active at any given time.
884 *
885 * libata core layer takes care of synchronization between
886 * port_task and EH. ata_port_queue_task() may be ignored for EH
887 * synchronization.
888 *
889 * LOCKING:
890 * Inherited from caller.
891 */
892void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
893 unsigned long delay)
894{
895 int rc;
896
2e755f68 897 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 898 return;
899
900 PREPARE_WORK(&ap->port_task, fn, data);
901
902 if (!delay)
903 rc = queue_work(ata_wq, &ap->port_task);
904 else
905 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
906
907 /* rc == 0 means that another user is using port task */
908 WARN_ON(rc == 0);
909}
910
911/**
912 * ata_port_flush_task - Flush port_task
913 * @ap: The ata_port to flush port_task for
914 *
915 * After this function completes, port_task is guranteed not to
916 * be running or scheduled.
917 *
918 * LOCKING:
919 * Kernel thread context (may sleep)
920 */
921void ata_port_flush_task(struct ata_port *ap)
922{
923 unsigned long flags;
924
925 DPRINTK("ENTER\n");
926
927 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 928 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 929 spin_unlock_irqrestore(&ap->host_set->lock, flags);
930
931 DPRINTK("flush #1\n");
932 flush_workqueue(ata_wq);
933
934 /*
935 * At this point, if a task is running, it's guaranteed to see
936 * the FLUSH flag; thus, it will never queue pio tasks again.
937 * Cancel and flush.
938 */
939 if (!cancel_delayed_work(&ap->port_task)) {
940 DPRINTK("flush #2\n");
941 flush_workqueue(ata_wq);
942 }
943
944 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 945 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 946 spin_unlock_irqrestore(&ap->host_set->lock, flags);
947
948 DPRINTK("EXIT\n");
949}
950
77853bf2 951void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 952{
77853bf2 953 struct completion *waiting = qc->private_data;
a2a7a662 954
77853bf2 955 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 956 complete(waiting);
a2a7a662
TH		 957}
958
959/**
960 * ata_exec_internal - execute libata internal command
961 * @ap: Port to which the command is sent
962 * @dev: Device to which the command is sent
963 * @tf: Taskfile registers for the command and the result
964 * @dma_dir: Data tranfer direction of the command
965 * @buf: Data buffer of the command
966 * @buflen: Length of data buffer
967 *
968 * Executes libata internal command with timeout. @tf contains
969 * command on entry and result on return. Timeout and error
970 * conditions are reported via return value. No recovery action
971 * is taken after a command times out. It's caller's duty to
972 * clean up after timeout.
973 *
974 * LOCKING:
975 * None. Should be called with kernel context, might sleep.
976 */
977
978static unsigned
979ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
980 struct ata_taskfile *tf,
981 int dma_dir, void *buf, unsigned int buflen)
982{
983 u8 command = tf->command;
984 struct ata_queued_cmd *qc;
985 DECLARE_COMPLETION(wait);
986 unsigned long flags;
77853bf2 987 unsigned int err_mask;
a2a7a662
TH		 988
989 spin_lock_irqsave(&ap->host_set->lock, flags);
990
991 qc = ata_qc_new_init(ap, dev);
992 BUG_ON(qc == NULL);
993
994 qc->tf = *tf;
995 qc->dma_dir = dma_dir;
996 if (dma_dir != DMA_NONE) {
997 ata_sg_init_one(qc, buf, buflen);
998 qc->nsect = buflen / ATA_SECT_SIZE;
999 }
1000
77853bf2 1001 qc->private_data = &wait;
a2a7a662
TH		 1002 qc->complete_fn = ata_qc_complete_internal;
1003
8e0e694a 1004 ata_qc_issue(qc);
a2a7a662
TH		 1005
1006 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1007
1008 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1009 ata_port_flush_task(ap);
1010
a2a7a662
TH		 1011 spin_lock_irqsave(&ap->host_set->lock, flags);
1012
1013 /* We're racing with irq here. If we lose, the
1014 * following test prevents us from completing the qc
1015 * again. If completion irq occurs after here but
1016 * before the caller cleans up, it will result in a
1017 * spurious interrupt. We can live with that.
1018 */
77853bf2 1019 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1020 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1021 ata_qc_complete(qc);
1022 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1023 ap->id, command);
1024 }
1025
1026 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1027 }
1028
77853bf2
TH		 1029 *tf = qc->tf;
1030 err_mask = qc->err_mask;
1031
1032 ata_qc_free(qc);
1033
1f7dd3e9
TH		 1034 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1035 * Until those drivers are fixed, we detect the condition
1036 * here, fail the command with AC_ERR_SYSTEM and reenable the
1037 * port.
1038 *
1039 * Note that this doesn't change any behavior as internal
1040 * command failure results in disabling the device in the
1041 * higher layer for LLDDs without new reset/EH callbacks.
1042 *
1043 * Kill the following code as soon as those drivers are fixed.
1044 */
1045 if (ap->flags & ATA_FLAG_PORT_DISABLED) {
1046 err_mask |= AC_ERR_SYSTEM;
1047 ata_port_probe(ap);
1048 }
1049
77853bf2 1050 return err_mask;
a2a7a662
TH		 1051}
1052
1bc4ccff
AC		 1053/**
1054 * ata_pio_need_iordy - check if iordy needed
1055 * @adev: ATA device
1056 *
1057 * Check if the current speed of the device requires IORDY. Used
1058 * by various controllers for chip configuration.
1059 */
1060
1061unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1062{
1063 int pio;
1064 int speed = adev->pio_mode - XFER_PIO_0;
1065
1066 if (speed < 2)
1067 return 0;
1068 if (speed > 2)
1069 return 1;
2e9edbf8 1070
1bc4ccff
AC		 1071 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1072
1073 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1074 pio = adev->id[ATA_ID_EIDE_PIO];
1075 /* Is the speed faster than the drive allows non IORDY ? */
1076 if (pio) {
1077 /* This is cycle times not frequency - watch the logic! */
1078 if (pio > 240) /* PIO2 is 240nS per cycle */
1079 return 1;
1080 return 0;
1081 }
1082 }
1083 return 0;
1084}
1085
1da177e4 1086/**
49016aca
TH		 1087 * ata_dev_read_id - Read ID data from the specified device
1088 * @ap: port on which target device resides
1089 * @dev: target device
1090 * @p_class: pointer to class of the target device (may be changed)
1091 * @post_reset: is this read ID post-reset?
d9572b1d 1092 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1093 *
49016aca
TH		 1094 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1095 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1096 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1097 * for pre-ATA4 drives.
1da177e4
LT		 1098 *
1099 * LOCKING:
49016aca
TH		 1100 * Kernel thread context (may sleep)
1101 *
1102 * RETURNS:
1103 * 0 on success, -errno otherwise.
1da177e4 1104 */
49016aca 1105static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1106 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1107{
49016aca 1108 unsigned int class = *p_class;
a0123703 1109 struct ata_taskfile tf;
49016aca 1110 unsigned int err_mask = 0;
d9572b1d 1111 u16 *id;
49016aca
TH		 1112 const char *reason;
1113 int rc;
1da177e4 1114
49016aca 1115 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1116
49016aca 1117 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1118
d9572b1d
TH		 1119 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1120 if (id == NULL) {
1121 rc = -ENOMEM;
1122 reason = "out of memory";
1123 goto err_out;
1124 }
1125
49016aca
TH		 1126 retry:
1127 ata_tf_init(ap, &tf, dev->devno);
a0123703 1128
49016aca
TH		 1129 switch (class) {
1130 case ATA_DEV_ATA:
a0123703 1131 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1132 break;
1133 case ATA_DEV_ATAPI:
a0123703 1134 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1135 break;
1136 default:
1137 rc = -ENODEV;
1138 reason = "unsupported class";
1139 goto err_out;
1da177e4
LT		 1140 }
1141
a0123703 1142 tf.protocol = ATA_PROT_PIO;
1da177e4 1143
a0123703 1144 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1145 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1146 if (err_mask) {
49016aca
TH		 1147 rc = -EIO;
1148 reason = "I/O error";
1da177e4
LT		 1149 goto err_out;
1150 }
1151
49016aca 1152 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1153
49016aca 1154 /* sanity check */
692785e7 1155 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1156 rc = -EINVAL;
1157 reason = "device reports illegal type";
1158 goto err_out;
1159 }
1160
1161 if (post_reset && class == ATA_DEV_ATA) {
1162 /*
1163 * The exact sequence expected by certain pre-ATA4 drives is:
1164 * SRST RESET
1165 * IDENTIFY
1166 * INITIALIZE DEVICE PARAMETERS
1167 * anything else..
1168 * Some drives were very specific about that exact sequence.
1169 */
1170 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1171 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1172 if (err_mask) {
1173 rc = -EIO;
1174 reason = "INIT_DEV_PARAMS failed";
1175 goto err_out;
1176 }
1177
1178 /* current CHS translation info (id[53-58]) might be
1179 * changed. reread the identify device info.
1180 */
1181 post_reset = 0;
1182 goto retry;
1183 }
1184 }
1185
1186 *p_class = class;
d9572b1d 1187 *p_id = id;
49016aca
TH		 1188 return 0;
1189
1190 err_out:
1191 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1192 ap->id, dev->devno, reason);
d9572b1d 1193 kfree(id);
49016aca
TH		 1194 return rc;
1195}
1196
4b2f3ede
TH		 1197static inline u8 ata_dev_knobble(const struct ata_port *ap,
1198 struct ata_device *dev)
1199{
1200 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1201}
1202
49016aca 1203/**
ffeae418
TH		 1204 * ata_dev_configure - Configure the specified ATA/ATAPI device
1205 * @ap: Port on which target device resides
1206 * @dev: Target device to configure
4c2d721a 1207 * @print_info: Enable device info printout
ffeae418
TH		 1208 *
1209 * Configure @dev according to @dev->id. Generic and low-level
1210 * driver specific fixups are also applied.
49016aca
TH		 1211 *
1212 * LOCKING:
ffeae418
TH		 1213 * Kernel thread context (may sleep)
1214 *
1215 * RETURNS:
1216 * 0 on success, -errno otherwise
49016aca 1217 */
4c2d721a
TH		 1218static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1219 int print_info)
49016aca 1220{
1148c3a7 1221 const u16 *id = dev->id;
ff8854b2 1222 unsigned int xfer_mask;
49016aca
TH		 1223 int i, rc;
1224
1225 if (!ata_dev_present(dev)) {
1226 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1227 ap->id, dev->devno);
1228 return 0;
49016aca
TH		 1229 }
1230
ffeae418 1231 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1232
c39f5ebe
TH		 1233 /* print device capabilities */
1234 if (print_info)
1235 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1236 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1237 ap->id, dev->devno, id[49], id[82], id[83],
1238 id[84], id[85], id[86], id[87], id[88]);
1239
208a9933
TH		 1240 /* initialize to-be-configured parameters */
1241 dev->flags = 0;
1242 dev->max_sectors = 0;
1243 dev->cdb_len = 0;
1244 dev->n_sectors = 0;
1245 dev->cylinders = 0;
1246 dev->heads = 0;
1247 dev->sectors = 0;
1248
1da177e4
LT		 1249 /*
1250 * common ATA, ATAPI feature tests
1251 */
1252
ff8854b2 1253 /* find max transfer mode; for printk only */
1148c3a7 1254 xfer_mask = ata_id_xfermask(id);
1da177e4 1255
1148c3a7 1256 ata_dump_id(id);
1da177e4
LT		 1257
1258 /* ATA-specific feature tests */
1259 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1260 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1261
1148c3a7 1262 if (ata_id_has_lba(id)) {
4c2d721a 1263 const char *lba_desc;
8bf62ece 1264
4c2d721a
TH		 1265 lba_desc = "LBA";
1266 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1267 if (ata_id_has_lba48(id)) {
8bf62ece 1268 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1269 lba_desc = "LBA48";
1270 }
8bf62ece
AL		 1271
1272 /* print device info to dmesg */
4c2d721a
TH		 1273 if (print_info)
1274 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1275 "max %s, %Lu sectors: %s\n",
1276 ap->id, dev->devno,
1148c3a7 1277 ata_id_major_version(id),
ff8854b2 1278 ata_mode_string(xfer_mask),
4c2d721a
TH		 1279 (unsigned long long)dev->n_sectors,
1280 lba_desc);
ffeae418 1281 } else {
8bf62ece
AL		 1282 /* CHS */
1283
1284 /* Default translation */
1148c3a7
TH		 1285 dev->cylinders = id[1];
1286 dev->heads = id[3];
1287 dev->sectors = id[6];
8bf62ece 1288
1148c3a7 1289 if (ata_id_current_chs_valid(id)) {
8bf62ece 1290 /* Current CHS translation is valid. */
1148c3a7
TH		 1291 dev->cylinders = id[54];
1292 dev->heads = id[55];
1293 dev->sectors = id[56];
8bf62ece
AL		 1294 }
1295
1296 /* print device info to dmesg */
4c2d721a
TH		 1297 if (print_info)
1298 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1299 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1300 ap->id, dev->devno,
1148c3a7 1301 ata_id_major_version(id),
ff8854b2 1302 ata_mode_string(xfer_mask),
4c2d721a
TH		 1303 (unsigned long long)dev->n_sectors,
1304 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1305 }
1306
6e7846e9 1307 dev->cdb_len = 16;
1da177e4
LT		 1308 }
1309
1310 /* ATAPI-specific feature tests */
2c13b7ce 1311 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1312 rc = atapi_cdb_len(id);
1da177e4
LT		 1313 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1314 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1315 rc = -EINVAL;
1da177e4
LT		 1316 goto err_out_nosup;
1317 }
6e7846e9 1318 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1319
1320 /* print device info to dmesg */
4c2d721a
TH		 1321 if (print_info)
1322 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1323 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1324 }
1325
6e7846e9
TH		 1326 ap->host->max_cmd_len = 0;
1327 for (i = 0; i < ATA_MAX_DEVICES; i++)
1328 ap->host->max_cmd_len = max_t(unsigned int,
1329 ap->host->max_cmd_len,
1330 ap->device[i].cdb_len);
1331
4b2f3ede
TH		 1332 /* limit bridge transfers to udma5, 200 sectors */
1333 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1334 if (print_info)
1335 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1336 ap->id, dev->devno);
5a529139 1337 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1338 dev->max_sectors = ATA_MAX_SECTORS;
1339 }
1340
1341 if (ap->ops->dev_config)
1342 ap->ops->dev_config(ap, dev);
1343
1da177e4 1344 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1345 return 0;
1da177e4
LT		 1346
1347err_out_nosup:
1da177e4 1348 DPRINTK("EXIT, err\n");
ffeae418 1349 return rc;
1da177e4
LT		 1350}
1351
1352/**
1353 * ata_bus_probe - Reset and probe ATA bus
1354 * @ap: Bus to probe
1355 *
0cba632b
JG		 1356 * Master ATA bus probing function. Initiates a hardware-dependent
1357 * bus reset, then attempts to identify any devices found on
1358 * the bus.
1359 *
1da177e4 1360 * LOCKING:
0cba632b 1361 * PCI/etc. bus probe sem.
1da177e4
LT		 1362 *
1363 * RETURNS:
96072e69 1364 * Zero on success, negative errno otherwise.
1da177e4
LT		 1365 */
1366
1367static int ata_bus_probe(struct ata_port *ap)
1368{
28ca5c57 1369 unsigned int classes[ATA_MAX_DEVICES];
96072e69 1370 int i, rc, found = 0;
1da177e4 1371
28ca5c57 1372 ata_port_probe(ap);
c19ba8af 1373
2044470c
TH		 1374 /* reset and determine device classes */
1375 for (i = 0; i < ATA_MAX_DEVICES; i++)
1376 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1377
2044470c 1378 if (ap->ops->probe_reset) {
c19ba8af 1379 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1380 if (rc) {
1381 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1382 return rc;
c19ba8af 1383 }
28ca5c57 1384 } else {
c19ba8af
TH		 1385 ap->ops->phy_reset(ap);
1386
2044470c
TH		 1387 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1388 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1389 classes[i] = ap->device[i].class;
2044470c 1390
28ca5c57
TH		 1391 ata_port_probe(ap);
1392 }
1da177e4 1393
2044470c
TH		 1394 for (i = 0; i < ATA_MAX_DEVICES; i++)
1395 if (classes[i] == ATA_DEV_UNKNOWN)
1396 classes[i] = ATA_DEV_NONE;
1397
28ca5c57 1398 /* read IDENTIFY page and configure devices */
1da177e4 1399 for (i = 0; i < ATA_MAX_DEVICES; i++) {
ffeae418
TH		 1400 struct ata_device *dev = &ap->device[i];
1401
28ca5c57
TH		 1402 dev->class = classes[i];
1403
ffeae418
TH		 1404 if (!ata_dev_present(dev))
1405 continue;
1406
1407 WARN_ON(dev->id != NULL);
1408 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1409 dev->class = ATA_DEV_NONE;
1410 continue;
1411 }
1412
4c2d721a 1413 if (ata_dev_configure(ap, dev, 1)) {
fcef978f 1414 ata_dev_disable(ap, dev);
ffeae418 1415 continue;
1da177e4 1416 }
ffeae418 1417
ffeae418 1418 found = 1;
1da177e4
LT		 1419 }
1420
28ca5c57 1421 if (!found)
1da177e4
LT		 1422 goto err_out_disable;
1423
e35a9e01
AC		 1424 if (ap->ops->set_mode)
1425 ap->ops->set_mode(ap);
1426 else
1427 ata_set_mode(ap);
1428
1da177e4
LT		 1429 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1430 goto err_out_disable;
1431
1432 return 0;
1433
1434err_out_disable:
1435 ap->ops->port_disable(ap);
96072e69 1436 return -ENODEV;
1da177e4
LT		 1437}
1438
1439/**
0cba632b
JG		 1440 * ata_port_probe - Mark port as enabled
1441 * @ap: Port for which we indicate enablement
1da177e4 1442 *
0cba632b
JG		 1443 * Modify @ap data structure such that the system
1444 * thinks that the entire port is enabled.
1445 *
1446 * LOCKING: host_set lock, or some other form of
1447 * serialization.
1da177e4
LT		 1448 */
1449
1450void ata_port_probe(struct ata_port *ap)
1451{
1452 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1453}
1454
3be680b7
TH		 1455/**
1456 * sata_print_link_status - Print SATA link status
1457 * @ap: SATA port to printk link status about
1458 *
1459 * This function prints link speed and status of a SATA link.
1460 *
1461 * LOCKING:
1462 * None.
1463 */
1464static void sata_print_link_status(struct ata_port *ap)
1465{
1466 u32 sstatus, tmp;
3be680b7
TH		 1467
1468 if (!ap->ops->scr_read)
1469 return;
1470
1471 sstatus = scr_read(ap, SCR_STATUS);
1472
1473 if (sata_dev_present(ap)) {
1474 tmp = (sstatus >> 4) & 0xf;
4c360c81
TH		 1475 printk(KERN_INFO "ata%u: SATA link up %s (SStatus %X)\n",
1476 ap->id, sata_spd_string(tmp), sstatus);
3be680b7
TH		 1477 } else {
1478 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1479 ap->id, sstatus);
1480 }
1481}
1482
1da177e4 1483/**
780a87f7
JG		 1484 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1485 * @ap: SATA port associated with target SATA PHY.
1da177e4 1486 *
780a87f7
JG		 1487 * This function issues commands to standard SATA Sxxx
1488 * PHY registers, to wake up the phy (and device), and
1489 * clear any reset condition.
1da177e4
LT		 1490 *
1491 * LOCKING:
0cba632b 1492 * PCI/etc. bus probe sem.
1da177e4
LT		 1493 *
1494 */
1495void __sata_phy_reset(struct ata_port *ap)
1496{
1497 u32 sstatus;
1498 unsigned long timeout = jiffies + (HZ * 5);
1499
1500 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1501 /* issue phy wake/reset */
1502 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1503 /* Couldn't find anything in SATA I/II specs, but
1504 * AHCI-1.1 10.4.2 says at least 1 ms. */
1505 mdelay(1);
1da177e4 1506 }
cdcca89e 1507 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1508
1509 /* wait for phy to become ready, if necessary */
1510 do {
1511 msleep(200);
1512 sstatus = scr_read(ap, SCR_STATUS);
1513 if ((sstatus & 0xf) != 1)
1514 break;
1515 } while (time_before(jiffies, timeout));
1516
3be680b7
TH		 1517 /* print link status */
1518 sata_print_link_status(ap);
656563e3 1519
3be680b7
TH		 1520 /* TODO: phy layer with polling, timeouts, etc. */
1521 if (sata_dev_present(ap))
1da177e4 1522 ata_port_probe(ap);
3be680b7 1523 else
1da177e4 1524 ata_port_disable(ap);
1da177e4
LT		 1525
1526 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1527 return;
1528
1529 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1530 ata_port_disable(ap);
1531 return;
1532 }
1533
1534 ap->cbl = ATA_CBL_SATA;
1535}
1536
1537/**
780a87f7
JG		 1538 * sata_phy_reset - Reset SATA bus.
1539 * @ap: SATA port associated with target SATA PHY.
1da177e4 1540 *
780a87f7
JG		 1541 * This function resets the SATA bus, and then probes
1542 * the bus for devices.
1da177e4
LT		 1543 *
1544 * LOCKING:
0cba632b 1545 * PCI/etc. bus probe sem.
1da177e4
LT		 1546 *
1547 */
1548void sata_phy_reset(struct ata_port *ap)
1549{
1550 __sata_phy_reset(ap);
1551 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1552 return;
1553 ata_bus_reset(ap);
1554}
1555
ebdfca6e
AC		 1556/**
1557 * ata_dev_pair - return other device on cable
1558 * @ap: port
1559 * @adev: device
1560 *
1561 * Obtain the other device on the same cable, or if none is
1562 * present NULL is returned
1563 */
2e9edbf8 1564
ebdfca6e
AC		 1565struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1566{
1567 struct ata_device *pair = &ap->device[1 - adev->devno];
1568 if (!ata_dev_present(pair))
1569 return NULL;
1570 return pair;
1571}
1572
1da177e4 1573/**
780a87f7
JG		 1574 * ata_port_disable - Disable port.
1575 * @ap: Port to be disabled.
1da177e4 1576 *
780a87f7
JG		 1577 * Modify @ap data structure such that the system
1578 * thinks that the entire port is disabled, and should
1579 * never attempt to probe or communicate with devices
1580 * on this port.
1581 *
1582 * LOCKING: host_set lock, or some other form of
1583 * serialization.
1da177e4
LT		 1584 */
1585
1586void ata_port_disable(struct ata_port *ap)
1587{
1588 ap->device[0].class = ATA_DEV_NONE;
1589 ap->device[1].class = ATA_DEV_NONE;
1590 ap->flags |= ATA_FLAG_PORT_DISABLED;
1591}
1592
452503f9
AC		 1593/*
1594 * This mode timing computation functionality is ported over from
1595 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1596 */
1597/*
1598 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1599 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1600 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1601 * is currently supported only by Maxtor drives.
452503f9
AC		 1602 */
1603
1604static const struct ata_timing ata_timing[] = {
1605
1606 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1607 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1608 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1609 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1610
1611 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1612 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1613 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1614
1615/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1616
452503f9
AC		 1617 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1618 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1619 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1620
452503f9
AC		 1621 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1622 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1623 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1624
1625/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1626 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1627 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1628
1629 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1630 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1631 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1632
1633/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1634
1635 { 0xFF }
1636};
1637
1638#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1639#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1640
1641static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1642{
1643 q->setup = EZ(t->setup * 1000, T);
1644 q->act8b = EZ(t->act8b * 1000, T);
1645 q->rec8b = EZ(t->rec8b * 1000, T);
1646 q->cyc8b = EZ(t->cyc8b * 1000, T);
1647 q->active = EZ(t->active * 1000, T);
1648 q->recover = EZ(t->recover * 1000, T);
1649 q->cycle = EZ(t->cycle * 1000, T);
1650 q->udma = EZ(t->udma * 1000, UT);
1651}
1652
1653void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1654 struct ata_timing *m, unsigned int what)
1655{
1656 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1657 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1658 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1659 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1660 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1661 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1662 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1663 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1664}
1665
1666static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1667{
1668 const struct ata_timing *t;
1669
1670 for (t = ata_timing; t->mode != speed; t++)
91190758 1671 if (t->mode == 0xFF)
452503f9 1672 return NULL;
2e9edbf8 1673 return t;
452503f9
AC		 1674}
1675
1676int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1677 struct ata_timing *t, int T, int UT)
1678{
1679 const struct ata_timing *s;
1680 struct ata_timing p;
1681
1682 /*
2e9edbf8 1683 * Find the mode.
75b1f2f8 1684 */
452503f9
AC		 1685
1686 if (!(s = ata_timing_find_mode(speed)))
1687 return -EINVAL;
1688
75b1f2f8
AL		 1689 memcpy(t, s, sizeof(*s));
1690
452503f9
AC		 1691 /*
1692 * If the drive is an EIDE drive, it can tell us it needs extended
1693 * PIO/MW_DMA cycle timing.
1694 */
1695
1696 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1697 memset(&p, 0, sizeof(p));
1698 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1699 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1700 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1701 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1702 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1703 }
1704 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1705 }
1706
1707 /*
1708 * Convert the timing to bus clock counts.
1709 */
1710
75b1f2f8 1711 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1712
1713 /*
c893a3ae
RD		 1714 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1715 * S.M.A.R.T * and some other commands. We have to ensure that the
1716 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1717 */
1718
1719 if (speed > XFER_PIO_4) {
1720 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1721 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1722 }
1723
1724 /*
c893a3ae 1725 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1726 */
1727
1728 if (t->act8b + t->rec8b < t->cyc8b) {
1729 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1730 t->rec8b = t->cyc8b - t->act8b;
1731 }
1732
1733 if (t->active + t->recover < t->cycle) {
1734 t->active += (t->cycle - (t->active + t->recover)) / 2;
1735 t->recover = t->cycle - t->active;
1736 }
1737
1738 return 0;
1739}
1740
83206a29 1741static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1742{
83206a29
TH		 1743 unsigned int err_mask;
1744 int rc;
1da177e4
LT		 1745
1746 if (dev->xfer_shift == ATA_SHIFT_PIO)
1747 dev->flags |= ATA_DFLAG_PIO;
1748
83206a29
TH		 1749 err_mask = ata_dev_set_xfermode(ap, dev);
1750 if (err_mask) {
1751 printk(KERN_ERR
1752 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1753 ap->id, err_mask);
1754 return -EIO;
1755 }
1da177e4 1756
83206a29
TH		 1757 rc = ata_dev_revalidate(ap, dev, 0);
1758 if (rc) {
1759 printk(KERN_ERR
1760 "ata%u: failed to revalidate after set xfermode\n",
1761 ap->id);
1762 return rc;
48a8a14f
TH		 1763 }
1764
23e71c3d
TH		 1765 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1766 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1767
1768 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1769 ap->id, dev->devno,
1770 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1771 return 0;
1da177e4
LT		 1772}
1773
1774static int ata_host_set_pio(struct ata_port *ap)
1775{
a6d5a51c 1776 int i;
1da177e4
LT		 1777
1778 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1779 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1780
1781 if (!ata_dev_present(dev))
1782 continue;
1783
1784 if (!dev->pio_mode) {
88f93a31 1785 printk(KERN_WARNING "ata%u: no PIO support for device %d.\n", ap->id, i);
a6d5a51c 1786 return -1;
1da177e4 1787 }
a6d5a51c
TH		 1788
1789 dev->xfer_mode = dev->pio_mode;
1790 dev->xfer_shift = ATA_SHIFT_PIO;
1791 if (ap->ops->set_piomode)
1792 ap->ops->set_piomode(ap, dev);
1da177e4
LT		 1793 }
1794
1795 return 0;
1796}
1797
a6d5a51c 1798static void ata_host_set_dma(struct ata_port *ap)
1da177e4
LT		 1799{
1800 int i;
1801
1802 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1803 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1804
1805 if (!ata_dev_present(dev) || !dev->dma_mode)
1806 continue;
1807
1808 dev->xfer_mode = dev->dma_mode;
1809 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1810 if (ap->ops->set_dmamode)
1811 ap->ops->set_dmamode(ap, dev);
1da177e4
LT		 1812 }
1813}
1814
1815/**
1816 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1817 * @ap: port on which timings will be programmed
1818 *
780a87f7
JG		 1819 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1820 *
1da177e4 1821 * LOCKING:
0cba632b 1822 * PCI/etc. bus probe sem.
1da177e4
LT		 1823 */
1824static void ata_set_mode(struct ata_port *ap)
1825{
5444a6f4 1826 int i, rc, used_dma = 0;
1da177e4 1827
a6d5a51c
TH		 1828 /* step 1: calculate xfer_mask */
1829 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1830 struct ata_device *dev = &ap->device[i];
acf356b1 1831 unsigned int pio_mask, dma_mask;
a6d5a51c
TH		 1832
1833 if (!ata_dev_present(dev))
1834 continue;
1835
acf356b1 1836 ata_dev_xfermask(ap, dev);
1da177e4 1837
acf356b1
TH		 1838 /* TODO: let LLDD filter dev->*_mask here */
1839
1840 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1841 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1842 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1843 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4
AC		 1844
1845 if (dev->dma_mode)
1846 used_dma = 1;
a6d5a51c
TH		 1847 }
1848
1849 /* step 2: always set host PIO timings */
1850 rc = ata_host_set_pio(ap);
1da177e4
LT		 1851 if (rc)
1852 goto err_out;
1853
a6d5a51c
TH		 1854 /* step 3: set host DMA timings */
1855 ata_host_set_dma(ap);
1da177e4
LT		 1856
1857 /* step 4: update devices' xfer mode */
83206a29
TH		 1858 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1859 struct ata_device *dev = &ap->device[i];
1da177e4 1860
83206a29
TH		 1861 if (!ata_dev_present(dev))
1862 continue;
1863
5bbc53f4
TH		 1864 rc = ata_dev_set_mode(ap, dev);
1865 if (rc)
83206a29
TH		 1866 goto err_out;
1867 }
1da177e4 1868
5444a6f4
AC		 1869 /*
1870 * Record simplex status. If we selected DMA then the other
1871 * host channels are not permitted to do so.
1872 */
1873
1874 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
1875 ap->host_set->simplex_claimed = 1;
1876
1877 /*
1878 * Chip specific finalisation
1879 */
1da177e4
LT		 1880 if (ap->ops->post_set_mode)
1881 ap->ops->post_set_mode(ap);
1882
1da177e4
LT		 1883 return;
1884
1885err_out:
1886 ata_port_disable(ap);
1887}
1888
1fdffbce
JG		 1889/**
1890 * ata_tf_to_host - issue ATA taskfile to host controller
1891 * @ap: port to which command is being issued
1892 * @tf: ATA taskfile register set
1893 *
1894 * Issues ATA taskfile register set to ATA host controller,
1895 * with proper synchronization with interrupt handler and
1896 * other threads.
1897 *
1898 * LOCKING:
1899 * spin_lock_irqsave(host_set lock)
1900 */
1901
1902static inline void ata_tf_to_host(struct ata_port *ap,
1903 const struct ata_taskfile *tf)
1904{
1905 ap->ops->tf_load(ap, tf);
1906 ap->ops->exec_command(ap, tf);
1907}
1908
1da177e4
LT		 1909/**
1910 * ata_busy_sleep - sleep until BSY clears, or timeout
1911 * @ap: port containing status register to be polled
1912 * @tmout_pat: impatience timeout
1913 * @tmout: overall timeout
1914 *
780a87f7
JG		 1915 * Sleep until ATA Status register bit BSY clears,
1916 * or a timeout occurs.
1917 *
1918 * LOCKING: None.
1da177e4
LT		 1919 */
1920
6f8b9958
TH		 1921unsigned int ata_busy_sleep (struct ata_port *ap,
1922 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1923{
1924 unsigned long timer_start, timeout;
1925 u8 status;
1926
1927 status = ata_busy_wait(ap, ATA_BUSY, 300);
1928 timer_start = jiffies;
1929 timeout = timer_start + tmout_pat;
1930 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1931 msleep(50);
1932 status = ata_busy_wait(ap, ATA_BUSY, 3);
1933 }
1934
1935 if (status & ATA_BUSY)
1936 printk(KERN_WARNING "ata%u is slow to respond, "
1937 "please be patient\n", ap->id);
1938
1939 timeout = timer_start + tmout;
1940 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1941 msleep(50);
1942 status = ata_chk_status(ap);
1943 }
1944
1945 if (status & ATA_BUSY) {
1946 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1947 ap->id, tmout / HZ);
1948 return 1;
1949 }
1950
1951 return 0;
1952}
1953
1954static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1955{
1956 struct ata_ioports *ioaddr = &ap->ioaddr;
1957 unsigned int dev0 = devmask & (1 << 0);
1958 unsigned int dev1 = devmask & (1 << 1);
1959 unsigned long timeout;
1960
1961 /* if device 0 was found in ata_devchk, wait for its
1962 * BSY bit to clear
1963 */
1964 if (dev0)
1965 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1966
1967 /* if device 1 was found in ata_devchk, wait for
1968 * register access, then wait for BSY to clear
1969 */
1970 timeout = jiffies + ATA_TMOUT_BOOT;
1971 while (dev1) {
1972 u8 nsect, lbal;
1973
1974 ap->ops->dev_select(ap, 1);
1975 if (ap->flags & ATA_FLAG_MMIO) {
1976 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1977 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1978 } else {
1979 nsect = inb(ioaddr->nsect_addr);
1980 lbal = inb(ioaddr->lbal_addr);
1981 }
1982 if ((nsect == 1) && (lbal == 1))
1983 break;
1984 if (time_after(jiffies, timeout)) {
1985 dev1 = 0;
1986 break;
1987 }
1988 msleep(50); /* give drive a breather */
1989 }
1990 if (dev1)
1991 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1992
1993 /* is all this really necessary? */
1994 ap->ops->dev_select(ap, 0);
1995 if (dev1)
1996 ap->ops->dev_select(ap, 1);
1997 if (dev0)
1998 ap->ops->dev_select(ap, 0);
1999}
2000
1da177e4
LT		 2001static unsigned int ata_bus_softreset(struct ata_port *ap,
2002 unsigned int devmask)
2003{
2004 struct ata_ioports *ioaddr = &ap->ioaddr;
2005
2006 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2007
2008 /* software reset. causes dev0 to be selected */
2009 if (ap->flags & ATA_FLAG_MMIO) {
2010 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2011 udelay(20); /* FIXME: flush */
2012 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2013 udelay(20); /* FIXME: flush */
2014 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2015 } else {
2016 outb(ap->ctl, ioaddr->ctl_addr);
2017 udelay(10);
2018 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2019 udelay(10);
2020 outb(ap->ctl, ioaddr->ctl_addr);
2021 }
2022
2023 /* spec mandates ">= 2ms" before checking status.
2024 * We wait 150ms, because that was the magic delay used for
2025 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2026 * between when the ATA command register is written, and then
2027 * status is checked. Because waiting for "a while" before
2028 * checking status is fine, post SRST, we perform this magic
2029 * delay here as well.
09c7ad79
AC		 2030 *
2031 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2032 */
2033 msleep(150);
2034
2e9edbf8 2035 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2036 * the bus shows 0xFF because the odd clown forgets the D7
2037 * pulldown resistor.
2038 */
09c7ad79 2039 if (ata_check_status(ap) == 0xFF)
298a41ca 2040 return AC_ERR_OTHER;
09c7ad79 2041
1da177e4
LT		 2042 ata_bus_post_reset(ap, devmask);
2043
2044 return 0;
2045}
2046
2047/**
2048 * ata_bus_reset - reset host port and associated ATA channel
2049 * @ap: port to reset
2050 *
2051 * This is typically the first time we actually start issuing
2052 * commands to the ATA channel. We wait for BSY to clear, then
2053 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2054 * result. Determine what devices, if any, are on the channel
2055 * by looking at the device 0/1 error register. Look at the signature
2056 * stored in each device's taskfile registers, to determine if
2057 * the device is ATA or ATAPI.
2058 *
2059 * LOCKING:
0cba632b
JG		 2060 * PCI/etc. bus probe sem.
2061 * Obtains host_set lock.
1da177e4
LT		 2062 *
2063 * SIDE EFFECTS:
2064 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2065 */
2066
2067void ata_bus_reset(struct ata_port *ap)
2068{
2069 struct ata_ioports *ioaddr = &ap->ioaddr;
2070 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2071 u8 err;
aec5c3c1 2072 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2073
2074 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2075
2076 /* determine if device 0/1 are present */
2077 if (ap->flags & ATA_FLAG_SATA_RESET)
2078 dev0 = 1;
2079 else {
2080 dev0 = ata_devchk(ap, 0);
2081 if (slave_possible)
2082 dev1 = ata_devchk(ap, 1);
2083 }
2084
2085 if (dev0)
2086 devmask |= (1 << 0);
2087 if (dev1)
2088 devmask |= (1 << 1);
2089
2090 /* select device 0 again */
2091 ap->ops->dev_select(ap, 0);
2092
2093 /* issue bus reset */
2094 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2095 if (ata_bus_softreset(ap, devmask))
2096 goto err_out;
1da177e4
LT		 2097
2098 /*
2099 * determine by signature whether we have ATA or ATAPI devices
2100 */
b4dc7623 2101 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2102 if ((slave_possible) && (err != 0x81))
b4dc7623 2103 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2104
2105 /* re-enable interrupts */
2106 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2107 ata_irq_on(ap);
2108
2109 /* is double-select really necessary? */
2110 if (ap->device[1].class != ATA_DEV_NONE)
2111 ap->ops->dev_select(ap, 1);
2112 if (ap->device[0].class != ATA_DEV_NONE)
2113 ap->ops->dev_select(ap, 0);
2114
2115 /* if no devices were detected, disable this port */
2116 if ((ap->device[0].class == ATA_DEV_NONE) &&
2117 (ap->device[1].class == ATA_DEV_NONE))
2118 goto err_out;
2119
2120 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2121 /* set up device control for ATA_FLAG_SATA_RESET */
2122 if (ap->flags & ATA_FLAG_MMIO)
2123 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2124 else
2125 outb(ap->ctl, ioaddr->ctl_addr);
2126 }
2127
2128 DPRINTK("EXIT\n");
2129 return;
2130
2131err_out:
2132 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2133 ap->ops->port_disable(ap);
2134
2135 DPRINTK("EXIT\n");
2136}
2137
7a7921e8
TH		 2138static int sata_phy_resume(struct ata_port *ap)
2139{
2140 unsigned long timeout = jiffies + (HZ * 5);
2141 u32 sstatus;
2142
2143 scr_write_flush(ap, SCR_CONTROL, 0x300);
2144
2145 /* Wait for phy to become ready, if necessary. */
2146 do {
2147 msleep(200);
2148 sstatus = scr_read(ap, SCR_STATUS);
2149 if ((sstatus & 0xf) != 1)
2150 return 0;
2151 } while (time_before(jiffies, timeout));
2152
2153 return -1;
2154}
2155
8a19ac89
TH		 2156/**
2157 * ata_std_probeinit - initialize probing
2158 * @ap: port to be probed
2159 *
2160 * @ap is about to be probed. Initialize it. This function is
2161 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2162 *
2163 * NOTE!!! Do not use this function as probeinit if a low level
2164 * driver implements only hardreset. Just pass NULL as probeinit
2165 * in that case. Using this function is probably okay but doing
2166 * so makes reset sequence different from the original
2167 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2168 */
17efc5f7 2169void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2170{
17efc5f7 2171 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
8a19ac89 2172 sata_phy_resume(ap);
3a39746a
TH		 2173 if (sata_dev_present(ap))
2174 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2175 }
8a19ac89
TH		 2176}
2177
c2bd5804
TH		 2178/**
2179 * ata_std_softreset - reset host port via ATA SRST
2180 * @ap: port to reset
2181 * @verbose: fail verbosely
2182 * @classes: resulting classes of attached devices
2183 *
2184 * Reset host port using ATA SRST. This function is to be used
2185 * as standard callback for ata_drive_*_reset() functions.
2186 *
2187 * LOCKING:
2188 * Kernel thread context (may sleep)
2189 *
2190 * RETURNS:
2191 * 0 on success, -errno otherwise.
2192 */
2193int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2194{
2195 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2196 unsigned int devmask = 0, err_mask;
2197 u8 err;
2198
2199 DPRINTK("ENTER\n");
2200
3a39746a
TH		 2201 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2202 classes[0] = ATA_DEV_NONE;
2203 goto out;
2204 }
2205
c2bd5804
TH		 2206 /* determine if device 0/1 are present */
2207 if (ata_devchk(ap, 0))
2208 devmask |= (1 << 0);
2209 if (slave_possible && ata_devchk(ap, 1))
2210 devmask |= (1 << 1);
2211
c2bd5804
TH		 2212 /* select device 0 again */
2213 ap->ops->dev_select(ap, 0);
2214
2215 /* issue bus reset */
2216 DPRINTK("about to softreset, devmask=%x\n", devmask);
2217 err_mask = ata_bus_softreset(ap, devmask);
2218 if (err_mask) {
2219 if (verbose)
2220 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2221 ap->id, err_mask);
2222 else
2223 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2224 err_mask);
2225 return -EIO;
2226 }
2227
2228 /* determine by signature whether we have ATA or ATAPI devices */
2229 classes[0] = ata_dev_try_classify(ap, 0, &err);
2230 if (slave_possible && err != 0x81)
2231 classes[1] = ata_dev_try_classify(ap, 1, &err);
2232
3a39746a 2233 out:
c2bd5804
TH		 2234 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2235 return 0;
2236}
2237
2238/**
2239 * sata_std_hardreset - reset host port via SATA phy reset
2240 * @ap: port to reset
2241 * @verbose: fail verbosely
2242 * @class: resulting class of attached device
2243 *
2244 * SATA phy-reset host port using DET bits of SControl register.
2245 * This function is to be used as standard callback for
2246 * ata_drive_*_reset().
2247 *
2248 * LOCKING:
2249 * Kernel thread context (may sleep)
2250 *
2251 * RETURNS:
2252 * 0 on success, -errno otherwise.
2253 */
2254int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2255{
c2bd5804
TH		 2256 DPRINTK("ENTER\n");
2257
2258 /* Issue phy wake/reset */
2259 scr_write_flush(ap, SCR_CONTROL, 0x301);
2260
2261 /*
2262 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2263 * 10.4.2 says at least 1 ms.
2264 */
2265 msleep(1);
2266
7a7921e8
TH		 2267 /* Bring phy back */
2268 sata_phy_resume(ap);
c2bd5804 2269
c2bd5804
TH		 2270 /* TODO: phy layer with polling, timeouts, etc. */
2271 if (!sata_dev_present(ap)) {
2272 *class = ATA_DEV_NONE;
2273 DPRINTK("EXIT, link offline\n");
2274 return 0;
2275 }
2276
2277 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2278 if (verbose)
2279 printk(KERN_ERR "ata%u: COMRESET failed "
2280 "(device not ready)\n", ap->id);
2281 else
2282 DPRINTK("EXIT, device not ready\n");
2283 return -EIO;
2284 }
2285
3a39746a
TH		 2286 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2287
c2bd5804
TH		 2288 *class = ata_dev_try_classify(ap, 0, NULL);
2289
2290 DPRINTK("EXIT, class=%u\n", *class);
2291 return 0;
2292}
2293
2294/**
2295 * ata_std_postreset - standard postreset callback
2296 * @ap: the target ata_port
2297 * @classes: classes of attached devices
2298 *
2299 * This function is invoked after a successful reset. Note that
2300 * the device might have been reset more than once using
2301 * different reset methods before postreset is invoked.
c2bd5804
TH		 2302 *
2303 * This function is to be used as standard callback for
2304 * ata_drive_*_reset().
2305 *
2306 * LOCKING:
2307 * Kernel thread context (may sleep)
2308 */
2309void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2310{
2311 DPRINTK("ENTER\n");
2312
56497bd5 2313 /* set cable type if it isn't already set */
c2bd5804
TH		 2314 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2315 ap->cbl = ATA_CBL_SATA;
2316
2317 /* print link status */
2318 if (ap->cbl == ATA_CBL_SATA)
2319 sata_print_link_status(ap);
2320
3a39746a
TH		 2321 /* re-enable interrupts */
2322 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2323 ata_irq_on(ap);
c2bd5804
TH		 2324
2325 /* is double-select really necessary? */
2326 if (classes[0] != ATA_DEV_NONE)
2327 ap->ops->dev_select(ap, 1);
2328 if (classes[1] != ATA_DEV_NONE)
2329 ap->ops->dev_select(ap, 0);
2330
3a39746a
TH		 2331 /* bail out if no device is present */
2332 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2333 DPRINTK("EXIT, no device\n");
2334 return;
2335 }
2336
2337 /* set up device control */
2338 if (ap->ioaddr.ctl_addr) {
2339 if (ap->flags & ATA_FLAG_MMIO)
2340 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2341 else
2342 outb(ap->ctl, ap->ioaddr.ctl_addr);
2343 }
c2bd5804
TH		 2344
2345 DPRINTK("EXIT\n");
2346}
2347
2348/**
2349 * ata_std_probe_reset - standard probe reset method
2350 * @ap: prot to perform probe-reset
2351 * @classes: resulting classes of attached devices
2352 *
2353 * The stock off-the-shelf ->probe_reset method.
2354 *
2355 * LOCKING:
2356 * Kernel thread context (may sleep)
2357 *
2358 * RETURNS:
2359 * 0 on success, -errno otherwise.
2360 */
2361int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2362{
2363 ata_reset_fn_t hardreset;
2364
2365 hardreset = NULL;
b911fc3a 2366 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2367 hardreset = sata_std_hardreset;
2368
8a19ac89 2369 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2370 ata_std_softreset, hardreset,
c2bd5804
TH		 2371 ata_std_postreset, classes);
2372}
2373
a62c0fc5
TH		 2374static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2375 ata_postreset_fn_t postreset,
2376 unsigned int *classes)
2377{
2378 int i, rc;
2379
2380 for (i = 0; i < ATA_MAX_DEVICES; i++)
2381 classes[i] = ATA_DEV_UNKNOWN;
2382
2383 rc = reset(ap, 0, classes);
2384 if (rc)
2385 return rc;
2386
2387 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2388 * is complete and convert all ATA_DEV_UNKNOWN to
2389 * ATA_DEV_NONE.
2390 */
2391 for (i = 0; i < ATA_MAX_DEVICES; i++)
2392 if (classes[i] != ATA_DEV_UNKNOWN)
2393 break;
2394
2395 if (i < ATA_MAX_DEVICES)
2396 for (i = 0; i < ATA_MAX_DEVICES; i++)
2397 if (classes[i] == ATA_DEV_UNKNOWN)
2398 classes[i] = ATA_DEV_NONE;
2399
2400 if (postreset)
2401 postreset(ap, classes);
2402
2403 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2404}
2405
2406/**
2407 * ata_drive_probe_reset - Perform probe reset with given methods
2408 * @ap: port to reset
7944ea95 2409 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2410 * @softreset: softreset method (can be NULL)
2411 * @hardreset: hardreset method (can be NULL)
2412 * @postreset: postreset method (can be NULL)
2413 * @classes: resulting classes of attached devices
2414 *
2415 * Reset the specified port and classify attached devices using
2416 * given methods. This function prefers softreset but tries all
2417 * possible reset sequences to reset and classify devices. This
2418 * function is intended to be used for constructing ->probe_reset
2419 * callback by low level drivers.
2420 *
2421 * Reset methods should follow the following rules.
2422 *
2423 * - Return 0 on sucess, -errno on failure.
2424 * - If classification is supported, fill classes[] with
2425 * recognized class codes.
2426 * - If classification is not supported, leave classes[] alone.
2427 * - If verbose is non-zero, print error message on failure;
2428 * otherwise, shut up.
2429 *
2430 * LOCKING:
2431 * Kernel thread context (may sleep)
2432 *
2433 * RETURNS:
2434 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2435 * if classification fails, and any error code from reset
2436 * methods.
2437 */
7944ea95 2438int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2439 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2440 ata_postreset_fn_t postreset, unsigned int *classes)
2441{
2442 int rc = -EINVAL;
2443
7944ea95
TH		 2444 if (probeinit)
2445 probeinit(ap);
2446
a62c0fc5
TH		 2447 if (softreset) {
2448 rc = do_probe_reset(ap, softreset, postreset, classes);
2449 if (rc == 0)
2450 return 0;
2451 }
2452
2453 if (!hardreset)
2454 return rc;
2455
2456 rc = do_probe_reset(ap, hardreset, postreset, classes);
2457 if (rc == 0 || rc != -ENODEV)
2458 return rc;
2459
2460 if (softreset)
2461 rc = do_probe_reset(ap, softreset, postreset, classes);
2462
2463 return rc;
2464}
2465
623a3128
TH		 2466/**
2467 * ata_dev_same_device - Determine whether new ID matches configured device
2468 * @ap: port on which the device to compare against resides
2469 * @dev: device to compare against
2470 * @new_class: class of the new device
2471 * @new_id: IDENTIFY page of the new device
2472 *
2473 * Compare @new_class and @new_id against @dev and determine
2474 * whether @dev is the device indicated by @new_class and
2475 * @new_id.
2476 *
2477 * LOCKING:
2478 * None.
2479 *
2480 * RETURNS:
2481 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2482 */
2483static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2484 unsigned int new_class, const u16 *new_id)
2485{
2486 const u16 *old_id = dev->id;
2487 unsigned char model[2][41], serial[2][21];
2488 u64 new_n_sectors;
2489
2490 if (dev->class != new_class) {
2491 printk(KERN_INFO
2492 "ata%u: dev %u class mismatch %d != %d\n",
2493 ap->id, dev->devno, dev->class, new_class);
2494 return 0;
2495 }
2496
2497 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2498 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2499 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2500 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2501 new_n_sectors = ata_id_n_sectors(new_id);
2502
2503 if (strcmp(model[0], model[1])) {
2504 printk(KERN_INFO
2505 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2506 ap->id, dev->devno, model[0], model[1]);
2507 return 0;
2508 }
2509
2510 if (strcmp(serial[0], serial[1])) {
2511 printk(KERN_INFO
2512 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2513 ap->id, dev->devno, serial[0], serial[1]);
2514 return 0;
2515 }
2516
2517 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2518 printk(KERN_INFO
2519 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2520 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2521 (unsigned long long)new_n_sectors);
2522 return 0;
2523 }
2524
2525 return 1;
2526}
2527
2528/**
2529 * ata_dev_revalidate - Revalidate ATA device
2530 * @ap: port on which the device to revalidate resides
2531 * @dev: device to revalidate
2532 * @post_reset: is this revalidation after reset?
2533 *
2534 * Re-read IDENTIFY page and make sure @dev is still attached to
2535 * the port.
2536 *
2537 * LOCKING:
2538 * Kernel thread context (may sleep)
2539 *
2540 * RETURNS:
2541 * 0 on success, negative errno otherwise
2542 */
2543int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2544 int post_reset)
2545{
2546 unsigned int class;
2547 u16 *id;
2548 int rc;
2549
2550 if (!ata_dev_present(dev))
2551 return -ENODEV;
2552
2553 class = dev->class;
2554 id = NULL;
2555
2556 /* allocate & read ID data */
2557 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2558 if (rc)
2559 goto fail;
2560
2561 /* is the device still there? */
2562 if (!ata_dev_same_device(ap, dev, class, id)) {
2563 rc = -ENODEV;
2564 goto fail;
2565 }
2566
2567 kfree(dev->id);
2568 dev->id = id;
2569
2570 /* configure device according to the new ID */
2571 return ata_dev_configure(ap, dev, 0);
2572
2573 fail:
2574 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2575 ap->id, dev->devno, rc);
2576 kfree(id);
2577 return rc;
2578}
2579
98ac62de 2580static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2581 "WDC AC11000H", NULL,
2582 "WDC AC22100H", NULL,
2583 "WDC AC32500H", NULL,
2584 "WDC AC33100H", NULL,
2585 "WDC AC31600H", NULL,
2586 "WDC AC32100H", "24.09P07",
2587 "WDC AC23200L", "21.10N21",
2588 "Compaq CRD-8241B", NULL,
2589 "CRD-8400B", NULL,
2590 "CRD-8480B", NULL,
2591 "CRD-8482B", NULL,
2592 "CRD-84", NULL,
2593 "SanDisk SDP3B", NULL,
2594 "SanDisk SDP3B-64", NULL,
2595 "SANYO CD-ROM CRD", NULL,
2596 "HITACHI CDR-8", NULL,
2e9edbf8 2597 "HITACHI CDR-8335", NULL,
f4b15fef 2598 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2599 "Toshiba CD-ROM XM-6202B", NULL,
2600 "TOSHIBA CD-ROM XM-1702BC", NULL,
2601 "CD-532E-A", NULL,
2602 "E-IDE CD-ROM CR-840", NULL,
2603 "CD-ROM Drive/F5A", NULL,
2604 "WPI CDD-820", NULL,
f4b15fef 2605 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2606 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2607 "SanDisk SDP3B-64", NULL,
2608 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2609 "_NEC DV5800A", NULL,
2610 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2611};
2e9edbf8 2612
f4b15fef
AC		 2613static int ata_strim(char *s, size_t len)
2614{
2615 len = strnlen(s, len);
2616
2617 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2618 while ((len > 0) && (s[len - 1] == ' ')) {
2619 len--;
2620 s[len] = 0;
2621 }
2622 return len;
2623}
1da177e4 2624
057ace5e 2625static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2626{
f4b15fef
AC		 2627 unsigned char model_num[40];
2628 unsigned char model_rev[16];
2629 unsigned int nlen, rlen;
1da177e4
LT		 2630 int i;
2631
f4b15fef
AC		 2632 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2633 sizeof(model_num));
2634 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2635 sizeof(model_rev));
2636 nlen = ata_strim(model_num, sizeof(model_num));
2637 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2638
f4b15fef
AC		 2639 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2640 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2641 if (ata_dma_blacklist[i+1] == NULL)
2642 return 1;
2643 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2644 return 1;
2645 }
2646 }
1da177e4
LT		 2647 return 0;
2648}
2649
a6d5a51c
TH		 2650/**
2651 * ata_dev_xfermask - Compute supported xfermask of the given device
2652 * @ap: Port on which the device to compute xfermask for resides
2653 * @dev: Device to compute xfermask for
2654 *
acf356b1
TH		 2655 * Compute supported xfermask of @dev and store it in
2656 * dev->*_mask. This function is responsible for applying all
2657 * known limits including host controller limits, device
2658 * blacklist, etc...
a6d5a51c 2659 *
600511e8
TH		 2660 * FIXME: The current implementation limits all transfer modes to
2661 * the fastest of the lowested device on the port. This is not
05c8e0ac 2662 * required on most controllers.
600511e8 2663 *
a6d5a51c
TH		 2664 * LOCKING:
2665 * None.
a6d5a51c 2666 */
acf356b1 2667static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2668{
5444a6f4 2669 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2670 unsigned long xfer_mask;
2671 int i;
1da177e4 2672
a6d5a51c
TH		 2673 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2674 ap->udma_mask);
1da177e4 2675
5444a6f4 2676 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2677 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2678 struct ata_device *d = &ap->device[i];
2679 if (!ata_dev_present(d))
2680 continue;
acf356b1
TH		 2681 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2682 d->udma_mask);
a6d5a51c
TH		 2683 xfer_mask &= ata_id_xfermask(d->id);
2684 if (ata_dma_blacklisted(d))
2685 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
5444a6f4
AC		 2686 /* Apply cable rule here. Don't apply it early because when
2687 we handle hot plug the cable type can itself change */
2688 if (ap->cbl == ATA_CBL_PATA40)
2689 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4
LT		 2690 }
2691
a6d5a51c
TH		 2692 if (ata_dma_blacklisted(dev))
2693 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2694 "disabling DMA\n", ap->id, dev->devno);
2695
5444a6f4
AC		 2696 if (hs->flags & ATA_HOST_SIMPLEX) {
2697 if (hs->simplex_claimed)
2698 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2699 }
2700 if (ap->ops->mode_filter)
2701 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2702
acf356b1
TH		 2703 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2704 &dev->udma_mask);
1da177e4
LT		 2705}
2706
1da177e4
LT		 2707/**
2708 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2709 * @ap: Port associated with device @dev
2710 * @dev: Device to which command will be sent
2711 *
780a87f7
JG		 2712 * Issue SET FEATURES - XFER MODE command to device @dev
2713 * on port @ap.
2714 *
1da177e4 2715 * LOCKING:
0cba632b 2716 * PCI/etc. bus probe sem.
83206a29
TH		 2717 *
2718 * RETURNS:
2719 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2720 */
2721
83206a29
TH		 2722static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2723 struct ata_device *dev)
1da177e4 2724{
a0123703 2725 struct ata_taskfile tf;
83206a29 2726 unsigned int err_mask;
1da177e4
LT		 2727
2728 /* set up set-features taskfile */
2729 DPRINTK("set features - xfer mode\n");
2730
a0123703
TH		 2731 ata_tf_init(ap, &tf, dev->devno);
2732 tf.command = ATA_CMD_SET_FEATURES;
2733 tf.feature = SETFEATURES_XFER;
2734 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2735 tf.protocol = ATA_PROT_NODATA;
2736 tf.nsect = dev->xfer_mode;
1da177e4 2737
83206a29 2738 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
1da177e4 2739
83206a29
TH		 2740 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2741 return err_mask;
1da177e4
LT		 2742}
2743
8bf62ece
AL		 2744/**
2745 * ata_dev_init_params - Issue INIT DEV PARAMS command
2746 * @ap: Port associated with device @dev
2747 * @dev: Device to which command will be sent
2748 *
2749 * LOCKING:
6aff8f1f
TH		 2750 * Kernel thread context (may sleep)
2751 *
2752 * RETURNS:
2753 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2754 */
2755
6aff8f1f 2756static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 2757 struct ata_device *dev,
2758 u16 heads,
2759 u16 sectors)
8bf62ece 2760{
a0123703 2761 struct ata_taskfile tf;
6aff8f1f 2762 unsigned int err_mask;
8bf62ece
AL		 2763
2764 /* Number of sectors per track 1-255. Number of heads 1-16 */
2765 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 2766 return AC_ERR_INVALID;
8bf62ece
AL		 2767
2768 /* set up init dev params taskfile */
2769 DPRINTK("init dev params \n");
2770
a0123703
TH		 2771 ata_tf_init(ap, &tf, dev->devno);
2772 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2773 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2774 tf.protocol = ATA_PROT_NODATA;
2775 tf.nsect = sectors;
2776 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2777
6aff8f1f 2778 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2779
6aff8f1f
TH		 2780 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2781 return err_mask;
8bf62ece
AL		 2782}
2783
1da177e4 2784/**
0cba632b
JG		 2785 * ata_sg_clean - Unmap DMA memory associated with command
2786 * @qc: Command containing DMA memory to be released
2787 *
2788 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2789 *
2790 * LOCKING:
0cba632b 2791 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2792 */
2793
2794static void ata_sg_clean(struct ata_queued_cmd *qc)
2795{
2796 struct ata_port *ap = qc->ap;
cedc9a47 2797 struct scatterlist *sg = qc->__sg;
1da177e4 2798 int dir = qc->dma_dir;
cedc9a47 2799 void *pad_buf = NULL;
1da177e4 2800
a4631474
TH		 2801 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2802 WARN_ON(sg == NULL);
1da177e4
LT		 2803
2804 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2805 WARN_ON(qc->n_elem > 1);
1da177e4 2806
2c13b7ce 2807 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2808
cedc9a47
JG		 2809 /* if we padded the buffer out to 32-bit bound, and data
2810 * xfer direction is from-device, we must copy from the
2811 * pad buffer back into the supplied buffer
2812 */
2813 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2814 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2815
2816 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 2817 if (qc->n_elem)
2f1f610b 2818 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2819 /* restore last sg */
2820 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2821 if (pad_buf) {
2822 struct scatterlist *psg = &qc->pad_sgent;
2823 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2824 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2825 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2826 }
2827 } else {
2e242fa9 2828 if (qc->n_elem)
2f1f610b 2829 dma_unmap_single(ap->dev,
e1410f2d
JG		 2830 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2831 dir);
cedc9a47
JG		 2832 /* restore sg */
2833 sg->length += qc->pad_len;
2834 if (pad_buf)
2835 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2836 pad_buf, qc->pad_len);
2837 }
1da177e4
LT		 2838
2839 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2840 qc->__sg = NULL;
1da177e4
LT		 2841}
2842
2843/**
2844 * ata_fill_sg - Fill PCI IDE PRD table
2845 * @qc: Metadata associated with taskfile to be transferred
2846 *
780a87f7
JG		 2847 * Fill PCI IDE PRD (scatter-gather) table with segments
2848 * associated with the current disk command.
2849 *
1da177e4 2850 * LOCKING:
780a87f7 2851 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2852 *
2853 */
2854static void ata_fill_sg(struct ata_queued_cmd *qc)
2855{
1da177e4 2856 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2857 struct scatterlist *sg;
2858 unsigned int idx;
1da177e4 2859
a4631474 2860 WARN_ON(qc->__sg == NULL);
f131883e 2861 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2862
2863 idx = 0;
cedc9a47 2864 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2865 u32 addr, offset;
2866 u32 sg_len, len;
2867
2868 /* determine if physical DMA addr spans 64K boundary.
2869 * Note h/w doesn't support 64-bit, so we unconditionally
2870 * truncate dma_addr_t to u32.
2871 */
2872 addr = (u32) sg_dma_address(sg);
2873 sg_len = sg_dma_len(sg);
2874
2875 while (sg_len) {
2876 offset = addr & 0xffff;
2877 len = sg_len;
2878 if ((offset + sg_len) > 0x10000)
2879 len = 0x10000 - offset;
2880
2881 ap->prd[idx].addr = cpu_to_le32(addr);
2882 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2883 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2884
2885 idx++;
2886 sg_len -= len;
2887 addr += len;
2888 }
2889 }
2890
2891 if (idx)
2892 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2893}
2894/**
2895 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2896 * @qc: Metadata associated with taskfile to check
2897 *
780a87f7
JG		 2898 * Allow low-level driver to filter ATA PACKET commands, returning
2899 * a status indicating whether or not it is OK to use DMA for the
2900 * supplied PACKET command.
2901 *
1da177e4 2902 * LOCKING:
0cba632b
JG		 2903 * spin_lock_irqsave(host_set lock)
2904 *
1da177e4
LT		 2905 * RETURNS: 0 when ATAPI DMA can be used
2906 * nonzero otherwise
2907 */
2908int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2909{
2910 struct ata_port *ap = qc->ap;
2911 int rc = 0; /* Assume ATAPI DMA is OK by default */
2912
2913 if (ap->ops->check_atapi_dma)
2914 rc = ap->ops->check_atapi_dma(qc);
2915
2916 return rc;
2917}
2918/**
2919 * ata_qc_prep - Prepare taskfile for submission
2920 * @qc: Metadata associated with taskfile to be prepared
2921 *
780a87f7
JG		 2922 * Prepare ATA taskfile for submission.
2923 *
1da177e4
LT		 2924 * LOCKING:
2925 * spin_lock_irqsave(host_set lock)
2926 */
2927void ata_qc_prep(struct ata_queued_cmd *qc)
2928{
2929 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2930 return;
2931
2932 ata_fill_sg(qc);
2933}
2934
e46834cd
BK		 2935void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
2936
0cba632b
JG		 2937/**
2938 * ata_sg_init_one - Associate command with memory buffer
2939 * @qc: Command to be associated
2940 * @buf: Memory buffer
2941 * @buflen: Length of memory buffer, in bytes.
2942 *
2943 * Initialize the data-related elements of queued_cmd @qc
2944 * to point to a single memory buffer, @buf of byte length @buflen.
2945 *
2946 * LOCKING:
2947 * spin_lock_irqsave(host_set lock)
2948 */
2949
1da177e4
LT		 2950void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2951{
2952 struct scatterlist *sg;
2953
2954 qc->flags |= ATA_QCFLAG_SINGLE;
2955
2956 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2957 qc->__sg = &qc->sgent;
1da177e4 2958 qc->n_elem = 1;
cedc9a47 2959 qc->orig_n_elem = 1;
1da177e4
LT		 2960 qc->buf_virt = buf;
2961
cedc9a47 2962 sg = qc->__sg;
f0612bbc 2963 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2964}
2965
0cba632b
JG		 2966/**
2967 * ata_sg_init - Associate command with scatter-gather table.
2968 * @qc: Command to be associated
2969 * @sg: Scatter-gather table.
2970 * @n_elem: Number of elements in s/g table.
2971 *
2972 * Initialize the data-related elements of queued_cmd @qc
2973 * to point to a scatter-gather table @sg, containing @n_elem
2974 * elements.
2975 *
2976 * LOCKING:
2977 * spin_lock_irqsave(host_set lock)
2978 */
2979
1da177e4
LT		 2980void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2981 unsigned int n_elem)
2982{
2983 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2984 qc->__sg = sg;
1da177e4 2985 qc->n_elem = n_elem;
cedc9a47 2986 qc->orig_n_elem = n_elem;
1da177e4
LT		 2987}
2988
2989/**
0cba632b
JG		 2990 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2991 * @qc: Command with memory buffer to be mapped.
2992 *
2993 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2994 *
2995 * LOCKING:
2996 * spin_lock_irqsave(host_set lock)
2997 *
2998 * RETURNS:
0cba632b 2999 * Zero on success, negative on error.
1da177e4
LT		 3000 */
3001
3002static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3003{
3004 struct ata_port *ap = qc->ap;
3005 int dir = qc->dma_dir;
cedc9a47 3006 struct scatterlist *sg = qc->__sg;
1da177e4 3007 dma_addr_t dma_address;
2e242fa9 3008 int trim_sg = 0;
1da177e4 3009
cedc9a47
JG		 3010 /* we must lengthen transfers to end on a 32-bit boundary */
3011 qc->pad_len = sg->length & 3;
3012 if (qc->pad_len) {
3013 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3014 struct scatterlist *psg = &qc->pad_sgent;
3015
a4631474 3016 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3017
3018 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3019
3020 if (qc->tf.flags & ATA_TFLAG_WRITE)
3021 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3022 qc->pad_len);
3023
3024 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3025 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3026 /* trim sg */
3027 sg->length -= qc->pad_len;
2e242fa9
TH		 3028 if (sg->length == 0)
3029 trim_sg = 1;
cedc9a47
JG		 3030
3031 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3032 sg->length, qc->pad_len);
3033 }
3034
2e242fa9
TH		 3035 if (trim_sg) {
3036 qc->n_elem--;
e1410f2d
JG		 3037 goto skip_map;
3038 }
3039
2f1f610b 3040 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3041 sg->length, dir);
537a95d9
TH		 3042 if (dma_mapping_error(dma_address)) {
3043 /* restore sg */
3044 sg->length += qc->pad_len;
1da177e4 3045 return -1;
537a95d9 3046 }
1da177e4
LT		 3047
3048 sg_dma_address(sg) = dma_address;
32529e01 3049 sg_dma_len(sg) = sg->length;
1da177e4 3050
2e242fa9 3051skip_map:
1da177e4
LT		 3052 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3053 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3054
3055 return 0;
3056}
3057
3058/**
0cba632b
JG		 3059 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3060 * @qc: Command with scatter-gather table to be mapped.
3061 *
3062 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3063 *
3064 * LOCKING:
3065 * spin_lock_irqsave(host_set lock)
3066 *
3067 * RETURNS:
0cba632b 3068 * Zero on success, negative on error.
1da177e4
LT		 3069 *
3070 */
3071
3072static int ata_sg_setup(struct ata_queued_cmd *qc)
3073{
3074 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3075 struct scatterlist *sg = qc->__sg;
3076 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3077 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3078
3079 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3080 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3081
cedc9a47
JG		 3082 /* we must lengthen transfers to end on a 32-bit boundary */
3083 qc->pad_len = lsg->length & 3;
3084 if (qc->pad_len) {
3085 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3086 struct scatterlist *psg = &qc->pad_sgent;
3087 unsigned int offset;
3088
a4631474 3089 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3090
3091 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3092
3093 /*
3094 * psg->page/offset are used to copy to-be-written
3095 * data in this function or read data in ata_sg_clean.
3096 */
3097 offset = lsg->offset + lsg->length - qc->pad_len;
3098 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3099 psg->offset = offset_in_page(offset);
3100
3101 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3102 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3103 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3104 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3105 }
3106
3107 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3108 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3109 /* trim last sg */
3110 lsg->length -= qc->pad_len;
e1410f2d
JG		 3111 if (lsg->length == 0)
3112 trim_sg = 1;
cedc9a47
JG		 3113
3114 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3115 qc->n_elem - 1, lsg->length, qc->pad_len);
3116 }
3117
e1410f2d
JG		 3118 pre_n_elem = qc->n_elem;
3119 if (trim_sg && pre_n_elem)
3120 pre_n_elem--;
3121
3122 if (!pre_n_elem) {
3123 n_elem = 0;
3124 goto skip_map;
3125 }
3126
1da177e4 3127 dir = qc->dma_dir;
2f1f610b 3128 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3129 if (n_elem < 1) {
3130 /* restore last sg */
3131 lsg->length += qc->pad_len;
1da177e4 3132 return -1;
537a95d9 3133 }
1da177e4
LT		 3134
3135 DPRINTK("%d sg elements mapped\n", n_elem);
3136
e1410f2d 3137skip_map:
1da177e4
LT		 3138 qc->n_elem = n_elem;
3139
3140 return 0;
3141}
3142
40e8c82c
TH		 3143/**
3144 * ata_poll_qc_complete - turn irq back on and finish qc
3145 * @qc: Command to complete
8e8b77dd 3146 * @err_mask: ATA status register content
40e8c82c
TH		 3147 *
3148 * LOCKING:
3149 * None. (grabs host lock)
3150 */
3151
a22e2eb0 3152void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3153{
3154 struct ata_port *ap = qc->ap;
b8f6153e 3155 unsigned long flags;
40e8c82c 3156
b8f6153e 3157 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3158 ap->flags &= ~ATA_FLAG_NOINTR;
3159 ata_irq_on(ap);
a22e2eb0 3160 ata_qc_complete(qc);
b8f6153e 3161 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3162}
3163
1da177e4 3164/**
c893a3ae 3165 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3166 * @ap: the target ata_port
1da177e4
LT		 3167 *
3168 * LOCKING:
0cba632b 3169 * None. (executing in kernel thread context)
1da177e4
LT		 3170 *
3171 * RETURNS:
6f0ef4fa 3172 * timeout value to use
1da177e4
LT		 3173 */
3174
3175static unsigned long ata_pio_poll(struct ata_port *ap)
3176{
c14b8331 3177 struct ata_queued_cmd *qc;
1da177e4 3178 u8 status;
14be71f4
AL		 3179 unsigned int poll_state = HSM_ST_UNKNOWN;
3180 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3181
c14b8331 3182 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3183 WARN_ON(qc == NULL);
c14b8331 3184
14be71f4
AL		 3185 switch (ap->hsm_task_state) {
3186 case HSM_ST:
3187 case HSM_ST_POLL:
3188 poll_state = HSM_ST_POLL;
3189 reg_state = HSM_ST;
1da177e4 3190 break;
14be71f4
AL		 3191 case HSM_ST_LAST:
3192 case HSM_ST_LAST_POLL:
3193 poll_state = HSM_ST_LAST_POLL;
3194 reg_state = HSM_ST_LAST;
1da177e4
LT		 3195 break;
3196 default:
3197 BUG();
3198 break;
3199 }
3200
3201 status = ata_chk_status(ap);
3202 if (status & ATA_BUSY) {
3203 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3204 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3205 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3206 return 0;
3207 }
14be71f4 3208 ap->hsm_task_state = poll_state;
1da177e4
LT		 3209 return ATA_SHORT_PAUSE;
3210 }
3211
14be71f4 3212 ap->hsm_task_state = reg_state;
1da177e4
LT		 3213 return 0;
3214}
3215
3216/**
6f0ef4fa
RD		 3217 * ata_pio_complete - check if drive is busy or idle
3218 * @ap: the target ata_port
1da177e4
LT		 3219 *
3220 * LOCKING:
0cba632b 3221 * None. (executing in kernel thread context)
7fb6ec28
JG		 3222 *
3223 * RETURNS:
3224 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3225 */
3226
7fb6ec28 3227static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3228{
3229 struct ata_queued_cmd *qc;
3230 u8 drv_stat;
3231
3232 /*
31433ea3
AC		 3233 * This is purely heuristic. This is a fast path. Sometimes when
3234 * we enter, BSY will be cleared in a chk-status or two. If not,
3235 * the drive is probably seeking or something. Snooze for a couple
3236 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3237 * HSM_ST_POLL state.
1da177e4 3238 */
fe79e683
AL		 3239 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3240 if (drv_stat & ATA_BUSY) {
1da177e4 3241 msleep(2);
fe79e683
AL		 3242 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3243 if (drv_stat & ATA_BUSY) {
14be71f4 3244 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3245 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3246 return 0;
1da177e4
LT		 3247 }
3248 }
3249
c14b8331 3250 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3251 WARN_ON(qc == NULL);
c14b8331 3252
1da177e4
LT		 3253 drv_stat = ata_wait_idle(ap);
3254 if (!ata_ok(drv_stat)) {
1c848984 3255 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3256 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3257 return 0;
1da177e4
LT		 3258 }
3259
14be71f4 3260 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3261
a4631474 3262 WARN_ON(qc->err_mask);
a22e2eb0 3263 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3264
3265 /* another command may start at this point */
3266
3267 return 1;
1da177e4
LT		 3268}
3269
0baab86b
EF		 3270
3271/**
c893a3ae 3272 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3273 * @buf: Buffer to swap
3274 * @buf_words: Number of 16-bit words in buffer.
3275 *
3276 * Swap halves of 16-bit words if needed to convert from
3277 * little-endian byte order to native cpu byte order, or
3278 * vice-versa.
3279 *
3280 * LOCKING:
6f0ef4fa 3281 * Inherited from caller.
0baab86b 3282 */
1da177e4
LT		 3283void swap_buf_le16(u16 *buf, unsigned int buf_words)
3284{
3285#ifdef __BIG_ENDIAN
3286 unsigned int i;
3287
3288 for (i = 0; i < buf_words; i++)
3289 buf[i] = le16_to_cpu(buf[i]);
3290#endif /* __BIG_ENDIAN */
3291}
3292
6ae4cfb5
AL		 3293/**
3294 * ata_mmio_data_xfer - Transfer data by MMIO
3295 * @ap: port to read/write
3296 * @buf: data buffer
3297 * @buflen: buffer length
344babaa 3298 * @write_data: read/write
6ae4cfb5
AL		 3299 *
3300 * Transfer data from/to the device data register by MMIO.
3301 *
3302 * LOCKING:
3303 * Inherited from caller.
6ae4cfb5
AL		 3304 */
3305
1da177e4
LT		 3306static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3307 unsigned int buflen, int write_data)
3308{
3309 unsigned int i;
3310 unsigned int words = buflen >> 1;
3311 u16 *buf16 = (u16 *) buf;
3312 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3313
6ae4cfb5 3314 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3315 if (write_data) {
3316 for (i = 0; i < words; i++)
3317 writew(le16_to_cpu(buf16[i]), mmio);
3318 } else {
3319 for (i = 0; i < words; i++)
3320 buf16[i] = cpu_to_le16(readw(mmio));
3321 }
6ae4cfb5
AL		 3322
3323 /* Transfer trailing 1 byte, if any. */
3324 if (unlikely(buflen & 0x01)) {
3325 u16 align_buf[1] = { 0 };
3326 unsigned char *trailing_buf = buf + buflen - 1;
3327
3328 if (write_data) {
3329 memcpy(align_buf, trailing_buf, 1);
3330 writew(le16_to_cpu(align_buf[0]), mmio);
3331 } else {
3332 align_buf[0] = cpu_to_le16(readw(mmio));
3333 memcpy(trailing_buf, align_buf, 1);
3334 }
3335 }
1da177e4
LT		 3336}
3337
6ae4cfb5
AL		 3338/**
3339 * ata_pio_data_xfer - Transfer data by PIO
3340 * @ap: port to read/write
3341 * @buf: data buffer
3342 * @buflen: buffer length
344babaa 3343 * @write_data: read/write
6ae4cfb5
AL		 3344 *
3345 * Transfer data from/to the device data register by PIO.
3346 *
3347 * LOCKING:
3348 * Inherited from caller.
6ae4cfb5
AL		 3349 */
3350
1da177e4
LT		 3351static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3352 unsigned int buflen, int write_data)
3353{
6ae4cfb5 3354 unsigned int words = buflen >> 1;
1da177e4 3355
6ae4cfb5 3356 /* Transfer multiple of 2 bytes */
1da177e4 3357 if (write_data)
6ae4cfb5 3358 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3359 else
6ae4cfb5
AL		 3360 insw(ap->ioaddr.data_addr, buf, words);
3361
3362 /* Transfer trailing 1 byte, if any. */
3363 if (unlikely(buflen & 0x01)) {
3364 u16 align_buf[1] = { 0 };
3365 unsigned char *trailing_buf = buf + buflen - 1;
3366
3367 if (write_data) {
3368 memcpy(align_buf, trailing_buf, 1);
3369 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3370 } else {
3371 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3372 memcpy(trailing_buf, align_buf, 1);
3373 }
3374 }
1da177e4
LT		 3375}
3376
6ae4cfb5
AL		 3377/**
3378 * ata_data_xfer - Transfer data from/to the data register.
3379 * @ap: port to read/write
3380 * @buf: data buffer
3381 * @buflen: buffer length
3382 * @do_write: read/write
3383 *
3384 * Transfer data from/to the device data register.
3385 *
3386 * LOCKING:
3387 * Inherited from caller.
6ae4cfb5
AL		 3388 */
3389
1da177e4
LT		 3390static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3391 unsigned int buflen, int do_write)
3392{
a1bd9e68
AC		 3393 /* Make the crap hardware pay the costs not the good stuff */
3394 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3395 unsigned long flags;
3396 local_irq_save(flags);
3397 if (ap->flags & ATA_FLAG_MMIO)
3398 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3399 else
3400 ata_pio_data_xfer(ap, buf, buflen, do_write);
3401 local_irq_restore(flags);
3402 } else {
3403 if (ap->flags & ATA_FLAG_MMIO)
3404 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3405 else
3406 ata_pio_data_xfer(ap, buf, buflen, do_write);
3407 }
1da177e4
LT		 3408}
3409
6ae4cfb5
AL		 3410/**
3411 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3412 * @qc: Command on going
3413 *
3414 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3415 *
3416 * LOCKING:
3417 * Inherited from caller.
3418 */
3419
1da177e4
LT		 3420static void ata_pio_sector(struct ata_queued_cmd *qc)
3421{
3422 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3423 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3424 struct ata_port *ap = qc->ap;
3425 struct page *page;
3426 unsigned int offset;
3427 unsigned char *buf;
3428
3429 if (qc->cursect == (qc->nsect - 1))
14be71f4 3430 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3431
3432 page = sg[qc->cursg].page;
3433 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3434
3435 /* get the current page and offset */
3436 page = nth_page(page, (offset >> PAGE_SHIFT));
3437 offset %= PAGE_SIZE;
3438
3439 buf = kmap(page) + offset;
3440
3441 qc->cursect++;
3442 qc->cursg_ofs++;
3443
32529e01 3444 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3445 qc->cursg++;
3446 qc->cursg_ofs = 0;
3447 }
3448
3449 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3450
3451 /* do the actual data transfer */
3452 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3453 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3454
3455 kunmap(page);
3456}
3457
6ae4cfb5
AL		 3458/**
3459 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3460 * @qc: Command on going
3461 * @bytes: number of bytes
3462 *
3463 * Transfer Transfer data from/to the ATAPI device.
3464 *
3465 * LOCKING:
3466 * Inherited from caller.
3467 *
3468 */
3469
1da177e4
LT		 3470static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3471{
3472 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3473 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3474 struct ata_port *ap = qc->ap;
3475 struct page *page;
3476 unsigned char *buf;
3477 unsigned int offset, count;
3478
563a6e1f 3479 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3480 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3481
3482next_sg:
563a6e1f 3483 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3484 /*
563a6e1f
AL		 3485 * The end of qc->sg is reached and the device expects
3486 * more data to transfer. In order not to overrun qc->sg
3487 * and fulfill length specified in the byte count register,
3488 * - for read case, discard trailing data from the device
3489 * - for write case, padding zero data to the device
3490 */
3491 u16 pad_buf[1] = { 0 };
3492 unsigned int words = bytes >> 1;
3493 unsigned int i;
3494
3495 if (words) /* warning if bytes > 1 */
7fb6ec28 3496 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3497 ap->id, bytes);
3498
3499 for (i = 0; i < words; i++)
3500 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3501
14be71f4 3502 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3503 return;
3504 }
3505
cedc9a47 3506 sg = &qc->__sg[qc->cursg];
1da177e4 3507
1da177e4
LT		 3508 page = sg->page;
3509 offset = sg->offset + qc->cursg_ofs;
3510
3511 /* get the current page and offset */
3512 page = nth_page(page, (offset >> PAGE_SHIFT));
3513 offset %= PAGE_SIZE;
3514
6952df03 3515 /* don't overrun current sg */
32529e01 3516 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3517
3518 /* don't cross page boundaries */
3519 count = min(count, (unsigned int)PAGE_SIZE - offset);
3520
3521 buf = kmap(page) + offset;
3522
3523 bytes -= count;
3524 qc->curbytes += count;
3525 qc->cursg_ofs += count;
3526
32529e01 3527 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3528 qc->cursg++;
3529 qc->cursg_ofs = 0;
3530 }
3531
3532 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3533
3534 /* do the actual data transfer */
3535 ata_data_xfer(ap, buf, count, do_write);
3536
3537 kunmap(page);
3538
563a6e1f 3539 if (bytes)
1da177e4 3540 goto next_sg;
1da177e4
LT		 3541}
3542
6ae4cfb5
AL		 3543/**
3544 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3545 * @qc: Command on going
3546 *
3547 * Transfer Transfer data from/to the ATAPI device.
3548 *
3549 * LOCKING:
3550 * Inherited from caller.
6ae4cfb5
AL		 3551 */
3552
1da177e4
LT		 3553static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3554{
3555 struct ata_port *ap = qc->ap;
3556 struct ata_device *dev = qc->dev;
3557 unsigned int ireason, bc_lo, bc_hi, bytes;
3558 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3559
3560 ap->ops->tf_read(ap, &qc->tf);
3561 ireason = qc->tf.nsect;
3562 bc_lo = qc->tf.lbam;
3563 bc_hi = qc->tf.lbah;
3564 bytes = (bc_hi << 8) | bc_lo;
3565
3566 /* shall be cleared to zero, indicating xfer of data */
3567 if (ireason & (1 << 0))
3568 goto err_out;
3569
3570 /* make sure transfer direction matches expected */
3571 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3572 if (do_write != i_write)
3573 goto err_out;
3574
3575 __atapi_pio_bytes(qc, bytes);
3576
3577 return;
3578
3579err_out:
3580 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3581 ap->id, dev->devno);
11a56d24 3582 qc->err_mask |= AC_ERR_HSM;
14be71f4 3583 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3584}
3585
3586/**
6f0ef4fa
RD		 3587 * ata_pio_block - start PIO on a block
3588 * @ap: the target ata_port
1da177e4
LT		 3589 *
3590 * LOCKING:
0cba632b 3591 * None. (executing in kernel thread context)
1da177e4
LT		 3592 */
3593
3594static void ata_pio_block(struct ata_port *ap)
3595{
3596 struct ata_queued_cmd *qc;
3597 u8 status;
3598
3599 /*
6f0ef4fa 3600 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3601 * Sometimes when we enter, BSY will be cleared in
3602 * a chk-status or two. If not, the drive is probably seeking
3603 * or something. Snooze for a couple msecs, then
3604 * chk-status again. If still busy, fall back to
14be71f4 3605 * HSM_ST_POLL state.
1da177e4
LT		 3606 */
3607 status = ata_busy_wait(ap, ATA_BUSY, 5);
3608 if (status & ATA_BUSY) {
3609 msleep(2);
3610 status = ata_busy_wait(ap, ATA_BUSY, 10);
3611 if (status & ATA_BUSY) {
14be71f4 3612 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3613 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3614 return;
3615 }
3616 }
3617
3618 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3619 WARN_ON(qc == NULL);
1da177e4 3620
fe79e683
AL		 3621 /* check error */
3622 if (status & (ATA_ERR | ATA_DF)) {
3623 qc->err_mask |= AC_ERR_DEV;
3624 ap->hsm_task_state = HSM_ST_ERR;
3625 return;
3626 }
3627
3628 /* transfer data if any */
1da177e4 3629 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3630 /* DRQ=0 means no more data to transfer */
1da177e4 3631 if ((status & ATA_DRQ) == 0) {
14be71f4 3632 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3633 return;
3634 }
3635
3636 atapi_pio_bytes(qc);
3637 } else {
3638 /* handle BSY=0, DRQ=0 as error */
3639 if ((status & ATA_DRQ) == 0) {
11a56d24 3640 qc->err_mask |= AC_ERR_HSM;
14be71f4 3641 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3642 return;
3643 }
3644
3645 ata_pio_sector(qc);
3646 }
3647}
3648
3649static void ata_pio_error(struct ata_port *ap)
3650{
3651 struct ata_queued_cmd *qc;
a7dac447 3652
1da177e4 3653 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3654 WARN_ON(qc == NULL);
1da177e4 3655
0565c26d
AL		 3656 if (qc->tf.command != ATA_CMD_PACKET)
3657 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3658
2e9edbf8 3659 /* make sure qc->err_mask is available to
1c848984
AL		 3660 * know what's wrong and recover
3661 */
a4631474 3662 WARN_ON(qc->err_mask == 0);
1c848984 3663
14be71f4 3664 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3665
a22e2eb0 3666 ata_poll_qc_complete(qc);
1da177e4
LT		 3667}
3668
3669static void ata_pio_task(void *_data)
3670{
3671 struct ata_port *ap = _data;
7fb6ec28
JG		 3672 unsigned long timeout;
3673 int qc_completed;
3674
3675fsm_start:
3676 timeout = 0;
3677 qc_completed = 0;
1da177e4 3678
14be71f4
AL		 3679 switch (ap->hsm_task_state) {
3680 case HSM_ST_IDLE:
1da177e4
LT		 3681 return;
3682
14be71f4 3683 case HSM_ST:
1da177e4
LT		 3684 ata_pio_block(ap);
3685 break;
3686
14be71f4 3687 case HSM_ST_LAST:
7fb6ec28 3688 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3689 break;
3690
14be71f4
AL		 3691 case HSM_ST_POLL:
3692 case HSM_ST_LAST_POLL:
1da177e4
LT		 3693 timeout = ata_pio_poll(ap);
3694 break;
3695
14be71f4
AL		 3696 case HSM_ST_TMOUT:
3697 case HSM_ST_ERR:
1da177e4
LT		 3698 ata_pio_error(ap);
3699 return;
3700 }
3701
3702 if (timeout)
8061f5f0 3703 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3704 else if (!qc_completed)
3705 goto fsm_start;
1da177e4
LT		 3706}
3707
8061f5f0
TH		 3708/**
3709 * atapi_packet_task - Write CDB bytes to hardware
3710 * @_data: Port to which ATAPI device is attached.
3711 *
3712 * When device has indicated its readiness to accept
3713 * a CDB, this function is called. Send the CDB.
3714 * If DMA is to be performed, exit immediately.
3715 * Otherwise, we are in polling mode, so poll
3716 * status under operation succeeds or fails.
3717 *
3718 * LOCKING:
3719 * Kernel thread context (may sleep)
3720 */
3721
3722static void atapi_packet_task(void *_data)
3723{
3724 struct ata_port *ap = _data;
3725 struct ata_queued_cmd *qc;
3726 u8 status;
3727
3728 qc = ata_qc_from_tag(ap, ap->active_tag);
3729 WARN_ON(qc == NULL);
3730 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3731
3732 /* sleep-wait for BSY to clear */
3733 DPRINTK("busy wait\n");
3734 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3735 qc->err_mask |= AC_ERR_TIMEOUT;
3736 goto err_out;
3737 }
3738
3739 /* make sure DRQ is set */
3740 status = ata_chk_status(ap);
3741 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3742 qc->err_mask |= AC_ERR_HSM;
3743 goto err_out;
3744 }
3745
3746 /* send SCSI cdb */
3747 DPRINTK("send cdb\n");
3748 WARN_ON(qc->dev->cdb_len < 12);
3749
3750 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3751 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3752 unsigned long flags;
3753
3754 /* Once we're done issuing command and kicking bmdma,
3755 * irq handler takes over. To not lose irq, we need
3756 * to clear NOINTR flag before sending cdb, but
3757 * interrupt handler shouldn't be invoked before we're
3758 * finished. Hence, the following locking.
3759 */
3760 spin_lock_irqsave(&ap->host_set->lock, flags);
3761 ap->flags &= ~ATA_FLAG_NOINTR;
3762 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3763 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3764 ap->ops->bmdma_start(qc); /* initiate bmdma */
3765 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3766 } else {
3767 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3768
3769 /* PIO commands are handled by polling */
3770 ap->hsm_task_state = HSM_ST;
3771 ata_port_queue_task(ap, ata_pio_task, ap, 0);
3772 }
3773
3774 return;
3775
3776err_out:
3777 ata_poll_qc_complete(qc);
3778}
3779
1da177e4
LT		 3780/**
3781 * ata_qc_timeout - Handle timeout of queued command
3782 * @qc: Command that timed out
3783 *
3784 * Some part of the kernel (currently, only the SCSI layer)
3785 * has noticed that the active command on port @ap has not
3786 * completed after a specified length of time. Handle this
3787 * condition by disabling DMA (if necessary) and completing
3788 * transactions, with error if necessary.
3789 *
3790 * This also handles the case of the "lost interrupt", where
3791 * for some reason (possibly hardware bug, possibly driver bug)
3792 * an interrupt was not delivered to the driver, even though the
3793 * transaction completed successfully.
3794 *
3795 * LOCKING:
0cba632b 3796 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3797 */
3798
3799static void ata_qc_timeout(struct ata_queued_cmd *qc)
3800{
3801 struct ata_port *ap = qc->ap;
b8f6153e 3802 struct ata_host_set *host_set = ap->host_set;
1da177e4 3803 u8 host_stat = 0, drv_stat;
b8f6153e 3804 unsigned long flags;
1da177e4
LT		 3805
3806 DPRINTK("ENTER\n");
3807
c18d06f8
TH		 3808 ap->hsm_task_state = HSM_ST_IDLE;
3809
b8f6153e
JG		 3810 spin_lock_irqsave(&host_set->lock, flags);
3811
1da177e4
LT		 3812 switch (qc->tf.protocol) {
3813
3814 case ATA_PROT_DMA:
3815 case ATA_PROT_ATAPI_DMA:
3816 host_stat = ap->ops->bmdma_status(ap);
3817
3818 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3819 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3820
3821 /* fall through */
3822
3823 default:
3824 ata_altstatus(ap);
3825 drv_stat = ata_chk_status(ap);
3826
3827 /* ack bmdma irq events */
3828 ap->ops->irq_clear(ap);
3829
3830 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3831 ap->id, qc->tf.command, drv_stat, host_stat);
3832
3833 /* complete taskfile transaction */
a22e2eb0 3834 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3835 break;
3836 }
b8f6153e
JG		 3837
3838 spin_unlock_irqrestore(&host_set->lock, flags);
3839
a72ec4ce
TH		 3840 ata_eh_qc_complete(qc);
3841
1da177e4
LT		 3842 DPRINTK("EXIT\n");
3843}
3844
3845/**
3846 * ata_eng_timeout - Handle timeout of queued command
3847 * @ap: Port on which timed-out command is active
3848 *
3849 * Some part of the kernel (currently, only the SCSI layer)
3850 * has noticed that the active command on port @ap has not
3851 * completed after a specified length of time. Handle this
3852 * condition by disabling DMA (if necessary) and completing
3853 * transactions, with error if necessary.
3854 *
3855 * This also handles the case of the "lost interrupt", where
3856 * for some reason (possibly hardware bug, possibly driver bug)
3857 * an interrupt was not delivered to the driver, even though the
3858 * transaction completed successfully.
3859 *
3860 * LOCKING:
3861 * Inherited from SCSI layer (none, can sleep)
3862 */
3863
3864void ata_eng_timeout(struct ata_port *ap)
3865{
1da177e4
LT		 3866 DPRINTK("ENTER\n");
3867
f6379020 3868 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3869
1da177e4
LT		 3870 DPRINTK("EXIT\n");
3871}
3872
3873/**
3874 * ata_qc_new - Request an available ATA command, for queueing
3875 * @ap: Port associated with device @dev
3876 * @dev: Device from whom we request an available command structure
3877 *
3878 * LOCKING:
0cba632b 3879 * None.
1da177e4
LT		 3880 */
3881
3882static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3883{
3884 struct ata_queued_cmd *qc = NULL;
3885 unsigned int i;
3886
3887 for (i = 0; i < ATA_MAX_QUEUE; i++)
3888 if (!test_and_set_bit(i, &ap->qactive)) {
3889 qc = ata_qc_from_tag(ap, i);
3890 break;
3891 }
3892
3893 if (qc)
3894 qc->tag = i;
3895
3896 return qc;
3897}
3898
3899/**
3900 * ata_qc_new_init - Request an available ATA command, and initialize it
3901 * @ap: Port associated with device @dev
3902 * @dev: Device from whom we request an available command structure
3903 *
3904 * LOCKING:
0cba632b 3905 * None.
1da177e4
LT		 3906 */
3907
3908struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3909 struct ata_device *dev)
3910{
3911 struct ata_queued_cmd *qc;
3912
3913 qc = ata_qc_new(ap);
3914 if (qc) {
1da177e4
LT		 3915 qc->scsicmd = NULL;
3916 qc->ap = ap;
3917 qc->dev = dev;
1da177e4 3918
2c13b7ce 3919 ata_qc_reinit(qc);
1da177e4
LT		 3920 }
3921
3922 return qc;
3923}
3924
1da177e4
LT		 3925/**
3926 * ata_qc_free - free unused ata_queued_cmd
3927 * @qc: Command to complete
3928 *
3929 * Designed to free unused ata_queued_cmd object
3930 * in case something prevents using it.
3931 *
3932 * LOCKING:
0cba632b 3933 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3934 */
3935void ata_qc_free(struct ata_queued_cmd *qc)
3936{
4ba946e9
TH		 3937 struct ata_port *ap = qc->ap;
3938 unsigned int tag;
3939
a4631474 3940 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3941
4ba946e9
TH		 3942 qc->flags = 0;
3943 tag = qc->tag;
3944 if (likely(ata_tag_valid(tag))) {
3945 if (tag == ap->active_tag)
3946 ap->active_tag = ATA_TAG_POISON;
3947 qc->tag = ATA_TAG_POISON;
3948 clear_bit(tag, &ap->qactive);
3949 }
1da177e4
LT		 3950}
3951
76014427 3952void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3953{
a4631474
TH		 3954 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3955 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3956
3957 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3958 ata_sg_clean(qc);
3959
3f3791d3
AL		 3960 /* atapi: mark qc as inactive to prevent the interrupt handler
3961 * from completing the command twice later, before the error handler
3962 * is called. (when rc != 0 and atapi request sense is needed)
3963 */
3964 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3965
1da177e4 3966 /* call completion callback */
77853bf2 3967 qc->complete_fn(qc);
1da177e4
LT		 3968}
3969
3970static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3971{
3972 struct ata_port *ap = qc->ap;
3973
3974 switch (qc->tf.protocol) {
3975 case ATA_PROT_DMA:
3976 case ATA_PROT_ATAPI_DMA:
3977 return 1;
3978
3979 case ATA_PROT_ATAPI:
3980 case ATA_PROT_PIO:
1da177e4
LT		 3981 if (ap->flags & ATA_FLAG_PIO_DMA)
3982 return 1;
3983
3984 /* fall through */
3985
3986 default:
3987 return 0;
3988 }
3989
3990 /* never reached */
3991}
3992
3993/**
3994 * ata_qc_issue - issue taskfile to device
3995 * @qc: command to issue to device
3996 *
3997 * Prepare an ATA command to submission to device.
3998 * This includes mapping the data into a DMA-able
3999 * area, filling in the S/G table, and finally
4000 * writing the taskfile to hardware, starting the command.
4001 *
4002 * LOCKING:
4003 * spin_lock_irqsave(host_set lock)
1da177e4 4004 */
8e0e694a 4005void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4006{
4007 struct ata_port *ap = qc->ap;
4008
e4a70e76
TH		 4009 qc->ap->active_tag = qc->tag;
4010 qc->flags |= ATA_QCFLAG_ACTIVE;
4011
1da177e4
LT		 4012 if (ata_should_dma_map(qc)) {
4013 if (qc->flags & ATA_QCFLAG_SG) {
4014 if (ata_sg_setup(qc))
8e436af9 4015 goto sg_err;
1da177e4
LT		 4016 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4017 if (ata_sg_setup_one(qc))
8e436af9 4018 goto sg_err;
1da177e4
LT		 4019 }
4020 } else {
4021 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4022 }
4023
4024 ap->ops->qc_prep(qc);
4025
8e0e694a
TH		 4026 qc->err_mask |= ap->ops->qc_issue(qc);
4027 if (unlikely(qc->err_mask))
4028 goto err;
4029 return;
1da177e4 4030
8e436af9
TH		 4031sg_err:
4032 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4033 qc->err_mask |= AC_ERR_SYSTEM;
4034err:
4035 ata_qc_complete(qc);
1da177e4
LT		 4036}
4037
4038/**
4039 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4040 * @qc: command to issue to device
4041 *
4042 * Using various libata functions and hooks, this function
4043 * starts an ATA command. ATA commands are grouped into
4044 * classes called "protocols", and issuing each type of protocol
4045 * is slightly different.
4046 *
0baab86b
EF		 4047 * May be used as the qc_issue() entry in ata_port_operations.
4048 *
1da177e4
LT		 4049 * LOCKING:
4050 * spin_lock_irqsave(host_set lock)
4051 *
4052 * RETURNS:
9a3d9eb0 4053 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4054 */
4055
9a3d9eb0 4056unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4057{
4058 struct ata_port *ap = qc->ap;
4059
4060 ata_dev_select(ap, qc->dev->devno, 1, 0);
4061
4062 switch (qc->tf.protocol) {
4063 case ATA_PROT_NODATA:
e5338254 4064 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4065 break;
4066
4067 case ATA_PROT_DMA:
4068 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4069 ap->ops->bmdma_setup(qc); /* set up bmdma */
4070 ap->ops->bmdma_start(qc); /* initiate bmdma */
4071 break;
4072
4073 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4074 ata_qc_set_polling(qc);
e5338254 4075 ata_tf_to_host(ap, &qc->tf);
14be71f4 4076 ap->hsm_task_state = HSM_ST;
8061f5f0 4077 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4078 break;
4079
4080 case ATA_PROT_ATAPI:
4081 ata_qc_set_polling(qc);
e5338254 4082 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4083 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4084 break;
4085
4086 case ATA_PROT_ATAPI_NODATA:
c1389503 4087 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4088 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4089 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4090 break;
4091
4092 case ATA_PROT_ATAPI_DMA:
c1389503 4093 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4094 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4095 ap->ops->bmdma_setup(qc); /* set up bmdma */
8061f5f0 4096 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4097 break;
4098
4099 default:
4100 WARN_ON(1);
9a3d9eb0 4101 return AC_ERR_SYSTEM;
1da177e4
LT		 4102 }
4103
4104 return 0;
4105}
4106
1da177e4
LT		 4107/**
4108 * ata_host_intr - Handle host interrupt for given (port, task)
4109 * @ap: Port on which interrupt arrived (possibly...)
4110 * @qc: Taskfile currently active in engine
4111 *
4112 * Handle host interrupt for given queued command. Currently,
4113 * only DMA interrupts are handled. All other commands are
4114 * handled via polling with interrupts disabled (nIEN bit).
4115 *
4116 * LOCKING:
4117 * spin_lock_irqsave(host_set lock)
4118 *
4119 * RETURNS:
4120 * One if interrupt was handled, zero if not (shared irq).
4121 */
4122
4123inline unsigned int ata_host_intr (struct ata_port *ap,
4124 struct ata_queued_cmd *qc)
4125{
4126 u8 status, host_stat;
4127
4128 switch (qc->tf.protocol) {
4129
4130 case ATA_PROT_DMA:
4131 case ATA_PROT_ATAPI_DMA:
4132 case ATA_PROT_ATAPI:
4133 /* check status of DMA engine */
4134 host_stat = ap->ops->bmdma_status(ap);
4135 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4136
4137 /* if it's not our irq... */
4138 if (!(host_stat & ATA_DMA_INTR))
4139 goto idle_irq;
4140
4141 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4142 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4143
4144 /* fall through */
4145
4146 case ATA_PROT_ATAPI_NODATA:
4147 case ATA_PROT_NODATA:
4148 /* check altstatus */
4149 status = ata_altstatus(ap);
4150 if (status & ATA_BUSY)
4151 goto idle_irq;
4152
4153 /* check main status, clearing INTRQ */
4154 status = ata_chk_status(ap);
4155 if (unlikely(status & ATA_BUSY))
4156 goto idle_irq;
4157 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4158 ap->id, qc->tf.protocol, status);
4159
4160 /* ack bmdma irq events */
4161 ap->ops->irq_clear(ap);
4162
4163 /* complete taskfile transaction */
a22e2eb0
AL		 4164 qc->err_mask |= ac_err_mask(status);
4165 ata_qc_complete(qc);
1da177e4
LT		 4166 break;
4167
4168 default:
4169 goto idle_irq;
4170 }
4171
4172 return 1; /* irq handled */
4173
4174idle_irq:
4175 ap->stats.idle_irq++;
4176
4177#ifdef ATA_IRQ_TRAP
4178 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4179 ata_irq_ack(ap, 0); /* debug trap */
4180 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4181 return 1;
1da177e4
LT		 4182 }
4183#endif
4184 return 0; /* irq not handled */
4185}
4186
4187/**
4188 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4189 * @irq: irq line (unused)
4190 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4191 * @regs: unused
4192 *
0cba632b
JG		 4193 * Default interrupt handler for PCI IDE devices. Calls
4194 * ata_host_intr() for each port that is not disabled.
4195 *
1da177e4 4196 * LOCKING:
0cba632b 4197 * Obtains host_set lock during operation.
1da177e4
LT		 4198 *
4199 * RETURNS:
0cba632b 4200 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4201 */
4202
4203irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4204{
4205 struct ata_host_set *host_set = dev_instance;
4206 unsigned int i;
4207 unsigned int handled = 0;
4208 unsigned long flags;
4209
4210 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4211 spin_lock_irqsave(&host_set->lock, flags);
4212
4213 for (i = 0; i < host_set->n_ports; i++) {
4214 struct ata_port *ap;
4215
4216 ap = host_set->ports[i];
c1389503
TH		 4217 if (ap &&
4218 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4219 struct ata_queued_cmd *qc;
4220
4221 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4222 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4223 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4224 handled |= ata_host_intr(ap, qc);
4225 }
4226 }
4227
4228 spin_unlock_irqrestore(&host_set->lock, flags);
4229
4230 return IRQ_RETVAL(handled);
4231}
4232
0baab86b 4233
9b847548
JA		 4234/*
4235 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4236 * without filling any other registers
4237 */
4238static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4239 u8 cmd)
4240{
4241 struct ata_taskfile tf;
4242 int err;
4243
4244 ata_tf_init(ap, &tf, dev->devno);
4245
4246 tf.command = cmd;
4247 tf.flags |= ATA_TFLAG_DEVICE;
4248 tf.protocol = ATA_PROT_NODATA;
4249
4250 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4251 if (err)
4252 printk(KERN_ERR "%s: ata command failed: %d\n",
4253 __FUNCTION__, err);
4254
4255 return err;
4256}
4257
4258static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4259{
4260 u8 cmd;
4261
4262 if (!ata_try_flush_cache(dev))
4263 return 0;
4264
4265 if (ata_id_has_flush_ext(dev->id))
4266 cmd = ATA_CMD_FLUSH_EXT;
4267 else
4268 cmd = ATA_CMD_FLUSH;
4269
4270 return ata_do_simple_cmd(ap, dev, cmd);
4271}
4272
4273static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4274{
4275 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4276}
4277
4278static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4279{
4280 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4281}
4282
4283/**
4284 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4285 * @ap: port the device is connected to
4286 * @dev: the device to resume
9b847548
JA		 4287 *
4288 * Kick the drive back into action, by sending it an idle immediate
4289 * command and making sure its transfer mode matches between drive
4290 * and host.
4291 *
4292 */
4293int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4294{
4295 if (ap->flags & ATA_FLAG_SUSPENDED) {
4296 ap->flags &= ~ATA_FLAG_SUSPENDED;
4297 ata_set_mode(ap);
4298 }
4299 if (!ata_dev_present(dev))
4300 return 0;
4301 if (dev->class == ATA_DEV_ATA)
4302 ata_start_drive(ap, dev);
4303
4304 return 0;
4305}
4306
4307/**
4308 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4309 * @ap: port the device is connected to
4310 * @dev: the device to suspend
9b847548
JA		 4311 *
4312 * Flush the cache on the drive, if appropriate, then issue a
4313 * standbynow command.
9b847548 4314 */
082776e4 4315int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548
JA		 4316{
4317 if (!ata_dev_present(dev))
4318 return 0;
4319 if (dev->class == ATA_DEV_ATA)
4320 ata_flush_cache(ap, dev);
4321
082776e4
NC		 4322 if (state.event != PM_EVENT_FREEZE)
4323 ata_standby_drive(ap, dev);
9b847548
JA		 4324 ap->flags |= ATA_FLAG_SUSPENDED;
4325 return 0;
4326}
4327
c893a3ae
RD		 4328/**
4329 * ata_port_start - Set port up for dma.
4330 * @ap: Port to initialize
4331 *
4332 * Called just after data structures for each port are
4333 * initialized. Allocates space for PRD table.
4334 *
4335 * May be used as the port_start() entry in ata_port_operations.
4336 *
4337 * LOCKING:
4338 * Inherited from caller.
4339 */
4340
1da177e4
LT		 4341int ata_port_start (struct ata_port *ap)
4342{
2f1f610b 4343 struct device *dev = ap->dev;
6037d6bb 4344 int rc;
1da177e4
LT		 4345
4346 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4347 if (!ap->prd)
4348 return -ENOMEM;
4349
6037d6bb
JG		 4350 rc = ata_pad_alloc(ap, dev);
4351 if (rc) {
cedc9a47 4352 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4353 return rc;
cedc9a47
JG		 4354 }
4355
1da177e4
LT		 4356 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4357
4358 return 0;
4359}
4360
0baab86b
EF		 4361
4362/**
4363 * ata_port_stop - Undo ata_port_start()
4364 * @ap: Port to shut down
4365 *
4366 * Frees the PRD table.
4367 *
4368 * May be used as the port_stop() entry in ata_port_operations.
4369 *
4370 * LOCKING:
6f0ef4fa 4371 * Inherited from caller.
0baab86b
EF		 4372 */
4373
1da177e4
LT		 4374void ata_port_stop (struct ata_port *ap)
4375{
2f1f610b 4376 struct device *dev = ap->dev;
1da177e4
LT		 4377
4378 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4379 ata_pad_free(ap, dev);
1da177e4
LT		 4380}
4381
aa8f0dc6
JG		 4382void ata_host_stop (struct ata_host_set *host_set)
4383{
4384 if (host_set->mmio_base)
4385 iounmap(host_set->mmio_base);
4386}
4387
4388
1da177e4
LT		 4389/**
4390 * ata_host_remove - Unregister SCSI host structure with upper layers
4391 * @ap: Port to unregister
4392 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4393 *
4394 * LOCKING:
6f0ef4fa 4395 * Inherited from caller.
1da177e4
LT		 4396 */
4397
4398static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4399{
4400 struct Scsi_Host *sh = ap->host;
4401
4402 DPRINTK("ENTER\n");
4403
4404 if (do_unregister)
4405 scsi_remove_host(sh);
4406
4407 ap->ops->port_stop(ap);
4408}
4409
4410/**
4411 * ata_host_init - Initialize an ata_port structure
4412 * @ap: Structure to initialize
4413 * @host: associated SCSI mid-layer structure
4414 * @host_set: Collection of hosts to which @ap belongs
4415 * @ent: Probe information provided by low-level driver
4416 * @port_no: Port number associated with this ata_port
4417 *
0cba632b
JG		 4418 * Initialize a new ata_port structure, and its associated
4419 * scsi_host.
4420 *
1da177e4 4421 * LOCKING:
0cba632b 4422 * Inherited from caller.
1da177e4
LT		 4423 */
4424
4425static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4426 struct ata_host_set *host_set,
057ace5e 4427 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4428{
4429 unsigned int i;
4430
4431 host->max_id = 16;
4432 host->max_lun = 1;
4433 host->max_channel = 1;
4434 host->unique_id = ata_unique_id++;
4435 host->max_cmd_len = 12;
12413197 4436
1da177e4
LT		 4437 ap->flags = ATA_FLAG_PORT_DISABLED;
4438 ap->id = host->unique_id;
4439 ap->host = host;
4440 ap->ctl = ATA_DEVCTL_OBS;
4441 ap->host_set = host_set;
2f1f610b 4442 ap->dev = ent->dev;
1da177e4
LT		 4443 ap->port_no = port_no;
4444 ap->hard_port_no =
4445 ent->legacy_mode ? ent->hard_port_no : port_no;
4446 ap->pio_mask = ent->pio_mask;
4447 ap->mwdma_mask = ent->mwdma_mask;
4448 ap->udma_mask = ent->udma_mask;
4449 ap->flags |= ent->host_flags;
4450 ap->ops = ent->port_ops;
4451 ap->cbl = ATA_CBL_NONE;
4452 ap->active_tag = ATA_TAG_POISON;
4453 ap->last_ctl = 0xFF;
4454
86e45b6b 4455 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4456 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4457
acf356b1
TH		 4458 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4459 struct ata_device *dev = &ap->device[i];
4460 dev->devno = i;
4461 dev->pio_mask = UINT_MAX;
4462 dev->mwdma_mask = UINT_MAX;
4463 dev->udma_mask = UINT_MAX;
4464 }
1da177e4
LT		 4465
4466#ifdef ATA_IRQ_TRAP
4467 ap->stats.unhandled_irq = 1;
4468 ap->stats.idle_irq = 1;
4469#endif
4470
4471 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4472}
4473
4474/**
4475 * ata_host_add - Attach low-level ATA driver to system
4476 * @ent: Information provided by low-level driver
4477 * @host_set: Collections of ports to which we add
4478 * @port_no: Port number associated with this host
4479 *
0cba632b
JG		 4480 * Attach low-level ATA driver to system.
4481 *
1da177e4 4482 * LOCKING:
0cba632b 4483 * PCI/etc. bus probe sem.
1da177e4
LT		 4484 *
4485 * RETURNS:
0cba632b 4486 * New ata_port on success, for NULL on error.
1da177e4
LT		 4487 */
4488
057ace5e 4489static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4490 struct ata_host_set *host_set,
4491 unsigned int port_no)
4492{
4493 struct Scsi_Host *host;
4494 struct ata_port *ap;
4495 int rc;
4496
4497 DPRINTK("ENTER\n");
aec5c3c1
TH		 4498
4499 if (!ent->port_ops->probe_reset &&
4500 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4501 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4502 port_no);
4503 return NULL;
4504 }
4505
1da177e4
LT		 4506 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4507 if (!host)
4508 return NULL;
4509
30afc84c
TH		 4510 host->transportt = &ata_scsi_transport_template;
4511
1da177e4
LT		 4512 ap = (struct ata_port *) &host->hostdata[0];
4513
4514 ata_host_init(ap, host, host_set, ent, port_no);
4515
4516 rc = ap->ops->port_start(ap);
4517 if (rc)
4518 goto err_out;
4519
4520 return ap;
4521
4522err_out:
4523 scsi_host_put(host);
4524 return NULL;
4525}
4526
4527/**
0cba632b
JG		 4528 * ata_device_add - Register hardware device with ATA and SCSI layers
4529 * @ent: Probe information describing hardware device to be registered
4530 *
4531 * This function processes the information provided in the probe
4532 * information struct @ent, allocates the necessary ATA and SCSI
4533 * host information structures, initializes them, and registers
4534 * everything with requisite kernel subsystems.
4535 *
4536 * This function requests irqs, probes the ATA bus, and probes
4537 * the SCSI bus.
1da177e4
LT		 4538 *
4539 * LOCKING:
0cba632b 4540 * PCI/etc. bus probe sem.
1da177e4
LT		 4541 *
4542 * RETURNS:
0cba632b 4543 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4544 */
4545
057ace5e 4546int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4547{
4548 unsigned int count = 0, i;
4549 struct device *dev = ent->dev;
4550 struct ata_host_set *host_set;
4551
4552 DPRINTK("ENTER\n");
4553 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4554 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4555 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4556 if (!host_set)
4557 return 0;
1da177e4
LT		 4558 spin_lock_init(&host_set->lock);
4559
4560 host_set->dev = dev;
4561 host_set->n_ports = ent->n_ports;
4562 host_set->irq = ent->irq;
4563 host_set->mmio_base = ent->mmio_base;
4564 host_set->private_data = ent->private_data;
4565 host_set->ops = ent->port_ops;
5444a6f4 4566 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4567
4568 /* register each port bound to this device */
4569 for (i = 0; i < ent->n_ports; i++) {
4570 struct ata_port *ap;
4571 unsigned long xfer_mode_mask;
4572
4573 ap = ata_host_add(ent, host_set, i);
4574 if (!ap)
4575 goto err_out;
4576
4577 host_set->ports[i] = ap;
4578 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4579 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4580 (ap->pio_mask << ATA_SHIFT_PIO);
4581
4582 /* print per-port info to dmesg */
4583 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4584 "bmdma 0x%lX irq %lu\n",
4585 ap->id,
4586 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4587 ata_mode_string(xfer_mode_mask),
4588 ap->ioaddr.cmd_addr,
4589 ap->ioaddr.ctl_addr,
4590 ap->ioaddr.bmdma_addr,
4591 ent->irq);
4592
4593 ata_chk_status(ap);
4594 host_set->ops->irq_clear(ap);
4595 count++;
4596 }
4597
57f3bda8
RD		 4598 if (!count)
4599 goto err_free_ret;
1da177e4
LT		 4600
4601 /* obtain irq, that is shared between channels */
4602 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4603 DRV_NAME, host_set))
4604 goto err_out;
4605
4606 /* perform each probe synchronously */
4607 DPRINTK("probe begin\n");
4608 for (i = 0; i < count; i++) {
4609 struct ata_port *ap;
4610 int rc;
4611
4612 ap = host_set->ports[i];
4613
c893a3ae 4614 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4615 rc = ata_bus_probe(ap);
c893a3ae 4616 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4617
4618 if (rc) {
4619 /* FIXME: do something useful here?
4620 * Current libata behavior will
4621 * tear down everything when
4622 * the module is removed
4623 * or the h/w is unplugged.
4624 */
4625 }
4626
4627 rc = scsi_add_host(ap->host, dev);
4628 if (rc) {
4629 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4630 ap->id);
4631 /* FIXME: do something useful here */
4632 /* FIXME: handle unconditional calls to
4633 * scsi_scan_host and ata_host_remove, below,
4634 * at the very least
4635 */
4636 }
4637 }
4638
4639 /* probes are done, now scan each port's disk(s) */
c893a3ae 4640 DPRINTK("host probe begin\n");
1da177e4
LT		 4641 for (i = 0; i < count; i++) {
4642 struct ata_port *ap = host_set->ports[i];
4643
644dd0cc 4644 ata_scsi_scan_host(ap);
1da177e4
LT		 4645 }
4646
4647 dev_set_drvdata(dev, host_set);
4648
4649 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4650 return ent->n_ports; /* success */
4651
4652err_out:
4653 for (i = 0; i < count; i++) {
4654 ata_host_remove(host_set->ports[i], 1);
4655 scsi_host_put(host_set->ports[i]->host);
4656 }
57f3bda8 4657err_free_ret:
1da177e4
LT		 4658 kfree(host_set);
4659 VPRINTK("EXIT, returning 0\n");
4660 return 0;
4661}
4662
17b14451
AC		 4663/**
4664 * ata_host_set_remove - PCI layer callback for device removal
4665 * @host_set: ATA host set that was removed
4666 *
2e9edbf8 4667 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4668 * objects.
4669 *
4670 * LOCKING:
4671 * Inherited from calling layer (may sleep).
4672 */
4673
17b14451
AC		 4674void ata_host_set_remove(struct ata_host_set *host_set)
4675{
4676 struct ata_port *ap;
4677 unsigned int i;
4678
4679 for (i = 0; i < host_set->n_ports; i++) {
4680 ap = host_set->ports[i];
4681 scsi_remove_host(ap->host);
4682 }
4683
4684 free_irq(host_set->irq, host_set);
4685
4686 for (i = 0; i < host_set->n_ports; i++) {
4687 ap = host_set->ports[i];
4688
4689 ata_scsi_release(ap->host);
4690
4691 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4692 struct ata_ioports *ioaddr = &ap->ioaddr;
4693
4694 if (ioaddr->cmd_addr == 0x1f0)
4695 release_region(0x1f0, 8);
4696 else if (ioaddr->cmd_addr == 0x170)
4697 release_region(0x170, 8);
4698 }
4699
4700 scsi_host_put(ap->host);
4701 }
4702
4703 if (host_set->ops->host_stop)
4704 host_set->ops->host_stop(host_set);
4705
4706 kfree(host_set);
4707}
4708
1da177e4
LT		 4709/**
4710 * ata_scsi_release - SCSI layer callback hook for host unload
4711 * @host: libata host to be unloaded
4712 *
4713 * Performs all duties necessary to shut down a libata port...
4714 * Kill port kthread, disable port, and release resources.
4715 *
4716 * LOCKING:
4717 * Inherited from SCSI layer.
4718 *
4719 * RETURNS:
4720 * One.
4721 */
4722
4723int ata_scsi_release(struct Scsi_Host *host)
4724{
4725 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4726 int i;
1da177e4
LT		 4727
4728 DPRINTK("ENTER\n");
4729
4730 ap->ops->port_disable(ap);
4731 ata_host_remove(ap, 0);
d9572b1d
TH		 4732 for (i = 0; i < ATA_MAX_DEVICES; i++)
4733 kfree(ap->device[i].id);
1da177e4
LT		 4734
4735 DPRINTK("EXIT\n");
4736 return 1;
4737}
4738
4739/**
4740 * ata_std_ports - initialize ioaddr with standard port offsets.
4741 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4742 *
4743 * Utility function which initializes data_addr, error_addr,
4744 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4745 * device_addr, status_addr, and command_addr to standard offsets
4746 * relative to cmd_addr.
4747 *
4748 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4749 */
0baab86b 4750
1da177e4
LT		 4751void ata_std_ports(struct ata_ioports *ioaddr)
4752{
4753 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4754 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4755 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4756 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4757 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4758 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4759 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4760 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4761 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4762 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4763}
4764
0baab86b 4765
374b1873
JG		 4766#ifdef CONFIG_PCI
4767
4768void ata_pci_host_stop (struct ata_host_set *host_set)
4769{
4770 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4771
4772 pci_iounmap(pdev, host_set->mmio_base);
4773}
4774
1da177e4
LT		 4775/**
4776 * ata_pci_remove_one - PCI layer callback for device removal
4777 * @pdev: PCI device that was removed
4778 *
4779 * PCI layer indicates to libata via this hook that
6f0ef4fa 4780 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4781 * Handle this by unregistering all objects associated
4782 * with this PCI device. Free those objects. Then finally
4783 * release PCI resources and disable device.
4784 *
4785 * LOCKING:
4786 * Inherited from PCI layer (may sleep).
4787 */
4788
4789void ata_pci_remove_one (struct pci_dev *pdev)
4790{
4791 struct device *dev = pci_dev_to_dev(pdev);
4792 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4793
17b14451 4794 ata_host_set_remove(host_set);
1da177e4
LT		 4795 pci_release_regions(pdev);
4796 pci_disable_device(pdev);
4797 dev_set_drvdata(dev, NULL);
4798}
4799
4800/* move to PCI subsystem */
057ace5e 4801int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4802{
4803 unsigned long tmp = 0;
4804
4805 switch (bits->width) {
4806 case 1: {
4807 u8 tmp8 = 0;
4808 pci_read_config_byte(pdev, bits->reg, &tmp8);
4809 tmp = tmp8;
4810 break;
4811 }
4812 case 2: {
4813 u16 tmp16 = 0;
4814 pci_read_config_word(pdev, bits->reg, &tmp16);
4815 tmp = tmp16;
4816 break;
4817 }
4818 case 4: {
4819 u32 tmp32 = 0;
4820 pci_read_config_dword(pdev, bits->reg, &tmp32);
4821 tmp = tmp32;
4822 break;
4823 }
4824
4825 default:
4826 return -EINVAL;
4827 }
4828
4829 tmp &= bits->mask;
4830
4831 return (tmp == bits->val) ? 1 : 0;
4832}
9b847548
JA		 4833
4834int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4835{
4836 pci_save_state(pdev);
4837 pci_disable_device(pdev);
4838 pci_set_power_state(pdev, PCI_D3hot);
4839 return 0;
4840}
4841
4842int ata_pci_device_resume(struct pci_dev *pdev)
4843{
4844 pci_set_power_state(pdev, PCI_D0);
4845 pci_restore_state(pdev);
4846 pci_enable_device(pdev);
4847 pci_set_master(pdev);
4848 return 0;
4849}
1da177e4
LT		 4850#endif /* CONFIG_PCI */
4851
4852
1da177e4
LT		 4853static int __init ata_init(void)
4854{
4855 ata_wq = create_workqueue("ata");
4856 if (!ata_wq)
4857 return -ENOMEM;
4858
4859 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4860 return 0;
4861}
4862
4863static void __exit ata_exit(void)
4864{
4865 destroy_workqueue(ata_wq);
4866}
4867
4868module_init(ata_init);
4869module_exit(ata_exit);
4870
67846b30
JG		 4871static unsigned long ratelimit_time;
4872static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4873
4874int ata_ratelimit(void)
4875{
4876 int rc;
4877 unsigned long flags;
4878
4879 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4880
4881 if (time_after(jiffies, ratelimit_time)) {
4882 rc = 1;
4883 ratelimit_time = jiffies + (HZ/5);
4884 } else
4885 rc = 0;
4886
4887 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4888
4889 return rc;
4890}
4891
1da177e4
LT		 4892/*
4893 * libata is essentially a library of internal helper functions for
4894 * low-level ATA host controller drivers. As such, the API/ABI is
4895 * likely to change as new drivers are added and updated.
4896 * Do not depend on ABI/API stability.
4897 */
4898
4899EXPORT_SYMBOL_GPL(ata_std_bios_param);
4900EXPORT_SYMBOL_GPL(ata_std_ports);
4901EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 4902EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 4903EXPORT_SYMBOL_GPL(ata_sg_init);
4904EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 4905EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 4906EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4907EXPORT_SYMBOL_GPL(ata_eng_timeout);
4908EXPORT_SYMBOL_GPL(ata_tf_load);
4909EXPORT_SYMBOL_GPL(ata_tf_read);
4910EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4911EXPORT_SYMBOL_GPL(ata_std_dev_select);
4912EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4913EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4914EXPORT_SYMBOL_GPL(ata_check_status);
4915EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 4916EXPORT_SYMBOL_GPL(ata_exec_command);
4917EXPORT_SYMBOL_GPL(ata_port_start);
4918EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 4919EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 4920EXPORT_SYMBOL_GPL(ata_interrupt);
4921EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 4922EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 4923EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4924EXPORT_SYMBOL_GPL(ata_bmdma_start);
4925EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4926EXPORT_SYMBOL_GPL(ata_bmdma_status);
4927EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4928EXPORT_SYMBOL_GPL(ata_port_probe);
4929EXPORT_SYMBOL_GPL(sata_phy_reset);
4930EXPORT_SYMBOL_GPL(__sata_phy_reset);
4931EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 4932EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 4933EXPORT_SYMBOL_GPL(ata_std_softreset);
4934EXPORT_SYMBOL_GPL(sata_std_hardreset);
4935EXPORT_SYMBOL_GPL(ata_std_postreset);
4936EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 4937EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 4938EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 4939EXPORT_SYMBOL_GPL(ata_dev_classify);
4940EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 4941EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 4942EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 4943EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 4944EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 4945EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4946EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4947EXPORT_SYMBOL_GPL(ata_scsi_error);
4948EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4949EXPORT_SYMBOL_GPL(ata_scsi_release);
4950EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 4951EXPORT_SYMBOL_GPL(ata_id_string);
4952EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 4953EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 4954EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
4955EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 4956
1bc4ccff 4957EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 4958EXPORT_SYMBOL_GPL(ata_timing_compute);
4959EXPORT_SYMBOL_GPL(ata_timing_merge);
4960
1da177e4
LT		 4961#ifdef CONFIG_PCI
4962EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 4963EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 4964EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4965EXPORT_SYMBOL_GPL(ata_pci_init_one);
4966EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 4967EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
4968EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 4969EXPORT_SYMBOL_GPL(ata_pci_default_filter);
4970EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 4971#endif /* CONFIG_PCI */
9b847548
JA		 4972
4973EXPORT_SYMBOL_GPL(ata_device_suspend);
4974EXPORT_SYMBOL_GPL(ata_device_resume);
4975EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
4976EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux kernel - Deliverables
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