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[deliverable/linux.git] / drivers / scsi / libata-core.c
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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
e82cbdb9 68static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev);
83206a29
TH		 69static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
70 struct ata_device *dev);
acf356b1 71static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 72
73static unsigned int ata_unique_id = 1;
74static struct workqueue_struct *ata_wq;
75
418dc1f5 76int atapi_enabled = 1;
1623c81e
JG		 77module_param(atapi_enabled, int, 0444);
78MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
79
c3c013a2
JG		 80int libata_fua = 0;
81module_param_named(fua, libata_fua, int, 0444);
82MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
83
1da177e4
LT		 84MODULE_AUTHOR("Jeff Garzik");
85MODULE_DESCRIPTION("Library module for ATA devices");
86MODULE_LICENSE("GPL");
87MODULE_VERSION(DRV_VERSION);
88
0baab86b 89
1da177e4
LT		 90/**
91 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
92 * @tf: Taskfile to convert
93 * @fis: Buffer into which data will output
94 * @pmp: Port multiplier port
95 *
96 * Converts a standard ATA taskfile to a Serial ATA
97 * FIS structure (Register - Host to Device).
98 *
99 * LOCKING:
100 * Inherited from caller.
101 */
102
057ace5e 103void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 104{
105 fis[0] = 0x27; /* Register - Host to Device FIS */
106 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
107 bit 7 indicates Command FIS */
108 fis[2] = tf->command;
109 fis[3] = tf->feature;
110
111 fis[4] = tf->lbal;
112 fis[5] = tf->lbam;
113 fis[6] = tf->lbah;
114 fis[7] = tf->device;
115
116 fis[8] = tf->hob_lbal;
117 fis[9] = tf->hob_lbam;
118 fis[10] = tf->hob_lbah;
119 fis[11] = tf->hob_feature;
120
121 fis[12] = tf->nsect;
122 fis[13] = tf->hob_nsect;
123 fis[14] = 0;
124 fis[15] = tf->ctl;
125
126 fis[16] = 0;
127 fis[17] = 0;
128 fis[18] = 0;
129 fis[19] = 0;
130}
131
132/**
133 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
134 * @fis: Buffer from which data will be input
135 * @tf: Taskfile to output
136 *
e12a1be6 137 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 138 *
139 * LOCKING:
140 * Inherited from caller.
141 */
142
057ace5e 143void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 144{
145 tf->command = fis[2]; /* status */
146 tf->feature = fis[3]; /* error */
147
148 tf->lbal = fis[4];
149 tf->lbam = fis[5];
150 tf->lbah = fis[6];
151 tf->device = fis[7];
152
153 tf->hob_lbal = fis[8];
154 tf->hob_lbam = fis[9];
155 tf->hob_lbah = fis[10];
156
157 tf->nsect = fis[12];
158 tf->hob_nsect = fis[13];
159}
160
8cbd6df1
AL		 161static const u8 ata_rw_cmds[] = {
162 /* pio multi */
163 ATA_CMD_READ_MULTI,
164 ATA_CMD_WRITE_MULTI,
165 ATA_CMD_READ_MULTI_EXT,
166 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 167 0,
168 0,
169 0,
170 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 171 /* pio */
172 ATA_CMD_PIO_READ,
173 ATA_CMD_PIO_WRITE,
174 ATA_CMD_PIO_READ_EXT,
175 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 176 0,
177 0,
178 0,
179 0,
8cbd6df1
AL		 180 /* dma */
181 ATA_CMD_READ,
182 ATA_CMD_WRITE,
183 ATA_CMD_READ_EXT,
9a3dccc4
TH		 184 ATA_CMD_WRITE_EXT,
185 0,
186 0,
187 0,
188 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 189};
1da177e4
LT		 190
191/**
8cbd6df1
AL		 192 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
193 * @qc: command to examine and configure
1da177e4 194 *
2e9edbf8 195 * Examine the device configuration and tf->flags to calculate
8cbd6df1 196 * the proper read/write commands and protocol to use.
1da177e4
LT		 197 *
198 * LOCKING:
199 * caller.
200 */
9a3dccc4 201int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 202{
8cbd6df1
AL		 203 struct ata_taskfile *tf = &qc->tf;
204 struct ata_device *dev = qc->dev;
9a3dccc4 205 u8 cmd;
1da177e4 206
9a3dccc4 207 int index, fua, lba48, write;
2e9edbf8 208
9a3dccc4 209 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 210 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
211 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 212
8cbd6df1
AL		 213 if (dev->flags & ATA_DFLAG_PIO) {
214 tf->protocol = ATA_PROT_PIO;
9a3dccc4 215 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 216 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
217 /* Unable to use DMA due to host limitation */
218 tf->protocol = ATA_PROT_PIO;
aef9d533 219 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 220 } else {
221 tf->protocol = ATA_PROT_DMA;
9a3dccc4 222 index = 16;
8cbd6df1 223 }
1da177e4 224
9a3dccc4
TH		 225 cmd = ata_rw_cmds[index + fua + lba48 + write];
226 if (cmd) {
227 tf->command = cmd;
228 return 0;
229 }
230 return -1;
1da177e4
LT		 231}
232
cb95d562
TH		 233/**
234 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
235 * @pio_mask: pio_mask
236 * @mwdma_mask: mwdma_mask
237 * @udma_mask: udma_mask
238 *
239 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
240 * unsigned int xfer_mask.
241 *
242 * LOCKING:
243 * None.
244 *
245 * RETURNS:
246 * Packed xfer_mask.
247 */
248static unsigned int ata_pack_xfermask(unsigned int pio_mask,
249 unsigned int mwdma_mask,
250 unsigned int udma_mask)
251{
252 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
253 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
254 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
255}
256
c0489e4e
TH		 257/**
258 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
259 * @xfer_mask: xfer_mask to unpack
260 * @pio_mask: resulting pio_mask
261 * @mwdma_mask: resulting mwdma_mask
262 * @udma_mask: resulting udma_mask
263 *
264 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
265 * Any NULL distination masks will be ignored.
266 */
267static void ata_unpack_xfermask(unsigned int xfer_mask,
268 unsigned int *pio_mask,
269 unsigned int *mwdma_mask,
270 unsigned int *udma_mask)
271{
272 if (pio_mask)
273 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
274 if (mwdma_mask)
275 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
276 if (udma_mask)
277 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
278}
279
cb95d562 280static const struct ata_xfer_ent {
be9a50c8 281 int shift, bits;
cb95d562
TH		 282 u8 base;
283} ata_xfer_tbl[] = {
284 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
285 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
286 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
287 { -1, },
1da177e4
LT		 288};
289
290/**
cb95d562
TH		 291 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
292 * @xfer_mask: xfer_mask of interest
1da177e4 293 *
cb95d562
TH		 294 * Return matching XFER_* value for @xfer_mask. Only the highest
295 * bit of @xfer_mask is considered.
1da177e4
LT		 296 *
297 * LOCKING:
298 * None.
299 *
300 * RETURNS:
cb95d562 301 * Matching XFER_* value, 0 if no match found.
1da177e4 302 */
cb95d562
TH		 303static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
304{
305 int highbit = fls(xfer_mask) - 1;
306 const struct ata_xfer_ent *ent;
1da177e4 307
cb95d562
TH		 308 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
309 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
310 return ent->base + highbit - ent->shift;
311 return 0;
312}
313
314/**
315 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
316 * @xfer_mode: XFER_* of interest
317 *
318 * Return matching xfer_mask for @xfer_mode.
319 *
320 * LOCKING:
321 * None.
322 *
323 * RETURNS:
324 * Matching xfer_mask, 0 if no match found.
325 */
326static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
1da177e4 327{
cb95d562 328 const struct ata_xfer_ent *ent;
1da177e4 329
cb95d562
TH		 330 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
331 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
332 return 1 << (ent->shift + xfer_mode - ent->base);
333 return 0;
334}
1da177e4 335
cb95d562
TH		 336/**
337 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
338 * @xfer_mode: XFER_* of interest
339 *
340 * Return matching xfer_shift for @xfer_mode.
341 *
342 * LOCKING:
343 * None.
344 *
345 * RETURNS:
346 * Matching xfer_shift, -1 if no match found.
347 */
348static int ata_xfer_mode2shift(unsigned int xfer_mode)
349{
350 const struct ata_xfer_ent *ent;
1da177e4 351
cb95d562
TH		 352 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
353 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
354 return ent->shift;
355 return -1;
356}
357
1da177e4 358/**
1da7b0d0
TH		 359 * ata_mode_string - convert xfer_mask to string
360 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 361 *
362 * Determine string which represents the highest speed
1da7b0d0 363 * (highest bit in @modemask).
1da177e4
LT		 364 *
365 * LOCKING:
366 * None.
367 *
368 * RETURNS:
369 * Constant C string representing highest speed listed in
1da7b0d0 370 * @mode_mask, or the constant C string "<n/a>".
1da177e4 371 */
1da7b0d0 372static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 373{
75f554bc
TH		 374 static const char * const xfer_mode_str[] = {
375 "PIO0",
376 "PIO1",
377 "PIO2",
378 "PIO3",
379 "PIO4",
380 "MWDMA0",
381 "MWDMA1",
382 "MWDMA2",
383 "UDMA/16",
384 "UDMA/25",
385 "UDMA/33",
386 "UDMA/44",
387 "UDMA/66",
388 "UDMA/100",
389 "UDMA/133",
390 "UDMA7",
391 };
1da7b0d0 392 int highbit;
1da177e4 393
1da7b0d0
TH		 394 highbit = fls(xfer_mask) - 1;
395 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
396 return xfer_mode_str[highbit];
1da177e4 397 return "<n/a>";
1da177e4
LT		 398}
399
4c360c81
TH		 400static const char *sata_spd_string(unsigned int spd)
401{
402 static const char * const spd_str[] = {
403 "1.5 Gbps",
404 "3.0 Gbps",
405 };
406
407 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
408 return "<unknown>";
409 return spd_str[spd - 1];
410}
411
0b8efb0a
TH		 412static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
413{
e1211e3f 414 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 415 printk(KERN_WARNING "ata%u: dev %u disabled\n",
416 ap->id, dev->devno);
417 dev->class++;
418 }
419}
420
1da177e4
LT		 421/**
422 * ata_pio_devchk - PATA device presence detection
423 * @ap: ATA channel to examine
424 * @device: Device to examine (starting at zero)
425 *
426 * This technique was originally described in
427 * Hale Landis's ATADRVR (www.ata-atapi.com), and
428 * later found its way into the ATA/ATAPI spec.
429 *
430 * Write a pattern to the ATA shadow registers,
431 * and if a device is present, it will respond by
432 * correctly storing and echoing back the
433 * ATA shadow register contents.
434 *
435 * LOCKING:
436 * caller.
437 */
438
439static unsigned int ata_pio_devchk(struct ata_port *ap,
440 unsigned int device)
441{
442 struct ata_ioports *ioaddr = &ap->ioaddr;
443 u8 nsect, lbal;
444
445 ap->ops->dev_select(ap, device);
446
447 outb(0x55, ioaddr->nsect_addr);
448 outb(0xaa, ioaddr->lbal_addr);
449
450 outb(0xaa, ioaddr->nsect_addr);
451 outb(0x55, ioaddr->lbal_addr);
452
453 outb(0x55, ioaddr->nsect_addr);
454 outb(0xaa, ioaddr->lbal_addr);
455
456 nsect = inb(ioaddr->nsect_addr);
457 lbal = inb(ioaddr->lbal_addr);
458
459 if ((nsect == 0x55) && (lbal == 0xaa))
460 return 1; /* we found a device */
461
462 return 0; /* nothing found */
463}
464
465/**
466 * ata_mmio_devchk - PATA device presence detection
467 * @ap: ATA channel to examine
468 * @device: Device to examine (starting at zero)
469 *
470 * This technique was originally described in
471 * Hale Landis's ATADRVR (www.ata-atapi.com), and
472 * later found its way into the ATA/ATAPI spec.
473 *
474 * Write a pattern to the ATA shadow registers,
475 * and if a device is present, it will respond by
476 * correctly storing and echoing back the
477 * ATA shadow register contents.
478 *
479 * LOCKING:
480 * caller.
481 */
482
483static unsigned int ata_mmio_devchk(struct ata_port *ap,
484 unsigned int device)
485{
486 struct ata_ioports *ioaddr = &ap->ioaddr;
487 u8 nsect, lbal;
488
489 ap->ops->dev_select(ap, device);
490
491 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
492 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
493
494 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
499
500 nsect = readb((void __iomem *) ioaddr->nsect_addr);
501 lbal = readb((void __iomem *) ioaddr->lbal_addr);
502
503 if ((nsect == 0x55) && (lbal == 0xaa))
504 return 1; /* we found a device */
505
506 return 0; /* nothing found */
507}
508
509/**
510 * ata_devchk - PATA device presence detection
511 * @ap: ATA channel to examine
512 * @device: Device to examine (starting at zero)
513 *
514 * Dispatch ATA device presence detection, depending
515 * on whether we are using PIO or MMIO to talk to the
516 * ATA shadow registers.
517 *
518 * LOCKING:
519 * caller.
520 */
521
522static unsigned int ata_devchk(struct ata_port *ap,
523 unsigned int device)
524{
525 if (ap->flags & ATA_FLAG_MMIO)
526 return ata_mmio_devchk(ap, device);
527 return ata_pio_devchk(ap, device);
528}
529
530/**
531 * ata_dev_classify - determine device type based on ATA-spec signature
532 * @tf: ATA taskfile register set for device to be identified
533 *
534 * Determine from taskfile register contents whether a device is
535 * ATA or ATAPI, as per "Signature and persistence" section
536 * of ATA/PI spec (volume 1, sect 5.14).
537 *
538 * LOCKING:
539 * None.
540 *
541 * RETURNS:
542 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
543 * the event of failure.
544 */
545
057ace5e 546unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 547{
548 /* Apple's open source Darwin code hints that some devices only
549 * put a proper signature into the LBA mid/high registers,
550 * So, we only check those. It's sufficient for uniqueness.
551 */
552
553 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
554 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
555 DPRINTK("found ATA device by sig\n");
556 return ATA_DEV_ATA;
557 }
558
559 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
560 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
561 DPRINTK("found ATAPI device by sig\n");
562 return ATA_DEV_ATAPI;
563 }
564
565 DPRINTK("unknown device\n");
566 return ATA_DEV_UNKNOWN;
567}
568
569/**
570 * ata_dev_try_classify - Parse returned ATA device signature
571 * @ap: ATA channel to examine
572 * @device: Device to examine (starting at zero)
b4dc7623 573 * @r_err: Value of error register on completion
1da177e4
LT		 574 *
575 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
576 * an ATA/ATAPI-defined set of values is placed in the ATA
577 * shadow registers, indicating the results of device detection
578 * and diagnostics.
579 *
580 * Select the ATA device, and read the values from the ATA shadow
581 * registers. Then parse according to the Error register value,
582 * and the spec-defined values examined by ata_dev_classify().
583 *
584 * LOCKING:
585 * caller.
b4dc7623
TH		 586 *
587 * RETURNS:
588 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 589 */
590
b4dc7623
TH		 591static unsigned int
592ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 593{
1da177e4
LT		 594 struct ata_taskfile tf;
595 unsigned int class;
596 u8 err;
597
598 ap->ops->dev_select(ap, device);
599
600 memset(&tf, 0, sizeof(tf));
601
1da177e4 602 ap->ops->tf_read(ap, &tf);
0169e284 603 err = tf.feature;
b4dc7623
TH		 604 if (r_err)
605 *r_err = err;
1da177e4
LT		 606
607 /* see if device passed diags */
608 if (err == 1)
609 /* do nothing */ ;
610 else if ((device == 0) && (err == 0x81))
611 /* do nothing */ ;
612 else
b4dc7623 613 return ATA_DEV_NONE;
1da177e4 614
b4dc7623 615 /* determine if device is ATA or ATAPI */
1da177e4 616 class = ata_dev_classify(&tf);
b4dc7623 617
1da177e4 618 if (class == ATA_DEV_UNKNOWN)
b4dc7623 619 return ATA_DEV_NONE;
1da177e4 620 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 621 return ATA_DEV_NONE;
622 return class;
1da177e4
LT		 623}
624
625/**
6a62a04d 626 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 627 * @id: IDENTIFY DEVICE results we will examine
628 * @s: string into which data is output
629 * @ofs: offset into identify device page
630 * @len: length of string to return. must be an even number.
631 *
632 * The strings in the IDENTIFY DEVICE page are broken up into
633 * 16-bit chunks. Run through the string, and output each
634 * 8-bit chunk linearly, regardless of platform.
635 *
636 * LOCKING:
637 * caller.
638 */
639
6a62a04d
TH		 640void ata_id_string(const u16 *id, unsigned char *s,
641 unsigned int ofs, unsigned int len)
1da177e4
LT		 642{
643 unsigned int c;
644
645 while (len > 0) {
646 c = id[ofs] >> 8;
647 *s = c;
648 s++;
649
650 c = id[ofs] & 0xff;
651 *s = c;
652 s++;
653
654 ofs++;
655 len -= 2;
656 }
657}
658
0e949ff3 659/**
6a62a04d 660 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 661 * @id: IDENTIFY DEVICE results we will examine
662 * @s: string into which data is output
663 * @ofs: offset into identify device page
664 * @len: length of string to return. must be an odd number.
665 *
6a62a04d 666 * This function is identical to ata_id_string except that it
0e949ff3
TH		 667 * trims trailing spaces and terminates the resulting string with
668 * null. @len must be actual maximum length (even number) + 1.
669 *
670 * LOCKING:
671 * caller.
672 */
6a62a04d
TH		 673void ata_id_c_string(const u16 *id, unsigned char *s,
674 unsigned int ofs, unsigned int len)
0e949ff3
TH		 675{
676 unsigned char *p;
677
678 WARN_ON(!(len & 1));
679
6a62a04d 680 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 681
682 p = s + strnlen(s, len - 1);
683 while (p > s && p[-1] == ' ')
684 p--;
685 *p = '\0';
686}
0baab86b 687
2940740b
TH		 688static u64 ata_id_n_sectors(const u16 *id)
689{
690 if (ata_id_has_lba(id)) {
691 if (ata_id_has_lba48(id))
692 return ata_id_u64(id, 100);
693 else
694 return ata_id_u32(id, 60);
695 } else {
696 if (ata_id_current_chs_valid(id))
697 return ata_id_u32(id, 57);
698 else
699 return id[1] * id[3] * id[6];
700 }
701}
0baab86b
EF		 702
703/**
704 * ata_noop_dev_select - Select device 0/1 on ATA bus
705 * @ap: ATA channel to manipulate
706 * @device: ATA device (numbered from zero) to select
707 *
708 * This function performs no actual function.
709 *
710 * May be used as the dev_select() entry in ata_port_operations.
711 *
712 * LOCKING:
713 * caller.
714 */
1da177e4
LT		 715void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
716{
717}
718
0baab86b 719
1da177e4
LT		 720/**
721 * ata_std_dev_select - Select device 0/1 on ATA bus
722 * @ap: ATA channel to manipulate
723 * @device: ATA device (numbered from zero) to select
724 *
725 * Use the method defined in the ATA specification to
726 * make either device 0, or device 1, active on the
0baab86b
EF		 727 * ATA channel. Works with both PIO and MMIO.
728 *
729 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 730 *
731 * LOCKING:
732 * caller.
733 */
734
735void ata_std_dev_select (struct ata_port *ap, unsigned int device)
736{
737 u8 tmp;
738
739 if (device == 0)
740 tmp = ATA_DEVICE_OBS;
741 else
742 tmp = ATA_DEVICE_OBS | ATA_DEV1;
743
744 if (ap->flags & ATA_FLAG_MMIO) {
745 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
746 } else {
747 outb(tmp, ap->ioaddr.device_addr);
748 }
749 ata_pause(ap); /* needed; also flushes, for mmio */
750}
751
752/**
753 * ata_dev_select - Select device 0/1 on ATA bus
754 * @ap: ATA channel to manipulate
755 * @device: ATA device (numbered from zero) to select
756 * @wait: non-zero to wait for Status register BSY bit to clear
757 * @can_sleep: non-zero if context allows sleeping
758 *
759 * Use the method defined in the ATA specification to
760 * make either device 0, or device 1, active on the
761 * ATA channel.
762 *
763 * This is a high-level version of ata_std_dev_select(),
764 * which additionally provides the services of inserting
765 * the proper pauses and status polling, where needed.
766 *
767 * LOCKING:
768 * caller.
769 */
770
771void ata_dev_select(struct ata_port *ap, unsigned int device,
772 unsigned int wait, unsigned int can_sleep)
773{
774 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
775 ap->id, device, wait);
776
777 if (wait)
778 ata_wait_idle(ap);
779
780 ap->ops->dev_select(ap, device);
781
782 if (wait) {
783 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
784 msleep(150);
785 ata_wait_idle(ap);
786 }
787}
788
789/**
790 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 791 * @id: IDENTIFY DEVICE page to dump
1da177e4 792 *
0bd3300a
TH		 793 * Dump selected 16-bit words from the given IDENTIFY DEVICE
794 * page.
1da177e4
LT		 795 *
796 * LOCKING:
797 * caller.
798 */
799
0bd3300a 800static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 801{
802 DPRINTK("49==0x%04x "
803 "53==0x%04x "
804 "63==0x%04x "
805 "64==0x%04x "
806 "75==0x%04x \n",
0bd3300a
TH		 807 id[49],
808 id[53],
809 id[63],
810 id[64],
811 id[75]);
1da177e4
LT		 812 DPRINTK("80==0x%04x "
813 "81==0x%04x "
814 "82==0x%04x "
815 "83==0x%04x "
816 "84==0x%04x \n",
0bd3300a
TH		 817 id[80],
818 id[81],
819 id[82],
820 id[83],
821 id[84]);
1da177e4
LT		 822 DPRINTK("88==0x%04x "
823 "93==0x%04x\n",
0bd3300a
TH		 824 id[88],
825 id[93]);
1da177e4
LT		 826}
827
cb95d562
TH		 828/**
829 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
830 * @id: IDENTIFY data to compute xfer mask from
11e29e21 831 *
cb95d562
TH		 832 * Compute the xfermask for this device. This is not as trivial
833 * as it seems if we must consider early devices correctly.
834 *
835 * FIXME: pre IDE drive timing (do we care ?).
836 *
837 * LOCKING:
838 * None.
839 *
840 * RETURNS:
841 * Computed xfermask
11e29e21 842 */
cb95d562 843static unsigned int ata_id_xfermask(const u16 *id)
11e29e21 844{
cb95d562 845 unsigned int pio_mask, mwdma_mask, udma_mask;
11e29e21 846
ffa29456 847 /* Usual case. Word 53 indicates word 64 is valid */
cb95d562
TH		 848 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
849 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
850 pio_mask <<= 3;
851 pio_mask |= 0x7;
852 } else {
853 /* If word 64 isn't valid then Word 51 high byte holds
854 * the PIO timing number for the maximum. Turn it into
855 * a mask.
856 */
857 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
858
859 /* But wait.. there's more. Design your standards by
860 * committee and you too can get a free iordy field to
861 * process. However its the speeds not the modes that
862 * are supported... Note drivers using the timing API
863 * will get this right anyway
864 */
11e29e21
AC		 865 }
866
cb95d562 867 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 868
869 udma_mask = 0;
870 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
871 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
11e29e21 872
cb95d562 873 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
95064379
TH		 874}
875
86e45b6b
TH		 876/**
877 * ata_port_queue_task - Queue port_task
878 * @ap: The ata_port to queue port_task for
879 *
880 * Schedule @fn(@data) for execution after @delay jiffies using
881 * port_task. There is one port_task per port and it's the
882 * user(low level driver)'s responsibility to make sure that only
883 * one task is active at any given time.
884 *
885 * libata core layer takes care of synchronization between
886 * port_task and EH. ata_port_queue_task() may be ignored for EH
887 * synchronization.
888 *
889 * LOCKING:
890 * Inherited from caller.
891 */
892void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
893 unsigned long delay)
95064379 894{
86e45b6b
TH		 895 int rc;
896
2e755f68 897 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 898 return;
899
900 PREPARE_WORK(&ap->port_task, fn, data);
901
902 if (!delay)
903 rc = queue_work(ata_wq, &ap->port_task);
904 else
905 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
906
907 /* rc == 0 means that another user is using port task */
908 WARN_ON(rc == 0);
c18d06f8
TH		 909}
910
911/**
86e45b6b
TH		 912 * ata_port_flush_task - Flush port_task
913 * @ap: The ata_port to flush port_task for
c18d06f8 914 *
86e45b6b
TH		 915 * After this function completes, port_task is guranteed not to
916 * be running or scheduled.
c18d06f8
TH		 917 *
918 * LOCKING:
919 * Kernel thread context (may sleep)
920 */
86e45b6b 921void ata_port_flush_task(struct ata_port *ap)
c18d06f8 922{
c18d06f8
TH		 923 unsigned long flags;
924
925 DPRINTK("ENTER\n");
926
927 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 928 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
c18d06f8
TH		 929 spin_unlock_irqrestore(&ap->host_set->lock, flags);
930
931 DPRINTK("flush #1\n");
932 flush_workqueue(ata_wq);
933
934 /*
935 * At this point, if a task is running, it's guaranteed to see
936 * the FLUSH flag; thus, it will never queue pio tasks again.
937 * Cancel and flush.
938 */
86e45b6b 939 if (!cancel_delayed_work(&ap->port_task)) {
c18d06f8
TH		 940 DPRINTK("flush #2\n");
941 flush_workqueue(ata_wq);
942 }
943
944 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 945 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
c18d06f8
TH		 946 spin_unlock_irqrestore(&ap->host_set->lock, flags);
947
948 DPRINTK("EXIT\n");
95064379
TH		 949}
950
77853bf2 951void ata_qc_complete_internal(struct ata_queued_cmd *qc)
64f043d8 952{
77853bf2 953 struct completion *waiting = qc->private_data;
64f043d8 954
77853bf2 955 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 956 complete(waiting);
a2a7a662
TH		 957}
958
959/**
960 * ata_exec_internal - execute libata internal command
961 * @ap: Port to which the command is sent
962 * @dev: Device to which the command is sent
963 * @tf: Taskfile registers for the command and the result
964 * @dma_dir: Data tranfer direction of the command
965 * @buf: Data buffer of the command
966 * @buflen: Length of data buffer
967 *
968 * Executes libata internal command with timeout. @tf contains
969 * command on entry and result on return. Timeout and error
970 * conditions are reported via return value. No recovery action
971 * is taken after a command times out. It's caller's duty to
972 * clean up after timeout.
973 *
974 * LOCKING:
975 * None. Should be called with kernel context, might sleep.
976 */
977
978static unsigned
979ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
980 struct ata_taskfile *tf,
981 int dma_dir, void *buf, unsigned int buflen)
982{
983 u8 command = tf->command;
984 struct ata_queued_cmd *qc;
985 DECLARE_COMPLETION(wait);
986 unsigned long flags;
77853bf2 987 unsigned int err_mask;
a2a7a662
TH		 988
989 spin_lock_irqsave(&ap->host_set->lock, flags);
990
991 qc = ata_qc_new_init(ap, dev);
992 BUG_ON(qc == NULL);
993
994 qc->tf = *tf;
995 qc->dma_dir = dma_dir;
996 if (dma_dir != DMA_NONE) {
997 ata_sg_init_one(qc, buf, buflen);
998 qc->nsect = buflen / ATA_SECT_SIZE;
999 }
1000
77853bf2 1001 qc->private_data = &wait;
a2a7a662
TH		 1002 qc->complete_fn = ata_qc_complete_internal;
1003
8e0e694a 1004 ata_qc_issue(qc);
a2a7a662
TH		 1005
1006 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1007
1008 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1009 ata_port_flush_task(ap);
1010
a2a7a662
TH		 1011 spin_lock_irqsave(&ap->host_set->lock, flags);
1012
1013 /* We're racing with irq here. If we lose, the
1014 * following test prevents us from completing the qc
1015 * again. If completion irq occurs after here but
1016 * before the caller cleans up, it will result in a
1017 * spurious interrupt. We can live with that.
1018 */
77853bf2 1019 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1020 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1021 ata_qc_complete(qc);
1022 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1023 ap->id, command);
64f043d8
JG		 1024 }
1025
a2a7a662 1026 spin_unlock_irqrestore(&ap->host_set->lock, flags);
64f043d8
JG		 1027 }
1028
77853bf2
TH		 1029 *tf = qc->tf;
1030 err_mask = qc->err_mask;
1031
1032 ata_qc_free(qc);
1033
1f7dd3e9
TH		 1034 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1035 * Until those drivers are fixed, we detect the condition
1036 * here, fail the command with AC_ERR_SYSTEM and reenable the
1037 * port.
1038 *
1039 * Note that this doesn't change any behavior as internal
1040 * command failure results in disabling the device in the
1041 * higher layer for LLDDs without new reset/EH callbacks.
1042 *
1043 * Kill the following code as soon as those drivers are fixed.
1044 */
1045 if (ap->flags & ATA_FLAG_PORT_DISABLED) {
1046 err_mask |= AC_ERR_SYSTEM;
1047 ata_port_probe(ap);
1048 }
1049
77853bf2 1050 return err_mask;
64f043d8
JG		 1051}
1052
1bc4ccff
AC		 1053/**
1054 * ata_pio_need_iordy - check if iordy needed
1055 * @adev: ATA device
1056 *
1057 * Check if the current speed of the device requires IORDY. Used
1058 * by various controllers for chip configuration.
1059 */
1060
1061unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1062{
1063 int pio;
1064 int speed = adev->pio_mode - XFER_PIO_0;
1065
1066 if (speed < 2)
1067 return 0;
1068 if (speed > 2)
1069 return 1;
2e9edbf8 1070
1bc4ccff
AC		 1071 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1072
1073 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1074 pio = adev->id[ATA_ID_EIDE_PIO];
1075 /* Is the speed faster than the drive allows non IORDY ? */
1076 if (pio) {
1077 /* This is cycle times not frequency - watch the logic! */
1078 if (pio > 240) /* PIO2 is 240nS per cycle */
1079 return 1;
1080 return 0;
1081 }
1082 }
1083 return 0;
1084}
1085
1da177e4 1086/**
49016aca
TH		 1087 * ata_dev_read_id - Read ID data from the specified device
1088 * @ap: port on which target device resides
1089 * @dev: target device
1090 * @p_class: pointer to class of the target device (may be changed)
1091 * @post_reset: is this read ID post-reset?
d9572b1d 1092 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1093 *
49016aca
TH		 1094 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1095 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1096 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1097 * for pre-ATA4 drives.
1da177e4
LT		 1098 *
1099 * LOCKING:
49016aca
TH		 1100 * Kernel thread context (may sleep)
1101 *
1102 * RETURNS:
1103 * 0 on success, -errno otherwise.
1da177e4 1104 */
49016aca 1105static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1106 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1107{
49016aca 1108 unsigned int class = *p_class;
a0123703 1109 struct ata_taskfile tf;
49016aca 1110 unsigned int err_mask = 0;
d9572b1d 1111 u16 *id;
49016aca
TH		 1112 const char *reason;
1113 int rc;
1da177e4 1114
49016aca 1115 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1116
49016aca 1117 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1118
d9572b1d
TH		 1119 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1120 if (id == NULL) {
1121 rc = -ENOMEM;
1122 reason = "out of memory";
1123 goto err_out;
1124 }
1125
49016aca
TH		 1126 retry:
1127 ata_tf_init(ap, &tf, dev->devno);
a0123703 1128
49016aca
TH		 1129 switch (class) {
1130 case ATA_DEV_ATA:
a0123703 1131 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1132 break;
1133 case ATA_DEV_ATAPI:
a0123703 1134 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1135 break;
1136 default:
1137 rc = -ENODEV;
1138 reason = "unsupported class";
1139 goto err_out;
1da177e4
LT		 1140 }
1141
a0123703 1142 tf.protocol = ATA_PROT_PIO;
1da177e4 1143
a0123703 1144 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1145 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1146 if (err_mask) {
49016aca
TH		 1147 rc = -EIO;
1148 reason = "I/O error";
1da177e4
LT		 1149 goto err_out;
1150 }
1151
49016aca 1152 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1153
49016aca 1154 /* sanity check */
692785e7 1155 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1156 rc = -EINVAL;
1157 reason = "device reports illegal type";
1158 goto err_out;
1159 }
1160
1161 if (post_reset && class == ATA_DEV_ATA) {
1162 /*
1163 * The exact sequence expected by certain pre-ATA4 drives is:
1164 * SRST RESET
1165 * IDENTIFY
1166 * INITIALIZE DEVICE PARAMETERS
1167 * anything else..
1168 * Some drives were very specific about that exact sequence.
1169 */
1170 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1171 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1172 if (err_mask) {
1173 rc = -EIO;
1174 reason = "INIT_DEV_PARAMS failed";
1175 goto err_out;
1176 }
1177
1178 /* current CHS translation info (id[53-58]) might be
1179 * changed. reread the identify device info.
1180 */
1181 post_reset = 0;
1182 goto retry;
1183 }
1184 }
1185
1186 *p_class = class;
d9572b1d 1187 *p_id = id;
49016aca
TH		 1188 return 0;
1189
1190 err_out:
1191 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1192 ap->id, dev->devno, reason);
d9572b1d 1193 kfree(id);
49016aca
TH		 1194 return rc;
1195}
1196
4b2f3ede
TH		 1197static inline u8 ata_dev_knobble(const struct ata_port *ap,
1198 struct ata_device *dev)
1199{
1200 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1201}
1202
49016aca 1203/**
ffeae418
TH		 1204 * ata_dev_configure - Configure the specified ATA/ATAPI device
1205 * @ap: Port on which target device resides
1206 * @dev: Target device to configure
4c2d721a 1207 * @print_info: Enable device info printout
ffeae418
TH		 1208 *
1209 * Configure @dev according to @dev->id. Generic and low-level
1210 * driver specific fixups are also applied.
49016aca
TH		 1211 *
1212 * LOCKING:
ffeae418
TH		 1213 * Kernel thread context (may sleep)
1214 *
1215 * RETURNS:
1216 * 0 on success, -errno otherwise
49016aca 1217 */
4c2d721a
TH		 1218static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1219 int print_info)
49016aca 1220{
1148c3a7 1221 const u16 *id = dev->id;
ff8854b2 1222 unsigned int xfer_mask;
49016aca
TH		 1223 int i, rc;
1224
e1211e3f 1225 if (!ata_dev_enabled(dev)) {
49016aca 1226 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1227 ap->id, dev->devno);
1228 return 0;
49016aca
TH		 1229 }
1230
ffeae418 1231 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
49016aca 1232
c39f5ebe
TH		 1233 /* print device capabilities */
1234 if (print_info)
1235 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1236 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1237 ap->id, dev->devno, id[49], id[82], id[83],
1238 id[84], id[85], id[86], id[87], id[88]);
1239
208a9933
TH		 1240 /* initialize to-be-configured parameters */
1241 dev->flags = 0;
1242 dev->max_sectors = 0;
1243 dev->cdb_len = 0;
1244 dev->n_sectors = 0;
1245 dev->cylinders = 0;
1246 dev->heads = 0;
1247 dev->sectors = 0;
1da177e4
LT		 1248
1249 /*
1250 * common ATA, ATAPI feature tests
1251 */
1252
ff8854b2 1253 /* find max transfer mode; for printk only */
1148c3a7 1254 xfer_mask = ata_id_xfermask(id);
1da177e4 1255
1148c3a7 1256 ata_dump_id(id);
1da177e4
LT		 1257
1258 /* ATA-specific feature tests */
1259 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1260 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1261
1148c3a7 1262 if (ata_id_has_lba(id)) {
4c2d721a 1263 const char *lba_desc;
8bf62ece 1264
4c2d721a
TH		 1265 lba_desc = "LBA";
1266 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1267 if (ata_id_has_lba48(id)) {
8bf62ece 1268 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1269 lba_desc = "LBA48";
1270 }
8bf62ece
AL		 1271
1272 /* print device info to dmesg */
4c2d721a
TH		 1273 if (print_info)
1274 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1275 "max %s, %Lu sectors: %s\n",
1276 ap->id, dev->devno,
1148c3a7 1277 ata_id_major_version(id),
ff8854b2 1278 ata_mode_string(xfer_mask),
4c2d721a
TH		 1279 (unsigned long long)dev->n_sectors,
1280 lba_desc);
ffeae418 1281 } else {
8bf62ece
AL		 1282 /* CHS */
1283
1284 /* Default translation */
1148c3a7
TH		 1285 dev->cylinders = id[1];
1286 dev->heads = id[3];
1287 dev->sectors = id[6];
8bf62ece 1288
1148c3a7 1289 if (ata_id_current_chs_valid(id)) {
8bf62ece 1290 /* Current CHS translation is valid. */
1148c3a7
TH		 1291 dev->cylinders = id[54];
1292 dev->heads = id[55];
1293 dev->sectors = id[56];
8bf62ece
AL		 1294 }
1295
1296 /* print device info to dmesg */
4c2d721a
TH		 1297 if (print_info)
1298 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1299 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1300 ap->id, dev->devno,
1148c3a7 1301 ata_id_major_version(id),
ff8854b2 1302 ata_mode_string(xfer_mask),
4c2d721a
TH		 1303 (unsigned long long)dev->n_sectors,
1304 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1305 }
1306
07f6f7d0
AL		 1307 if (dev->id[59] & 0x100) {
1308 dev->multi_count = dev->id[59] & 0xff;
1309 DPRINTK("ata%u: dev %u multi count %u\n",
999bb6f4 1310 ap->id, dev->devno, dev->multi_count);
07f6f7d0
AL		 1311 }
1312
13ee4628 1313 dev->cdb_len = 16;
1da177e4
LT		 1314 }
1315
1316 /* ATAPI-specific feature tests */
2c13b7ce 1317 else if (dev->class == ATA_DEV_ATAPI) {
08a556db
AL		 1318 char *cdb_intr_string = "";
1319
1148c3a7 1320 rc = atapi_cdb_len(id);
1da177e4
LT		 1321 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1322 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1323 rc = -EINVAL;
1da177e4
LT		 1324 goto err_out_nosup;
1325 }
6e7846e9 1326 dev->cdb_len = (unsigned int) rc;
1da177e4 1327
08a556db 1328 if (ata_id_cdb_intr(dev->id)) {
312f7da2 1329 dev->flags |= ATA_DFLAG_CDB_INTR;
08a556db
AL		 1330 cdb_intr_string = ", CDB intr";
1331 }
312f7da2 1332
1da177e4 1333 /* print device info to dmesg */
4c2d721a 1334 if (print_info)
08a556db
AL		 1335 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s%s\n",
1336 ap->id, dev->devno, ata_mode_string(xfer_mask),
1337 cdb_intr_string);
1da177e4
LT		 1338 }
1339
6e7846e9
TH		 1340 ap->host->max_cmd_len = 0;
1341 for (i = 0; i < ATA_MAX_DEVICES; i++)
1342 ap->host->max_cmd_len = max_t(unsigned int,
1343 ap->host->max_cmd_len,
1344 ap->device[i].cdb_len);
1345
6f2f3812 1346 /* limit bridge transfers to udma5, 200 sectors */
4b2f3ede 1347 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1348 if (print_info)
1349 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1350 ap->id, dev->devno);
5a529139 1351 dev->udma_mask &= ATA_UDMA5;
4b2f3ede 1352 dev->max_sectors = ATA_MAX_SECTORS;
6f2f3812
BC		 1353 }
1354
1355 if (ap->ops->dev_config)
4b2f3ede
TH		 1356 ap->ops->dev_config(ap, dev);
1357
1da177e4 1358 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1359 return 0;
1da177e4
LT		 1360
1361err_out_nosup:
1da177e4 1362 DPRINTK("EXIT, err\n");
ffeae418 1363 return rc;
6f2f3812
BC		 1364}
1365
1da177e4
LT		 1366/**
1367 * ata_bus_probe - Reset and probe ATA bus
1368 * @ap: Bus to probe
1369 *
0cba632b
JG		 1370 * Master ATA bus probing function. Initiates a hardware-dependent
1371 * bus reset, then attempts to identify any devices found on
1372 * the bus.
1373 *
1da177e4 1374 * LOCKING:
0cba632b 1375 * PCI/etc. bus probe sem.
1da177e4
LT		 1376 *
1377 * RETURNS:
96072e69 1378 * Zero on success, negative errno otherwise.
1da177e4
LT		 1379 */
1380
1381static int ata_bus_probe(struct ata_port *ap)
1382{
28ca5c57 1383 unsigned int classes[ATA_MAX_DEVICES];
96072e69 1384 int i, rc, found = 0;
e82cbdb9 1385 struct ata_device *dev;
1da177e4 1386
28ca5c57 1387 ata_port_probe(ap);
c19ba8af 1388
2044470c
TH		 1389 /* reset and determine device classes */
1390 for (i = 0; i < ATA_MAX_DEVICES; i++)
1391 classes[i] = ATA_DEV_UNKNOWN;
c19ba8af 1392
2044470c 1393 if (ap->ops->probe_reset) {
c19ba8af 1394 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1395 if (rc) {
1396 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1397 return rc;
c19ba8af 1398 }
28ca5c57 1399 } else {
c19ba8af
TH		 1400 ap->ops->phy_reset(ap);
1401
2044470c
TH		 1402 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1403 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1404 classes[i] = ap->device[i].class;
2044470c 1405
28ca5c57
TH		 1406 ata_port_probe(ap);
1407 }
1da177e4 1408
2044470c
TH		 1409 for (i = 0; i < ATA_MAX_DEVICES; i++)
1410 if (classes[i] == ATA_DEV_UNKNOWN)
1411 classes[i] = ATA_DEV_NONE;
1412
28ca5c57 1413 /* read IDENTIFY page and configure devices */
1da177e4 1414 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1415 dev = &ap->device[i];
28ca5c57
TH		 1416 dev->class = classes[i];
1417
e1211e3f 1418 if (!ata_dev_enabled(dev))
ffeae418
TH		 1419 continue;
1420
1421 WARN_ON(dev->id != NULL);
1422 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1423 dev->class = ATA_DEV_NONE;
1424 continue;
1425 }
1426
4c2d721a 1427 if (ata_dev_configure(ap, dev, 1)) {
fcef978f 1428 ata_dev_disable(ap, dev);
ffeae418 1429 continue;
1da177e4 1430 }
ffeae418 1431
ffeae418 1432 found = 1;
1da177e4
LT		 1433 }
1434
e82cbdb9
TH		 1435 /* configure transfer mode */
1436 if (ap->ops->set_mode) {
1437 /* FIXME: make ->set_mode handle no device case and
1438 * return error code and failing device on failure as
1439 * ata_set_mode() does.
1440 */
1441 if (found)
1442 ap->ops->set_mode(ap);
1443 rc = 0;
1444 } else {
1445 while (ata_set_mode(ap, &dev))
1446 ata_dev_disable(ap, dev);
1447 }
1da177e4 1448
e82cbdb9
TH		 1449 for (i = 0; i < ATA_MAX_DEVICES; i++)
1450 if (ata_dev_enabled(&ap->device[i]))
1451 return 0;
1da177e4 1452
e82cbdb9
TH		 1453 /* no device present, disable port */
1454 ata_port_disable(ap);
1da177e4 1455 ap->ops->port_disable(ap);
96072e69 1456 return -ENODEV;
1da177e4
LT		 1457}
1458
1459/**
0cba632b
JG		 1460 * ata_port_probe - Mark port as enabled
1461 * @ap: Port for which we indicate enablement
1da177e4 1462 *
0cba632b
JG		 1463 * Modify @ap data structure such that the system
1464 * thinks that the entire port is enabled.
1465 *
1466 * LOCKING: host_set lock, or some other form of
1467 * serialization.
1da177e4
LT		 1468 */
1469
1470void ata_port_probe(struct ata_port *ap)
1471{
1472 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1473}
1474
3be680b7
TH		 1475/**
1476 * sata_print_link_status - Print SATA link status
1477 * @ap: SATA port to printk link status about
1478 *
1479 * This function prints link speed and status of a SATA link.
1480 *
1481 * LOCKING:
1482 * None.
1483 */
1484static void sata_print_link_status(struct ata_port *ap)
1485{
1486 u32 sstatus, tmp;
3be680b7
TH		 1487
1488 if (!ap->ops->scr_read)
1489 return;
1490
1491 sstatus = scr_read(ap, SCR_STATUS);
1492
1493 if (sata_dev_present(ap)) {
1494 tmp = (sstatus >> 4) & 0xf;
4c360c81
TH		 1495 printk(KERN_INFO "ata%u: SATA link up %s (SStatus %X)\n",
1496 ap->id, sata_spd_string(tmp), sstatus);
3be680b7
TH		 1497 } else {
1498 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1499 ap->id, sstatus);
1500 }
1501}
1502
1da177e4 1503/**
780a87f7
JG		 1504 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1505 * @ap: SATA port associated with target SATA PHY.
1da177e4 1506 *
780a87f7
JG		 1507 * This function issues commands to standard SATA Sxxx
1508 * PHY registers, to wake up the phy (and device), and
1509 * clear any reset condition.
1da177e4
LT		 1510 *
1511 * LOCKING:
0cba632b 1512 * PCI/etc. bus probe sem.
1da177e4
LT		 1513 *
1514 */
1515void __sata_phy_reset(struct ata_port *ap)
1516{
1517 u32 sstatus;
1518 unsigned long timeout = jiffies + (HZ * 5);
1519
1520 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1521 /* issue phy wake/reset */
1522 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1523 /* Couldn't find anything in SATA I/II specs, but
1524 * AHCI-1.1 10.4.2 says at least 1 ms. */
1525 mdelay(1);
1da177e4 1526 }
cdcca89e 1527 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1528
1529 /* wait for phy to become ready, if necessary */
1530 do {
1531 msleep(200);
1532 sstatus = scr_read(ap, SCR_STATUS);
1533 if ((sstatus & 0xf) != 1)
1534 break;
1535 } while (time_before(jiffies, timeout));
1536
3be680b7
TH		 1537 /* print link status */
1538 sata_print_link_status(ap);
656563e3 1539
3be680b7
TH		 1540 /* TODO: phy layer with polling, timeouts, etc. */
1541 if (sata_dev_present(ap))
1da177e4 1542 ata_port_probe(ap);
3be680b7 1543 else
1da177e4 1544 ata_port_disable(ap);
1da177e4
LT		 1545
1546 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1547 return;
1548
1549 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1550 ata_port_disable(ap);
1551 return;
1552 }
1553
1554 ap->cbl = ATA_CBL_SATA;
1555}
1556
1557/**
780a87f7
JG		 1558 * sata_phy_reset - Reset SATA bus.
1559 * @ap: SATA port associated with target SATA PHY.
1da177e4 1560 *
780a87f7
JG		 1561 * This function resets the SATA bus, and then probes
1562 * the bus for devices.
1da177e4
LT		 1563 *
1564 * LOCKING:
0cba632b 1565 * PCI/etc. bus probe sem.
1da177e4
LT		 1566 *
1567 */
1568void sata_phy_reset(struct ata_port *ap)
1569{
1570 __sata_phy_reset(ap);
1571 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1572 return;
1573 ata_bus_reset(ap);
1574}
1575
ebdfca6e
AC		 1576/**
1577 * ata_dev_pair - return other device on cable
1578 * @ap: port
1579 * @adev: device
1580 *
1581 * Obtain the other device on the same cable, or if none is
1582 * present NULL is returned
1583 */
2e9edbf8 1584
ebdfca6e
AC		 1585struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1586{
1587 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1588 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1589 return NULL;
1590 return pair;
1591}
1592
1da177e4 1593/**
780a87f7
JG		 1594 * ata_port_disable - Disable port.
1595 * @ap: Port to be disabled.
1da177e4 1596 *
780a87f7
JG		 1597 * Modify @ap data structure such that the system
1598 * thinks that the entire port is disabled, and should
1599 * never attempt to probe or communicate with devices
1600 * on this port.
1601 *
1602 * LOCKING: host_set lock, or some other form of
1603 * serialization.
1da177e4
LT		 1604 */
1605
1606void ata_port_disable(struct ata_port *ap)
1607{
1608 ap->device[0].class = ATA_DEV_NONE;
1609 ap->device[1].class = ATA_DEV_NONE;
1610 ap->flags |= ATA_FLAG_PORT_DISABLED;
1611}
1612
452503f9
AC		 1613/*
1614 * This mode timing computation functionality is ported over from
1615 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1616 */
1617/*
1618 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1619 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1620 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1621 * is currently supported only by Maxtor drives.
452503f9
AC		 1622 */
1623
1624static const struct ata_timing ata_timing[] = {
1625
1626 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1627 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1628 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1629 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1630
1631 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1632 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1633 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1634
1635/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1636
452503f9
AC		 1637 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1638 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1639 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1640
452503f9
AC		 1641 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1642 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1643 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1644
1645/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1646 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1647 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1648
1649 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1650 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1651 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1652
1653/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1654
1655 { 0xFF }
1656};
1657
1658#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1659#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1660
1661static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1662{
1663 q->setup = EZ(t->setup * 1000, T);
1664 q->act8b = EZ(t->act8b * 1000, T);
1665 q->rec8b = EZ(t->rec8b * 1000, T);
1666 q->cyc8b = EZ(t->cyc8b * 1000, T);
1667 q->active = EZ(t->active * 1000, T);
1668 q->recover = EZ(t->recover * 1000, T);
1669 q->cycle = EZ(t->cycle * 1000, T);
1670 q->udma = EZ(t->udma * 1000, UT);
1671}
1672
1673void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1674 struct ata_timing *m, unsigned int what)
1675{
1676 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1677 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1678 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1679 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1680 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1681 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1682 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1683 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1684}
1685
1686static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1687{
1688 const struct ata_timing *t;
1689
1690 for (t = ata_timing; t->mode != speed; t++)
91190758 1691 if (t->mode == 0xFF)
452503f9 1692 return NULL;
2e9edbf8 1693 return t;
452503f9
AC		 1694}
1695
1696int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1697 struct ata_timing *t, int T, int UT)
1698{
1699 const struct ata_timing *s;
1700 struct ata_timing p;
1701
1702 /*
2e9edbf8 1703 * Find the mode.
75b1f2f8 1704 */
452503f9
AC		 1705
1706 if (!(s = ata_timing_find_mode(speed)))
1707 return -EINVAL;
1708
75b1f2f8
AL		 1709 memcpy(t, s, sizeof(*s));
1710
452503f9
AC		 1711 /*
1712 * If the drive is an EIDE drive, it can tell us it needs extended
1713 * PIO/MW_DMA cycle timing.
1714 */
1715
1716 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1717 memset(&p, 0, sizeof(p));
1718 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1719 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1720 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1721 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1722 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1723 }
1724 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1725 }
1726
1727 /*
1728 * Convert the timing to bus clock counts.
1729 */
1730
75b1f2f8 1731 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1732
1733 /*
c893a3ae
RD		 1734 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1735 * S.M.A.R.T * and some other commands. We have to ensure that the
1736 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1737 */
1738
1739 if (speed > XFER_PIO_4) {
1740 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1741 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1742 }
1743
1744 /*
c893a3ae 1745 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1746 */
1747
1748 if (t->act8b + t->rec8b < t->cyc8b) {
1749 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1750 t->rec8b = t->cyc8b - t->act8b;
1751 }
1752
1753 if (t->active + t->recover < t->cycle) {
1754 t->active += (t->cycle - (t->active + t->recover)) / 2;
1755 t->recover = t->cycle - t->active;
1756 }
1757
1758 return 0;
1759}
1760
83206a29 1761static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1762{
83206a29
TH		 1763 unsigned int err_mask;
1764 int rc;
1da177e4
LT		 1765
1766 if (dev->xfer_shift == ATA_SHIFT_PIO)
1767 dev->flags |= ATA_DFLAG_PIO;
1768
83206a29
TH		 1769 err_mask = ata_dev_set_xfermode(ap, dev);
1770 if (err_mask) {
1771 printk(KERN_ERR
1772 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1773 ap->id, err_mask);
1774 return -EIO;
1775 }
1da177e4 1776
83206a29
TH		 1777 rc = ata_dev_revalidate(ap, dev, 0);
1778 if (rc) {
1779 printk(KERN_ERR
1780 "ata%u: failed to revalidate after set xfermode\n",
1781 ap->id);
1782 return rc;
48a8a14f 1783 }
1da177e4 1784
23e71c3d
TH		 1785 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1786 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1787
1788 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1789 ap->id, dev->devno,
1790 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1791 return 0;
1da177e4
LT		 1792}
1793
1da177e4
LT		 1794/**
1795 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1796 * @ap: port on which timings will be programmed
e82cbdb9 1797 * @r_failed_dev: out paramter for failed device
1da177e4 1798 *
e82cbdb9
TH		 1799 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1800 * ata_set_mode() fails, pointer to the failing device is
1801 * returned in @r_failed_dev.
780a87f7 1802 *
1da177e4 1803 * LOCKING:
0cba632b 1804 * PCI/etc. bus probe sem.
e82cbdb9
TH		 1805 *
1806 * RETURNS:
1807 * 0 on success, negative errno otherwise
1da177e4 1808 */
e82cbdb9 1809static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 1810{
e8e0619f 1811 struct ata_device *dev;
e82cbdb9 1812 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 1813
a6d5a51c
TH		 1814 /* step 1: calculate xfer_mask */
1815 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 1816 unsigned int pio_mask, dma_mask;
a6d5a51c 1817
e8e0619f
TH		 1818 dev = &ap->device[i];
1819
e1211e3f 1820 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 1821 continue;
1822
acf356b1 1823 ata_dev_xfermask(ap, dev);
1da177e4 1824
acf356b1
TH		 1825 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1826 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1827 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1828 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 1829
4f65977d 1830 found = 1;
5444a6f4
AC		 1831 if (dev->dma_mode)
1832 used_dma = 1;
a6d5a51c 1833 }
4f65977d 1834 if (!found)
e82cbdb9 1835 goto out;
a6d5a51c
TH		 1836
1837 /* step 2: always set host PIO timings */
e8e0619f
TH		 1838 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1839 dev = &ap->device[i];
1840 if (!ata_dev_enabled(dev))
1841 continue;
1842
1843 if (!dev->pio_mode) {
1844 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
1845 ap->id, dev->devno);
1846 rc = -EINVAL;
e82cbdb9 1847 goto out;
e8e0619f
TH		 1848 }
1849
1850 dev->xfer_mode = dev->pio_mode;
1851 dev->xfer_shift = ATA_SHIFT_PIO;
1852 if (ap->ops->set_piomode)
1853 ap->ops->set_piomode(ap, dev);
1854 }
1da177e4 1855
a6d5a51c 1856 /* step 3: set host DMA timings */
e8e0619f
TH		 1857 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1858 dev = &ap->device[i];
1859
1860 if (!ata_dev_enabled(dev) || !dev->dma_mode)
1861 continue;
1862
1863 dev->xfer_mode = dev->dma_mode;
1864 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1865 if (ap->ops->set_dmamode)
1866 ap->ops->set_dmamode(ap, dev);
1867 }
1da177e4
LT		 1868
1869 /* step 4: update devices' xfer mode */
83206a29 1870 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 1871 dev = &ap->device[i];
1da177e4 1872
e1211e3f 1873 if (!ata_dev_enabled(dev))
83206a29
TH		 1874 continue;
1875
5bbc53f4
TH		 1876 rc = ata_dev_set_mode(ap, dev);
1877 if (rc)
e82cbdb9 1878 goto out;
83206a29 1879 }
1da177e4 1880
e8e0619f
TH		 1881 /* Record simplex status. If we selected DMA then the other
1882 * host channels are not permitted to do so.
5444a6f4 1883 */
5444a6f4
AC		 1884 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
1885 ap->host_set->simplex_claimed = 1;
1886
e8e0619f 1887 /* step5: chip specific finalisation */
1da177e4
LT		 1888 if (ap->ops->post_set_mode)
1889 ap->ops->post_set_mode(ap);
1890
e82cbdb9
TH		 1891 out:
1892 if (rc)
1893 *r_failed_dev = dev;
1894 return rc;
1da177e4
LT		 1895}
1896
1fdffbce
JG		 1897/**
1898 * ata_tf_to_host - issue ATA taskfile to host controller
1899 * @ap: port to which command is being issued
1900 * @tf: ATA taskfile register set
1901 *
1902 * Issues ATA taskfile register set to ATA host controller,
1903 * with proper synchronization with interrupt handler and
1904 * other threads.
1905 *
1906 * LOCKING:
1907 * spin_lock_irqsave(host_set lock)
1908 */
1909
1910static inline void ata_tf_to_host(struct ata_port *ap,
1911 const struct ata_taskfile *tf)
1912{
1913 ap->ops->tf_load(ap, tf);
1914 ap->ops->exec_command(ap, tf);
1915}
1916
1da177e4
LT		 1917/**
1918 * ata_busy_sleep - sleep until BSY clears, or timeout
1919 * @ap: port containing status register to be polled
1920 * @tmout_pat: impatience timeout
1921 * @tmout: overall timeout
1922 *
780a87f7
JG		 1923 * Sleep until ATA Status register bit BSY clears,
1924 * or a timeout occurs.
1925 *
1926 * LOCKING: None.
1da177e4
LT		 1927 */
1928
6f8b9958
TH		 1929unsigned int ata_busy_sleep (struct ata_port *ap,
1930 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1931{
1932 unsigned long timer_start, timeout;
1933 u8 status;
1934
1935 status = ata_busy_wait(ap, ATA_BUSY, 300);
1936 timer_start = jiffies;
1937 timeout = timer_start + tmout_pat;
1938 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1939 msleep(50);
1940 status = ata_busy_wait(ap, ATA_BUSY, 3);
1941 }
1942
1943 if (status & ATA_BUSY)
1944 printk(KERN_WARNING "ata%u is slow to respond, "
1945 "please be patient\n", ap->id);
1946
1947 timeout = timer_start + tmout;
1948 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1949 msleep(50);
1950 status = ata_chk_status(ap);
1951 }
1952
1953 if (status & ATA_BUSY) {
1954 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1955 ap->id, tmout / HZ);
1956 return 1;
1957 }
1958
1959 return 0;
1960}
1961
1962static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1963{
1964 struct ata_ioports *ioaddr = &ap->ioaddr;
1965 unsigned int dev0 = devmask & (1 << 0);
1966 unsigned int dev1 = devmask & (1 << 1);
1967 unsigned long timeout;
1968
1969 /* if device 0 was found in ata_devchk, wait for its
1970 * BSY bit to clear
1971 */
1972 if (dev0)
1973 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1974
1975 /* if device 1 was found in ata_devchk, wait for
1976 * register access, then wait for BSY to clear
1977 */
1978 timeout = jiffies + ATA_TMOUT_BOOT;
1979 while (dev1) {
1980 u8 nsect, lbal;
1981
1982 ap->ops->dev_select(ap, 1);
1983 if (ap->flags & ATA_FLAG_MMIO) {
1984 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1985 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1986 } else {
1987 nsect = inb(ioaddr->nsect_addr);
1988 lbal = inb(ioaddr->lbal_addr);
1989 }
1990 if ((nsect == 1) && (lbal == 1))
1991 break;
1992 if (time_after(jiffies, timeout)) {
1993 dev1 = 0;
1994 break;
1995 }
1996 msleep(50); /* give drive a breather */
1997 }
1998 if (dev1)
1999 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2000
2001 /* is all this really necessary? */
2002 ap->ops->dev_select(ap, 0);
2003 if (dev1)
2004 ap->ops->dev_select(ap, 1);
2005 if (dev0)
2006 ap->ops->dev_select(ap, 0);
2007}
2008
1da177e4
LT		 2009static unsigned int ata_bus_softreset(struct ata_port *ap,
2010 unsigned int devmask)
2011{
2012 struct ata_ioports *ioaddr = &ap->ioaddr;
2013
2014 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2015
2016 /* software reset. causes dev0 to be selected */
2017 if (ap->flags & ATA_FLAG_MMIO) {
2018 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2019 udelay(20); /* FIXME: flush */
2020 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2021 udelay(20); /* FIXME: flush */
2022 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2023 } else {
2024 outb(ap->ctl, ioaddr->ctl_addr);
2025 udelay(10);
2026 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2027 udelay(10);
2028 outb(ap->ctl, ioaddr->ctl_addr);
2029 }
2030
2031 /* spec mandates ">= 2ms" before checking status.
2032 * We wait 150ms, because that was the magic delay used for
2033 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2034 * between when the ATA command register is written, and then
2035 * status is checked. Because waiting for "a while" before
2036 * checking status is fine, post SRST, we perform this magic
2037 * delay here as well.
09c7ad79
AC		 2038 *
2039 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2040 */
2041 msleep(150);
2042
2e9edbf8 2043 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2044 * the bus shows 0xFF because the odd clown forgets the D7
2045 * pulldown resistor.
2046 */
09c7ad79 2047 if (ata_check_status(ap) == 0xFF)
298a41ca 2048 return AC_ERR_OTHER;
09c7ad79 2049
1da177e4
LT		 2050 ata_bus_post_reset(ap, devmask);
2051
2052 return 0;
2053}
2054
2055/**
2056 * ata_bus_reset - reset host port and associated ATA channel
2057 * @ap: port to reset
2058 *
2059 * This is typically the first time we actually start issuing
2060 * commands to the ATA channel. We wait for BSY to clear, then
2061 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2062 * result. Determine what devices, if any, are on the channel
2063 * by looking at the device 0/1 error register. Look at the signature
2064 * stored in each device's taskfile registers, to determine if
2065 * the device is ATA or ATAPI.
2066 *
2067 * LOCKING:
0cba632b
JG		 2068 * PCI/etc. bus probe sem.
2069 * Obtains host_set lock.
1da177e4
LT		 2070 *
2071 * SIDE EFFECTS:
2072 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2073 */
2074
2075void ata_bus_reset(struct ata_port *ap)
2076{
2077 struct ata_ioports *ioaddr = &ap->ioaddr;
2078 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2079 u8 err;
aec5c3c1 2080 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2081
2082 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2083
2084 /* determine if device 0/1 are present */
2085 if (ap->flags & ATA_FLAG_SATA_RESET)
2086 dev0 = 1;
2087 else {
2088 dev0 = ata_devchk(ap, 0);
2089 if (slave_possible)
2090 dev1 = ata_devchk(ap, 1);
2091 }
2092
2093 if (dev0)
2094 devmask |= (1 << 0);
2095 if (dev1)
2096 devmask |= (1 << 1);
2097
2098 /* select device 0 again */
2099 ap->ops->dev_select(ap, 0);
2100
2101 /* issue bus reset */
2102 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2103 if (ata_bus_softreset(ap, devmask))
2104 goto err_out;
1da177e4
LT		 2105
2106 /*
2107 * determine by signature whether we have ATA or ATAPI devices
2108 */
b4dc7623 2109 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2110 if ((slave_possible) && (err != 0x81))
b4dc7623 2111 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2112
2113 /* re-enable interrupts */
2114 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2115 ata_irq_on(ap);
2116
2117 /* is double-select really necessary? */
2118 if (ap->device[1].class != ATA_DEV_NONE)
2119 ap->ops->dev_select(ap, 1);
2120 if (ap->device[0].class != ATA_DEV_NONE)
2121 ap->ops->dev_select(ap, 0);
2122
2123 /* if no devices were detected, disable this port */
2124 if ((ap->device[0].class == ATA_DEV_NONE) &&
2125 (ap->device[1].class == ATA_DEV_NONE))
2126 goto err_out;
2127
2128 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2129 /* set up device control for ATA_FLAG_SATA_RESET */
2130 if (ap->flags & ATA_FLAG_MMIO)
2131 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2132 else
2133 outb(ap->ctl, ioaddr->ctl_addr);
2134 }
2135
2136 DPRINTK("EXIT\n");
2137 return;
2138
2139err_out:
2140 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2141 ap->ops->port_disable(ap);
2142
2143 DPRINTK("EXIT\n");
2144}
2145
7a7921e8
TH		 2146static int sata_phy_resume(struct ata_port *ap)
2147{
2148 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2149 u32 scontrol, sstatus;
7a7921e8 2150
852ee16a
TH		 2151 scontrol = scr_read(ap, SCR_CONTROL);
2152 scontrol = (scontrol & 0x0f0) | 0x300;
2153 scr_write_flush(ap, SCR_CONTROL, scontrol);
7a7921e8
TH		 2154
2155 /* Wait for phy to become ready, if necessary. */
2156 do {
2157 msleep(200);
2158 sstatus = scr_read(ap, SCR_STATUS);
2159 if ((sstatus & 0xf) != 1)
2160 return 0;
2161 } while (time_before(jiffies, timeout));
2162
2163 return -1;
2164}
2165
8a19ac89
TH		 2166/**
2167 * ata_std_probeinit - initialize probing
2168 * @ap: port to be probed
2169 *
2170 * @ap is about to be probed. Initialize it. This function is
2171 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2172 *
2173 * NOTE!!! Do not use this function as probeinit if a low level
2174 * driver implements only hardreset. Just pass NULL as probeinit
2175 * in that case. Using this function is probably okay but doing
2176 * so makes reset sequence different from the original
2177 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2178 */
17efc5f7 2179void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2180{
17efc5f7 2181 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
8a19ac89 2182 sata_phy_resume(ap);
3a39746a
TH		 2183 if (sata_dev_present(ap))
2184 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2185 }
8a19ac89
TH		 2186}
2187
c2bd5804
TH		 2188/**
2189 * ata_std_softreset - reset host port via ATA SRST
2190 * @ap: port to reset
2191 * @verbose: fail verbosely
2192 * @classes: resulting classes of attached devices
2193 *
2194 * Reset host port using ATA SRST. This function is to be used
2195 * as standard callback for ata_drive_*_reset() functions.
2196 *
2197 * LOCKING:
2198 * Kernel thread context (may sleep)
2199 *
2200 * RETURNS:
2201 * 0 on success, -errno otherwise.
2202 */
2203int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2204{
2205 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2206 unsigned int devmask = 0, err_mask;
2207 u8 err;
2208
2209 DPRINTK("ENTER\n");
2210
3a39746a
TH		 2211 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2212 classes[0] = ATA_DEV_NONE;
2213 goto out;
2214 }
2215
c2bd5804
TH		 2216 /* determine if device 0/1 are present */
2217 if (ata_devchk(ap, 0))
2218 devmask |= (1 << 0);
2219 if (slave_possible && ata_devchk(ap, 1))
2220 devmask |= (1 << 1);
2221
c2bd5804
TH		 2222 /* select device 0 again */
2223 ap->ops->dev_select(ap, 0);
2224
2225 /* issue bus reset */
2226 DPRINTK("about to softreset, devmask=%x\n", devmask);
2227 err_mask = ata_bus_softreset(ap, devmask);
2228 if (err_mask) {
2229 if (verbose)
2230 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2231 ap->id, err_mask);
2232 else
2233 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2234 err_mask);
2235 return -EIO;
2236 }
2237
2238 /* determine by signature whether we have ATA or ATAPI devices */
2239 classes[0] = ata_dev_try_classify(ap, 0, &err);
2240 if (slave_possible && err != 0x81)
2241 classes[1] = ata_dev_try_classify(ap, 1, &err);
2242
3a39746a 2243 out:
c2bd5804
TH		 2244 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2245 return 0;
2246}
2247
2248/**
2249 * sata_std_hardreset - reset host port via SATA phy reset
2250 * @ap: port to reset
2251 * @verbose: fail verbosely
2252 * @class: resulting class of attached device
2253 *
2254 * SATA phy-reset host port using DET bits of SControl register.
2255 * This function is to be used as standard callback for
2256 * ata_drive_*_reset().
2257 *
2258 * LOCKING:
2259 * Kernel thread context (may sleep)
2260 *
2261 * RETURNS:
2262 * 0 on success, -errno otherwise.
2263 */
2264int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2265{
852ee16a
TH		 2266 u32 scontrol;
2267
c2bd5804
TH		 2268 DPRINTK("ENTER\n");
2269
2270 /* Issue phy wake/reset */
852ee16a
TH		 2271 scontrol = scr_read(ap, SCR_CONTROL);
2272 scontrol = (scontrol & 0x0f0) | 0x301;
2273 scr_write_flush(ap, SCR_CONTROL, scontrol);
c2bd5804
TH		 2274
2275 /*
2276 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2277 * 10.4.2 says at least 1 ms.
2278 */
2279 msleep(1);
2280
7a7921e8
TH		 2281 /* Bring phy back */
2282 sata_phy_resume(ap);
c2bd5804 2283
c2bd5804
TH		 2284 /* TODO: phy layer with polling, timeouts, etc. */
2285 if (!sata_dev_present(ap)) {
2286 *class = ATA_DEV_NONE;
2287 DPRINTK("EXIT, link offline\n");
2288 return 0;
2289 }
2290
2291 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2292 if (verbose)
2293 printk(KERN_ERR "ata%u: COMRESET failed "
2294 "(device not ready)\n", ap->id);
2295 else
2296 DPRINTK("EXIT, device not ready\n");
2297 return -EIO;
2298 }
2299
3a39746a
TH		 2300 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2301
c2bd5804
TH		 2302 *class = ata_dev_try_classify(ap, 0, NULL);
2303
2304 DPRINTK("EXIT, class=%u\n", *class);
2305 return 0;
2306}
2307
2308/**
2309 * ata_std_postreset - standard postreset callback
2310 * @ap: the target ata_port
2311 * @classes: classes of attached devices
2312 *
2313 * This function is invoked after a successful reset. Note that
2314 * the device might have been reset more than once using
2315 * different reset methods before postreset is invoked.
c2bd5804
TH		 2316 *
2317 * This function is to be used as standard callback for
2318 * ata_drive_*_reset().
2319 *
2320 * LOCKING:
2321 * Kernel thread context (may sleep)
2322 */
2323void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2324{
2325 DPRINTK("ENTER\n");
2326
56497bd5 2327 /* set cable type if it isn't already set */
c2bd5804
TH		 2328 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2329 ap->cbl = ATA_CBL_SATA;
2330
2331 /* print link status */
2332 if (ap->cbl == ATA_CBL_SATA)
2333 sata_print_link_status(ap);
2334
3a39746a
TH		 2335 /* re-enable interrupts */
2336 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2337 ata_irq_on(ap);
c2bd5804
TH		 2338
2339 /* is double-select really necessary? */
2340 if (classes[0] != ATA_DEV_NONE)
2341 ap->ops->dev_select(ap, 1);
2342 if (classes[1] != ATA_DEV_NONE)
2343 ap->ops->dev_select(ap, 0);
2344
3a39746a
TH		 2345 /* bail out if no device is present */
2346 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2347 DPRINTK("EXIT, no device\n");
2348 return;
2349 }
2350
2351 /* set up device control */
2352 if (ap->ioaddr.ctl_addr) {
2353 if (ap->flags & ATA_FLAG_MMIO)
2354 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2355 else
2356 outb(ap->ctl, ap->ioaddr.ctl_addr);
2357 }
c2bd5804
TH		 2358
2359 DPRINTK("EXIT\n");
2360}
2361
2362/**
2363 * ata_std_probe_reset - standard probe reset method
2364 * @ap: prot to perform probe-reset
2365 * @classes: resulting classes of attached devices
2366 *
2367 * The stock off-the-shelf ->probe_reset method.
2368 *
2369 * LOCKING:
2370 * Kernel thread context (may sleep)
2371 *
2372 * RETURNS:
2373 * 0 on success, -errno otherwise.
2374 */
2375int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2376{
2377 ata_reset_fn_t hardreset;
2378
2379 hardreset = NULL;
b911fc3a 2380 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2381 hardreset = sata_std_hardreset;
2382
8a19ac89 2383 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2384 ata_std_softreset, hardreset,
c2bd5804
TH		 2385 ata_std_postreset, classes);
2386}
2387
9974e7cc
TH		 2388static int ata_do_reset(struct ata_port *ap,
2389 ata_reset_fn_t reset, ata_postreset_fn_t postreset,
2390 int verbose, unsigned int *classes)
a62c0fc5
TH		 2391{
2392 int i, rc;
2393
2394 for (i = 0; i < ATA_MAX_DEVICES; i++)
2395 classes[i] = ATA_DEV_UNKNOWN;
2396
9974e7cc 2397 rc = reset(ap, verbose, classes);
a62c0fc5
TH		 2398 if (rc)
2399 return rc;
2400
2401 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2402 * is complete and convert all ATA_DEV_UNKNOWN to
2403 * ATA_DEV_NONE.
2404 */
2405 for (i = 0; i < ATA_MAX_DEVICES; i++)
2406 if (classes[i] != ATA_DEV_UNKNOWN)
2407 break;
2408
2409 if (i < ATA_MAX_DEVICES)
2410 for (i = 0; i < ATA_MAX_DEVICES; i++)
2411 if (classes[i] == ATA_DEV_UNKNOWN)
2412 classes[i] = ATA_DEV_NONE;
2413
2414 if (postreset)
2415 postreset(ap, classes);
2416
9974e7cc 2417 return 0;
a62c0fc5
TH		 2418}
2419
2420/**
2421 * ata_drive_probe_reset - Perform probe reset with given methods
2422 * @ap: port to reset
7944ea95 2423 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2424 * @softreset: softreset method (can be NULL)
2425 * @hardreset: hardreset method (can be NULL)
2426 * @postreset: postreset method (can be NULL)
2427 * @classes: resulting classes of attached devices
2428 *
2429 * Reset the specified port and classify attached devices using
2430 * given methods. This function prefers softreset but tries all
2431 * possible reset sequences to reset and classify devices. This
2432 * function is intended to be used for constructing ->probe_reset
2433 * callback by low level drivers.
2434 *
2435 * Reset methods should follow the following rules.
2436 *
2437 * - Return 0 on sucess, -errno on failure.
2438 * - If classification is supported, fill classes[] with
2439 * recognized class codes.
2440 * - If classification is not supported, leave classes[] alone.
2441 * - If verbose is non-zero, print error message on failure;
2442 * otherwise, shut up.
2443 *
2444 * LOCKING:
2445 * Kernel thread context (may sleep)
2446 *
2447 * RETURNS:
2448 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2449 * if classification fails, and any error code from reset
2450 * methods.
2451 */
7944ea95 2452int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2453 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2454 ata_postreset_fn_t postreset, unsigned int *classes)
2455{
2456 int rc = -EINVAL;
2457
7944ea95
TH		 2458 if (probeinit)
2459 probeinit(ap);
2460
a62c0fc5 2461 if (softreset) {
9974e7cc
TH		 2462 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2463 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2464 goto done;
a62c0fc5
TH		 2465 }
2466
2467 if (!hardreset)
9974e7cc 2468 goto done;
a62c0fc5 2469
9974e7cc
TH		 2470 rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
2471 if (rc || classes[0] != ATA_DEV_UNKNOWN)
2472 goto done;
a62c0fc5
TH		 2473
2474 if (softreset)
9974e7cc 2475 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
a62c0fc5 2476
9974e7cc
TH		 2477 done:
2478 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2479 rc = -ENODEV;
a62c0fc5
TH		 2480 return rc;
2481}
2482
623a3128
TH		 2483/**
2484 * ata_dev_same_device - Determine whether new ID matches configured device
2485 * @ap: port on which the device to compare against resides
2486 * @dev: device to compare against
2487 * @new_class: class of the new device
2488 * @new_id: IDENTIFY page of the new device
2489 *
2490 * Compare @new_class and @new_id against @dev and determine
2491 * whether @dev is the device indicated by @new_class and
2492 * @new_id.
2493 *
2494 * LOCKING:
2495 * None.
2496 *
2497 * RETURNS:
2498 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2499 */
2500static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2501 unsigned int new_class, const u16 *new_id)
2502{
2503 const u16 *old_id = dev->id;
2504 unsigned char model[2][41], serial[2][21];
2505 u64 new_n_sectors;
2506
2507 if (dev->class != new_class) {
2508 printk(KERN_INFO
2509 "ata%u: dev %u class mismatch %d != %d\n",
2510 ap->id, dev->devno, dev->class, new_class);
2511 return 0;
2512 }
2513
2514 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2515 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2516 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2517 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2518 new_n_sectors = ata_id_n_sectors(new_id);
2519
2520 if (strcmp(model[0], model[1])) {
2521 printk(KERN_INFO
2522 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2523 ap->id, dev->devno, model[0], model[1]);
2524 return 0;
2525 }
2526
2527 if (strcmp(serial[0], serial[1])) {
2528 printk(KERN_INFO
2529 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2530 ap->id, dev->devno, serial[0], serial[1]);
2531 return 0;
2532 }
2533
2534 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2535 printk(KERN_INFO
2536 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2537 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2538 (unsigned long long)new_n_sectors);
2539 return 0;
2540 }
2541
2542 return 1;
2543}
2544
2545/**
2546 * ata_dev_revalidate - Revalidate ATA device
2547 * @ap: port on which the device to revalidate resides
2548 * @dev: device to revalidate
2549 * @post_reset: is this revalidation after reset?
2550 *
2551 * Re-read IDENTIFY page and make sure @dev is still attached to
2552 * the port.
2553 *
2554 * LOCKING:
2555 * Kernel thread context (may sleep)
2556 *
2557 * RETURNS:
2558 * 0 on success, negative errno otherwise
2559 */
2560int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2561 int post_reset)
1da177e4 2562{
623a3128
TH		 2563 unsigned int class;
2564 u16 *id;
2565 int rc;
2566
e1211e3f 2567 if (!ata_dev_enabled(dev))
623a3128
TH		 2568 return -ENODEV;
2569
2570 class = dev->class;
2571 id = NULL;
2572
2573 /* allocate & read ID data */
2574 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2575 if (rc)
2576 goto fail;
2577
2578 /* is the device still there? */
2579 if (!ata_dev_same_device(ap, dev, class, id)) {
2580 rc = -ENODEV;
2581 goto fail;
2582 }
2583
2584 kfree(dev->id);
2585 dev->id = id;
2586
2587 /* configure device according to the new ID */
2588 return ata_dev_configure(ap, dev, 0);
2589
2590 fail:
2591 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2592 ap->id, dev->devno, rc);
2593 kfree(id);
2594 return rc;
1da177e4
LT		 2595}
2596
98ac62de 2597static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2598 "WDC AC11000H", NULL,
2599 "WDC AC22100H", NULL,
2600 "WDC AC32500H", NULL,
2601 "WDC AC33100H", NULL,
2602 "WDC AC31600H", NULL,
2603 "WDC AC32100H", "24.09P07",
2604 "WDC AC23200L", "21.10N21",
2605 "Compaq CRD-8241B", NULL,
2606 "CRD-8400B", NULL,
2607 "CRD-8480B", NULL,
2608 "CRD-8482B", NULL,
2609 "CRD-84", NULL,
2610 "SanDisk SDP3B", NULL,
2611 "SanDisk SDP3B-64", NULL,
2612 "SANYO CD-ROM CRD", NULL,
2613 "HITACHI CDR-8", NULL,
2e9edbf8 2614 "HITACHI CDR-8335", NULL,
f4b15fef 2615 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2616 "Toshiba CD-ROM XM-6202B", NULL,
2617 "TOSHIBA CD-ROM XM-1702BC", NULL,
2618 "CD-532E-A", NULL,
2619 "E-IDE CD-ROM CR-840", NULL,
2620 "CD-ROM Drive/F5A", NULL,
2621 "WPI CDD-820", NULL,
f4b15fef 2622 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2623 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2624 "SanDisk SDP3B-64", NULL,
2625 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2626 "_NEC DV5800A", NULL,
2627 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2628};
2e9edbf8 2629
f4b15fef
AC		 2630static int ata_strim(char *s, size_t len)
2631{
2632 len = strnlen(s, len);
2633
2634 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2635 while ((len > 0) && (s[len - 1] == ' ')) {
2636 len--;
2637 s[len] = 0;
2638 }
2639 return len;
2640}
1da177e4 2641
057ace5e 2642static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2643{
f4b15fef
AC		 2644 unsigned char model_num[40];
2645 unsigned char model_rev[16];
2646 unsigned int nlen, rlen;
1da177e4
LT		 2647 int i;
2648
f4b15fef
AC		 2649 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2650 sizeof(model_num));
2651 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2652 sizeof(model_rev));
2653 nlen = ata_strim(model_num, sizeof(model_num));
2654 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2655
f4b15fef
AC		 2656 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2657 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2658 if (ata_dma_blacklist[i+1] == NULL)
2659 return 1;
2660 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2661 return 1;
2662 }
2663 }
1da177e4
LT		 2664 return 0;
2665}
2666
1da177e4 2667/**
a6d5a51c
TH		 2668 * ata_dev_xfermask - Compute supported xfermask of the given device
2669 * @ap: Port on which the device to compute xfermask for resides
2670 * @dev: Device to compute xfermask for
1da177e4 2671 *
acf356b1
TH		 2672 * Compute supported xfermask of @dev and store it in
2673 * dev->*_mask. This function is responsible for applying all
2674 * known limits including host controller limits, device
2675 * blacklist, etc...
0cba632b 2676 *
600511e8
TH		 2677 * FIXME: The current implementation limits all transfer modes to
2678 * the fastest of the lowested device on the port. This is not
05c8e0ac 2679 * required on most controllers.
600511e8 2680 *
1da177e4 2681 * LOCKING:
a6d5a51c 2682 * None.
1da177e4 2683 */
acf356b1 2684static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2685{
5444a6f4 2686 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2687 unsigned long xfer_mask;
2688 int i;
1da177e4 2689
a6d5a51c
TH		 2690 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2691 ap->udma_mask);
1da177e4 2692
5444a6f4 2693 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2694 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2695 struct ata_device *d = &ap->device[i];
e1211e3f 2696 if (!ata_dev_enabled(d))
a6d5a51c 2697 continue;
acf356b1
TH		 2698 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2699 d->udma_mask);
a6d5a51c
TH		 2700 xfer_mask &= ata_id_xfermask(d->id);
2701 if (ata_dma_blacklisted(d))
2702 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
5444a6f4
AC		 2703 /* Apply cable rule here. Don't apply it early because when
2704 we handle hot plug the cable type can itself change */
2705 if (ap->cbl == ATA_CBL_PATA40)
2706 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4
LT		 2707 }
2708
a6d5a51c
TH		 2709 if (ata_dma_blacklisted(dev))
2710 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2711 "disabling DMA\n", ap->id, dev->devno);
2712
5444a6f4
AC		 2713 if (hs->flags & ATA_HOST_SIMPLEX) {
2714 if (hs->simplex_claimed)
2715 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2716 }
2717 if (ap->ops->mode_filter)
2718 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2719
acf356b1
TH		 2720 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2721 &dev->udma_mask);
1da177e4
LT		 2722}
2723
2724/**
2725 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2726 * @ap: Port associated with device @dev
2727 * @dev: Device to which command will be sent
2728 *
780a87f7
JG		 2729 * Issue SET FEATURES - XFER MODE command to device @dev
2730 * on port @ap.
2731 *
1da177e4 2732 * LOCKING:
0cba632b 2733 * PCI/etc. bus probe sem.
83206a29
TH		 2734 *
2735 * RETURNS:
2736 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2737 */
2738
83206a29
TH		 2739static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2740 struct ata_device *dev)
1da177e4 2741{
a0123703 2742 struct ata_taskfile tf;
83206a29 2743 unsigned int err_mask;
1da177e4
LT		 2744
2745 /* set up set-features taskfile */
2746 DPRINTK("set features - xfer mode\n");
2747
a0123703
TH		 2748 ata_tf_init(ap, &tf, dev->devno);
2749 tf.command = ATA_CMD_SET_FEATURES;
2750 tf.feature = SETFEATURES_XFER;
2751 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2752 tf.protocol = ATA_PROT_NODATA;
2753 tf.nsect = dev->xfer_mode;
1da177e4 2754
83206a29 2755 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
1da177e4 2756
83206a29
TH		 2757 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2758 return err_mask;
1da177e4
LT		 2759}
2760
8bf62ece
AL		 2761/**
2762 * ata_dev_init_params - Issue INIT DEV PARAMS command
2763 * @ap: Port associated with device @dev
2764 * @dev: Device to which command will be sent
2765 *
2766 * LOCKING:
6aff8f1f
TH		 2767 * Kernel thread context (may sleep)
2768 *
2769 * RETURNS:
2770 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2771 */
2772
6aff8f1f 2773static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 2774 struct ata_device *dev,
2775 u16 heads,
2776 u16 sectors)
8bf62ece 2777{
a0123703 2778 struct ata_taskfile tf;
6aff8f1f 2779 unsigned int err_mask;
8bf62ece
AL		 2780
2781 /* Number of sectors per track 1-255. Number of heads 1-16 */
2782 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 2783 return AC_ERR_INVALID;
8bf62ece
AL		 2784
2785 /* set up init dev params taskfile */
2786 DPRINTK("init dev params \n");
2787
a0123703
TH		 2788 ata_tf_init(ap, &tf, dev->devno);
2789 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2790 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2791 tf.protocol = ATA_PROT_NODATA;
2792 tf.nsect = sectors;
2793 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2794
6aff8f1f 2795 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2796
6aff8f1f
TH		 2797 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2798 return err_mask;
8bf62ece
AL		 2799}
2800
1da177e4 2801/**
0cba632b
JG		 2802 * ata_sg_clean - Unmap DMA memory associated with command
2803 * @qc: Command containing DMA memory to be released
2804 *
2805 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2806 *
2807 * LOCKING:
0cba632b 2808 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2809 */
2810
2811static void ata_sg_clean(struct ata_queued_cmd *qc)
2812{
2813 struct ata_port *ap = qc->ap;
cedc9a47 2814 struct scatterlist *sg = qc->__sg;
1da177e4 2815 int dir = qc->dma_dir;
cedc9a47 2816 void *pad_buf = NULL;
1da177e4 2817
a4631474
TH		 2818 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2819 WARN_ON(sg == NULL);
1da177e4
LT		 2820
2821 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2822 WARN_ON(qc->n_elem > 1);
1da177e4 2823
2c13b7ce 2824 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2825
cedc9a47
JG		 2826 /* if we padded the buffer out to 32-bit bound, and data
2827 * xfer direction is from-device, we must copy from the
2828 * pad buffer back into the supplied buffer
2829 */
2830 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2831 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2832
2833 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 2834 if (qc->n_elem)
2f1f610b 2835 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2836 /* restore last sg */
2837 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2838 if (pad_buf) {
2839 struct scatterlist *psg = &qc->pad_sgent;
2840 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2841 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2842 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2843 }
2844 } else {
2e242fa9 2845 if (qc->n_elem)
2f1f610b 2846 dma_unmap_single(ap->dev,
e1410f2d
JG		 2847 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2848 dir);
cedc9a47
JG		 2849 /* restore sg */
2850 sg->length += qc->pad_len;
2851 if (pad_buf)
2852 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2853 pad_buf, qc->pad_len);
2854 }
1da177e4
LT		 2855
2856 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2857 qc->__sg = NULL;
1da177e4
LT		 2858}
2859
2860/**
2861 * ata_fill_sg - Fill PCI IDE PRD table
2862 * @qc: Metadata associated with taskfile to be transferred
2863 *
780a87f7
JG		 2864 * Fill PCI IDE PRD (scatter-gather) table with segments
2865 * associated with the current disk command.
2866 *
1da177e4 2867 * LOCKING:
780a87f7 2868 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2869 *
2870 */
2871static void ata_fill_sg(struct ata_queued_cmd *qc)
2872{
1da177e4 2873 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2874 struct scatterlist *sg;
2875 unsigned int idx;
1da177e4 2876
a4631474 2877 WARN_ON(qc->__sg == NULL);
f131883e 2878 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2879
2880 idx = 0;
cedc9a47 2881 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2882 u32 addr, offset;
2883 u32 sg_len, len;
2884
2885 /* determine if physical DMA addr spans 64K boundary.
2886 * Note h/w doesn't support 64-bit, so we unconditionally
2887 * truncate dma_addr_t to u32.
2888 */
2889 addr = (u32) sg_dma_address(sg);
2890 sg_len = sg_dma_len(sg);
2891
2892 while (sg_len) {
2893 offset = addr & 0xffff;
2894 len = sg_len;
2895 if ((offset + sg_len) > 0x10000)
2896 len = 0x10000 - offset;
2897
2898 ap->prd[idx].addr = cpu_to_le32(addr);
2899 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2900 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2901
2902 idx++;
2903 sg_len -= len;
2904 addr += len;
2905 }
2906 }
2907
2908 if (idx)
2909 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2910}
2911/**
2912 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2913 * @qc: Metadata associated with taskfile to check
2914 *
780a87f7
JG		 2915 * Allow low-level driver to filter ATA PACKET commands, returning
2916 * a status indicating whether or not it is OK to use DMA for the
2917 * supplied PACKET command.
2918 *
1da177e4 2919 * LOCKING:
0cba632b
JG		 2920 * spin_lock_irqsave(host_set lock)
2921 *
1da177e4
LT		 2922 * RETURNS: 0 when ATAPI DMA can be used
2923 * nonzero otherwise
2924 */
2925int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2926{
2927 struct ata_port *ap = qc->ap;
2928 int rc = 0; /* Assume ATAPI DMA is OK by default */
2929
2930 if (ap->ops->check_atapi_dma)
2931 rc = ap->ops->check_atapi_dma(qc);
2932
c2bbc551
AL		 2933 /* We don't support polling DMA.
2934 * Use PIO if the LLDD handles only interrupts in
2935 * the HSM_ST_LAST state and the ATAPI device
2936 * generates CDB interrupts.
2937 */
2938 if ((ap->flags & ATA_FLAG_PIO_POLLING) &&
2939 (qc->dev->flags & ATA_DFLAG_CDB_INTR))
2940 rc = 1;
2941
1da177e4
LT		 2942 return rc;
2943}
2944/**
2945 * ata_qc_prep - Prepare taskfile for submission
2946 * @qc: Metadata associated with taskfile to be prepared
2947 *
780a87f7
JG		 2948 * Prepare ATA taskfile for submission.
2949 *
1da177e4
LT		 2950 * LOCKING:
2951 * spin_lock_irqsave(host_set lock)
2952 */
2953void ata_qc_prep(struct ata_queued_cmd *qc)
2954{
2955 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2956 return;
2957
2958 ata_fill_sg(qc);
2959}
2960
e46834cd
BK		 2961void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
2962
0cba632b
JG		 2963/**
2964 * ata_sg_init_one - Associate command with memory buffer
2965 * @qc: Command to be associated
2966 * @buf: Memory buffer
2967 * @buflen: Length of memory buffer, in bytes.
2968 *
2969 * Initialize the data-related elements of queued_cmd @qc
2970 * to point to a single memory buffer, @buf of byte length @buflen.
2971 *
2972 * LOCKING:
2973 * spin_lock_irqsave(host_set lock)
2974 */
2975
1da177e4
LT		 2976void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2977{
2978 struct scatterlist *sg;
2979
2980 qc->flags |= ATA_QCFLAG_SINGLE;
2981
2982 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2983 qc->__sg = &qc->sgent;
1da177e4 2984 qc->n_elem = 1;
cedc9a47 2985 qc->orig_n_elem = 1;
1da177e4
LT		 2986 qc->buf_virt = buf;
2987
cedc9a47 2988 sg = qc->__sg;
f0612bbc 2989 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2990}
2991
0cba632b
JG		 2992/**
2993 * ata_sg_init - Associate command with scatter-gather table.
2994 * @qc: Command to be associated
2995 * @sg: Scatter-gather table.
2996 * @n_elem: Number of elements in s/g table.
2997 *
2998 * Initialize the data-related elements of queued_cmd @qc
2999 * to point to a scatter-gather table @sg, containing @n_elem
3000 * elements.
3001 *
3002 * LOCKING:
3003 * spin_lock_irqsave(host_set lock)
3004 */
3005
1da177e4
LT		 3006void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3007 unsigned int n_elem)
3008{
3009 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3010 qc->__sg = sg;
1da177e4 3011 qc->n_elem = n_elem;
cedc9a47 3012 qc->orig_n_elem = n_elem;
1da177e4
LT		 3013}
3014
3015/**
0cba632b
JG		 3016 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3017 * @qc: Command with memory buffer to be mapped.
3018 *
3019 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3020 *
3021 * LOCKING:
3022 * spin_lock_irqsave(host_set lock)
3023 *
3024 * RETURNS:
0cba632b 3025 * Zero on success, negative on error.
1da177e4
LT		 3026 */
3027
3028static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3029{
3030 struct ata_port *ap = qc->ap;
3031 int dir = qc->dma_dir;
cedc9a47 3032 struct scatterlist *sg = qc->__sg;
1da177e4 3033 dma_addr_t dma_address;
2e242fa9 3034 int trim_sg = 0;
1da177e4 3035
cedc9a47
JG		 3036 /* we must lengthen transfers to end on a 32-bit boundary */
3037 qc->pad_len = sg->length & 3;
3038 if (qc->pad_len) {
3039 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3040 struct scatterlist *psg = &qc->pad_sgent;
3041
a4631474 3042 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3043
3044 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3045
3046 if (qc->tf.flags & ATA_TFLAG_WRITE)
3047 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3048 qc->pad_len);
3049
3050 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3051 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3052 /* trim sg */
3053 sg->length -= qc->pad_len;
2e242fa9
TH		 3054 if (sg->length == 0)
3055 trim_sg = 1;
cedc9a47
JG		 3056
3057 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3058 sg->length, qc->pad_len);
3059 }
3060
2e242fa9
TH		 3061 if (trim_sg) {
3062 qc->n_elem--;
e1410f2d
JG		 3063 goto skip_map;
3064 }
3065
2f1f610b 3066 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3067 sg->length, dir);
537a95d9
TH		 3068 if (dma_mapping_error(dma_address)) {
3069 /* restore sg */
3070 sg->length += qc->pad_len;
1da177e4 3071 return -1;
537a95d9 3072 }
1da177e4
LT		 3073
3074 sg_dma_address(sg) = dma_address;
32529e01 3075 sg_dma_len(sg) = sg->length;
1da177e4 3076
2e242fa9 3077skip_map:
1da177e4
LT		 3078 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3079 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3080
3081 return 0;
3082}
3083
3084/**
0cba632b
JG		 3085 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3086 * @qc: Command with scatter-gather table to be mapped.
3087 *
3088 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3089 *
3090 * LOCKING:
3091 * spin_lock_irqsave(host_set lock)
3092 *
3093 * RETURNS:
0cba632b 3094 * Zero on success, negative on error.
1da177e4
LT		 3095 *
3096 */
3097
3098static int ata_sg_setup(struct ata_queued_cmd *qc)
3099{
3100 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3101 struct scatterlist *sg = qc->__sg;
3102 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3103 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3104
3105 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3106 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3107
cedc9a47
JG		 3108 /* we must lengthen transfers to end on a 32-bit boundary */
3109 qc->pad_len = lsg->length & 3;
3110 if (qc->pad_len) {
3111 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3112 struct scatterlist *psg = &qc->pad_sgent;
3113 unsigned int offset;
3114
a4631474 3115 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3116
3117 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3118
3119 /*
3120 * psg->page/offset are used to copy to-be-written
3121 * data in this function or read data in ata_sg_clean.
3122 */
3123 offset = lsg->offset + lsg->length - qc->pad_len;
3124 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3125 psg->offset = offset_in_page(offset);
3126
3127 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3128 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3129 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3130 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3131 }
3132
3133 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3134 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3135 /* trim last sg */
3136 lsg->length -= qc->pad_len;
e1410f2d
JG		 3137 if (lsg->length == 0)
3138 trim_sg = 1;
cedc9a47
JG		 3139
3140 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3141 qc->n_elem - 1, lsg->length, qc->pad_len);
3142 }
3143
e1410f2d
JG		 3144 pre_n_elem = qc->n_elem;
3145 if (trim_sg && pre_n_elem)
3146 pre_n_elem--;
3147
3148 if (!pre_n_elem) {
3149 n_elem = 0;
3150 goto skip_map;
3151 }
3152
1da177e4 3153 dir = qc->dma_dir;
2f1f610b 3154 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3155 if (n_elem < 1) {
3156 /* restore last sg */
3157 lsg->length += qc->pad_len;
1da177e4 3158 return -1;
537a95d9 3159 }
1da177e4
LT		 3160
3161 DPRINTK("%d sg elements mapped\n", n_elem);
3162
e1410f2d 3163skip_map:
1da177e4
LT		 3164 qc->n_elem = n_elem;
3165
3166 return 0;
3167}
3168
40e8c82c
TH		 3169/**
3170 * ata_poll_qc_complete - turn irq back on and finish qc
3171 * @qc: Command to complete
8e8b77dd 3172 * @err_mask: ATA status register content
40e8c82c
TH		 3173 *
3174 * LOCKING:
3175 * None. (grabs host lock)
3176 */
3177
a22e2eb0 3178void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3179{
3180 struct ata_port *ap = qc->ap;
b8f6153e 3181 unsigned long flags;
40e8c82c 3182
b8f6153e 3183 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c 3184 ata_irq_on(ap);
a22e2eb0 3185 ata_qc_complete(qc);
b8f6153e 3186 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3187}
3188
0baab86b 3189/**
c893a3ae 3190 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3191 * @buf: Buffer to swap
3192 * @buf_words: Number of 16-bit words in buffer.
3193 *
3194 * Swap halves of 16-bit words if needed to convert from
3195 * little-endian byte order to native cpu byte order, or
3196 * vice-versa.
3197 *
3198 * LOCKING:
6f0ef4fa 3199 * Inherited from caller.
0baab86b 3200 */
1da177e4
LT		 3201void swap_buf_le16(u16 *buf, unsigned int buf_words)
3202{
3203#ifdef __BIG_ENDIAN
3204 unsigned int i;
3205
3206 for (i = 0; i < buf_words; i++)
3207 buf[i] = le16_to_cpu(buf[i]);
3208#endif /* __BIG_ENDIAN */
3209}
3210
6ae4cfb5
AL		 3211/**
3212 * ata_mmio_data_xfer - Transfer data by MMIO
3213 * @ap: port to read/write
3214 * @buf: data buffer
3215 * @buflen: buffer length
344babaa 3216 * @write_data: read/write
6ae4cfb5
AL		 3217 *
3218 * Transfer data from/to the device data register by MMIO.
3219 *
3220 * LOCKING:
3221 * Inherited from caller.
6ae4cfb5
AL		 3222 */
3223
1da177e4
LT		 3224static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3225 unsigned int buflen, int write_data)
3226{
3227 unsigned int i;
3228 unsigned int words = buflen >> 1;
3229 u16 *buf16 = (u16 *) buf;
3230 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3231
6ae4cfb5 3232 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3233 if (write_data) {
3234 for (i = 0; i < words; i++)
3235 writew(le16_to_cpu(buf16[i]), mmio);
3236 } else {
3237 for (i = 0; i < words; i++)
3238 buf16[i] = cpu_to_le16(readw(mmio));
3239 }
6ae4cfb5
AL		 3240
3241 /* Transfer trailing 1 byte, if any. */
3242 if (unlikely(buflen & 0x01)) {
3243 u16 align_buf[1] = { 0 };
3244 unsigned char *trailing_buf = buf + buflen - 1;
3245
3246 if (write_data) {
3247 memcpy(align_buf, trailing_buf, 1);
3248 writew(le16_to_cpu(align_buf[0]), mmio);
3249 } else {
3250 align_buf[0] = cpu_to_le16(readw(mmio));
3251 memcpy(trailing_buf, align_buf, 1);
3252 }
3253 }
1da177e4
LT		 3254}
3255
6ae4cfb5
AL		 3256/**
3257 * ata_pio_data_xfer - Transfer data by PIO
3258 * @ap: port to read/write
3259 * @buf: data buffer
3260 * @buflen: buffer length
344babaa 3261 * @write_data: read/write
6ae4cfb5
AL		 3262 *
3263 * Transfer data from/to the device data register by PIO.
3264 *
3265 * LOCKING:
3266 * Inherited from caller.
6ae4cfb5
AL		 3267 */
3268
1da177e4
LT		 3269static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3270 unsigned int buflen, int write_data)
3271{
6ae4cfb5 3272 unsigned int words = buflen >> 1;
1da177e4 3273
6ae4cfb5 3274 /* Transfer multiple of 2 bytes */
1da177e4 3275 if (write_data)
6ae4cfb5 3276 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3277 else
6ae4cfb5
AL		 3278 insw(ap->ioaddr.data_addr, buf, words);
3279
3280 /* Transfer trailing 1 byte, if any. */
3281 if (unlikely(buflen & 0x01)) {
3282 u16 align_buf[1] = { 0 };
3283 unsigned char *trailing_buf = buf + buflen - 1;
3284
3285 if (write_data) {
3286 memcpy(align_buf, trailing_buf, 1);
3287 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3288 } else {
3289 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3290 memcpy(trailing_buf, align_buf, 1);
3291 }
3292 }
1da177e4
LT		 3293}
3294
6ae4cfb5
AL		 3295/**
3296 * ata_data_xfer - Transfer data from/to the data register.
3297 * @ap: port to read/write
3298 * @buf: data buffer
3299 * @buflen: buffer length
3300 * @do_write: read/write
3301 *
3302 * Transfer data from/to the device data register.
3303 *
3304 * LOCKING:
3305 * Inherited from caller.
6ae4cfb5
AL		 3306 */
3307
1da177e4
LT		 3308static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3309 unsigned int buflen, int do_write)
3310{
a1bd9e68
AC		 3311 /* Make the crap hardware pay the costs not the good stuff */
3312 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3313 unsigned long flags;
3314 local_irq_save(flags);
3315 if (ap->flags & ATA_FLAG_MMIO)
3316 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3317 else
3318 ata_pio_data_xfer(ap, buf, buflen, do_write);
3319 local_irq_restore(flags);
3320 } else {
3321 if (ap->flags & ATA_FLAG_MMIO)
3322 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3323 else
3324 ata_pio_data_xfer(ap, buf, buflen, do_write);
3325 }
1da177e4
LT		 3326}
3327
6ae4cfb5
AL		 3328/**
3329 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3330 * @qc: Command on going
3331 *
3332 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3333 *
3334 * LOCKING:
3335 * Inherited from caller.
3336 */
3337
1da177e4
LT		 3338static void ata_pio_sector(struct ata_queued_cmd *qc)
3339{
3340 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3341 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3342 struct ata_port *ap = qc->ap;
3343 struct page *page;
3344 unsigned int offset;
3345 unsigned char *buf;
3346
3347 if (qc->cursect == (qc->nsect - 1))
14be71f4 3348 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3349
3350 page = sg[qc->cursg].page;
3351 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3352
3353 /* get the current page and offset */
3354 page = nth_page(page, (offset >> PAGE_SHIFT));
3355 offset %= PAGE_SIZE;
3356
1da177e4
LT		 3357 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3358
91b8b313
AL		 3359 if (PageHighMem(page)) {
3360 unsigned long flags;
3361
3362 local_irq_save(flags);
3363 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3364
91b8b313
AL		 3365 /* do the actual data transfer */
3366 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
1da177e4 3367
91b8b313
AL		 3368 kunmap_atomic(buf, KM_IRQ0);
3369 local_irq_restore(flags);
3370 } else {
3371 buf = page_address(page);
3372 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3373 }
7282aa4b
AL		 3374
3375 qc->cursect++;
3376 qc->cursg_ofs++;
3377
3378 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3379 qc->cursg++;
3380 qc->cursg_ofs = 0;
3381 }
1da177e4
LT		 3382}
3383
07f6f7d0
AL		 3384/**
3385 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3386 * @qc: Command on going
3387 *
3388 * Transfer one or many ATA_SECT_SIZE of data from/to the
3389 * ATA device for the DRQ request.
3390 *
3391 * LOCKING:
3392 * Inherited from caller.
3393 */
3394
3395static void ata_pio_sectors(struct ata_queued_cmd *qc)
3396{
3397 if (is_multi_taskfile(&qc->tf)) {
3398 /* READ/WRITE MULTIPLE */
3399 unsigned int nsect;
3400
587005de 3401 WARN_ON(qc->dev->multi_count == 0);
07f6f7d0
AL		 3402
3403 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3404 while (nsect--)
3405 ata_pio_sector(qc);
3406 } else
3407 ata_pio_sector(qc);
3408}
3409
c71c1857
AL		 3410/**
3411 * atapi_send_cdb - Write CDB bytes to hardware
3412 * @ap: Port to which ATAPI device is attached.
3413 * @qc: Taskfile currently active
3414 *
3415 * When device has indicated its readiness to accept
3416 * a CDB, this function is called. Send the CDB.
3417 *
3418 * LOCKING:
3419 * caller.
3420 */
3421
3422static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3423{
3424 /* send SCSI cdb */
3425 DPRINTK("send cdb\n");
db024d53 3426 WARN_ON(qc->dev->cdb_len < 12);
c71c1857 3427
db024d53 3428 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
c71c1857
AL		 3429 ata_altstatus(ap); /* flush */
3430
3431 switch (qc->tf.protocol) {
3432 case ATA_PROT_ATAPI:
3433 ap->hsm_task_state = HSM_ST;
3434 break;
3435 case ATA_PROT_ATAPI_NODATA:
3436 ap->hsm_task_state = HSM_ST_LAST;
3437 break;
3438 case ATA_PROT_ATAPI_DMA:
3439 ap->hsm_task_state = HSM_ST_LAST;
3440 /* initiate bmdma */
3441 ap->ops->bmdma_start(qc);
3442 break;
3443 }
3444}
3445
6ae4cfb5
AL		 3446/**
3447 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3448 * @qc: Command on going
3449 * @bytes: number of bytes
3450 *
3451 * Transfer Transfer data from/to the ATAPI device.
3452 *
3453 * LOCKING:
3454 * Inherited from caller.
3455 *
3456 */
3457
1da177e4
LT		 3458static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3459{
3460 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3461 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3462 struct ata_port *ap = qc->ap;
3463 struct page *page;
3464 unsigned char *buf;
3465 unsigned int offset, count;
3466
563a6e1f 3467 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3468 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3469
3470next_sg:
563a6e1f 3471 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3472 /*
563a6e1f
AL		 3473 * The end of qc->sg is reached and the device expects
3474 * more data to transfer. In order not to overrun qc->sg
3475 * and fulfill length specified in the byte count register,
3476 * - for read case, discard trailing data from the device
3477 * - for write case, padding zero data to the device
3478 */
3479 u16 pad_buf[1] = { 0 };
3480 unsigned int words = bytes >> 1;
3481 unsigned int i;
3482
3483 if (words) /* warning if bytes > 1 */
7fb6ec28 3484 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3485 ap->id, bytes);
3486
3487 for (i = 0; i < words; i++)
3488 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3489
14be71f4 3490 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3491 return;
3492 }
3493
cedc9a47 3494 sg = &qc->__sg[qc->cursg];
1da177e4 3495
1da177e4
LT		 3496 page = sg->page;
3497 offset = sg->offset + qc->cursg_ofs;
3498
3499 /* get the current page and offset */
3500 page = nth_page(page, (offset >> PAGE_SHIFT));
3501 offset %= PAGE_SIZE;
3502
6952df03 3503 /* don't overrun current sg */
32529e01 3504 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3505
3506 /* don't cross page boundaries */
3507 count = min(count, (unsigned int)PAGE_SIZE - offset);
3508
7282aa4b
AL		 3509 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3510
91b8b313
AL		 3511 if (PageHighMem(page)) {
3512 unsigned long flags;
3513
3514 local_irq_save(flags);
3515 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3516
91b8b313
AL		 3517 /* do the actual data transfer */
3518 ata_data_xfer(ap, buf + offset, count, do_write);
7282aa4b 3519
91b8b313
AL		 3520 kunmap_atomic(buf, KM_IRQ0);
3521 local_irq_restore(flags);
3522 } else {
3523 buf = page_address(page);
3524 ata_data_xfer(ap, buf + offset, count, do_write);
3525 }
7282aa4b 3526
1da177e4
LT		 3527 bytes -= count;
3528 qc->curbytes += count;
3529 qc->cursg_ofs += count;
3530
32529e01 3531 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3532 qc->cursg++;
3533 qc->cursg_ofs = 0;
3534 }
3535
563a6e1f 3536 if (bytes)
1da177e4 3537 goto next_sg;
1da177e4
LT		 3538}
3539
6ae4cfb5
AL		 3540/**
3541 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3542 * @qc: Command on going
3543 *
3544 * Transfer Transfer data from/to the ATAPI device.
3545 *
3546 * LOCKING:
3547 * Inherited from caller.
6ae4cfb5
AL		 3548 */
3549
1da177e4
LT		 3550static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3551{
3552 struct ata_port *ap = qc->ap;
3553 struct ata_device *dev = qc->dev;
3554 unsigned int ireason, bc_lo, bc_hi, bytes;
3555 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3556
3557 ap->ops->tf_read(ap, &qc->tf);
3558 ireason = qc->tf.nsect;
3559 bc_lo = qc->tf.lbam;
3560 bc_hi = qc->tf.lbah;
3561 bytes = (bc_hi << 8) | bc_lo;
3562
3563 /* shall be cleared to zero, indicating xfer of data */
3564 if (ireason & (1 << 0))
3565 goto err_out;
3566
3567 /* make sure transfer direction matches expected */
3568 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3569 if (do_write != i_write)
3570 goto err_out;
3571
312f7da2
AL		 3572 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3573
1da177e4
LT		 3574 __atapi_pio_bytes(qc, bytes);
3575
3576 return;
3577
3578err_out:
3579 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3580 ap->id, dev->devno);
11a56d24 3581 qc->err_mask |= AC_ERR_HSM;
14be71f4 3582 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3583}
3584
c234fb00
AL		 3585/**
3586 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3587 * @ap: the target ata_port
3588 * @qc: qc on going
3589 *
3590 * RETURNS:
3591 * 1 if ok in workqueue, 0 otherwise.
3592 */
3593
3594static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
3595{
3596 if (qc->tf.flags & ATA_TFLAG_POLLING)
3597 return 1;
3598
3599 if (ap->hsm_task_state == HSM_ST_FIRST) {
3600 if (qc->tf.protocol == ATA_PROT_PIO &&
3601 (qc->tf.flags & ATA_TFLAG_WRITE))
3602 return 1;
3603
3604 if (is_atapi_taskfile(&qc->tf) &&
3605 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
3606 return 1;
3607 }
3608
3609 return 0;
3610}
3611
bb5cb290
AL		 3612/**
3613 * ata_hsm_move - move the HSM to the next state.
3614 * @ap: the target ata_port
3615 * @qc: qc on going
3616 * @status: current device status
3617 * @in_wq: 1 if called from workqueue, 0 otherwise
3618 *
3619 * RETURNS:
3620 * 1 when poll next status needed, 0 otherwise.
3621 */
3622
3623static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
3624 u8 status, int in_wq)
e2cec771 3625{
bb5cb290
AL		 3626 unsigned long flags = 0;
3627 int poll_next;
3628
6912ccd5
AL		 3629 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
3630
bb5cb290
AL		 3631 /* Make sure ata_qc_issue_prot() does not throw things
3632 * like DMA polling into the workqueue. Notice that
3633 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
3634 */
c234fb00 3635 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
bb5cb290 3636
e2cec771 3637fsm_start:
999bb6f4
AL		 3638 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
3639 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
3640
e2cec771
AL		 3641 switch (ap->hsm_task_state) {
3642 case HSM_ST_FIRST:
bb5cb290
AL		 3643 /* Send first data block or PACKET CDB */
3644
3645 /* If polling, we will stay in the work queue after
3646 * sending the data. Otherwise, interrupt handler
3647 * takes over after sending the data.
3648 */
3649 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3650
e2cec771
AL		 3651 /* check device status */
3652 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
3653 /* Wrong status. Let EH handle this */
3654 qc->err_mask |= AC_ERR_HSM;
3655 ap->hsm_task_state = HSM_ST_ERR;
3656 goto fsm_start;
3657 }
3658
71601958
AL		 3659 /* Device should not ask for data transfer (DRQ=1)
3660 * when it finds something wrong.
eee6c32f
AL		 3661 * We ignore DRQ here and stop the HSM by
3662 * changing hsm_task_state to HSM_ST_ERR and
3663 * let the EH abort the command or reset the device.
71601958
AL		 3664 */
3665 if (unlikely(status & (ATA_ERR | ATA_DF))) {
3666 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
3667 ap->id, status);
3668 qc->err_mask |= AC_ERR_DEV;
eee6c32f
AL		 3669 ap->hsm_task_state = HSM_ST_ERR;
3670 goto fsm_start;
71601958
AL		 3671 }
3672
bb5cb290
AL		 3673 /* Send the CDB (atapi) or the first data block (ata pio out).
3674 * During the state transition, interrupt handler shouldn't
3675 * be invoked before the data transfer is complete and
3676 * hsm_task_state is changed. Hence, the following locking.
3677 */
3678 if (in_wq)
3679 spin_lock_irqsave(&ap->host_set->lock, flags);
3680
3681 if (qc->tf.protocol == ATA_PROT_PIO) {
3682 /* PIO data out protocol.
3683 * send first data block.
3684 */
e2cec771 3685
bb5cb290
AL		 3686 /* ata_pio_sectors() might change the state
3687 * to HSM_ST_LAST. so, the state is changed here
3688 * before ata_pio_sectors().
3689 */
3690 ap->hsm_task_state = HSM_ST;
3691 ata_pio_sectors(qc);
3692 ata_altstatus(ap); /* flush */
3693 } else
3694 /* send CDB */
3695 atapi_send_cdb(ap, qc);
3696
3697 if (in_wq)
3698 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3699
3700 /* if polling, ata_pio_task() handles the rest.
3701 * otherwise, interrupt handler takes over from here.
3702 */
e2cec771
AL		 3703 break;
3704
3705 case HSM_ST:
3706 /* complete command or read/write the data register */
3707 if (qc->tf.protocol == ATA_PROT_ATAPI) {
3708 /* ATAPI PIO protocol */
3709 if ((status & ATA_DRQ) == 0) {
3710 /* no more data to transfer */
3711 ap->hsm_task_state = HSM_ST_LAST;
3712 goto fsm_start;
3713 }
3714
71601958
AL		 3715 /* Device should not ask for data transfer (DRQ=1)
3716 * when it finds something wrong.
eee6c32f
AL		 3717 * We ignore DRQ here and stop the HSM by
3718 * changing hsm_task_state to HSM_ST_ERR and
3719 * let the EH abort the command or reset the device.
71601958
AL		 3720 */
3721 if (unlikely(status & (ATA_ERR | ATA_DF))) {
3722 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
3723 ap->id, status);
3724 qc->err_mask |= AC_ERR_DEV;
eee6c32f
AL		 3725 ap->hsm_task_state = HSM_ST_ERR;
3726 goto fsm_start;
71601958
AL		 3727 }
3728
e2cec771
AL		 3729 atapi_pio_bytes(qc);
3730
3731 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
3732 /* bad ireason reported by device */
3733 goto fsm_start;
3734
3735 } else {
3736 /* ATA PIO protocol */
3737 if (unlikely((status & ATA_DRQ) == 0)) {
3738 /* handle BSY=0, DRQ=0 as error */
3739 qc->err_mask |= AC_ERR_HSM;
3740 ap->hsm_task_state = HSM_ST_ERR;
3741 goto fsm_start;
3742 }
3743
eee6c32f
AL		 3744 /* For PIO reads, some devices may ask for
3745 * data transfer (DRQ=1) alone with ERR=1.
3746 * We respect DRQ here and transfer one
3747 * block of junk data before changing the
3748 * hsm_task_state to HSM_ST_ERR.
3749 *
3750 * For PIO writes, ERR=1 DRQ=1 doesn't make
3751 * sense since the data block has been
3752 * transferred to the device.
71601958
AL		 3753 */
3754 if (unlikely(status & (ATA_ERR | ATA_DF))) {
71601958
AL		 3755 /* data might be corrputed */
3756 qc->err_mask |= AC_ERR_DEV;
eee6c32f
AL		 3757
3758 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
3759 ata_pio_sectors(qc);
3760 ata_altstatus(ap);
3761 status = ata_wait_idle(ap);
3762 }
3763
3764 /* ata_pio_sectors() might change the
3765 * state to HSM_ST_LAST. so, the state
3766 * is changed after ata_pio_sectors().
3767 */
3768 ap->hsm_task_state = HSM_ST_ERR;
3769 goto fsm_start;
71601958
AL		 3770 }
3771
e2cec771
AL		 3772 ata_pio_sectors(qc);
3773
3774 if (ap->hsm_task_state == HSM_ST_LAST &&
3775 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
3776 /* all data read */
3777 ata_altstatus(ap);
52a32205 3778 status = ata_wait_idle(ap);
e2cec771
AL		 3779 goto fsm_start;
3780 }
3781 }
3782
3783 ata_altstatus(ap); /* flush */
bb5cb290 3784 poll_next = 1;
e2cec771
AL		 3785 break;
3786
3787 case HSM_ST_LAST:
6912ccd5
AL		 3788 if (unlikely(!ata_ok(status))) {
3789 qc->err_mask |= __ac_err_mask(status);
e2cec771
AL		 3790 ap->hsm_task_state = HSM_ST_ERR;
3791 goto fsm_start;
3792 }
3793
3794 /* no more data to transfer */
3795 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
3796 ap->id, status);
3797
6912ccd5
AL		 3798 WARN_ON(qc->err_mask);
3799
e2cec771
AL		 3800 ap->hsm_task_state = HSM_ST_IDLE;
3801
3802 /* complete taskfile transaction */
bb5cb290
AL		 3803 if (in_wq)
3804 ata_poll_qc_complete(qc);
3805 else
3806 ata_qc_complete(qc);
3807
3808 poll_next = 0;
e2cec771
AL		 3809 break;
3810
3811 case HSM_ST_ERR:
3812 if (qc->tf.command != ATA_CMD_PACKET)
6912ccd5
AL		 3813 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x\n",
3814 ap->id, status);
e2cec771
AL		 3815
3816 /* make sure qc->err_mask is available to
3817 * know what's wrong and recover
3818 */
3819 WARN_ON(qc->err_mask == 0);
3820
3821 ap->hsm_task_state = HSM_ST_IDLE;
bb5cb290 3822
999bb6f4 3823 /* complete taskfile transaction */
bb5cb290
AL		 3824 if (in_wq)
3825 ata_poll_qc_complete(qc);
3826 else
3827 ata_qc_complete(qc);
3828
3829 poll_next = 0;
e2cec771
AL		 3830 break;
3831 default:
bb5cb290 3832 poll_next = 0;
6912ccd5 3833 BUG();
e2cec771
AL		 3834 }
3835
bb5cb290 3836 return poll_next;
e2cec771
AL		 3837}
3838
1da177e4
LT		 3839static void ata_pio_task(void *_data)
3840{
3841 struct ata_port *ap = _data;
a1af3734
AL		 3842 struct ata_queued_cmd *qc;
3843 u8 status;
3844 int poll_next;
7fb6ec28
JG		 3845
3846fsm_start:
a1af3734 3847 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
1da177e4 3848
a1af3734
AL		 3849 qc = ata_qc_from_tag(ap, ap->active_tag);
3850 WARN_ON(qc == NULL);
467b16d4 3851
a1af3734
AL		 3852 /*
3853 * This is purely heuristic. This is a fast path.
3854 * Sometimes when we enter, BSY will be cleared in
3855 * a chk-status or two. If not, the drive is probably seeking
3856 * or something. Snooze for a couple msecs, then
3857 * chk-status again. If still busy, queue delayed work.
3858 */
3859 status = ata_busy_wait(ap, ATA_BUSY, 5);
3860 if (status & ATA_BUSY) {
3861 msleep(2);
3862 status = ata_busy_wait(ap, ATA_BUSY, 10);
3863 if (status & ATA_BUSY) {
3864 ata_port_queue_task(ap, ata_pio_task, ap, ATA_SHORT_PAUSE);
3865 return;
3866 }
1da177e4
LT		 3867 }
3868
a1af3734
AL		 3869 /* move the HSM */
3870 poll_next = ata_hsm_move(ap, qc, status, 1);
3871
3872 /* another command or interrupt handler
3873 * may be running at this point.
3874 */
3875 if (poll_next)
7fb6ec28 3876 goto fsm_start;
1da177e4
LT		 3877}
3878
1da177e4
LT		 3879/**
3880 * ata_qc_timeout - Handle timeout of queued command
3881 * @qc: Command that timed out
3882 *
3883 * Some part of the kernel (currently, only the SCSI layer)
3884 * has noticed that the active command on port @ap has not
3885 * completed after a specified length of time. Handle this
3886 * condition by disabling DMA (if necessary) and completing
3887 * transactions, with error if necessary.
3888 *
3889 * This also handles the case of the "lost interrupt", where
3890 * for some reason (possibly hardware bug, possibly driver bug)
3891 * an interrupt was not delivered to the driver, even though the
3892 * transaction completed successfully.
3893 *
3894 * LOCKING:
0cba632b 3895 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3896 */
3897
3898static void ata_qc_timeout(struct ata_queued_cmd *qc)
3899{
3900 struct ata_port *ap = qc->ap;
b8f6153e 3901 struct ata_host_set *host_set = ap->host_set;
1da177e4 3902 u8 host_stat = 0, drv_stat;
b8f6153e 3903 unsigned long flags;
1da177e4
LT		 3904
3905 DPRINTK("ENTER\n");
3906
c18d06f8
TH		 3907 ap->hsm_task_state = HSM_ST_IDLE;
3908
b8f6153e
JG		 3909 spin_lock_irqsave(&host_set->lock, flags);
3910
1da177e4
LT		 3911 switch (qc->tf.protocol) {
3912
3913 case ATA_PROT_DMA:
3914 case ATA_PROT_ATAPI_DMA:
3915 host_stat = ap->ops->bmdma_status(ap);
3916
3917 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3918 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3919
3920 /* fall through */
3921
3922 default:
3923 ata_altstatus(ap);
3924 drv_stat = ata_chk_status(ap);
3925
3926 /* ack bmdma irq events */
3927 ap->ops->irq_clear(ap);
3928
3929 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3930 ap->id, qc->tf.command, drv_stat, host_stat);
3931
312f7da2
AL		 3932 ap->hsm_task_state = HSM_ST_IDLE;
3933
1da177e4 3934 /* complete taskfile transaction */
555a8965 3935 qc->err_mask |= AC_ERR_TIMEOUT;
1da177e4
LT		 3936 break;
3937 }
b8f6153e
JG		 3938
3939 spin_unlock_irqrestore(&host_set->lock, flags);
3940
a72ec4ce
TH		 3941 ata_eh_qc_complete(qc);
3942
1da177e4
LT		 3943 DPRINTK("EXIT\n");
3944}
3945
3946/**
3947 * ata_eng_timeout - Handle timeout of queued command
3948 * @ap: Port on which timed-out command is active
3949 *
3950 * Some part of the kernel (currently, only the SCSI layer)
3951 * has noticed that the active command on port @ap has not
3952 * completed after a specified length of time. Handle this
3953 * condition by disabling DMA (if necessary) and completing
3954 * transactions, with error if necessary.
3955 *
3956 * This also handles the case of the "lost interrupt", where
3957 * for some reason (possibly hardware bug, possibly driver bug)
3958 * an interrupt was not delivered to the driver, even though the
3959 * transaction completed successfully.
3960 *
3961 * LOCKING:
3962 * Inherited from SCSI layer (none, can sleep)
3963 */
3964
3965void ata_eng_timeout(struct ata_port *ap)
3966{
1da177e4
LT		 3967 DPRINTK("ENTER\n");
3968
f6379020 3969 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3970
1da177e4
LT		 3971 DPRINTK("EXIT\n");
3972}
3973
3974/**
3975 * ata_qc_new - Request an available ATA command, for queueing
3976 * @ap: Port associated with device @dev
3977 * @dev: Device from whom we request an available command structure
3978 *
3979 * LOCKING:
0cba632b 3980 * None.
1da177e4
LT		 3981 */
3982
3983static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3984{
3985 struct ata_queued_cmd *qc = NULL;
3986 unsigned int i;
3987
3988 for (i = 0; i < ATA_MAX_QUEUE; i++)
3989 if (!test_and_set_bit(i, &ap->qactive)) {
3990 qc = ata_qc_from_tag(ap, i);
3991 break;
3992 }
3993
3994 if (qc)
3995 qc->tag = i;
3996
3997 return qc;
3998}
3999
4000/**
4001 * ata_qc_new_init - Request an available ATA command, and initialize it
4002 * @ap: Port associated with device @dev
4003 * @dev: Device from whom we request an available command structure
4004 *
4005 * LOCKING:
0cba632b 4006 * None.
1da177e4
LT		 4007 */
4008
4009struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4010 struct ata_device *dev)
4011{
4012 struct ata_queued_cmd *qc;
4013
4014 qc = ata_qc_new(ap);
4015 if (qc) {
1da177e4
LT		 4016 qc->scsicmd = NULL;
4017 qc->ap = ap;
4018 qc->dev = dev;
1da177e4 4019
2c13b7ce 4020 ata_qc_reinit(qc);
1da177e4
LT		 4021 }
4022
4023 return qc;
4024}
4025
1da177e4
LT		 4026/**
4027 * ata_qc_free - free unused ata_queued_cmd
4028 * @qc: Command to complete
4029 *
4030 * Designed to free unused ata_queued_cmd object
4031 * in case something prevents using it.
4032 *
4033 * LOCKING:
0cba632b 4034 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4035 */
4036void ata_qc_free(struct ata_queued_cmd *qc)
4037{
4ba946e9
TH		 4038 struct ata_port *ap = qc->ap;
4039 unsigned int tag;
4040
a4631474 4041 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4042
4ba946e9
TH		 4043 qc->flags = 0;
4044 tag = qc->tag;
4045 if (likely(ata_tag_valid(tag))) {
4046 if (tag == ap->active_tag)
4047 ap->active_tag = ATA_TAG_POISON;
4048 qc->tag = ATA_TAG_POISON;
4049 clear_bit(tag, &ap->qactive);
4050 }
1da177e4
LT		 4051}
4052
76014427 4053void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4054{
a4631474
TH		 4055 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4056 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4057
4058 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4059 ata_sg_clean(qc);
4060
3f3791d3
AL		 4061 /* atapi: mark qc as inactive to prevent the interrupt handler
4062 * from completing the command twice later, before the error handler
4063 * is called. (when rc != 0 and atapi request sense is needed)
4064 */
4065 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4066
1da177e4 4067 /* call completion callback */
77853bf2 4068 qc->complete_fn(qc);
1da177e4
LT		 4069}
4070
4071static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4072{
4073 struct ata_port *ap = qc->ap;
4074
4075 switch (qc->tf.protocol) {
4076 case ATA_PROT_DMA:
4077 case ATA_PROT_ATAPI_DMA:
4078 return 1;
4079
4080 case ATA_PROT_ATAPI:
4081 case ATA_PROT_PIO:
1da177e4
LT		 4082 if (ap->flags & ATA_FLAG_PIO_DMA)
4083 return 1;
4084
4085 /* fall through */
4086
4087 default:
4088 return 0;
4089 }
4090
4091 /* never reached */
4092}
4093
4094/**
4095 * ata_qc_issue - issue taskfile to device
4096 * @qc: command to issue to device
4097 *
4098 * Prepare an ATA command to submission to device.
4099 * This includes mapping the data into a DMA-able
4100 * area, filling in the S/G table, and finally
4101 * writing the taskfile to hardware, starting the command.
4102 *
4103 * LOCKING:
4104 * spin_lock_irqsave(host_set lock)
1da177e4 4105 */
8e0e694a 4106void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4107{
4108 struct ata_port *ap = qc->ap;
4109
e4a70e76
TH		 4110 qc->ap->active_tag = qc->tag;
4111 qc->flags |= ATA_QCFLAG_ACTIVE;
4112
1da177e4
LT		 4113 if (ata_should_dma_map(qc)) {
4114 if (qc->flags & ATA_QCFLAG_SG) {
4115 if (ata_sg_setup(qc))
8e436af9 4116 goto sg_err;
1da177e4
LT		 4117 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4118 if (ata_sg_setup_one(qc))
8e436af9 4119 goto sg_err;
1da177e4
LT		 4120 }
4121 } else {
4122 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4123 }
4124
4125 ap->ops->qc_prep(qc);
4126
8e0e694a
TH		 4127 qc->err_mask |= ap->ops->qc_issue(qc);
4128 if (unlikely(qc->err_mask))
4129 goto err;
4130 return;
1da177e4 4131
8e436af9
TH		 4132sg_err:
4133 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4134 qc->err_mask |= AC_ERR_SYSTEM;
4135err:
4136 ata_qc_complete(qc);
1da177e4
LT		 4137}
4138
4139/**
4140 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4141 * @qc: command to issue to device
4142 *
4143 * Using various libata functions and hooks, this function
4144 * starts an ATA command. ATA commands are grouped into
4145 * classes called "protocols", and issuing each type of protocol
4146 * is slightly different.
4147 *
0baab86b
EF		 4148 * May be used as the qc_issue() entry in ata_port_operations.
4149 *
1da177e4
LT		 4150 * LOCKING:
4151 * spin_lock_irqsave(host_set lock)
4152 *
4153 * RETURNS:
9a3d9eb0 4154 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4155 */
4156
9a3d9eb0 4157unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4158{
4159 struct ata_port *ap = qc->ap;
4160
e50362ec
AL		 4161 /* Use polling pio if the LLD doesn't handle
4162 * interrupt driven pio and atapi CDB interrupt.
4163 */
4164 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4165 switch (qc->tf.protocol) {
4166 case ATA_PROT_PIO:
4167 case ATA_PROT_ATAPI:
4168 case ATA_PROT_ATAPI_NODATA:
4169 qc->tf.flags |= ATA_TFLAG_POLLING;
4170 break;
4171 case ATA_PROT_ATAPI_DMA:
4172 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
c2bbc551 4173 /* see ata_check_atapi_dma() */
e50362ec
AL		 4174 BUG();
4175 break;
4176 default:
4177 break;
4178 }
4179 }
4180
312f7da2 4181 /* select the device */
1da177e4
LT		 4182 ata_dev_select(ap, qc->dev->devno, 1, 0);
4183
312f7da2 4184 /* start the command */
1da177e4
LT		 4185 switch (qc->tf.protocol) {
4186 case ATA_PROT_NODATA:
312f7da2
AL		 4187 if (qc->tf.flags & ATA_TFLAG_POLLING)
4188 ata_qc_set_polling(qc);
4189
e5338254 4190 ata_tf_to_host(ap, &qc->tf);
312f7da2
AL		 4191 ap->hsm_task_state = HSM_ST_LAST;
4192
4193 if (qc->tf.flags & ATA_TFLAG_POLLING)
46e202ec 4194 ata_port_queue_task(ap, ata_pio_task, ap, 0);
312f7da2 4195
1da177e4
LT		 4196 break;
4197
4198 case ATA_PROT_DMA:
587005de 4199 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 4200
1da177e4
LT		 4201 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4202 ap->ops->bmdma_setup(qc); /* set up bmdma */
4203 ap->ops->bmdma_start(qc); /* initiate bmdma */
312f7da2 4204 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 4205 break;
4206
312f7da2
AL		 4207 case ATA_PROT_PIO:
4208 if (qc->tf.flags & ATA_TFLAG_POLLING)
4209 ata_qc_set_polling(qc);
4210
e5338254 4211 ata_tf_to_host(ap, &qc->tf);
312f7da2 4212
54f00389
AL		 4213 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4214 /* PIO data out protocol */
4215 ap->hsm_task_state = HSM_ST_FIRST;
ce1e7a2a 4216 ata_port_queue_task(ap, ata_pio_task, ap, 0);
54f00389
AL		 4217
4218 /* always send first data block using
e27486db 4219 * the ata_pio_task() codepath.
54f00389 4220 */
312f7da2 4221 } else {
54f00389
AL		 4222 /* PIO data in protocol */
4223 ap->hsm_task_state = HSM_ST;
4224
4225 if (qc->tf.flags & ATA_TFLAG_POLLING)
ce1e7a2a 4226 ata_port_queue_task(ap, ata_pio_task, ap, 0);
54f00389
AL		 4227
4228 /* if polling, ata_pio_task() handles the rest.
4229 * otherwise, interrupt handler takes over from here.
4230 */
312f7da2
AL		 4231 }
4232
1da177e4
LT		 4233 break;
4234
4235 case ATA_PROT_ATAPI:
1da177e4 4236 case ATA_PROT_ATAPI_NODATA:
312f7da2
AL		 4237 if (qc->tf.flags & ATA_TFLAG_POLLING)
4238 ata_qc_set_polling(qc);
4239
e5338254 4240 ata_tf_to_host(ap, &qc->tf);
f6ef65e6 4241
312f7da2
AL		 4242 ap->hsm_task_state = HSM_ST_FIRST;
4243
4244 /* send cdb by polling if no cdb interrupt */
4245 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4246 (qc->tf.flags & ATA_TFLAG_POLLING))
13ee4628 4247 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4248 break;
4249
4250 case ATA_PROT_ATAPI_DMA:
587005de 4251 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 4252
1da177e4
LT		 4253 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4254 ap->ops->bmdma_setup(qc); /* set up bmdma */
312f7da2
AL		 4255 ap->hsm_task_state = HSM_ST_FIRST;
4256
4257 /* send cdb by polling if no cdb interrupt */
4258 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
13ee4628 4259 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4260 break;
4261
4262 default:
4263 WARN_ON(1);
9a3d9eb0 4264 return AC_ERR_SYSTEM;
1da177e4
LT		 4265 }
4266
4267 return 0;
4268}
4269
1da177e4
LT		 4270/**
4271 * ata_host_intr - Handle host interrupt for given (port, task)
4272 * @ap: Port on which interrupt arrived (possibly...)
4273 * @qc: Taskfile currently active in engine
4274 *
4275 * Handle host interrupt for given queued command. Currently,
4276 * only DMA interrupts are handled. All other commands are
4277 * handled via polling with interrupts disabled (nIEN bit).
4278 *
4279 * LOCKING:
4280 * spin_lock_irqsave(host_set lock)
4281 *
4282 * RETURNS:
4283 * One if interrupt was handled, zero if not (shared irq).
4284 */
4285
4286inline unsigned int ata_host_intr (struct ata_port *ap,
4287 struct ata_queued_cmd *qc)
4288{
312f7da2 4289 u8 status, host_stat = 0;
1da177e4 4290
312f7da2
AL		 4291 VPRINTK("ata%u: protocol %d task_state %d\n",
4292 ap->id, qc->tf.protocol, ap->hsm_task_state);
1da177e4 4293
312f7da2
AL		 4294 /* Check whether we are expecting interrupt in this state */
4295 switch (ap->hsm_task_state) {
4296 case HSM_ST_FIRST:
6912ccd5
AL		 4297 /* Some pre-ATAPI-4 devices assert INTRQ
4298 * at this state when ready to receive CDB.
4299 */
4300
312f7da2
AL		 4301 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4302 * The flag was turned on only for atapi devices.
4303 * No need to check is_atapi_taskfile(&qc->tf) again.
4304 */
4305 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1da177e4 4306 goto idle_irq;
312f7da2
AL		 4307 break;
4308 case HSM_ST_LAST:
4309 if (qc->tf.protocol == ATA_PROT_DMA ||
4310 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4311 /* check status of DMA engine */
4312 host_stat = ap->ops->bmdma_status(ap);
4313 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4314
4315 /* if it's not our irq... */
4316 if (!(host_stat & ATA_DMA_INTR))
4317 goto idle_irq;
4318
4319 /* before we do anything else, clear DMA-Start bit */
4320 ap->ops->bmdma_stop(qc);
a4f16610
AL		 4321
4322 if (unlikely(host_stat & ATA_DMA_ERR)) {
4323 /* error when transfering data to/from memory */
4324 qc->err_mask |= AC_ERR_HOST_BUS;
4325 ap->hsm_task_state = HSM_ST_ERR;
4326 }
312f7da2
AL		 4327 }
4328 break;
4329 case HSM_ST:
4330 break;
4331 default:
4332 goto idle_irq;
4333 }
1da177e4 4334
312f7da2
AL		 4335 /* check altstatus */
4336 status = ata_altstatus(ap);
4337 if (status & ATA_BUSY)
4338 goto idle_irq;
1da177e4 4339
312f7da2
AL		 4340 /* check main status, clearing INTRQ */
4341 status = ata_chk_status(ap);
4342 if (unlikely(status & ATA_BUSY))
4343 goto idle_irq;
1da177e4 4344
312f7da2
AL		 4345 /* ack bmdma irq events */
4346 ap->ops->irq_clear(ap);
1da177e4 4347
bb5cb290 4348 ata_hsm_move(ap, qc, status, 0);
1da177e4
LT		 4349 return 1; /* irq handled */
4350
4351idle_irq:
4352 ap->stats.idle_irq++;
4353
4354#ifdef ATA_IRQ_TRAP
4355 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4356 ata_irq_ack(ap, 0); /* debug trap */
4357 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4358 return 1;
1da177e4
LT		 4359 }
4360#endif
4361 return 0; /* irq not handled */
4362}
4363
4364/**
4365 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4366 * @irq: irq line (unused)
4367 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4368 * @regs: unused
4369 *
0cba632b
JG		 4370 * Default interrupt handler for PCI IDE devices. Calls
4371 * ata_host_intr() for each port that is not disabled.
4372 *
1da177e4 4373 * LOCKING:
0cba632b 4374 * Obtains host_set lock during operation.
1da177e4
LT		 4375 *
4376 * RETURNS:
0cba632b 4377 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4378 */
4379
4380irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4381{
4382 struct ata_host_set *host_set = dev_instance;
4383 unsigned int i;
4384 unsigned int handled = 0;
4385 unsigned long flags;
4386
4387 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4388 spin_lock_irqsave(&host_set->lock, flags);
4389
4390 for (i = 0; i < host_set->n_ports; i++) {
4391 struct ata_port *ap;
4392
4393 ap = host_set->ports[i];
c1389503 4394 if (ap &&
312f7da2 4395 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
1da177e4
LT		 4396 struct ata_queued_cmd *qc;
4397
4398 qc = ata_qc_from_tag(ap, ap->active_tag);
312f7da2 4399 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
21b1ed74 4400 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4401 handled |= ata_host_intr(ap, qc);
4402 }
4403 }
4404
4405 spin_unlock_irqrestore(&host_set->lock, flags);
4406
4407 return IRQ_RETVAL(handled);
4408}
4409
0baab86b 4410
9b847548
JA		 4411/*
4412 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4413 * without filling any other registers
4414 */
4415static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4416 u8 cmd)
4417{
4418 struct ata_taskfile tf;
4419 int err;
4420
4421 ata_tf_init(ap, &tf, dev->devno);
4422
4423 tf.command = cmd;
4424 tf.flags |= ATA_TFLAG_DEVICE;
4425 tf.protocol = ATA_PROT_NODATA;
4426
4427 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4428 if (err)
4429 printk(KERN_ERR "%s: ata command failed: %d\n",
4430 __FUNCTION__, err);
4431
4432 return err;
4433}
4434
4435static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4436{
4437 u8 cmd;
4438
4439 if (!ata_try_flush_cache(dev))
4440 return 0;
4441
4442 if (ata_id_has_flush_ext(dev->id))
4443 cmd = ATA_CMD_FLUSH_EXT;
4444 else
4445 cmd = ATA_CMD_FLUSH;
4446
4447 return ata_do_simple_cmd(ap, dev, cmd);
4448}
4449
4450static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4451{
4452 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4453}
4454
4455static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4456{
4457 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4458}
4459
4460/**
4461 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4462 * @ap: port the device is connected to
4463 * @dev: the device to resume
9b847548
JA		 4464 *
4465 * Kick the drive back into action, by sending it an idle immediate
4466 * command and making sure its transfer mode matches between drive
4467 * and host.
4468 *
4469 */
4470int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4471{
4472 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4473 struct ata_device *failed_dev;
9b847548 4474 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4475 while (ata_set_mode(ap, &failed_dev))
4476 ata_dev_disable(ap, failed_dev);
9b847548 4477 }
e1211e3f 4478 if (!ata_dev_enabled(dev))
9b847548
JA		 4479 return 0;
4480 if (dev->class == ATA_DEV_ATA)
4481 ata_start_drive(ap, dev);
4482
4483 return 0;
4484}
4485
4486/**
4487 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4488 * @ap: port the device is connected to
4489 * @dev: the device to suspend
9b847548
JA		 4490 *
4491 * Flush the cache on the drive, if appropriate, then issue a
4492 * standbynow command.
9b847548 4493 */
082776e4 4494int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4495{
e1211e3f 4496 if (!ata_dev_enabled(dev))
9b847548
JA		 4497 return 0;
4498 if (dev->class == ATA_DEV_ATA)
4499 ata_flush_cache(ap, dev);
4500
082776e4
NC		 4501 if (state.event != PM_EVENT_FREEZE)
4502 ata_standby_drive(ap, dev);
9b847548
JA		 4503 ap->flags |= ATA_FLAG_SUSPENDED;
4504 return 0;
4505}
4506
332b5a52
AL		 4507/**
4508 * ata_port_start - Set port up for dma.
4509 * @ap: Port to initialize
4510 *
4511 * Called just after data structures for each port are
4512 * initialized. Allocates space for PRD table.
4513 *
4514 * May be used as the port_start() entry in ata_port_operations.
4515 *
4516 * LOCKING:
4517 * Inherited from caller.
4518 */
4519
1da177e4
LT		 4520int ata_port_start (struct ata_port *ap)
4521{
2f1f610b 4522 struct device *dev = ap->dev;
6037d6bb 4523 int rc;
1da177e4
LT		 4524
4525 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4526 if (!ap->prd)
4527 return -ENOMEM;
4528
6037d6bb
JG		 4529 rc = ata_pad_alloc(ap, dev);
4530 if (rc) {
cedc9a47 4531 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4532 return rc;
cedc9a47
JG		 4533 }
4534
1da177e4
LT		 4535 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4536
4537 return 0;
4538}
4539
0baab86b
EF		 4540
4541/**
4542 * ata_port_stop - Undo ata_port_start()
4543 * @ap: Port to shut down
4544 *
4545 * Frees the PRD table.
4546 *
4547 * May be used as the port_stop() entry in ata_port_operations.
4548 *
4549 * LOCKING:
6f0ef4fa 4550 * Inherited from caller.
0baab86b
EF		 4551 */
4552
1da177e4
LT		 4553void ata_port_stop (struct ata_port *ap)
4554{
2f1f610b 4555 struct device *dev = ap->dev;
1da177e4
LT		 4556
4557 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4558 ata_pad_free(ap, dev);
1da177e4
LT		 4559}
4560
aa8f0dc6
JG		 4561void ata_host_stop (struct ata_host_set *host_set)
4562{
4563 if (host_set->mmio_base)
4564 iounmap(host_set->mmio_base);
4565}
4566
4567
1da177e4
LT		 4568/**
4569 * ata_host_remove - Unregister SCSI host structure with upper layers
4570 * @ap: Port to unregister
4571 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4572 *
4573 * LOCKING:
6f0ef4fa 4574 * Inherited from caller.
1da177e4
LT		 4575 */
4576
4577static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4578{
4579 struct Scsi_Host *sh = ap->host;
4580
4581 DPRINTK("ENTER\n");
4582
4583 if (do_unregister)
4584 scsi_remove_host(sh);
4585
4586 ap->ops->port_stop(ap);
4587}
4588
4589/**
4590 * ata_host_init - Initialize an ata_port structure
4591 * @ap: Structure to initialize
4592 * @host: associated SCSI mid-layer structure
4593 * @host_set: Collection of hosts to which @ap belongs
4594 * @ent: Probe information provided by low-level driver
4595 * @port_no: Port number associated with this ata_port
4596 *
0cba632b
JG		 4597 * Initialize a new ata_port structure, and its associated
4598 * scsi_host.
4599 *
1da177e4 4600 * LOCKING:
0cba632b 4601 * Inherited from caller.
1da177e4
LT		 4602 */
4603
4604static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4605 struct ata_host_set *host_set,
057ace5e 4606 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4607{
4608 unsigned int i;
4609
4610 host->max_id = 16;
4611 host->max_lun = 1;
4612 host->max_channel = 1;
4613 host->unique_id = ata_unique_id++;
4614 host->max_cmd_len = 12;
12413197 4615
1da177e4
LT		 4616 ap->flags = ATA_FLAG_PORT_DISABLED;
4617 ap->id = host->unique_id;
4618 ap->host = host;
4619 ap->ctl = ATA_DEVCTL_OBS;
4620 ap->host_set = host_set;
2f1f610b 4621 ap->dev = ent->dev;
1da177e4
LT		 4622 ap->port_no = port_no;
4623 ap->hard_port_no =
4624 ent->legacy_mode ? ent->hard_port_no : port_no;
4625 ap->pio_mask = ent->pio_mask;
4626 ap->mwdma_mask = ent->mwdma_mask;
4627 ap->udma_mask = ent->udma_mask;
4628 ap->flags |= ent->host_flags;
4629 ap->ops = ent->port_ops;
4630 ap->cbl = ATA_CBL_NONE;
4631 ap->active_tag = ATA_TAG_POISON;
4632 ap->last_ctl = 0xFF;
4633
86e45b6b 4634 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4635 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4636
acf356b1
TH		 4637 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4638 struct ata_device *dev = &ap->device[i];
4639 dev->devno = i;
4640 dev->pio_mask = UINT_MAX;
4641 dev->mwdma_mask = UINT_MAX;
4642 dev->udma_mask = UINT_MAX;
4643 }
1da177e4
LT		 4644
4645#ifdef ATA_IRQ_TRAP
4646 ap->stats.unhandled_irq = 1;
4647 ap->stats.idle_irq = 1;
4648#endif
4649
4650 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4651}
4652
4653/**
4654 * ata_host_add - Attach low-level ATA driver to system
4655 * @ent: Information provided by low-level driver
4656 * @host_set: Collections of ports to which we add
4657 * @port_no: Port number associated with this host
4658 *
0cba632b
JG		 4659 * Attach low-level ATA driver to system.
4660 *
1da177e4 4661 * LOCKING:
0cba632b 4662 * PCI/etc. bus probe sem.
1da177e4
LT		 4663 *
4664 * RETURNS:
0cba632b 4665 * New ata_port on success, for NULL on error.
1da177e4
LT		 4666 */
4667
057ace5e 4668static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4669 struct ata_host_set *host_set,
4670 unsigned int port_no)
4671{
4672 struct Scsi_Host *host;
4673 struct ata_port *ap;
4674 int rc;
4675
4676 DPRINTK("ENTER\n");
aec5c3c1
TH		 4677
4678 if (!ent->port_ops->probe_reset &&
4679 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4680 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4681 port_no);
4682 return NULL;
4683 }
4684
1da177e4
LT		 4685 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4686 if (!host)
4687 return NULL;
4688
30afc84c
TH		 4689 host->transportt = &ata_scsi_transport_template;
4690
1da177e4
LT		 4691 ap = (struct ata_port *) &host->hostdata[0];
4692
4693 ata_host_init(ap, host, host_set, ent, port_no);
4694
4695 rc = ap->ops->port_start(ap);
4696 if (rc)
4697 goto err_out;
4698
4699 return ap;
4700
4701err_out:
4702 scsi_host_put(host);
4703 return NULL;
4704}
4705
4706/**
0cba632b
JG		 4707 * ata_device_add - Register hardware device with ATA and SCSI layers
4708 * @ent: Probe information describing hardware device to be registered
4709 *
4710 * This function processes the information provided in the probe
4711 * information struct @ent, allocates the necessary ATA and SCSI
4712 * host information structures, initializes them, and registers
4713 * everything with requisite kernel subsystems.
4714 *
4715 * This function requests irqs, probes the ATA bus, and probes
4716 * the SCSI bus.
1da177e4
LT		 4717 *
4718 * LOCKING:
0cba632b 4719 * PCI/etc. bus probe sem.
1da177e4
LT		 4720 *
4721 * RETURNS:
0cba632b 4722 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4723 */
4724
057ace5e 4725int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4726{
4727 unsigned int count = 0, i;
4728 struct device *dev = ent->dev;
4729 struct ata_host_set *host_set;
4730
4731 DPRINTK("ENTER\n");
4732 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4733 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4734 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4735 if (!host_set)
4736 return 0;
1da177e4
LT		 4737 spin_lock_init(&host_set->lock);
4738
4739 host_set->dev = dev;
4740 host_set->n_ports = ent->n_ports;
4741 host_set->irq = ent->irq;
4742 host_set->mmio_base = ent->mmio_base;
4743 host_set->private_data = ent->private_data;
4744 host_set->ops = ent->port_ops;
5444a6f4 4745 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4746
4747 /* register each port bound to this device */
4748 for (i = 0; i < ent->n_ports; i++) {
4749 struct ata_port *ap;
4750 unsigned long xfer_mode_mask;
4751
4752 ap = ata_host_add(ent, host_set, i);
4753 if (!ap)
4754 goto err_out;
4755
4756 host_set->ports[i] = ap;
4757 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4758 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4759 (ap->pio_mask << ATA_SHIFT_PIO);
4760
4761 /* print per-port info to dmesg */
4762 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4763 "bmdma 0x%lX irq %lu\n",
4764 ap->id,
4765 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4766 ata_mode_string(xfer_mode_mask),
4767 ap->ioaddr.cmd_addr,
4768 ap->ioaddr.ctl_addr,
4769 ap->ioaddr.bmdma_addr,
4770 ent->irq);
4771
4772 ata_chk_status(ap);
4773 host_set->ops->irq_clear(ap);
4774 count++;
4775 }
4776
57f3bda8
RD		 4777 if (!count)
4778 goto err_free_ret;
1da177e4
LT		 4779
4780 /* obtain irq, that is shared between channels */
4781 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4782 DRV_NAME, host_set))
4783 goto err_out;
4784
4785 /* perform each probe synchronously */
4786 DPRINTK("probe begin\n");
4787 for (i = 0; i < count; i++) {
4788 struct ata_port *ap;
4789 int rc;
4790
4791 ap = host_set->ports[i];
4792
c893a3ae 4793 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4794 rc = ata_bus_probe(ap);
c893a3ae 4795 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4796
4797 if (rc) {
4798 /* FIXME: do something useful here?
4799 * Current libata behavior will
4800 * tear down everything when
4801 * the module is removed
4802 * or the h/w is unplugged.
4803 */
4804 }
4805
4806 rc = scsi_add_host(ap->host, dev);
4807 if (rc) {
4808 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4809 ap->id);
4810 /* FIXME: do something useful here */
4811 /* FIXME: handle unconditional calls to
4812 * scsi_scan_host and ata_host_remove, below,
4813 * at the very least
4814 */
4815 }
4816 }
4817
4818 /* probes are done, now scan each port's disk(s) */
c893a3ae 4819 DPRINTK("host probe begin\n");
1da177e4
LT		 4820 for (i = 0; i < count; i++) {
4821 struct ata_port *ap = host_set->ports[i];
4822
644dd0cc 4823 ata_scsi_scan_host(ap);
1da177e4
LT		 4824 }
4825
4826 dev_set_drvdata(dev, host_set);
4827
4828 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4829 return ent->n_ports; /* success */
4830
4831err_out:
4832 for (i = 0; i < count; i++) {
4833 ata_host_remove(host_set->ports[i], 1);
4834 scsi_host_put(host_set->ports[i]->host);
4835 }
57f3bda8 4836err_free_ret:
1da177e4
LT		 4837 kfree(host_set);
4838 VPRINTK("EXIT, returning 0\n");
4839 return 0;
4840}
4841
17b14451
AC		 4842/**
4843 * ata_host_set_remove - PCI layer callback for device removal
4844 * @host_set: ATA host set that was removed
4845 *
2e9edbf8 4846 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4847 * objects.
4848 *
4849 * LOCKING:
4850 * Inherited from calling layer (may sleep).
4851 */
4852
17b14451
AC		 4853void ata_host_set_remove(struct ata_host_set *host_set)
4854{
4855 struct ata_port *ap;
4856 unsigned int i;
4857
4858 for (i = 0; i < host_set->n_ports; i++) {
4859 ap = host_set->ports[i];
4860 scsi_remove_host(ap->host);
4861 }
4862
4863 free_irq(host_set->irq, host_set);
4864
4865 for (i = 0; i < host_set->n_ports; i++) {
4866 ap = host_set->ports[i];
4867
4868 ata_scsi_release(ap->host);
4869
4870 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4871 struct ata_ioports *ioaddr = &ap->ioaddr;
4872
4873 if (ioaddr->cmd_addr == 0x1f0)
4874 release_region(0x1f0, 8);
4875 else if (ioaddr->cmd_addr == 0x170)
4876 release_region(0x170, 8);
4877 }
4878
4879 scsi_host_put(ap->host);
4880 }
4881
4882 if (host_set->ops->host_stop)
4883 host_set->ops->host_stop(host_set);
4884
4885 kfree(host_set);
4886}
4887
1da177e4
LT		 4888/**
4889 * ata_scsi_release - SCSI layer callback hook for host unload
4890 * @host: libata host to be unloaded
4891 *
4892 * Performs all duties necessary to shut down a libata port...
4893 * Kill port kthread, disable port, and release resources.
4894 *
4895 * LOCKING:
4896 * Inherited from SCSI layer.
4897 *
4898 * RETURNS:
4899 * One.
4900 */
4901
4902int ata_scsi_release(struct Scsi_Host *host)
4903{
4904 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4905 int i;
1da177e4
LT		 4906
4907 DPRINTK("ENTER\n");
4908
4909 ap->ops->port_disable(ap);
4910 ata_host_remove(ap, 0);
d9572b1d
TH		 4911 for (i = 0; i < ATA_MAX_DEVICES; i++)
4912 kfree(ap->device[i].id);
1da177e4
LT		 4913
4914 DPRINTK("EXIT\n");
4915 return 1;
4916}
4917
4918/**
4919 * ata_std_ports - initialize ioaddr with standard port offsets.
4920 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4921 *
4922 * Utility function which initializes data_addr, error_addr,
4923 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4924 * device_addr, status_addr, and command_addr to standard offsets
4925 * relative to cmd_addr.
4926 *
4927 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4928 */
0baab86b 4929
1da177e4
LT		 4930void ata_std_ports(struct ata_ioports *ioaddr)
4931{
4932 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4933 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4934 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4935 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4936 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4937 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4938 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4939 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4940 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4941 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4942}
4943
0baab86b 4944
374b1873
JG		 4945#ifdef CONFIG_PCI
4946
4947void ata_pci_host_stop (struct ata_host_set *host_set)
4948{
4949 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4950
4951 pci_iounmap(pdev, host_set->mmio_base);
4952}
4953
1da177e4
LT		 4954/**
4955 * ata_pci_remove_one - PCI layer callback for device removal
4956 * @pdev: PCI device that was removed
4957 *
4958 * PCI layer indicates to libata via this hook that
6f0ef4fa 4959 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4960 * Handle this by unregistering all objects associated
4961 * with this PCI device. Free those objects. Then finally
4962 * release PCI resources and disable device.
4963 *
4964 * LOCKING:
4965 * Inherited from PCI layer (may sleep).
4966 */
4967
4968void ata_pci_remove_one (struct pci_dev *pdev)
4969{
4970 struct device *dev = pci_dev_to_dev(pdev);
4971 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4972
17b14451 4973 ata_host_set_remove(host_set);
1da177e4
LT		 4974 pci_release_regions(pdev);
4975 pci_disable_device(pdev);
4976 dev_set_drvdata(dev, NULL);
4977}
4978
4979/* move to PCI subsystem */
057ace5e 4980int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4981{
4982 unsigned long tmp = 0;
4983
4984 switch (bits->width) {
4985 case 1: {
4986 u8 tmp8 = 0;
4987 pci_read_config_byte(pdev, bits->reg, &tmp8);
4988 tmp = tmp8;
4989 break;
4990 }
4991 case 2: {
4992 u16 tmp16 = 0;
4993 pci_read_config_word(pdev, bits->reg, &tmp16);
4994 tmp = tmp16;
4995 break;
4996 }
4997 case 4: {
4998 u32 tmp32 = 0;
4999 pci_read_config_dword(pdev, bits->reg, &tmp32);
5000 tmp = tmp32;
5001 break;
5002 }
5003
5004 default:
5005 return -EINVAL;
5006 }
5007
5008 tmp &= bits->mask;
5009
5010 return (tmp == bits->val) ? 1 : 0;
5011}
9b847548
JA		 5012
5013int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5014{
5015 pci_save_state(pdev);
5016 pci_disable_device(pdev);
5017 pci_set_power_state(pdev, PCI_D3hot);
5018 return 0;
5019}
5020
5021int ata_pci_device_resume(struct pci_dev *pdev)
5022{
5023 pci_set_power_state(pdev, PCI_D0);
5024 pci_restore_state(pdev);
5025 pci_enable_device(pdev);
5026 pci_set_master(pdev);
5027 return 0;
5028}
1da177e4
LT		 5029#endif /* CONFIG_PCI */
5030
5031
1da177e4
LT		 5032static int __init ata_init(void)
5033{
5034 ata_wq = create_workqueue("ata");
5035 if (!ata_wq)
5036 return -ENOMEM;
5037
5038 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5039 return 0;
5040}
5041
5042static void __exit ata_exit(void)
5043{
5044 destroy_workqueue(ata_wq);
5045}
5046
5047module_init(ata_init);
5048module_exit(ata_exit);
5049
67846b30
JG		 5050static unsigned long ratelimit_time;
5051static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5052
5053int ata_ratelimit(void)
5054{
5055 int rc;
5056 unsigned long flags;
5057
5058 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5059
5060 if (time_after(jiffies, ratelimit_time)) {
5061 rc = 1;
5062 ratelimit_time = jiffies + (HZ/5);
5063 } else
5064 rc = 0;
5065
5066 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5067
5068 return rc;
5069}
5070
1da177e4
LT		 5071/*
5072 * libata is essentially a library of internal helper functions for
5073 * low-level ATA host controller drivers. As such, the API/ABI is
5074 * likely to change as new drivers are added and updated.
5075 * Do not depend on ABI/API stability.
5076 */
5077
5078EXPORT_SYMBOL_GPL(ata_std_bios_param);
5079EXPORT_SYMBOL_GPL(ata_std_ports);
5080EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5081EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5082EXPORT_SYMBOL_GPL(ata_sg_init);
5083EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5084EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5085EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5086EXPORT_SYMBOL_GPL(ata_eng_timeout);
5087EXPORT_SYMBOL_GPL(ata_tf_load);
5088EXPORT_SYMBOL_GPL(ata_tf_read);
5089EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5090EXPORT_SYMBOL_GPL(ata_std_dev_select);
5091EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5092EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5093EXPORT_SYMBOL_GPL(ata_check_status);
5094EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5095EXPORT_SYMBOL_GPL(ata_exec_command);
5096EXPORT_SYMBOL_GPL(ata_port_start);
5097EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5098EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5099EXPORT_SYMBOL_GPL(ata_interrupt);
5100EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5101EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5102EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5103EXPORT_SYMBOL_GPL(ata_bmdma_start);
5104EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5105EXPORT_SYMBOL_GPL(ata_bmdma_status);
5106EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5107EXPORT_SYMBOL_GPL(ata_port_probe);
5108EXPORT_SYMBOL_GPL(sata_phy_reset);
5109EXPORT_SYMBOL_GPL(__sata_phy_reset);
5110EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5111EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5112EXPORT_SYMBOL_GPL(ata_std_softreset);
5113EXPORT_SYMBOL_GPL(sata_std_hardreset);
5114EXPORT_SYMBOL_GPL(ata_std_postreset);
5115EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5116EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5117EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5118EXPORT_SYMBOL_GPL(ata_dev_classify);
5119EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5120EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5121EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5122EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5123EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5124EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5125EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5126EXPORT_SYMBOL_GPL(ata_scsi_error);
5127EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5128EXPORT_SYMBOL_GPL(ata_scsi_release);
5129EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 5130EXPORT_SYMBOL_GPL(ata_id_string);
5131EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5132EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5133EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5134EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5135
1bc4ccff 5136EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5137EXPORT_SYMBOL_GPL(ata_timing_compute);
5138EXPORT_SYMBOL_GPL(ata_timing_merge);
5139
1da177e4
LT		 5140#ifdef CONFIG_PCI
5141EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5142EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5143EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5144EXPORT_SYMBOL_GPL(ata_pci_init_one);
5145EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5146EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5147EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5148EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5149EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5150#endif /* CONFIG_PCI */
9b847548
JA		 5151
5152EXPORT_SYMBOL_GPL(ata_device_suspend);
5153EXPORT_SYMBOL_GPL(ata_device_resume);
5154EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5155EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux kernel - Deliverables
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