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[PATCH] libata: implement ata_wait_register()
[deliverable/linux.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
83206a29
TH		 68static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
69 struct ata_device *dev);
acf356b1 70static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
418dc1f5 75int atapi_enabled = 1;
1623c81e
JG		 76module_param(atapi_enabled, int, 0444);
77MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
78
95de719a
AL		 79int atapi_dmadir = 0;
80module_param(atapi_dmadir, int, 0444);
81MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
82
c3c013a2
JG		 83int libata_fua = 0;
84module_param_named(fua, libata_fua, int, 0444);
85MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
86
1da177e4
LT		 87MODULE_AUTHOR("Jeff Garzik");
88MODULE_DESCRIPTION("Library module for ATA devices");
89MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
0baab86b 92
1da177e4
LT		 93/**
94 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
95 * @tf: Taskfile to convert
96 * @fis: Buffer into which data will output
97 * @pmp: Port multiplier port
98 *
99 * Converts a standard ATA taskfile to a Serial ATA
100 * FIS structure (Register - Host to Device).
101 *
102 * LOCKING:
103 * Inherited from caller.
104 */
105
057ace5e 106void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 107{
108 fis[0] = 0x27; /* Register - Host to Device FIS */
109 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
110 bit 7 indicates Command FIS */
111 fis[2] = tf->command;
112 fis[3] = tf->feature;
113
114 fis[4] = tf->lbal;
115 fis[5] = tf->lbam;
116 fis[6] = tf->lbah;
117 fis[7] = tf->device;
118
119 fis[8] = tf->hob_lbal;
120 fis[9] = tf->hob_lbam;
121 fis[10] = tf->hob_lbah;
122 fis[11] = tf->hob_feature;
123
124 fis[12] = tf->nsect;
125 fis[13] = tf->hob_nsect;
126 fis[14] = 0;
127 fis[15] = tf->ctl;
128
129 fis[16] = 0;
130 fis[17] = 0;
131 fis[18] = 0;
132 fis[19] = 0;
133}
134
135/**
136 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
137 * @fis: Buffer from which data will be input
138 * @tf: Taskfile to output
139 *
e12a1be6 140 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 141 *
142 * LOCKING:
143 * Inherited from caller.
144 */
145
057ace5e 146void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 147{
148 tf->command = fis[2]; /* status */
149 tf->feature = fis[3]; /* error */
150
151 tf->lbal = fis[4];
152 tf->lbam = fis[5];
153 tf->lbah = fis[6];
154 tf->device = fis[7];
155
156 tf->hob_lbal = fis[8];
157 tf->hob_lbam = fis[9];
158 tf->hob_lbah = fis[10];
159
160 tf->nsect = fis[12];
161 tf->hob_nsect = fis[13];
162}
163
8cbd6df1
AL		 164static const u8 ata_rw_cmds[] = {
165 /* pio multi */
166 ATA_CMD_READ_MULTI,
167 ATA_CMD_WRITE_MULTI,
168 ATA_CMD_READ_MULTI_EXT,
169 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 170 0,
171 0,
172 0,
173 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 174 /* pio */
175 ATA_CMD_PIO_READ,
176 ATA_CMD_PIO_WRITE,
177 ATA_CMD_PIO_READ_EXT,
178 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 179 0,
180 0,
181 0,
182 0,
8cbd6df1
AL		 183 /* dma */
184 ATA_CMD_READ,
185 ATA_CMD_WRITE,
186 ATA_CMD_READ_EXT,
9a3dccc4
TH		 187 ATA_CMD_WRITE_EXT,
188 0,
189 0,
190 0,
191 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 192};
1da177e4
LT		 193
194/**
8cbd6df1
AL		 195 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
196 * @qc: command to examine and configure
1da177e4 197 *
2e9edbf8 198 * Examine the device configuration and tf->flags to calculate
8cbd6df1 199 * the proper read/write commands and protocol to use.
1da177e4
LT		 200 *
201 * LOCKING:
202 * caller.
203 */
9a3dccc4 204int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 205{
8cbd6df1
AL		 206 struct ata_taskfile *tf = &qc->tf;
207 struct ata_device *dev = qc->dev;
9a3dccc4 208 u8 cmd;
1da177e4 209
9a3dccc4 210 int index, fua, lba48, write;
2e9edbf8 211
9a3dccc4 212 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 213 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
214 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 215
8cbd6df1
AL		 216 if (dev->flags & ATA_DFLAG_PIO) {
217 tf->protocol = ATA_PROT_PIO;
9a3dccc4 218 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 219 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
220 /* Unable to use DMA due to host limitation */
221 tf->protocol = ATA_PROT_PIO;
0565c26d 222 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 223 } else {
224 tf->protocol = ATA_PROT_DMA;
9a3dccc4 225 index = 16;
8cbd6df1 226 }
1da177e4 227
9a3dccc4
TH		 228 cmd = ata_rw_cmds[index + fua + lba48 + write];
229 if (cmd) {
230 tf->command = cmd;
231 return 0;
232 }
233 return -1;
1da177e4
LT		 234}
235
cb95d562
TH		 236/**
237 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
238 * @pio_mask: pio_mask
239 * @mwdma_mask: mwdma_mask
240 * @udma_mask: udma_mask
241 *
242 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
243 * unsigned int xfer_mask.
244 *
245 * LOCKING:
246 * None.
247 *
248 * RETURNS:
249 * Packed xfer_mask.
250 */
251static unsigned int ata_pack_xfermask(unsigned int pio_mask,
252 unsigned int mwdma_mask,
253 unsigned int udma_mask)
254{
255 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
256 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
257 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258}
259
c0489e4e
TH		 260/**
261 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
262 * @xfer_mask: xfer_mask to unpack
263 * @pio_mask: resulting pio_mask
264 * @mwdma_mask: resulting mwdma_mask
265 * @udma_mask: resulting udma_mask
266 *
267 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
268 * Any NULL distination masks will be ignored.
269 */
270static void ata_unpack_xfermask(unsigned int xfer_mask,
271 unsigned int *pio_mask,
272 unsigned int *mwdma_mask,
273 unsigned int *udma_mask)
274{
275 if (pio_mask)
276 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
277 if (mwdma_mask)
278 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
279 if (udma_mask)
280 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
281}
282
cb95d562 283static const struct ata_xfer_ent {
be9a50c8 284 int shift, bits;
cb95d562
TH		 285 u8 base;
286} ata_xfer_tbl[] = {
287 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
288 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
289 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
290 { -1, },
291};
292
293/**
294 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
295 * @xfer_mask: xfer_mask of interest
296 *
297 * Return matching XFER_* value for @xfer_mask. Only the highest
298 * bit of @xfer_mask is considered.
299 *
300 * LOCKING:
301 * None.
302 *
303 * RETURNS:
304 * Matching XFER_* value, 0 if no match found.
305 */
306static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
307{
308 int highbit = fls(xfer_mask) - 1;
309 const struct ata_xfer_ent *ent;
310
311 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
312 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
313 return ent->base + highbit - ent->shift;
314 return 0;
315}
316
317/**
318 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
319 * @xfer_mode: XFER_* of interest
320 *
321 * Return matching xfer_mask for @xfer_mode.
322 *
323 * LOCKING:
324 * None.
325 *
326 * RETURNS:
327 * Matching xfer_mask, 0 if no match found.
328 */
329static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
330{
331 const struct ata_xfer_ent *ent;
332
333 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
334 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
335 return 1 << (ent->shift + xfer_mode - ent->base);
336 return 0;
337}
338
339/**
340 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
341 * @xfer_mode: XFER_* of interest
342 *
343 * Return matching xfer_shift for @xfer_mode.
344 *
345 * LOCKING:
346 * None.
347 *
348 * RETURNS:
349 * Matching xfer_shift, -1 if no match found.
350 */
351static int ata_xfer_mode2shift(unsigned int xfer_mode)
352{
353 const struct ata_xfer_ent *ent;
354
355 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
356 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
357 return ent->shift;
358 return -1;
359}
360
1da177e4 361/**
1da7b0d0
TH		 362 * ata_mode_string - convert xfer_mask to string
363 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 364 *
365 * Determine string which represents the highest speed
1da7b0d0 366 * (highest bit in @modemask).
1da177e4
LT		 367 *
368 * LOCKING:
369 * None.
370 *
371 * RETURNS:
372 * Constant C string representing highest speed listed in
1da7b0d0 373 * @mode_mask, or the constant C string "<n/a>".
1da177e4 374 */
1da7b0d0 375static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 376{
75f554bc
TH		 377 static const char * const xfer_mode_str[] = {
378 "PIO0",
379 "PIO1",
380 "PIO2",
381 "PIO3",
382 "PIO4",
383 "MWDMA0",
384 "MWDMA1",
385 "MWDMA2",
386 "UDMA/16",
387 "UDMA/25",
388 "UDMA/33",
389 "UDMA/44",
390 "UDMA/66",
391 "UDMA/100",
392 "UDMA/133",
393 "UDMA7",
394 };
1da7b0d0 395 int highbit;
1da177e4 396
1da7b0d0
TH		 397 highbit = fls(xfer_mask) - 1;
398 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
399 return xfer_mode_str[highbit];
1da177e4 400 return "<n/a>";
1da177e4
LT		 401}
402
4c360c81
TH		 403static const char *sata_spd_string(unsigned int spd)
404{
405 static const char * const spd_str[] = {
406 "1.5 Gbps",
407 "3.0 Gbps",
408 };
409
410 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
411 return "<unknown>";
412 return spd_str[spd - 1];
413}
414
1ad8e7f9 415void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
0b8efb0a 416{
e1211e3f 417 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 418 printk(KERN_WARNING "ata%u: dev %u disabled\n",
419 ap->id, dev->devno);
420 dev->class++;
421 }
422}
423
1da177e4
LT		 424/**
425 * ata_pio_devchk - PATA device presence detection
426 * @ap: ATA channel to examine
427 * @device: Device to examine (starting at zero)
428 *
429 * This technique was originally described in
430 * Hale Landis's ATADRVR (www.ata-atapi.com), and
431 * later found its way into the ATA/ATAPI spec.
432 *
433 * Write a pattern to the ATA shadow registers,
434 * and if a device is present, it will respond by
435 * correctly storing and echoing back the
436 * ATA shadow register contents.
437 *
438 * LOCKING:
439 * caller.
440 */
441
442static unsigned int ata_pio_devchk(struct ata_port *ap,
443 unsigned int device)
444{
445 struct ata_ioports *ioaddr = &ap->ioaddr;
446 u8 nsect, lbal;
447
448 ap->ops->dev_select(ap, device);
449
450 outb(0x55, ioaddr->nsect_addr);
451 outb(0xaa, ioaddr->lbal_addr);
452
453 outb(0xaa, ioaddr->nsect_addr);
454 outb(0x55, ioaddr->lbal_addr);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 nsect = inb(ioaddr->nsect_addr);
460 lbal = inb(ioaddr->lbal_addr);
461
462 if ((nsect == 0x55) && (lbal == 0xaa))
463 return 1; /* we found a device */
464
465 return 0; /* nothing found */
466}
467
468/**
469 * ata_mmio_devchk - PATA device presence detection
470 * @ap: ATA channel to examine
471 * @device: Device to examine (starting at zero)
472 *
473 * This technique was originally described in
474 * Hale Landis's ATADRVR (www.ata-atapi.com), and
475 * later found its way into the ATA/ATAPI spec.
476 *
477 * Write a pattern to the ATA shadow registers,
478 * and if a device is present, it will respond by
479 * correctly storing and echoing back the
480 * ATA shadow register contents.
481 *
482 * LOCKING:
483 * caller.
484 */
485
486static unsigned int ata_mmio_devchk(struct ata_port *ap,
487 unsigned int device)
488{
489 struct ata_ioports *ioaddr = &ap->ioaddr;
490 u8 nsect, lbal;
491
492 ap->ops->dev_select(ap, device);
493
494 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 nsect = readb((void __iomem *) ioaddr->nsect_addr);
504 lbal = readb((void __iomem *) ioaddr->lbal_addr);
505
506 if ((nsect == 0x55) && (lbal == 0xaa))
507 return 1; /* we found a device */
508
509 return 0; /* nothing found */
510}
511
512/**
513 * ata_devchk - PATA device presence detection
514 * @ap: ATA channel to examine
515 * @device: Device to examine (starting at zero)
516 *
517 * Dispatch ATA device presence detection, depending
518 * on whether we are using PIO or MMIO to talk to the
519 * ATA shadow registers.
520 *
521 * LOCKING:
522 * caller.
523 */
524
525static unsigned int ata_devchk(struct ata_port *ap,
526 unsigned int device)
527{
528 if (ap->flags & ATA_FLAG_MMIO)
529 return ata_mmio_devchk(ap, device);
530 return ata_pio_devchk(ap, device);
531}
532
533/**
534 * ata_dev_classify - determine device type based on ATA-spec signature
535 * @tf: ATA taskfile register set for device to be identified
536 *
537 * Determine from taskfile register contents whether a device is
538 * ATA or ATAPI, as per "Signature and persistence" section
539 * of ATA/PI spec (volume 1, sect 5.14).
540 *
541 * LOCKING:
542 * None.
543 *
544 * RETURNS:
545 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
546 * the event of failure.
547 */
548
057ace5e 549unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 550{
551 /* Apple's open source Darwin code hints that some devices only
552 * put a proper signature into the LBA mid/high registers,
553 * So, we only check those. It's sufficient for uniqueness.
554 */
555
556 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
557 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
558 DPRINTK("found ATA device by sig\n");
559 return ATA_DEV_ATA;
560 }
561
562 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
563 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
564 DPRINTK("found ATAPI device by sig\n");
565 return ATA_DEV_ATAPI;
566 }
567
568 DPRINTK("unknown device\n");
569 return ATA_DEV_UNKNOWN;
570}
571
572/**
573 * ata_dev_try_classify - Parse returned ATA device signature
574 * @ap: ATA channel to examine
575 * @device: Device to examine (starting at zero)
b4dc7623 576 * @r_err: Value of error register on completion
1da177e4
LT		 577 *
578 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
579 * an ATA/ATAPI-defined set of values is placed in the ATA
580 * shadow registers, indicating the results of device detection
581 * and diagnostics.
582 *
583 * Select the ATA device, and read the values from the ATA shadow
584 * registers. Then parse according to the Error register value,
585 * and the spec-defined values examined by ata_dev_classify().
586 *
587 * LOCKING:
588 * caller.
b4dc7623
TH		 589 *
590 * RETURNS:
591 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 592 */
593
b4dc7623
TH		 594static unsigned int
595ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 596{
1da177e4
LT		 597 struct ata_taskfile tf;
598 unsigned int class;
599 u8 err;
600
601 ap->ops->dev_select(ap, device);
602
603 memset(&tf, 0, sizeof(tf));
604
1da177e4 605 ap->ops->tf_read(ap, &tf);
0169e284 606 err = tf.feature;
b4dc7623
TH		 607 if (r_err)
608 *r_err = err;
1da177e4
LT		 609
610 /* see if device passed diags */
611 if (err == 1)
612 /* do nothing */ ;
613 else if ((device == 0) && (err == 0x81))
614 /* do nothing */ ;
615 else
b4dc7623 616 return ATA_DEV_NONE;
1da177e4 617
b4dc7623 618 /* determine if device is ATA or ATAPI */
1da177e4 619 class = ata_dev_classify(&tf);
b4dc7623 620
1da177e4 621 if (class == ATA_DEV_UNKNOWN)
b4dc7623 622 return ATA_DEV_NONE;
1da177e4 623 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 624 return ATA_DEV_NONE;
625 return class;
1da177e4
LT		 626}
627
628/**
6a62a04d 629 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 630 * @id: IDENTIFY DEVICE results we will examine
631 * @s: string into which data is output
632 * @ofs: offset into identify device page
633 * @len: length of string to return. must be an even number.
634 *
635 * The strings in the IDENTIFY DEVICE page are broken up into
636 * 16-bit chunks. Run through the string, and output each
637 * 8-bit chunk linearly, regardless of platform.
638 *
639 * LOCKING:
640 * caller.
641 */
642
6a62a04d
TH		 643void ata_id_string(const u16 *id, unsigned char *s,
644 unsigned int ofs, unsigned int len)
1da177e4
LT		 645{
646 unsigned int c;
647
648 while (len > 0) {
649 c = id[ofs] >> 8;
650 *s = c;
651 s++;
652
653 c = id[ofs] & 0xff;
654 *s = c;
655 s++;
656
657 ofs++;
658 len -= 2;
659 }
660}
661
0e949ff3 662/**
6a62a04d 663 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 664 * @id: IDENTIFY DEVICE results we will examine
665 * @s: string into which data is output
666 * @ofs: offset into identify device page
667 * @len: length of string to return. must be an odd number.
668 *
6a62a04d 669 * This function is identical to ata_id_string except that it
0e949ff3
TH		 670 * trims trailing spaces and terminates the resulting string with
671 * null. @len must be actual maximum length (even number) + 1.
672 *
673 * LOCKING:
674 * caller.
675 */
6a62a04d
TH		 676void ata_id_c_string(const u16 *id, unsigned char *s,
677 unsigned int ofs, unsigned int len)
0e949ff3
TH		 678{
679 unsigned char *p;
680
681 WARN_ON(!(len & 1));
682
6a62a04d 683 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 684
685 p = s + strnlen(s, len - 1);
686 while (p > s && p[-1] == ' ')
687 p--;
688 *p = '\0';
689}
0baab86b 690
2940740b
TH		 691static u64 ata_id_n_sectors(const u16 *id)
692{
693 if (ata_id_has_lba(id)) {
694 if (ata_id_has_lba48(id))
695 return ata_id_u64(id, 100);
696 else
697 return ata_id_u32(id, 60);
698 } else {
699 if (ata_id_current_chs_valid(id))
700 return ata_id_u32(id, 57);
701 else
702 return id[1] * id[3] * id[6];
703 }
704}
705
0baab86b
EF		 706/**
707 * ata_noop_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * This function performs no actual function.
712 *
713 * May be used as the dev_select() entry in ata_port_operations.
714 *
715 * LOCKING:
716 * caller.
717 */
1da177e4
LT		 718void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
719{
720}
721
0baab86b 722
1da177e4
LT		 723/**
724 * ata_std_dev_select - Select device 0/1 on ATA bus
725 * @ap: ATA channel to manipulate
726 * @device: ATA device (numbered from zero) to select
727 *
728 * Use the method defined in the ATA specification to
729 * make either device 0, or device 1, active on the
0baab86b
EF		 730 * ATA channel. Works with both PIO and MMIO.
731 *
732 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 733 *
734 * LOCKING:
735 * caller.
736 */
737
738void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739{
740 u8 tmp;
741
742 if (device == 0)
743 tmp = ATA_DEVICE_OBS;
744 else
745 tmp = ATA_DEVICE_OBS | ATA_DEV1;
746
747 if (ap->flags & ATA_FLAG_MMIO) {
748 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
749 } else {
750 outb(tmp, ap->ioaddr.device_addr);
751 }
752 ata_pause(ap); /* needed; also flushes, for mmio */
753}
754
755/**
756 * ata_dev_select - Select device 0/1 on ATA bus
757 * @ap: ATA channel to manipulate
758 * @device: ATA device (numbered from zero) to select
759 * @wait: non-zero to wait for Status register BSY bit to clear
760 * @can_sleep: non-zero if context allows sleeping
761 *
762 * Use the method defined in the ATA specification to
763 * make either device 0, or device 1, active on the
764 * ATA channel.
765 *
766 * This is a high-level version of ata_std_dev_select(),
767 * which additionally provides the services of inserting
768 * the proper pauses and status polling, where needed.
769 *
770 * LOCKING:
771 * caller.
772 */
773
774void ata_dev_select(struct ata_port *ap, unsigned int device,
775 unsigned int wait, unsigned int can_sleep)
776{
777 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
778 ap->id, device, wait);
779
780 if (wait)
781 ata_wait_idle(ap);
782
783 ap->ops->dev_select(ap, device);
784
785 if (wait) {
786 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
787 msleep(150);
788 ata_wait_idle(ap);
789 }
790}
791
792/**
793 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 794 * @id: IDENTIFY DEVICE page to dump
1da177e4 795 *
0bd3300a
TH		 796 * Dump selected 16-bit words from the given IDENTIFY DEVICE
797 * page.
1da177e4
LT		 798 *
799 * LOCKING:
800 * caller.
801 */
802
0bd3300a 803static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 804{
805 DPRINTK("49==0x%04x "
806 "53==0x%04x "
807 "63==0x%04x "
808 "64==0x%04x "
809 "75==0x%04x \n",
0bd3300a
TH		 810 id[49],
811 id[53],
812 id[63],
813 id[64],
814 id[75]);
1da177e4
LT		 815 DPRINTK("80==0x%04x "
816 "81==0x%04x "
817 "82==0x%04x "
818 "83==0x%04x "
819 "84==0x%04x \n",
0bd3300a
TH		 820 id[80],
821 id[81],
822 id[82],
823 id[83],
824 id[84]);
1da177e4
LT		 825 DPRINTK("88==0x%04x "
826 "93==0x%04x\n",
0bd3300a
TH		 827 id[88],
828 id[93]);
1da177e4
LT		 829}
830
cb95d562
TH		 831/**
832 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
833 * @id: IDENTIFY data to compute xfer mask from
834 *
835 * Compute the xfermask for this device. This is not as trivial
836 * as it seems if we must consider early devices correctly.
837 *
838 * FIXME: pre IDE drive timing (do we care ?).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Computed xfermask
845 */
846static unsigned int ata_id_xfermask(const u16 *id)
847{
848 unsigned int pio_mask, mwdma_mask, udma_mask;
849
850 /* Usual case. Word 53 indicates word 64 is valid */
851 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
852 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
853 pio_mask <<= 3;
854 pio_mask |= 0x7;
855 } else {
856 /* If word 64 isn't valid then Word 51 high byte holds
857 * the PIO timing number for the maximum. Turn it into
858 * a mask.
859 */
860 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
861
862 /* But wait.. there's more. Design your standards by
863 * committee and you too can get a free iordy field to
864 * process. However its the speeds not the modes that
865 * are supported... Note drivers using the timing API
866 * will get this right anyway
867 */
868 }
869
870 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 871
872 udma_mask = 0;
873 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
874 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 875
876 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
877}
878
86e45b6b
TH		 879/**
880 * ata_port_queue_task - Queue port_task
881 * @ap: The ata_port to queue port_task for
882 *
883 * Schedule @fn(@data) for execution after @delay jiffies using
884 * port_task. There is one port_task per port and it's the
885 * user(low level driver)'s responsibility to make sure that only
886 * one task is active at any given time.
887 *
888 * libata core layer takes care of synchronization between
889 * port_task and EH. ata_port_queue_task() may be ignored for EH
890 * synchronization.
891 *
892 * LOCKING:
893 * Inherited from caller.
894 */
895void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
896 unsigned long delay)
897{
898 int rc;
899
2e755f68 900 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 901 return;
902
903 PREPARE_WORK(&ap->port_task, fn, data);
904
905 if (!delay)
906 rc = queue_work(ata_wq, &ap->port_task);
907 else
908 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909
910 /* rc == 0 means that another user is using port task */
911 WARN_ON(rc == 0);
912}
913
914/**
915 * ata_port_flush_task - Flush port_task
916 * @ap: The ata_port to flush port_task for
917 *
918 * After this function completes, port_task is guranteed not to
919 * be running or scheduled.
920 *
921 * LOCKING:
922 * Kernel thread context (may sleep)
923 */
924void ata_port_flush_task(struct ata_port *ap)
925{
926 unsigned long flags;
927
928 DPRINTK("ENTER\n");
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 931 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("flush #1\n");
935 flush_workqueue(ata_wq);
936
937 /*
938 * At this point, if a task is running, it's guaranteed to see
939 * the FLUSH flag; thus, it will never queue pio tasks again.
940 * Cancel and flush.
941 */
942 if (!cancel_delayed_work(&ap->port_task)) {
943 DPRINTK("flush #2\n");
944 flush_workqueue(ata_wq);
945 }
946
947 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 948 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
950
951 DPRINTK("EXIT\n");
952}
953
77853bf2 954void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 955{
77853bf2 956 struct completion *waiting = qc->private_data;
a2a7a662 957
77853bf2 958 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 959 complete(waiting);
a2a7a662
TH		 960}
961
962/**
963 * ata_exec_internal - execute libata internal command
964 * @ap: Port to which the command is sent
965 * @dev: Device to which the command is sent
966 * @tf: Taskfile registers for the command and the result
d69cf37d 967 * @cdb: CDB for packet command
a2a7a662
TH		 968 * @dma_dir: Data tranfer direction of the command
969 * @buf: Data buffer of the command
970 * @buflen: Length of data buffer
971 *
972 * Executes libata internal command with timeout. @tf contains
973 * command on entry and result on return. Timeout and error
974 * conditions are reported via return value. No recovery action
975 * is taken after a command times out. It's caller's duty to
976 * clean up after timeout.
977 *
978 * LOCKING:
979 * None. Should be called with kernel context, might sleep.
980 */
981
1ad8e7f9
TH		 982unsigned ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
983 struct ata_taskfile *tf, const u8 *cdb,
984 int dma_dir, void *buf, unsigned int buflen)
a2a7a662
TH		 985{
986 u8 command = tf->command;
987 struct ata_queued_cmd *qc;
988 DECLARE_COMPLETION(wait);
989 unsigned long flags;
77853bf2 990 unsigned int err_mask;
a2a7a662
TH		 991
992 spin_lock_irqsave(&ap->host_set->lock, flags);
993
994 qc = ata_qc_new_init(ap, dev);
995 BUG_ON(qc == NULL);
996
997 qc->tf = *tf;
d69cf37d
TH		 998 if (cdb)
999 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
a2a7a662
TH		 1000 qc->dma_dir = dma_dir;
1001 if (dma_dir != DMA_NONE) {
1002 ata_sg_init_one(qc, buf, buflen);
1003 qc->nsect = buflen / ATA_SECT_SIZE;
1004 }
1005
77853bf2 1006 qc->private_data = &wait;
a2a7a662
TH		 1007 qc->complete_fn = ata_qc_complete_internal;
1008
8e0e694a 1009 ata_qc_issue(qc);
a2a7a662
TH		 1010
1011 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1012
1013 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1014 ata_port_flush_task(ap);
1015
a2a7a662
TH		 1016 spin_lock_irqsave(&ap->host_set->lock, flags);
1017
1018 /* We're racing with irq here. If we lose, the
1019 * following test prevents us from completing the qc
1020 * again. If completion irq occurs after here but
1021 * before the caller cleans up, it will result in a
1022 * spurious interrupt. We can live with that.
1023 */
77853bf2 1024 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1025 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1026 ata_qc_complete(qc);
1027 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1028 ap->id, command);
1029 }
1030
1031 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1032 }
1033
77853bf2
TH		 1034 *tf = qc->tf;
1035 err_mask = qc->err_mask;
1036
1037 ata_qc_free(qc);
1038
1f7dd3e9
TH		 1039 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1040 * Until those drivers are fixed, we detect the condition
1041 * here, fail the command with AC_ERR_SYSTEM and reenable the
1042 * port.
1043 *
1044 * Note that this doesn't change any behavior as internal
1045 * command failure results in disabling the device in the
1046 * higher layer for LLDDs without new reset/EH callbacks.
1047 *
1048 * Kill the following code as soon as those drivers are fixed.
1049 */
198e0fed 1050 if (ap->flags & ATA_FLAG_DISABLED) {
1f7dd3e9
TH		 1051 err_mask |= AC_ERR_SYSTEM;
1052 ata_port_probe(ap);
1053 }
1054
77853bf2 1055 return err_mask;
a2a7a662
TH		 1056}
1057
1bc4ccff
AC		 1058/**
1059 * ata_pio_need_iordy - check if iordy needed
1060 * @adev: ATA device
1061 *
1062 * Check if the current speed of the device requires IORDY. Used
1063 * by various controllers for chip configuration.
1064 */
1065
1066unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1067{
1068 int pio;
1069 int speed = adev->pio_mode - XFER_PIO_0;
1070
1071 if (speed < 2)
1072 return 0;
1073 if (speed > 2)
1074 return 1;
2e9edbf8 1075
1bc4ccff
AC		 1076 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1077
1078 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1079 pio = adev->id[ATA_ID_EIDE_PIO];
1080 /* Is the speed faster than the drive allows non IORDY ? */
1081 if (pio) {
1082 /* This is cycle times not frequency - watch the logic! */
1083 if (pio > 240) /* PIO2 is 240nS per cycle */
1084 return 1;
1085 return 0;
1086 }
1087 }
1088 return 0;
1089}
1090
1da177e4 1091/**
49016aca
TH		 1092 * ata_dev_read_id - Read ID data from the specified device
1093 * @ap: port on which target device resides
1094 * @dev: target device
1095 * @p_class: pointer to class of the target device (may be changed)
1096 * @post_reset: is this read ID post-reset?
d9572b1d 1097 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1098 *
49016aca
TH		 1099 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1100 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1101 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1102 * for pre-ATA4 drives.
1da177e4
LT		 1103 *
1104 * LOCKING:
49016aca
TH		 1105 * Kernel thread context (may sleep)
1106 *
1107 * RETURNS:
1108 * 0 on success, -errno otherwise.
1da177e4 1109 */
49016aca 1110static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1111 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1112{
49016aca 1113 unsigned int class = *p_class;
a0123703 1114 struct ata_taskfile tf;
49016aca 1115 unsigned int err_mask = 0;
d9572b1d 1116 u16 *id;
49016aca
TH		 1117 const char *reason;
1118 int rc;
1da177e4 1119
49016aca 1120 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1121
49016aca 1122 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1123
d9572b1d
TH		 1124 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1125 if (id == NULL) {
1126 rc = -ENOMEM;
1127 reason = "out of memory";
1128 goto err_out;
1129 }
1130
49016aca
TH		 1131 retry:
1132 ata_tf_init(ap, &tf, dev->devno);
a0123703 1133
49016aca
TH		 1134 switch (class) {
1135 case ATA_DEV_ATA:
a0123703 1136 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1137 break;
1138 case ATA_DEV_ATAPI:
a0123703 1139 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1140 break;
1141 default:
1142 rc = -ENODEV;
1143 reason = "unsupported class";
1144 goto err_out;
1da177e4
LT		 1145 }
1146
a0123703 1147 tf.protocol = ATA_PROT_PIO;
1da177e4 1148
d69cf37d 1149 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_FROM_DEVICE,
49016aca 1150 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1151 if (err_mask) {
49016aca
TH		 1152 rc = -EIO;
1153 reason = "I/O error";
1da177e4
LT		 1154 goto err_out;
1155 }
1156
49016aca 1157 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1158
49016aca 1159 /* sanity check */
692785e7 1160 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1161 rc = -EINVAL;
1162 reason = "device reports illegal type";
1163 goto err_out;
1164 }
1165
1166 if (post_reset && class == ATA_DEV_ATA) {
1167 /*
1168 * The exact sequence expected by certain pre-ATA4 drives is:
1169 * SRST RESET
1170 * IDENTIFY
1171 * INITIALIZE DEVICE PARAMETERS
1172 * anything else..
1173 * Some drives were very specific about that exact sequence.
1174 */
1175 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1176 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1177 if (err_mask) {
1178 rc = -EIO;
1179 reason = "INIT_DEV_PARAMS failed";
1180 goto err_out;
1181 }
1182
1183 /* current CHS translation info (id[53-58]) might be
1184 * changed. reread the identify device info.
1185 */
1186 post_reset = 0;
1187 goto retry;
1188 }
1189 }
1190
1191 *p_class = class;
d9572b1d 1192 *p_id = id;
49016aca
TH		 1193 return 0;
1194
1195 err_out:
1196 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1197 ap->id, dev->devno, reason);
d9572b1d 1198 kfree(id);
49016aca
TH		 1199 return rc;
1200}
1201
4b2f3ede
TH		 1202static inline u8 ata_dev_knobble(const struct ata_port *ap,
1203 struct ata_device *dev)
1204{
1205 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1206}
1207
49016aca 1208/**
ffeae418
TH		 1209 * ata_dev_configure - Configure the specified ATA/ATAPI device
1210 * @ap: Port on which target device resides
1211 * @dev: Target device to configure
4c2d721a 1212 * @print_info: Enable device info printout
ffeae418
TH		 1213 *
1214 * Configure @dev according to @dev->id. Generic and low-level
1215 * driver specific fixups are also applied.
49016aca
TH		 1216 *
1217 * LOCKING:
ffeae418
TH		 1218 * Kernel thread context (may sleep)
1219 *
1220 * RETURNS:
1221 * 0 on success, -errno otherwise
49016aca 1222 */
4c2d721a
TH		 1223static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1224 int print_info)
49016aca 1225{
1148c3a7 1226 const u16 *id = dev->id;
ff8854b2 1227 unsigned int xfer_mask;
49016aca
TH		 1228 int i, rc;
1229
e1211e3f 1230 if (!ata_dev_enabled(dev)) {
49016aca 1231 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1232 ap->id, dev->devno);
1233 return 0;
49016aca
TH		 1234 }
1235
ffeae418 1236 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1237
c39f5ebe
TH		 1238 /* print device capabilities */
1239 if (print_info)
1240 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1241 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1242 ap->id, dev->devno, id[49], id[82], id[83],
1243 id[84], id[85], id[86], id[87], id[88]);
1244
208a9933 1245 /* initialize to-be-configured parameters */
ea1dd4e1 1246 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH		 1247 dev->max_sectors = 0;
1248 dev->cdb_len = 0;
1249 dev->n_sectors = 0;
1250 dev->cylinders = 0;
1251 dev->heads = 0;
1252 dev->sectors = 0;
1253
1da177e4
LT		 1254 /*
1255 * common ATA, ATAPI feature tests
1256 */
1257
ff8854b2 1258 /* find max transfer mode; for printk only */
1148c3a7 1259 xfer_mask = ata_id_xfermask(id);
1da177e4 1260
1148c3a7 1261 ata_dump_id(id);
1da177e4
LT		 1262
1263 /* ATA-specific feature tests */
1264 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1265 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1266
1148c3a7 1267 if (ata_id_has_lba(id)) {
4c2d721a 1268 const char *lba_desc;
8bf62ece 1269
4c2d721a
TH		 1270 lba_desc = "LBA";
1271 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1272 if (ata_id_has_lba48(id)) {
8bf62ece 1273 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1274 lba_desc = "LBA48";
1275 }
8bf62ece
AL		 1276
1277 /* print device info to dmesg */
4c2d721a
TH		 1278 if (print_info)
1279 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1280 "max %s, %Lu sectors: %s\n",
1281 ap->id, dev->devno,
1148c3a7 1282 ata_id_major_version(id),
ff8854b2 1283 ata_mode_string(xfer_mask),
4c2d721a
TH		 1284 (unsigned long long)dev->n_sectors,
1285 lba_desc);
ffeae418 1286 } else {
8bf62ece
AL		 1287 /* CHS */
1288
1289 /* Default translation */
1148c3a7
TH		 1290 dev->cylinders = id[1];
1291 dev->heads = id[3];
1292 dev->sectors = id[6];
8bf62ece 1293
1148c3a7 1294 if (ata_id_current_chs_valid(id)) {
8bf62ece 1295 /* Current CHS translation is valid. */
1148c3a7
TH		 1296 dev->cylinders = id[54];
1297 dev->heads = id[55];
1298 dev->sectors = id[56];
8bf62ece
AL		 1299 }
1300
1301 /* print device info to dmesg */
4c2d721a
TH		 1302 if (print_info)
1303 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1304 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1305 ap->id, dev->devno,
1148c3a7 1306 ata_id_major_version(id),
ff8854b2 1307 ata_mode_string(xfer_mask),
4c2d721a
TH		 1308 (unsigned long long)dev->n_sectors,
1309 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1310 }
1311
6e7846e9 1312 dev->cdb_len = 16;
1da177e4
LT		 1313 }
1314
1315 /* ATAPI-specific feature tests */
2c13b7ce 1316 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1317 rc = atapi_cdb_len(id);
1da177e4
LT		 1318 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1319 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1320 rc = -EINVAL;
1da177e4
LT		 1321 goto err_out_nosup;
1322 }
6e7846e9 1323 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1324
1325 /* print device info to dmesg */
4c2d721a
TH		 1326 if (print_info)
1327 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1328 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1329 }
1330
6e7846e9
TH		 1331 ap->host->max_cmd_len = 0;
1332 for (i = 0; i < ATA_MAX_DEVICES; i++)
1333 ap->host->max_cmd_len = max_t(unsigned int,
1334 ap->host->max_cmd_len,
1335 ap->device[i].cdb_len);
1336
4b2f3ede
TH		 1337 /* limit bridge transfers to udma5, 200 sectors */
1338 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1339 if (print_info)
1340 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1341 ap->id, dev->devno);
5a529139 1342 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1343 dev->max_sectors = ATA_MAX_SECTORS;
1344 }
1345
1346 if (ap->ops->dev_config)
1347 ap->ops->dev_config(ap, dev);
1348
1da177e4 1349 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1350 return 0;
1da177e4
LT		 1351
1352err_out_nosup:
1da177e4 1353 DPRINTK("EXIT, err\n");
ffeae418 1354 return rc;
1da177e4
LT		 1355}
1356
1357/**
1358 * ata_bus_probe - Reset and probe ATA bus
1359 * @ap: Bus to probe
1360 *
0cba632b
JG		 1361 * Master ATA bus probing function. Initiates a hardware-dependent
1362 * bus reset, then attempts to identify any devices found on
1363 * the bus.
1364 *
1da177e4 1365 * LOCKING:
0cba632b 1366 * PCI/etc. bus probe sem.
1da177e4
LT		 1367 *
1368 * RETURNS:
96072e69 1369 * Zero on success, negative errno otherwise.
1da177e4
LT		 1370 */
1371
1372static int ata_bus_probe(struct ata_port *ap)
1373{
28ca5c57 1374 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1
TH		 1375 int tries[ATA_MAX_DEVICES];
1376 int i, rc, down_xfermask;
e82cbdb9 1377 struct ata_device *dev;
1da177e4 1378
28ca5c57 1379 ata_port_probe(ap);
c19ba8af 1380
14d2bac1
TH		 1381 for (i = 0; i < ATA_MAX_DEVICES; i++)
1382 tries[i] = ATA_PROBE_MAX_TRIES;
1383
1384 retry:
1385 down_xfermask = 0;
1386
2044470c
TH		 1387 /* reset and determine device classes */
1388 for (i = 0; i < ATA_MAX_DEVICES; i++)
1389 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1390
2044470c 1391 if (ap->ops->probe_reset) {
c19ba8af 1392 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1393 if (rc) {
1394 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1395 return rc;
c19ba8af 1396 }
28ca5c57 1397 } else {
c19ba8af
TH		 1398 ap->ops->phy_reset(ap);
1399
198e0fed 1400 if (!(ap->flags & ATA_FLAG_DISABLED))
2044470c 1401 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1402 classes[i] = ap->device[i].class;
2044470c 1403
28ca5c57
TH		 1404 ata_port_probe(ap);
1405 }
1da177e4 1406
2044470c
TH		 1407 for (i = 0; i < ATA_MAX_DEVICES; i++)
1408 if (classes[i] == ATA_DEV_UNKNOWN)
1409 classes[i] = ATA_DEV_NONE;
1410
28ca5c57 1411 /* read IDENTIFY page and configure devices */
1da177e4 1412 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1413 dev = &ap->device[i];
28ca5c57
TH		 1414 dev->class = classes[i];
1415
14d2bac1
TH		 1416 if (!tries[i]) {
1417 ata_down_xfermask_limit(ap, dev, 1);
1418 ata_dev_disable(ap, dev);
ffeae418
TH		 1419 }
1420
14d2bac1 1421 if (!ata_dev_enabled(dev))
ffeae418 1422 continue;
ffeae418 1423
14d2bac1
TH		 1424 kfree(dev->id);
1425 dev->id = NULL;
1426 rc = ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id);
1427 if (rc)
1428 goto fail;
1429
1430 rc = ata_dev_configure(ap, dev, 1);
1431 if (rc)
1432 goto fail;
1da177e4
LT		 1433 }
1434
e82cbdb9
TH		 1435 /* configure transfer mode */
1436 if (ap->ops->set_mode) {
1437 /* FIXME: make ->set_mode handle no device case and
1438 * return error code and failing device on failure as
1439 * ata_set_mode() does.
1440 */
14d2bac1
TH		 1441 for (i = 0; i < ATA_MAX_DEVICES; i++)
1442 if (ata_dev_enabled(&ap->device[i])) {
1443 ap->ops->set_mode(ap);
1444 break;
1445 }
e82cbdb9
TH		 1446 rc = 0;
1447 } else {
14d2bac1
TH		 1448 rc = ata_set_mode(ap, &dev);
1449 if (rc) {
1450 down_xfermask = 1;
1451 goto fail;
1452 }
e82cbdb9 1453 }
1da177e4 1454
e82cbdb9
TH		 1455 for (i = 0; i < ATA_MAX_DEVICES; i++)
1456 if (ata_dev_enabled(&ap->device[i]))
1457 return 0;
1da177e4 1458
e82cbdb9
TH		 1459 /* no device present, disable port */
1460 ata_port_disable(ap);
1da177e4 1461 ap->ops->port_disable(ap);
96072e69 1462 return -ENODEV;
14d2bac1
TH		 1463
1464 fail:
1465 switch (rc) {
1466 case -EINVAL:
1467 case -ENODEV:
1468 tries[dev->devno] = 0;
1469 break;
1470 case -EIO:
1471 ata_down_sata_spd_limit(ap);
1472 /* fall through */
1473 default:
1474 tries[dev->devno]--;
1475 if (down_xfermask &&
1476 ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
1477 tries[dev->devno] = 0;
1478 }
1479
1480 goto retry;
1da177e4
LT		 1481}
1482
1483/**
0cba632b
JG		 1484 * ata_port_probe - Mark port as enabled
1485 * @ap: Port for which we indicate enablement
1da177e4 1486 *
0cba632b
JG		 1487 * Modify @ap data structure such that the system
1488 * thinks that the entire port is enabled.
1489 *
1490 * LOCKING: host_set lock, or some other form of
1491 * serialization.
1da177e4
LT		 1492 */
1493
1494void ata_port_probe(struct ata_port *ap)
1495{
198e0fed 1496 ap->flags &= ~ATA_FLAG_DISABLED;
1da177e4
LT		 1497}
1498
3be680b7
TH		 1499/**
1500 * sata_print_link_status - Print SATA link status
1501 * @ap: SATA port to printk link status about
1502 *
1503 * This function prints link speed and status of a SATA link.
1504 *
1505 * LOCKING:
1506 * None.
1507 */
1508static void sata_print_link_status(struct ata_port *ap)
1509{
6d5f9732 1510 u32 sstatus, scontrol, tmp;
3be680b7
TH		 1511
1512 if (!ap->ops->scr_read)
1513 return;
1514
1515 sstatus = scr_read(ap, SCR_STATUS);
6d5f9732 1516 scontrol = scr_read(ap, SCR_CONTROL);
3be680b7
TH		 1517
1518 if (sata_dev_present(ap)) {
1519 tmp = (sstatus >> 4) & 0xf;
6d5f9732
TH		 1520 printk(KERN_INFO
1521 "ata%u: SATA link up %s (SStatus %X SControl %X)\n",
1522 ap->id, sata_spd_string(tmp), sstatus, scontrol);
3be680b7 1523 } else {
6d5f9732
TH		 1524 printk(KERN_INFO
1525 "ata%u: SATA link down (SStatus %X SControl %X)\n",
1526 ap->id, sstatus, scontrol);
3be680b7
TH		 1527 }
1528}
1529
1da177e4 1530/**
780a87f7
JG		 1531 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1532 * @ap: SATA port associated with target SATA PHY.
1da177e4 1533 *
780a87f7
JG		 1534 * This function issues commands to standard SATA Sxxx
1535 * PHY registers, to wake up the phy (and device), and
1536 * clear any reset condition.
1da177e4
LT		 1537 *
1538 * LOCKING:
0cba632b 1539 * PCI/etc. bus probe sem.
1da177e4
LT		 1540 *
1541 */
1542void __sata_phy_reset(struct ata_port *ap)
1543{
1544 u32 sstatus;
1545 unsigned long timeout = jiffies + (HZ * 5);
1546
1547 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1548 /* issue phy wake/reset */
1549 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1550 /* Couldn't find anything in SATA I/II specs, but
1551 * AHCI-1.1 10.4.2 says at least 1 ms. */
1552 mdelay(1);
1da177e4 1553 }
cdcca89e 1554 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1555
1556 /* wait for phy to become ready, if necessary */
1557 do {
1558 msleep(200);
1559 sstatus = scr_read(ap, SCR_STATUS);
1560 if ((sstatus & 0xf) != 1)
1561 break;
1562 } while (time_before(jiffies, timeout));
1563
3be680b7
TH		 1564 /* print link status */
1565 sata_print_link_status(ap);
656563e3 1566
3be680b7
TH		 1567 /* TODO: phy layer with polling, timeouts, etc. */
1568 if (sata_dev_present(ap))
1da177e4 1569 ata_port_probe(ap);
3be680b7 1570 else
1da177e4 1571 ata_port_disable(ap);
1da177e4 1572
198e0fed 1573 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1574 return;
1575
1576 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1577 ata_port_disable(ap);
1578 return;
1579 }
1580
1581 ap->cbl = ATA_CBL_SATA;
1582}
1583
1584/**
780a87f7
JG		 1585 * sata_phy_reset - Reset SATA bus.
1586 * @ap: SATA port associated with target SATA PHY.
1da177e4 1587 *
780a87f7
JG		 1588 * This function resets the SATA bus, and then probes
1589 * the bus for devices.
1da177e4
LT		 1590 *
1591 * LOCKING:
0cba632b 1592 * PCI/etc. bus probe sem.
1da177e4
LT		 1593 *
1594 */
1595void sata_phy_reset(struct ata_port *ap)
1596{
1597 __sata_phy_reset(ap);
198e0fed 1598 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1599 return;
1600 ata_bus_reset(ap);
1601}
1602
ebdfca6e
AC		 1603/**
1604 * ata_dev_pair - return other device on cable
1605 * @ap: port
1606 * @adev: device
1607 *
1608 * Obtain the other device on the same cable, or if none is
1609 * present NULL is returned
1610 */
2e9edbf8 1611
ebdfca6e
AC		 1612struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1613{
1614 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1615 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1616 return NULL;
1617 return pair;
1618}
1619
1da177e4 1620/**
780a87f7
JG		 1621 * ata_port_disable - Disable port.
1622 * @ap: Port to be disabled.
1da177e4 1623 *
780a87f7
JG		 1624 * Modify @ap data structure such that the system
1625 * thinks that the entire port is disabled, and should
1626 * never attempt to probe or communicate with devices
1627 * on this port.
1628 *
1629 * LOCKING: host_set lock, or some other form of
1630 * serialization.
1da177e4
LT		 1631 */
1632
1633void ata_port_disable(struct ata_port *ap)
1634{
1635 ap->device[0].class = ATA_DEV_NONE;
1636 ap->device[1].class = ATA_DEV_NONE;
198e0fed 1637 ap->flags |= ATA_FLAG_DISABLED;
1da177e4
LT		 1638}
1639
1c3fae4d
TH		 1640/**
1641 * ata_down_sata_spd_limit - adjust SATA spd limit downward
1642 * @ap: Port to adjust SATA spd limit for
1643 *
1644 * Adjust SATA spd limit of @ap downward. Note that this
1645 * function only adjusts the limit. The change must be applied
1646 * using ata_set_sata_spd().
1647 *
1648 * LOCKING:
1649 * Inherited from caller.
1650 *
1651 * RETURNS:
1652 * 0 on success, negative errno on failure
1653 */
1ad8e7f9 1654int ata_down_sata_spd_limit(struct ata_port *ap)
1c3fae4d
TH		 1655{
1656 u32 spd, mask;
1657 int highbit;
1658
1659 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1660 return -EOPNOTSUPP;
1661
1662 mask = ap->sata_spd_limit;
1663 if (mask <= 1)
1664 return -EINVAL;
1665 highbit = fls(mask) - 1;
1666 mask &= ~(1 << highbit);
1667
1668 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1669 if (spd <= 1)
1670 return -EINVAL;
1671 spd--;
1672 mask &= (1 << spd) - 1;
1673 if (!mask)
1674 return -EINVAL;
1675
1676 ap->sata_spd_limit = mask;
1677
1678 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1679 ap->id, sata_spd_string(fls(mask)));
1680
1681 return 0;
1682}
1683
1684static int __ata_set_sata_spd_needed(struct ata_port *ap, u32 *scontrol)
1685{
1686 u32 spd, limit;
1687
1688 if (ap->sata_spd_limit == UINT_MAX)
1689 limit = 0;
1690 else
1691 limit = fls(ap->sata_spd_limit);
1692
1693 spd = (*scontrol >> 4) & 0xf;
1694 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1695
1696 return spd != limit;
1697}
1698
1699/**
1700 * ata_set_sata_spd_needed - is SATA spd configuration needed
1701 * @ap: Port in question
1702 *
1703 * Test whether the spd limit in SControl matches
1704 * @ap->sata_spd_limit. This function is used to determine
1705 * whether hardreset is necessary to apply SATA spd
1706 * configuration.
1707 *
1708 * LOCKING:
1709 * Inherited from caller.
1710 *
1711 * RETURNS:
1712 * 1 if SATA spd configuration is needed, 0 otherwise.
1713 */
1ad8e7f9 1714int ata_set_sata_spd_needed(struct ata_port *ap)
1c3fae4d
TH		 1715{
1716 u32 scontrol;
1717
1718 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1719 return 0;
1720
1721 scontrol = scr_read(ap, SCR_CONTROL);
1722
1723 return __ata_set_sata_spd_needed(ap, &scontrol);
1724}
1725
1726/**
1727 * ata_set_sata_spd - set SATA spd according to spd limit
1728 * @ap: Port to set SATA spd for
1729 *
1730 * Set SATA spd of @ap according to sata_spd_limit.
1731 *
1732 * LOCKING:
1733 * Inherited from caller.
1734 *
1735 * RETURNS:
1736 * 0 if spd doesn't need to be changed, 1 if spd has been
1737 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1738 */
1739static int ata_set_sata_spd(struct ata_port *ap)
1740{
1741 u32 scontrol;
1742
1743 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1744 return -EOPNOTSUPP;
1745
1746 scontrol = scr_read(ap, SCR_CONTROL);
1747 if (!__ata_set_sata_spd_needed(ap, &scontrol))
1748 return 0;
1749
1750 scr_write(ap, SCR_CONTROL, scontrol);
1751 return 1;
1752}
1753
452503f9
AC		 1754/*
1755 * This mode timing computation functionality is ported over from
1756 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1757 */
1758/*
1759 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1760 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1761 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1762 * is currently supported only by Maxtor drives.
452503f9
AC		 1763 */
1764
1765static const struct ata_timing ata_timing[] = {
1766
1767 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1768 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1769 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1770 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1771
1772 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1773 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1774 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1775
1776/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1777
452503f9
AC		 1778 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1779 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1780 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1781
452503f9
AC		 1782 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1783 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1784 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1785
1786/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1787 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1788 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1789
1790 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1791 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1792 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1793
1794/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1795
1796 { 0xFF }
1797};
1798
1799#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1800#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1801
1802static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1803{
1804 q->setup = EZ(t->setup * 1000, T);
1805 q->act8b = EZ(t->act8b * 1000, T);
1806 q->rec8b = EZ(t->rec8b * 1000, T);
1807 q->cyc8b = EZ(t->cyc8b * 1000, T);
1808 q->active = EZ(t->active * 1000, T);
1809 q->recover = EZ(t->recover * 1000, T);
1810 q->cycle = EZ(t->cycle * 1000, T);
1811 q->udma = EZ(t->udma * 1000, UT);
1812}
1813
1814void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1815 struct ata_timing *m, unsigned int what)
1816{
1817 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1818 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1819 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1820 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1821 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1822 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1823 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1824 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1825}
1826
1827static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1828{
1829 const struct ata_timing *t;
1830
1831 for (t = ata_timing; t->mode != speed; t++)
91190758 1832 if (t->mode == 0xFF)
452503f9 1833 return NULL;
2e9edbf8 1834 return t;
452503f9
AC		 1835}
1836
1837int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1838 struct ata_timing *t, int T, int UT)
1839{
1840 const struct ata_timing *s;
1841 struct ata_timing p;
1842
1843 /*
2e9edbf8 1844 * Find the mode.
75b1f2f8 1845 */
452503f9
AC		 1846
1847 if (!(s = ata_timing_find_mode(speed)))
1848 return -EINVAL;
1849
75b1f2f8
AL		 1850 memcpy(t, s, sizeof(*s));
1851
452503f9
AC		 1852 /*
1853 * If the drive is an EIDE drive, it can tell us it needs extended
1854 * PIO/MW_DMA cycle timing.
1855 */
1856
1857 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1858 memset(&p, 0, sizeof(p));
1859 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1860 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1861 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1862 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1863 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1864 }
1865 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1866 }
1867
1868 /*
1869 * Convert the timing to bus clock counts.
1870 */
1871
75b1f2f8 1872 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1873
1874 /*
c893a3ae
RD		 1875 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1876 * S.M.A.R.T * and some other commands. We have to ensure that the
1877 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1878 */
1879
1880 if (speed > XFER_PIO_4) {
1881 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1882 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1883 }
1884
1885 /*
c893a3ae 1886 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1887 */
1888
1889 if (t->act8b + t->rec8b < t->cyc8b) {
1890 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1891 t->rec8b = t->cyc8b - t->act8b;
1892 }
1893
1894 if (t->active + t->recover < t->cycle) {
1895 t->active += (t->cycle - (t->active + t->recover)) / 2;
1896 t->recover = t->cycle - t->active;
1897 }
1898
1899 return 0;
1900}
1901
cf176e1a
TH		 1902/**
1903 * ata_down_xfermask_limit - adjust dev xfer masks downward
1904 * @ap: Port associated with device @dev
1905 * @dev: Device to adjust xfer masks
1906 * @force_pio0: Force PIO0
1907 *
1908 * Adjust xfer masks of @dev downward. Note that this function
1909 * does not apply the change. Invoking ata_set_mode() afterwards
1910 * will apply the limit.
1911 *
1912 * LOCKING:
1913 * Inherited from caller.
1914 *
1915 * RETURNS:
1916 * 0 on success, negative errno on failure
1917 */
1ad8e7f9
TH		 1918int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1919 int force_pio0)
cf176e1a
TH		 1920{
1921 unsigned long xfer_mask;
1922 int highbit;
1923
1924 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1925 dev->udma_mask);
1926
1927 if (!xfer_mask)
1928 goto fail;
1929 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1930 if (xfer_mask & ATA_MASK_UDMA)
1931 xfer_mask &= ~ATA_MASK_MWDMA;
1932
1933 highbit = fls(xfer_mask) - 1;
1934 xfer_mask &= ~(1 << highbit);
1935 if (force_pio0)
1936 xfer_mask &= 1 << ATA_SHIFT_PIO;
1937 if (!xfer_mask)
1938 goto fail;
1939
1940 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1941 &dev->udma_mask);
1942
1943 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1944 ap->id, dev->devno, ata_mode_string(xfer_mask));
1945
1946 return 0;
1947
1948 fail:
1949 return -EINVAL;
1950}
1951
83206a29 1952static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1953{
83206a29
TH		 1954 unsigned int err_mask;
1955 int rc;
1da177e4 1956
e8384607 1957 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT		 1958 if (dev->xfer_shift == ATA_SHIFT_PIO)
1959 dev->flags |= ATA_DFLAG_PIO;
1960
83206a29
TH		 1961 err_mask = ata_dev_set_xfermode(ap, dev);
1962 if (err_mask) {
1963 printk(KERN_ERR
1964 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1965 ap->id, err_mask);
1966 return -EIO;
1967 }
1da177e4 1968
83206a29 1969 rc = ata_dev_revalidate(ap, dev, 0);
5eb45c02 1970 if (rc)
83206a29 1971 return rc;
48a8a14f 1972
23e71c3d
TH		 1973 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1974 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1975
1976 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1977 ap->id, dev->devno,
1978 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1979 return 0;
1da177e4
LT		 1980}
1981
1da177e4
LT		 1982/**
1983 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1984 * @ap: port on which timings will be programmed
e82cbdb9 1985 * @r_failed_dev: out paramter for failed device
1da177e4 1986 *
e82cbdb9
TH		 1987 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1988 * ata_set_mode() fails, pointer to the failing device is
1989 * returned in @r_failed_dev.
780a87f7 1990 *
1da177e4 1991 * LOCKING:
0cba632b 1992 * PCI/etc. bus probe sem.
e82cbdb9
TH		 1993 *
1994 * RETURNS:
1995 * 0 on success, negative errno otherwise
1da177e4 1996 */
1ad8e7f9 1997int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 1998{
e8e0619f 1999 struct ata_device *dev;
e82cbdb9 2000 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 2001
a6d5a51c
TH		 2002 /* step 1: calculate xfer_mask */
2003 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 2004 unsigned int pio_mask, dma_mask;
a6d5a51c 2005
e8e0619f
TH		 2006 dev = &ap->device[i];
2007
e1211e3f 2008 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 2009 continue;
2010
acf356b1 2011 ata_dev_xfermask(ap, dev);
1da177e4 2012
acf356b1
TH		 2013 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2014 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2015 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2016 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 2017
4f65977d 2018 found = 1;
5444a6f4
AC		 2019 if (dev->dma_mode)
2020 used_dma = 1;
a6d5a51c 2021 }
4f65977d 2022 if (!found)
e82cbdb9 2023 goto out;
a6d5a51c
TH		 2024
2025 /* step 2: always set host PIO timings */
e8e0619f
TH		 2026 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2027 dev = &ap->device[i];
2028 if (!ata_dev_enabled(dev))
2029 continue;
2030
2031 if (!dev->pio_mode) {
2032 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
2033 ap->id, dev->devno);
2034 rc = -EINVAL;
e82cbdb9 2035 goto out;
e8e0619f
TH		 2036 }
2037
2038 dev->xfer_mode = dev->pio_mode;
2039 dev->xfer_shift = ATA_SHIFT_PIO;
2040 if (ap->ops->set_piomode)
2041 ap->ops->set_piomode(ap, dev);
2042 }
1da177e4 2043
a6d5a51c 2044 /* step 3: set host DMA timings */
e8e0619f
TH		 2045 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2046 dev = &ap->device[i];
2047
2048 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2049 continue;
2050
2051 dev->xfer_mode = dev->dma_mode;
2052 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2053 if (ap->ops->set_dmamode)
2054 ap->ops->set_dmamode(ap, dev);
2055 }
1da177e4
LT		 2056
2057 /* step 4: update devices' xfer mode */
83206a29 2058 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 2059 dev = &ap->device[i];
1da177e4 2060
e1211e3f 2061 if (!ata_dev_enabled(dev))
83206a29
TH		 2062 continue;
2063
5bbc53f4
TH		 2064 rc = ata_dev_set_mode(ap, dev);
2065 if (rc)
e82cbdb9 2066 goto out;
83206a29 2067 }
1da177e4 2068
e8e0619f
TH		 2069 /* Record simplex status. If we selected DMA then the other
2070 * host channels are not permitted to do so.
5444a6f4 2071 */
5444a6f4
AC		 2072 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2073 ap->host_set->simplex_claimed = 1;
2074
e8e0619f 2075 /* step5: chip specific finalisation */
1da177e4
LT		 2076 if (ap->ops->post_set_mode)
2077 ap->ops->post_set_mode(ap);
2078
e82cbdb9
TH		 2079 out:
2080 if (rc)
2081 *r_failed_dev = dev;
2082 return rc;
1da177e4
LT		 2083}
2084
1fdffbce
JG		 2085/**
2086 * ata_tf_to_host - issue ATA taskfile to host controller
2087 * @ap: port to which command is being issued
2088 * @tf: ATA taskfile register set
2089 *
2090 * Issues ATA taskfile register set to ATA host controller,
2091 * with proper synchronization with interrupt handler and
2092 * other threads.
2093 *
2094 * LOCKING:
2095 * spin_lock_irqsave(host_set lock)
2096 */
2097
2098static inline void ata_tf_to_host(struct ata_port *ap,
2099 const struct ata_taskfile *tf)
2100{
2101 ap->ops->tf_load(ap, tf);
2102 ap->ops->exec_command(ap, tf);
2103}
2104
1da177e4
LT		 2105/**
2106 * ata_busy_sleep - sleep until BSY clears, or timeout
2107 * @ap: port containing status register to be polled
2108 * @tmout_pat: impatience timeout
2109 * @tmout: overall timeout
2110 *
780a87f7
JG		 2111 * Sleep until ATA Status register bit BSY clears,
2112 * or a timeout occurs.
2113 *
2114 * LOCKING: None.
1da177e4
LT		 2115 */
2116
6f8b9958
TH		 2117unsigned int ata_busy_sleep (struct ata_port *ap,
2118 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 2119{
2120 unsigned long timer_start, timeout;
2121 u8 status;
2122
2123 status = ata_busy_wait(ap, ATA_BUSY, 300);
2124 timer_start = jiffies;
2125 timeout = timer_start + tmout_pat;
2126 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2127 msleep(50);
2128 status = ata_busy_wait(ap, ATA_BUSY, 3);
2129 }
2130
2131 if (status & ATA_BUSY)
2132 printk(KERN_WARNING "ata%u is slow to respond, "
2133 "please be patient\n", ap->id);
2134
2135 timeout = timer_start + tmout;
2136 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2137 msleep(50);
2138 status = ata_chk_status(ap);
2139 }
2140
2141 if (status & ATA_BUSY) {
2142 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2143 ap->id, tmout / HZ);
2144 return 1;
2145 }
2146
2147 return 0;
2148}
2149
2150static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2151{
2152 struct ata_ioports *ioaddr = &ap->ioaddr;
2153 unsigned int dev0 = devmask & (1 << 0);
2154 unsigned int dev1 = devmask & (1 << 1);
2155 unsigned long timeout;
2156
2157 /* if device 0 was found in ata_devchk, wait for its
2158 * BSY bit to clear
2159 */
2160 if (dev0)
2161 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2162
2163 /* if device 1 was found in ata_devchk, wait for
2164 * register access, then wait for BSY to clear
2165 */
2166 timeout = jiffies + ATA_TMOUT_BOOT;
2167 while (dev1) {
2168 u8 nsect, lbal;
2169
2170 ap->ops->dev_select(ap, 1);
2171 if (ap->flags & ATA_FLAG_MMIO) {
2172 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2173 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2174 } else {
2175 nsect = inb(ioaddr->nsect_addr);
2176 lbal = inb(ioaddr->lbal_addr);
2177 }
2178 if ((nsect == 1) && (lbal == 1))
2179 break;
2180 if (time_after(jiffies, timeout)) {
2181 dev1 = 0;
2182 break;
2183 }
2184 msleep(50); /* give drive a breather */
2185 }
2186 if (dev1)
2187 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2188
2189 /* is all this really necessary? */
2190 ap->ops->dev_select(ap, 0);
2191 if (dev1)
2192 ap->ops->dev_select(ap, 1);
2193 if (dev0)
2194 ap->ops->dev_select(ap, 0);
2195}
2196
1da177e4
LT		 2197static unsigned int ata_bus_softreset(struct ata_port *ap,
2198 unsigned int devmask)
2199{
2200 struct ata_ioports *ioaddr = &ap->ioaddr;
2201
2202 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2203
2204 /* software reset. causes dev0 to be selected */
2205 if (ap->flags & ATA_FLAG_MMIO) {
2206 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2207 udelay(20); /* FIXME: flush */
2208 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2209 udelay(20); /* FIXME: flush */
2210 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2211 } else {
2212 outb(ap->ctl, ioaddr->ctl_addr);
2213 udelay(10);
2214 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2215 udelay(10);
2216 outb(ap->ctl, ioaddr->ctl_addr);
2217 }
2218
2219 /* spec mandates ">= 2ms" before checking status.
2220 * We wait 150ms, because that was the magic delay used for
2221 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2222 * between when the ATA command register is written, and then
2223 * status is checked. Because waiting for "a while" before
2224 * checking status is fine, post SRST, we perform this magic
2225 * delay here as well.
09c7ad79
AC		 2226 *
2227 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2228 */
2229 msleep(150);
2230
2e9edbf8 2231 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2232 * the bus shows 0xFF because the odd clown forgets the D7
2233 * pulldown resistor.
2234 */
987d2f05
TH		 2235 if (ata_check_status(ap) == 0xFF) {
2236 printk(KERN_ERR "ata%u: SRST failed (status 0xFF)\n", ap->id);
298a41ca 2237 return AC_ERR_OTHER;
987d2f05 2238 }
09c7ad79 2239
1da177e4
LT		 2240 ata_bus_post_reset(ap, devmask);
2241
2242 return 0;
2243}
2244
2245/**
2246 * ata_bus_reset - reset host port and associated ATA channel
2247 * @ap: port to reset
2248 *
2249 * This is typically the first time we actually start issuing
2250 * commands to the ATA channel. We wait for BSY to clear, then
2251 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2252 * result. Determine what devices, if any, are on the channel
2253 * by looking at the device 0/1 error register. Look at the signature
2254 * stored in each device's taskfile registers, to determine if
2255 * the device is ATA or ATAPI.
2256 *
2257 * LOCKING:
0cba632b
JG		 2258 * PCI/etc. bus probe sem.
2259 * Obtains host_set lock.
1da177e4
LT		 2260 *
2261 * SIDE EFFECTS:
198e0fed 2262 * Sets ATA_FLAG_DISABLED if bus reset fails.
1da177e4
LT		 2263 */
2264
2265void ata_bus_reset(struct ata_port *ap)
2266{
2267 struct ata_ioports *ioaddr = &ap->ioaddr;
2268 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2269 u8 err;
aec5c3c1 2270 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2271
2272 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2273
2274 /* determine if device 0/1 are present */
2275 if (ap->flags & ATA_FLAG_SATA_RESET)
2276 dev0 = 1;
2277 else {
2278 dev0 = ata_devchk(ap, 0);
2279 if (slave_possible)
2280 dev1 = ata_devchk(ap, 1);
2281 }
2282
2283 if (dev0)
2284 devmask |= (1 << 0);
2285 if (dev1)
2286 devmask |= (1 << 1);
2287
2288 /* select device 0 again */
2289 ap->ops->dev_select(ap, 0);
2290
2291 /* issue bus reset */
2292 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2293 if (ata_bus_softreset(ap, devmask))
2294 goto err_out;
1da177e4
LT		 2295
2296 /*
2297 * determine by signature whether we have ATA or ATAPI devices
2298 */
b4dc7623 2299 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2300 if ((slave_possible) && (err != 0x81))
b4dc7623 2301 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2302
2303 /* re-enable interrupts */
2304 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2305 ata_irq_on(ap);
2306
2307 /* is double-select really necessary? */
2308 if (ap->device[1].class != ATA_DEV_NONE)
2309 ap->ops->dev_select(ap, 1);
2310 if (ap->device[0].class != ATA_DEV_NONE)
2311 ap->ops->dev_select(ap, 0);
2312
2313 /* if no devices were detected, disable this port */
2314 if ((ap->device[0].class == ATA_DEV_NONE) &&
2315 (ap->device[1].class == ATA_DEV_NONE))
2316 goto err_out;
2317
2318 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2319 /* set up device control for ATA_FLAG_SATA_RESET */
2320 if (ap->flags & ATA_FLAG_MMIO)
2321 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2322 else
2323 outb(ap->ctl, ioaddr->ctl_addr);
2324 }
2325
2326 DPRINTK("EXIT\n");
2327 return;
2328
2329err_out:
2330 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2331 ap->ops->port_disable(ap);
2332
2333 DPRINTK("EXIT\n");
2334}
2335
7a7921e8
TH		 2336static int sata_phy_resume(struct ata_port *ap)
2337{
2338 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2339 u32 scontrol, sstatus;
7a7921e8 2340
852ee16a
TH		 2341 scontrol = scr_read(ap, SCR_CONTROL);
2342 scontrol = (scontrol & 0x0f0) | 0x300;
2343 scr_write_flush(ap, SCR_CONTROL, scontrol);
7a7921e8
TH		 2344
2345 /* Wait for phy to become ready, if necessary. */
2346 do {
2347 msleep(200);
2348 sstatus = scr_read(ap, SCR_STATUS);
2349 if ((sstatus & 0xf) != 1)
2350 return 0;
2351 } while (time_before(jiffies, timeout));
2352
2353 return -1;
2354}
2355
8a19ac89
TH		 2356/**
2357 * ata_std_probeinit - initialize probing
2358 * @ap: port to be probed
2359 *
2360 * @ap is about to be probed. Initialize it. This function is
2361 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2362 *
2363 * NOTE!!! Do not use this function as probeinit if a low level
2364 * driver implements only hardreset. Just pass NULL as probeinit
2365 * in that case. Using this function is probably okay but doing
2366 * so makes reset sequence different from the original
2367 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2368 */
17efc5f7 2369void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2370{
17efc5f7 2371 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
1c3fae4d
TH		 2372 u32 spd;
2373
db70fef0
TH		 2374 /* set cable type and resume link */
2375 ap->cbl = ATA_CBL_SATA;
8a19ac89 2376 sata_phy_resume(ap);
1c3fae4d 2377
db70fef0 2378 /* init sata_spd_limit to the current value */
1c3fae4d
TH		 2379 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2380 if (spd)
2381 ap->sata_spd_limit &= (1 << spd) - 1;
2382
db70fef0 2383 /* wait for device */
3a39746a
TH		 2384 if (sata_dev_present(ap))
2385 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2386 }
8a19ac89
TH		 2387}
2388
c2bd5804
TH		 2389/**
2390 * ata_std_softreset - reset host port via ATA SRST
2391 * @ap: port to reset
c2bd5804
TH		 2392 * @classes: resulting classes of attached devices
2393 *
2394 * Reset host port using ATA SRST. This function is to be used
2395 * as standard callback for ata_drive_*_reset() functions.
2396 *
2397 * LOCKING:
2398 * Kernel thread context (may sleep)
2399 *
2400 * RETURNS:
2401 * 0 on success, -errno otherwise.
2402 */
2bf2cb26 2403int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
c2bd5804
TH		 2404{
2405 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2406 unsigned int devmask = 0, err_mask;
2407 u8 err;
2408
2409 DPRINTK("ENTER\n");
2410
3a39746a
TH		 2411 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2412 classes[0] = ATA_DEV_NONE;
2413 goto out;
2414 }
2415
c2bd5804
TH		 2416 /* determine if device 0/1 are present */
2417 if (ata_devchk(ap, 0))
2418 devmask |= (1 << 0);
2419 if (slave_possible && ata_devchk(ap, 1))
2420 devmask |= (1 << 1);
2421
c2bd5804
TH		 2422 /* select device 0 again */
2423 ap->ops->dev_select(ap, 0);
2424
2425 /* issue bus reset */
2426 DPRINTK("about to softreset, devmask=%x\n", devmask);
2427 err_mask = ata_bus_softreset(ap, devmask);
2428 if (err_mask) {
2bf2cb26
TH		 2429 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2430 ap->id, err_mask);
c2bd5804
TH		 2431 return -EIO;
2432 }
2433
2434 /* determine by signature whether we have ATA or ATAPI devices */
2435 classes[0] = ata_dev_try_classify(ap, 0, &err);
2436 if (slave_possible && err != 0x81)
2437 classes[1] = ata_dev_try_classify(ap, 1, &err);
2438
3a39746a 2439 out:
c2bd5804
TH		 2440 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2441 return 0;
2442}
2443
2444/**
2445 * sata_std_hardreset - reset host port via SATA phy reset
2446 * @ap: port to reset
c2bd5804
TH		 2447 * @class: resulting class of attached device
2448 *
2449 * SATA phy-reset host port using DET bits of SControl register.
2450 * This function is to be used as standard callback for
2451 * ata_drive_*_reset().
2452 *
2453 * LOCKING:
2454 * Kernel thread context (may sleep)
2455 *
2456 * RETURNS:
2457 * 0 on success, -errno otherwise.
2458 */
2bf2cb26 2459int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
c2bd5804 2460{
852ee16a
TH		 2461 u32 scontrol;
2462
c2bd5804
TH		 2463 DPRINTK("ENTER\n");
2464
1c3fae4d
TH		 2465 if (ata_set_sata_spd_needed(ap)) {
2466 /* SATA spec says nothing about how to reconfigure
2467 * spd. To be on the safe side, turn off phy during
2468 * reconfiguration. This works for at least ICH7 AHCI
2469 * and Sil3124.
2470 */
2471 scontrol = scr_read(ap, SCR_CONTROL);
2472 scontrol = (scontrol & 0x0f0) | 0x302;
2473 scr_write_flush(ap, SCR_CONTROL, scontrol);
2474
2475 ata_set_sata_spd(ap);
2476 }
2477
2478 /* issue phy wake/reset */
852ee16a
TH		 2479 scontrol = scr_read(ap, SCR_CONTROL);
2480 scontrol = (scontrol & 0x0f0) | 0x301;
2481 scr_write_flush(ap, SCR_CONTROL, scontrol);
c2bd5804 2482
1c3fae4d 2483 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH		 2484 * 10.4.2 says at least 1 ms.
2485 */
2486 msleep(1);
2487
1c3fae4d 2488 /* bring phy back */
7a7921e8 2489 sata_phy_resume(ap);
c2bd5804 2490
c2bd5804
TH		 2491 /* TODO: phy layer with polling, timeouts, etc. */
2492 if (!sata_dev_present(ap)) {
2493 *class = ATA_DEV_NONE;
2494 DPRINTK("EXIT, link offline\n");
2495 return 0;
2496 }
2497
2498 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
987d2f05
TH		 2499 printk(KERN_ERR
2500 "ata%u: COMRESET failed (device not ready)\n", ap->id);
c2bd5804
TH		 2501 return -EIO;
2502 }
2503
3a39746a
TH		 2504 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2505
c2bd5804
TH		 2506 *class = ata_dev_try_classify(ap, 0, NULL);
2507
2508 DPRINTK("EXIT, class=%u\n", *class);
2509 return 0;
2510}
2511
2512/**
2513 * ata_std_postreset - standard postreset callback
2514 * @ap: the target ata_port
2515 * @classes: classes of attached devices
2516 *
2517 * This function is invoked after a successful reset. Note that
2518 * the device might have been reset more than once using
2519 * different reset methods before postreset is invoked.
c2bd5804
TH		 2520 *
2521 * This function is to be used as standard callback for
2522 * ata_drive_*_reset().
2523 *
2524 * LOCKING:
2525 * Kernel thread context (may sleep)
2526 */
2527void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2528{
2529 DPRINTK("ENTER\n");
2530
c2bd5804
TH		 2531 /* print link status */
2532 if (ap->cbl == ATA_CBL_SATA)
2533 sata_print_link_status(ap);
2534
3a39746a
TH		 2535 /* re-enable interrupts */
2536 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2537 ata_irq_on(ap);
c2bd5804
TH		 2538
2539 /* is double-select really necessary? */
2540 if (classes[0] != ATA_DEV_NONE)
2541 ap->ops->dev_select(ap, 1);
2542 if (classes[1] != ATA_DEV_NONE)
2543 ap->ops->dev_select(ap, 0);
2544
3a39746a
TH		 2545 /* bail out if no device is present */
2546 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2547 DPRINTK("EXIT, no device\n");
2548 return;
2549 }
2550
2551 /* set up device control */
2552 if (ap->ioaddr.ctl_addr) {
2553 if (ap->flags & ATA_FLAG_MMIO)
2554 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2555 else
2556 outb(ap->ctl, ap->ioaddr.ctl_addr);
2557 }
c2bd5804
TH		 2558
2559 DPRINTK("EXIT\n");
2560}
2561
2562/**
2563 * ata_std_probe_reset - standard probe reset method
2564 * @ap: prot to perform probe-reset
2565 * @classes: resulting classes of attached devices
2566 *
2567 * The stock off-the-shelf ->probe_reset method.
2568 *
2569 * LOCKING:
2570 * Kernel thread context (may sleep)
2571 *
2572 * RETURNS:
2573 * 0 on success, -errno otherwise.
2574 */
2575int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2576{
2577 ata_reset_fn_t hardreset;
2578
2579 hardreset = NULL;
db70fef0 2580 if (ap->cbl == ATA_CBL_SATA && ap->ops->scr_read)
c2bd5804
TH		 2581 hardreset = sata_std_hardreset;
2582
8a19ac89 2583 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2584 ata_std_softreset, hardreset,
c2bd5804
TH		 2585 ata_std_postreset, classes);
2586}
2587
2bf2cb26
TH		 2588int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
2589 ata_postreset_fn_t postreset, unsigned int *classes)
a62c0fc5
TH		 2590{
2591 int i, rc;
2592
2593 for (i = 0; i < ATA_MAX_DEVICES; i++)
2594 classes[i] = ATA_DEV_UNKNOWN;
2595
2bf2cb26 2596 rc = reset(ap, classes);
a62c0fc5
TH		 2597 if (rc)
2598 return rc;
2599
2600 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2601 * is complete and convert all ATA_DEV_UNKNOWN to
2602 * ATA_DEV_NONE.
2603 */
2604 for (i = 0; i < ATA_MAX_DEVICES; i++)
2605 if (classes[i] != ATA_DEV_UNKNOWN)
2606 break;
2607
2608 if (i < ATA_MAX_DEVICES)
2609 for (i = 0; i < ATA_MAX_DEVICES; i++)
2610 if (classes[i] == ATA_DEV_UNKNOWN)
2611 classes[i] = ATA_DEV_NONE;
2612
2613 if (postreset)
2614 postreset(ap, classes);
2615
9974e7cc 2616 return 0;
a62c0fc5
TH		 2617}
2618
2619/**
2620 * ata_drive_probe_reset - Perform probe reset with given methods
2621 * @ap: port to reset
7944ea95 2622 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2623 * @softreset: softreset method (can be NULL)
2624 * @hardreset: hardreset method (can be NULL)
2625 * @postreset: postreset method (can be NULL)
2626 * @classes: resulting classes of attached devices
2627 *
2628 * Reset the specified port and classify attached devices using
2629 * given methods. This function prefers softreset but tries all
2630 * possible reset sequences to reset and classify devices. This
2631 * function is intended to be used for constructing ->probe_reset
2632 * callback by low level drivers.
2633 *
2634 * Reset methods should follow the following rules.
2635 *
2636 * - Return 0 on sucess, -errno on failure.
2637 * - If classification is supported, fill classes[] with
2638 * recognized class codes.
2639 * - If classification is not supported, leave classes[] alone.
a62c0fc5
TH		 2640 *
2641 * LOCKING:
2642 * Kernel thread context (may sleep)
2643 *
2644 * RETURNS:
2645 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2646 * if classification fails, and any error code from reset
2647 * methods.
2648 */
7944ea95 2649int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2650 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2651 ata_postreset_fn_t postreset, unsigned int *classes)
2652{
2653 int rc = -EINVAL;
2654
7944ea95
TH		 2655 if (probeinit)
2656 probeinit(ap);
2657
90dac02c 2658 if (softreset && !ata_set_sata_spd_needed(ap)) {
2bf2cb26 2659 rc = ata_do_reset(ap, softreset, postreset, classes);
9974e7cc
TH		 2660 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2661 goto done;
edbabd86
TH		 2662 printk(KERN_INFO "ata%u: softreset failed, will try "
2663 "hardreset in 5 secs\n", ap->id);
2664 ssleep(5);
a62c0fc5
TH		 2665 }
2666
2667 if (!hardreset)
9974e7cc 2668 goto done;
a62c0fc5 2669
90dac02c 2670 while (1) {
2bf2cb26 2671 rc = ata_do_reset(ap, hardreset, postreset, classes);
90dac02c
TH		 2672 if (rc == 0) {
2673 if (classes[0] != ATA_DEV_UNKNOWN)
2674 goto done;
2675 break;
2676 }
2677
2678 if (ata_down_sata_spd_limit(ap))
2679 goto done;
edbabd86
TH		 2680
2681 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2682 "in 5 secs\n", ap->id);
2683 ssleep(5);
90dac02c 2684 }
a62c0fc5 2685
edbabd86
TH		 2686 if (softreset) {
2687 printk(KERN_INFO "ata%u: hardreset succeeded without "
2688 "classification, will retry softreset in 5 secs\n",
2689 ap->id);
2690 ssleep(5);
2691
2bf2cb26 2692 rc = ata_do_reset(ap, softreset, postreset, classes);
edbabd86 2693 }
a62c0fc5 2694
9974e7cc
TH		 2695 done:
2696 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2697 rc = -ENODEV;
a62c0fc5
TH		 2698 return rc;
2699}
2700
623a3128
TH		 2701/**
2702 * ata_dev_same_device - Determine whether new ID matches configured device
2703 * @ap: port on which the device to compare against resides
2704 * @dev: device to compare against
2705 * @new_class: class of the new device
2706 * @new_id: IDENTIFY page of the new device
2707 *
2708 * Compare @new_class and @new_id against @dev and determine
2709 * whether @dev is the device indicated by @new_class and
2710 * @new_id.
2711 *
2712 * LOCKING:
2713 * None.
2714 *
2715 * RETURNS:
2716 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2717 */
2718static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2719 unsigned int new_class, const u16 *new_id)
2720{
2721 const u16 *old_id = dev->id;
2722 unsigned char model[2][41], serial[2][21];
2723 u64 new_n_sectors;
2724
2725 if (dev->class != new_class) {
2726 printk(KERN_INFO
2727 "ata%u: dev %u class mismatch %d != %d\n",
2728 ap->id, dev->devno, dev->class, new_class);
2729 return 0;
2730 }
2731
2732 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2733 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2734 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2735 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2736 new_n_sectors = ata_id_n_sectors(new_id);
2737
2738 if (strcmp(model[0], model[1])) {
2739 printk(KERN_INFO
2740 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2741 ap->id, dev->devno, model[0], model[1]);
2742 return 0;
2743 }
2744
2745 if (strcmp(serial[0], serial[1])) {
2746 printk(KERN_INFO
2747 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2748 ap->id, dev->devno, serial[0], serial[1]);
2749 return 0;
2750 }
2751
2752 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2753 printk(KERN_INFO
2754 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2755 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2756 (unsigned long long)new_n_sectors);
2757 return 0;
2758 }
2759
2760 return 1;
2761}
2762
2763/**
2764 * ata_dev_revalidate - Revalidate ATA device
2765 * @ap: port on which the device to revalidate resides
2766 * @dev: device to revalidate
2767 * @post_reset: is this revalidation after reset?
2768 *
2769 * Re-read IDENTIFY page and make sure @dev is still attached to
2770 * the port.
2771 *
2772 * LOCKING:
2773 * Kernel thread context (may sleep)
2774 *
2775 * RETURNS:
2776 * 0 on success, negative errno otherwise
2777 */
2778int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2779 int post_reset)
2780{
5eb45c02
TH		 2781 unsigned int class = dev->class;
2782 u16 *id = NULL;
623a3128
TH		 2783 int rc;
2784
5eb45c02
TH		 2785 if (!ata_dev_enabled(dev)) {
2786 rc = -ENODEV;
2787 goto fail;
2788 }
623a3128
TH		 2789
2790 /* allocate & read ID data */
2791 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2792 if (rc)
2793 goto fail;
2794
2795 /* is the device still there? */
2796 if (!ata_dev_same_device(ap, dev, class, id)) {
2797 rc = -ENODEV;
2798 goto fail;
2799 }
2800
2801 kfree(dev->id);
2802 dev->id = id;
2803
2804 /* configure device according to the new ID */
5eb45c02
TH		 2805 rc = ata_dev_configure(ap, dev, 0);
2806 if (rc == 0)
2807 return 0;
623a3128
TH		 2808
2809 fail:
2810 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2811 ap->id, dev->devno, rc);
2812 kfree(id);
2813 return rc;
2814}
2815
98ac62de 2816static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2817 "WDC AC11000H", NULL,
2818 "WDC AC22100H", NULL,
2819 "WDC AC32500H", NULL,
2820 "WDC AC33100H", NULL,
2821 "WDC AC31600H", NULL,
2822 "WDC AC32100H", "24.09P07",
2823 "WDC AC23200L", "21.10N21",
2824 "Compaq CRD-8241B", NULL,
2825 "CRD-8400B", NULL,
2826 "CRD-8480B", NULL,
2827 "CRD-8482B", NULL,
2828 "CRD-84", NULL,
2829 "SanDisk SDP3B", NULL,
2830 "SanDisk SDP3B-64", NULL,
2831 "SANYO CD-ROM CRD", NULL,
2832 "HITACHI CDR-8", NULL,
2e9edbf8 2833 "HITACHI CDR-8335", NULL,
f4b15fef 2834 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2835 "Toshiba CD-ROM XM-6202B", NULL,
2836 "TOSHIBA CD-ROM XM-1702BC", NULL,
2837 "CD-532E-A", NULL,
2838 "E-IDE CD-ROM CR-840", NULL,
2839 "CD-ROM Drive/F5A", NULL,
2840 "WPI CDD-820", NULL,
f4b15fef 2841 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2842 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2843 "SanDisk SDP3B-64", NULL,
2844 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2845 "_NEC DV5800A", NULL,
2846 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2847};
2e9edbf8 2848
f4b15fef
AC		 2849static int ata_strim(char *s, size_t len)
2850{
2851 len = strnlen(s, len);
2852
2853 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2854 while ((len > 0) && (s[len - 1] == ' ')) {
2855 len--;
2856 s[len] = 0;
2857 }
2858 return len;
2859}
1da177e4 2860
057ace5e 2861static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2862{
f4b15fef
AC		 2863 unsigned char model_num[40];
2864 unsigned char model_rev[16];
2865 unsigned int nlen, rlen;
1da177e4
LT		 2866 int i;
2867
f4b15fef
AC		 2868 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2869 sizeof(model_num));
2870 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2871 sizeof(model_rev));
2872 nlen = ata_strim(model_num, sizeof(model_num));
2873 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2874
f4b15fef
AC		 2875 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2876 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2877 if (ata_dma_blacklist[i+1] == NULL)
2878 return 1;
2879 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2880 return 1;
2881 }
2882 }
1da177e4
LT		 2883 return 0;
2884}
2885
a6d5a51c
TH		 2886/**
2887 * ata_dev_xfermask - Compute supported xfermask of the given device
2888 * @ap: Port on which the device to compute xfermask for resides
2889 * @dev: Device to compute xfermask for
2890 *
acf356b1
TH		 2891 * Compute supported xfermask of @dev and store it in
2892 * dev->*_mask. This function is responsible for applying all
2893 * known limits including host controller limits, device
2894 * blacklist, etc...
a6d5a51c 2895 *
600511e8
TH		 2896 * FIXME: The current implementation limits all transfer modes to
2897 * the fastest of the lowested device on the port. This is not
05c8e0ac 2898 * required on most controllers.
600511e8 2899 *
a6d5a51c
TH		 2900 * LOCKING:
2901 * None.
a6d5a51c 2902 */
acf356b1 2903static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2904{
5444a6f4 2905 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2906 unsigned long xfer_mask;
2907 int i;
1da177e4 2908
565083e1
TH		 2909 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2910 ap->mwdma_mask, ap->udma_mask);
2911
2912 /* Apply cable rule here. Don't apply it early because when
2913 * we handle hot plug the cable type can itself change.
2914 */
2915 if (ap->cbl == ATA_CBL_PATA40)
2916 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4 2917
5444a6f4 2918 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2919 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2920 struct ata_device *d = &ap->device[i];
565083e1
TH		 2921
2922 if (ata_dev_absent(d))
2923 continue;
2924
2925 if (ata_dev_disabled(d)) {
2926 /* to avoid violating device selection timing */
2927 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2928 UINT_MAX, UINT_MAX);
a6d5a51c 2929 continue;
565083e1
TH		 2930 }
2931
2932 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2933 d->mwdma_mask, d->udma_mask);
a6d5a51c
TH		 2934 xfer_mask &= ata_id_xfermask(d->id);
2935 if (ata_dma_blacklisted(d))
2936 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2937 }
2938
a6d5a51c
TH		 2939 if (ata_dma_blacklisted(dev))
2940 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2941 "disabling DMA\n", ap->id, dev->devno);
2942
5444a6f4
AC		 2943 if (hs->flags & ATA_HOST_SIMPLEX) {
2944 if (hs->simplex_claimed)
2945 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2946 }
565083e1 2947
5444a6f4
AC		 2948 if (ap->ops->mode_filter)
2949 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2950
565083e1
TH		 2951 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2952 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT		 2953}
2954
1da177e4
LT		 2955/**
2956 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2957 * @ap: Port associated with device @dev
2958 * @dev: Device to which command will be sent
2959 *
780a87f7
JG		 2960 * Issue SET FEATURES - XFER MODE command to device @dev
2961 * on port @ap.
2962 *
1da177e4 2963 * LOCKING:
0cba632b 2964 * PCI/etc. bus probe sem.
83206a29
TH		 2965 *
2966 * RETURNS:
2967 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2968 */
2969
83206a29
TH		 2970static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2971 struct ata_device *dev)
1da177e4 2972{
a0123703 2973 struct ata_taskfile tf;
83206a29 2974 unsigned int err_mask;
1da177e4
LT		 2975
2976 /* set up set-features taskfile */
2977 DPRINTK("set features - xfer mode\n");
2978
a0123703
TH		 2979 ata_tf_init(ap, &tf, dev->devno);
2980 tf.command = ATA_CMD_SET_FEATURES;
2981 tf.feature = SETFEATURES_XFER;
2982 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2983 tf.protocol = ATA_PROT_NODATA;
2984 tf.nsect = dev->xfer_mode;
1da177e4 2985
d69cf37d 2986 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
1da177e4 2987
83206a29
TH		 2988 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2989 return err_mask;
1da177e4
LT		 2990}
2991
8bf62ece
AL		 2992/**
2993 * ata_dev_init_params - Issue INIT DEV PARAMS command
2994 * @ap: Port associated with device @dev
2995 * @dev: Device to which command will be sent
2996 *
2997 * LOCKING:
6aff8f1f
TH		 2998 * Kernel thread context (may sleep)
2999 *
3000 * RETURNS:
3001 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 3002 */
3003
6aff8f1f 3004static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 3005 struct ata_device *dev,
3006 u16 heads,
3007 u16 sectors)
8bf62ece 3008{
a0123703 3009 struct ata_taskfile tf;
6aff8f1f 3010 unsigned int err_mask;
8bf62ece
AL		 3011
3012 /* Number of sectors per track 1-255. Number of heads 1-16 */
3013 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 3014 return AC_ERR_INVALID;
8bf62ece
AL		 3015
3016 /* set up init dev params taskfile */
3017 DPRINTK("init dev params \n");
3018
a0123703
TH		 3019 ata_tf_init(ap, &tf, dev->devno);
3020 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3021 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3022 tf.protocol = ATA_PROT_NODATA;
3023 tf.nsect = sectors;
3024 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 3025
d69cf37d 3026 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
8bf62ece 3027
6aff8f1f
TH		 3028 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3029 return err_mask;
8bf62ece
AL		 3030}
3031
1da177e4 3032/**
0cba632b
JG		 3033 * ata_sg_clean - Unmap DMA memory associated with command
3034 * @qc: Command containing DMA memory to be released
3035 *
3036 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 3037 *
3038 * LOCKING:
0cba632b 3039 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3040 */
3041
3042static void ata_sg_clean(struct ata_queued_cmd *qc)
3043{
3044 struct ata_port *ap = qc->ap;
cedc9a47 3045 struct scatterlist *sg = qc->__sg;
1da177e4 3046 int dir = qc->dma_dir;
cedc9a47 3047 void *pad_buf = NULL;
1da177e4 3048
a4631474
TH		 3049 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3050 WARN_ON(sg == NULL);
1da177e4
LT		 3051
3052 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 3053 WARN_ON(qc->n_elem > 1);
1da177e4 3054
2c13b7ce 3055 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 3056
cedc9a47
JG		 3057 /* if we padded the buffer out to 32-bit bound, and data
3058 * xfer direction is from-device, we must copy from the
3059 * pad buffer back into the supplied buffer
3060 */
3061 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3062 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3063
3064 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 3065 if (qc->n_elem)
2f1f610b 3066 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 3067 /* restore last sg */
3068 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3069 if (pad_buf) {
3070 struct scatterlist *psg = &qc->pad_sgent;
3071 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3072 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 3073 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3074 }
3075 } else {
2e242fa9 3076 if (qc->n_elem)
2f1f610b 3077 dma_unmap_single(ap->dev,
e1410f2d
JG		 3078 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3079 dir);
cedc9a47
JG		 3080 /* restore sg */
3081 sg->length += qc->pad_len;
3082 if (pad_buf)
3083 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3084 pad_buf, qc->pad_len);
3085 }
1da177e4
LT		 3086
3087 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 3088 qc->__sg = NULL;
1da177e4
LT		 3089}
3090
3091/**
3092 * ata_fill_sg - Fill PCI IDE PRD table
3093 * @qc: Metadata associated with taskfile to be transferred
3094 *
780a87f7
JG		 3095 * Fill PCI IDE PRD (scatter-gather) table with segments
3096 * associated with the current disk command.
3097 *
1da177e4 3098 * LOCKING:
780a87f7 3099 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3100 *
3101 */
3102static void ata_fill_sg(struct ata_queued_cmd *qc)
3103{
1da177e4 3104 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3105 struct scatterlist *sg;
3106 unsigned int idx;
1da177e4 3107
a4631474 3108 WARN_ON(qc->__sg == NULL);
f131883e 3109 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 3110
3111 idx = 0;
cedc9a47 3112 ata_for_each_sg(sg, qc) {
1da177e4
LT		 3113 u32 addr, offset;
3114 u32 sg_len, len;
3115
3116 /* determine if physical DMA addr spans 64K boundary.
3117 * Note h/w doesn't support 64-bit, so we unconditionally
3118 * truncate dma_addr_t to u32.
3119 */
3120 addr = (u32) sg_dma_address(sg);
3121 sg_len = sg_dma_len(sg);
3122
3123 while (sg_len) {
3124 offset = addr & 0xffff;
3125 len = sg_len;
3126 if ((offset + sg_len) > 0x10000)
3127 len = 0x10000 - offset;
3128
3129 ap->prd[idx].addr = cpu_to_le32(addr);
3130 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3131 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3132
3133 idx++;
3134 sg_len -= len;
3135 addr += len;
3136 }
3137 }
3138
3139 if (idx)
3140 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3141}
3142/**
3143 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3144 * @qc: Metadata associated with taskfile to check
3145 *
780a87f7
JG		 3146 * Allow low-level driver to filter ATA PACKET commands, returning
3147 * a status indicating whether or not it is OK to use DMA for the
3148 * supplied PACKET command.
3149 *
1da177e4 3150 * LOCKING:
0cba632b
JG		 3151 * spin_lock_irqsave(host_set lock)
3152 *
1da177e4
LT		 3153 * RETURNS: 0 when ATAPI DMA can be used
3154 * nonzero otherwise
3155 */
3156int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3157{
3158 struct ata_port *ap = qc->ap;
3159 int rc = 0; /* Assume ATAPI DMA is OK by default */
3160
3161 if (ap->ops->check_atapi_dma)
3162 rc = ap->ops->check_atapi_dma(qc);
3163
3164 return rc;
3165}
3166/**
3167 * ata_qc_prep - Prepare taskfile for submission
3168 * @qc: Metadata associated with taskfile to be prepared
3169 *
780a87f7
JG		 3170 * Prepare ATA taskfile for submission.
3171 *
1da177e4
LT		 3172 * LOCKING:
3173 * spin_lock_irqsave(host_set lock)
3174 */
3175void ata_qc_prep(struct ata_queued_cmd *qc)
3176{
3177 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3178 return;
3179
3180 ata_fill_sg(qc);
3181}
3182
e46834cd
BK		 3183void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3184
0cba632b
JG		 3185/**
3186 * ata_sg_init_one - Associate command with memory buffer
3187 * @qc: Command to be associated
3188 * @buf: Memory buffer
3189 * @buflen: Length of memory buffer, in bytes.
3190 *
3191 * Initialize the data-related elements of queued_cmd @qc
3192 * to point to a single memory buffer, @buf of byte length @buflen.
3193 *
3194 * LOCKING:
3195 * spin_lock_irqsave(host_set lock)
3196 */
3197
1da177e4
LT		 3198void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3199{
3200 struct scatterlist *sg;
3201
3202 qc->flags |= ATA_QCFLAG_SINGLE;
3203
3204 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 3205 qc->__sg = &qc->sgent;
1da177e4 3206 qc->n_elem = 1;
cedc9a47 3207 qc->orig_n_elem = 1;
1da177e4
LT		 3208 qc->buf_virt = buf;
3209
cedc9a47 3210 sg = qc->__sg;
f0612bbc 3211 sg_init_one(sg, buf, buflen);
1da177e4
LT		 3212}
3213
0cba632b
JG		 3214/**
3215 * ata_sg_init - Associate command with scatter-gather table.
3216 * @qc: Command to be associated
3217 * @sg: Scatter-gather table.
3218 * @n_elem: Number of elements in s/g table.
3219 *
3220 * Initialize the data-related elements of queued_cmd @qc
3221 * to point to a scatter-gather table @sg, containing @n_elem
3222 * elements.
3223 *
3224 * LOCKING:
3225 * spin_lock_irqsave(host_set lock)
3226 */
3227
1da177e4
LT		 3228void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3229 unsigned int n_elem)
3230{
3231 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3232 qc->__sg = sg;
1da177e4 3233 qc->n_elem = n_elem;
cedc9a47 3234 qc->orig_n_elem = n_elem;
1da177e4
LT		 3235}
3236
3237/**
0cba632b
JG		 3238 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3239 * @qc: Command with memory buffer to be mapped.
3240 *
3241 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3242 *
3243 * LOCKING:
3244 * spin_lock_irqsave(host_set lock)
3245 *
3246 * RETURNS:
0cba632b 3247 * Zero on success, negative on error.
1da177e4
LT		 3248 */
3249
3250static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3251{
3252 struct ata_port *ap = qc->ap;
3253 int dir = qc->dma_dir;
cedc9a47 3254 struct scatterlist *sg = qc->__sg;
1da177e4 3255 dma_addr_t dma_address;
2e242fa9 3256 int trim_sg = 0;
1da177e4 3257
cedc9a47
JG		 3258 /* we must lengthen transfers to end on a 32-bit boundary */
3259 qc->pad_len = sg->length & 3;
3260 if (qc->pad_len) {
3261 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3262 struct scatterlist *psg = &qc->pad_sgent;
3263
a4631474 3264 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3265
3266 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3267
3268 if (qc->tf.flags & ATA_TFLAG_WRITE)
3269 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3270 qc->pad_len);
3271
3272 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3273 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3274 /* trim sg */
3275 sg->length -= qc->pad_len;
2e242fa9
TH		 3276 if (sg->length == 0)
3277 trim_sg = 1;
cedc9a47
JG		 3278
3279 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3280 sg->length, qc->pad_len);
3281 }
3282
2e242fa9
TH		 3283 if (trim_sg) {
3284 qc->n_elem--;
e1410f2d
JG		 3285 goto skip_map;
3286 }
3287
2f1f610b 3288 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3289 sg->length, dir);
537a95d9
TH		 3290 if (dma_mapping_error(dma_address)) {
3291 /* restore sg */
3292 sg->length += qc->pad_len;
1da177e4 3293 return -1;
537a95d9 3294 }
1da177e4
LT		 3295
3296 sg_dma_address(sg) = dma_address;
32529e01 3297 sg_dma_len(sg) = sg->length;
1da177e4 3298
2e242fa9 3299skip_map:
1da177e4
LT		 3300 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3301 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3302
3303 return 0;
3304}
3305
3306/**
0cba632b
JG		 3307 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3308 * @qc: Command with scatter-gather table to be mapped.
3309 *
3310 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3311 *
3312 * LOCKING:
3313 * spin_lock_irqsave(host_set lock)
3314 *
3315 * RETURNS:
0cba632b 3316 * Zero on success, negative on error.
1da177e4
LT		 3317 *
3318 */
3319
3320static int ata_sg_setup(struct ata_queued_cmd *qc)
3321{
3322 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3323 struct scatterlist *sg = qc->__sg;
3324 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3325 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3326
3327 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3328 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3329
cedc9a47
JG		 3330 /* we must lengthen transfers to end on a 32-bit boundary */
3331 qc->pad_len = lsg->length & 3;
3332 if (qc->pad_len) {
3333 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3334 struct scatterlist *psg = &qc->pad_sgent;
3335 unsigned int offset;
3336
a4631474 3337 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3338
3339 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3340
3341 /*
3342 * psg->page/offset are used to copy to-be-written
3343 * data in this function or read data in ata_sg_clean.
3344 */
3345 offset = lsg->offset + lsg->length - qc->pad_len;
3346 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3347 psg->offset = offset_in_page(offset);
3348
3349 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3350 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3351 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3352 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3353 }
3354
3355 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3356 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3357 /* trim last sg */
3358 lsg->length -= qc->pad_len;
e1410f2d
JG		 3359 if (lsg->length == 0)
3360 trim_sg = 1;
cedc9a47
JG		 3361
3362 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3363 qc->n_elem - 1, lsg->length, qc->pad_len);
3364 }
3365
e1410f2d
JG		 3366 pre_n_elem = qc->n_elem;
3367 if (trim_sg && pre_n_elem)
3368 pre_n_elem--;
3369
3370 if (!pre_n_elem) {
3371 n_elem = 0;
3372 goto skip_map;
3373 }
3374
1da177e4 3375 dir = qc->dma_dir;
2f1f610b 3376 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3377 if (n_elem < 1) {
3378 /* restore last sg */
3379 lsg->length += qc->pad_len;
1da177e4 3380 return -1;
537a95d9 3381 }
1da177e4
LT		 3382
3383 DPRINTK("%d sg elements mapped\n", n_elem);
3384
e1410f2d 3385skip_map:
1da177e4
LT		 3386 qc->n_elem = n_elem;
3387
3388 return 0;
3389}
3390
40e8c82c
TH		 3391/**
3392 * ata_poll_qc_complete - turn irq back on and finish qc
3393 * @qc: Command to complete
8e8b77dd 3394 * @err_mask: ATA status register content
40e8c82c
TH		 3395 *
3396 * LOCKING:
3397 * None. (grabs host lock)
3398 */
3399
a22e2eb0 3400void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3401{
3402 struct ata_port *ap = qc->ap;
b8f6153e 3403 unsigned long flags;
40e8c82c 3404
b8f6153e 3405 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3406 ap->flags &= ~ATA_FLAG_NOINTR;
3407 ata_irq_on(ap);
a22e2eb0 3408 ata_qc_complete(qc);
b8f6153e 3409 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3410}
3411
1da177e4 3412/**
c893a3ae 3413 * ata_pio_poll - poll using PIO, depending on current state
c91af2c8 3414 * @qc: qc in progress
1da177e4
LT		 3415 *
3416 * LOCKING:
0cba632b 3417 * None. (executing in kernel thread context)
1da177e4
LT		 3418 *
3419 * RETURNS:
6f0ef4fa 3420 * timeout value to use
1da177e4 3421 */
c91af2c8 3422static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
1da177e4 3423{
c91af2c8 3424 struct ata_port *ap = qc->ap;
1da177e4 3425 u8 status;
14be71f4
AL		 3426 unsigned int poll_state = HSM_ST_UNKNOWN;
3427 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4
AL		 3428
3429 switch (ap->hsm_task_state) {
3430 case HSM_ST:
3431 case HSM_ST_POLL:
3432 poll_state = HSM_ST_POLL;
3433 reg_state = HSM_ST;
1da177e4 3434 break;
14be71f4
AL		 3435 case HSM_ST_LAST:
3436 case HSM_ST_LAST_POLL:
3437 poll_state = HSM_ST_LAST_POLL;
3438 reg_state = HSM_ST_LAST;
1da177e4
LT		 3439 break;
3440 default:
3441 BUG();
3442 break;
3443 }
3444
3445 status = ata_chk_status(ap);
3446 if (status & ATA_BUSY) {
3447 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3448 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3449 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3450 return 0;
3451 }
14be71f4 3452 ap->hsm_task_state = poll_state;
1da177e4
LT		 3453 return ATA_SHORT_PAUSE;
3454 }
3455
14be71f4 3456 ap->hsm_task_state = reg_state;
1da177e4
LT		 3457 return 0;
3458}
3459
3460/**
6f0ef4fa 3461 * ata_pio_complete - check if drive is busy or idle
c91af2c8 3462 * @qc: qc to complete
1da177e4
LT		 3463 *
3464 * LOCKING:
0cba632b 3465 * None. (executing in kernel thread context)
7fb6ec28
JG		 3466 *
3467 * RETURNS:
3468 * Non-zero if qc completed, zero otherwise.
1da177e4 3469 */
c91af2c8 3470static int ata_pio_complete(struct ata_queued_cmd *qc)
1da177e4 3471{
c91af2c8 3472 struct ata_port *ap = qc->ap;
1da177e4
LT		 3473 u8 drv_stat;
3474
3475 /*
31433ea3
AC		 3476 * This is purely heuristic. This is a fast path. Sometimes when
3477 * we enter, BSY will be cleared in a chk-status or two. If not,
3478 * the drive is probably seeking or something. Snooze for a couple
3479 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3480 * HSM_ST_POLL state.
1da177e4 3481 */
fe79e683
AL		 3482 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3483 if (drv_stat & ATA_BUSY) {
1da177e4 3484 msleep(2);
fe79e683
AL		 3485 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3486 if (drv_stat & ATA_BUSY) {
14be71f4 3487 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3488 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3489 return 0;
1da177e4
LT		 3490 }
3491 }
3492
3493 drv_stat = ata_wait_idle(ap);
3494 if (!ata_ok(drv_stat)) {
1c848984 3495 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3496 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3497 return 0;
1da177e4
LT		 3498 }
3499
14be71f4 3500 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3501
a4631474 3502 WARN_ON(qc->err_mask);
a22e2eb0 3503 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3504
3505 /* another command may start at this point */
3506
3507 return 1;
1da177e4
LT		 3508}
3509
0baab86b
EF		 3510
3511/**
c893a3ae 3512 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3513 * @buf: Buffer to swap
3514 * @buf_words: Number of 16-bit words in buffer.
3515 *
3516 * Swap halves of 16-bit words if needed to convert from
3517 * little-endian byte order to native cpu byte order, or
3518 * vice-versa.
3519 *
3520 * LOCKING:
6f0ef4fa 3521 * Inherited from caller.
0baab86b 3522 */
1da177e4
LT		 3523void swap_buf_le16(u16 *buf, unsigned int buf_words)
3524{
3525#ifdef __BIG_ENDIAN
3526 unsigned int i;
3527
3528 for (i = 0; i < buf_words; i++)
3529 buf[i] = le16_to_cpu(buf[i]);
3530#endif /* __BIG_ENDIAN */
3531}
3532
6ae4cfb5
AL		 3533/**
3534 * ata_mmio_data_xfer - Transfer data by MMIO
3535 * @ap: port to read/write
3536 * @buf: data buffer
3537 * @buflen: buffer length
344babaa 3538 * @write_data: read/write
6ae4cfb5
AL		 3539 *
3540 * Transfer data from/to the device data register by MMIO.
3541 *
3542 * LOCKING:
3543 * Inherited from caller.
6ae4cfb5
AL		 3544 */
3545
1da177e4
LT		 3546static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3547 unsigned int buflen, int write_data)
3548{
3549 unsigned int i;
3550 unsigned int words = buflen >> 1;
3551 u16 *buf16 = (u16 *) buf;
3552 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3553
6ae4cfb5 3554 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3555 if (write_data) {
3556 for (i = 0; i < words; i++)
3557 writew(le16_to_cpu(buf16[i]), mmio);
3558 } else {
3559 for (i = 0; i < words; i++)
3560 buf16[i] = cpu_to_le16(readw(mmio));
3561 }
6ae4cfb5
AL		 3562
3563 /* Transfer trailing 1 byte, if any. */
3564 if (unlikely(buflen & 0x01)) {
3565 u16 align_buf[1] = { 0 };
3566 unsigned char *trailing_buf = buf + buflen - 1;
3567
3568 if (write_data) {
3569 memcpy(align_buf, trailing_buf, 1);
3570 writew(le16_to_cpu(align_buf[0]), mmio);
3571 } else {
3572 align_buf[0] = cpu_to_le16(readw(mmio));
3573 memcpy(trailing_buf, align_buf, 1);
3574 }
3575 }
1da177e4
LT		 3576}
3577
6ae4cfb5
AL		 3578/**
3579 * ata_pio_data_xfer - Transfer data by PIO
3580 * @ap: port to read/write
3581 * @buf: data buffer
3582 * @buflen: buffer length
344babaa 3583 * @write_data: read/write
6ae4cfb5
AL		 3584 *
3585 * Transfer data from/to the device data register by PIO.
3586 *
3587 * LOCKING:
3588 * Inherited from caller.
6ae4cfb5
AL		 3589 */
3590
1da177e4
LT		 3591static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3592 unsigned int buflen, int write_data)
3593{
6ae4cfb5 3594 unsigned int words = buflen >> 1;
1da177e4 3595
6ae4cfb5 3596 /* Transfer multiple of 2 bytes */
1da177e4 3597 if (write_data)
6ae4cfb5 3598 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3599 else
6ae4cfb5
AL		 3600 insw(ap->ioaddr.data_addr, buf, words);
3601
3602 /* Transfer trailing 1 byte, if any. */
3603 if (unlikely(buflen & 0x01)) {
3604 u16 align_buf[1] = { 0 };
3605 unsigned char *trailing_buf = buf + buflen - 1;
3606
3607 if (write_data) {
3608 memcpy(align_buf, trailing_buf, 1);
3609 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3610 } else {
3611 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3612 memcpy(trailing_buf, align_buf, 1);
3613 }
3614 }
1da177e4
LT		 3615}
3616
6ae4cfb5
AL		 3617/**
3618 * ata_data_xfer - Transfer data from/to the data register.
3619 * @ap: port to read/write
3620 * @buf: data buffer
3621 * @buflen: buffer length
3622 * @do_write: read/write
3623 *
3624 * Transfer data from/to the device data register.
3625 *
3626 * LOCKING:
3627 * Inherited from caller.
6ae4cfb5
AL		 3628 */
3629
1da177e4
LT		 3630static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3631 unsigned int buflen, int do_write)
3632{
a1bd9e68
AC		 3633 /* Make the crap hardware pay the costs not the good stuff */
3634 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3635 unsigned long flags;
3636 local_irq_save(flags);
3637 if (ap->flags & ATA_FLAG_MMIO)
3638 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3639 else
3640 ata_pio_data_xfer(ap, buf, buflen, do_write);
3641 local_irq_restore(flags);
3642 } else {
3643 if (ap->flags & ATA_FLAG_MMIO)
3644 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3645 else
3646 ata_pio_data_xfer(ap, buf, buflen, do_write);
3647 }
1da177e4
LT		 3648}
3649
6ae4cfb5
AL		 3650/**
3651 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3652 * @qc: Command on going
3653 *
3654 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3655 *
3656 * LOCKING:
3657 * Inherited from caller.
3658 */
3659
1da177e4
LT		 3660static void ata_pio_sector(struct ata_queued_cmd *qc)
3661{
3662 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3663 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3664 struct ata_port *ap = qc->ap;
3665 struct page *page;
3666 unsigned int offset;
3667 unsigned char *buf;
3668
3669 if (qc->cursect == (qc->nsect - 1))
14be71f4 3670 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3671
3672 page = sg[qc->cursg].page;
3673 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3674
3675 /* get the current page and offset */
3676 page = nth_page(page, (offset >> PAGE_SHIFT));
3677 offset %= PAGE_SIZE;
3678
3679 buf = kmap(page) + offset;
3680
3681 qc->cursect++;
3682 qc->cursg_ofs++;
3683
32529e01 3684 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3685 qc->cursg++;
3686 qc->cursg_ofs = 0;
3687 }
3688
3689 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3690
3691 /* do the actual data transfer */
3692 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3693 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3694
3695 kunmap(page);
3696}
3697
6ae4cfb5
AL		 3698/**
3699 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3700 * @qc: Command on going
3701 * @bytes: number of bytes
3702 *
3703 * Transfer Transfer data from/to the ATAPI device.
3704 *
3705 * LOCKING:
3706 * Inherited from caller.
3707 *
3708 */
3709
1da177e4
LT		 3710static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3711{
3712 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3713 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3714 struct ata_port *ap = qc->ap;
3715 struct page *page;
3716 unsigned char *buf;
3717 unsigned int offset, count;
3718
563a6e1f 3719 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3720 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3721
3722next_sg:
563a6e1f 3723 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3724 /*
563a6e1f
AL		 3725 * The end of qc->sg is reached and the device expects
3726 * more data to transfer. In order not to overrun qc->sg
3727 * and fulfill length specified in the byte count register,
3728 * - for read case, discard trailing data from the device
3729 * - for write case, padding zero data to the device
3730 */
3731 u16 pad_buf[1] = { 0 };
3732 unsigned int words = bytes >> 1;
3733 unsigned int i;
3734
3735 if (words) /* warning if bytes > 1 */
7fb6ec28 3736 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3737 ap->id, bytes);
3738
3739 for (i = 0; i < words; i++)
3740 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3741
14be71f4 3742 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3743 return;
3744 }
3745
cedc9a47 3746 sg = &qc->__sg[qc->cursg];
1da177e4 3747
1da177e4
LT		 3748 page = sg->page;
3749 offset = sg->offset + qc->cursg_ofs;
3750
3751 /* get the current page and offset */
3752 page = nth_page(page, (offset >> PAGE_SHIFT));
3753 offset %= PAGE_SIZE;
3754
6952df03 3755 /* don't overrun current sg */
32529e01 3756 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3757
3758 /* don't cross page boundaries */
3759 count = min(count, (unsigned int)PAGE_SIZE - offset);
3760
3761 buf = kmap(page) + offset;
3762
3763 bytes -= count;
3764 qc->curbytes += count;
3765 qc->cursg_ofs += count;
3766
32529e01 3767 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3768 qc->cursg++;
3769 qc->cursg_ofs = 0;
3770 }
3771
3772 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3773
3774 /* do the actual data transfer */
3775 ata_data_xfer(ap, buf, count, do_write);
3776
3777 kunmap(page);
3778
563a6e1f 3779 if (bytes)
1da177e4 3780 goto next_sg;
1da177e4
LT		 3781}
3782
6ae4cfb5
AL		 3783/**
3784 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3785 * @qc: Command on going
3786 *
3787 * Transfer Transfer data from/to the ATAPI device.
3788 *
3789 * LOCKING:
3790 * Inherited from caller.
6ae4cfb5
AL		 3791 */
3792
1da177e4
LT		 3793static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3794{
3795 struct ata_port *ap = qc->ap;
3796 struct ata_device *dev = qc->dev;
3797 unsigned int ireason, bc_lo, bc_hi, bytes;
3798 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3799
3800 ap->ops->tf_read(ap, &qc->tf);
3801 ireason = qc->tf.nsect;
3802 bc_lo = qc->tf.lbam;
3803 bc_hi = qc->tf.lbah;
3804 bytes = (bc_hi << 8) | bc_lo;
3805
3806 /* shall be cleared to zero, indicating xfer of data */
3807 if (ireason & (1 << 0))
3808 goto err_out;
3809
3810 /* make sure transfer direction matches expected */
3811 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3812 if (do_write != i_write)
3813 goto err_out;
3814
3815 __atapi_pio_bytes(qc, bytes);
3816
3817 return;
3818
3819err_out:
3820 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3821 ap->id, dev->devno);
11a56d24 3822 qc->err_mask |= AC_ERR_HSM;
14be71f4 3823 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3824}
3825
3826/**
6f0ef4fa 3827 * ata_pio_block - start PIO on a block
c91af2c8 3828 * @qc: qc to transfer block for
1da177e4
LT		 3829 *
3830 * LOCKING:
0cba632b 3831 * None. (executing in kernel thread context)
1da177e4 3832 */
c91af2c8 3833static void ata_pio_block(struct ata_queued_cmd *qc)
1da177e4 3834{
c91af2c8 3835 struct ata_port *ap = qc->ap;
1da177e4
LT		 3836 u8 status;
3837
3838 /*
6f0ef4fa 3839 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3840 * Sometimes when we enter, BSY will be cleared in
3841 * a chk-status or two. If not, the drive is probably seeking
3842 * or something. Snooze for a couple msecs, then
3843 * chk-status again. If still busy, fall back to
14be71f4 3844 * HSM_ST_POLL state.
1da177e4
LT		 3845 */
3846 status = ata_busy_wait(ap, ATA_BUSY, 5);
3847 if (status & ATA_BUSY) {
3848 msleep(2);
3849 status = ata_busy_wait(ap, ATA_BUSY, 10);
3850 if (status & ATA_BUSY) {
14be71f4 3851 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3852 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3853 return;
3854 }
3855 }
3856
fe79e683
AL		 3857 /* check error */
3858 if (status & (ATA_ERR | ATA_DF)) {
3859 qc->err_mask |= AC_ERR_DEV;
3860 ap->hsm_task_state = HSM_ST_ERR;
3861 return;
3862 }
3863
3864 /* transfer data if any */
1da177e4 3865 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3866 /* DRQ=0 means no more data to transfer */
1da177e4 3867 if ((status & ATA_DRQ) == 0) {
14be71f4 3868 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3869 return;
3870 }
3871
3872 atapi_pio_bytes(qc);
3873 } else {
3874 /* handle BSY=0, DRQ=0 as error */
3875 if ((status & ATA_DRQ) == 0) {
11a56d24 3876 qc->err_mask |= AC_ERR_HSM;
14be71f4 3877 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3878 return;
3879 }
3880
3881 ata_pio_sector(qc);
3882 }
3883}
3884
c91af2c8 3885static void ata_pio_error(struct ata_queued_cmd *qc)
1da177e4 3886{
c91af2c8 3887 struct ata_port *ap = qc->ap;
1da177e4 3888
0565c26d 3889 if (qc->tf.command != ATA_CMD_PACKET)
d63cb4a6
TH		 3890 printk(KERN_WARNING "ata%u: dev %u PIO error\n",
3891 ap->id, qc->dev->devno);
0565c26d 3892
2e9edbf8 3893 /* make sure qc->err_mask is available to
1c848984
AL		 3894 * know what's wrong and recover
3895 */
a4631474 3896 WARN_ON(qc->err_mask == 0);
1c848984 3897
14be71f4 3898 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3899
a22e2eb0 3900 ata_poll_qc_complete(qc);
1da177e4
LT		 3901}
3902
3903static void ata_pio_task(void *_data)
3904{
c91af2c8
TH		 3905 struct ata_queued_cmd *qc = _data;
3906 struct ata_port *ap = qc->ap;
7fb6ec28
JG		 3907 unsigned long timeout;
3908 int qc_completed;
3909
3910fsm_start:
3911 timeout = 0;
3912 qc_completed = 0;
1da177e4 3913
14be71f4
AL		 3914 switch (ap->hsm_task_state) {
3915 case HSM_ST_IDLE:
1da177e4
LT		 3916 return;
3917
14be71f4 3918 case HSM_ST:
c91af2c8 3919 ata_pio_block(qc);
1da177e4
LT		 3920 break;
3921
14be71f4 3922 case HSM_ST_LAST:
c91af2c8 3923 qc_completed = ata_pio_complete(qc);
1da177e4
LT		 3924 break;
3925
14be71f4
AL		 3926 case HSM_ST_POLL:
3927 case HSM_ST_LAST_POLL:
c91af2c8 3928 timeout = ata_pio_poll(qc);
1da177e4
LT		 3929 break;
3930
14be71f4
AL		 3931 case HSM_ST_TMOUT:
3932 case HSM_ST_ERR:
c91af2c8 3933 ata_pio_error(qc);
1da177e4
LT		 3934 return;
3935 }
3936
3937 if (timeout)
c91af2c8 3938 ata_port_queue_task(ap, ata_pio_task, qc, timeout);
7fb6ec28
JG		 3939 else if (!qc_completed)
3940 goto fsm_start;
1da177e4
LT		 3941}
3942
8061f5f0
TH		 3943/**
3944 * atapi_packet_task - Write CDB bytes to hardware
c91af2c8 3945 * @_data: qc in progress
8061f5f0
TH		 3946 *
3947 * When device has indicated its readiness to accept
3948 * a CDB, this function is called. Send the CDB.
3949 * If DMA is to be performed, exit immediately.
3950 * Otherwise, we are in polling mode, so poll
3951 * status under operation succeeds or fails.
3952 *
3953 * LOCKING:
3954 * Kernel thread context (may sleep)
3955 */
8061f5f0
TH		 3956static void atapi_packet_task(void *_data)
3957{
c91af2c8
TH		 3958 struct ata_queued_cmd *qc = _data;
3959 struct ata_port *ap = qc->ap;
8061f5f0
TH		 3960 u8 status;
3961
8061f5f0
TH		 3962 /* sleep-wait for BSY to clear */
3963 DPRINTK("busy wait\n");
3964 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3965 qc->err_mask |= AC_ERR_TIMEOUT;
3966 goto err_out;
3967 }
3968
3969 /* make sure DRQ is set */
3970 status = ata_chk_status(ap);
3971 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3972 qc->err_mask |= AC_ERR_HSM;
3973 goto err_out;
3974 }
3975
3976 /* send SCSI cdb */
3977 DPRINTK("send cdb\n");
3978 WARN_ON(qc->dev->cdb_len < 12);
3979
3980 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3981 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3982 unsigned long flags;
3983
3984 /* Once we're done issuing command and kicking bmdma,
3985 * irq handler takes over. To not lose irq, we need
3986 * to clear NOINTR flag before sending cdb, but
3987 * interrupt handler shouldn't be invoked before we're
3988 * finished. Hence, the following locking.
3989 */
3990 spin_lock_irqsave(&ap->host_set->lock, flags);
3991 ap->flags &= ~ATA_FLAG_NOINTR;
3992 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3993 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3994 ap->ops->bmdma_start(qc); /* initiate bmdma */
3995 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3996 } else {
3997 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3998
3999 /* PIO commands are handled by polling */
4000 ap->hsm_task_state = HSM_ST;
c91af2c8 4001 ata_port_queue_task(ap, ata_pio_task, qc, 0);
8061f5f0
TH		 4002 }
4003
4004 return;
4005
4006err_out:
4007 ata_poll_qc_complete(qc);
4008}
4009
1da177e4
LT		 4010/**
4011 * ata_qc_new - Request an available ATA command, for queueing
4012 * @ap: Port associated with device @dev
4013 * @dev: Device from whom we request an available command structure
4014 *
4015 * LOCKING:
0cba632b 4016 * None.
1da177e4
LT		 4017 */
4018
4019static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4020{
4021 struct ata_queued_cmd *qc = NULL;
4022 unsigned int i;
4023
4024 for (i = 0; i < ATA_MAX_QUEUE; i++)
4025 if (!test_and_set_bit(i, &ap->qactive)) {
4026 qc = ata_qc_from_tag(ap, i);
4027 break;
4028 }
4029
4030 if (qc)
4031 qc->tag = i;
4032
4033 return qc;
4034}
4035
4036/**
4037 * ata_qc_new_init - Request an available ATA command, and initialize it
4038 * @ap: Port associated with device @dev
4039 * @dev: Device from whom we request an available command structure
4040 *
4041 * LOCKING:
0cba632b 4042 * None.
1da177e4
LT		 4043 */
4044
4045struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4046 struct ata_device *dev)
4047{
4048 struct ata_queued_cmd *qc;
4049
4050 qc = ata_qc_new(ap);
4051 if (qc) {
1da177e4
LT		 4052 qc->scsicmd = NULL;
4053 qc->ap = ap;
4054 qc->dev = dev;
1da177e4 4055
2c13b7ce 4056 ata_qc_reinit(qc);
1da177e4
LT		 4057 }
4058
4059 return qc;
4060}
4061
1da177e4
LT		 4062/**
4063 * ata_qc_free - free unused ata_queued_cmd
4064 * @qc: Command to complete
4065 *
4066 * Designed to free unused ata_queued_cmd object
4067 * in case something prevents using it.
4068 *
4069 * LOCKING:
0cba632b 4070 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4071 */
4072void ata_qc_free(struct ata_queued_cmd *qc)
4073{
4ba946e9
TH		 4074 struct ata_port *ap = qc->ap;
4075 unsigned int tag;
4076
a4631474 4077 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4078
4ba946e9
TH		 4079 qc->flags = 0;
4080 tag = qc->tag;
4081 if (likely(ata_tag_valid(tag))) {
4082 if (tag == ap->active_tag)
4083 ap->active_tag = ATA_TAG_POISON;
4084 qc->tag = ATA_TAG_POISON;
4085 clear_bit(tag, &ap->qactive);
4086 }
1da177e4
LT		 4087}
4088
76014427 4089void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4090{
a4631474
TH		 4091 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4092 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4093
4094 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4095 ata_sg_clean(qc);
4096
3f3791d3
AL		 4097 /* atapi: mark qc as inactive to prevent the interrupt handler
4098 * from completing the command twice later, before the error handler
4099 * is called. (when rc != 0 and atapi request sense is needed)
4100 */
4101 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4102
1da177e4 4103 /* call completion callback */
77853bf2 4104 qc->complete_fn(qc);
1da177e4
LT		 4105}
4106
4107static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4108{
4109 struct ata_port *ap = qc->ap;
4110
4111 switch (qc->tf.protocol) {
4112 case ATA_PROT_DMA:
4113 case ATA_PROT_ATAPI_DMA:
4114 return 1;
4115
4116 case ATA_PROT_ATAPI:
4117 case ATA_PROT_PIO:
1da177e4
LT		 4118 if (ap->flags & ATA_FLAG_PIO_DMA)
4119 return 1;
4120
4121 /* fall through */
4122
4123 default:
4124 return 0;
4125 }
4126
4127 /* never reached */
4128}
4129
4130/**
4131 * ata_qc_issue - issue taskfile to device
4132 * @qc: command to issue to device
4133 *
4134 * Prepare an ATA command to submission to device.
4135 * This includes mapping the data into a DMA-able
4136 * area, filling in the S/G table, and finally
4137 * writing the taskfile to hardware, starting the command.
4138 *
4139 * LOCKING:
4140 * spin_lock_irqsave(host_set lock)
1da177e4 4141 */
8e0e694a 4142void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4143{
4144 struct ata_port *ap = qc->ap;
4145
e4a70e76
TH		 4146 qc->ap->active_tag = qc->tag;
4147 qc->flags |= ATA_QCFLAG_ACTIVE;
4148
1da177e4
LT		 4149 if (ata_should_dma_map(qc)) {
4150 if (qc->flags & ATA_QCFLAG_SG) {
4151 if (ata_sg_setup(qc))
8e436af9 4152 goto sg_err;
1da177e4
LT		 4153 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4154 if (ata_sg_setup_one(qc))
8e436af9 4155 goto sg_err;
1da177e4
LT		 4156 }
4157 } else {
4158 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4159 }
4160
4161 ap->ops->qc_prep(qc);
4162
8e0e694a
TH		 4163 qc->err_mask |= ap->ops->qc_issue(qc);
4164 if (unlikely(qc->err_mask))
4165 goto err;
4166 return;
1da177e4 4167
8e436af9
TH		 4168sg_err:
4169 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4170 qc->err_mask |= AC_ERR_SYSTEM;
4171err:
4172 ata_qc_complete(qc);
1da177e4
LT		 4173}
4174
4175/**
4176 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4177 * @qc: command to issue to device
4178 *
4179 * Using various libata functions and hooks, this function
4180 * starts an ATA command. ATA commands are grouped into
4181 * classes called "protocols", and issuing each type of protocol
4182 * is slightly different.
4183 *
0baab86b
EF		 4184 * May be used as the qc_issue() entry in ata_port_operations.
4185 *
1da177e4
LT		 4186 * LOCKING:
4187 * spin_lock_irqsave(host_set lock)
4188 *
4189 * RETURNS:
9a3d9eb0 4190 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4191 */
4192
9a3d9eb0 4193unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4194{
4195 struct ata_port *ap = qc->ap;
4196
4197 ata_dev_select(ap, qc->dev->devno, 1, 0);
4198
4199 switch (qc->tf.protocol) {
4200 case ATA_PROT_NODATA:
e5338254 4201 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4202 break;
4203
4204 case ATA_PROT_DMA:
4205 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4206 ap->ops->bmdma_setup(qc); /* set up bmdma */
4207 ap->ops->bmdma_start(qc); /* initiate bmdma */
4208 break;
4209
4210 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4211 ata_qc_set_polling(qc);
e5338254 4212 ata_tf_to_host(ap, &qc->tf);
14be71f4 4213 ap->hsm_task_state = HSM_ST;
c91af2c8 4214 ata_port_queue_task(ap, ata_pio_task, qc, 0);
1da177e4
LT		 4215 break;
4216
4217 case ATA_PROT_ATAPI:
4218 ata_qc_set_polling(qc);
e5338254 4219 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4220 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4221 break;
4222
4223 case ATA_PROT_ATAPI_NODATA:
c1389503 4224 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4225 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4226 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4227 break;
4228
4229 case ATA_PROT_ATAPI_DMA:
c1389503 4230 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4231 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4232 ap->ops->bmdma_setup(qc); /* set up bmdma */
c91af2c8 4233 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4234 break;
4235
4236 default:
4237 WARN_ON(1);
9a3d9eb0 4238 return AC_ERR_SYSTEM;
1da177e4
LT		 4239 }
4240
4241 return 0;
4242}
4243
1da177e4
LT		 4244/**
4245 * ata_host_intr - Handle host interrupt for given (port, task)
4246 * @ap: Port on which interrupt arrived (possibly...)
4247 * @qc: Taskfile currently active in engine
4248 *
4249 * Handle host interrupt for given queued command. Currently,
4250 * only DMA interrupts are handled. All other commands are
4251 * handled via polling with interrupts disabled (nIEN bit).
4252 *
4253 * LOCKING:
4254 * spin_lock_irqsave(host_set lock)
4255 *
4256 * RETURNS:
4257 * One if interrupt was handled, zero if not (shared irq).
4258 */
4259
4260inline unsigned int ata_host_intr (struct ata_port *ap,
4261 struct ata_queued_cmd *qc)
4262{
4263 u8 status, host_stat;
4264
4265 switch (qc->tf.protocol) {
4266
4267 case ATA_PROT_DMA:
4268 case ATA_PROT_ATAPI_DMA:
4269 case ATA_PROT_ATAPI:
4270 /* check status of DMA engine */
4271 host_stat = ap->ops->bmdma_status(ap);
4272 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4273
4274 /* if it's not our irq... */
4275 if (!(host_stat & ATA_DMA_INTR))
4276 goto idle_irq;
4277
4278 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4279 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4280
4281 /* fall through */
4282
4283 case ATA_PROT_ATAPI_NODATA:
4284 case ATA_PROT_NODATA:
4285 /* check altstatus */
4286 status = ata_altstatus(ap);
4287 if (status & ATA_BUSY)
4288 goto idle_irq;
4289
4290 /* check main status, clearing INTRQ */
4291 status = ata_chk_status(ap);
4292 if (unlikely(status & ATA_BUSY))
4293 goto idle_irq;
4294 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4295 ap->id, qc->tf.protocol, status);
4296
4297 /* ack bmdma irq events */
4298 ap->ops->irq_clear(ap);
4299
4300 /* complete taskfile transaction */
a22e2eb0
AL		 4301 qc->err_mask |= ac_err_mask(status);
4302 ata_qc_complete(qc);
1da177e4
LT		 4303 break;
4304
4305 default:
4306 goto idle_irq;
4307 }
4308
4309 return 1; /* irq handled */
4310
4311idle_irq:
4312 ap->stats.idle_irq++;
4313
4314#ifdef ATA_IRQ_TRAP
4315 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4316 ata_irq_ack(ap, 0); /* debug trap */
4317 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4318 return 1;
1da177e4
LT		 4319 }
4320#endif
4321 return 0; /* irq not handled */
4322}
4323
4324/**
4325 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4326 * @irq: irq line (unused)
4327 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4328 * @regs: unused
4329 *
0cba632b
JG		 4330 * Default interrupt handler for PCI IDE devices. Calls
4331 * ata_host_intr() for each port that is not disabled.
4332 *
1da177e4 4333 * LOCKING:
0cba632b 4334 * Obtains host_set lock during operation.
1da177e4
LT		 4335 *
4336 * RETURNS:
0cba632b 4337 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4338 */
4339
4340irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4341{
4342 struct ata_host_set *host_set = dev_instance;
4343 unsigned int i;
4344 unsigned int handled = 0;
4345 unsigned long flags;
4346
4347 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4348 spin_lock_irqsave(&host_set->lock, flags);
4349
4350 for (i = 0; i < host_set->n_ports; i++) {
4351 struct ata_port *ap;
4352
4353 ap = host_set->ports[i];
c1389503 4354 if (ap &&
198e0fed 4355 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4356 struct ata_queued_cmd *qc;
4357
4358 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4359 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4360 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4361 handled |= ata_host_intr(ap, qc);
4362 }
4363 }
4364
4365 spin_unlock_irqrestore(&host_set->lock, flags);
4366
4367 return IRQ_RETVAL(handled);
4368}
4369
0baab86b 4370
9b847548
JA		 4371/*
4372 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4373 * without filling any other registers
4374 */
4375static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4376 u8 cmd)
4377{
4378 struct ata_taskfile tf;
4379 int err;
4380
4381 ata_tf_init(ap, &tf, dev->devno);
4382
4383 tf.command = cmd;
4384 tf.flags |= ATA_TFLAG_DEVICE;
4385 tf.protocol = ATA_PROT_NODATA;
4386
d69cf37d 4387 err = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
9b847548
JA		 4388 if (err)
4389 printk(KERN_ERR "%s: ata command failed: %d\n",
4390 __FUNCTION__, err);
4391
4392 return err;
4393}
4394
4395static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4396{
4397 u8 cmd;
4398
4399 if (!ata_try_flush_cache(dev))
4400 return 0;
4401
4402 if (ata_id_has_flush_ext(dev->id))
4403 cmd = ATA_CMD_FLUSH_EXT;
4404 else
4405 cmd = ATA_CMD_FLUSH;
4406
4407 return ata_do_simple_cmd(ap, dev, cmd);
4408}
4409
4410static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4411{
4412 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4413}
4414
4415static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4416{
4417 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4418}
4419
4420/**
4421 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4422 * @ap: port the device is connected to
4423 * @dev: the device to resume
9b847548
JA		 4424 *
4425 * Kick the drive back into action, by sending it an idle immediate
4426 * command and making sure its transfer mode matches between drive
4427 * and host.
4428 *
4429 */
4430int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4431{
4432 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4433 struct ata_device *failed_dev;
9b847548 4434 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4435 while (ata_set_mode(ap, &failed_dev))
4436 ata_dev_disable(ap, failed_dev);
9b847548 4437 }
e1211e3f 4438 if (!ata_dev_enabled(dev))
9b847548
JA		 4439 return 0;
4440 if (dev->class == ATA_DEV_ATA)
4441 ata_start_drive(ap, dev);
4442
4443 return 0;
4444}
4445
4446/**
4447 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4448 * @ap: port the device is connected to
4449 * @dev: the device to suspend
9b847548
JA		 4450 *
4451 * Flush the cache on the drive, if appropriate, then issue a
4452 * standbynow command.
9b847548 4453 */
082776e4 4454int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4455{
e1211e3f 4456 if (!ata_dev_enabled(dev))
9b847548
JA		 4457 return 0;
4458 if (dev->class == ATA_DEV_ATA)
4459 ata_flush_cache(ap, dev);
4460
082776e4
NC		 4461 if (state.event != PM_EVENT_FREEZE)
4462 ata_standby_drive(ap, dev);
9b847548
JA		 4463 ap->flags |= ATA_FLAG_SUSPENDED;
4464 return 0;
4465}
4466
c893a3ae
RD		 4467/**
4468 * ata_port_start - Set port up for dma.
4469 * @ap: Port to initialize
4470 *
4471 * Called just after data structures for each port are
4472 * initialized. Allocates space for PRD table.
4473 *
4474 * May be used as the port_start() entry in ata_port_operations.
4475 *
4476 * LOCKING:
4477 * Inherited from caller.
4478 */
4479
1da177e4
LT		 4480int ata_port_start (struct ata_port *ap)
4481{
2f1f610b 4482 struct device *dev = ap->dev;
6037d6bb 4483 int rc;
1da177e4
LT		 4484
4485 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4486 if (!ap->prd)
4487 return -ENOMEM;
4488
6037d6bb
JG		 4489 rc = ata_pad_alloc(ap, dev);
4490 if (rc) {
cedc9a47 4491 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4492 return rc;
cedc9a47
JG		 4493 }
4494
1da177e4
LT		 4495 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4496
4497 return 0;
4498}
4499
0baab86b
EF		 4500
4501/**
4502 * ata_port_stop - Undo ata_port_start()
4503 * @ap: Port to shut down
4504 *
4505 * Frees the PRD table.
4506 *
4507 * May be used as the port_stop() entry in ata_port_operations.
4508 *
4509 * LOCKING:
6f0ef4fa 4510 * Inherited from caller.
0baab86b
EF		 4511 */
4512
1da177e4
LT		 4513void ata_port_stop (struct ata_port *ap)
4514{
2f1f610b 4515 struct device *dev = ap->dev;
1da177e4
LT		 4516
4517 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4518 ata_pad_free(ap, dev);
1da177e4
LT		 4519}
4520
aa8f0dc6
JG		 4521void ata_host_stop (struct ata_host_set *host_set)
4522{
4523 if (host_set->mmio_base)
4524 iounmap(host_set->mmio_base);
4525}
4526
4527
1da177e4
LT		 4528/**
4529 * ata_host_remove - Unregister SCSI host structure with upper layers
4530 * @ap: Port to unregister
4531 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4532 *
4533 * LOCKING:
6f0ef4fa 4534 * Inherited from caller.
1da177e4
LT		 4535 */
4536
4537static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4538{
4539 struct Scsi_Host *sh = ap->host;
4540
4541 DPRINTK("ENTER\n");
4542
4543 if (do_unregister)
4544 scsi_remove_host(sh);
4545
4546 ap->ops->port_stop(ap);
4547}
4548
4549/**
4550 * ata_host_init - Initialize an ata_port structure
4551 * @ap: Structure to initialize
4552 * @host: associated SCSI mid-layer structure
4553 * @host_set: Collection of hosts to which @ap belongs
4554 * @ent: Probe information provided by low-level driver
4555 * @port_no: Port number associated with this ata_port
4556 *
0cba632b
JG		 4557 * Initialize a new ata_port structure, and its associated
4558 * scsi_host.
4559 *
1da177e4 4560 * LOCKING:
0cba632b 4561 * Inherited from caller.
1da177e4
LT		 4562 */
4563
4564static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4565 struct ata_host_set *host_set,
057ace5e 4566 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4567{
4568 unsigned int i;
4569
4570 host->max_id = 16;
4571 host->max_lun = 1;
4572 host->max_channel = 1;
4573 host->unique_id = ata_unique_id++;
4574 host->max_cmd_len = 12;
12413197 4575
198e0fed 4576 ap->flags = ATA_FLAG_DISABLED;
1da177e4
LT		 4577 ap->id = host->unique_id;
4578 ap->host = host;
4579 ap->ctl = ATA_DEVCTL_OBS;
4580 ap->host_set = host_set;
2f1f610b 4581 ap->dev = ent->dev;
1da177e4
LT		 4582 ap->port_no = port_no;
4583 ap->hard_port_no =
4584 ent->legacy_mode ? ent->hard_port_no : port_no;
4585 ap->pio_mask = ent->pio_mask;
4586 ap->mwdma_mask = ent->mwdma_mask;
4587 ap->udma_mask = ent->udma_mask;
4588 ap->flags |= ent->host_flags;
4589 ap->ops = ent->port_ops;
4590 ap->cbl = ATA_CBL_NONE;
1c3fae4d 4591 ap->sata_spd_limit = UINT_MAX;
1da177e4
LT		 4592 ap->active_tag = ATA_TAG_POISON;
4593 ap->last_ctl = 0xFF;
4594
86e45b6b 4595 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4596 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4597
acf356b1
TH		 4598 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4599 struct ata_device *dev = &ap->device[i];
4600 dev->devno = i;
4601 dev->pio_mask = UINT_MAX;
4602 dev->mwdma_mask = UINT_MAX;
4603 dev->udma_mask = UINT_MAX;
4604 }
1da177e4
LT		 4605
4606#ifdef ATA_IRQ_TRAP
4607 ap->stats.unhandled_irq = 1;
4608 ap->stats.idle_irq = 1;
4609#endif
4610
4611 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4612}
4613
4614/**
4615 * ata_host_add - Attach low-level ATA driver to system
4616 * @ent: Information provided by low-level driver
4617 * @host_set: Collections of ports to which we add
4618 * @port_no: Port number associated with this host
4619 *
0cba632b
JG		 4620 * Attach low-level ATA driver to system.
4621 *
1da177e4 4622 * LOCKING:
0cba632b 4623 * PCI/etc. bus probe sem.
1da177e4
LT		 4624 *
4625 * RETURNS:
0cba632b 4626 * New ata_port on success, for NULL on error.
1da177e4
LT		 4627 */
4628
057ace5e 4629static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4630 struct ata_host_set *host_set,
4631 unsigned int port_no)
4632{
4633 struct Scsi_Host *host;
4634 struct ata_port *ap;
4635 int rc;
4636
4637 DPRINTK("ENTER\n");
aec5c3c1
TH		 4638
4639 if (!ent->port_ops->probe_reset &&
4640 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4641 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4642 port_no);
4643 return NULL;
4644 }
4645
1da177e4
LT		 4646 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4647 if (!host)
4648 return NULL;
4649
30afc84c
TH		 4650 host->transportt = &ata_scsi_transport_template;
4651
35bb94b1 4652 ap = ata_shost_to_port(host);
1da177e4
LT		 4653
4654 ata_host_init(ap, host, host_set, ent, port_no);
4655
4656 rc = ap->ops->port_start(ap);
4657 if (rc)
4658 goto err_out;
4659
4660 return ap;
4661
4662err_out:
4663 scsi_host_put(host);
4664 return NULL;
4665}
4666
4667/**
0cba632b
JG		 4668 * ata_device_add - Register hardware device with ATA and SCSI layers
4669 * @ent: Probe information describing hardware device to be registered
4670 *
4671 * This function processes the information provided in the probe
4672 * information struct @ent, allocates the necessary ATA and SCSI
4673 * host information structures, initializes them, and registers
4674 * everything with requisite kernel subsystems.
4675 *
4676 * This function requests irqs, probes the ATA bus, and probes
4677 * the SCSI bus.
1da177e4
LT		 4678 *
4679 * LOCKING:
0cba632b 4680 * PCI/etc. bus probe sem.
1da177e4
LT		 4681 *
4682 * RETURNS:
0cba632b 4683 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4684 */
4685
057ace5e 4686int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4687{
4688 unsigned int count = 0, i;
4689 struct device *dev = ent->dev;
4690 struct ata_host_set *host_set;
4691
4692 DPRINTK("ENTER\n");
4693 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4694 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4695 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4696 if (!host_set)
4697 return 0;
1da177e4
LT		 4698 spin_lock_init(&host_set->lock);
4699
4700 host_set->dev = dev;
4701 host_set->n_ports = ent->n_ports;
4702 host_set->irq = ent->irq;
4703 host_set->mmio_base = ent->mmio_base;
4704 host_set->private_data = ent->private_data;
4705 host_set->ops = ent->port_ops;
5444a6f4 4706 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4707
4708 /* register each port bound to this device */
4709 for (i = 0; i < ent->n_ports; i++) {
4710 struct ata_port *ap;
4711 unsigned long xfer_mode_mask;
4712
4713 ap = ata_host_add(ent, host_set, i);
4714 if (!ap)
4715 goto err_out;
4716
4717 host_set->ports[i] = ap;
4718 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4719 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4720 (ap->pio_mask << ATA_SHIFT_PIO);
4721
4722 /* print per-port info to dmesg */
4723 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4724 "bmdma 0x%lX irq %lu\n",
4725 ap->id,
4726 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4727 ata_mode_string(xfer_mode_mask),
4728 ap->ioaddr.cmd_addr,
4729 ap->ioaddr.ctl_addr,
4730 ap->ioaddr.bmdma_addr,
4731 ent->irq);
4732
4733 ata_chk_status(ap);
4734 host_set->ops->irq_clear(ap);
4735 count++;
4736 }
4737
57f3bda8
RD		 4738 if (!count)
4739 goto err_free_ret;
1da177e4
LT		 4740
4741 /* obtain irq, that is shared between channels */
4742 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4743 DRV_NAME, host_set))
4744 goto err_out;
4745
4746 /* perform each probe synchronously */
4747 DPRINTK("probe begin\n");
4748 for (i = 0; i < count; i++) {
4749 struct ata_port *ap;
4750 int rc;
4751
4752 ap = host_set->ports[i];
4753
c893a3ae 4754 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4755 rc = ata_bus_probe(ap);
c893a3ae 4756 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4757
4758 if (rc) {
4759 /* FIXME: do something useful here?
4760 * Current libata behavior will
4761 * tear down everything when
4762 * the module is removed
4763 * or the h/w is unplugged.
4764 */
4765 }
4766
4767 rc = scsi_add_host(ap->host, dev);
4768 if (rc) {
4769 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4770 ap->id);
4771 /* FIXME: do something useful here */
4772 /* FIXME: handle unconditional calls to
4773 * scsi_scan_host and ata_host_remove, below,
4774 * at the very least
4775 */
4776 }
4777 }
4778
4779 /* probes are done, now scan each port's disk(s) */
c893a3ae 4780 DPRINTK("host probe begin\n");
1da177e4
LT		 4781 for (i = 0; i < count; i++) {
4782 struct ata_port *ap = host_set->ports[i];
4783
644dd0cc 4784 ata_scsi_scan_host(ap);
1da177e4
LT		 4785 }
4786
4787 dev_set_drvdata(dev, host_set);
4788
4789 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4790 return ent->n_ports; /* success */
4791
4792err_out:
4793 for (i = 0; i < count; i++) {
4794 ata_host_remove(host_set->ports[i], 1);
4795 scsi_host_put(host_set->ports[i]->host);
4796 }
57f3bda8 4797err_free_ret:
1da177e4
LT		 4798 kfree(host_set);
4799 VPRINTK("EXIT, returning 0\n");
4800 return 0;
4801}
4802
17b14451
AC		 4803/**
4804 * ata_host_set_remove - PCI layer callback for device removal
4805 * @host_set: ATA host set that was removed
4806 *
2e9edbf8 4807 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4808 * objects.
4809 *
4810 * LOCKING:
4811 * Inherited from calling layer (may sleep).
4812 */
4813
17b14451
AC		 4814void ata_host_set_remove(struct ata_host_set *host_set)
4815{
4816 struct ata_port *ap;
4817 unsigned int i;
4818
4819 for (i = 0; i < host_set->n_ports; i++) {
4820 ap = host_set->ports[i];
4821 scsi_remove_host(ap->host);
4822 }
4823
4824 free_irq(host_set->irq, host_set);
4825
4826 for (i = 0; i < host_set->n_ports; i++) {
4827 ap = host_set->ports[i];
4828
4829 ata_scsi_release(ap->host);
4830
4831 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4832 struct ata_ioports *ioaddr = &ap->ioaddr;
4833
4834 if (ioaddr->cmd_addr == 0x1f0)
4835 release_region(0x1f0, 8);
4836 else if (ioaddr->cmd_addr == 0x170)
4837 release_region(0x170, 8);
4838 }
4839
4840 scsi_host_put(ap->host);
4841 }
4842
4843 if (host_set->ops->host_stop)
4844 host_set->ops->host_stop(host_set);
4845
4846 kfree(host_set);
4847}
4848
1da177e4
LT		 4849/**
4850 * ata_scsi_release - SCSI layer callback hook for host unload
4851 * @host: libata host to be unloaded
4852 *
4853 * Performs all duties necessary to shut down a libata port...
4854 * Kill port kthread, disable port, and release resources.
4855 *
4856 * LOCKING:
4857 * Inherited from SCSI layer.
4858 *
4859 * RETURNS:
4860 * One.
4861 */
4862
4863int ata_scsi_release(struct Scsi_Host *host)
4864{
35bb94b1 4865 struct ata_port *ap = ata_shost_to_port(host);
d9572b1d 4866 int i;
1da177e4
LT		 4867
4868 DPRINTK("ENTER\n");
4869
4870 ap->ops->port_disable(ap);
4871 ata_host_remove(ap, 0);
d9572b1d
TH		 4872 for (i = 0; i < ATA_MAX_DEVICES; i++)
4873 kfree(ap->device[i].id);
1da177e4
LT		 4874
4875 DPRINTK("EXIT\n");
4876 return 1;
4877}
4878
4879/**
4880 * ata_std_ports - initialize ioaddr with standard port offsets.
4881 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4882 *
4883 * Utility function which initializes data_addr, error_addr,
4884 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4885 * device_addr, status_addr, and command_addr to standard offsets
4886 * relative to cmd_addr.
4887 *
4888 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4889 */
0baab86b 4890
1da177e4
LT		 4891void ata_std_ports(struct ata_ioports *ioaddr)
4892{
4893 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4894 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4895 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4896 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4897 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4898 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4899 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4900 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4901 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4902 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4903}
4904
0baab86b 4905
374b1873
JG		 4906#ifdef CONFIG_PCI
4907
4908void ata_pci_host_stop (struct ata_host_set *host_set)
4909{
4910 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4911
4912 pci_iounmap(pdev, host_set->mmio_base);
4913}
4914
1da177e4
LT		 4915/**
4916 * ata_pci_remove_one - PCI layer callback for device removal
4917 * @pdev: PCI device that was removed
4918 *
4919 * PCI layer indicates to libata via this hook that
6f0ef4fa 4920 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4921 * Handle this by unregistering all objects associated
4922 * with this PCI device. Free those objects. Then finally
4923 * release PCI resources and disable device.
4924 *
4925 * LOCKING:
4926 * Inherited from PCI layer (may sleep).
4927 */
4928
4929void ata_pci_remove_one (struct pci_dev *pdev)
4930{
4931 struct device *dev = pci_dev_to_dev(pdev);
4932 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4933
17b14451 4934 ata_host_set_remove(host_set);
1da177e4
LT		 4935 pci_release_regions(pdev);
4936 pci_disable_device(pdev);
4937 dev_set_drvdata(dev, NULL);
4938}
4939
4940/* move to PCI subsystem */
057ace5e 4941int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4942{
4943 unsigned long tmp = 0;
4944
4945 switch (bits->width) {
4946 case 1: {
4947 u8 tmp8 = 0;
4948 pci_read_config_byte(pdev, bits->reg, &tmp8);
4949 tmp = tmp8;
4950 break;
4951 }
4952 case 2: {
4953 u16 tmp16 = 0;
4954 pci_read_config_word(pdev, bits->reg, &tmp16);
4955 tmp = tmp16;
4956 break;
4957 }
4958 case 4: {
4959 u32 tmp32 = 0;
4960 pci_read_config_dword(pdev, bits->reg, &tmp32);
4961 tmp = tmp32;
4962 break;
4963 }
4964
4965 default:
4966 return -EINVAL;
4967 }
4968
4969 tmp &= bits->mask;
4970
4971 return (tmp == bits->val) ? 1 : 0;
4972}
9b847548
JA		 4973
4974int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4975{
4976 pci_save_state(pdev);
4977 pci_disable_device(pdev);
4978 pci_set_power_state(pdev, PCI_D3hot);
4979 return 0;
4980}
4981
4982int ata_pci_device_resume(struct pci_dev *pdev)
4983{
4984 pci_set_power_state(pdev, PCI_D0);
4985 pci_restore_state(pdev);
4986 pci_enable_device(pdev);
4987 pci_set_master(pdev);
4988 return 0;
4989}
1da177e4
LT		 4990#endif /* CONFIG_PCI */
4991
4992
1da177e4
LT		 4993static int __init ata_init(void)
4994{
4995 ata_wq = create_workqueue("ata");
4996 if (!ata_wq)
4997 return -ENOMEM;
4998
4999 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5000 return 0;
5001}
5002
5003static void __exit ata_exit(void)
5004{
5005 destroy_workqueue(ata_wq);
5006}
5007
5008module_init(ata_init);
5009module_exit(ata_exit);
5010
67846b30
JG		 5011static unsigned long ratelimit_time;
5012static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5013
5014int ata_ratelimit(void)
5015{
5016 int rc;
5017 unsigned long flags;
5018
5019 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5020
5021 if (time_after(jiffies, ratelimit_time)) {
5022 rc = 1;
5023 ratelimit_time = jiffies + (HZ/5);
5024 } else
5025 rc = 0;
5026
5027 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5028
5029 return rc;
5030}
5031
c22daff4
TH		 5032/**
5033 * ata_wait_register - wait until register value changes
5034 * @reg: IO-mapped register
5035 * @mask: Mask to apply to read register value
5036 * @val: Wait condition
5037 * @interval_msec: polling interval in milliseconds
5038 * @timeout_msec: timeout in milliseconds
5039 *
5040 * Waiting for some bits of register to change is a common
5041 * operation for ATA controllers. This function reads 32bit LE
5042 * IO-mapped register @reg and tests for the following condition.
5043 *
5044 * (*@reg & mask) != val
5045 *
5046 * If the condition is met, it returns; otherwise, the process is
5047 * repeated after @interval_msec until timeout.
5048 *
5049 * LOCKING:
5050 * Kernel thread context (may sleep)
5051 *
5052 * RETURNS:
5053 * The final register value.
5054 */
5055u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5056 unsigned long interval_msec,
5057 unsigned long timeout_msec)
5058{
5059 unsigned long timeout;
5060 u32 tmp;
5061
5062 tmp = ioread32(reg);
5063
5064 /* Calculate timeout _after_ the first read to make sure
5065 * preceding writes reach the controller before starting to
5066 * eat away the timeout.
5067 */
5068 timeout = jiffies + (timeout_msec * HZ) / 1000;
5069
5070 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5071 msleep(interval_msec);
5072 tmp = ioread32(reg);
5073 }
5074
5075 return tmp;
5076}
5077
1da177e4
LT		 5078/*
5079 * libata is essentially a library of internal helper functions for
5080 * low-level ATA host controller drivers. As such, the API/ABI is
5081 * likely to change as new drivers are added and updated.
5082 * Do not depend on ABI/API stability.
5083 */
5084
5085EXPORT_SYMBOL_GPL(ata_std_bios_param);
5086EXPORT_SYMBOL_GPL(ata_std_ports);
5087EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5088EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5089EXPORT_SYMBOL_GPL(ata_sg_init);
5090EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5091EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4 5092EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
1da177e4
LT		 5093EXPORT_SYMBOL_GPL(ata_tf_load);
5094EXPORT_SYMBOL_GPL(ata_tf_read);
5095EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5096EXPORT_SYMBOL_GPL(ata_std_dev_select);
5097EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5098EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5099EXPORT_SYMBOL_GPL(ata_check_status);
5100EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5101EXPORT_SYMBOL_GPL(ata_exec_command);
5102EXPORT_SYMBOL_GPL(ata_port_start);
5103EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5104EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5105EXPORT_SYMBOL_GPL(ata_interrupt);
5106EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5107EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5108EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5109EXPORT_SYMBOL_GPL(ata_bmdma_start);
5110EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5111EXPORT_SYMBOL_GPL(ata_bmdma_status);
5112EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5113EXPORT_SYMBOL_GPL(ata_port_probe);
5114EXPORT_SYMBOL_GPL(sata_phy_reset);
5115EXPORT_SYMBOL_GPL(__sata_phy_reset);
5116EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5117EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5118EXPORT_SYMBOL_GPL(ata_std_softreset);
5119EXPORT_SYMBOL_GPL(sata_std_hardreset);
5120EXPORT_SYMBOL_GPL(ata_std_postreset);
5121EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5122EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5123EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5124EXPORT_SYMBOL_GPL(ata_dev_classify);
5125EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5126EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5127EXPORT_SYMBOL_GPL(ata_ratelimit);
c22daff4 5128EXPORT_SYMBOL_GPL(ata_wait_register);
6f8b9958 5129EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5130EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5131EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5132EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4
LT		 5133EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5134EXPORT_SYMBOL_GPL(ata_scsi_release);
5135EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 5136EXPORT_SYMBOL_GPL(ata_id_string);
5137EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4
LT		 5138EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5139
1bc4ccff 5140EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5141EXPORT_SYMBOL_GPL(ata_timing_compute);
5142EXPORT_SYMBOL_GPL(ata_timing_merge);
5143
1da177e4
LT		 5144#ifdef CONFIG_PCI
5145EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5146EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5147EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5148EXPORT_SYMBOL_GPL(ata_pci_init_one);
5149EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5150EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5151EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5152EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5153EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5154#endif /* CONFIG_PCI */
9b847548
JA		 5155
5156EXPORT_SYMBOL_GPL(ata_device_suspend);
5157EXPORT_SYMBOL_GPL(ata_device_resume);
5158EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5159EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
ece1d636
TH		 5160
5161EXPORT_SYMBOL_GPL(ata_scsi_error);
5162EXPORT_SYMBOL_GPL(ata_eng_timeout);
5163EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5164EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
Linux kernel - Deliverables
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