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[deliverable/linux.git] / drivers / scsi / libata-core.c
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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f
TH		 64static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
e33b9dfa 68static void ata_pio_error(struct ata_port *ap);
a6d5a51c
TH		 69static unsigned int ata_dev_xfermask(struct ata_port *ap,
70 struct ata_device *dev);
1da177e4
LT		 71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
1623c81e
JG		 75int atapi_enabled = 0;
76module_param(atapi_enabled, int, 0444);
77MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
78
c3c013a2
JG		 79int libata_fua = 0;
80module_param_named(fua, libata_fua, int, 0444);
81MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
82
1da177e4
LT		 83MODULE_AUTHOR("Jeff Garzik");
84MODULE_DESCRIPTION("Library module for ATA devices");
85MODULE_LICENSE("GPL");
86MODULE_VERSION(DRV_VERSION);
87
0baab86b 88
1da177e4
LT		 89/**
90 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
91 * @tf: Taskfile to convert
92 * @fis: Buffer into which data will output
93 * @pmp: Port multiplier port
94 *
95 * Converts a standard ATA taskfile to a Serial ATA
96 * FIS structure (Register - Host to Device).
97 *
98 * LOCKING:
99 * Inherited from caller.
100 */
101
057ace5e 102void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 103{
104 fis[0] = 0x27; /* Register - Host to Device FIS */
105 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
106 bit 7 indicates Command FIS */
107 fis[2] = tf->command;
108 fis[3] = tf->feature;
109
110 fis[4] = tf->lbal;
111 fis[5] = tf->lbam;
112 fis[6] = tf->lbah;
113 fis[7] = tf->device;
114
115 fis[8] = tf->hob_lbal;
116 fis[9] = tf->hob_lbam;
117 fis[10] = tf->hob_lbah;
118 fis[11] = tf->hob_feature;
119
120 fis[12] = tf->nsect;
121 fis[13] = tf->hob_nsect;
122 fis[14] = 0;
123 fis[15] = tf->ctl;
124
125 fis[16] = 0;
126 fis[17] = 0;
127 fis[18] = 0;
128 fis[19] = 0;
129}
130
131/**
132 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
133 * @fis: Buffer from which data will be input
134 * @tf: Taskfile to output
135 *
e12a1be6 136 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 137 *
138 * LOCKING:
139 * Inherited from caller.
140 */
141
057ace5e 142void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 143{
144 tf->command = fis[2]; /* status */
145 tf->feature = fis[3]; /* error */
146
147 tf->lbal = fis[4];
148 tf->lbam = fis[5];
149 tf->lbah = fis[6];
150 tf->device = fis[7];
151
152 tf->hob_lbal = fis[8];
153 tf->hob_lbam = fis[9];
154 tf->hob_lbah = fis[10];
155
156 tf->nsect = fis[12];
157 tf->hob_nsect = fis[13];
158}
159
8cbd6df1
AL		 160static const u8 ata_rw_cmds[] = {
161 /* pio multi */
162 ATA_CMD_READ_MULTI,
163 ATA_CMD_WRITE_MULTI,
164 ATA_CMD_READ_MULTI_EXT,
165 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 166 0,
167 0,
168 0,
169 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 170 /* pio */
171 ATA_CMD_PIO_READ,
172 ATA_CMD_PIO_WRITE,
173 ATA_CMD_PIO_READ_EXT,
174 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 175 0,
176 0,
177 0,
178 0,
8cbd6df1
AL		 179 /* dma */
180 ATA_CMD_READ,
181 ATA_CMD_WRITE,
182 ATA_CMD_READ_EXT,
9a3dccc4
TH		 183 ATA_CMD_WRITE_EXT,
184 0,
185 0,
186 0,
187 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 188};
1da177e4
LT		 189
190/**
8cbd6df1
AL		 191 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
192 * @qc: command to examine and configure
1da177e4 193 *
8cbd6df1
AL		 194 * Examine the device configuration and tf->flags to calculate
195 * the proper read/write commands and protocol to use.
1da177e4
LT		 196 *
197 * LOCKING:
198 * caller.
199 */
9a3dccc4 200int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 201{
8cbd6df1
AL		 202 struct ata_taskfile *tf = &qc->tf;
203 struct ata_device *dev = qc->dev;
9a3dccc4 204 u8 cmd;
1da177e4 205
9a3dccc4 206 int index, fua, lba48, write;
8cbd6df1 207
9a3dccc4 208 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 209 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
210 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 211
8cbd6df1
AL		 212 if (dev->flags & ATA_DFLAG_PIO) {
213 tf->protocol = ATA_PROT_PIO;
9a3dccc4 214 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 215 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
216 /* Unable to use DMA due to host limitation */
217 tf->protocol = ATA_PROT_PIO;
aef9d533 218 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 219 } else {
220 tf->protocol = ATA_PROT_DMA;
9a3dccc4 221 index = 16;
8cbd6df1 222 }
1da177e4 223
9a3dccc4
TH		 224 cmd = ata_rw_cmds[index + fua + lba48 + write];
225 if (cmd) {
226 tf->command = cmd;
227 return 0;
228 }
229 return -1;
1da177e4
LT		 230}
231
cb95d562
TH		 232/**
233 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
234 * @pio_mask: pio_mask
235 * @mwdma_mask: mwdma_mask
236 * @udma_mask: udma_mask
237 *
238 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
239 * unsigned int xfer_mask.
240 *
241 * LOCKING:
242 * None.
243 *
244 * RETURNS:
245 * Packed xfer_mask.
246 */
247static unsigned int ata_pack_xfermask(unsigned int pio_mask,
248 unsigned int mwdma_mask,
249 unsigned int udma_mask)
250{
251 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
252 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
253 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
254}
255
256static const struct ata_xfer_ent {
257 unsigned int shift, bits;
258 u8 base;
259} ata_xfer_tbl[] = {
260 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
261 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
262 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
263 { -1, },
1da177e4
LT		 264};
265
266/**
cb95d562
TH		 267 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
268 * @xfer_mask: xfer_mask of interest
1da177e4 269 *
cb95d562
TH		 270 * Return matching XFER_* value for @xfer_mask. Only the highest
271 * bit of @xfer_mask is considered.
1da177e4
LT		 272 *
273 * LOCKING:
274 * None.
275 *
276 * RETURNS:
cb95d562 277 * Matching XFER_* value, 0 if no match found.
1da177e4 278 */
cb95d562
TH		 279static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
280{
281 int highbit = fls(xfer_mask) - 1;
282 const struct ata_xfer_ent *ent;
1da177e4 283
cb95d562
TH		 284 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
285 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
286 return ent->base + highbit - ent->shift;
287 return 0;
288}
289
290/**
291 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
292 * @xfer_mode: XFER_* of interest
293 *
294 * Return matching xfer_mask for @xfer_mode.
295 *
296 * LOCKING:
297 * None.
298 *
299 * RETURNS:
300 * Matching xfer_mask, 0 if no match found.
301 */
302static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
1da177e4 303{
cb95d562 304 const struct ata_xfer_ent *ent;
1da177e4 305
cb95d562
TH		 306 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
307 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
308 return 1 << (ent->shift + xfer_mode - ent->base);
309 return 0;
310}
1da177e4 311
cb95d562
TH		 312/**
313 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
314 * @xfer_mode: XFER_* of interest
315 *
316 * Return matching xfer_shift for @xfer_mode.
317 *
318 * LOCKING:
319 * None.
320 *
321 * RETURNS:
322 * Matching xfer_shift, -1 if no match found.
323 */
324static int ata_xfer_mode2shift(unsigned int xfer_mode)
325{
326 const struct ata_xfer_ent *ent;
1da177e4 327
cb95d562
TH		 328 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
329 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
330 return ent->shift;
331 return -1;
332}
333
1da177e4 334/**
1da7b0d0
TH		 335 * ata_mode_string - convert xfer_mask to string
336 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 337 *
338 * Determine string which represents the highest speed
1da7b0d0 339 * (highest bit in @modemask).
1da177e4
LT		 340 *
341 * LOCKING:
342 * None.
343 *
344 * RETURNS:
345 * Constant C string representing highest speed listed in
1da7b0d0 346 * @mode_mask, or the constant C string "<n/a>".
1da177e4 347 */
1da7b0d0 348static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 349{
75f554bc
TH		 350 static const char * const xfer_mode_str[] = {
351 "PIO0",
352 "PIO1",
353 "PIO2",
354 "PIO3",
355 "PIO4",
356 "MWDMA0",
357 "MWDMA1",
358 "MWDMA2",
359 "UDMA/16",
360 "UDMA/25",
361 "UDMA/33",
362 "UDMA/44",
363 "UDMA/66",
364 "UDMA/100",
365 "UDMA/133",
366 "UDMA7",
367 };
1da7b0d0 368 int highbit;
1da177e4 369
1da7b0d0
TH		 370 highbit = fls(xfer_mask) - 1;
371 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
372 return xfer_mode_str[highbit];
1da177e4 373 return "<n/a>";
1da177e4
LT		 374}
375
376/**
377 * ata_pio_devchk - PATA device presence detection
378 * @ap: ATA channel to examine
379 * @device: Device to examine (starting at zero)
380 *
381 * This technique was originally described in
382 * Hale Landis's ATADRVR (www.ata-atapi.com), and
383 * later found its way into the ATA/ATAPI spec.
384 *
385 * Write a pattern to the ATA shadow registers,
386 * and if a device is present, it will respond by
387 * correctly storing and echoing back the
388 * ATA shadow register contents.
389 *
390 * LOCKING:
391 * caller.
392 */
393
394static unsigned int ata_pio_devchk(struct ata_port *ap,
395 unsigned int device)
396{
397 struct ata_ioports *ioaddr = &ap->ioaddr;
398 u8 nsect, lbal;
399
400 ap->ops->dev_select(ap, device);
401
402 outb(0x55, ioaddr->nsect_addr);
403 outb(0xaa, ioaddr->lbal_addr);
404
405 outb(0xaa, ioaddr->nsect_addr);
406 outb(0x55, ioaddr->lbal_addr);
407
408 outb(0x55, ioaddr->nsect_addr);
409 outb(0xaa, ioaddr->lbal_addr);
410
411 nsect = inb(ioaddr->nsect_addr);
412 lbal = inb(ioaddr->lbal_addr);
413
414 if ((nsect == 0x55) && (lbal == 0xaa))
415 return 1; /* we found a device */
416
417 return 0; /* nothing found */
418}
419
420/**
421 * ata_mmio_devchk - PATA device presence detection
422 * @ap: ATA channel to examine
423 * @device: Device to examine (starting at zero)
424 *
425 * This technique was originally described in
426 * Hale Landis's ATADRVR (www.ata-atapi.com), and
427 * later found its way into the ATA/ATAPI spec.
428 *
429 * Write a pattern to the ATA shadow registers,
430 * and if a device is present, it will respond by
431 * correctly storing and echoing back the
432 * ATA shadow register contents.
433 *
434 * LOCKING:
435 * caller.
436 */
437
438static unsigned int ata_mmio_devchk(struct ata_port *ap,
439 unsigned int device)
440{
441 struct ata_ioports *ioaddr = &ap->ioaddr;
442 u8 nsect, lbal;
443
444 ap->ops->dev_select(ap, device);
445
446 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
447 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
448
449 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
450 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
451
452 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
453 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
454
455 nsect = readb((void __iomem *) ioaddr->nsect_addr);
456 lbal = readb((void __iomem *) ioaddr->lbal_addr);
457
458 if ((nsect == 0x55) && (lbal == 0xaa))
459 return 1; /* we found a device */
460
461 return 0; /* nothing found */
462}
463
464/**
465 * ata_devchk - PATA device presence detection
466 * @ap: ATA channel to examine
467 * @device: Device to examine (starting at zero)
468 *
469 * Dispatch ATA device presence detection, depending
470 * on whether we are using PIO or MMIO to talk to the
471 * ATA shadow registers.
472 *
473 * LOCKING:
474 * caller.
475 */
476
477static unsigned int ata_devchk(struct ata_port *ap,
478 unsigned int device)
479{
480 if (ap->flags & ATA_FLAG_MMIO)
481 return ata_mmio_devchk(ap, device);
482 return ata_pio_devchk(ap, device);
483}
484
485/**
486 * ata_dev_classify - determine device type based on ATA-spec signature
487 * @tf: ATA taskfile register set for device to be identified
488 *
489 * Determine from taskfile register contents whether a device is
490 * ATA or ATAPI, as per "Signature and persistence" section
491 * of ATA/PI spec (volume 1, sect 5.14).
492 *
493 * LOCKING:
494 * None.
495 *
496 * RETURNS:
497 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
498 * the event of failure.
499 */
500
057ace5e 501unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 502{
503 /* Apple's open source Darwin code hints that some devices only
504 * put a proper signature into the LBA mid/high registers,
505 * So, we only check those. It's sufficient for uniqueness.
506 */
507
508 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
509 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
510 DPRINTK("found ATA device by sig\n");
511 return ATA_DEV_ATA;
512 }
513
514 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
515 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
516 DPRINTK("found ATAPI device by sig\n");
517 return ATA_DEV_ATAPI;
518 }
519
520 DPRINTK("unknown device\n");
521 return ATA_DEV_UNKNOWN;
522}
523
524/**
525 * ata_dev_try_classify - Parse returned ATA device signature
526 * @ap: ATA channel to examine
527 * @device: Device to examine (starting at zero)
b4dc7623 528 * @r_err: Value of error register on completion
1da177e4
LT		 529 *
530 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
531 * an ATA/ATAPI-defined set of values is placed in the ATA
532 * shadow registers, indicating the results of device detection
533 * and diagnostics.
534 *
535 * Select the ATA device, and read the values from the ATA shadow
536 * registers. Then parse according to the Error register value,
537 * and the spec-defined values examined by ata_dev_classify().
538 *
539 * LOCKING:
540 * caller.
b4dc7623
TH		 541 *
542 * RETURNS:
543 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 544 */
545
b4dc7623
TH		 546static unsigned int
547ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 548{
1da177e4
LT		 549 struct ata_taskfile tf;
550 unsigned int class;
551 u8 err;
552
553 ap->ops->dev_select(ap, device);
554
555 memset(&tf, 0, sizeof(tf));
556
1da177e4 557 ap->ops->tf_read(ap, &tf);
0169e284 558 err = tf.feature;
b4dc7623
TH		 559 if (r_err)
560 *r_err = err;
1da177e4
LT		 561
562 /* see if device passed diags */
563 if (err == 1)
564 /* do nothing */ ;
565 else if ((device == 0) && (err == 0x81))
566 /* do nothing */ ;
567 else
b4dc7623 568 return ATA_DEV_NONE;
1da177e4 569
b4dc7623 570 /* determine if device is ATA or ATAPI */
1da177e4 571 class = ata_dev_classify(&tf);
b4dc7623 572
1da177e4 573 if (class == ATA_DEV_UNKNOWN)
b4dc7623 574 return ATA_DEV_NONE;
1da177e4 575 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 576 return ATA_DEV_NONE;
577 return class;
1da177e4
LT		 578}
579
580/**
6a62a04d 581 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 582 * @id: IDENTIFY DEVICE results we will examine
583 * @s: string into which data is output
584 * @ofs: offset into identify device page
585 * @len: length of string to return. must be an even number.
586 *
587 * The strings in the IDENTIFY DEVICE page are broken up into
588 * 16-bit chunks. Run through the string, and output each
589 * 8-bit chunk linearly, regardless of platform.
590 *
591 * LOCKING:
592 * caller.
593 */
594
6a62a04d
TH		 595void ata_id_string(const u16 *id, unsigned char *s,
596 unsigned int ofs, unsigned int len)
1da177e4
LT		 597{
598 unsigned int c;
599
600 while (len > 0) {
601 c = id[ofs] >> 8;
602 *s = c;
603 s++;
604
605 c = id[ofs] & 0xff;
606 *s = c;
607 s++;
608
609 ofs++;
610 len -= 2;
611 }
612}
613
0e949ff3 614/**
6a62a04d 615 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 616 * @id: IDENTIFY DEVICE results we will examine
617 * @s: string into which data is output
618 * @ofs: offset into identify device page
619 * @len: length of string to return. must be an odd number.
620 *
6a62a04d 621 * This function is identical to ata_id_string except that it
0e949ff3
TH		 622 * trims trailing spaces and terminates the resulting string with
623 * null. @len must be actual maximum length (even number) + 1.
624 *
625 * LOCKING:
626 * caller.
627 */
6a62a04d
TH		 628void ata_id_c_string(const u16 *id, unsigned char *s,
629 unsigned int ofs, unsigned int len)
0e949ff3
TH		 630{
631 unsigned char *p;
632
633 WARN_ON(!(len & 1));
634
6a62a04d 635 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 636
637 p = s + strnlen(s, len - 1);
638 while (p > s && p[-1] == ' ')
639 p--;
640 *p = '\0';
641}
0baab86b 642
2940740b
TH		 643static u64 ata_id_n_sectors(const u16 *id)
644{
645 if (ata_id_has_lba(id)) {
646 if (ata_id_has_lba48(id))
647 return ata_id_u64(id, 100);
648 else
649 return ata_id_u32(id, 60);
650 } else {
651 if (ata_id_current_chs_valid(id))
652 return ata_id_u32(id, 57);
653 else
654 return id[1] * id[3] * id[6];
655 }
656}
0baab86b
EF		 657
658/**
659 * ata_noop_dev_select - Select device 0/1 on ATA bus
660 * @ap: ATA channel to manipulate
661 * @device: ATA device (numbered from zero) to select
662 *
663 * This function performs no actual function.
664 *
665 * May be used as the dev_select() entry in ata_port_operations.
666 *
667 * LOCKING:
668 * caller.
669 */
1da177e4
LT		 670void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
671{
672}
673
0baab86b 674
1da177e4
LT		 675/**
676 * ata_std_dev_select - Select device 0/1 on ATA bus
677 * @ap: ATA channel to manipulate
678 * @device: ATA device (numbered from zero) to select
679 *
680 * Use the method defined in the ATA specification to
681 * make either device 0, or device 1, active on the
0baab86b
EF		 682 * ATA channel. Works with both PIO and MMIO.
683 *
684 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 685 *
686 * LOCKING:
687 * caller.
688 */
689
690void ata_std_dev_select (struct ata_port *ap, unsigned int device)
691{
692 u8 tmp;
693
694 if (device == 0)
695 tmp = ATA_DEVICE_OBS;
696 else
697 tmp = ATA_DEVICE_OBS | ATA_DEV1;
698
699 if (ap->flags & ATA_FLAG_MMIO) {
700 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
701 } else {
702 outb(tmp, ap->ioaddr.device_addr);
703 }
704 ata_pause(ap); /* needed; also flushes, for mmio */
705}
706
707/**
708 * ata_dev_select - Select device 0/1 on ATA bus
709 * @ap: ATA channel to manipulate
710 * @device: ATA device (numbered from zero) to select
711 * @wait: non-zero to wait for Status register BSY bit to clear
712 * @can_sleep: non-zero if context allows sleeping
713 *
714 * Use the method defined in the ATA specification to
715 * make either device 0, or device 1, active on the
716 * ATA channel.
717 *
718 * This is a high-level version of ata_std_dev_select(),
719 * which additionally provides the services of inserting
720 * the proper pauses and status polling, where needed.
721 *
722 * LOCKING:
723 * caller.
724 */
725
726void ata_dev_select(struct ata_port *ap, unsigned int device,
727 unsigned int wait, unsigned int can_sleep)
728{
729 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
730 ap->id, device, wait);
731
732 if (wait)
733 ata_wait_idle(ap);
734
735 ap->ops->dev_select(ap, device);
736
737 if (wait) {
738 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
739 msleep(150);
740 ata_wait_idle(ap);
741 }
742}
743
744/**
745 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 746 * @id: IDENTIFY DEVICE page to dump
1da177e4 747 *
0bd3300a
TH		 748 * Dump selected 16-bit words from the given IDENTIFY DEVICE
749 * page.
1da177e4
LT		 750 *
751 * LOCKING:
752 * caller.
753 */
754
0bd3300a 755static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 756{
757 DPRINTK("49==0x%04x "
758 "53==0x%04x "
759 "63==0x%04x "
760 "64==0x%04x "
761 "75==0x%04x \n",
0bd3300a
TH		 762 id[49],
763 id[53],
764 id[63],
765 id[64],
766 id[75]);
1da177e4
LT		 767 DPRINTK("80==0x%04x "
768 "81==0x%04x "
769 "82==0x%04x "
770 "83==0x%04x "
771 "84==0x%04x \n",
0bd3300a
TH		 772 id[80],
773 id[81],
774 id[82],
775 id[83],
776 id[84]);
1da177e4
LT		 777 DPRINTK("88==0x%04x "
778 "93==0x%04x\n",
0bd3300a
TH		 779 id[88],
780 id[93]);
1da177e4
LT		 781}
782
cb95d562
TH		 783/**
784 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
785 * @id: IDENTIFY data to compute xfer mask from
11e29e21 786 *
cb95d562
TH		 787 * Compute the xfermask for this device. This is not as trivial
788 * as it seems if we must consider early devices correctly.
789 *
790 * FIXME: pre IDE drive timing (do we care ?).
791 *
792 * LOCKING:
793 * None.
794 *
795 * RETURNS:
796 * Computed xfermask
11e29e21 797 */
cb95d562 798static unsigned int ata_id_xfermask(const u16 *id)
11e29e21 799{
cb95d562 800 unsigned int pio_mask, mwdma_mask, udma_mask;
11e29e21 801
ffa29456 802 /* Usual case. Word 53 indicates word 64 is valid */
cb95d562
TH		 803 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
804 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
805 pio_mask <<= 3;
806 pio_mask |= 0x7;
807 } else {
808 /* If word 64 isn't valid then Word 51 high byte holds
809 * the PIO timing number for the maximum. Turn it into
810 * a mask.
811 */
812 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
813
814 /* But wait.. there's more. Design your standards by
815 * committee and you too can get a free iordy field to
816 * process. However its the speeds not the modes that
817 * are supported... Note drivers using the timing API
818 * will get this right anyway
819 */
11e29e21
AC		 820 }
821
cb95d562
TH		 822 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
823 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
11e29e21 824
cb95d562 825 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
95064379
TH		 826}
827
86e45b6b
TH		 828/**
829 * ata_port_queue_task - Queue port_task
830 * @ap: The ata_port to queue port_task for
831 *
832 * Schedule @fn(@data) for execution after @delay jiffies using
833 * port_task. There is one port_task per port and it's the
834 * user(low level driver)'s responsibility to make sure that only
835 * one task is active at any given time.
836 *
837 * libata core layer takes care of synchronization between
838 * port_task and EH. ata_port_queue_task() may be ignored for EH
839 * synchronization.
840 *
841 * LOCKING:
842 * Inherited from caller.
843 */
844void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
845 unsigned long delay)
95064379 846{
86e45b6b
TH		 847 int rc;
848
2e755f68 849 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 850 return;
851
852 PREPARE_WORK(&ap->port_task, fn, data);
853
854 if (!delay)
855 rc = queue_work(ata_wq, &ap->port_task);
856 else
857 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
858
859 /* rc == 0 means that another user is using port task */
860 WARN_ON(rc == 0);
c18d06f8
TH		 861}
862
863/**
86e45b6b
TH		 864 * ata_port_flush_task - Flush port_task
865 * @ap: The ata_port to flush port_task for
c18d06f8 866 *
86e45b6b
TH		 867 * After this function completes, port_task is guranteed not to
868 * be running or scheduled.
c18d06f8
TH		 869 *
870 * LOCKING:
871 * Kernel thread context (may sleep)
872 */
86e45b6b 873void ata_port_flush_task(struct ata_port *ap)
c18d06f8 874{
c18d06f8
TH		 875 unsigned long flags;
876
877 DPRINTK("ENTER\n");
878
879 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 880 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
c18d06f8
TH		 881 spin_unlock_irqrestore(&ap->host_set->lock, flags);
882
883 DPRINTK("flush #1\n");
884 flush_workqueue(ata_wq);
885
886 /*
887 * At this point, if a task is running, it's guaranteed to see
888 * the FLUSH flag; thus, it will never queue pio tasks again.
889 * Cancel and flush.
890 */
86e45b6b 891 if (!cancel_delayed_work(&ap->port_task)) {
c18d06f8
TH		 892 DPRINTK("flush #2\n");
893 flush_workqueue(ata_wq);
894 }
895
896 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 897 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
c18d06f8
TH		 898 spin_unlock_irqrestore(&ap->host_set->lock, flags);
899
900 DPRINTK("EXIT\n");
95064379
TH		 901}
902
77853bf2 903void ata_qc_complete_internal(struct ata_queued_cmd *qc)
64f043d8 904{
77853bf2 905 struct completion *waiting = qc->private_data;
64f043d8 906
77853bf2 907 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 908 complete(waiting);
a2a7a662
TH		 909}
910
911/**
912 * ata_exec_internal - execute libata internal command
913 * @ap: Port to which the command is sent
914 * @dev: Device to which the command is sent
915 * @tf: Taskfile registers for the command and the result
916 * @dma_dir: Data tranfer direction of the command
917 * @buf: Data buffer of the command
918 * @buflen: Length of data buffer
919 *
920 * Executes libata internal command with timeout. @tf contains
921 * command on entry and result on return. Timeout and error
922 * conditions are reported via return value. No recovery action
923 * is taken after a command times out. It's caller's duty to
924 * clean up after timeout.
925 *
926 * LOCKING:
927 * None. Should be called with kernel context, might sleep.
928 */
929
930static unsigned
931ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
932 struct ata_taskfile *tf,
933 int dma_dir, void *buf, unsigned int buflen)
934{
935 u8 command = tf->command;
936 struct ata_queued_cmd *qc;
937 DECLARE_COMPLETION(wait);
938 unsigned long flags;
77853bf2 939 unsigned int err_mask;
a2a7a662
TH		 940
941 spin_lock_irqsave(&ap->host_set->lock, flags);
942
943 qc = ata_qc_new_init(ap, dev);
944 BUG_ON(qc == NULL);
945
946 qc->tf = *tf;
947 qc->dma_dir = dma_dir;
948 if (dma_dir != DMA_NONE) {
949 ata_sg_init_one(qc, buf, buflen);
950 qc->nsect = buflen / ATA_SECT_SIZE;
951 }
952
77853bf2 953 qc->private_data = &wait;
a2a7a662
TH		 954 qc->complete_fn = ata_qc_complete_internal;
955
9a3d9eb0
TH		 956 qc->err_mask = ata_qc_issue(qc);
957 if (qc->err_mask)
8e436af9 958 ata_qc_complete(qc);
a2a7a662
TH		 959
960 spin_unlock_irqrestore(&ap->host_set->lock, flags);
961
962 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
963 spin_lock_irqsave(&ap->host_set->lock, flags);
964
965 /* We're racing with irq here. If we lose, the
966 * following test prevents us from completing the qc
967 * again. If completion irq occurs after here but
968 * before the caller cleans up, it will result in a
969 * spurious interrupt. We can live with that.
970 */
77853bf2 971 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 972 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 973 ata_qc_complete(qc);
974 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
975 ap->id, command);
64f043d8
JG		 976 }
977
a2a7a662 978 spin_unlock_irqrestore(&ap->host_set->lock, flags);
64f043d8
JG		 979 }
980
77853bf2
TH		 981 *tf = qc->tf;
982 err_mask = qc->err_mask;
983
984 ata_qc_free(qc);
985
986 return err_mask;
64f043d8
JG		 987}
988
1bc4ccff
AC		 989/**
990 * ata_pio_need_iordy - check if iordy needed
991 * @adev: ATA device
992 *
993 * Check if the current speed of the device requires IORDY. Used
994 * by various controllers for chip configuration.
995 */
996
997unsigned int ata_pio_need_iordy(const struct ata_device *adev)
998{
999 int pio;
1000 int speed = adev->pio_mode - XFER_PIO_0;
1001
1002 if (speed < 2)
1003 return 0;
1004 if (speed > 2)
1005 return 1;
1006
1007 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1008
1009 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1010 pio = adev->id[ATA_ID_EIDE_PIO];
1011 /* Is the speed faster than the drive allows non IORDY ? */
1012 if (pio) {
1013 /* This is cycle times not frequency - watch the logic! */
1014 if (pio > 240) /* PIO2 is 240nS per cycle */
1015 return 1;
1016 return 0;
1017 }
1018 }
1019 return 0;
1020}
1021
1da177e4 1022/**
49016aca
TH		 1023 * ata_dev_read_id - Read ID data from the specified device
1024 * @ap: port on which target device resides
1025 * @dev: target device
1026 * @p_class: pointer to class of the target device (may be changed)
1027 * @post_reset: is this read ID post-reset?
d9572b1d 1028 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1029 *
49016aca
TH		 1030 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1031 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1032 * devices. This function also takes care of EDD signature
1033 * misreporting (to be removed once EDD support is gone) and
1034 * issues ATA_CMD_INIT_DEV_PARAMS for pre-ATA4 drives.
1da177e4
LT		 1035 *
1036 * LOCKING:
49016aca
TH		 1037 * Kernel thread context (may sleep)
1038 *
1039 * RETURNS:
1040 * 0 on success, -errno otherwise.
1da177e4 1041 */
49016aca 1042static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1043 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1044{
49016aca 1045 unsigned int class = *p_class;
1da177e4 1046 unsigned int using_edd;
a0123703 1047 struct ata_taskfile tf;
49016aca 1048 unsigned int err_mask = 0;
d9572b1d 1049 u16 *id;
49016aca
TH		 1050 const char *reason;
1051 int rc;
1da177e4 1052
49016aca 1053 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1054
61eb066a
TH		 1055 if (ap->ops->probe_reset ||
1056 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1da177e4
LT		 1057 using_edd = 0;
1058 else
1059 using_edd = 1;
1060
49016aca 1061 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1062
d9572b1d
TH		 1063 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1064 if (id == NULL) {
1065 rc = -ENOMEM;
1066 reason = "out of memory";
1067 goto err_out;
1068 }
1069
49016aca
TH		 1070 retry:
1071 ata_tf_init(ap, &tf, dev->devno);
a0123703 1072
49016aca
TH		 1073 switch (class) {
1074 case ATA_DEV_ATA:
a0123703 1075 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1076 break;
1077 case ATA_DEV_ATAPI:
a0123703 1078 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1079 break;
1080 default:
1081 rc = -ENODEV;
1082 reason = "unsupported class";
1083 goto err_out;
1da177e4
LT		 1084 }
1085
a0123703 1086 tf.protocol = ATA_PROT_PIO;
1da177e4 1087
a0123703 1088 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1089 id, sizeof(id[0]) * ATA_ID_WORDS);
1da177e4 1090
a0123703 1091 if (err_mask) {
49016aca
TH		 1092 rc = -EIO;
1093 reason = "I/O error";
1094
a0123703
TH		 1095 if (err_mask & ~AC_ERR_DEV)
1096 goto err_out;
1da177e4 1097
1da177e4
LT		 1098 /*
1099 * arg! EDD works for all test cases, but seems to return
1100 * the ATA signature for some ATAPI devices. Until the
1101 * reason for this is found and fixed, we fix up the mess
1102 * here. If IDENTIFY DEVICE returns command aborted
1103 * (as ATAPI devices do), then we issue an
1104 * IDENTIFY PACKET DEVICE.
1105 *
1106 * ATA software reset (SRST, the default) does not appear
1107 * to have this problem.
1108 */
49016aca 1109 if ((using_edd) && (class == ATA_DEV_ATA)) {
a0123703 1110 u8 err = tf.feature;
1da177e4 1111 if (err & ATA_ABORTED) {
49016aca 1112 class = ATA_DEV_ATAPI;
1da177e4
LT		 1113 goto retry;
1114 }
1115 }
1116 goto err_out;
1117 }
1118
49016aca 1119 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4
LT		 1120
1121 /* print device capabilities */
1122 printk(KERN_DEBUG "ata%u: dev %u cfg "
1123 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
49016aca
TH		 1124 ap->id, dev->devno,
1125 id[49], id[82], id[83], id[84], id[85], id[86], id[87], id[88]);
1126
1127 /* sanity check */
1128 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1129 rc = -EINVAL;
1130 reason = "device reports illegal type";
1131 goto err_out;
1132 }
1133
1134 if (post_reset && class == ATA_DEV_ATA) {
1135 /*
1136 * The exact sequence expected by certain pre-ATA4 drives is:
1137 * SRST RESET
1138 * IDENTIFY
1139 * INITIALIZE DEVICE PARAMETERS
1140 * anything else..
1141 * Some drives were very specific about that exact sequence.
1142 */
1143 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1144 err_mask = ata_dev_init_params(ap, dev);
1145 if (err_mask) {
1146 rc = -EIO;
1147 reason = "INIT_DEV_PARAMS failed";
1148 goto err_out;
1149 }
1150
1151 /* current CHS translation info (id[53-58]) might be
1152 * changed. reread the identify device info.
1153 */
1154 post_reset = 0;
1155 goto retry;
1156 }
1157 }
1158
1159 *p_class = class;
d9572b1d 1160 *p_id = id;
49016aca
TH		 1161 return 0;
1162
1163 err_out:
1164 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1165 ap->id, dev->devno, reason);
d9572b1d 1166 kfree(id);
49016aca
TH		 1167 return rc;
1168}
1169
4b2f3ede
TH		 1170static inline u8 ata_dev_knobble(const struct ata_port *ap,
1171 struct ata_device *dev)
1172{
1173 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1174}
1175
49016aca 1176/**
ffeae418
TH		 1177 * ata_dev_configure - Configure the specified ATA/ATAPI device
1178 * @ap: Port on which target device resides
1179 * @dev: Target device to configure
4c2d721a 1180 * @print_info: Enable device info printout
ffeae418
TH		 1181 *
1182 * Configure @dev according to @dev->id. Generic and low-level
1183 * driver specific fixups are also applied.
49016aca
TH		 1184 *
1185 * LOCKING:
ffeae418
TH		 1186 * Kernel thread context (may sleep)
1187 *
1188 * RETURNS:
1189 * 0 on success, -errno otherwise
49016aca 1190 */
4c2d721a
TH		 1191static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1192 int print_info)
49016aca 1193{
ff8854b2 1194 unsigned int xfer_mask;
49016aca
TH		 1195 int i, rc;
1196
1197 if (!ata_dev_present(dev)) {
1198 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1199 ap->id, dev->devno);
1200 return 0;
49016aca
TH		 1201 }
1202
ffeae418 1203 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
49016aca 1204
208a9933
TH		 1205 /* initialize to-be-configured parameters */
1206 dev->flags = 0;
1207 dev->max_sectors = 0;
1208 dev->cdb_len = 0;
1209 dev->n_sectors = 0;
1210 dev->cylinders = 0;
1211 dev->heads = 0;
1212 dev->sectors = 0;
1da177e4
LT		 1213
1214 /*
1215 * common ATA, ATAPI feature tests
1216 */
1217
8bf62ece
AL		 1218 /* we require DMA support (bits 8 of word 49) */
1219 if (!ata_id_has_dma(dev->id)) {
1220 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
ffeae418 1221 rc = -EINVAL;
1da177e4
LT		 1222 goto err_out_nosup;
1223 }
1224
ff8854b2
TH		 1225 /* find max transfer mode; for printk only */
1226 xfer_mask = ata_id_xfermask(dev->id);
1da177e4 1227
0bd3300a 1228 ata_dump_id(dev->id);
1da177e4
LT		 1229
1230 /* ATA-specific feature tests */
1231 if (dev->class == ATA_DEV_ATA) {
2940740b
TH		 1232 dev->n_sectors = ata_id_n_sectors(dev->id);
1233
8bf62ece 1234 if (ata_id_has_lba(dev->id)) {
4c2d721a 1235 const char *lba_desc;
8bf62ece 1236
4c2d721a
TH		 1237 lba_desc = "LBA";
1238 dev->flags |= ATA_DFLAG_LBA;
1239 if (ata_id_has_lba48(dev->id)) {
8bf62ece 1240 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1241 lba_desc = "LBA48";
1242 }
8bf62ece
AL		 1243
1244 /* print device info to dmesg */
4c2d721a
TH		 1245 if (print_info)
1246 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1247 "max %s, %Lu sectors: %s\n",
1248 ap->id, dev->devno,
1249 ata_id_major_version(dev->id),
ff8854b2 1250 ata_mode_string(xfer_mask),
4c2d721a
TH		 1251 (unsigned long long)dev->n_sectors,
1252 lba_desc);
ffeae418 1253 } else {
8bf62ece
AL		 1254 /* CHS */
1255
1256 /* Default translation */
1257 dev->cylinders = dev->id[1];
1258 dev->heads = dev->id[3];
1259 dev->sectors = dev->id[6];
8bf62ece
AL		 1260
1261 if (ata_id_current_chs_valid(dev->id)) {
1262 /* Current CHS translation is valid. */
1263 dev->cylinders = dev->id[54];
1264 dev->heads = dev->id[55];
1265 dev->sectors = dev->id[56];
8bf62ece
AL		 1266 }
1267
1268 /* print device info to dmesg */
4c2d721a
TH		 1269 if (print_info)
1270 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1271 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1272 ap->id, dev->devno,
1273 ata_id_major_version(dev->id),
ff8854b2 1274 ata_mode_string(xfer_mask),
4c2d721a
TH		 1275 (unsigned long long)dev->n_sectors,
1276 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1277 }
1278
07f6f7d0
AL		 1279 if (dev->id[59] & 0x100) {
1280 dev->multi_count = dev->id[59] & 0xff;
1281 DPRINTK("ata%u: dev %u multi count %u\n",
1282 ap->id, device, dev->multi_count);
1283 }
1284
1da177e4
LT		 1285 }
1286
1287 /* ATAPI-specific feature tests */
2c13b7ce 1288 else if (dev->class == ATA_DEV_ATAPI) {
1da177e4
LT		 1289 rc = atapi_cdb_len(dev->id);
1290 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1291 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1292 rc = -EINVAL;
1da177e4
LT		 1293 goto err_out_nosup;
1294 }
6e7846e9 1295 dev->cdb_len = (unsigned int) rc;
1da177e4 1296
312f7da2
AL		 1297 if (ata_id_cdb_intr(dev->id))
1298 dev->flags |= ATA_DFLAG_CDB_INTR;
1299
1da177e4 1300 /* print device info to dmesg */
4c2d721a
TH		 1301 if (print_info)
1302 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1303 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1304 }
1305
6e7846e9
TH		 1306 ap->host->max_cmd_len = 0;
1307 for (i = 0; i < ATA_MAX_DEVICES; i++)
1308 ap->host->max_cmd_len = max_t(unsigned int,
1309 ap->host->max_cmd_len,
1310 ap->device[i].cdb_len);
1311
6f2f3812 1312 /* limit bridge transfers to udma5, 200 sectors */
4b2f3ede 1313 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1314 if (print_info)
1315 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1316 ap->id, dev->devno);
6f2f3812 1317 ap->udma_mask &= ATA_UDMA5;
4b2f3ede 1318 dev->max_sectors = ATA_MAX_SECTORS;
6f2f3812
BC		 1319 }
1320
1321 if (ap->ops->dev_config)
4b2f3ede
TH		 1322 ap->ops->dev_config(ap, dev);
1323
1da177e4 1324 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1325 return 0;
1da177e4
LT		 1326
1327err_out_nosup:
1328 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
ffeae418 1329 ap->id, dev->devno);
1da177e4 1330 DPRINTK("EXIT, err\n");
ffeae418 1331 return rc;
6f2f3812
BC		 1332}
1333
1da177e4
LT		 1334/**
1335 * ata_bus_probe - Reset and probe ATA bus
1336 * @ap: Bus to probe
1337 *
0cba632b
JG		 1338 * Master ATA bus probing function. Initiates a hardware-dependent
1339 * bus reset, then attempts to identify any devices found on
1340 * the bus.
1341 *
1da177e4 1342 * LOCKING:
0cba632b 1343 * PCI/etc. bus probe sem.
1da177e4
LT		 1344 *
1345 * RETURNS:
1346 * Zero on success, non-zero on error.
1347 */
1348
1349static int ata_bus_probe(struct ata_port *ap)
1350{
28ca5c57
TH		 1351 unsigned int classes[ATA_MAX_DEVICES];
1352 unsigned int i, rc, found = 0;
1da177e4 1353
28ca5c57 1354 ata_port_probe(ap);
c19ba8af 1355
28ca5c57
TH		 1356 /* reset */
1357 if (ap->ops->probe_reset) {
2061a47a
TH		 1358 for (i = 0; i < ATA_MAX_DEVICES; i++)
1359 classes[i] = ATA_DEV_UNKNOWN;
c19ba8af
TH		 1360
1361 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1362 if (rc) {
1363 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1364 return rc;
c19ba8af 1365 }
28ca5c57
TH		 1366
1367 for (i = 0; i < ATA_MAX_DEVICES; i++)
1368 if (classes[i] == ATA_DEV_UNKNOWN)
1369 classes[i] = ATA_DEV_NONE;
1370 } else {
c19ba8af
TH		 1371 ap->ops->phy_reset(ap);
1372
28ca5c57
TH		 1373 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1374 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1375 classes[i] = ap->device[i].class;
1376 else
1377 ap->device[i].class = ATA_DEV_UNKNOWN;
1378 }
1379 ata_port_probe(ap);
1380 }
1da177e4 1381
28ca5c57 1382 /* read IDENTIFY page and configure devices */
1da177e4 1383 for (i = 0; i < ATA_MAX_DEVICES; i++) {
ffeae418
TH		 1384 struct ata_device *dev = &ap->device[i];
1385
28ca5c57
TH		 1386 dev->class = classes[i];
1387
ffeae418
TH		 1388 if (!ata_dev_present(dev))
1389 continue;
1390
1391 WARN_ON(dev->id != NULL);
1392 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1393 dev->class = ATA_DEV_NONE;
1394 continue;
1395 }
1396
4c2d721a 1397 if (ata_dev_configure(ap, dev, 1)) {
ffeae418
TH		 1398 dev->class++; /* disable device */
1399 continue;
1da177e4 1400 }
ffeae418 1401
ffeae418 1402 found = 1;
1da177e4
LT		 1403 }
1404
28ca5c57 1405 if (!found)
1da177e4
LT		 1406 goto err_out_disable;
1407
1408 ata_set_mode(ap);
1409 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1410 goto err_out_disable;
1411
1412 return 0;
1413
1414err_out_disable:
1415 ap->ops->port_disable(ap);
1da177e4
LT		 1416 return -1;
1417}
1418
1419/**
0cba632b
JG		 1420 * ata_port_probe - Mark port as enabled
1421 * @ap: Port for which we indicate enablement
1da177e4 1422 *
0cba632b
JG		 1423 * Modify @ap data structure such that the system
1424 * thinks that the entire port is enabled.
1425 *
1426 * LOCKING: host_set lock, or some other form of
1427 * serialization.
1da177e4
LT		 1428 */
1429
1430void ata_port_probe(struct ata_port *ap)
1431{
1432 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1433}
1434
3be680b7
TH		 1435/**
1436 * sata_print_link_status - Print SATA link status
1437 * @ap: SATA port to printk link status about
1438 *
1439 * This function prints link speed and status of a SATA link.
1440 *
1441 * LOCKING:
1442 * None.
1443 */
1444static void sata_print_link_status(struct ata_port *ap)
1445{
1446 u32 sstatus, tmp;
1447 const char *speed;
1448
1449 if (!ap->ops->scr_read)
1450 return;
1451
1452 sstatus = scr_read(ap, SCR_STATUS);
1453
1454 if (sata_dev_present(ap)) {
1455 tmp = (sstatus >> 4) & 0xf;
1456 if (tmp & (1 << 0))
1457 speed = "1.5";
1458 else if (tmp & (1 << 1))
1459 speed = "3.0";
1460 else
1461 speed = "<unknown>";
1462 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1463 ap->id, speed, sstatus);
1464 } else {
1465 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1466 ap->id, sstatus);
1467 }
1468}
1469
1da177e4 1470/**
780a87f7
JG		 1471 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1472 * @ap: SATA port associated with target SATA PHY.
1da177e4 1473 *
780a87f7
JG		 1474 * This function issues commands to standard SATA Sxxx
1475 * PHY registers, to wake up the phy (and device), and
1476 * clear any reset condition.
1da177e4
LT		 1477 *
1478 * LOCKING:
0cba632b 1479 * PCI/etc. bus probe sem.
1da177e4
LT		 1480 *
1481 */
1482void __sata_phy_reset(struct ata_port *ap)
1483{
1484 u32 sstatus;
1485 unsigned long timeout = jiffies + (HZ * 5);
1486
1487 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1488 /* issue phy wake/reset */
1489 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1490 /* Couldn't find anything in SATA I/II specs, but
1491 * AHCI-1.1 10.4.2 says at least 1 ms. */
1492 mdelay(1);
1da177e4 1493 }
cdcca89e 1494 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1495
1496 /* wait for phy to become ready, if necessary */
1497 do {
1498 msleep(200);
1499 sstatus = scr_read(ap, SCR_STATUS);
1500 if ((sstatus & 0xf) != 1)
1501 break;
1502 } while (time_before(jiffies, timeout));
1503
3be680b7
TH		 1504 /* print link status */
1505 sata_print_link_status(ap);
656563e3 1506
3be680b7
TH		 1507 /* TODO: phy layer with polling, timeouts, etc. */
1508 if (sata_dev_present(ap))
1da177e4 1509 ata_port_probe(ap);
3be680b7 1510 else
1da177e4 1511 ata_port_disable(ap);
1da177e4
LT		 1512
1513 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1514 return;
1515
1516 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1517 ata_port_disable(ap);
1518 return;
1519 }
1520
1521 ap->cbl = ATA_CBL_SATA;
1522}
1523
1524/**
780a87f7
JG		 1525 * sata_phy_reset - Reset SATA bus.
1526 * @ap: SATA port associated with target SATA PHY.
1da177e4 1527 *
780a87f7
JG		 1528 * This function resets the SATA bus, and then probes
1529 * the bus for devices.
1da177e4
LT		 1530 *
1531 * LOCKING:
0cba632b 1532 * PCI/etc. bus probe sem.
1da177e4
LT		 1533 *
1534 */
1535void sata_phy_reset(struct ata_port *ap)
1536{
1537 __sata_phy_reset(ap);
1538 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1539 return;
1540 ata_bus_reset(ap);
1541}
1542
1543/**
780a87f7
JG		 1544 * ata_port_disable - Disable port.
1545 * @ap: Port to be disabled.
1da177e4 1546 *
780a87f7
JG		 1547 * Modify @ap data structure such that the system
1548 * thinks that the entire port is disabled, and should
1549 * never attempt to probe or communicate with devices
1550 * on this port.
1551 *
1552 * LOCKING: host_set lock, or some other form of
1553 * serialization.
1da177e4
LT		 1554 */
1555
1556void ata_port_disable(struct ata_port *ap)
1557{
1558 ap->device[0].class = ATA_DEV_NONE;
1559 ap->device[1].class = ATA_DEV_NONE;
1560 ap->flags |= ATA_FLAG_PORT_DISABLED;
1561}
1562
452503f9
AC		 1563/*
1564 * This mode timing computation functionality is ported over from
1565 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1566 */
1567/*
1568 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1569 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1570 * for PIO 5, which is a nonstandard extension and UDMA6, which
1571 * is currently supported only by Maxtor drives.
1572 */
1573
1574static const struct ata_timing ata_timing[] = {
1575
1576 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1577 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1578 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1579 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1580
1581 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1582 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1583 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1584
1585/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1586
1587 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1588 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1589 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1590
1591 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1592 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1593 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1594
1595/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1596 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1597 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1598
1599 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1600 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1601 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1602
1603/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1604
1605 { 0xFF }
1606};
1607
1608#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1609#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1610
1611static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1612{
1613 q->setup = EZ(t->setup * 1000, T);
1614 q->act8b = EZ(t->act8b * 1000, T);
1615 q->rec8b = EZ(t->rec8b * 1000, T);
1616 q->cyc8b = EZ(t->cyc8b * 1000, T);
1617 q->active = EZ(t->active * 1000, T);
1618 q->recover = EZ(t->recover * 1000, T);
1619 q->cycle = EZ(t->cycle * 1000, T);
1620 q->udma = EZ(t->udma * 1000, UT);
1621}
1622
1623void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1624 struct ata_timing *m, unsigned int what)
1625{
1626 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1627 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1628 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1629 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1630 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1631 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1632 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1633 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1634}
1635
1636static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1637{
1638 const struct ata_timing *t;
1639
1640 for (t = ata_timing; t->mode != speed; t++)
91190758 1641 if (t->mode == 0xFF)
452503f9
AC		 1642 return NULL;
1643 return t;
1644}
1645
1646int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1647 struct ata_timing *t, int T, int UT)
1648{
1649 const struct ata_timing *s;
1650 struct ata_timing p;
1651
1652 /*
1653 * Find the mode.
75b1f2f8 1654 */
452503f9
AC		 1655
1656 if (!(s = ata_timing_find_mode(speed)))
1657 return -EINVAL;
1658
75b1f2f8
AL		 1659 memcpy(t, s, sizeof(*s));
1660
452503f9
AC		 1661 /*
1662 * If the drive is an EIDE drive, it can tell us it needs extended
1663 * PIO/MW_DMA cycle timing.
1664 */
1665
1666 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1667 memset(&p, 0, sizeof(p));
1668 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1669 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1670 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1671 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1672 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1673 }
1674 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1675 }
1676
1677 /*
1678 * Convert the timing to bus clock counts.
1679 */
1680
75b1f2f8 1681 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1682
1683 /*
c893a3ae
RD		 1684 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1685 * S.M.A.R.T * and some other commands. We have to ensure that the
1686 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1687 */
1688
1689 if (speed > XFER_PIO_4) {
1690 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1691 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1692 }
1693
1694 /*
c893a3ae 1695 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1696 */
1697
1698 if (t->act8b + t->rec8b < t->cyc8b) {
1699 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1700 t->rec8b = t->cyc8b - t->act8b;
1701 }
1702
1703 if (t->active + t->recover < t->cycle) {
1704 t->active += (t->cycle - (t->active + t->recover)) / 2;
1705 t->recover = t->cycle - t->active;
1706 }
1707
1708 return 0;
1709}
1710
1da177e4
LT		 1711static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1712{
1da177e4
LT		 1713 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1714 return;
1715
1716 if (dev->xfer_shift == ATA_SHIFT_PIO)
1717 dev->flags |= ATA_DFLAG_PIO;
1718
1719 ata_dev_set_xfermode(ap, dev);
1720
48a8a14f
TH		 1721 if (ata_dev_revalidate(ap, dev, 0)) {
1722 printk(KERN_ERR "ata%u: failed to revalidate after set "
1723 "xfermode, disabled\n", ap->id);
1724 ata_port_disable(ap);
1725 }
1da177e4 1726
23e71c3d
TH		 1727 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1728 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1729
1730 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1731 ap->id, dev->devno,
1732 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1da177e4
LT		 1733}
1734
1735static int ata_host_set_pio(struct ata_port *ap)
1736{
a6d5a51c 1737 int i;
1da177e4
LT		 1738
1739 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1740 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1741
1742 if (!ata_dev_present(dev))
1743 continue;
1744
1745 if (!dev->pio_mode) {
1746 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1747 return -1;
1da177e4 1748 }
a6d5a51c
TH		 1749
1750 dev->xfer_mode = dev->pio_mode;
1751 dev->xfer_shift = ATA_SHIFT_PIO;
1752 if (ap->ops->set_piomode)
1753 ap->ops->set_piomode(ap, dev);
1da177e4
LT		 1754 }
1755
1756 return 0;
1757}
1758
a6d5a51c 1759static void ata_host_set_dma(struct ata_port *ap)
1da177e4
LT		 1760{
1761 int i;
1762
1763 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1764 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1765
1766 if (!ata_dev_present(dev) || !dev->dma_mode)
1767 continue;
1768
1769 dev->xfer_mode = dev->dma_mode;
1770 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1771 if (ap->ops->set_dmamode)
1772 ap->ops->set_dmamode(ap, dev);
1da177e4
LT		 1773 }
1774}
1775
1776/**
1777 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1778 * @ap: port on which timings will be programmed
1779 *
780a87f7
JG		 1780 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1781 *
1da177e4 1782 * LOCKING:
0cba632b 1783 * PCI/etc. bus probe sem.
1da177e4
LT		 1784 */
1785static void ata_set_mode(struct ata_port *ap)
1786{
a6d5a51c 1787 int i, rc;
1da177e4 1788
a6d5a51c
TH		 1789 /* step 1: calculate xfer_mask */
1790 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1791 struct ata_device *dev = &ap->device[i];
1792 unsigned int xfer_mask;
1793
1794 if (!ata_dev_present(dev))
1795 continue;
1796
1797 xfer_mask = ata_dev_xfermask(ap, dev);
1da177e4 1798
a6d5a51c
TH		 1799 dev->pio_mode = ata_xfer_mask2mode(xfer_mask & ATA_MASK_PIO);
1800 dev->dma_mode = ata_xfer_mask2mode(xfer_mask & (ATA_MASK_MWDMA |
1801 ATA_MASK_UDMA));
1802 }
1803
1804 /* step 2: always set host PIO timings */
1805 rc = ata_host_set_pio(ap);
1da177e4
LT		 1806 if (rc)
1807 goto err_out;
1808
a6d5a51c
TH		 1809 /* step 3: set host DMA timings */
1810 ata_host_set_dma(ap);
1da177e4
LT		 1811
1812 /* step 4: update devices' xfer mode */
a6d5a51c
TH		 1813 for (i = 0; i < ATA_MAX_DEVICES; i++)
1814 ata_dev_set_mode(ap, &ap->device[i]);
1da177e4
LT		 1815
1816 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1817 return;
1818
1819 if (ap->ops->post_set_mode)
1820 ap->ops->post_set_mode(ap);
1821
1da177e4
LT		 1822 return;
1823
1824err_out:
1825 ata_port_disable(ap);
1826}
1827
1fdffbce
JG		 1828/**
1829 * ata_tf_to_host - issue ATA taskfile to host controller
1830 * @ap: port to which command is being issued
1831 * @tf: ATA taskfile register set
1832 *
1833 * Issues ATA taskfile register set to ATA host controller,
1834 * with proper synchronization with interrupt handler and
1835 * other threads.
1836 *
1837 * LOCKING:
1838 * spin_lock_irqsave(host_set lock)
1839 */
1840
1841static inline void ata_tf_to_host(struct ata_port *ap,
1842 const struct ata_taskfile *tf)
1843{
1844 ap->ops->tf_load(ap, tf);
1845 ap->ops->exec_command(ap, tf);
1846}
1847
1da177e4
LT		 1848/**
1849 * ata_busy_sleep - sleep until BSY clears, or timeout
1850 * @ap: port containing status register to be polled
1851 * @tmout_pat: impatience timeout
1852 * @tmout: overall timeout
1853 *
780a87f7
JG		 1854 * Sleep until ATA Status register bit BSY clears,
1855 * or a timeout occurs.
1856 *
1857 * LOCKING: None.
1da177e4
LT		 1858 */
1859
6f8b9958
TH		 1860unsigned int ata_busy_sleep (struct ata_port *ap,
1861 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1862{
1863 unsigned long timer_start, timeout;
1864 u8 status;
1865
1866 status = ata_busy_wait(ap, ATA_BUSY, 300);
1867 timer_start = jiffies;
1868 timeout = timer_start + tmout_pat;
1869 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1870 msleep(50);
1871 status = ata_busy_wait(ap, ATA_BUSY, 3);
1872 }
1873
1874 if (status & ATA_BUSY)
1875 printk(KERN_WARNING "ata%u is slow to respond, "
1876 "please be patient\n", ap->id);
1877
1878 timeout = timer_start + tmout;
1879 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1880 msleep(50);
1881 status = ata_chk_status(ap);
1882 }
1883
1884 if (status & ATA_BUSY) {
1885 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1886 ap->id, tmout / HZ);
1887 return 1;
1888 }
1889
1890 return 0;
1891}
1892
1893static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1894{
1895 struct ata_ioports *ioaddr = &ap->ioaddr;
1896 unsigned int dev0 = devmask & (1 << 0);
1897 unsigned int dev1 = devmask & (1 << 1);
1898 unsigned long timeout;
1899
1900 /* if device 0 was found in ata_devchk, wait for its
1901 * BSY bit to clear
1902 */
1903 if (dev0)
1904 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1905
1906 /* if device 1 was found in ata_devchk, wait for
1907 * register access, then wait for BSY to clear
1908 */
1909 timeout = jiffies + ATA_TMOUT_BOOT;
1910 while (dev1) {
1911 u8 nsect, lbal;
1912
1913 ap->ops->dev_select(ap, 1);
1914 if (ap->flags & ATA_FLAG_MMIO) {
1915 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1916 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1917 } else {
1918 nsect = inb(ioaddr->nsect_addr);
1919 lbal = inb(ioaddr->lbal_addr);
1920 }
1921 if ((nsect == 1) && (lbal == 1))
1922 break;
1923 if (time_after(jiffies, timeout)) {
1924 dev1 = 0;
1925 break;
1926 }
1927 msleep(50); /* give drive a breather */
1928 }
1929 if (dev1)
1930 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1931
1932 /* is all this really necessary? */
1933 ap->ops->dev_select(ap, 0);
1934 if (dev1)
1935 ap->ops->dev_select(ap, 1);
1936 if (dev0)
1937 ap->ops->dev_select(ap, 0);
1938}
1939
1940/**
0cba632b
JG		 1941 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1942 * @ap: Port to reset and probe
1943 *
1944 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1945 * probe the bus. Not often used these days.
1da177e4
LT		 1946 *
1947 * LOCKING:
0cba632b 1948 * PCI/etc. bus probe sem.
e5338254 1949 * Obtains host_set lock.
1da177e4
LT		 1950 *
1951 */
1952
1953static unsigned int ata_bus_edd(struct ata_port *ap)
1954{
1955 struct ata_taskfile tf;
e5338254 1956 unsigned long flags;
1da177e4
LT		 1957
1958 /* set up execute-device-diag (bus reset) taskfile */
1959 /* also, take interrupts to a known state (disabled) */
1960 DPRINTK("execute-device-diag\n");
1961 ata_tf_init(ap, &tf, 0);
1962 tf.ctl |= ATA_NIEN;
1963 tf.command = ATA_CMD_EDD;
1964 tf.protocol = ATA_PROT_NODATA;
1965
1966 /* do bus reset */
e5338254 1967 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1968 ata_tf_to_host(ap, &tf);
e5338254 1969 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1970
1971 /* spec says at least 2ms. but who knows with those
1972 * crazy ATAPI devices...
1973 */
1974 msleep(150);
1975
1976 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1977}
1978
1979static unsigned int ata_bus_softreset(struct ata_port *ap,
1980 unsigned int devmask)
1981{
1982 struct ata_ioports *ioaddr = &ap->ioaddr;
1983
1984 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1985
1986 /* software reset. causes dev0 to be selected */
1987 if (ap->flags & ATA_FLAG_MMIO) {
1988 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1989 udelay(20); /* FIXME: flush */
1990 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1991 udelay(20); /* FIXME: flush */
1992 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1993 } else {
1994 outb(ap->ctl, ioaddr->ctl_addr);
1995 udelay(10);
1996 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1997 udelay(10);
1998 outb(ap->ctl, ioaddr->ctl_addr);
1999 }
2000
2001 /* spec mandates ">= 2ms" before checking status.
2002 * We wait 150ms, because that was the magic delay used for
2003 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2004 * between when the ATA command register is written, and then
2005 * status is checked. Because waiting for "a while" before
2006 * checking status is fine, post SRST, we perform this magic
2007 * delay here as well.
2008 */
2009 msleep(150);
2010
2011 ata_bus_post_reset(ap, devmask);
2012
2013 return 0;
2014}
2015
2016/**
2017 * ata_bus_reset - reset host port and associated ATA channel
2018 * @ap: port to reset
2019 *
2020 * This is typically the first time we actually start issuing
2021 * commands to the ATA channel. We wait for BSY to clear, then
2022 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2023 * result. Determine what devices, if any, are on the channel
2024 * by looking at the device 0/1 error register. Look at the signature
2025 * stored in each device's taskfile registers, to determine if
2026 * the device is ATA or ATAPI.
2027 *
2028 * LOCKING:
0cba632b
JG		 2029 * PCI/etc. bus probe sem.
2030 * Obtains host_set lock.
1da177e4
LT		 2031 *
2032 * SIDE EFFECTS:
2033 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2034 */
2035
2036void ata_bus_reset(struct ata_port *ap)
2037{
2038 struct ata_ioports *ioaddr = &ap->ioaddr;
2039 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2040 u8 err;
2041 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2042
2043 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2044
2045 /* determine if device 0/1 are present */
2046 if (ap->flags & ATA_FLAG_SATA_RESET)
2047 dev0 = 1;
2048 else {
2049 dev0 = ata_devchk(ap, 0);
2050 if (slave_possible)
2051 dev1 = ata_devchk(ap, 1);
2052 }
2053
2054 if (dev0)
2055 devmask |= (1 << 0);
2056 if (dev1)
2057 devmask |= (1 << 1);
2058
2059 /* select device 0 again */
2060 ap->ops->dev_select(ap, 0);
2061
2062 /* issue bus reset */
2063 if (ap->flags & ATA_FLAG_SRST)
2064 rc = ata_bus_softreset(ap, devmask);
2065 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2066 /* set up device control */
2067 if (ap->flags & ATA_FLAG_MMIO)
2068 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2069 else
2070 outb(ap->ctl, ioaddr->ctl_addr);
2071 rc = ata_bus_edd(ap);
2072 }
2073
2074 if (rc)
2075 goto err_out;
2076
2077 /*
2078 * determine by signature whether we have ATA or ATAPI devices
2079 */
b4dc7623 2080 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2081 if ((slave_possible) && (err != 0x81))
b4dc7623 2082 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2083
2084 /* re-enable interrupts */
2085 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2086 ata_irq_on(ap);
2087
2088 /* is double-select really necessary? */
2089 if (ap->device[1].class != ATA_DEV_NONE)
2090 ap->ops->dev_select(ap, 1);
2091 if (ap->device[0].class != ATA_DEV_NONE)
2092 ap->ops->dev_select(ap, 0);
2093
2094 /* if no devices were detected, disable this port */
2095 if ((ap->device[0].class == ATA_DEV_NONE) &&
2096 (ap->device[1].class == ATA_DEV_NONE))
2097 goto err_out;
2098
2099 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2100 /* set up device control for ATA_FLAG_SATA_RESET */
2101 if (ap->flags & ATA_FLAG_MMIO)
2102 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2103 else
2104 outb(ap->ctl, ioaddr->ctl_addr);
2105 }
2106
2107 DPRINTK("EXIT\n");
2108 return;
2109
2110err_out:
2111 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2112 ap->ops->port_disable(ap);
2113
2114 DPRINTK("EXIT\n");
2115}
2116
7a7921e8
TH		 2117static int sata_phy_resume(struct ata_port *ap)
2118{
2119 unsigned long timeout = jiffies + (HZ * 5);
2120 u32 sstatus;
2121
2122 scr_write_flush(ap, SCR_CONTROL, 0x300);
2123
2124 /* Wait for phy to become ready, if necessary. */
2125 do {
2126 msleep(200);
2127 sstatus = scr_read(ap, SCR_STATUS);
2128 if ((sstatus & 0xf) != 1)
2129 return 0;
2130 } while (time_before(jiffies, timeout));
2131
2132 return -1;
2133}
2134
8a19ac89
TH		 2135/**
2136 * ata_std_probeinit - initialize probing
2137 * @ap: port to be probed
2138 *
2139 * @ap is about to be probed. Initialize it. This function is
2140 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2141 *
2142 * NOTE!!! Do not use this function as probeinit if a low level
2143 * driver implements only hardreset. Just pass NULL as probeinit
2144 * in that case. Using this function is probably okay but doing
2145 * so makes reset sequence different from the original
2146 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 2147 */
2148extern void ata_std_probeinit(struct ata_port *ap)
2149{
3a39746a 2150 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 2151 sata_phy_resume(ap);
3a39746a
TH		 2152 if (sata_dev_present(ap))
2153 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2154 }
8a19ac89
TH		 2155}
2156
c2bd5804
TH		 2157/**
2158 * ata_std_softreset - reset host port via ATA SRST
2159 * @ap: port to reset
2160 * @verbose: fail verbosely
2161 * @classes: resulting classes of attached devices
2162 *
2163 * Reset host port using ATA SRST. This function is to be used
2164 * as standard callback for ata_drive_*_reset() functions.
2165 *
2166 * LOCKING:
2167 * Kernel thread context (may sleep)
2168 *
2169 * RETURNS:
2170 * 0 on success, -errno otherwise.
2171 */
2172int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2173{
2174 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2175 unsigned int devmask = 0, err_mask;
2176 u8 err;
2177
2178 DPRINTK("ENTER\n");
2179
3a39746a
TH		 2180 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2181 classes[0] = ATA_DEV_NONE;
2182 goto out;
2183 }
2184
c2bd5804
TH		 2185 /* determine if device 0/1 are present */
2186 if (ata_devchk(ap, 0))
2187 devmask |= (1 << 0);
2188 if (slave_possible && ata_devchk(ap, 1))
2189 devmask |= (1 << 1);
2190
c2bd5804
TH		 2191 /* select device 0 again */
2192 ap->ops->dev_select(ap, 0);
2193
2194 /* issue bus reset */
2195 DPRINTK("about to softreset, devmask=%x\n", devmask);
2196 err_mask = ata_bus_softreset(ap, devmask);
2197 if (err_mask) {
2198 if (verbose)
2199 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2200 ap->id, err_mask);
2201 else
2202 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2203 err_mask);
2204 return -EIO;
2205 }
2206
2207 /* determine by signature whether we have ATA or ATAPI devices */
2208 classes[0] = ata_dev_try_classify(ap, 0, &err);
2209 if (slave_possible && err != 0x81)
2210 classes[1] = ata_dev_try_classify(ap, 1, &err);
2211
3a39746a 2212 out:
c2bd5804
TH		 2213 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2214 return 0;
2215}
2216
2217/**
2218 * sata_std_hardreset - reset host port via SATA phy reset
2219 * @ap: port to reset
2220 * @verbose: fail verbosely
2221 * @class: resulting class of attached device
2222 *
2223 * SATA phy-reset host port using DET bits of SControl register.
2224 * This function is to be used as standard callback for
2225 * ata_drive_*_reset().
2226 *
2227 * LOCKING:
2228 * Kernel thread context (may sleep)
2229 *
2230 * RETURNS:
2231 * 0 on success, -errno otherwise.
2232 */
2233int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2234{
c2bd5804
TH		 2235 DPRINTK("ENTER\n");
2236
2237 /* Issue phy wake/reset */
2238 scr_write_flush(ap, SCR_CONTROL, 0x301);
2239
2240 /*
2241 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2242 * 10.4.2 says at least 1 ms.
2243 */
2244 msleep(1);
2245
7a7921e8
TH		 2246 /* Bring phy back */
2247 sata_phy_resume(ap);
c2bd5804 2248
c2bd5804
TH		 2249 /* TODO: phy layer with polling, timeouts, etc. */
2250 if (!sata_dev_present(ap)) {
2251 *class = ATA_DEV_NONE;
2252 DPRINTK("EXIT, link offline\n");
2253 return 0;
2254 }
2255
2256 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2257 if (verbose)
2258 printk(KERN_ERR "ata%u: COMRESET failed "
2259 "(device not ready)\n", ap->id);
2260 else
2261 DPRINTK("EXIT, device not ready\n");
2262 return -EIO;
2263 }
2264
3a39746a
TH		 2265 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2266
c2bd5804
TH		 2267 *class = ata_dev_try_classify(ap, 0, NULL);
2268
2269 DPRINTK("EXIT, class=%u\n", *class);
2270 return 0;
2271}
2272
2273/**
2274 * ata_std_postreset - standard postreset callback
2275 * @ap: the target ata_port
2276 * @classes: classes of attached devices
2277 *
2278 * This function is invoked after a successful reset. Note that
2279 * the device might have been reset more than once using
2280 * different reset methods before postreset is invoked.
c2bd5804
TH		 2281 *
2282 * This function is to be used as standard callback for
2283 * ata_drive_*_reset().
2284 *
2285 * LOCKING:
2286 * Kernel thread context (may sleep)
2287 */
2288void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2289{
2290 DPRINTK("ENTER\n");
2291
56497bd5 2292 /* set cable type if it isn't already set */
c2bd5804
TH		 2293 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2294 ap->cbl = ATA_CBL_SATA;
2295
2296 /* print link status */
2297 if (ap->cbl == ATA_CBL_SATA)
2298 sata_print_link_status(ap);
2299
3a39746a
TH		 2300 /* re-enable interrupts */
2301 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2302 ata_irq_on(ap);
c2bd5804
TH		 2303
2304 /* is double-select really necessary? */
2305 if (classes[0] != ATA_DEV_NONE)
2306 ap->ops->dev_select(ap, 1);
2307 if (classes[1] != ATA_DEV_NONE)
2308 ap->ops->dev_select(ap, 0);
2309
3a39746a
TH		 2310 /* bail out if no device is present */
2311 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2312 DPRINTK("EXIT, no device\n");
2313 return;
2314 }
2315
2316 /* set up device control */
2317 if (ap->ioaddr.ctl_addr) {
2318 if (ap->flags & ATA_FLAG_MMIO)
2319 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2320 else
2321 outb(ap->ctl, ap->ioaddr.ctl_addr);
2322 }
c2bd5804
TH		 2323
2324 DPRINTK("EXIT\n");
2325}
2326
2327/**
2328 * ata_std_probe_reset - standard probe reset method
2329 * @ap: prot to perform probe-reset
2330 * @classes: resulting classes of attached devices
2331 *
2332 * The stock off-the-shelf ->probe_reset method.
2333 *
2334 * LOCKING:
2335 * Kernel thread context (may sleep)
2336 *
2337 * RETURNS:
2338 * 0 on success, -errno otherwise.
2339 */
2340int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2341{
2342 ata_reset_fn_t hardreset;
2343
2344 hardreset = NULL;
b911fc3a 2345 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2346 hardreset = sata_std_hardreset;
2347
8a19ac89 2348 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2349 ata_std_softreset, hardreset,
c2bd5804
TH		 2350 ata_std_postreset, classes);
2351}
2352
a62c0fc5
TH		 2353static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2354 ata_postreset_fn_t postreset,
2355 unsigned int *classes)
2356{
2357 int i, rc;
2358
2359 for (i = 0; i < ATA_MAX_DEVICES; i++)
2360 classes[i] = ATA_DEV_UNKNOWN;
2361
2362 rc = reset(ap, 0, classes);
2363 if (rc)
2364 return rc;
2365
2366 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2367 * is complete and convert all ATA_DEV_UNKNOWN to
2368 * ATA_DEV_NONE.
2369 */
2370 for (i = 0; i < ATA_MAX_DEVICES; i++)
2371 if (classes[i] != ATA_DEV_UNKNOWN)
2372 break;
2373
2374 if (i < ATA_MAX_DEVICES)
2375 for (i = 0; i < ATA_MAX_DEVICES; i++)
2376 if (classes[i] == ATA_DEV_UNKNOWN)
2377 classes[i] = ATA_DEV_NONE;
2378
2379 if (postreset)
2380 postreset(ap, classes);
2381
2382 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2383}
2384
2385/**
2386 * ata_drive_probe_reset - Perform probe reset with given methods
2387 * @ap: port to reset
7944ea95 2388 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2389 * @softreset: softreset method (can be NULL)
2390 * @hardreset: hardreset method (can be NULL)
2391 * @postreset: postreset method (can be NULL)
2392 * @classes: resulting classes of attached devices
2393 *
2394 * Reset the specified port and classify attached devices using
2395 * given methods. This function prefers softreset but tries all
2396 * possible reset sequences to reset and classify devices. This
2397 * function is intended to be used for constructing ->probe_reset
2398 * callback by low level drivers.
2399 *
2400 * Reset methods should follow the following rules.
2401 *
2402 * - Return 0 on sucess, -errno on failure.
2403 * - If classification is supported, fill classes[] with
2404 * recognized class codes.
2405 * - If classification is not supported, leave classes[] alone.
2406 * - If verbose is non-zero, print error message on failure;
2407 * otherwise, shut up.
2408 *
2409 * LOCKING:
2410 * Kernel thread context (may sleep)
2411 *
2412 * RETURNS:
2413 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2414 * if classification fails, and any error code from reset
2415 * methods.
2416 */
7944ea95 2417int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2418 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2419 ata_postreset_fn_t postreset, unsigned int *classes)
2420{
2421 int rc = -EINVAL;
2422
7944ea95
TH		 2423 if (probeinit)
2424 probeinit(ap);
2425
a62c0fc5
TH		 2426 if (softreset) {
2427 rc = do_probe_reset(ap, softreset, postreset, classes);
2428 if (rc == 0)
2429 return 0;
2430 }
2431
2432 if (!hardreset)
2433 return rc;
2434
2435 rc = do_probe_reset(ap, hardreset, postreset, classes);
2436 if (rc == 0 || rc != -ENODEV)
2437 return rc;
2438
2439 if (softreset)
2440 rc = do_probe_reset(ap, softreset, postreset, classes);
2441
2442 return rc;
2443}
2444
623a3128
TH		 2445/**
2446 * ata_dev_same_device - Determine whether new ID matches configured device
2447 * @ap: port on which the device to compare against resides
2448 * @dev: device to compare against
2449 * @new_class: class of the new device
2450 * @new_id: IDENTIFY page of the new device
2451 *
2452 * Compare @new_class and @new_id against @dev and determine
2453 * whether @dev is the device indicated by @new_class and
2454 * @new_id.
2455 *
2456 * LOCKING:
2457 * None.
2458 *
2459 * RETURNS:
2460 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2461 */
2462static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2463 unsigned int new_class, const u16 *new_id)
2464{
2465 const u16 *old_id = dev->id;
2466 unsigned char model[2][41], serial[2][21];
2467 u64 new_n_sectors;
2468
2469 if (dev->class != new_class) {
2470 printk(KERN_INFO
2471 "ata%u: dev %u class mismatch %d != %d\n",
2472 ap->id, dev->devno, dev->class, new_class);
2473 return 0;
2474 }
2475
2476 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2477 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2478 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2479 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2480 new_n_sectors = ata_id_n_sectors(new_id);
2481
2482 if (strcmp(model[0], model[1])) {
2483 printk(KERN_INFO
2484 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2485 ap->id, dev->devno, model[0], model[1]);
2486 return 0;
2487 }
2488
2489 if (strcmp(serial[0], serial[1])) {
2490 printk(KERN_INFO
2491 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2492 ap->id, dev->devno, serial[0], serial[1]);
2493 return 0;
2494 }
2495
2496 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2497 printk(KERN_INFO
2498 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2499 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2500 (unsigned long long)new_n_sectors);
2501 return 0;
2502 }
2503
2504 return 1;
2505}
2506
2507/**
2508 * ata_dev_revalidate - Revalidate ATA device
2509 * @ap: port on which the device to revalidate resides
2510 * @dev: device to revalidate
2511 * @post_reset: is this revalidation after reset?
2512 *
2513 * Re-read IDENTIFY page and make sure @dev is still attached to
2514 * the port.
2515 *
2516 * LOCKING:
2517 * Kernel thread context (may sleep)
2518 *
2519 * RETURNS:
2520 * 0 on success, negative errno otherwise
2521 */
2522int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2523 int post_reset)
1da177e4 2524{
623a3128
TH		 2525 unsigned int class;
2526 u16 *id;
2527 int rc;
2528
2529 if (!ata_dev_present(dev))
2530 return -ENODEV;
2531
2532 class = dev->class;
2533 id = NULL;
2534
2535 /* allocate & read ID data */
2536 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2537 if (rc)
2538 goto fail;
2539
2540 /* is the device still there? */
2541 if (!ata_dev_same_device(ap, dev, class, id)) {
2542 rc = -ENODEV;
2543 goto fail;
2544 }
2545
2546 kfree(dev->id);
2547 dev->id = id;
2548
2549 /* configure device according to the new ID */
2550 return ata_dev_configure(ap, dev, 0);
2551
2552 fail:
2553 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2554 ap->id, dev->devno, rc);
2555 kfree(id);
2556 return rc;
1da177e4
LT		 2557}
2558
98ac62de 2559static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2560 "WDC AC11000H",
2561 "WDC AC22100H",
2562 "WDC AC32500H",
2563 "WDC AC33100H",
2564 "WDC AC31600H",
2565 "WDC AC32100H",
2566 "WDC AC23200L",
2567 "Compaq CRD-8241B",
2568 "CRD-8400B",
2569 "CRD-8480B",
2570 "CRD-8482B",
2571 "CRD-84",
2572 "SanDisk SDP3B",
2573 "SanDisk SDP3B-64",
2574 "SANYO CD-ROM CRD",
2575 "HITACHI CDR-8",
2576 "HITACHI CDR-8335",
2577 "HITACHI CDR-8435",
2578 "Toshiba CD-ROM XM-6202B",
e922256a 2579 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2580 "CD-532E-A",
2581 "E-IDE CD-ROM CR-840",
2582 "CD-ROM Drive/F5A",
2583 "WPI CDD-820",
2584 "SAMSUNG CD-ROM SC-148C",
2585 "SAMSUNG CD-ROM SC",
2586 "SanDisk SDP3B-64",
1da177e4
LT		 2587 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2588 "_NEC DV5800A",
2589};
2590
057ace5e 2591static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2592{
2e02671d 2593 unsigned char model_num[41];
1da177e4
LT		 2594 int i;
2595
6a62a04d 2596 ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num));
1da177e4
LT		 2597
2598 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2599 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2600 return 1;
2601
2602 return 0;
2603}
2604
1da177e4 2605/**
a6d5a51c
TH		 2606 * ata_dev_xfermask - Compute supported xfermask of the given device
2607 * @ap: Port on which the device to compute xfermask for resides
2608 * @dev: Device to compute xfermask for
1da177e4 2609 *
a6d5a51c
TH		 2610 * Compute supported xfermask of @dev. This function is
2611 * responsible for applying all known limits including host
2612 * controller limits, device blacklist, etc...
0cba632b 2613 *
1da177e4 2614 * LOCKING:
a6d5a51c 2615 * None.
1da177e4
LT		 2616 *
2617 * RETURNS:
a6d5a51c 2618 * Computed xfermask.
1da177e4 2619 */
a6d5a51c
TH		 2620static unsigned int ata_dev_xfermask(struct ata_port *ap,
2621 struct ata_device *dev)
1da177e4 2622{
a6d5a51c
TH		 2623 unsigned long xfer_mask;
2624 int i;
1da177e4 2625
a6d5a51c
TH		 2626 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2627 ap->udma_mask);
1da177e4 2628
a6d5a51c
TH		 2629 /* use port-wide xfermask for now */
2630 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2631 struct ata_device *d = &ap->device[i];
2632 if (!ata_dev_present(d))
2633 continue;
2634 xfer_mask &= ata_id_xfermask(d->id);
2635 if (ata_dma_blacklisted(d))
2636 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2637 }
2638
a6d5a51c
TH		 2639 if (ata_dma_blacklisted(dev))
2640 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2641 "disabling DMA\n", ap->id, dev->devno);
2642
2643 return xfer_mask;
1da177e4
LT		 2644}
2645
2646/**
2647 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2648 * @ap: Port associated with device @dev
2649 * @dev: Device to which command will be sent
2650 *
780a87f7
JG		 2651 * Issue SET FEATURES - XFER MODE command to device @dev
2652 * on port @ap.
2653 *
1da177e4 2654 * LOCKING:
0cba632b 2655 * PCI/etc. bus probe sem.
1da177e4
LT		 2656 */
2657
2658static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2659{
a0123703 2660 struct ata_taskfile tf;
1da177e4
LT		 2661
2662 /* set up set-features taskfile */
2663 DPRINTK("set features - xfer mode\n");
2664
a0123703
TH		 2665 ata_tf_init(ap, &tf, dev->devno);
2666 tf.command = ATA_CMD_SET_FEATURES;
2667 tf.feature = SETFEATURES_XFER;
2668 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2669 tf.protocol = ATA_PROT_NODATA;
2670 tf.nsect = dev->xfer_mode;
1da177e4 2671
a0123703
TH		 2672 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2673 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2674 ap->id);
1da177e4 2675 ata_port_disable(ap);
a0123703 2676 }
1da177e4
LT		 2677
2678 DPRINTK("EXIT\n");
2679}
2680
8bf62ece
AL		 2681/**
2682 * ata_dev_init_params - Issue INIT DEV PARAMS command
2683 * @ap: Port associated with device @dev
2684 * @dev: Device to which command will be sent
2685 *
2686 * LOCKING:
6aff8f1f
TH		 2687 * Kernel thread context (may sleep)
2688 *
2689 * RETURNS:
2690 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2691 */
2692
6aff8f1f
TH		 2693static unsigned int ata_dev_init_params(struct ata_port *ap,
2694 struct ata_device *dev)
8bf62ece 2695{
a0123703 2696 struct ata_taskfile tf;
6aff8f1f 2697 unsigned int err_mask;
8bf62ece
AL		 2698 u16 sectors = dev->id[6];
2699 u16 heads = dev->id[3];
2700
2701 /* Number of sectors per track 1-255. Number of heads 1-16 */
2702 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
6aff8f1f 2703 return 0;
8bf62ece
AL		 2704
2705 /* set up init dev params taskfile */
2706 DPRINTK("init dev params \n");
2707
a0123703
TH		 2708 ata_tf_init(ap, &tf, dev->devno);
2709 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2710 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2711 tf.protocol = ATA_PROT_NODATA;
2712 tf.nsect = sectors;
2713 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2714
6aff8f1f 2715 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2716
6aff8f1f
TH		 2717 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2718 return err_mask;
8bf62ece
AL		 2719}
2720
1da177e4 2721/**
0cba632b
JG		 2722 * ata_sg_clean - Unmap DMA memory associated with command
2723 * @qc: Command containing DMA memory to be released
2724 *
2725 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2726 *
2727 * LOCKING:
0cba632b 2728 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2729 */
2730
2731static void ata_sg_clean(struct ata_queued_cmd *qc)
2732{
2733 struct ata_port *ap = qc->ap;
cedc9a47 2734 struct scatterlist *sg = qc->__sg;
1da177e4 2735 int dir = qc->dma_dir;
cedc9a47 2736 void *pad_buf = NULL;
1da177e4 2737
a4631474
TH		 2738 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2739 WARN_ON(sg == NULL);
1da177e4
LT		 2740
2741 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2742 WARN_ON(qc->n_elem > 1);
1da177e4 2743
2c13b7ce 2744 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2745
cedc9a47
JG		 2746 /* if we padded the buffer out to 32-bit bound, and data
2747 * xfer direction is from-device, we must copy from the
2748 * pad buffer back into the supplied buffer
2749 */
2750 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2751 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2752
2753 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2754 if (qc->n_elem)
2755 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2756 /* restore last sg */
2757 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2758 if (pad_buf) {
2759 struct scatterlist *psg = &qc->pad_sgent;
2760 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2761 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2762 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2763 }
2764 } else {
2e242fa9 2765 if (qc->n_elem)
e1410f2d
JG		 2766 dma_unmap_single(ap->host_set->dev,
2767 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2768 dir);
cedc9a47
JG		 2769 /* restore sg */
2770 sg->length += qc->pad_len;
2771 if (pad_buf)
2772 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2773 pad_buf, qc->pad_len);
2774 }
1da177e4
LT		 2775
2776 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2777 qc->__sg = NULL;
1da177e4
LT		 2778}
2779
2780/**
2781 * ata_fill_sg - Fill PCI IDE PRD table
2782 * @qc: Metadata associated with taskfile to be transferred
2783 *
780a87f7
JG		 2784 * Fill PCI IDE PRD (scatter-gather) table with segments
2785 * associated with the current disk command.
2786 *
1da177e4 2787 * LOCKING:
780a87f7 2788 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2789 *
2790 */
2791static void ata_fill_sg(struct ata_queued_cmd *qc)
2792{
1da177e4 2793 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2794 struct scatterlist *sg;
2795 unsigned int idx;
1da177e4 2796
a4631474 2797 WARN_ON(qc->__sg == NULL);
f131883e 2798 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2799
2800 idx = 0;
cedc9a47 2801 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2802 u32 addr, offset;
2803 u32 sg_len, len;
2804
2805 /* determine if physical DMA addr spans 64K boundary.
2806 * Note h/w doesn't support 64-bit, so we unconditionally
2807 * truncate dma_addr_t to u32.
2808 */
2809 addr = (u32) sg_dma_address(sg);
2810 sg_len = sg_dma_len(sg);
2811
2812 while (sg_len) {
2813 offset = addr & 0xffff;
2814 len = sg_len;
2815 if ((offset + sg_len) > 0x10000)
2816 len = 0x10000 - offset;
2817
2818 ap->prd[idx].addr = cpu_to_le32(addr);
2819 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2820 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2821
2822 idx++;
2823 sg_len -= len;
2824 addr += len;
2825 }
2826 }
2827
2828 if (idx)
2829 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2830}
2831/**
2832 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2833 * @qc: Metadata associated with taskfile to check
2834 *
780a87f7
JG		 2835 * Allow low-level driver to filter ATA PACKET commands, returning
2836 * a status indicating whether or not it is OK to use DMA for the
2837 * supplied PACKET command.
2838 *
1da177e4 2839 * LOCKING:
0cba632b
JG		 2840 * spin_lock_irqsave(host_set lock)
2841 *
1da177e4
LT		 2842 * RETURNS: 0 when ATAPI DMA can be used
2843 * nonzero otherwise
2844 */
2845int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2846{
2847 struct ata_port *ap = qc->ap;
2848 int rc = 0; /* Assume ATAPI DMA is OK by default */
2849
2850 if (ap->ops->check_atapi_dma)
2851 rc = ap->ops->check_atapi_dma(qc);
2852
2853 return rc;
2854}
2855/**
2856 * ata_qc_prep - Prepare taskfile for submission
2857 * @qc: Metadata associated with taskfile to be prepared
2858 *
780a87f7
JG		 2859 * Prepare ATA taskfile for submission.
2860 *
1da177e4
LT		 2861 * LOCKING:
2862 * spin_lock_irqsave(host_set lock)
2863 */
2864void ata_qc_prep(struct ata_queued_cmd *qc)
2865{
2866 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2867 return;
2868
2869 ata_fill_sg(qc);
2870}
2871
0cba632b
JG		 2872/**
2873 * ata_sg_init_one - Associate command with memory buffer
2874 * @qc: Command to be associated
2875 * @buf: Memory buffer
2876 * @buflen: Length of memory buffer, in bytes.
2877 *
2878 * Initialize the data-related elements of queued_cmd @qc
2879 * to point to a single memory buffer, @buf of byte length @buflen.
2880 *
2881 * LOCKING:
2882 * spin_lock_irqsave(host_set lock)
2883 */
2884
1da177e4
LT		 2885void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2886{
2887 struct scatterlist *sg;
2888
2889 qc->flags |= ATA_QCFLAG_SINGLE;
2890
2891 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2892 qc->__sg = &qc->sgent;
1da177e4 2893 qc->n_elem = 1;
cedc9a47 2894 qc->orig_n_elem = 1;
1da177e4
LT		 2895 qc->buf_virt = buf;
2896
cedc9a47 2897 sg = qc->__sg;
f0612bbc 2898 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2899}
2900
0cba632b
JG		 2901/**
2902 * ata_sg_init - Associate command with scatter-gather table.
2903 * @qc: Command to be associated
2904 * @sg: Scatter-gather table.
2905 * @n_elem: Number of elements in s/g table.
2906 *
2907 * Initialize the data-related elements of queued_cmd @qc
2908 * to point to a scatter-gather table @sg, containing @n_elem
2909 * elements.
2910 *
2911 * LOCKING:
2912 * spin_lock_irqsave(host_set lock)
2913 */
2914
1da177e4
LT		 2915void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2916 unsigned int n_elem)
2917{
2918 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2919 qc->__sg = sg;
1da177e4 2920 qc->n_elem = n_elem;
cedc9a47 2921 qc->orig_n_elem = n_elem;
1da177e4
LT		 2922}
2923
2924/**
0cba632b
JG		 2925 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2926 * @qc: Command with memory buffer to be mapped.
2927 *
2928 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2929 *
2930 * LOCKING:
2931 * spin_lock_irqsave(host_set lock)
2932 *
2933 * RETURNS:
0cba632b 2934 * Zero on success, negative on error.
1da177e4
LT		 2935 */
2936
2937static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2938{
2939 struct ata_port *ap = qc->ap;
2940 int dir = qc->dma_dir;
cedc9a47 2941 struct scatterlist *sg = qc->__sg;
1da177e4 2942 dma_addr_t dma_address;
2e242fa9 2943 int trim_sg = 0;
1da177e4 2944
cedc9a47
JG		 2945 /* we must lengthen transfers to end on a 32-bit boundary */
2946 qc->pad_len = sg->length & 3;
2947 if (qc->pad_len) {
2948 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2949 struct scatterlist *psg = &qc->pad_sgent;
2950
a4631474 2951 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2952
2953 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2954
2955 if (qc->tf.flags & ATA_TFLAG_WRITE)
2956 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2957 qc->pad_len);
2958
2959 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2960 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2961 /* trim sg */
2962 sg->length -= qc->pad_len;
2e242fa9
TH		 2963 if (sg->length == 0)
2964 trim_sg = 1;
cedc9a47
JG		 2965
2966 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2967 sg->length, qc->pad_len);
2968 }
2969
2e242fa9
TH		 2970 if (trim_sg) {
2971 qc->n_elem--;
e1410f2d
JG		 2972 goto skip_map;
2973 }
2974
1da177e4 2975 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2976 sg->length, dir);
537a95d9
TH		 2977 if (dma_mapping_error(dma_address)) {
2978 /* restore sg */
2979 sg->length += qc->pad_len;
1da177e4 2980 return -1;
537a95d9 2981 }
1da177e4
LT		 2982
2983 sg_dma_address(sg) = dma_address;
32529e01 2984 sg_dma_len(sg) = sg->length;
1da177e4 2985
2e242fa9 2986skip_map:
1da177e4
LT		 2987 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2988 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2989
2990 return 0;
2991}
2992
2993/**
0cba632b
JG		 2994 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2995 * @qc: Command with scatter-gather table to be mapped.
2996 *
2997 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2998 *
2999 * LOCKING:
3000 * spin_lock_irqsave(host_set lock)
3001 *
3002 * RETURNS:
0cba632b 3003 * Zero on success, negative on error.
1da177e4
LT		 3004 *
3005 */
3006
3007static int ata_sg_setup(struct ata_queued_cmd *qc)
3008{
3009 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3010 struct scatterlist *sg = qc->__sg;
3011 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3012 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3013
3014 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3015 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3016
cedc9a47
JG		 3017 /* we must lengthen transfers to end on a 32-bit boundary */
3018 qc->pad_len = lsg->length & 3;
3019 if (qc->pad_len) {
3020 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3021 struct scatterlist *psg = &qc->pad_sgent;
3022 unsigned int offset;
3023
a4631474 3024 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3025
3026 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3027
3028 /*
3029 * psg->page/offset are used to copy to-be-written
3030 * data in this function or read data in ata_sg_clean.
3031 */
3032 offset = lsg->offset + lsg->length - qc->pad_len;
3033 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3034 psg->offset = offset_in_page(offset);
3035
3036 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3037 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3038 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3039 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3040 }
3041
3042 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3043 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3044 /* trim last sg */
3045 lsg->length -= qc->pad_len;
e1410f2d
JG		 3046 if (lsg->length == 0)
3047 trim_sg = 1;
cedc9a47
JG		 3048
3049 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3050 qc->n_elem - 1, lsg->length, qc->pad_len);
3051 }
3052
e1410f2d
JG		 3053 pre_n_elem = qc->n_elem;
3054 if (trim_sg && pre_n_elem)
3055 pre_n_elem--;
3056
3057 if (!pre_n_elem) {
3058 n_elem = 0;
3059 goto skip_map;
3060 }
3061
1da177e4 3062 dir = qc->dma_dir;
e1410f2d 3063 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3064 if (n_elem < 1) {
3065 /* restore last sg */
3066 lsg->length += qc->pad_len;
1da177e4 3067 return -1;
537a95d9 3068 }
1da177e4
LT		 3069
3070 DPRINTK("%d sg elements mapped\n", n_elem);
3071
e1410f2d 3072skip_map:
1da177e4
LT		 3073 qc->n_elem = n_elem;
3074
3075 return 0;
3076}
3077
40e8c82c
TH		 3078/**
3079 * ata_poll_qc_complete - turn irq back on and finish qc
3080 * @qc: Command to complete
8e8b77dd 3081 * @err_mask: ATA status register content
40e8c82c
TH		 3082 *
3083 * LOCKING:
3084 * None. (grabs host lock)
3085 */
3086
a22e2eb0 3087void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3088{
3089 struct ata_port *ap = qc->ap;
b8f6153e 3090 unsigned long flags;
40e8c82c 3091
b8f6153e 3092 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c 3093 ata_irq_on(ap);
a22e2eb0 3094 ata_qc_complete(qc);
b8f6153e 3095 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3096}
3097
1da177e4 3098/**
c893a3ae 3099 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3100 * @ap: the target ata_port
1da177e4
LT		 3101 *
3102 * LOCKING:
0cba632b 3103 * None. (executing in kernel thread context)
1da177e4
LT		 3104 *
3105 * RETURNS:
6f0ef4fa 3106 * timeout value to use
1da177e4
LT		 3107 */
3108
3109static unsigned long ata_pio_poll(struct ata_port *ap)
3110{
c14b8331 3111 struct ata_queued_cmd *qc;
1da177e4 3112 u8 status;
14be71f4
AL		 3113 unsigned int poll_state = HSM_ST_UNKNOWN;
3114 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3115
c14b8331 3116 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3117 WARN_ON(qc == NULL);
c14b8331 3118
14be71f4
AL		 3119 switch (ap->hsm_task_state) {
3120 case HSM_ST:
3121 case HSM_ST_POLL:
3122 poll_state = HSM_ST_POLL;
3123 reg_state = HSM_ST;
1da177e4 3124 break;
14be71f4
AL		 3125 case HSM_ST_LAST:
3126 case HSM_ST_LAST_POLL:
3127 poll_state = HSM_ST_LAST_POLL;
3128 reg_state = HSM_ST_LAST;
1da177e4
LT		 3129 break;
3130 default:
3131 BUG();
3132 break;
3133 }
3134
3135 status = ata_chk_status(ap);
3136 if (status & ATA_BUSY) {
3137 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3138 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3139 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3140 return 0;
3141 }
14be71f4 3142 ap->hsm_task_state = poll_state;
1da177e4
LT		 3143 return ATA_SHORT_PAUSE;
3144 }
3145
14be71f4 3146 ap->hsm_task_state = reg_state;
1da177e4
LT		 3147 return 0;
3148}
3149
3150/**
6f0ef4fa
RD		 3151 * ata_pio_complete - check if drive is busy or idle
3152 * @ap: the target ata_port
1da177e4
LT		 3153 *
3154 * LOCKING:
0cba632b 3155 * None. (executing in kernel thread context)
7fb6ec28
JG		 3156 *
3157 * RETURNS:
fbcdd80b
AL		 3158 * Zero if qc completed.
3159 * Non-zero if has next.
1da177e4
LT		 3160 */
3161
7fb6ec28 3162static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3163{
3164 struct ata_queued_cmd *qc;
3165 u8 drv_stat;
3166
3167 /*
31433ea3
AC		 3168 * This is purely heuristic. This is a fast path. Sometimes when
3169 * we enter, BSY will be cleared in a chk-status or two. If not,
3170 * the drive is probably seeking or something. Snooze for a couple
3171 * msecs, then chk-status again. If still busy, fall back to
07f6f7d0 3172 * HSM_ST_LAST_POLL state.
1da177e4 3173 */
fe79e683
AL		 3174 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3175 if (drv_stat & ATA_BUSY) {
1da177e4 3176 msleep(2);
fe79e683
AL		 3177 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3178 if (drv_stat & ATA_BUSY) {
14be71f4 3179 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3180 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
fbcdd80b 3181 return 1;
1da177e4
LT		 3182 }
3183 }
3184
c14b8331 3185 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3186 WARN_ON(qc == NULL);
c14b8331 3187
1da177e4
LT		 3188 drv_stat = ata_wait_idle(ap);
3189 if (!ata_ok(drv_stat)) {
1c848984 3190 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3191 ap->hsm_task_state = HSM_ST_ERR;
fbcdd80b 3192 return 1;
1da177e4
LT		 3193 }
3194
14be71f4 3195 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3196
a4631474 3197 WARN_ON(qc->err_mask);
a22e2eb0 3198 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3199
3200 /* another command may start at this point */
3201
fbcdd80b 3202 return 0;
1da177e4
LT		 3203}
3204
0baab86b
EF		 3205
3206/**
c893a3ae 3207 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3208 * @buf: Buffer to swap
3209 * @buf_words: Number of 16-bit words in buffer.
3210 *
3211 * Swap halves of 16-bit words if needed to convert from
3212 * little-endian byte order to native cpu byte order, or
3213 * vice-versa.
3214 *
3215 * LOCKING:
6f0ef4fa 3216 * Inherited from caller.
0baab86b 3217 */
1da177e4
LT		 3218void swap_buf_le16(u16 *buf, unsigned int buf_words)
3219{
3220#ifdef __BIG_ENDIAN
3221 unsigned int i;
3222
3223 for (i = 0; i < buf_words; i++)
3224 buf[i] = le16_to_cpu(buf[i]);
3225#endif /* __BIG_ENDIAN */
3226}
3227
6ae4cfb5
AL		 3228/**
3229 * ata_mmio_data_xfer - Transfer data by MMIO
3230 * @ap: port to read/write
3231 * @buf: data buffer
3232 * @buflen: buffer length
344babaa 3233 * @write_data: read/write
6ae4cfb5
AL		 3234 *
3235 * Transfer data from/to the device data register by MMIO.
3236 *
3237 * LOCKING:
3238 * Inherited from caller.
6ae4cfb5
AL		 3239 */
3240
1da177e4
LT		 3241static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3242 unsigned int buflen, int write_data)
3243{
3244 unsigned int i;
3245 unsigned int words = buflen >> 1;
3246 u16 *buf16 = (u16 *) buf;
3247 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3248
6ae4cfb5 3249 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3250 if (write_data) {
3251 for (i = 0; i < words; i++)
3252 writew(le16_to_cpu(buf16[i]), mmio);
3253 } else {
3254 for (i = 0; i < words; i++)
3255 buf16[i] = cpu_to_le16(readw(mmio));
3256 }
6ae4cfb5
AL		 3257
3258 /* Transfer trailing 1 byte, if any. */
3259 if (unlikely(buflen & 0x01)) {
3260 u16 align_buf[1] = { 0 };
3261 unsigned char *trailing_buf = buf + buflen - 1;
3262
3263 if (write_data) {
3264 memcpy(align_buf, trailing_buf, 1);
3265 writew(le16_to_cpu(align_buf[0]), mmio);
3266 } else {
3267 align_buf[0] = cpu_to_le16(readw(mmio));
3268 memcpy(trailing_buf, align_buf, 1);
3269 }
3270 }
1da177e4
LT		 3271}
3272
6ae4cfb5
AL		 3273/**
3274 * ata_pio_data_xfer - Transfer data by PIO
3275 * @ap: port to read/write
3276 * @buf: data buffer
3277 * @buflen: buffer length
344babaa 3278 * @write_data: read/write
6ae4cfb5
AL		 3279 *
3280 * Transfer data from/to the device data register by PIO.
3281 *
3282 * LOCKING:
3283 * Inherited from caller.
6ae4cfb5
AL		 3284 */
3285
1da177e4
LT		 3286static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3287 unsigned int buflen, int write_data)
3288{
6ae4cfb5 3289 unsigned int words = buflen >> 1;
1da177e4 3290
6ae4cfb5 3291 /* Transfer multiple of 2 bytes */
1da177e4 3292 if (write_data)
6ae4cfb5 3293 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3294 else
6ae4cfb5
AL		 3295 insw(ap->ioaddr.data_addr, buf, words);
3296
3297 /* Transfer trailing 1 byte, if any. */
3298 if (unlikely(buflen & 0x01)) {
3299 u16 align_buf[1] = { 0 };
3300 unsigned char *trailing_buf = buf + buflen - 1;
3301
3302 if (write_data) {
3303 memcpy(align_buf, trailing_buf, 1);
3304 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3305 } else {
3306 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3307 memcpy(trailing_buf, align_buf, 1);
3308 }
3309 }
1da177e4
LT		 3310}
3311
6ae4cfb5
AL		 3312/**
3313 * ata_data_xfer - Transfer data from/to the data register.
3314 * @ap: port to read/write
3315 * @buf: data buffer
3316 * @buflen: buffer length
3317 * @do_write: read/write
3318 *
3319 * Transfer data from/to the device data register.
3320 *
3321 * LOCKING:
3322 * Inherited from caller.
6ae4cfb5
AL		 3323 */
3324
1da177e4
LT		 3325static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3326 unsigned int buflen, int do_write)
3327{
a1bd9e68
AC		 3328 /* Make the crap hardware pay the costs not the good stuff */
3329 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3330 unsigned long flags;
3331 local_irq_save(flags);
3332 if (ap->flags & ATA_FLAG_MMIO)
3333 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3334 else
3335 ata_pio_data_xfer(ap, buf, buflen, do_write);
3336 local_irq_restore(flags);
3337 } else {
3338 if (ap->flags & ATA_FLAG_MMIO)
3339 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3340 else
3341 ata_pio_data_xfer(ap, buf, buflen, do_write);
3342 }
1da177e4
LT		 3343}
3344
6ae4cfb5
AL		 3345/**
3346 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3347 * @qc: Command on going
3348 *
3349 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3350 *
3351 * LOCKING:
3352 * Inherited from caller.
3353 */
3354
1da177e4
LT		 3355static void ata_pio_sector(struct ata_queued_cmd *qc)
3356{
3357 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3358 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3359 struct ata_port *ap = qc->ap;
3360 struct page *page;
3361 unsigned int offset;
3362 unsigned char *buf;
3363
3364 if (qc->cursect == (qc->nsect - 1))
14be71f4 3365 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3366
3367 page = sg[qc->cursg].page;
3368 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3369
3370 /* get the current page and offset */
3371 page = nth_page(page, (offset >> PAGE_SHIFT));
3372 offset %= PAGE_SIZE;
3373
1da177e4
LT		 3374 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3375
91b8b313
AL		 3376 if (PageHighMem(page)) {
3377 unsigned long flags;
3378
3379 local_irq_save(flags);
3380 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3381
91b8b313
AL		 3382 /* do the actual data transfer */
3383 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
1da177e4 3384
91b8b313
AL		 3385 kunmap_atomic(buf, KM_IRQ0);
3386 local_irq_restore(flags);
3387 } else {
3388 buf = page_address(page);
3389 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3390 }
7282aa4b
AL		 3391
3392 qc->cursect++;
3393 qc->cursg_ofs++;
3394
3395 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3396 qc->cursg++;
3397 qc->cursg_ofs = 0;
3398 }
1da177e4
LT		 3399}
3400
07f6f7d0
AL		 3401/**
3402 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3403 * @qc: Command on going
3404 *
3405 * Transfer one or many ATA_SECT_SIZE of data from/to the
3406 * ATA device for the DRQ request.
3407 *
3408 * LOCKING:
3409 * Inherited from caller.
3410 */
3411
3412static void ata_pio_sectors(struct ata_queued_cmd *qc)
3413{
3414 if (is_multi_taskfile(&qc->tf)) {
3415 /* READ/WRITE MULTIPLE */
3416 unsigned int nsect;
3417
587005de 3418 WARN_ON(qc->dev->multi_count == 0);
07f6f7d0
AL		 3419
3420 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3421 while (nsect--)
3422 ata_pio_sector(qc);
3423 } else
3424 ata_pio_sector(qc);
3425}
3426
c71c1857
AL		 3427/**
3428 * atapi_send_cdb - Write CDB bytes to hardware
3429 * @ap: Port to which ATAPI device is attached.
3430 * @qc: Taskfile currently active
3431 *
3432 * When device has indicated its readiness to accept
3433 * a CDB, this function is called. Send the CDB.
3434 *
3435 * LOCKING:
3436 * caller.
3437 */
3438
3439static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3440{
3441 /* send SCSI cdb */
3442 DPRINTK("send cdb\n");
db024d53 3443 WARN_ON(qc->dev->cdb_len < 12);
c71c1857 3444
db024d53 3445 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
c71c1857
AL		 3446 ata_altstatus(ap); /* flush */
3447
3448 switch (qc->tf.protocol) {
3449 case ATA_PROT_ATAPI:
3450 ap->hsm_task_state = HSM_ST;
3451 break;
3452 case ATA_PROT_ATAPI_NODATA:
3453 ap->hsm_task_state = HSM_ST_LAST;
3454 break;
3455 case ATA_PROT_ATAPI_DMA:
3456 ap->hsm_task_state = HSM_ST_LAST;
3457 /* initiate bmdma */
3458 ap->ops->bmdma_start(qc);
3459 break;
3460 }
3461}
3462
3463/**
e27486db
AL		 3464 * ata_pio_first_block - Write first data block to hardware
3465 * @ap: Port to which ATA/ATAPI device is attached.
c71c1857
AL		 3466 *
3467 * When device has indicated its readiness to accept
3468 * the data, this function sends out the CDB or
3469 * the first data block by PIO.
3470 * After this,
3471 * - If polling, ata_pio_task() handles the rest.
3472 * - Otherwise, interrupt handler takes over.
3473 *
3474 * LOCKING:
3475 * Kernel thread context (may sleep)
fbcdd80b
AL		 3476 *
3477 * RETURNS:
3478 * Zero if irq handler takes over
3479 * Non-zero if has next (polling).
c71c1857
AL		 3480 */
3481
fbcdd80b 3482static int ata_pio_first_block(struct ata_port *ap)
c71c1857 3483{
c71c1857
AL		 3484 struct ata_queued_cmd *qc;
3485 u8 status;
3486 unsigned long flags;
fbcdd80b 3487 int has_next;
c71c1857
AL		 3488
3489 qc = ata_qc_from_tag(ap, ap->active_tag);
587005de
JG		 3490 WARN_ON(qc == NULL);
3491 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
c71c1857 3492
fbcdd80b
AL		 3493 /* if polling, we will stay in the work queue after sending the data.
3494 * otherwise, interrupt handler takes over after sending the data.
3495 */
3496 has_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3497
c71c1857
AL		 3498 /* sleep-wait for BSY to clear */
3499 DPRINTK("busy wait\n");
fbcdd80b 3500 if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) {
555a8965 3501 qc->err_mask |= AC_ERR_TIMEOUT;
fbcdd80b 3502 ap->hsm_task_state = HSM_ST_TMOUT;
c71c1857 3503 goto err_out;
fbcdd80b 3504 }
c71c1857
AL		 3505
3506 /* make sure DRQ is set */
3507 status = ata_chk_status(ap);
fbcdd80b
AL		 3508 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3509 /* device status error */
555a8965 3510 qc->err_mask |= AC_ERR_HSM;
fbcdd80b 3511 ap->hsm_task_state = HSM_ST_ERR;
c71c1857 3512 goto err_out;
fbcdd80b 3513 }
c71c1857
AL		 3514
3515 /* Send the CDB (atapi) or the first data block (ata pio out).
3516 * During the state transition, interrupt handler shouldn't
3517 * be invoked before the data transfer is complete and
3518 * hsm_task_state is changed. Hence, the following locking.
3519 */
3520 spin_lock_irqsave(&ap->host_set->lock, flags);
3521
3522 if (qc->tf.protocol == ATA_PROT_PIO) {
3523 /* PIO data out protocol.
3524 * send first data block.
3525 */
3526
07f6f7d0
AL		 3527 /* ata_pio_sectors() might change the state to HSM_ST_LAST.
3528 * so, the state is changed here before ata_pio_sectors().
c71c1857
AL		 3529 */
3530 ap->hsm_task_state = HSM_ST;
07f6f7d0 3531 ata_pio_sectors(qc);
c71c1857
AL		 3532 ata_altstatus(ap); /* flush */
3533 } else
3534 /* send CDB */
3535 atapi_send_cdb(ap, qc);
3536
fbcdd80b
AL		 3537 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3538
c71c1857
AL		 3539 /* if polling, ata_pio_task() handles the rest.
3540 * otherwise, interrupt handler takes over from here.
3541 */
fbcdd80b 3542 return has_next;
c71c1857
AL		 3543
3544err_out:
fbcdd80b 3545 return 1; /* has next */
c71c1857
AL		 3546}
3547
6ae4cfb5
AL		 3548/**
3549 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3550 * @qc: Command on going
3551 * @bytes: number of bytes
3552 *
3553 * Transfer Transfer data from/to the ATAPI device.
3554 *
3555 * LOCKING:
3556 * Inherited from caller.
3557 *
3558 */
3559
1da177e4
LT		 3560static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3561{
3562 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3563 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3564 struct ata_port *ap = qc->ap;
3565 struct page *page;
3566 unsigned char *buf;
3567 unsigned int offset, count;
3568
563a6e1f 3569 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3570 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3571
3572next_sg:
563a6e1f 3573 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3574 /*
563a6e1f
AL		 3575 * The end of qc->sg is reached and the device expects
3576 * more data to transfer. In order not to overrun qc->sg
3577 * and fulfill length specified in the byte count register,
3578 * - for read case, discard trailing data from the device
3579 * - for write case, padding zero data to the device
3580 */
3581 u16 pad_buf[1] = { 0 };
3582 unsigned int words = bytes >> 1;
3583 unsigned int i;
3584
3585 if (words) /* warning if bytes > 1 */
7fb6ec28 3586 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3587 ap->id, bytes);
3588
3589 for (i = 0; i < words; i++)
3590 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3591
14be71f4 3592 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3593 return;
3594 }
3595
cedc9a47 3596 sg = &qc->__sg[qc->cursg];
1da177e4 3597
1da177e4
LT		 3598 page = sg->page;
3599 offset = sg->offset + qc->cursg_ofs;
3600
3601 /* get the current page and offset */
3602 page = nth_page(page, (offset >> PAGE_SHIFT));
3603 offset %= PAGE_SIZE;
3604
6952df03 3605 /* don't overrun current sg */
32529e01 3606 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3607
3608 /* don't cross page boundaries */
3609 count = min(count, (unsigned int)PAGE_SIZE - offset);
3610
7282aa4b
AL		 3611 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3612
91b8b313
AL		 3613 if (PageHighMem(page)) {
3614 unsigned long flags;
3615
3616 local_irq_save(flags);
3617 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3618
91b8b313
AL		 3619 /* do the actual data transfer */
3620 ata_data_xfer(ap, buf + offset, count, do_write);
7282aa4b 3621
91b8b313
AL		 3622 kunmap_atomic(buf, KM_IRQ0);
3623 local_irq_restore(flags);
3624 } else {
3625 buf = page_address(page);
3626 ata_data_xfer(ap, buf + offset, count, do_write);
3627 }
7282aa4b 3628
1da177e4
LT		 3629 bytes -= count;
3630 qc->curbytes += count;
3631 qc->cursg_ofs += count;
3632
32529e01 3633 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3634 qc->cursg++;
3635 qc->cursg_ofs = 0;
3636 }
3637
563a6e1f 3638 if (bytes)
1da177e4 3639 goto next_sg;
1da177e4
LT		 3640}
3641
6ae4cfb5
AL		 3642/**
3643 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3644 * @qc: Command on going
3645 *
3646 * Transfer Transfer data from/to the ATAPI device.
3647 *
3648 * LOCKING:
3649 * Inherited from caller.
6ae4cfb5
AL		 3650 */
3651
1da177e4
LT		 3652static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3653{
3654 struct ata_port *ap = qc->ap;
3655 struct ata_device *dev = qc->dev;
3656 unsigned int ireason, bc_lo, bc_hi, bytes;
3657 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3658
3659 ap->ops->tf_read(ap, &qc->tf);
3660 ireason = qc->tf.nsect;
3661 bc_lo = qc->tf.lbam;
3662 bc_hi = qc->tf.lbah;
3663 bytes = (bc_hi << 8) | bc_lo;
3664
3665 /* shall be cleared to zero, indicating xfer of data */
3666 if (ireason & (1 << 0))
3667 goto err_out;
3668
3669 /* make sure transfer direction matches expected */
3670 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3671 if (do_write != i_write)
3672 goto err_out;
3673
312f7da2
AL		 3674 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3675
1da177e4
LT		 3676 __atapi_pio_bytes(qc, bytes);
3677
3678 return;
3679
3680err_out:
3681 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3682 ap->id, dev->devno);
11a56d24 3683 qc->err_mask |= AC_ERR_HSM;
14be71f4 3684 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3685}
3686
3687/**
6f0ef4fa
RD		 3688 * ata_pio_block - start PIO on a block
3689 * @ap: the target ata_port
1da177e4
LT		 3690 *
3691 * LOCKING:
0cba632b 3692 * None. (executing in kernel thread context)
1da177e4
LT		 3693 */
3694
3695static void ata_pio_block(struct ata_port *ap)
3696{
3697 struct ata_queued_cmd *qc;
3698 u8 status;
3699
3700 /*
6f0ef4fa 3701 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3702 * Sometimes when we enter, BSY will be cleared in
3703 * a chk-status or two. If not, the drive is probably seeking
3704 * or something. Snooze for a couple msecs, then
3705 * chk-status again. If still busy, fall back to
14be71f4 3706 * HSM_ST_POLL state.
1da177e4
LT		 3707 */
3708 status = ata_busy_wait(ap, ATA_BUSY, 5);
3709 if (status & ATA_BUSY) {
3710 msleep(2);
3711 status = ata_busy_wait(ap, ATA_BUSY, 10);
3712 if (status & ATA_BUSY) {
14be71f4 3713 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3714 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3715 return;
3716 }
3717 }
3718
3719 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3720 WARN_ON(qc == NULL);
1da177e4 3721
fe79e683
AL		 3722 /* check error */
3723 if (status & (ATA_ERR | ATA_DF)) {
3724 qc->err_mask |= AC_ERR_DEV;
3725 ap->hsm_task_state = HSM_ST_ERR;
3726 return;
3727 }
3728
3729 /* transfer data if any */
1da177e4 3730 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3731 /* DRQ=0 means no more data to transfer */
1da177e4 3732 if ((status & ATA_DRQ) == 0) {
14be71f4 3733 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3734 return;
3735 }
3736
3737 atapi_pio_bytes(qc);
3738 } else {
3739 /* handle BSY=0, DRQ=0 as error */
3740 if ((status & ATA_DRQ) == 0) {
11a56d24 3741 qc->err_mask |= AC_ERR_HSM;
14be71f4 3742 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3743 return;
3744 }
3745
07f6f7d0 3746 ata_pio_sectors(qc);
1da177e4 3747 }
467b16d4
AL		 3748
3749 ata_altstatus(ap); /* flush */
1da177e4
LT		 3750}
3751
3752static void ata_pio_error(struct ata_port *ap)
3753{
3754 struct ata_queued_cmd *qc;
a7dac447 3755
1da177e4 3756 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3757 WARN_ON(qc == NULL);
1da177e4 3758
000080c3
AL		 3759 if (qc->tf.command != ATA_CMD_PACKET)
3760 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3761
1c848984
AL		 3762 /* make sure qc->err_mask is available to
3763 * know what's wrong and recover
3764 */
a4631474 3765 WARN_ON(qc->err_mask == 0);
1c848984 3766
14be71f4 3767 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3768
a22e2eb0 3769 ata_poll_qc_complete(qc);
1da177e4
LT		 3770}
3771
3772static void ata_pio_task(void *_data)
3773{
3774 struct ata_port *ap = _data;
7fb6ec28 3775 unsigned long timeout;
fbcdd80b 3776 int has_next;
7fb6ec28
JG		 3777
3778fsm_start:
3779 timeout = 0;
fbcdd80b 3780 has_next = 1;
1da177e4 3781
14be71f4 3782 switch (ap->hsm_task_state) {
e27486db 3783 case HSM_ST_FIRST:
fbcdd80b
AL		 3784 has_next = ata_pio_first_block(ap);
3785 break;
e27486db 3786
14be71f4 3787 case HSM_ST:
1da177e4
LT		 3788 ata_pio_block(ap);
3789 break;
3790
14be71f4 3791 case HSM_ST_LAST:
fbcdd80b 3792 has_next = ata_pio_complete(ap);
1da177e4
LT		 3793 break;
3794
14be71f4
AL		 3795 case HSM_ST_POLL:
3796 case HSM_ST_LAST_POLL:
1da177e4
LT		 3797 timeout = ata_pio_poll(ap);
3798 break;
3799
14be71f4
AL		 3800 case HSM_ST_TMOUT:
3801 case HSM_ST_ERR:
1da177e4
LT		 3802 ata_pio_error(ap);
3803 return;
467b16d4
AL		 3804
3805 default:
3806 BUG();
3807 return;
1da177e4
LT		 3808 }
3809
3810 if (timeout)
8061f5f0 3811 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3812 else if (!qc_completed)
3813 goto fsm_start;
1da177e4
LT		 3814}
3815
8061f5f0
TH		 3816/**
3817 * atapi_packet_task - Write CDB bytes to hardware
3818 * @_data: Port to which ATAPI device is attached.
3819 *
3820 * When device has indicated its readiness to accept
3821 * a CDB, this function is called. Send the CDB.
3822 * If DMA is to be performed, exit immediately.
3823 * Otherwise, we are in polling mode, so poll
3824 * status under operation succeeds or fails.
3825 *
3826 * LOCKING:
3827 * Kernel thread context (may sleep)
3828 */
3829
3830static void atapi_packet_task(void *_data)
3831{
3832 struct ata_port *ap = _data;
3833 struct ata_queued_cmd *qc;
3834 u8 status;
3835
3836 qc = ata_qc_from_tag(ap, ap->active_tag);
3837 WARN_ON(qc == NULL);
3838 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3839
3840 /* sleep-wait for BSY to clear */
3841 DPRINTK("busy wait\n");
3842 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3843 qc->err_mask |= AC_ERR_TIMEOUT;
3844 goto err_out;
3845 }
3846
3847 /* make sure DRQ is set */
3848 status = ata_chk_status(ap);
3849 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3850 qc->err_mask |= AC_ERR_HSM;
3851 goto err_out;
3852 }
3853
3854 /* send SCSI cdb */
3855 DPRINTK("send cdb\n");
3856 WARN_ON(qc->dev->cdb_len < 12);
3857
3858 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3859 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3860 unsigned long flags;
3861
3862 /* Once we're done issuing command and kicking bmdma,
3863 * irq handler takes over. To not lose irq, we need
3864 * to clear NOINTR flag before sending cdb, but
3865 * interrupt handler shouldn't be invoked before we're
3866 * finished. Hence, the following locking.
3867 */
3868 spin_lock_irqsave(&ap->host_set->lock, flags);
3869 ap->flags &= ~ATA_FLAG_NOINTR;
3870 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3871 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3872 ap->ops->bmdma_start(qc); /* initiate bmdma */
3873 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3874 } else {
3875 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3876
3877 /* PIO commands are handled by polling */
3878 ap->hsm_task_state = HSM_ST;
3879 ata_port_queue_task(ap, ata_pio_task, ap, 0);
3880 }
3881
3882 return;
3883
3884err_out:
3885 ata_poll_qc_complete(qc);
3886}
3887
1da177e4
LT		 3888/**
3889 * ata_qc_timeout - Handle timeout of queued command
3890 * @qc: Command that timed out
3891 *
3892 * Some part of the kernel (currently, only the SCSI layer)
3893 * has noticed that the active command on port @ap has not
3894 * completed after a specified length of time. Handle this
3895 * condition by disabling DMA (if necessary) and completing
3896 * transactions, with error if necessary.
3897 *
3898 * This also handles the case of the "lost interrupt", where
3899 * for some reason (possibly hardware bug, possibly driver bug)
3900 * an interrupt was not delivered to the driver, even though the
3901 * transaction completed successfully.
3902 *
3903 * LOCKING:
0cba632b 3904 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3905 */
3906
3907static void ata_qc_timeout(struct ata_queued_cmd *qc)
3908{
3909 struct ata_port *ap = qc->ap;
b8f6153e 3910 struct ata_host_set *host_set = ap->host_set;
1da177e4 3911 u8 host_stat = 0, drv_stat;
b8f6153e 3912 unsigned long flags;
1da177e4
LT		 3913
3914 DPRINTK("ENTER\n");
3915
c18d06f8
TH		 3916 ap->hsm_task_state = HSM_ST_IDLE;
3917
b8f6153e
JG		 3918 spin_lock_irqsave(&host_set->lock, flags);
3919
1da177e4
LT		 3920 switch (qc->tf.protocol) {
3921
3922 case ATA_PROT_DMA:
3923 case ATA_PROT_ATAPI_DMA:
3924 host_stat = ap->ops->bmdma_status(ap);
3925
3926 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3927 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3928
3929 /* fall through */
3930
3931 default:
3932 ata_altstatus(ap);
3933 drv_stat = ata_chk_status(ap);
3934
3935 /* ack bmdma irq events */
3936 ap->ops->irq_clear(ap);
3937
3938 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3939 ap->id, qc->tf.command, drv_stat, host_stat);
3940
312f7da2
AL		 3941 ap->hsm_task_state = HSM_ST_IDLE;
3942
1da177e4 3943 /* complete taskfile transaction */
555a8965 3944 qc->err_mask |= AC_ERR_TIMEOUT;
1da177e4
LT		 3945 break;
3946 }
b8f6153e
JG		 3947
3948 spin_unlock_irqrestore(&host_set->lock, flags);
3949
a72ec4ce
TH		 3950 ata_eh_qc_complete(qc);
3951
1da177e4
LT		 3952 DPRINTK("EXIT\n");
3953}
3954
3955/**
3956 * ata_eng_timeout - Handle timeout of queued command
3957 * @ap: Port on which timed-out command is active
3958 *
3959 * Some part of the kernel (currently, only the SCSI layer)
3960 * has noticed that the active command on port @ap has not
3961 * completed after a specified length of time. Handle this
3962 * condition by disabling DMA (if necessary) and completing
3963 * transactions, with error if necessary.
3964 *
3965 * This also handles the case of the "lost interrupt", where
3966 * for some reason (possibly hardware bug, possibly driver bug)
3967 * an interrupt was not delivered to the driver, even though the
3968 * transaction completed successfully.
3969 *
3970 * LOCKING:
3971 * Inherited from SCSI layer (none, can sleep)
3972 */
3973
3974void ata_eng_timeout(struct ata_port *ap)
3975{
1da177e4
LT		 3976 DPRINTK("ENTER\n");
3977
f6379020 3978 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3979
1da177e4
LT		 3980 DPRINTK("EXIT\n");
3981}
3982
3983/**
3984 * ata_qc_new - Request an available ATA command, for queueing
3985 * @ap: Port associated with device @dev
3986 * @dev: Device from whom we request an available command structure
3987 *
3988 * LOCKING:
0cba632b 3989 * None.
1da177e4
LT		 3990 */
3991
3992static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3993{
3994 struct ata_queued_cmd *qc = NULL;
3995 unsigned int i;
3996
3997 for (i = 0; i < ATA_MAX_QUEUE; i++)
3998 if (!test_and_set_bit(i, &ap->qactive)) {
3999 qc = ata_qc_from_tag(ap, i);
4000 break;
4001 }
4002
4003 if (qc)
4004 qc->tag = i;
4005
4006 return qc;
4007}
4008
4009/**
4010 * ata_qc_new_init - Request an available ATA command, and initialize it
4011 * @ap: Port associated with device @dev
4012 * @dev: Device from whom we request an available command structure
4013 *
4014 * LOCKING:
0cba632b 4015 * None.
1da177e4
LT		 4016 */
4017
4018struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4019 struct ata_device *dev)
4020{
4021 struct ata_queued_cmd *qc;
4022
4023 qc = ata_qc_new(ap);
4024 if (qc) {
1da177e4
LT		 4025 qc->scsicmd = NULL;
4026 qc->ap = ap;
4027 qc->dev = dev;
1da177e4 4028
2c13b7ce 4029 ata_qc_reinit(qc);
1da177e4
LT		 4030 }
4031
4032 return qc;
4033}
4034
1da177e4
LT		 4035/**
4036 * ata_qc_free - free unused ata_queued_cmd
4037 * @qc: Command to complete
4038 *
4039 * Designed to free unused ata_queued_cmd object
4040 * in case something prevents using it.
4041 *
4042 * LOCKING:
0cba632b 4043 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4044 */
4045void ata_qc_free(struct ata_queued_cmd *qc)
4046{
4ba946e9
TH		 4047 struct ata_port *ap = qc->ap;
4048 unsigned int tag;
4049
a4631474 4050 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4051
4ba946e9
TH		 4052 qc->flags = 0;
4053 tag = qc->tag;
4054 if (likely(ata_tag_valid(tag))) {
4055 if (tag == ap->active_tag)
4056 ap->active_tag = ATA_TAG_POISON;
4057 qc->tag = ATA_TAG_POISON;
4058 clear_bit(tag, &ap->qactive);
4059 }
1da177e4
LT		 4060}
4061
76014427 4062void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4063{
a4631474
TH		 4064 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4065 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4066
4067 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4068 ata_sg_clean(qc);
4069
3f3791d3
AL		 4070 /* atapi: mark qc as inactive to prevent the interrupt handler
4071 * from completing the command twice later, before the error handler
4072 * is called. (when rc != 0 and atapi request sense is needed)
4073 */
4074 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4075
1da177e4 4076 /* call completion callback */
77853bf2 4077 qc->complete_fn(qc);
1da177e4
LT		 4078}
4079
4080static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4081{
4082 struct ata_port *ap = qc->ap;
4083
4084 switch (qc->tf.protocol) {
4085 case ATA_PROT_DMA:
4086 case ATA_PROT_ATAPI_DMA:
4087 return 1;
4088
4089 case ATA_PROT_ATAPI:
4090 case ATA_PROT_PIO:
4091 case ATA_PROT_PIO_MULT:
4092 if (ap->flags & ATA_FLAG_PIO_DMA)
4093 return 1;
4094
4095 /* fall through */
4096
4097 default:
4098 return 0;
4099 }
4100
4101 /* never reached */
4102}
4103
4104/**
4105 * ata_qc_issue - issue taskfile to device
4106 * @qc: command to issue to device
4107 *
4108 * Prepare an ATA command to submission to device.
4109 * This includes mapping the data into a DMA-able
4110 * area, filling in the S/G table, and finally
4111 * writing the taskfile to hardware, starting the command.
4112 *
4113 * LOCKING:
4114 * spin_lock_irqsave(host_set lock)
4115 *
4116 * RETURNS:
9a3d9eb0 4117 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4118 */
4119
9a3d9eb0 4120unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4121{
4122 struct ata_port *ap = qc->ap;
4123
4124 if (ata_should_dma_map(qc)) {
4125 if (qc->flags & ATA_QCFLAG_SG) {
4126 if (ata_sg_setup(qc))
8e436af9 4127 goto sg_err;
1da177e4
LT		 4128 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4129 if (ata_sg_setup_one(qc))
8e436af9 4130 goto sg_err;
1da177e4
LT		 4131 }
4132 } else {
4133 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4134 }
4135
4136 ap->ops->qc_prep(qc);
4137
4138 qc->ap->active_tag = qc->tag;
4139 qc->flags |= ATA_QCFLAG_ACTIVE;
4140
4141 return ap->ops->qc_issue(qc);
4142
8e436af9
TH		 4143sg_err:
4144 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 4145 return AC_ERR_SYSTEM;
1da177e4
LT		 4146}
4147
0baab86b 4148
1da177e4
LT		 4149/**
4150 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4151 * @qc: command to issue to device
4152 *
4153 * Using various libata functions and hooks, this function
4154 * starts an ATA command. ATA commands are grouped into
4155 * classes called "protocols", and issuing each type of protocol
4156 * is slightly different.
4157 *
0baab86b
EF		 4158 * May be used as the qc_issue() entry in ata_port_operations.
4159 *
1da177e4
LT		 4160 * LOCKING:
4161 * spin_lock_irqsave(host_set lock)
4162 *
4163 * RETURNS:
9a3d9eb0 4164 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4165 */
4166
9a3d9eb0 4167unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4168{
4169 struct ata_port *ap = qc->ap;
4170
e50362ec
AL		 4171 /* Use polling pio if the LLD doesn't handle
4172 * interrupt driven pio and atapi CDB interrupt.
4173 */
4174 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4175 switch (qc->tf.protocol) {
4176 case ATA_PROT_PIO:
4177 case ATA_PROT_ATAPI:
4178 case ATA_PROT_ATAPI_NODATA:
4179 qc->tf.flags |= ATA_TFLAG_POLLING;
4180 break;
4181 case ATA_PROT_ATAPI_DMA:
4182 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4183 BUG();
4184 break;
4185 default:
4186 break;
4187 }
4188 }
4189
312f7da2 4190 /* select the device */
1da177e4
LT		 4191 ata_dev_select(ap, qc->dev->devno, 1, 0);
4192
312f7da2 4193 /* start the command */
1da177e4
LT		 4194 switch (qc->tf.protocol) {
4195 case ATA_PROT_NODATA:
312f7da2
AL		 4196 if (qc->tf.flags & ATA_TFLAG_POLLING)
4197 ata_qc_set_polling(qc);
4198
e5338254 4199 ata_tf_to_host(ap, &qc->tf);
312f7da2
AL		 4200 ap->hsm_task_state = HSM_ST_LAST;
4201
4202 if (qc->tf.flags & ATA_TFLAG_POLLING)
20ea079e 4203 ata_queue_pio_task(ap);
312f7da2 4204
1da177e4
LT		 4205 break;
4206
4207 case ATA_PROT_DMA:
587005de 4208 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 4209
1da177e4
LT		 4210 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4211 ap->ops->bmdma_setup(qc); /* set up bmdma */
4212 ap->ops->bmdma_start(qc); /* initiate bmdma */
312f7da2 4213 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 4214 break;
4215
312f7da2
AL		 4216 case ATA_PROT_PIO:
4217 if (qc->tf.flags & ATA_TFLAG_POLLING)
4218 ata_qc_set_polling(qc);
4219
e5338254 4220 ata_tf_to_host(ap, &qc->tf);
312f7da2 4221
54f00389
AL		 4222 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4223 /* PIO data out protocol */
4224 ap->hsm_task_state = HSM_ST_FIRST;
ce1e7a2a 4225 ata_port_queue_task(ap, ata_pio_task, ap, 0);
54f00389
AL		 4226
4227 /* always send first data block using
e27486db 4228 * the ata_pio_task() codepath.
54f00389 4229 */
312f7da2 4230 } else {
54f00389
AL		 4231 /* PIO data in protocol */
4232 ap->hsm_task_state = HSM_ST;
4233
4234 if (qc->tf.flags & ATA_TFLAG_POLLING)
ce1e7a2a 4235 ata_port_queue_task(ap, ata_pio_task, ap, 0);
54f00389
AL		 4236
4237 /* if polling, ata_pio_task() handles the rest.
4238 * otherwise, interrupt handler takes over from here.
4239 */
312f7da2
AL		 4240 }
4241
1da177e4
LT		 4242 break;
4243
4244 case ATA_PROT_ATAPI:
1da177e4 4245 case ATA_PROT_ATAPI_NODATA:
312f7da2
AL		 4246 if (qc->tf.flags & ATA_TFLAG_POLLING)
4247 ata_qc_set_polling(qc);
4248
e5338254 4249 ata_tf_to_host(ap, &qc->tf);
f6ef65e6 4250
312f7da2
AL		 4251 ap->hsm_task_state = HSM_ST_FIRST;
4252
4253 /* send cdb by polling if no cdb interrupt */
4254 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4255 (qc->tf.flags & ATA_TFLAG_POLLING))
ce1e7a2a 4256 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4257 break;
4258
4259 case ATA_PROT_ATAPI_DMA:
587005de 4260 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 4261
1da177e4
LT		 4262 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4263 ap->ops->bmdma_setup(qc); /* set up bmdma */
312f7da2
AL		 4264 ap->hsm_task_state = HSM_ST_FIRST;
4265
4266 /* send cdb by polling if no cdb interrupt */
4267 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
ce1e7a2a 4268 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4269 break;
4270
4271 default:
4272 WARN_ON(1);
9a3d9eb0 4273 return AC_ERR_SYSTEM;
1da177e4
LT		 4274 }
4275
4276 return 0;
4277}
4278
4279/**
0baab86b 4280 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 4281 * @qc: Info associated with this ATA transaction.
4282 *
4283 * LOCKING:
4284 * spin_lock_irqsave(host_set lock)
4285 */
4286
4287static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
4288{
4289 struct ata_port *ap = qc->ap;
4290 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4291 u8 dmactl;
4292 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4293
4294 /* load PRD table addr. */
4295 mb(); /* make sure PRD table writes are visible to controller */
4296 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
4297
4298 /* specify data direction, triple-check start bit is clear */
4299 dmactl = readb(mmio + ATA_DMA_CMD);
4300 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4301 if (!rw)
4302 dmactl |= ATA_DMA_WR;
4303 writeb(dmactl, mmio + ATA_DMA_CMD);
4304
4305 /* issue r/w command */
4306 ap->ops->exec_command(ap, &qc->tf);
4307}
4308
4309/**
b73fc89f 4310 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 4311 * @qc: Info associated with this ATA transaction.
4312 *
4313 * LOCKING:
4314 * spin_lock_irqsave(host_set lock)
4315 */
4316
4317static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4318{
4319 struct ata_port *ap = qc->ap;
4320 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4321 u8 dmactl;
4322
4323 /* start host DMA transaction */
4324 dmactl = readb(mmio + ATA_DMA_CMD);
4325 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4326
4327 /* Strictly, one may wish to issue a readb() here, to
4328 * flush the mmio write. However, control also passes
4329 * to the hardware at this point, and it will interrupt
4330 * us when we are to resume control. So, in effect,
4331 * we don't care when the mmio write flushes.
4332 * Further, a read of the DMA status register _immediately_
4333 * following the write may not be what certain flaky hardware
4334 * is expected, so I think it is best to not add a readb()
4335 * without first all the MMIO ATA cards/mobos.
4336 * Or maybe I'm just being paranoid.
4337 */
4338}
4339
4340/**
4341 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4342 * @qc: Info associated with this ATA transaction.
4343 *
4344 * LOCKING:
4345 * spin_lock_irqsave(host_set lock)
4346 */
4347
4348static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4349{
4350 struct ata_port *ap = qc->ap;
4351 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4352 u8 dmactl;
4353
4354 /* load PRD table addr. */
4355 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4356
4357 /* specify data direction, triple-check start bit is clear */
4358 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4359 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4360 if (!rw)
4361 dmactl |= ATA_DMA_WR;
4362 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4363
4364 /* issue r/w command */
4365 ap->ops->exec_command(ap, &qc->tf);
4366}
4367
4368/**
4369 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4370 * @qc: Info associated with this ATA transaction.
4371 *
4372 * LOCKING:
4373 * spin_lock_irqsave(host_set lock)
4374 */
4375
4376static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4377{
4378 struct ata_port *ap = qc->ap;
4379 u8 dmactl;
4380
4381 /* start host DMA transaction */
4382 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4383 outb(dmactl | ATA_DMA_START,
4384 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4385}
4386
0baab86b
EF		 4387
4388/**
4389 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4390 * @qc: Info associated with this ATA transaction.
4391 *
4392 * Writes the ATA_DMA_START flag to the DMA command register.
4393 *
4394 * May be used as the bmdma_start() entry in ata_port_operations.
4395 *
4396 * LOCKING:
4397 * spin_lock_irqsave(host_set lock)
4398 */
1da177e4
LT		 4399void ata_bmdma_start(struct ata_queued_cmd *qc)
4400{
4401 if (qc->ap->flags & ATA_FLAG_MMIO)
4402 ata_bmdma_start_mmio(qc);
4403 else
4404 ata_bmdma_start_pio(qc);
4405}
4406
0baab86b
EF		 4407
4408/**
4409 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4410 * @qc: Info associated with this ATA transaction.
4411 *
4412 * Writes address of PRD table to device's PRD Table Address
4413 * register, sets the DMA control register, and calls
4414 * ops->exec_command() to start the transfer.
4415 *
4416 * May be used as the bmdma_setup() entry in ata_port_operations.
4417 *
4418 * LOCKING:
4419 * spin_lock_irqsave(host_set lock)
4420 */
1da177e4
LT		 4421void ata_bmdma_setup(struct ata_queued_cmd *qc)
4422{
4423 if (qc->ap->flags & ATA_FLAG_MMIO)
4424 ata_bmdma_setup_mmio(qc);
4425 else
4426 ata_bmdma_setup_pio(qc);
4427}
4428
0baab86b
EF		 4429
4430/**
4431 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 4432 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4433 *
4434 * Clear interrupt and error flags in DMA status register.
4435 *
4436 * May be used as the irq_clear() entry in ata_port_operations.
4437 *
4438 * LOCKING:
4439 * spin_lock_irqsave(host_set lock)
4440 */
4441
1da177e4
LT		 4442void ata_bmdma_irq_clear(struct ata_port *ap)
4443{
4444 if (ap->flags & ATA_FLAG_MMIO) {
4445 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4446 writeb(readb(mmio), mmio);
4447 } else {
4448 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4449 outb(inb(addr), addr);
4450 }
4451
4452}
4453
0baab86b
EF		 4454
4455/**
4456 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 4457 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4458 *
4459 * Read and return BMDMA status register.
4460 *
4461 * May be used as the bmdma_status() entry in ata_port_operations.
4462 *
4463 * LOCKING:
4464 * spin_lock_irqsave(host_set lock)
4465 */
4466
1da177e4
LT		 4467u8 ata_bmdma_status(struct ata_port *ap)
4468{
4469 u8 host_stat;
4470 if (ap->flags & ATA_FLAG_MMIO) {
4471 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4472 host_stat = readb(mmio + ATA_DMA_STATUS);
4473 } else
ee500aab 4474 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 4475 return host_stat;
4476}
4477
0baab86b
EF		 4478
4479/**
4480 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4481 * @qc: Command we are ending DMA for
0baab86b
EF		 4482 *
4483 * Clears the ATA_DMA_START flag in the dma control register
4484 *
4485 * May be used as the bmdma_stop() entry in ata_port_operations.
4486 *
4487 * LOCKING:
4488 * spin_lock_irqsave(host_set lock)
4489 */
4490
b73fc89f 4491void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4492{
b73fc89f 4493 struct ata_port *ap = qc->ap;
1da177e4
LT		 4494 if (ap->flags & ATA_FLAG_MMIO) {
4495 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4496
4497 /* clear start/stop bit */
4498 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4499 mmio + ATA_DMA_CMD);
4500 } else {
4501 /* clear start/stop bit */
4502 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4503 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4504 }
4505
4506 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4507 ata_altstatus(ap); /* dummy read */
4508}
4509
4510/**
4511 * ata_host_intr - Handle host interrupt for given (port, task)
4512 * @ap: Port on which interrupt arrived (possibly...)
4513 * @qc: Taskfile currently active in engine
4514 *
4515 * Handle host interrupt for given queued command. Currently,
4516 * only DMA interrupts are handled. All other commands are
4517 * handled via polling with interrupts disabled (nIEN bit).
4518 *
4519 * LOCKING:
4520 * spin_lock_irqsave(host_set lock)
4521 *
4522 * RETURNS:
4523 * One if interrupt was handled, zero if not (shared irq).
4524 */
4525
4526inline unsigned int ata_host_intr (struct ata_port *ap,
4527 struct ata_queued_cmd *qc)
4528{
312f7da2 4529 u8 status, host_stat = 0;
1da177e4 4530
312f7da2
AL		 4531 VPRINTK("ata%u: protocol %d task_state %d\n",
4532 ap->id, qc->tf.protocol, ap->hsm_task_state);
1da177e4 4533
312f7da2
AL		 4534 /* Check whether we are expecting interrupt in this state */
4535 switch (ap->hsm_task_state) {
4536 case HSM_ST_FIRST:
4537 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4538 * The flag was turned on only for atapi devices.
4539 * No need to check is_atapi_taskfile(&qc->tf) again.
4540 */
4541 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1da177e4 4542 goto idle_irq;
312f7da2
AL		 4543 break;
4544 case HSM_ST_LAST:
4545 if (qc->tf.protocol == ATA_PROT_DMA ||
4546 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4547 /* check status of DMA engine */
4548 host_stat = ap->ops->bmdma_status(ap);
4549 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4550
4551 /* if it's not our irq... */
4552 if (!(host_stat & ATA_DMA_INTR))
4553 goto idle_irq;
4554
4555 /* before we do anything else, clear DMA-Start bit */
4556 ap->ops->bmdma_stop(qc);
a4f16610
AL		 4557
4558 if (unlikely(host_stat & ATA_DMA_ERR)) {
4559 /* error when transfering data to/from memory */
4560 qc->err_mask |= AC_ERR_HOST_BUS;
4561 ap->hsm_task_state = HSM_ST_ERR;
4562 }
312f7da2
AL		 4563 }
4564 break;
4565 case HSM_ST:
4566 break;
4567 default:
4568 goto idle_irq;
4569 }
1da177e4 4570
312f7da2
AL		 4571 /* check altstatus */
4572 status = ata_altstatus(ap);
4573 if (status & ATA_BUSY)
4574 goto idle_irq;
1da177e4 4575
312f7da2
AL		 4576 /* check main status, clearing INTRQ */
4577 status = ata_chk_status(ap);
4578 if (unlikely(status & ATA_BUSY))
4579 goto idle_irq;
1da177e4 4580
312f7da2
AL		 4581 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4582 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
1da177e4 4583
312f7da2
AL		 4584 /* ack bmdma irq events */
4585 ap->ops->irq_clear(ap);
1da177e4 4586
312f7da2 4587 /* check error */
a4f16610
AL		 4588 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4589 qc->err_mask |= AC_ERR_DEV;
312f7da2 4590 ap->hsm_task_state = HSM_ST_ERR;
a4f16610 4591 }
312f7da2
AL		 4592
4593fsm_start:
4594 switch (ap->hsm_task_state) {
4595 case HSM_ST_FIRST:
4596 /* Some pre-ATAPI-4 devices assert INTRQ
4597 * at this state when ready to receive CDB.
4598 */
4599
4600 /* check device status */
4601 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
4602 /* Wrong status. Let EH handle this */
555a8965 4603 qc->err_mask |= AC_ERR_HSM;
312f7da2
AL		 4604 ap->hsm_task_state = HSM_ST_ERR;
4605 goto fsm_start;
4606 }
4607
4608 atapi_send_cdb(ap, qc);
4609
4610 break;
4611
4612 case HSM_ST:
4613 /* complete command or read/write the data register */
4614 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4615 /* ATAPI PIO protocol */
4616 if ((status & ATA_DRQ) == 0) {
4617 /* no more data to transfer */
4618 ap->hsm_task_state = HSM_ST_LAST;
4619 goto fsm_start;
4620 }
4621
4622 atapi_pio_bytes(qc);
4623
4624 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4625 /* bad ireason reported by device */
4626 goto fsm_start;
4627
4628 } else {
4629 /* ATA PIO protocol */
4630 if (unlikely((status & ATA_DRQ) == 0)) {
4631 /* handle BSY=0, DRQ=0 as error */
555a8965 4632 qc->err_mask |= AC_ERR_HSM;
312f7da2
AL		 4633 ap->hsm_task_state = HSM_ST_ERR;
4634 goto fsm_start;
4635 }
4636
07f6f7d0 4637 ata_pio_sectors(qc);
312f7da2
AL		 4638
4639 if (ap->hsm_task_state == HSM_ST_LAST &&
4640 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4641 /* all data read */
4642 ata_altstatus(ap);
4643 status = ata_chk_status(ap);
4644 goto fsm_start;
4645 }
4646 }
4647
4648 ata_altstatus(ap); /* flush */
4649 break;
4650
4651 case HSM_ST_LAST:
4652 if (unlikely(status & ATA_DRQ)) {
4653 /* handle DRQ=1 as error */
555a8965 4654 qc->err_mask |= AC_ERR_HSM;
312f7da2
AL		 4655 ap->hsm_task_state = HSM_ST_ERR;
4656 goto fsm_start;
4657 }
4658
4659 /* no more data to transfer */
4660 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
4661 ap->id, status);
4662
4663 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4
LT		 4664
4665 /* complete taskfile transaction */
a22e2eb0
AL		 4666 qc->err_mask |= ac_err_mask(status);
4667 ata_qc_complete(qc);
1da177e4
LT		 4668 break;
4669
312f7da2 4670 case HSM_ST_ERR:
000080c3
AL		 4671 if (qc->tf.command != ATA_CMD_PACKET)
4672 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x host_stat 0x%x\n",
4673 ap->id, status, host_stat);
312f7da2 4674
a4f16610
AL		 4675 /* make sure qc->err_mask is available to
4676 * know what's wrong and recover
4677 */
587005de 4678 WARN_ON(qc->err_mask == 0);
a4f16610 4679
312f7da2 4680 ap->hsm_task_state = HSM_ST_IDLE;
278efe95 4681 ata_qc_complete(qc);
312f7da2 4682 break;
1da177e4
LT		 4683 default:
4684 goto idle_irq;
4685 }
4686
4687 return 1; /* irq handled */
4688
4689idle_irq:
4690 ap->stats.idle_irq++;
4691
4692#ifdef ATA_IRQ_TRAP
4693 if ((ap->stats.idle_irq % 1000) == 0) {
4694 handled = 1;
4695 ata_irq_ack(ap, 0); /* debug trap */
4696 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4697 }
4698#endif
4699 return 0; /* irq not handled */
4700}
4701
4702/**
4703 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4704 * @irq: irq line (unused)
4705 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4706 * @regs: unused
4707 *
0cba632b
JG		 4708 * Default interrupt handler for PCI IDE devices. Calls
4709 * ata_host_intr() for each port that is not disabled.
4710 *
1da177e4 4711 * LOCKING:
0cba632b 4712 * Obtains host_set lock during operation.
1da177e4
LT		 4713 *
4714 * RETURNS:
0cba632b 4715 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4716 */
4717
4718irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4719{
4720 struct ata_host_set *host_set = dev_instance;
4721 unsigned int i;
4722 unsigned int handled = 0;
4723 unsigned long flags;
4724
4725 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4726 spin_lock_irqsave(&host_set->lock, flags);
4727
4728 for (i = 0; i < host_set->n_ports; i++) {
4729 struct ata_port *ap;
4730
4731 ap = host_set->ports[i];
c1389503 4732 if (ap &&
312f7da2 4733 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
1da177e4
LT		 4734 struct ata_queued_cmd *qc;
4735
4736 qc = ata_qc_from_tag(ap, ap->active_tag);
312f7da2 4737 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
21b1ed74 4738 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4739 handled |= ata_host_intr(ap, qc);
4740 }
4741 }
4742
4743 spin_unlock_irqrestore(&host_set->lock, flags);
4744
4745 return IRQ_RETVAL(handled);
4746}
4747
0baab86b 4748
9b847548
JA		 4749/*
4750 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4751 * without filling any other registers
4752 */
4753static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4754 u8 cmd)
4755{
4756 struct ata_taskfile tf;
4757 int err;
4758
4759 ata_tf_init(ap, &tf, dev->devno);
4760
4761 tf.command = cmd;
4762 tf.flags |= ATA_TFLAG_DEVICE;
4763 tf.protocol = ATA_PROT_NODATA;
4764
4765 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4766 if (err)
4767 printk(KERN_ERR "%s: ata command failed: %d\n",
4768 __FUNCTION__, err);
4769
4770 return err;
4771}
4772
4773static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4774{
4775 u8 cmd;
4776
4777 if (!ata_try_flush_cache(dev))
4778 return 0;
4779
4780 if (ata_id_has_flush_ext(dev->id))
4781 cmd = ATA_CMD_FLUSH_EXT;
4782 else
4783 cmd = ATA_CMD_FLUSH;
4784
4785 return ata_do_simple_cmd(ap, dev, cmd);
4786}
4787
4788static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4789{
4790 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4791}
4792
4793static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4794{
4795 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4796}
4797
4798/**
4799 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4800 * @ap: port the device is connected to
4801 * @dev: the device to resume
9b847548
JA		 4802 *
4803 * Kick the drive back into action, by sending it an idle immediate
4804 * command and making sure its transfer mode matches between drive
4805 * and host.
4806 *
4807 */
4808int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4809{
4810 if (ap->flags & ATA_FLAG_SUSPENDED) {
4811 ap->flags &= ~ATA_FLAG_SUSPENDED;
4812 ata_set_mode(ap);
4813 }
4814 if (!ata_dev_present(dev))
4815 return 0;
4816 if (dev->class == ATA_DEV_ATA)
4817 ata_start_drive(ap, dev);
4818
4819 return 0;
4820}
4821
4822/**
4823 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4824 * @ap: port the device is connected to
4825 * @dev: the device to suspend
9b847548
JA		 4826 *
4827 * Flush the cache on the drive, if appropriate, then issue a
4828 * standbynow command.
9b847548
JA		 4829 */
4830int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4831{
4832 if (!ata_dev_present(dev))
4833 return 0;
4834 if (dev->class == ATA_DEV_ATA)
4835 ata_flush_cache(ap, dev);
4836
4837 ata_standby_drive(ap, dev);
4838 ap->flags |= ATA_FLAG_SUSPENDED;
4839 return 0;
4840}
4841
332b5a52
AL		 4842/**
4843 * ata_port_start - Set port up for dma.
4844 * @ap: Port to initialize
4845 *
4846 * Called just after data structures for each port are
4847 * initialized. Allocates space for PRD table.
4848 *
4849 * May be used as the port_start() entry in ata_port_operations.
4850 *
4851 * LOCKING:
4852 * Inherited from caller.
4853 */
4854
1da177e4
LT		 4855int ata_port_start (struct ata_port *ap)
4856{
4857 struct device *dev = ap->host_set->dev;
6037d6bb 4858 int rc;
1da177e4
LT		 4859
4860 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4861 if (!ap->prd)
4862 return -ENOMEM;
4863
6037d6bb
JG		 4864 rc = ata_pad_alloc(ap, dev);
4865 if (rc) {
cedc9a47 4866 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4867 return rc;
cedc9a47
JG		 4868 }
4869
1da177e4
LT		 4870 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4871
4872 return 0;
4873}
4874
0baab86b
EF		 4875
4876/**
4877 * ata_port_stop - Undo ata_port_start()
4878 * @ap: Port to shut down
4879 *
4880 * Frees the PRD table.
4881 *
4882 * May be used as the port_stop() entry in ata_port_operations.
4883 *
4884 * LOCKING:
6f0ef4fa 4885 * Inherited from caller.
0baab86b
EF		 4886 */
4887
1da177e4
LT		 4888void ata_port_stop (struct ata_port *ap)
4889{
4890 struct device *dev = ap->host_set->dev;
4891
4892 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4893 ata_pad_free(ap, dev);
1da177e4
LT		 4894}
4895
aa8f0dc6
JG		 4896void ata_host_stop (struct ata_host_set *host_set)
4897{
4898 if (host_set->mmio_base)
4899 iounmap(host_set->mmio_base);
4900}
4901
4902
1da177e4
LT		 4903/**
4904 * ata_host_remove - Unregister SCSI host structure with upper layers
4905 * @ap: Port to unregister
4906 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4907 *
4908 * LOCKING:
6f0ef4fa 4909 * Inherited from caller.
1da177e4
LT		 4910 */
4911
4912static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4913{
4914 struct Scsi_Host *sh = ap->host;
4915
4916 DPRINTK("ENTER\n");
4917
4918 if (do_unregister)
4919 scsi_remove_host(sh);
4920
4921 ap->ops->port_stop(ap);
4922}
4923
4924/**
4925 * ata_host_init - Initialize an ata_port structure
4926 * @ap: Structure to initialize
4927 * @host: associated SCSI mid-layer structure
4928 * @host_set: Collection of hosts to which @ap belongs
4929 * @ent: Probe information provided by low-level driver
4930 * @port_no: Port number associated with this ata_port
4931 *
0cba632b
JG		 4932 * Initialize a new ata_port structure, and its associated
4933 * scsi_host.
4934 *
1da177e4 4935 * LOCKING:
0cba632b 4936 * Inherited from caller.
1da177e4
LT		 4937 */
4938
4939static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4940 struct ata_host_set *host_set,
057ace5e 4941 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4942{
4943 unsigned int i;
4944
4945 host->max_id = 16;
4946 host->max_lun = 1;
4947 host->max_channel = 1;
4948 host->unique_id = ata_unique_id++;
4949 host->max_cmd_len = 12;
12413197 4950
1da177e4
LT		 4951 ap->flags = ATA_FLAG_PORT_DISABLED;
4952 ap->id = host->unique_id;
4953 ap->host = host;
4954 ap->ctl = ATA_DEVCTL_OBS;
4955 ap->host_set = host_set;
4956 ap->port_no = port_no;
4957 ap->hard_port_no =
4958 ent->legacy_mode ? ent->hard_port_no : port_no;
4959 ap->pio_mask = ent->pio_mask;
4960 ap->mwdma_mask = ent->mwdma_mask;
4961 ap->udma_mask = ent->udma_mask;
4962 ap->flags |= ent->host_flags;
4963 ap->ops = ent->port_ops;
4964 ap->cbl = ATA_CBL_NONE;
4965 ap->active_tag = ATA_TAG_POISON;
4966 ap->last_ctl = 0xFF;
4967
86e45b6b 4968 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4969 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4970
4971 for (i = 0; i < ATA_MAX_DEVICES; i++)
4972 ap->device[i].devno = i;
4973
4974#ifdef ATA_IRQ_TRAP
4975 ap->stats.unhandled_irq = 1;
4976 ap->stats.idle_irq = 1;
4977#endif
4978
4979 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4980}
4981
4982/**
4983 * ata_host_add - Attach low-level ATA driver to system
4984 * @ent: Information provided by low-level driver
4985 * @host_set: Collections of ports to which we add
4986 * @port_no: Port number associated with this host
4987 *
0cba632b
JG		 4988 * Attach low-level ATA driver to system.
4989 *
1da177e4 4990 * LOCKING:
0cba632b 4991 * PCI/etc. bus probe sem.
1da177e4
LT		 4992 *
4993 * RETURNS:
0cba632b 4994 * New ata_port on success, for NULL on error.
1da177e4
LT		 4995 */
4996
057ace5e 4997static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4998 struct ata_host_set *host_set,
4999 unsigned int port_no)
5000{
5001 struct Scsi_Host *host;
5002 struct ata_port *ap;
5003 int rc;
5004
5005 DPRINTK("ENTER\n");
5006 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5007 if (!host)
5008 return NULL;
5009
5010 ap = (struct ata_port *) &host->hostdata[0];
5011
5012 ata_host_init(ap, host, host_set, ent, port_no);
5013
5014 rc = ap->ops->port_start(ap);
5015 if (rc)
5016 goto err_out;
5017
5018 return ap;
5019
5020err_out:
5021 scsi_host_put(host);
5022 return NULL;
5023}
5024
5025/**
0cba632b
JG		 5026 * ata_device_add - Register hardware device with ATA and SCSI layers
5027 * @ent: Probe information describing hardware device to be registered
5028 *
5029 * This function processes the information provided in the probe
5030 * information struct @ent, allocates the necessary ATA and SCSI
5031 * host information structures, initializes them, and registers
5032 * everything with requisite kernel subsystems.
5033 *
5034 * This function requests irqs, probes the ATA bus, and probes
5035 * the SCSI bus.
1da177e4
LT		 5036 *
5037 * LOCKING:
0cba632b 5038 * PCI/etc. bus probe sem.
1da177e4
LT		 5039 *
5040 * RETURNS:
0cba632b 5041 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 5042 */
5043
057ace5e 5044int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 5045{
5046 unsigned int count = 0, i;
5047 struct device *dev = ent->dev;
5048 struct ata_host_set *host_set;
5049
5050 DPRINTK("ENTER\n");
5051 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 5052 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 5053 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5054 if (!host_set)
5055 return 0;
1da177e4
LT		 5056 spin_lock_init(&host_set->lock);
5057
5058 host_set->dev = dev;
5059 host_set->n_ports = ent->n_ports;
5060 host_set->irq = ent->irq;
5061 host_set->mmio_base = ent->mmio_base;
5062 host_set->private_data = ent->private_data;
5063 host_set->ops = ent->port_ops;
5064
5065 /* register each port bound to this device */
5066 for (i = 0; i < ent->n_ports; i++) {
5067 struct ata_port *ap;
5068 unsigned long xfer_mode_mask;
5069
5070 ap = ata_host_add(ent, host_set, i);
5071 if (!ap)
5072 goto err_out;
5073
5074 host_set->ports[i] = ap;
5075 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5076 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5077 (ap->pio_mask << ATA_SHIFT_PIO);
5078
5079 /* print per-port info to dmesg */
5080 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
5081 "bmdma 0x%lX irq %lu\n",
5082 ap->id,
5083 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5084 ata_mode_string(xfer_mode_mask),
5085 ap->ioaddr.cmd_addr,
5086 ap->ioaddr.ctl_addr,
5087 ap->ioaddr.bmdma_addr,
5088 ent->irq);
5089
5090 ata_chk_status(ap);
5091 host_set->ops->irq_clear(ap);
5092 count++;
5093 }
5094
57f3bda8
RD		 5095 if (!count)
5096 goto err_free_ret;
1da177e4
LT		 5097
5098 /* obtain irq, that is shared between channels */
5099 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5100 DRV_NAME, host_set))
5101 goto err_out;
5102
5103 /* perform each probe synchronously */
5104 DPRINTK("probe begin\n");
5105 for (i = 0; i < count; i++) {
5106 struct ata_port *ap;
5107 int rc;
5108
5109 ap = host_set->ports[i];
5110
c893a3ae 5111 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 5112 rc = ata_bus_probe(ap);
c893a3ae 5113 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 5114
5115 if (rc) {
5116 /* FIXME: do something useful here?
5117 * Current libata behavior will
5118 * tear down everything when
5119 * the module is removed
5120 * or the h/w is unplugged.
5121 */
5122 }
5123
5124 rc = scsi_add_host(ap->host, dev);
5125 if (rc) {
5126 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
5127 ap->id);
5128 /* FIXME: do something useful here */
5129 /* FIXME: handle unconditional calls to
5130 * scsi_scan_host and ata_host_remove, below,
5131 * at the very least
5132 */
5133 }
5134 }
5135
5136 /* probes are done, now scan each port's disk(s) */
c893a3ae 5137 DPRINTK("host probe begin\n");
1da177e4
LT		 5138 for (i = 0; i < count; i++) {
5139 struct ata_port *ap = host_set->ports[i];
5140
644dd0cc 5141 ata_scsi_scan_host(ap);
1da177e4
LT		 5142 }
5143
5144 dev_set_drvdata(dev, host_set);
5145
5146 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5147 return ent->n_ports; /* success */
5148
5149err_out:
5150 for (i = 0; i < count; i++) {
5151 ata_host_remove(host_set->ports[i], 1);
5152 scsi_host_put(host_set->ports[i]->host);
5153 }
57f3bda8 5154err_free_ret:
1da177e4
LT		 5155 kfree(host_set);
5156 VPRINTK("EXIT, returning 0\n");
5157 return 0;
5158}
5159
17b14451
AC		 5160/**
5161 * ata_host_set_remove - PCI layer callback for device removal
5162 * @host_set: ATA host set that was removed
5163 *
5164 * Unregister all objects associated with this host set. Free those
5165 * objects.
5166 *
5167 * LOCKING:
5168 * Inherited from calling layer (may sleep).
5169 */
5170
17b14451
AC		 5171void ata_host_set_remove(struct ata_host_set *host_set)
5172{
5173 struct ata_port *ap;
5174 unsigned int i;
5175
5176 for (i = 0; i < host_set->n_ports; i++) {
5177 ap = host_set->ports[i];
5178 scsi_remove_host(ap->host);
5179 }
5180
5181 free_irq(host_set->irq, host_set);
5182
5183 for (i = 0; i < host_set->n_ports; i++) {
5184 ap = host_set->ports[i];
5185
5186 ata_scsi_release(ap->host);
5187
5188 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5189 struct ata_ioports *ioaddr = &ap->ioaddr;
5190
5191 if (ioaddr->cmd_addr == 0x1f0)
5192 release_region(0x1f0, 8);
5193 else if (ioaddr->cmd_addr == 0x170)
5194 release_region(0x170, 8);
5195 }
5196
5197 scsi_host_put(ap->host);
5198 }
5199
5200 if (host_set->ops->host_stop)
5201 host_set->ops->host_stop(host_set);
5202
5203 kfree(host_set);
5204}
5205
1da177e4
LT		 5206/**
5207 * ata_scsi_release - SCSI layer callback hook for host unload
5208 * @host: libata host to be unloaded
5209 *
5210 * Performs all duties necessary to shut down a libata port...
5211 * Kill port kthread, disable port, and release resources.
5212 *
5213 * LOCKING:
5214 * Inherited from SCSI layer.
5215 *
5216 * RETURNS:
5217 * One.
5218 */
5219
5220int ata_scsi_release(struct Scsi_Host *host)
5221{
5222 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 5223 int i;
1da177e4
LT		 5224
5225 DPRINTK("ENTER\n");
5226
5227 ap->ops->port_disable(ap);
5228 ata_host_remove(ap, 0);
d9572b1d
TH		 5229 for (i = 0; i < ATA_MAX_DEVICES; i++)
5230 kfree(ap->device[i].id);
1da177e4
LT		 5231
5232 DPRINTK("EXIT\n");
5233 return 1;
5234}
5235
5236/**
5237 * ata_std_ports - initialize ioaddr with standard port offsets.
5238 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 5239 *
5240 * Utility function which initializes data_addr, error_addr,
5241 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5242 * device_addr, status_addr, and command_addr to standard offsets
5243 * relative to cmd_addr.
5244 *
5245 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 5246 */
0baab86b 5247
1da177e4
LT		 5248void ata_std_ports(struct ata_ioports *ioaddr)
5249{
5250 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5251 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5252 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5253 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5254 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5255 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5256 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5257 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5258 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5259 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5260}
5261
0baab86b 5262
374b1873
JG		 5263#ifdef CONFIG_PCI
5264
5265void ata_pci_host_stop (struct ata_host_set *host_set)
5266{
5267 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5268
5269 pci_iounmap(pdev, host_set->mmio_base);
5270}
5271
1da177e4
LT		 5272/**
5273 * ata_pci_remove_one - PCI layer callback for device removal
5274 * @pdev: PCI device that was removed
5275 *
5276 * PCI layer indicates to libata via this hook that
6f0ef4fa 5277 * hot-unplug or module unload event has occurred.
1da177e4
LT		 5278 * Handle this by unregistering all objects associated
5279 * with this PCI device. Free those objects. Then finally
5280 * release PCI resources and disable device.
5281 *
5282 * LOCKING:
5283 * Inherited from PCI layer (may sleep).
5284 */
5285
5286void ata_pci_remove_one (struct pci_dev *pdev)
5287{
5288 struct device *dev = pci_dev_to_dev(pdev);
5289 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 5290
17b14451 5291 ata_host_set_remove(host_set);
1da177e4
LT		 5292 pci_release_regions(pdev);
5293 pci_disable_device(pdev);
5294 dev_set_drvdata(dev, NULL);
5295}
5296
5297/* move to PCI subsystem */
057ace5e 5298int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 5299{
5300 unsigned long tmp = 0;
5301
5302 switch (bits->width) {
5303 case 1: {
5304 u8 tmp8 = 0;
5305 pci_read_config_byte(pdev, bits->reg, &tmp8);
5306 tmp = tmp8;
5307 break;
5308 }
5309 case 2: {
5310 u16 tmp16 = 0;
5311 pci_read_config_word(pdev, bits->reg, &tmp16);
5312 tmp = tmp16;
5313 break;
5314 }
5315 case 4: {
5316 u32 tmp32 = 0;
5317 pci_read_config_dword(pdev, bits->reg, &tmp32);
5318 tmp = tmp32;
5319 break;
5320 }
5321
5322 default:
5323 return -EINVAL;
5324 }
5325
5326 tmp &= bits->mask;
5327
5328 return (tmp == bits->val) ? 1 : 0;
5329}
9b847548
JA		 5330
5331int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5332{
5333 pci_save_state(pdev);
5334 pci_disable_device(pdev);
5335 pci_set_power_state(pdev, PCI_D3hot);
5336 return 0;
5337}
5338
5339int ata_pci_device_resume(struct pci_dev *pdev)
5340{
5341 pci_set_power_state(pdev, PCI_D0);
5342 pci_restore_state(pdev);
5343 pci_enable_device(pdev);
5344 pci_set_master(pdev);
5345 return 0;
5346}
1da177e4
LT		 5347#endif /* CONFIG_PCI */
5348
5349
1da177e4
LT		 5350static int __init ata_init(void)
5351{
5352 ata_wq = create_workqueue("ata");
5353 if (!ata_wq)
5354 return -ENOMEM;
5355
5356 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5357 return 0;
5358}
5359
5360static void __exit ata_exit(void)
5361{
5362 destroy_workqueue(ata_wq);
5363}
5364
5365module_init(ata_init);
5366module_exit(ata_exit);
5367
67846b30
JG		 5368static unsigned long ratelimit_time;
5369static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5370
5371int ata_ratelimit(void)
5372{
5373 int rc;
5374 unsigned long flags;
5375
5376 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5377
5378 if (time_after(jiffies, ratelimit_time)) {
5379 rc = 1;
5380 ratelimit_time = jiffies + (HZ/5);
5381 } else
5382 rc = 0;
5383
5384 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5385
5386 return rc;
5387}
5388
1da177e4
LT		 5389/*
5390 * libata is essentially a library of internal helper functions for
5391 * low-level ATA host controller drivers. As such, the API/ABI is
5392 * likely to change as new drivers are added and updated.
5393 * Do not depend on ABI/API stability.
5394 */
5395
5396EXPORT_SYMBOL_GPL(ata_std_bios_param);
5397EXPORT_SYMBOL_GPL(ata_std_ports);
5398EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5399EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5400EXPORT_SYMBOL_GPL(ata_sg_init);
5401EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5402EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5403EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5404EXPORT_SYMBOL_GPL(ata_eng_timeout);
5405EXPORT_SYMBOL_GPL(ata_tf_load);
5406EXPORT_SYMBOL_GPL(ata_tf_read);
5407EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5408EXPORT_SYMBOL_GPL(ata_std_dev_select);
5409EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5410EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5411EXPORT_SYMBOL_GPL(ata_check_status);
5412EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5413EXPORT_SYMBOL_GPL(ata_exec_command);
5414EXPORT_SYMBOL_GPL(ata_port_start);
5415EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5416EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5417EXPORT_SYMBOL_GPL(ata_interrupt);
5418EXPORT_SYMBOL_GPL(ata_qc_prep);
5419EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5420EXPORT_SYMBOL_GPL(ata_bmdma_start);
5421EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5422EXPORT_SYMBOL_GPL(ata_bmdma_status);
5423EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5424EXPORT_SYMBOL_GPL(ata_port_probe);
5425EXPORT_SYMBOL_GPL(sata_phy_reset);
5426EXPORT_SYMBOL_GPL(__sata_phy_reset);
5427EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5428EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5429EXPORT_SYMBOL_GPL(ata_std_softreset);
5430EXPORT_SYMBOL_GPL(sata_std_hardreset);
5431EXPORT_SYMBOL_GPL(ata_std_postreset);
5432EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5433EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5434EXPORT_SYMBOL_GPL(ata_dev_revalidate);
1da177e4 5435EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5436EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5437EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5438EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5439EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5440EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 5441EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 5442EXPORT_SYMBOL_GPL(ata_scsi_error);
5443EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5444EXPORT_SYMBOL_GPL(ata_scsi_release);
5445EXPORT_SYMBOL_GPL(ata_host_intr);
5446EXPORT_SYMBOL_GPL(ata_dev_classify);
6a62a04d
TH		 5447EXPORT_SYMBOL_GPL(ata_id_string);
5448EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5449EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5450EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5451EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5452
1bc4ccff 5453EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5454EXPORT_SYMBOL_GPL(ata_timing_compute);
5455EXPORT_SYMBOL_GPL(ata_timing_merge);
5456
1da177e4
LT		 5457#ifdef CONFIG_PCI
5458EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5459EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5460EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5461EXPORT_SYMBOL_GPL(ata_pci_init_one);
5462EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5463EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5464EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 5465#endif /* CONFIG_PCI */
9b847548
JA		 5466
5467EXPORT_SYMBOL_GPL(ata_device_suspend);
5468EXPORT_SYMBOL_GPL(ata_device_resume);
5469EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5470EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux kernel - Deliverables
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