projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] libata: Add ->set_mode hook for odd drivers
[deliverable/linux.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f
TH		 64static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
1da177e4 66static void ata_set_mode(struct ata_port *ap);
83206a29
TH		 67static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
68 struct ata_device *dev);
acf356b1 69static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 70
71static unsigned int ata_unique_id = 1;
72static struct workqueue_struct *ata_wq;
73
418dc1f5 74int atapi_enabled = 1;
1623c81e
JG		 75module_param(atapi_enabled, int, 0444);
76MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
77
c3c013a2
JG		 78int libata_fua = 0;
79module_param_named(fua, libata_fua, int, 0444);
80MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
81
1da177e4
LT		 82MODULE_AUTHOR("Jeff Garzik");
83MODULE_DESCRIPTION("Library module for ATA devices");
84MODULE_LICENSE("GPL");
85MODULE_VERSION(DRV_VERSION);
86
0baab86b 87
1da177e4
LT		 88/**
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
93 *
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
96 *
97 * LOCKING:
98 * Inherited from caller.
99 */
100
057ace5e 101void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 102{
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
108
109 fis[4] = tf->lbal;
110 fis[5] = tf->lbam;
111 fis[6] = tf->lbah;
112 fis[7] = tf->device;
113
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
118
119 fis[12] = tf->nsect;
120 fis[13] = tf->hob_nsect;
121 fis[14] = 0;
122 fis[15] = tf->ctl;
123
124 fis[16] = 0;
125 fis[17] = 0;
126 fis[18] = 0;
127 fis[19] = 0;
128}
129
130/**
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
134 *
e12a1be6 135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 136 *
137 * LOCKING:
138 * Inherited from caller.
139 */
140
057ace5e 141void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 142{
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
145
146 tf->lbal = fis[4];
147 tf->lbam = fis[5];
148 tf->lbah = fis[6];
149 tf->device = fis[7];
150
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
154
155 tf->nsect = fis[12];
156 tf->hob_nsect = fis[13];
157}
158
8cbd6df1
AL		 159static const u8 ata_rw_cmds[] = {
160 /* pio multi */
161 ATA_CMD_READ_MULTI,
162 ATA_CMD_WRITE_MULTI,
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 165 0,
166 0,
167 0,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 169 /* pio */
170 ATA_CMD_PIO_READ,
171 ATA_CMD_PIO_WRITE,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 174 0,
175 0,
176 0,
177 0,
8cbd6df1
AL		 178 /* dma */
179 ATA_CMD_READ,
180 ATA_CMD_WRITE,
181 ATA_CMD_READ_EXT,
9a3dccc4
TH		 182 ATA_CMD_WRITE_EXT,
183 0,
184 0,
185 0,
186 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 187};
1da177e4
LT		 188
189/**
8cbd6df1
AL		 190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
1da177e4 192 *
2e9edbf8 193 * Examine the device configuration and tf->flags to calculate
8cbd6df1 194 * the proper read/write commands and protocol to use.
1da177e4
LT		 195 *
196 * LOCKING:
197 * caller.
198 */
9a3dccc4 199int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 200{
8cbd6df1
AL		 201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
9a3dccc4 203 u8 cmd;
1da177e4 204
9a3dccc4 205 int index, fua, lba48, write;
2e9edbf8 206
9a3dccc4 207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 210
8cbd6df1
AL		 211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
9a3dccc4 213 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
0565c26d 217 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 218 } else {
219 tf->protocol = ATA_PROT_DMA;
9a3dccc4 220 index = 16;
8cbd6df1 221 }
1da177e4 222
9a3dccc4
TH		 223 cmd = ata_rw_cmds[index + fua + lba48 + write];
224 if (cmd) {
225 tf->command = cmd;
226 return 0;
227 }
228 return -1;
1da177e4
LT		 229}
230
cb95d562
TH		 231/**
232 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
233 * @pio_mask: pio_mask
234 * @mwdma_mask: mwdma_mask
235 * @udma_mask: udma_mask
236 *
237 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
238 * unsigned int xfer_mask.
239 *
240 * LOCKING:
241 * None.
242 *
243 * RETURNS:
244 * Packed xfer_mask.
245 */
246static unsigned int ata_pack_xfermask(unsigned int pio_mask,
247 unsigned int mwdma_mask,
248 unsigned int udma_mask)
249{
250 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
251 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
252 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
253}
254
c0489e4e
TH		 255/**
256 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
257 * @xfer_mask: xfer_mask to unpack
258 * @pio_mask: resulting pio_mask
259 * @mwdma_mask: resulting mwdma_mask
260 * @udma_mask: resulting udma_mask
261 *
262 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
263 * Any NULL distination masks will be ignored.
264 */
265static void ata_unpack_xfermask(unsigned int xfer_mask,
266 unsigned int *pio_mask,
267 unsigned int *mwdma_mask,
268 unsigned int *udma_mask)
269{
270 if (pio_mask)
271 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
272 if (mwdma_mask)
273 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
274 if (udma_mask)
275 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
276}
277
cb95d562
TH		 278static const struct ata_xfer_ent {
279 unsigned int shift, bits;
280 u8 base;
281} ata_xfer_tbl[] = {
282 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
283 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
284 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
285 { -1, },
286};
287
288/**
289 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
290 * @xfer_mask: xfer_mask of interest
291 *
292 * Return matching XFER_* value for @xfer_mask. Only the highest
293 * bit of @xfer_mask is considered.
294 *
295 * LOCKING:
296 * None.
297 *
298 * RETURNS:
299 * Matching XFER_* value, 0 if no match found.
300 */
301static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
302{
303 int highbit = fls(xfer_mask) - 1;
304 const struct ata_xfer_ent *ent;
305
306 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
307 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
308 return ent->base + highbit - ent->shift;
309 return 0;
310}
311
312/**
313 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
314 * @xfer_mode: XFER_* of interest
315 *
316 * Return matching xfer_mask for @xfer_mode.
317 *
318 * LOCKING:
319 * None.
320 *
321 * RETURNS:
322 * Matching xfer_mask, 0 if no match found.
323 */
324static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
325{
326 const struct ata_xfer_ent *ent;
327
328 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
329 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
330 return 1 << (ent->shift + xfer_mode - ent->base);
331 return 0;
332}
333
334/**
335 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
336 * @xfer_mode: XFER_* of interest
337 *
338 * Return matching xfer_shift for @xfer_mode.
339 *
340 * LOCKING:
341 * None.
342 *
343 * RETURNS:
344 * Matching xfer_shift, -1 if no match found.
345 */
346static int ata_xfer_mode2shift(unsigned int xfer_mode)
347{
348 const struct ata_xfer_ent *ent;
349
350 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
351 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
352 return ent->shift;
353 return -1;
354}
355
1da177e4 356/**
1da7b0d0
TH		 357 * ata_mode_string - convert xfer_mask to string
358 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 359 *
360 * Determine string which represents the highest speed
1da7b0d0 361 * (highest bit in @modemask).
1da177e4
LT		 362 *
363 * LOCKING:
364 * None.
365 *
366 * RETURNS:
367 * Constant C string representing highest speed listed in
1da7b0d0 368 * @mode_mask, or the constant C string "<n/a>".
1da177e4 369 */
1da7b0d0 370static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 371{
75f554bc
TH		 372 static const char * const xfer_mode_str[] = {
373 "PIO0",
374 "PIO1",
375 "PIO2",
376 "PIO3",
377 "PIO4",
378 "MWDMA0",
379 "MWDMA1",
380 "MWDMA2",
381 "UDMA/16",
382 "UDMA/25",
383 "UDMA/33",
384 "UDMA/44",
385 "UDMA/66",
386 "UDMA/100",
387 "UDMA/133",
388 "UDMA7",
389 };
1da7b0d0 390 int highbit;
1da177e4 391
1da7b0d0
TH		 392 highbit = fls(xfer_mask) - 1;
393 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
394 return xfer_mode_str[highbit];
1da177e4 395 return "<n/a>";
1da177e4
LT		 396}
397
0b8efb0a
TH		 398static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
399{
400 if (ata_dev_present(dev)) {
401 printk(KERN_WARNING "ata%u: dev %u disabled\n",
402 ap->id, dev->devno);
403 dev->class++;
404 }
405}
406
1da177e4
LT		 407/**
408 * ata_pio_devchk - PATA device presence detection
409 * @ap: ATA channel to examine
410 * @device: Device to examine (starting at zero)
411 *
412 * This technique was originally described in
413 * Hale Landis's ATADRVR (www.ata-atapi.com), and
414 * later found its way into the ATA/ATAPI spec.
415 *
416 * Write a pattern to the ATA shadow registers,
417 * and if a device is present, it will respond by
418 * correctly storing and echoing back the
419 * ATA shadow register contents.
420 *
421 * LOCKING:
422 * caller.
423 */
424
425static unsigned int ata_pio_devchk(struct ata_port *ap,
426 unsigned int device)
427{
428 struct ata_ioports *ioaddr = &ap->ioaddr;
429 u8 nsect, lbal;
430
431 ap->ops->dev_select(ap, device);
432
433 outb(0x55, ioaddr->nsect_addr);
434 outb(0xaa, ioaddr->lbal_addr);
435
436 outb(0xaa, ioaddr->nsect_addr);
437 outb(0x55, ioaddr->lbal_addr);
438
439 outb(0x55, ioaddr->nsect_addr);
440 outb(0xaa, ioaddr->lbal_addr);
441
442 nsect = inb(ioaddr->nsect_addr);
443 lbal = inb(ioaddr->lbal_addr);
444
445 if ((nsect == 0x55) && (lbal == 0xaa))
446 return 1; /* we found a device */
447
448 return 0; /* nothing found */
449}
450
451/**
452 * ata_mmio_devchk - PATA device presence detection
453 * @ap: ATA channel to examine
454 * @device: Device to examine (starting at zero)
455 *
456 * This technique was originally described in
457 * Hale Landis's ATADRVR (www.ata-atapi.com), and
458 * later found its way into the ATA/ATAPI spec.
459 *
460 * Write a pattern to the ATA shadow registers,
461 * and if a device is present, it will respond by
462 * correctly storing and echoing back the
463 * ATA shadow register contents.
464 *
465 * LOCKING:
466 * caller.
467 */
468
469static unsigned int ata_mmio_devchk(struct ata_port *ap,
470 unsigned int device)
471{
472 struct ata_ioports *ioaddr = &ap->ioaddr;
473 u8 nsect, lbal;
474
475 ap->ops->dev_select(ap, device);
476
477 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
478 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
479
480 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
481 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
482
483 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
484 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
485
486 nsect = readb((void __iomem *) ioaddr->nsect_addr);
487 lbal = readb((void __iomem *) ioaddr->lbal_addr);
488
489 if ((nsect == 0x55) && (lbal == 0xaa))
490 return 1; /* we found a device */
491
492 return 0; /* nothing found */
493}
494
495/**
496 * ata_devchk - PATA device presence detection
497 * @ap: ATA channel to examine
498 * @device: Device to examine (starting at zero)
499 *
500 * Dispatch ATA device presence detection, depending
501 * on whether we are using PIO or MMIO to talk to the
502 * ATA shadow registers.
503 *
504 * LOCKING:
505 * caller.
506 */
507
508static unsigned int ata_devchk(struct ata_port *ap,
509 unsigned int device)
510{
511 if (ap->flags & ATA_FLAG_MMIO)
512 return ata_mmio_devchk(ap, device);
513 return ata_pio_devchk(ap, device);
514}
515
516/**
517 * ata_dev_classify - determine device type based on ATA-spec signature
518 * @tf: ATA taskfile register set for device to be identified
519 *
520 * Determine from taskfile register contents whether a device is
521 * ATA or ATAPI, as per "Signature and persistence" section
522 * of ATA/PI spec (volume 1, sect 5.14).
523 *
524 * LOCKING:
525 * None.
526 *
527 * RETURNS:
528 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
529 * the event of failure.
530 */
531
057ace5e 532unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 533{
534 /* Apple's open source Darwin code hints that some devices only
535 * put a proper signature into the LBA mid/high registers,
536 * So, we only check those. It's sufficient for uniqueness.
537 */
538
539 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
540 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
541 DPRINTK("found ATA device by sig\n");
542 return ATA_DEV_ATA;
543 }
544
545 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
546 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
547 DPRINTK("found ATAPI device by sig\n");
548 return ATA_DEV_ATAPI;
549 }
550
551 DPRINTK("unknown device\n");
552 return ATA_DEV_UNKNOWN;
553}
554
555/**
556 * ata_dev_try_classify - Parse returned ATA device signature
557 * @ap: ATA channel to examine
558 * @device: Device to examine (starting at zero)
b4dc7623 559 * @r_err: Value of error register on completion
1da177e4
LT		 560 *
561 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
562 * an ATA/ATAPI-defined set of values is placed in the ATA
563 * shadow registers, indicating the results of device detection
564 * and diagnostics.
565 *
566 * Select the ATA device, and read the values from the ATA shadow
567 * registers. Then parse according to the Error register value,
568 * and the spec-defined values examined by ata_dev_classify().
569 *
570 * LOCKING:
571 * caller.
b4dc7623
TH		 572 *
573 * RETURNS:
574 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 575 */
576
b4dc7623
TH		 577static unsigned int
578ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 579{
1da177e4
LT		 580 struct ata_taskfile tf;
581 unsigned int class;
582 u8 err;
583
584 ap->ops->dev_select(ap, device);
585
586 memset(&tf, 0, sizeof(tf));
587
1da177e4 588 ap->ops->tf_read(ap, &tf);
0169e284 589 err = tf.feature;
b4dc7623
TH		 590 if (r_err)
591 *r_err = err;
1da177e4
LT		 592
593 /* see if device passed diags */
594 if (err == 1)
595 /* do nothing */ ;
596 else if ((device == 0) && (err == 0x81))
597 /* do nothing */ ;
598 else
b4dc7623 599 return ATA_DEV_NONE;
1da177e4 600
b4dc7623 601 /* determine if device is ATA or ATAPI */
1da177e4 602 class = ata_dev_classify(&tf);
b4dc7623 603
1da177e4 604 if (class == ATA_DEV_UNKNOWN)
b4dc7623 605 return ATA_DEV_NONE;
1da177e4 606 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 607 return ATA_DEV_NONE;
608 return class;
1da177e4
LT		 609}
610
611/**
6a62a04d 612 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 613 * @id: IDENTIFY DEVICE results we will examine
614 * @s: string into which data is output
615 * @ofs: offset into identify device page
616 * @len: length of string to return. must be an even number.
617 *
618 * The strings in the IDENTIFY DEVICE page are broken up into
619 * 16-bit chunks. Run through the string, and output each
620 * 8-bit chunk linearly, regardless of platform.
621 *
622 * LOCKING:
623 * caller.
624 */
625
6a62a04d
TH		 626void ata_id_string(const u16 *id, unsigned char *s,
627 unsigned int ofs, unsigned int len)
1da177e4
LT		 628{
629 unsigned int c;
630
631 while (len > 0) {
632 c = id[ofs] >> 8;
633 *s = c;
634 s++;
635
636 c = id[ofs] & 0xff;
637 *s = c;
638 s++;
639
640 ofs++;
641 len -= 2;
642 }
643}
644
0e949ff3 645/**
6a62a04d 646 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 647 * @id: IDENTIFY DEVICE results we will examine
648 * @s: string into which data is output
649 * @ofs: offset into identify device page
650 * @len: length of string to return. must be an odd number.
651 *
6a62a04d 652 * This function is identical to ata_id_string except that it
0e949ff3
TH		 653 * trims trailing spaces and terminates the resulting string with
654 * null. @len must be actual maximum length (even number) + 1.
655 *
656 * LOCKING:
657 * caller.
658 */
6a62a04d
TH		 659void ata_id_c_string(const u16 *id, unsigned char *s,
660 unsigned int ofs, unsigned int len)
0e949ff3
TH		 661{
662 unsigned char *p;
663
664 WARN_ON(!(len & 1));
665
6a62a04d 666 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 667
668 p = s + strnlen(s, len - 1);
669 while (p > s && p[-1] == ' ')
670 p--;
671 *p = '\0';
672}
0baab86b 673
2940740b
TH		 674static u64 ata_id_n_sectors(const u16 *id)
675{
676 if (ata_id_has_lba(id)) {
677 if (ata_id_has_lba48(id))
678 return ata_id_u64(id, 100);
679 else
680 return ata_id_u32(id, 60);
681 } else {
682 if (ata_id_current_chs_valid(id))
683 return ata_id_u32(id, 57);
684 else
685 return id[1] * id[3] * id[6];
686 }
687}
688
0baab86b
EF		 689/**
690 * ata_noop_dev_select - Select device 0/1 on ATA bus
691 * @ap: ATA channel to manipulate
692 * @device: ATA device (numbered from zero) to select
693 *
694 * This function performs no actual function.
695 *
696 * May be used as the dev_select() entry in ata_port_operations.
697 *
698 * LOCKING:
699 * caller.
700 */
1da177e4
LT		 701void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
702{
703}
704
0baab86b 705
1da177e4
LT		 706/**
707 * ata_std_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * Use the method defined in the ATA specification to
712 * make either device 0, or device 1, active on the
0baab86b
EF		 713 * ATA channel. Works with both PIO and MMIO.
714 *
715 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 716 *
717 * LOCKING:
718 * caller.
719 */
720
721void ata_std_dev_select (struct ata_port *ap, unsigned int device)
722{
723 u8 tmp;
724
725 if (device == 0)
726 tmp = ATA_DEVICE_OBS;
727 else
728 tmp = ATA_DEVICE_OBS | ATA_DEV1;
729
730 if (ap->flags & ATA_FLAG_MMIO) {
731 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
732 } else {
733 outb(tmp, ap->ioaddr.device_addr);
734 }
735 ata_pause(ap); /* needed; also flushes, for mmio */
736}
737
738/**
739 * ata_dev_select - Select device 0/1 on ATA bus
740 * @ap: ATA channel to manipulate
741 * @device: ATA device (numbered from zero) to select
742 * @wait: non-zero to wait for Status register BSY bit to clear
743 * @can_sleep: non-zero if context allows sleeping
744 *
745 * Use the method defined in the ATA specification to
746 * make either device 0, or device 1, active on the
747 * ATA channel.
748 *
749 * This is a high-level version of ata_std_dev_select(),
750 * which additionally provides the services of inserting
751 * the proper pauses and status polling, where needed.
752 *
753 * LOCKING:
754 * caller.
755 */
756
757void ata_dev_select(struct ata_port *ap, unsigned int device,
758 unsigned int wait, unsigned int can_sleep)
759{
760 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
761 ap->id, device, wait);
762
763 if (wait)
764 ata_wait_idle(ap);
765
766 ap->ops->dev_select(ap, device);
767
768 if (wait) {
769 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
770 msleep(150);
771 ata_wait_idle(ap);
772 }
773}
774
775/**
776 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 777 * @id: IDENTIFY DEVICE page to dump
1da177e4 778 *
0bd3300a
TH		 779 * Dump selected 16-bit words from the given IDENTIFY DEVICE
780 * page.
1da177e4
LT		 781 *
782 * LOCKING:
783 * caller.
784 */
785
0bd3300a 786static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 787{
788 DPRINTK("49==0x%04x "
789 "53==0x%04x "
790 "63==0x%04x "
791 "64==0x%04x "
792 "75==0x%04x \n",
0bd3300a
TH		 793 id[49],
794 id[53],
795 id[63],
796 id[64],
797 id[75]);
1da177e4
LT		 798 DPRINTK("80==0x%04x "
799 "81==0x%04x "
800 "82==0x%04x "
801 "83==0x%04x "
802 "84==0x%04x \n",
0bd3300a
TH		 803 id[80],
804 id[81],
805 id[82],
806 id[83],
807 id[84]);
1da177e4
LT		 808 DPRINTK("88==0x%04x "
809 "93==0x%04x\n",
0bd3300a
TH		 810 id[88],
811 id[93]);
1da177e4
LT		 812}
813
cb95d562
TH		 814/**
815 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
816 * @id: IDENTIFY data to compute xfer mask from
817 *
818 * Compute the xfermask for this device. This is not as trivial
819 * as it seems if we must consider early devices correctly.
820 *
821 * FIXME: pre IDE drive timing (do we care ?).
822 *
823 * LOCKING:
824 * None.
825 *
826 * RETURNS:
827 * Computed xfermask
828 */
829static unsigned int ata_id_xfermask(const u16 *id)
830{
831 unsigned int pio_mask, mwdma_mask, udma_mask;
832
833 /* Usual case. Word 53 indicates word 64 is valid */
834 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
835 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
836 pio_mask <<= 3;
837 pio_mask |= 0x7;
838 } else {
839 /* If word 64 isn't valid then Word 51 high byte holds
840 * the PIO timing number for the maximum. Turn it into
841 * a mask.
842 */
843 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
844
845 /* But wait.. there's more. Design your standards by
846 * committee and you too can get a free iordy field to
847 * process. However its the speeds not the modes that
848 * are supported... Note drivers using the timing API
849 * will get this right anyway
850 */
851 }
852
853 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 854
855 udma_mask = 0;
856 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
857 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 858
859 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
860}
861
86e45b6b
TH		 862/**
863 * ata_port_queue_task - Queue port_task
864 * @ap: The ata_port to queue port_task for
865 *
866 * Schedule @fn(@data) for execution after @delay jiffies using
867 * port_task. There is one port_task per port and it's the
868 * user(low level driver)'s responsibility to make sure that only
869 * one task is active at any given time.
870 *
871 * libata core layer takes care of synchronization between
872 * port_task and EH. ata_port_queue_task() may be ignored for EH
873 * synchronization.
874 *
875 * LOCKING:
876 * Inherited from caller.
877 */
878void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
879 unsigned long delay)
880{
881 int rc;
882
2e755f68 883 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 884 return;
885
886 PREPARE_WORK(&ap->port_task, fn, data);
887
888 if (!delay)
889 rc = queue_work(ata_wq, &ap->port_task);
890 else
891 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
892
893 /* rc == 0 means that another user is using port task */
894 WARN_ON(rc == 0);
895}
896
897/**
898 * ata_port_flush_task - Flush port_task
899 * @ap: The ata_port to flush port_task for
900 *
901 * After this function completes, port_task is guranteed not to
902 * be running or scheduled.
903 *
904 * LOCKING:
905 * Kernel thread context (may sleep)
906 */
907void ata_port_flush_task(struct ata_port *ap)
908{
909 unsigned long flags;
910
911 DPRINTK("ENTER\n");
912
913 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 914 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 915 spin_unlock_irqrestore(&ap->host_set->lock, flags);
916
917 DPRINTK("flush #1\n");
918 flush_workqueue(ata_wq);
919
920 /*
921 * At this point, if a task is running, it's guaranteed to see
922 * the FLUSH flag; thus, it will never queue pio tasks again.
923 * Cancel and flush.
924 */
925 if (!cancel_delayed_work(&ap->port_task)) {
926 DPRINTK("flush #2\n");
927 flush_workqueue(ata_wq);
928 }
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 931 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("EXIT\n");
935}
936
77853bf2 937void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 938{
77853bf2 939 struct completion *waiting = qc->private_data;
a2a7a662 940
77853bf2 941 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 942 complete(waiting);
a2a7a662
TH		 943}
944
945/**
946 * ata_exec_internal - execute libata internal command
947 * @ap: Port to which the command is sent
948 * @dev: Device to which the command is sent
949 * @tf: Taskfile registers for the command and the result
950 * @dma_dir: Data tranfer direction of the command
951 * @buf: Data buffer of the command
952 * @buflen: Length of data buffer
953 *
954 * Executes libata internal command with timeout. @tf contains
955 * command on entry and result on return. Timeout and error
956 * conditions are reported via return value. No recovery action
957 * is taken after a command times out. It's caller's duty to
958 * clean up after timeout.
959 *
960 * LOCKING:
961 * None. Should be called with kernel context, might sleep.
962 */
963
964static unsigned
965ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
966 struct ata_taskfile *tf,
967 int dma_dir, void *buf, unsigned int buflen)
968{
969 u8 command = tf->command;
970 struct ata_queued_cmd *qc;
971 DECLARE_COMPLETION(wait);
972 unsigned long flags;
77853bf2 973 unsigned int err_mask;
a2a7a662
TH		 974
975 spin_lock_irqsave(&ap->host_set->lock, flags);
976
977 qc = ata_qc_new_init(ap, dev);
978 BUG_ON(qc == NULL);
979
980 qc->tf = *tf;
981 qc->dma_dir = dma_dir;
982 if (dma_dir != DMA_NONE) {
983 ata_sg_init_one(qc, buf, buflen);
984 qc->nsect = buflen / ATA_SECT_SIZE;
985 }
986
77853bf2 987 qc->private_data = &wait;
a2a7a662
TH		 988 qc->complete_fn = ata_qc_complete_internal;
989
9a3d9eb0
TH		 990 qc->err_mask = ata_qc_issue(qc);
991 if (qc->err_mask)
8e436af9 992 ata_qc_complete(qc);
a2a7a662
TH		 993
994 spin_unlock_irqrestore(&ap->host_set->lock, flags);
995
996 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 997 ata_port_flush_task(ap);
998
a2a7a662
TH		 999 spin_lock_irqsave(&ap->host_set->lock, flags);
1000
1001 /* We're racing with irq here. If we lose, the
1002 * following test prevents us from completing the qc
1003 * again. If completion irq occurs after here but
1004 * before the caller cleans up, it will result in a
1005 * spurious interrupt. We can live with that.
1006 */
77853bf2 1007 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1008 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1009 ata_qc_complete(qc);
1010 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1011 ap->id, command);
1012 }
1013
1014 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1015 }
1016
77853bf2
TH		 1017 *tf = qc->tf;
1018 err_mask = qc->err_mask;
1019
1020 ata_qc_free(qc);
1021
1f7dd3e9
TH		 1022 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1023 * Until those drivers are fixed, we detect the condition
1024 * here, fail the command with AC_ERR_SYSTEM and reenable the
1025 * port.
1026 *
1027 * Note that this doesn't change any behavior as internal
1028 * command failure results in disabling the device in the
1029 * higher layer for LLDDs without new reset/EH callbacks.
1030 *
1031 * Kill the following code as soon as those drivers are fixed.
1032 */
1033 if (ap->flags & ATA_FLAG_PORT_DISABLED) {
1034 err_mask |= AC_ERR_SYSTEM;
1035 ata_port_probe(ap);
1036 }
1037
77853bf2 1038 return err_mask;
a2a7a662
TH		 1039}
1040
1bc4ccff
AC		 1041/**
1042 * ata_pio_need_iordy - check if iordy needed
1043 * @adev: ATA device
1044 *
1045 * Check if the current speed of the device requires IORDY. Used
1046 * by various controllers for chip configuration.
1047 */
1048
1049unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1050{
1051 int pio;
1052 int speed = adev->pio_mode - XFER_PIO_0;
1053
1054 if (speed < 2)
1055 return 0;
1056 if (speed > 2)
1057 return 1;
2e9edbf8 1058
1bc4ccff
AC		 1059 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1060
1061 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1062 pio = adev->id[ATA_ID_EIDE_PIO];
1063 /* Is the speed faster than the drive allows non IORDY ? */
1064 if (pio) {
1065 /* This is cycle times not frequency - watch the logic! */
1066 if (pio > 240) /* PIO2 is 240nS per cycle */
1067 return 1;
1068 return 0;
1069 }
1070 }
1071 return 0;
1072}
1073
1da177e4 1074/**
49016aca
TH		 1075 * ata_dev_read_id - Read ID data from the specified device
1076 * @ap: port on which target device resides
1077 * @dev: target device
1078 * @p_class: pointer to class of the target device (may be changed)
1079 * @post_reset: is this read ID post-reset?
d9572b1d 1080 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1081 *
49016aca
TH		 1082 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1083 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1084 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1085 * for pre-ATA4 drives.
1da177e4
LT		 1086 *
1087 * LOCKING:
49016aca
TH		 1088 * Kernel thread context (may sleep)
1089 *
1090 * RETURNS:
1091 * 0 on success, -errno otherwise.
1da177e4 1092 */
49016aca 1093static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1094 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1095{
49016aca 1096 unsigned int class = *p_class;
a0123703 1097 struct ata_taskfile tf;
49016aca 1098 unsigned int err_mask = 0;
d9572b1d 1099 u16 *id;
49016aca
TH		 1100 const char *reason;
1101 int rc;
1da177e4 1102
49016aca 1103 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1104
49016aca 1105 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1106
d9572b1d
TH		 1107 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1108 if (id == NULL) {
1109 rc = -ENOMEM;
1110 reason = "out of memory";
1111 goto err_out;
1112 }
1113
49016aca
TH		 1114 retry:
1115 ata_tf_init(ap, &tf, dev->devno);
a0123703 1116
49016aca
TH		 1117 switch (class) {
1118 case ATA_DEV_ATA:
a0123703 1119 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1120 break;
1121 case ATA_DEV_ATAPI:
a0123703 1122 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1123 break;
1124 default:
1125 rc = -ENODEV;
1126 reason = "unsupported class";
1127 goto err_out;
1da177e4
LT		 1128 }
1129
a0123703 1130 tf.protocol = ATA_PROT_PIO;
1da177e4 1131
a0123703 1132 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1133 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1134 if (err_mask) {
49016aca
TH		 1135 rc = -EIO;
1136 reason = "I/O error";
1da177e4
LT		 1137 goto err_out;
1138 }
1139
49016aca 1140 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1141
49016aca
TH		 1142 /* sanity check */
1143 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1144 rc = -EINVAL;
1145 reason = "device reports illegal type";
1146 goto err_out;
1147 }
1148
1149 if (post_reset && class == ATA_DEV_ATA) {
1150 /*
1151 * The exact sequence expected by certain pre-ATA4 drives is:
1152 * SRST RESET
1153 * IDENTIFY
1154 * INITIALIZE DEVICE PARAMETERS
1155 * anything else..
1156 * Some drives were very specific about that exact sequence.
1157 */
1158 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1159 err_mask = ata_dev_init_params(ap, dev);
1160 if (err_mask) {
1161 rc = -EIO;
1162 reason = "INIT_DEV_PARAMS failed";
1163 goto err_out;
1164 }
1165
1166 /* current CHS translation info (id[53-58]) might be
1167 * changed. reread the identify device info.
1168 */
1169 post_reset = 0;
1170 goto retry;
1171 }
1172 }
1173
1174 *p_class = class;
d9572b1d 1175 *p_id = id;
49016aca
TH		 1176 return 0;
1177
1178 err_out:
1179 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1180 ap->id, dev->devno, reason);
d9572b1d 1181 kfree(id);
49016aca
TH		 1182 return rc;
1183}
1184
4b2f3ede
TH		 1185static inline u8 ata_dev_knobble(const struct ata_port *ap,
1186 struct ata_device *dev)
1187{
1188 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1189}
1190
49016aca 1191/**
ffeae418
TH		 1192 * ata_dev_configure - Configure the specified ATA/ATAPI device
1193 * @ap: Port on which target device resides
1194 * @dev: Target device to configure
4c2d721a 1195 * @print_info: Enable device info printout
ffeae418
TH		 1196 *
1197 * Configure @dev according to @dev->id. Generic and low-level
1198 * driver specific fixups are also applied.
49016aca
TH		 1199 *
1200 * LOCKING:
ffeae418
TH		 1201 * Kernel thread context (may sleep)
1202 *
1203 * RETURNS:
1204 * 0 on success, -errno otherwise
49016aca 1205 */
4c2d721a
TH		 1206static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1207 int print_info)
49016aca 1208{
1148c3a7 1209 const u16 *id = dev->id;
ff8854b2 1210 unsigned int xfer_mask;
49016aca
TH		 1211 int i, rc;
1212
1213 if (!ata_dev_present(dev)) {
1214 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1215 ap->id, dev->devno);
1216 return 0;
49016aca
TH		 1217 }
1218
ffeae418 1219 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1220
c39f5ebe
TH		 1221 /* print device capabilities */
1222 if (print_info)
1223 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1224 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1225 ap->id, dev->devno, id[49], id[82], id[83],
1226 id[84], id[85], id[86], id[87], id[88]);
1227
208a9933
TH		 1228 /* initialize to-be-configured parameters */
1229 dev->flags = 0;
1230 dev->max_sectors = 0;
1231 dev->cdb_len = 0;
1232 dev->n_sectors = 0;
1233 dev->cylinders = 0;
1234 dev->heads = 0;
1235 dev->sectors = 0;
1236
1da177e4
LT		 1237 /*
1238 * common ATA, ATAPI feature tests
1239 */
1240
ff8854b2 1241 /* find max transfer mode; for printk only */
1148c3a7 1242 xfer_mask = ata_id_xfermask(id);
1da177e4 1243
1148c3a7 1244 ata_dump_id(id);
1da177e4
LT		 1245
1246 /* ATA-specific feature tests */
1247 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1248 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1249
1148c3a7 1250 if (ata_id_has_lba(id)) {
4c2d721a 1251 const char *lba_desc;
8bf62ece 1252
4c2d721a
TH		 1253 lba_desc = "LBA";
1254 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1255 if (ata_id_has_lba48(id)) {
8bf62ece 1256 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1257 lba_desc = "LBA48";
1258 }
8bf62ece
AL		 1259
1260 /* print device info to dmesg */
4c2d721a
TH		 1261 if (print_info)
1262 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1263 "max %s, %Lu sectors: %s\n",
1264 ap->id, dev->devno,
1148c3a7 1265 ata_id_major_version(id),
ff8854b2 1266 ata_mode_string(xfer_mask),
4c2d721a
TH		 1267 (unsigned long long)dev->n_sectors,
1268 lba_desc);
ffeae418 1269 } else {
8bf62ece
AL		 1270 /* CHS */
1271
1272 /* Default translation */
1148c3a7
TH		 1273 dev->cylinders = id[1];
1274 dev->heads = id[3];
1275 dev->sectors = id[6];
8bf62ece 1276
1148c3a7 1277 if (ata_id_current_chs_valid(id)) {
8bf62ece 1278 /* Current CHS translation is valid. */
1148c3a7
TH		 1279 dev->cylinders = id[54];
1280 dev->heads = id[55];
1281 dev->sectors = id[56];
8bf62ece
AL		 1282 }
1283
1284 /* print device info to dmesg */
4c2d721a
TH		 1285 if (print_info)
1286 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1287 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1288 ap->id, dev->devno,
1148c3a7 1289 ata_id_major_version(id),
ff8854b2 1290 ata_mode_string(xfer_mask),
4c2d721a
TH		 1291 (unsigned long long)dev->n_sectors,
1292 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1293 }
1294
6e7846e9 1295 dev->cdb_len = 16;
1da177e4
LT		 1296 }
1297
1298 /* ATAPI-specific feature tests */
2c13b7ce 1299 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1300 rc = atapi_cdb_len(id);
1da177e4
LT		 1301 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1302 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1303 rc = -EINVAL;
1da177e4
LT		 1304 goto err_out_nosup;
1305 }
6e7846e9 1306 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1307
1308 /* print device info to dmesg */
4c2d721a
TH		 1309 if (print_info)
1310 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1311 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1312 }
1313
6e7846e9
TH		 1314 ap->host->max_cmd_len = 0;
1315 for (i = 0; i < ATA_MAX_DEVICES; i++)
1316 ap->host->max_cmd_len = max_t(unsigned int,
1317 ap->host->max_cmd_len,
1318 ap->device[i].cdb_len);
1319
4b2f3ede
TH		 1320 /* limit bridge transfers to udma5, 200 sectors */
1321 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1322 if (print_info)
1323 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1324 ap->id, dev->devno);
5a529139 1325 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1326 dev->max_sectors = ATA_MAX_SECTORS;
1327 }
1328
1329 if (ap->ops->dev_config)
1330 ap->ops->dev_config(ap, dev);
1331
1da177e4 1332 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1333 return 0;
1da177e4
LT		 1334
1335err_out_nosup:
1da177e4 1336 DPRINTK("EXIT, err\n");
ffeae418 1337 return rc;
1da177e4
LT		 1338}
1339
1340/**
1341 * ata_bus_probe - Reset and probe ATA bus
1342 * @ap: Bus to probe
1343 *
0cba632b
JG		 1344 * Master ATA bus probing function. Initiates a hardware-dependent
1345 * bus reset, then attempts to identify any devices found on
1346 * the bus.
1347 *
1da177e4 1348 * LOCKING:
0cba632b 1349 * PCI/etc. bus probe sem.
1da177e4
LT		 1350 *
1351 * RETURNS:
1352 * Zero on success, non-zero on error.
1353 */
1354
1355static int ata_bus_probe(struct ata_port *ap)
1356{
28ca5c57
TH		 1357 unsigned int classes[ATA_MAX_DEVICES];
1358 unsigned int i, rc, found = 0;
1da177e4 1359
28ca5c57 1360 ata_port_probe(ap);
c19ba8af 1361
2044470c
TH		 1362 /* reset and determine device classes */
1363 for (i = 0; i < ATA_MAX_DEVICES; i++)
1364 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1365
2044470c 1366 if (ap->ops->probe_reset) {
c19ba8af 1367 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1368 if (rc) {
1369 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1370 return rc;
c19ba8af 1371 }
28ca5c57 1372 } else {
c19ba8af
TH		 1373 ap->ops->phy_reset(ap);
1374
2044470c
TH		 1375 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1376 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1377 classes[i] = ap->device[i].class;
2044470c 1378
28ca5c57
TH		 1379 ata_port_probe(ap);
1380 }
1da177e4 1381
2044470c
TH		 1382 for (i = 0; i < ATA_MAX_DEVICES; i++)
1383 if (classes[i] == ATA_DEV_UNKNOWN)
1384 classes[i] = ATA_DEV_NONE;
1385
28ca5c57 1386 /* read IDENTIFY page and configure devices */
1da177e4 1387 for (i = 0; i < ATA_MAX_DEVICES; i++) {
ffeae418
TH		 1388 struct ata_device *dev = &ap->device[i];
1389
28ca5c57
TH		 1390 dev->class = classes[i];
1391
ffeae418
TH		 1392 if (!ata_dev_present(dev))
1393 continue;
1394
1395 WARN_ON(dev->id != NULL);
1396 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1397 dev->class = ATA_DEV_NONE;
1398 continue;
1399 }
1400
4c2d721a 1401 if (ata_dev_configure(ap, dev, 1)) {
fcef978f 1402 ata_dev_disable(ap, dev);
ffeae418 1403 continue;
1da177e4 1404 }
ffeae418 1405
ffeae418 1406 found = 1;
1da177e4
LT		 1407 }
1408
28ca5c57 1409 if (!found)
1da177e4
LT		 1410 goto err_out_disable;
1411
e35a9e01
AC		 1412 if (ap->ops->set_mode)
1413 ap->ops->set_mode(ap);
1414 else
1415 ata_set_mode(ap);
1416
1da177e4
LT		 1417 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1418 goto err_out_disable;
1419
1420 return 0;
1421
1422err_out_disable:
1423 ap->ops->port_disable(ap);
1da177e4
LT		 1424 return -1;
1425}
1426
1427/**
0cba632b
JG		 1428 * ata_port_probe - Mark port as enabled
1429 * @ap: Port for which we indicate enablement
1da177e4 1430 *
0cba632b
JG		 1431 * Modify @ap data structure such that the system
1432 * thinks that the entire port is enabled.
1433 *
1434 * LOCKING: host_set lock, or some other form of
1435 * serialization.
1da177e4
LT		 1436 */
1437
1438void ata_port_probe(struct ata_port *ap)
1439{
1440 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1441}
1442
3be680b7
TH		 1443/**
1444 * sata_print_link_status - Print SATA link status
1445 * @ap: SATA port to printk link status about
1446 *
1447 * This function prints link speed and status of a SATA link.
1448 *
1449 * LOCKING:
1450 * None.
1451 */
1452static void sata_print_link_status(struct ata_port *ap)
1453{
1454 u32 sstatus, tmp;
1455 const char *speed;
1456
1457 if (!ap->ops->scr_read)
1458 return;
1459
1460 sstatus = scr_read(ap, SCR_STATUS);
1461
1462 if (sata_dev_present(ap)) {
1463 tmp = (sstatus >> 4) & 0xf;
1464 if (tmp & (1 << 0))
1465 speed = "1.5";
1466 else if (tmp & (1 << 1))
1467 speed = "3.0";
1468 else
1469 speed = "<unknown>";
1470 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1471 ap->id, speed, sstatus);
1472 } else {
1473 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1474 ap->id, sstatus);
1475 }
1476}
1477
1da177e4 1478/**
780a87f7
JG		 1479 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1480 * @ap: SATA port associated with target SATA PHY.
1da177e4 1481 *
780a87f7
JG		 1482 * This function issues commands to standard SATA Sxxx
1483 * PHY registers, to wake up the phy (and device), and
1484 * clear any reset condition.
1da177e4
LT		 1485 *
1486 * LOCKING:
0cba632b 1487 * PCI/etc. bus probe sem.
1da177e4
LT		 1488 *
1489 */
1490void __sata_phy_reset(struct ata_port *ap)
1491{
1492 u32 sstatus;
1493 unsigned long timeout = jiffies + (HZ * 5);
1494
1495 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1496 /* issue phy wake/reset */
1497 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1498 /* Couldn't find anything in SATA I/II specs, but
1499 * AHCI-1.1 10.4.2 says at least 1 ms. */
1500 mdelay(1);
1da177e4 1501 }
cdcca89e 1502 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1503
1504 /* wait for phy to become ready, if necessary */
1505 do {
1506 msleep(200);
1507 sstatus = scr_read(ap, SCR_STATUS);
1508 if ((sstatus & 0xf) != 1)
1509 break;
1510 } while (time_before(jiffies, timeout));
1511
3be680b7
TH		 1512 /* print link status */
1513 sata_print_link_status(ap);
656563e3 1514
3be680b7
TH		 1515 /* TODO: phy layer with polling, timeouts, etc. */
1516 if (sata_dev_present(ap))
1da177e4 1517 ata_port_probe(ap);
3be680b7 1518 else
1da177e4 1519 ata_port_disable(ap);
1da177e4
LT		 1520
1521 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1522 return;
1523
1524 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1525 ata_port_disable(ap);
1526 return;
1527 }
1528
1529 ap->cbl = ATA_CBL_SATA;
1530}
1531
1532/**
780a87f7
JG		 1533 * sata_phy_reset - Reset SATA bus.
1534 * @ap: SATA port associated with target SATA PHY.
1da177e4 1535 *
780a87f7
JG		 1536 * This function resets the SATA bus, and then probes
1537 * the bus for devices.
1da177e4
LT		 1538 *
1539 * LOCKING:
0cba632b 1540 * PCI/etc. bus probe sem.
1da177e4
LT		 1541 *
1542 */
1543void sata_phy_reset(struct ata_port *ap)
1544{
1545 __sata_phy_reset(ap);
1546 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1547 return;
1548 ata_bus_reset(ap);
1549}
1550
ebdfca6e
AC		 1551/**
1552 * ata_dev_pair - return other device on cable
1553 * @ap: port
1554 * @adev: device
1555 *
1556 * Obtain the other device on the same cable, or if none is
1557 * present NULL is returned
1558 */
2e9edbf8 1559
ebdfca6e
AC		 1560struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1561{
1562 struct ata_device *pair = &ap->device[1 - adev->devno];
1563 if (!ata_dev_present(pair))
1564 return NULL;
1565 return pair;
1566}
1567
1da177e4 1568/**
780a87f7
JG		 1569 * ata_port_disable - Disable port.
1570 * @ap: Port to be disabled.
1da177e4 1571 *
780a87f7
JG		 1572 * Modify @ap data structure such that the system
1573 * thinks that the entire port is disabled, and should
1574 * never attempt to probe or communicate with devices
1575 * on this port.
1576 *
1577 * LOCKING: host_set lock, or some other form of
1578 * serialization.
1da177e4
LT		 1579 */
1580
1581void ata_port_disable(struct ata_port *ap)
1582{
1583 ap->device[0].class = ATA_DEV_NONE;
1584 ap->device[1].class = ATA_DEV_NONE;
1585 ap->flags |= ATA_FLAG_PORT_DISABLED;
1586}
1587
452503f9
AC		 1588/*
1589 * This mode timing computation functionality is ported over from
1590 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1591 */
1592/*
1593 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1594 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1595 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1596 * is currently supported only by Maxtor drives.
452503f9
AC		 1597 */
1598
1599static const struct ata_timing ata_timing[] = {
1600
1601 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1602 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1603 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1604 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1605
1606 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1607 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1608 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1609
1610/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1611
452503f9
AC		 1612 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1613 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1614 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1615
452503f9
AC		 1616 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1617 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1618 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1619
1620/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1621 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1622 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1623
1624 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1625 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1626 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1627
1628/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1629
1630 { 0xFF }
1631};
1632
1633#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1634#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1635
1636static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1637{
1638 q->setup = EZ(t->setup * 1000, T);
1639 q->act8b = EZ(t->act8b * 1000, T);
1640 q->rec8b = EZ(t->rec8b * 1000, T);
1641 q->cyc8b = EZ(t->cyc8b * 1000, T);
1642 q->active = EZ(t->active * 1000, T);
1643 q->recover = EZ(t->recover * 1000, T);
1644 q->cycle = EZ(t->cycle * 1000, T);
1645 q->udma = EZ(t->udma * 1000, UT);
1646}
1647
1648void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1649 struct ata_timing *m, unsigned int what)
1650{
1651 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1652 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1653 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1654 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1655 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1656 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1657 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1658 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1659}
1660
1661static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1662{
1663 const struct ata_timing *t;
1664
1665 for (t = ata_timing; t->mode != speed; t++)
91190758 1666 if (t->mode == 0xFF)
452503f9 1667 return NULL;
2e9edbf8 1668 return t;
452503f9
AC		 1669}
1670
1671int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1672 struct ata_timing *t, int T, int UT)
1673{
1674 const struct ata_timing *s;
1675 struct ata_timing p;
1676
1677 /*
2e9edbf8 1678 * Find the mode.
75b1f2f8 1679 */
452503f9
AC		 1680
1681 if (!(s = ata_timing_find_mode(speed)))
1682 return -EINVAL;
1683
75b1f2f8
AL		 1684 memcpy(t, s, sizeof(*s));
1685
452503f9
AC		 1686 /*
1687 * If the drive is an EIDE drive, it can tell us it needs extended
1688 * PIO/MW_DMA cycle timing.
1689 */
1690
1691 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1692 memset(&p, 0, sizeof(p));
1693 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1694 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1695 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1696 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1697 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1698 }
1699 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1700 }
1701
1702 /*
1703 * Convert the timing to bus clock counts.
1704 */
1705
75b1f2f8 1706 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1707
1708 /*
c893a3ae
RD		 1709 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1710 * S.M.A.R.T * and some other commands. We have to ensure that the
1711 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1712 */
1713
1714 if (speed > XFER_PIO_4) {
1715 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1716 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1717 }
1718
1719 /*
c893a3ae 1720 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1721 */
1722
1723 if (t->act8b + t->rec8b < t->cyc8b) {
1724 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1725 t->rec8b = t->cyc8b - t->act8b;
1726 }
1727
1728 if (t->active + t->recover < t->cycle) {
1729 t->active += (t->cycle - (t->active + t->recover)) / 2;
1730 t->recover = t->cycle - t->active;
1731 }
1732
1733 return 0;
1734}
1735
83206a29 1736static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1737{
83206a29
TH		 1738 unsigned int err_mask;
1739 int rc;
1da177e4
LT		 1740
1741 if (dev->xfer_shift == ATA_SHIFT_PIO)
1742 dev->flags |= ATA_DFLAG_PIO;
1743
83206a29
TH		 1744 err_mask = ata_dev_set_xfermode(ap, dev);
1745 if (err_mask) {
1746 printk(KERN_ERR
1747 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1748 ap->id, err_mask);
1749 return -EIO;
1750 }
1da177e4 1751
83206a29
TH		 1752 rc = ata_dev_revalidate(ap, dev, 0);
1753 if (rc) {
1754 printk(KERN_ERR
1755 "ata%u: failed to revalidate after set xfermode\n",
1756 ap->id);
1757 return rc;
48a8a14f
TH		 1758 }
1759
23e71c3d
TH		 1760 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1761 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1762
1763 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1764 ap->id, dev->devno,
1765 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1766 return 0;
1da177e4
LT		 1767}
1768
1769static int ata_host_set_pio(struct ata_port *ap)
1770{
a6d5a51c 1771 int i;
1da177e4
LT		 1772
1773 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1774 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1775
1776 if (!ata_dev_present(dev))
1777 continue;
1778
1779 if (!dev->pio_mode) {
88f93a31 1780 printk(KERN_WARNING "ata%u: no PIO support for device %d.\n", ap->id, i);
a6d5a51c 1781 return -1;
1da177e4 1782 }
a6d5a51c
TH		 1783
1784 dev->xfer_mode = dev->pio_mode;
1785 dev->xfer_shift = ATA_SHIFT_PIO;
1786 if (ap->ops->set_piomode)
1787 ap->ops->set_piomode(ap, dev);
1da177e4
LT		 1788 }
1789
1790 return 0;
1791}
1792
a6d5a51c 1793static void ata_host_set_dma(struct ata_port *ap)
1da177e4
LT		 1794{
1795 int i;
1796
1797 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1798 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1799
1800 if (!ata_dev_present(dev) || !dev->dma_mode)
1801 continue;
1802
1803 dev->xfer_mode = dev->dma_mode;
1804 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1805 if (ap->ops->set_dmamode)
1806 ap->ops->set_dmamode(ap, dev);
1da177e4
LT		 1807 }
1808}
1809
1810/**
1811 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1812 * @ap: port on which timings will be programmed
1813 *
780a87f7
JG		 1814 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1815 *
1da177e4 1816 * LOCKING:
0cba632b 1817 * PCI/etc. bus probe sem.
1da177e4
LT		 1818 */
1819static void ata_set_mode(struct ata_port *ap)
1820{
a6d5a51c 1821 int i, rc;
1da177e4 1822
a6d5a51c
TH		 1823 /* step 1: calculate xfer_mask */
1824 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1825 struct ata_device *dev = &ap->device[i];
acf356b1 1826 unsigned int pio_mask, dma_mask;
a6d5a51c
TH		 1827
1828 if (!ata_dev_present(dev))
1829 continue;
1830
acf356b1 1831 ata_dev_xfermask(ap, dev);
1da177e4 1832
acf356b1
TH		 1833 /* TODO: let LLDD filter dev->*_mask here */
1834
1835 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1836 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1837 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1838 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
a6d5a51c
TH		 1839 }
1840
1841 /* step 2: always set host PIO timings */
1842 rc = ata_host_set_pio(ap);
1da177e4
LT		 1843 if (rc)
1844 goto err_out;
1845
a6d5a51c
TH		 1846 /* step 3: set host DMA timings */
1847 ata_host_set_dma(ap);
1da177e4
LT		 1848
1849 /* step 4: update devices' xfer mode */
83206a29
TH		 1850 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1851 struct ata_device *dev = &ap->device[i];
1da177e4 1852
83206a29
TH		 1853 if (!ata_dev_present(dev))
1854 continue;
1855
1856 if (ata_dev_set_mode(ap, dev))
1857 goto err_out;
1858 }
1da177e4
LT		 1859
1860 if (ap->ops->post_set_mode)
1861 ap->ops->post_set_mode(ap);
1862
1da177e4
LT		 1863 return;
1864
1865err_out:
1866 ata_port_disable(ap);
1867}
1868
1fdffbce
JG		 1869/**
1870 * ata_tf_to_host - issue ATA taskfile to host controller
1871 * @ap: port to which command is being issued
1872 * @tf: ATA taskfile register set
1873 *
1874 * Issues ATA taskfile register set to ATA host controller,
1875 * with proper synchronization with interrupt handler and
1876 * other threads.
1877 *
1878 * LOCKING:
1879 * spin_lock_irqsave(host_set lock)
1880 */
1881
1882static inline void ata_tf_to_host(struct ata_port *ap,
1883 const struct ata_taskfile *tf)
1884{
1885 ap->ops->tf_load(ap, tf);
1886 ap->ops->exec_command(ap, tf);
1887}
1888
1da177e4
LT		 1889/**
1890 * ata_busy_sleep - sleep until BSY clears, or timeout
1891 * @ap: port containing status register to be polled
1892 * @tmout_pat: impatience timeout
1893 * @tmout: overall timeout
1894 *
780a87f7
JG		 1895 * Sleep until ATA Status register bit BSY clears,
1896 * or a timeout occurs.
1897 *
1898 * LOCKING: None.
1da177e4
LT		 1899 */
1900
6f8b9958
TH		 1901unsigned int ata_busy_sleep (struct ata_port *ap,
1902 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1903{
1904 unsigned long timer_start, timeout;
1905 u8 status;
1906
1907 status = ata_busy_wait(ap, ATA_BUSY, 300);
1908 timer_start = jiffies;
1909 timeout = timer_start + tmout_pat;
1910 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1911 msleep(50);
1912 status = ata_busy_wait(ap, ATA_BUSY, 3);
1913 }
1914
1915 if (status & ATA_BUSY)
1916 printk(KERN_WARNING "ata%u is slow to respond, "
1917 "please be patient\n", ap->id);
1918
1919 timeout = timer_start + tmout;
1920 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1921 msleep(50);
1922 status = ata_chk_status(ap);
1923 }
1924
1925 if (status & ATA_BUSY) {
1926 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1927 ap->id, tmout / HZ);
1928 return 1;
1929 }
1930
1931 return 0;
1932}
1933
1934static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1935{
1936 struct ata_ioports *ioaddr = &ap->ioaddr;
1937 unsigned int dev0 = devmask & (1 << 0);
1938 unsigned int dev1 = devmask & (1 << 1);
1939 unsigned long timeout;
1940
1941 /* if device 0 was found in ata_devchk, wait for its
1942 * BSY bit to clear
1943 */
1944 if (dev0)
1945 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1946
1947 /* if device 1 was found in ata_devchk, wait for
1948 * register access, then wait for BSY to clear
1949 */
1950 timeout = jiffies + ATA_TMOUT_BOOT;
1951 while (dev1) {
1952 u8 nsect, lbal;
1953
1954 ap->ops->dev_select(ap, 1);
1955 if (ap->flags & ATA_FLAG_MMIO) {
1956 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1957 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1958 } else {
1959 nsect = inb(ioaddr->nsect_addr);
1960 lbal = inb(ioaddr->lbal_addr);
1961 }
1962 if ((nsect == 1) && (lbal == 1))
1963 break;
1964 if (time_after(jiffies, timeout)) {
1965 dev1 = 0;
1966 break;
1967 }
1968 msleep(50); /* give drive a breather */
1969 }
1970 if (dev1)
1971 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1972
1973 /* is all this really necessary? */
1974 ap->ops->dev_select(ap, 0);
1975 if (dev1)
1976 ap->ops->dev_select(ap, 1);
1977 if (dev0)
1978 ap->ops->dev_select(ap, 0);
1979}
1980
1da177e4
LT		 1981static unsigned int ata_bus_softreset(struct ata_port *ap,
1982 unsigned int devmask)
1983{
1984 struct ata_ioports *ioaddr = &ap->ioaddr;
1985
1986 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1987
1988 /* software reset. causes dev0 to be selected */
1989 if (ap->flags & ATA_FLAG_MMIO) {
1990 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1991 udelay(20); /* FIXME: flush */
1992 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1993 udelay(20); /* FIXME: flush */
1994 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1995 } else {
1996 outb(ap->ctl, ioaddr->ctl_addr);
1997 udelay(10);
1998 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1999 udelay(10);
2000 outb(ap->ctl, ioaddr->ctl_addr);
2001 }
2002
2003 /* spec mandates ">= 2ms" before checking status.
2004 * We wait 150ms, because that was the magic delay used for
2005 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2006 * between when the ATA command register is written, and then
2007 * status is checked. Because waiting for "a while" before
2008 * checking status is fine, post SRST, we perform this magic
2009 * delay here as well.
09c7ad79
AC		 2010 *
2011 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2012 */
2013 msleep(150);
2014
2e9edbf8 2015 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2016 * the bus shows 0xFF because the odd clown forgets the D7
2017 * pulldown resistor.
2018 */
09c7ad79 2019 if (ata_check_status(ap) == 0xFF)
298a41ca 2020 return AC_ERR_OTHER;
09c7ad79 2021
1da177e4
LT		 2022 ata_bus_post_reset(ap, devmask);
2023
2024 return 0;
2025}
2026
2027/**
2028 * ata_bus_reset - reset host port and associated ATA channel
2029 * @ap: port to reset
2030 *
2031 * This is typically the first time we actually start issuing
2032 * commands to the ATA channel. We wait for BSY to clear, then
2033 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2034 * result. Determine what devices, if any, are on the channel
2035 * by looking at the device 0/1 error register. Look at the signature
2036 * stored in each device's taskfile registers, to determine if
2037 * the device is ATA or ATAPI.
2038 *
2039 * LOCKING:
0cba632b
JG		 2040 * PCI/etc. bus probe sem.
2041 * Obtains host_set lock.
1da177e4
LT		 2042 *
2043 * SIDE EFFECTS:
2044 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2045 */
2046
2047void ata_bus_reset(struct ata_port *ap)
2048{
2049 struct ata_ioports *ioaddr = &ap->ioaddr;
2050 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2051 u8 err;
aec5c3c1 2052 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2053
2054 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2055
2056 /* determine if device 0/1 are present */
2057 if (ap->flags & ATA_FLAG_SATA_RESET)
2058 dev0 = 1;
2059 else {
2060 dev0 = ata_devchk(ap, 0);
2061 if (slave_possible)
2062 dev1 = ata_devchk(ap, 1);
2063 }
2064
2065 if (dev0)
2066 devmask |= (1 << 0);
2067 if (dev1)
2068 devmask |= (1 << 1);
2069
2070 /* select device 0 again */
2071 ap->ops->dev_select(ap, 0);
2072
2073 /* issue bus reset */
2074 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2075 if (ata_bus_softreset(ap, devmask))
2076 goto err_out;
1da177e4
LT		 2077
2078 /*
2079 * determine by signature whether we have ATA or ATAPI devices
2080 */
b4dc7623 2081 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2082 if ((slave_possible) && (err != 0x81))
b4dc7623 2083 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2084
2085 /* re-enable interrupts */
2086 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2087 ata_irq_on(ap);
2088
2089 /* is double-select really necessary? */
2090 if (ap->device[1].class != ATA_DEV_NONE)
2091 ap->ops->dev_select(ap, 1);
2092 if (ap->device[0].class != ATA_DEV_NONE)
2093 ap->ops->dev_select(ap, 0);
2094
2095 /* if no devices were detected, disable this port */
2096 if ((ap->device[0].class == ATA_DEV_NONE) &&
2097 (ap->device[1].class == ATA_DEV_NONE))
2098 goto err_out;
2099
2100 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2101 /* set up device control for ATA_FLAG_SATA_RESET */
2102 if (ap->flags & ATA_FLAG_MMIO)
2103 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2104 else
2105 outb(ap->ctl, ioaddr->ctl_addr);
2106 }
2107
2108 DPRINTK("EXIT\n");
2109 return;
2110
2111err_out:
2112 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2113 ap->ops->port_disable(ap);
2114
2115 DPRINTK("EXIT\n");
2116}
2117
7a7921e8
TH		 2118static int sata_phy_resume(struct ata_port *ap)
2119{
2120 unsigned long timeout = jiffies + (HZ * 5);
2121 u32 sstatus;
2122
2123 scr_write_flush(ap, SCR_CONTROL, 0x300);
2124
2125 /* Wait for phy to become ready, if necessary. */
2126 do {
2127 msleep(200);
2128 sstatus = scr_read(ap, SCR_STATUS);
2129 if ((sstatus & 0xf) != 1)
2130 return 0;
2131 } while (time_before(jiffies, timeout));
2132
2133 return -1;
2134}
2135
8a19ac89
TH		 2136/**
2137 * ata_std_probeinit - initialize probing
2138 * @ap: port to be probed
2139 *
2140 * @ap is about to be probed. Initialize it. This function is
2141 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2142 *
2143 * NOTE!!! Do not use this function as probeinit if a low level
2144 * driver implements only hardreset. Just pass NULL as probeinit
2145 * in that case. Using this function is probably okay but doing
2146 * so makes reset sequence different from the original
2147 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 2148 */
2149extern void ata_std_probeinit(struct ata_port *ap)
2150{
3a39746a 2151 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 2152 sata_phy_resume(ap);
3a39746a
TH		 2153 if (sata_dev_present(ap))
2154 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2155 }
8a19ac89
TH		 2156}
2157
c2bd5804
TH		 2158/**
2159 * ata_std_softreset - reset host port via ATA SRST
2160 * @ap: port to reset
2161 * @verbose: fail verbosely
2162 * @classes: resulting classes of attached devices
2163 *
2164 * Reset host port using ATA SRST. This function is to be used
2165 * as standard callback for ata_drive_*_reset() functions.
2166 *
2167 * LOCKING:
2168 * Kernel thread context (may sleep)
2169 *
2170 * RETURNS:
2171 * 0 on success, -errno otherwise.
2172 */
2173int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2174{
2175 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2176 unsigned int devmask = 0, err_mask;
2177 u8 err;
2178
2179 DPRINTK("ENTER\n");
2180
3a39746a
TH		 2181 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2182 classes[0] = ATA_DEV_NONE;
2183 goto out;
2184 }
2185
c2bd5804
TH		 2186 /* determine if device 0/1 are present */
2187 if (ata_devchk(ap, 0))
2188 devmask |= (1 << 0);
2189 if (slave_possible && ata_devchk(ap, 1))
2190 devmask |= (1 << 1);
2191
c2bd5804
TH		 2192 /* select device 0 again */
2193 ap->ops->dev_select(ap, 0);
2194
2195 /* issue bus reset */
2196 DPRINTK("about to softreset, devmask=%x\n", devmask);
2197 err_mask = ata_bus_softreset(ap, devmask);
2198 if (err_mask) {
2199 if (verbose)
2200 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2201 ap->id, err_mask);
2202 else
2203 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2204 err_mask);
2205 return -EIO;
2206 }
2207
2208 /* determine by signature whether we have ATA or ATAPI devices */
2209 classes[0] = ata_dev_try_classify(ap, 0, &err);
2210 if (slave_possible && err != 0x81)
2211 classes[1] = ata_dev_try_classify(ap, 1, &err);
2212
3a39746a 2213 out:
c2bd5804
TH		 2214 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2215 return 0;
2216}
2217
2218/**
2219 * sata_std_hardreset - reset host port via SATA phy reset
2220 * @ap: port to reset
2221 * @verbose: fail verbosely
2222 * @class: resulting class of attached device
2223 *
2224 * SATA phy-reset host port using DET bits of SControl register.
2225 * This function is to be used as standard callback for
2226 * ata_drive_*_reset().
2227 *
2228 * LOCKING:
2229 * Kernel thread context (may sleep)
2230 *
2231 * RETURNS:
2232 * 0 on success, -errno otherwise.
2233 */
2234int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2235{
c2bd5804
TH		 2236 DPRINTK("ENTER\n");
2237
2238 /* Issue phy wake/reset */
2239 scr_write_flush(ap, SCR_CONTROL, 0x301);
2240
2241 /*
2242 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2243 * 10.4.2 says at least 1 ms.
2244 */
2245 msleep(1);
2246
7a7921e8
TH		 2247 /* Bring phy back */
2248 sata_phy_resume(ap);
c2bd5804 2249
c2bd5804
TH		 2250 /* TODO: phy layer with polling, timeouts, etc. */
2251 if (!sata_dev_present(ap)) {
2252 *class = ATA_DEV_NONE;
2253 DPRINTK("EXIT, link offline\n");
2254 return 0;
2255 }
2256
2257 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2258 if (verbose)
2259 printk(KERN_ERR "ata%u: COMRESET failed "
2260 "(device not ready)\n", ap->id);
2261 else
2262 DPRINTK("EXIT, device not ready\n");
2263 return -EIO;
2264 }
2265
3a39746a
TH		 2266 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2267
c2bd5804
TH		 2268 *class = ata_dev_try_classify(ap, 0, NULL);
2269
2270 DPRINTK("EXIT, class=%u\n", *class);
2271 return 0;
2272}
2273
2274/**
2275 * ata_std_postreset - standard postreset callback
2276 * @ap: the target ata_port
2277 * @classes: classes of attached devices
2278 *
2279 * This function is invoked after a successful reset. Note that
2280 * the device might have been reset more than once using
2281 * different reset methods before postreset is invoked.
c2bd5804
TH		 2282 *
2283 * This function is to be used as standard callback for
2284 * ata_drive_*_reset().
2285 *
2286 * LOCKING:
2287 * Kernel thread context (may sleep)
2288 */
2289void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2290{
2291 DPRINTK("ENTER\n");
2292
56497bd5 2293 /* set cable type if it isn't already set */
c2bd5804
TH		 2294 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2295 ap->cbl = ATA_CBL_SATA;
2296
2297 /* print link status */
2298 if (ap->cbl == ATA_CBL_SATA)
2299 sata_print_link_status(ap);
2300
3a39746a
TH		 2301 /* re-enable interrupts */
2302 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2303 ata_irq_on(ap);
c2bd5804
TH		 2304
2305 /* is double-select really necessary? */
2306 if (classes[0] != ATA_DEV_NONE)
2307 ap->ops->dev_select(ap, 1);
2308 if (classes[1] != ATA_DEV_NONE)
2309 ap->ops->dev_select(ap, 0);
2310
3a39746a
TH		 2311 /* bail out if no device is present */
2312 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2313 DPRINTK("EXIT, no device\n");
2314 return;
2315 }
2316
2317 /* set up device control */
2318 if (ap->ioaddr.ctl_addr) {
2319 if (ap->flags & ATA_FLAG_MMIO)
2320 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2321 else
2322 outb(ap->ctl, ap->ioaddr.ctl_addr);
2323 }
c2bd5804
TH		 2324
2325 DPRINTK("EXIT\n");
2326}
2327
2328/**
2329 * ata_std_probe_reset - standard probe reset method
2330 * @ap: prot to perform probe-reset
2331 * @classes: resulting classes of attached devices
2332 *
2333 * The stock off-the-shelf ->probe_reset method.
2334 *
2335 * LOCKING:
2336 * Kernel thread context (may sleep)
2337 *
2338 * RETURNS:
2339 * 0 on success, -errno otherwise.
2340 */
2341int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2342{
2343 ata_reset_fn_t hardreset;
2344
2345 hardreset = NULL;
b911fc3a 2346 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2347 hardreset = sata_std_hardreset;
2348
8a19ac89 2349 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2350 ata_std_softreset, hardreset,
c2bd5804
TH		 2351 ata_std_postreset, classes);
2352}
2353
a62c0fc5
TH		 2354static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2355 ata_postreset_fn_t postreset,
2356 unsigned int *classes)
2357{
2358 int i, rc;
2359
2360 for (i = 0; i < ATA_MAX_DEVICES; i++)
2361 classes[i] = ATA_DEV_UNKNOWN;
2362
2363 rc = reset(ap, 0, classes);
2364 if (rc)
2365 return rc;
2366
2367 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2368 * is complete and convert all ATA_DEV_UNKNOWN to
2369 * ATA_DEV_NONE.
2370 */
2371 for (i = 0; i < ATA_MAX_DEVICES; i++)
2372 if (classes[i] != ATA_DEV_UNKNOWN)
2373 break;
2374
2375 if (i < ATA_MAX_DEVICES)
2376 for (i = 0; i < ATA_MAX_DEVICES; i++)
2377 if (classes[i] == ATA_DEV_UNKNOWN)
2378 classes[i] = ATA_DEV_NONE;
2379
2380 if (postreset)
2381 postreset(ap, classes);
2382
2383 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2384}
2385
2386/**
2387 * ata_drive_probe_reset - Perform probe reset with given methods
2388 * @ap: port to reset
7944ea95 2389 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2390 * @softreset: softreset method (can be NULL)
2391 * @hardreset: hardreset method (can be NULL)
2392 * @postreset: postreset method (can be NULL)
2393 * @classes: resulting classes of attached devices
2394 *
2395 * Reset the specified port and classify attached devices using
2396 * given methods. This function prefers softreset but tries all
2397 * possible reset sequences to reset and classify devices. This
2398 * function is intended to be used for constructing ->probe_reset
2399 * callback by low level drivers.
2400 *
2401 * Reset methods should follow the following rules.
2402 *
2403 * - Return 0 on sucess, -errno on failure.
2404 * - If classification is supported, fill classes[] with
2405 * recognized class codes.
2406 * - If classification is not supported, leave classes[] alone.
2407 * - If verbose is non-zero, print error message on failure;
2408 * otherwise, shut up.
2409 *
2410 * LOCKING:
2411 * Kernel thread context (may sleep)
2412 *
2413 * RETURNS:
2414 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2415 * if classification fails, and any error code from reset
2416 * methods.
2417 */
7944ea95 2418int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2419 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2420 ata_postreset_fn_t postreset, unsigned int *classes)
2421{
2422 int rc = -EINVAL;
2423
7944ea95
TH		 2424 if (probeinit)
2425 probeinit(ap);
2426
a62c0fc5
TH		 2427 if (softreset) {
2428 rc = do_probe_reset(ap, softreset, postreset, classes);
2429 if (rc == 0)
2430 return 0;
2431 }
2432
2433 if (!hardreset)
2434 return rc;
2435
2436 rc = do_probe_reset(ap, hardreset, postreset, classes);
2437 if (rc == 0 || rc != -ENODEV)
2438 return rc;
2439
2440 if (softreset)
2441 rc = do_probe_reset(ap, softreset, postreset, classes);
2442
2443 return rc;
2444}
2445
623a3128
TH		 2446/**
2447 * ata_dev_same_device - Determine whether new ID matches configured device
2448 * @ap: port on which the device to compare against resides
2449 * @dev: device to compare against
2450 * @new_class: class of the new device
2451 * @new_id: IDENTIFY page of the new device
2452 *
2453 * Compare @new_class and @new_id against @dev and determine
2454 * whether @dev is the device indicated by @new_class and
2455 * @new_id.
2456 *
2457 * LOCKING:
2458 * None.
2459 *
2460 * RETURNS:
2461 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2462 */
2463static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2464 unsigned int new_class, const u16 *new_id)
2465{
2466 const u16 *old_id = dev->id;
2467 unsigned char model[2][41], serial[2][21];
2468 u64 new_n_sectors;
2469
2470 if (dev->class != new_class) {
2471 printk(KERN_INFO
2472 "ata%u: dev %u class mismatch %d != %d\n",
2473 ap->id, dev->devno, dev->class, new_class);
2474 return 0;
2475 }
2476
2477 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2478 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2479 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2480 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2481 new_n_sectors = ata_id_n_sectors(new_id);
2482
2483 if (strcmp(model[0], model[1])) {
2484 printk(KERN_INFO
2485 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2486 ap->id, dev->devno, model[0], model[1]);
2487 return 0;
2488 }
2489
2490 if (strcmp(serial[0], serial[1])) {
2491 printk(KERN_INFO
2492 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2493 ap->id, dev->devno, serial[0], serial[1]);
2494 return 0;
2495 }
2496
2497 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2498 printk(KERN_INFO
2499 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2500 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2501 (unsigned long long)new_n_sectors);
2502 return 0;
2503 }
2504
2505 return 1;
2506}
2507
2508/**
2509 * ata_dev_revalidate - Revalidate ATA device
2510 * @ap: port on which the device to revalidate resides
2511 * @dev: device to revalidate
2512 * @post_reset: is this revalidation after reset?
2513 *
2514 * Re-read IDENTIFY page and make sure @dev is still attached to
2515 * the port.
2516 *
2517 * LOCKING:
2518 * Kernel thread context (may sleep)
2519 *
2520 * RETURNS:
2521 * 0 on success, negative errno otherwise
2522 */
2523int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2524 int post_reset)
2525{
2526 unsigned int class;
2527 u16 *id;
2528 int rc;
2529
2530 if (!ata_dev_present(dev))
2531 return -ENODEV;
2532
2533 class = dev->class;
2534 id = NULL;
2535
2536 /* allocate & read ID data */
2537 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2538 if (rc)
2539 goto fail;
2540
2541 /* is the device still there? */
2542 if (!ata_dev_same_device(ap, dev, class, id)) {
2543 rc = -ENODEV;
2544 goto fail;
2545 }
2546
2547 kfree(dev->id);
2548 dev->id = id;
2549
2550 /* configure device according to the new ID */
2551 return ata_dev_configure(ap, dev, 0);
2552
2553 fail:
2554 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2555 ap->id, dev->devno, rc);
2556 kfree(id);
2557 return rc;
2558}
2559
98ac62de 2560static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2561 "WDC AC11000H", NULL,
2562 "WDC AC22100H", NULL,
2563 "WDC AC32500H", NULL,
2564 "WDC AC33100H", NULL,
2565 "WDC AC31600H", NULL,
2566 "WDC AC32100H", "24.09P07",
2567 "WDC AC23200L", "21.10N21",
2568 "Compaq CRD-8241B", NULL,
2569 "CRD-8400B", NULL,
2570 "CRD-8480B", NULL,
2571 "CRD-8482B", NULL,
2572 "CRD-84", NULL,
2573 "SanDisk SDP3B", NULL,
2574 "SanDisk SDP3B-64", NULL,
2575 "SANYO CD-ROM CRD", NULL,
2576 "HITACHI CDR-8", NULL,
2e9edbf8 2577 "HITACHI CDR-8335", NULL,
f4b15fef 2578 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2579 "Toshiba CD-ROM XM-6202B", NULL,
2580 "TOSHIBA CD-ROM XM-1702BC", NULL,
2581 "CD-532E-A", NULL,
2582 "E-IDE CD-ROM CR-840", NULL,
2583 "CD-ROM Drive/F5A", NULL,
2584 "WPI CDD-820", NULL,
f4b15fef 2585 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2586 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2587 "SanDisk SDP3B-64", NULL,
2588 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2589 "_NEC DV5800A", NULL,
2590 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2591};
2e9edbf8 2592
f4b15fef
AC		 2593static int ata_strim(char *s, size_t len)
2594{
2595 len = strnlen(s, len);
2596
2597 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2598 while ((len > 0) && (s[len - 1] == ' ')) {
2599 len--;
2600 s[len] = 0;
2601 }
2602 return len;
2603}
1da177e4 2604
057ace5e 2605static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2606{
f4b15fef
AC		 2607 unsigned char model_num[40];
2608 unsigned char model_rev[16];
2609 unsigned int nlen, rlen;
1da177e4
LT		 2610 int i;
2611
f4b15fef
AC		 2612 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2613 sizeof(model_num));
2614 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2615 sizeof(model_rev));
2616 nlen = ata_strim(model_num, sizeof(model_num));
2617 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2618
f4b15fef
AC		 2619 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2620 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2621 if (ata_dma_blacklist[i+1] == NULL)
2622 return 1;
2623 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2624 return 1;
2625 }
2626 }
1da177e4
LT		 2627 return 0;
2628}
2629
a6d5a51c
TH		 2630/**
2631 * ata_dev_xfermask - Compute supported xfermask of the given device
2632 * @ap: Port on which the device to compute xfermask for resides
2633 * @dev: Device to compute xfermask for
2634 *
acf356b1
TH		 2635 * Compute supported xfermask of @dev and store it in
2636 * dev->*_mask. This function is responsible for applying all
2637 * known limits including host controller limits, device
2638 * blacklist, etc...
a6d5a51c 2639 *
600511e8
TH		 2640 * FIXME: The current implementation limits all transfer modes to
2641 * the fastest of the lowested device on the port. This is not
05c8e0ac 2642 * required on most controllers.
600511e8 2643 *
a6d5a51c
TH		 2644 * LOCKING:
2645 * None.
a6d5a51c 2646 */
acf356b1 2647static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2648{
a6d5a51c
TH		 2649 unsigned long xfer_mask;
2650 int i;
1da177e4 2651
a6d5a51c
TH		 2652 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2653 ap->udma_mask);
1da177e4 2654
a6d5a51c
TH		 2655 /* use port-wide xfermask for now */
2656 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2657 struct ata_device *d = &ap->device[i];
2658 if (!ata_dev_present(d))
2659 continue;
acf356b1
TH		 2660 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2661 d->udma_mask);
a6d5a51c
TH		 2662 xfer_mask &= ata_id_xfermask(d->id);
2663 if (ata_dma_blacklisted(d))
2664 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2665 }
2666
a6d5a51c
TH		 2667 if (ata_dma_blacklisted(dev))
2668 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2669 "disabling DMA\n", ap->id, dev->devno);
2670
acf356b1
TH		 2671 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2672 &dev->udma_mask);
1da177e4
LT		 2673}
2674
1da177e4
LT		 2675/**
2676 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2677 * @ap: Port associated with device @dev
2678 * @dev: Device to which command will be sent
2679 *
780a87f7
JG		 2680 * Issue SET FEATURES - XFER MODE command to device @dev
2681 * on port @ap.
2682 *
1da177e4 2683 * LOCKING:
0cba632b 2684 * PCI/etc. bus probe sem.
83206a29
TH		 2685 *
2686 * RETURNS:
2687 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2688 */
2689
83206a29
TH		 2690static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2691 struct ata_device *dev)
1da177e4 2692{
a0123703 2693 struct ata_taskfile tf;
83206a29 2694 unsigned int err_mask;
1da177e4
LT		 2695
2696 /* set up set-features taskfile */
2697 DPRINTK("set features - xfer mode\n");
2698
a0123703
TH		 2699 ata_tf_init(ap, &tf, dev->devno);
2700 tf.command = ATA_CMD_SET_FEATURES;
2701 tf.feature = SETFEATURES_XFER;
2702 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2703 tf.protocol = ATA_PROT_NODATA;
2704 tf.nsect = dev->xfer_mode;
1da177e4 2705
83206a29 2706 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
1da177e4 2707
83206a29
TH		 2708 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2709 return err_mask;
1da177e4
LT		 2710}
2711
8bf62ece
AL		 2712/**
2713 * ata_dev_init_params - Issue INIT DEV PARAMS command
2714 * @ap: Port associated with device @dev
2715 * @dev: Device to which command will be sent
2716 *
2717 * LOCKING:
6aff8f1f
TH		 2718 * Kernel thread context (may sleep)
2719 *
2720 * RETURNS:
2721 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2722 */
2723
6aff8f1f
TH		 2724static unsigned int ata_dev_init_params(struct ata_port *ap,
2725 struct ata_device *dev)
8bf62ece 2726{
a0123703 2727 struct ata_taskfile tf;
6aff8f1f 2728 unsigned int err_mask;
8bf62ece
AL		 2729 u16 sectors = dev->id[6];
2730 u16 heads = dev->id[3];
2731
2732 /* Number of sectors per track 1-255. Number of heads 1-16 */
2733 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
6aff8f1f 2734 return 0;
8bf62ece
AL		 2735
2736 /* set up init dev params taskfile */
2737 DPRINTK("init dev params \n");
2738
a0123703
TH		 2739 ata_tf_init(ap, &tf, dev->devno);
2740 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2741 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2742 tf.protocol = ATA_PROT_NODATA;
2743 tf.nsect = sectors;
2744 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2745
6aff8f1f 2746 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2747
6aff8f1f
TH		 2748 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2749 return err_mask;
8bf62ece
AL		 2750}
2751
1da177e4 2752/**
0cba632b
JG		 2753 * ata_sg_clean - Unmap DMA memory associated with command
2754 * @qc: Command containing DMA memory to be released
2755 *
2756 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2757 *
2758 * LOCKING:
0cba632b 2759 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2760 */
2761
2762static void ata_sg_clean(struct ata_queued_cmd *qc)
2763{
2764 struct ata_port *ap = qc->ap;
cedc9a47 2765 struct scatterlist *sg = qc->__sg;
1da177e4 2766 int dir = qc->dma_dir;
cedc9a47 2767 void *pad_buf = NULL;
1da177e4 2768
a4631474
TH		 2769 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2770 WARN_ON(sg == NULL);
1da177e4
LT		 2771
2772 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2773 WARN_ON(qc->n_elem > 1);
1da177e4 2774
2c13b7ce 2775 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2776
cedc9a47
JG		 2777 /* if we padded the buffer out to 32-bit bound, and data
2778 * xfer direction is from-device, we must copy from the
2779 * pad buffer back into the supplied buffer
2780 */
2781 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2782 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2783
2784 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 2785 if (qc->n_elem)
2f1f610b 2786 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2787 /* restore last sg */
2788 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2789 if (pad_buf) {
2790 struct scatterlist *psg = &qc->pad_sgent;
2791 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2792 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2793 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2794 }
2795 } else {
2e242fa9 2796 if (qc->n_elem)
2f1f610b 2797 dma_unmap_single(ap->dev,
e1410f2d
JG		 2798 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2799 dir);
cedc9a47
JG		 2800 /* restore sg */
2801 sg->length += qc->pad_len;
2802 if (pad_buf)
2803 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2804 pad_buf, qc->pad_len);
2805 }
1da177e4
LT		 2806
2807 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2808 qc->__sg = NULL;
1da177e4
LT		 2809}
2810
2811/**
2812 * ata_fill_sg - Fill PCI IDE PRD table
2813 * @qc: Metadata associated with taskfile to be transferred
2814 *
780a87f7
JG		 2815 * Fill PCI IDE PRD (scatter-gather) table with segments
2816 * associated with the current disk command.
2817 *
1da177e4 2818 * LOCKING:
780a87f7 2819 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2820 *
2821 */
2822static void ata_fill_sg(struct ata_queued_cmd *qc)
2823{
1da177e4 2824 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2825 struct scatterlist *sg;
2826 unsigned int idx;
1da177e4 2827
a4631474 2828 WARN_ON(qc->__sg == NULL);
f131883e 2829 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2830
2831 idx = 0;
cedc9a47 2832 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2833 u32 addr, offset;
2834 u32 sg_len, len;
2835
2836 /* determine if physical DMA addr spans 64K boundary.
2837 * Note h/w doesn't support 64-bit, so we unconditionally
2838 * truncate dma_addr_t to u32.
2839 */
2840 addr = (u32) sg_dma_address(sg);
2841 sg_len = sg_dma_len(sg);
2842
2843 while (sg_len) {
2844 offset = addr & 0xffff;
2845 len = sg_len;
2846 if ((offset + sg_len) > 0x10000)
2847 len = 0x10000 - offset;
2848
2849 ap->prd[idx].addr = cpu_to_le32(addr);
2850 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2851 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2852
2853 idx++;
2854 sg_len -= len;
2855 addr += len;
2856 }
2857 }
2858
2859 if (idx)
2860 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2861}
2862/**
2863 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2864 * @qc: Metadata associated with taskfile to check
2865 *
780a87f7
JG		 2866 * Allow low-level driver to filter ATA PACKET commands, returning
2867 * a status indicating whether or not it is OK to use DMA for the
2868 * supplied PACKET command.
2869 *
1da177e4 2870 * LOCKING:
0cba632b
JG		 2871 * spin_lock_irqsave(host_set lock)
2872 *
1da177e4
LT		 2873 * RETURNS: 0 when ATAPI DMA can be used
2874 * nonzero otherwise
2875 */
2876int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2877{
2878 struct ata_port *ap = qc->ap;
2879 int rc = 0; /* Assume ATAPI DMA is OK by default */
2880
2881 if (ap->ops->check_atapi_dma)
2882 rc = ap->ops->check_atapi_dma(qc);
2883
2884 return rc;
2885}
2886/**
2887 * ata_qc_prep - Prepare taskfile for submission
2888 * @qc: Metadata associated with taskfile to be prepared
2889 *
780a87f7
JG		 2890 * Prepare ATA taskfile for submission.
2891 *
1da177e4
LT		 2892 * LOCKING:
2893 * spin_lock_irqsave(host_set lock)
2894 */
2895void ata_qc_prep(struct ata_queued_cmd *qc)
2896{
2897 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2898 return;
2899
2900 ata_fill_sg(qc);
2901}
2902
e46834cd
BK		 2903void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
2904
0cba632b
JG		 2905/**
2906 * ata_sg_init_one - Associate command with memory buffer
2907 * @qc: Command to be associated
2908 * @buf: Memory buffer
2909 * @buflen: Length of memory buffer, in bytes.
2910 *
2911 * Initialize the data-related elements of queued_cmd @qc
2912 * to point to a single memory buffer, @buf of byte length @buflen.
2913 *
2914 * LOCKING:
2915 * spin_lock_irqsave(host_set lock)
2916 */
2917
1da177e4
LT		 2918void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2919{
2920 struct scatterlist *sg;
2921
2922 qc->flags |= ATA_QCFLAG_SINGLE;
2923
2924 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2925 qc->__sg = &qc->sgent;
1da177e4 2926 qc->n_elem = 1;
cedc9a47 2927 qc->orig_n_elem = 1;
1da177e4
LT		 2928 qc->buf_virt = buf;
2929
cedc9a47 2930 sg = qc->__sg;
f0612bbc 2931 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2932}
2933
0cba632b
JG		 2934/**
2935 * ata_sg_init - Associate command with scatter-gather table.
2936 * @qc: Command to be associated
2937 * @sg: Scatter-gather table.
2938 * @n_elem: Number of elements in s/g table.
2939 *
2940 * Initialize the data-related elements of queued_cmd @qc
2941 * to point to a scatter-gather table @sg, containing @n_elem
2942 * elements.
2943 *
2944 * LOCKING:
2945 * spin_lock_irqsave(host_set lock)
2946 */
2947
1da177e4
LT		 2948void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2949 unsigned int n_elem)
2950{
2951 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2952 qc->__sg = sg;
1da177e4 2953 qc->n_elem = n_elem;
cedc9a47 2954 qc->orig_n_elem = n_elem;
1da177e4
LT		 2955}
2956
2957/**
0cba632b
JG		 2958 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2959 * @qc: Command with memory buffer to be mapped.
2960 *
2961 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2962 *
2963 * LOCKING:
2964 * spin_lock_irqsave(host_set lock)
2965 *
2966 * RETURNS:
0cba632b 2967 * Zero on success, negative on error.
1da177e4
LT		 2968 */
2969
2970static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2971{
2972 struct ata_port *ap = qc->ap;
2973 int dir = qc->dma_dir;
cedc9a47 2974 struct scatterlist *sg = qc->__sg;
1da177e4 2975 dma_addr_t dma_address;
2e242fa9 2976 int trim_sg = 0;
1da177e4 2977
cedc9a47
JG		 2978 /* we must lengthen transfers to end on a 32-bit boundary */
2979 qc->pad_len = sg->length & 3;
2980 if (qc->pad_len) {
2981 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2982 struct scatterlist *psg = &qc->pad_sgent;
2983
a4631474 2984 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2985
2986 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2987
2988 if (qc->tf.flags & ATA_TFLAG_WRITE)
2989 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2990 qc->pad_len);
2991
2992 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2993 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2994 /* trim sg */
2995 sg->length -= qc->pad_len;
2e242fa9
TH		 2996 if (sg->length == 0)
2997 trim_sg = 1;
cedc9a47
JG		 2998
2999 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3000 sg->length, qc->pad_len);
3001 }
3002
2e242fa9
TH		 3003 if (trim_sg) {
3004 qc->n_elem--;
e1410f2d
JG		 3005 goto skip_map;
3006 }
3007
2f1f610b 3008 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3009 sg->length, dir);
537a95d9
TH		 3010 if (dma_mapping_error(dma_address)) {
3011 /* restore sg */
3012 sg->length += qc->pad_len;
1da177e4 3013 return -1;
537a95d9 3014 }
1da177e4
LT		 3015
3016 sg_dma_address(sg) = dma_address;
32529e01 3017 sg_dma_len(sg) = sg->length;
1da177e4 3018
2e242fa9 3019skip_map:
1da177e4
LT		 3020 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3021 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3022
3023 return 0;
3024}
3025
3026/**
0cba632b
JG		 3027 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3028 * @qc: Command with scatter-gather table to be mapped.
3029 *
3030 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3031 *
3032 * LOCKING:
3033 * spin_lock_irqsave(host_set lock)
3034 *
3035 * RETURNS:
0cba632b 3036 * Zero on success, negative on error.
1da177e4
LT		 3037 *
3038 */
3039
3040static int ata_sg_setup(struct ata_queued_cmd *qc)
3041{
3042 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3043 struct scatterlist *sg = qc->__sg;
3044 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3045 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3046
3047 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3048 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3049
cedc9a47
JG		 3050 /* we must lengthen transfers to end on a 32-bit boundary */
3051 qc->pad_len = lsg->length & 3;
3052 if (qc->pad_len) {
3053 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3054 struct scatterlist *psg = &qc->pad_sgent;
3055 unsigned int offset;
3056
a4631474 3057 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3058
3059 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3060
3061 /*
3062 * psg->page/offset are used to copy to-be-written
3063 * data in this function or read data in ata_sg_clean.
3064 */
3065 offset = lsg->offset + lsg->length - qc->pad_len;
3066 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3067 psg->offset = offset_in_page(offset);
3068
3069 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3070 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3071 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3072 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3073 }
3074
3075 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3076 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3077 /* trim last sg */
3078 lsg->length -= qc->pad_len;
e1410f2d
JG		 3079 if (lsg->length == 0)
3080 trim_sg = 1;
cedc9a47
JG		 3081
3082 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3083 qc->n_elem - 1, lsg->length, qc->pad_len);
3084 }
3085
e1410f2d
JG		 3086 pre_n_elem = qc->n_elem;
3087 if (trim_sg && pre_n_elem)
3088 pre_n_elem--;
3089
3090 if (!pre_n_elem) {
3091 n_elem = 0;
3092 goto skip_map;
3093 }
3094
1da177e4 3095 dir = qc->dma_dir;
2f1f610b 3096 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3097 if (n_elem < 1) {
3098 /* restore last sg */
3099 lsg->length += qc->pad_len;
1da177e4 3100 return -1;
537a95d9 3101 }
1da177e4
LT		 3102
3103 DPRINTK("%d sg elements mapped\n", n_elem);
3104
e1410f2d 3105skip_map:
1da177e4
LT		 3106 qc->n_elem = n_elem;
3107
3108 return 0;
3109}
3110
40e8c82c
TH		 3111/**
3112 * ata_poll_qc_complete - turn irq back on and finish qc
3113 * @qc: Command to complete
8e8b77dd 3114 * @err_mask: ATA status register content
40e8c82c
TH		 3115 *
3116 * LOCKING:
3117 * None. (grabs host lock)
3118 */
3119
a22e2eb0 3120void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3121{
3122 struct ata_port *ap = qc->ap;
b8f6153e 3123 unsigned long flags;
40e8c82c 3124
b8f6153e 3125 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3126 ap->flags &= ~ATA_FLAG_NOINTR;
3127 ata_irq_on(ap);
a22e2eb0 3128 ata_qc_complete(qc);
b8f6153e 3129 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3130}
3131
1da177e4 3132/**
c893a3ae 3133 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3134 * @ap: the target ata_port
1da177e4
LT		 3135 *
3136 * LOCKING:
0cba632b 3137 * None. (executing in kernel thread context)
1da177e4
LT		 3138 *
3139 * RETURNS:
6f0ef4fa 3140 * timeout value to use
1da177e4
LT		 3141 */
3142
3143static unsigned long ata_pio_poll(struct ata_port *ap)
3144{
c14b8331 3145 struct ata_queued_cmd *qc;
1da177e4 3146 u8 status;
14be71f4
AL		 3147 unsigned int poll_state = HSM_ST_UNKNOWN;
3148 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3149
c14b8331 3150 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3151 WARN_ON(qc == NULL);
c14b8331 3152
14be71f4
AL		 3153 switch (ap->hsm_task_state) {
3154 case HSM_ST:
3155 case HSM_ST_POLL:
3156 poll_state = HSM_ST_POLL;
3157 reg_state = HSM_ST;
1da177e4 3158 break;
14be71f4
AL		 3159 case HSM_ST_LAST:
3160 case HSM_ST_LAST_POLL:
3161 poll_state = HSM_ST_LAST_POLL;
3162 reg_state = HSM_ST_LAST;
1da177e4
LT		 3163 break;
3164 default:
3165 BUG();
3166 break;
3167 }
3168
3169 status = ata_chk_status(ap);
3170 if (status & ATA_BUSY) {
3171 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3172 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3173 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3174 return 0;
3175 }
14be71f4 3176 ap->hsm_task_state = poll_state;
1da177e4
LT		 3177 return ATA_SHORT_PAUSE;
3178 }
3179
14be71f4 3180 ap->hsm_task_state = reg_state;
1da177e4
LT		 3181 return 0;
3182}
3183
3184/**
6f0ef4fa
RD		 3185 * ata_pio_complete - check if drive is busy or idle
3186 * @ap: the target ata_port
1da177e4
LT		 3187 *
3188 * LOCKING:
0cba632b 3189 * None. (executing in kernel thread context)
7fb6ec28
JG		 3190 *
3191 * RETURNS:
3192 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3193 */
3194
7fb6ec28 3195static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3196{
3197 struct ata_queued_cmd *qc;
3198 u8 drv_stat;
3199
3200 /*
31433ea3
AC		 3201 * This is purely heuristic. This is a fast path. Sometimes when
3202 * we enter, BSY will be cleared in a chk-status or two. If not,
3203 * the drive is probably seeking or something. Snooze for a couple
3204 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3205 * HSM_ST_POLL state.
1da177e4 3206 */
fe79e683
AL		 3207 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3208 if (drv_stat & ATA_BUSY) {
1da177e4 3209 msleep(2);
fe79e683
AL		 3210 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3211 if (drv_stat & ATA_BUSY) {
14be71f4 3212 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3213 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3214 return 0;
1da177e4
LT		 3215 }
3216 }
3217
c14b8331 3218 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3219 WARN_ON(qc == NULL);
c14b8331 3220
1da177e4
LT		 3221 drv_stat = ata_wait_idle(ap);
3222 if (!ata_ok(drv_stat)) {
1c848984 3223 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3224 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3225 return 0;
1da177e4
LT		 3226 }
3227
14be71f4 3228 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3229
a4631474 3230 WARN_ON(qc->err_mask);
a22e2eb0 3231 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3232
3233 /* another command may start at this point */
3234
3235 return 1;
1da177e4
LT		 3236}
3237
0baab86b
EF		 3238
3239/**
c893a3ae 3240 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3241 * @buf: Buffer to swap
3242 * @buf_words: Number of 16-bit words in buffer.
3243 *
3244 * Swap halves of 16-bit words if needed to convert from
3245 * little-endian byte order to native cpu byte order, or
3246 * vice-versa.
3247 *
3248 * LOCKING:
6f0ef4fa 3249 * Inherited from caller.
0baab86b 3250 */
1da177e4
LT		 3251void swap_buf_le16(u16 *buf, unsigned int buf_words)
3252{
3253#ifdef __BIG_ENDIAN
3254 unsigned int i;
3255
3256 for (i = 0; i < buf_words; i++)
3257 buf[i] = le16_to_cpu(buf[i]);
3258#endif /* __BIG_ENDIAN */
3259}
3260
6ae4cfb5
AL		 3261/**
3262 * ata_mmio_data_xfer - Transfer data by MMIO
3263 * @ap: port to read/write
3264 * @buf: data buffer
3265 * @buflen: buffer length
344babaa 3266 * @write_data: read/write
6ae4cfb5
AL		 3267 *
3268 * Transfer data from/to the device data register by MMIO.
3269 *
3270 * LOCKING:
3271 * Inherited from caller.
6ae4cfb5
AL		 3272 */
3273
1da177e4
LT		 3274static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3275 unsigned int buflen, int write_data)
3276{
3277 unsigned int i;
3278 unsigned int words = buflen >> 1;
3279 u16 *buf16 = (u16 *) buf;
3280 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3281
6ae4cfb5 3282 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3283 if (write_data) {
3284 for (i = 0; i < words; i++)
3285 writew(le16_to_cpu(buf16[i]), mmio);
3286 } else {
3287 for (i = 0; i < words; i++)
3288 buf16[i] = cpu_to_le16(readw(mmio));
3289 }
6ae4cfb5
AL		 3290
3291 /* Transfer trailing 1 byte, if any. */
3292 if (unlikely(buflen & 0x01)) {
3293 u16 align_buf[1] = { 0 };
3294 unsigned char *trailing_buf = buf + buflen - 1;
3295
3296 if (write_data) {
3297 memcpy(align_buf, trailing_buf, 1);
3298 writew(le16_to_cpu(align_buf[0]), mmio);
3299 } else {
3300 align_buf[0] = cpu_to_le16(readw(mmio));
3301 memcpy(trailing_buf, align_buf, 1);
3302 }
3303 }
1da177e4
LT		 3304}
3305
6ae4cfb5
AL		 3306/**
3307 * ata_pio_data_xfer - Transfer data by PIO
3308 * @ap: port to read/write
3309 * @buf: data buffer
3310 * @buflen: buffer length
344babaa 3311 * @write_data: read/write
6ae4cfb5
AL		 3312 *
3313 * Transfer data from/to the device data register by PIO.
3314 *
3315 * LOCKING:
3316 * Inherited from caller.
6ae4cfb5
AL		 3317 */
3318
1da177e4
LT		 3319static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3320 unsigned int buflen, int write_data)
3321{
6ae4cfb5 3322 unsigned int words = buflen >> 1;
1da177e4 3323
6ae4cfb5 3324 /* Transfer multiple of 2 bytes */
1da177e4 3325 if (write_data)
6ae4cfb5 3326 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3327 else
6ae4cfb5
AL		 3328 insw(ap->ioaddr.data_addr, buf, words);
3329
3330 /* Transfer trailing 1 byte, if any. */
3331 if (unlikely(buflen & 0x01)) {
3332 u16 align_buf[1] = { 0 };
3333 unsigned char *trailing_buf = buf + buflen - 1;
3334
3335 if (write_data) {
3336 memcpy(align_buf, trailing_buf, 1);
3337 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3338 } else {
3339 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3340 memcpy(trailing_buf, align_buf, 1);
3341 }
3342 }
1da177e4
LT		 3343}
3344
6ae4cfb5
AL		 3345/**
3346 * ata_data_xfer - Transfer data from/to the data register.
3347 * @ap: port to read/write
3348 * @buf: data buffer
3349 * @buflen: buffer length
3350 * @do_write: read/write
3351 *
3352 * Transfer data from/to the device data register.
3353 *
3354 * LOCKING:
3355 * Inherited from caller.
6ae4cfb5
AL		 3356 */
3357
1da177e4
LT		 3358static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3359 unsigned int buflen, int do_write)
3360{
a1bd9e68
AC		 3361 /* Make the crap hardware pay the costs not the good stuff */
3362 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3363 unsigned long flags;
3364 local_irq_save(flags);
3365 if (ap->flags & ATA_FLAG_MMIO)
3366 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3367 else
3368 ata_pio_data_xfer(ap, buf, buflen, do_write);
3369 local_irq_restore(flags);
3370 } else {
3371 if (ap->flags & ATA_FLAG_MMIO)
3372 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3373 else
3374 ata_pio_data_xfer(ap, buf, buflen, do_write);
3375 }
1da177e4
LT		 3376}
3377
6ae4cfb5
AL		 3378/**
3379 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3380 * @qc: Command on going
3381 *
3382 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3383 *
3384 * LOCKING:
3385 * Inherited from caller.
3386 */
3387
1da177e4
LT		 3388static void ata_pio_sector(struct ata_queued_cmd *qc)
3389{
3390 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3391 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3392 struct ata_port *ap = qc->ap;
3393 struct page *page;
3394 unsigned int offset;
3395 unsigned char *buf;
3396
3397 if (qc->cursect == (qc->nsect - 1))
14be71f4 3398 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3399
3400 page = sg[qc->cursg].page;
3401 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3402
3403 /* get the current page and offset */
3404 page = nth_page(page, (offset >> PAGE_SHIFT));
3405 offset %= PAGE_SIZE;
3406
3407 buf = kmap(page) + offset;
3408
3409 qc->cursect++;
3410 qc->cursg_ofs++;
3411
32529e01 3412 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3413 qc->cursg++;
3414 qc->cursg_ofs = 0;
3415 }
3416
3417 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3418
3419 /* do the actual data transfer */
3420 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3421 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3422
3423 kunmap(page);
3424}
3425
6ae4cfb5
AL		 3426/**
3427 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3428 * @qc: Command on going
3429 * @bytes: number of bytes
3430 *
3431 * Transfer Transfer data from/to the ATAPI device.
3432 *
3433 * LOCKING:
3434 * Inherited from caller.
3435 *
3436 */
3437
1da177e4
LT		 3438static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3439{
3440 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3441 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3442 struct ata_port *ap = qc->ap;
3443 struct page *page;
3444 unsigned char *buf;
3445 unsigned int offset, count;
3446
563a6e1f 3447 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3448 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3449
3450next_sg:
563a6e1f 3451 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3452 /*
563a6e1f
AL		 3453 * The end of qc->sg is reached and the device expects
3454 * more data to transfer. In order not to overrun qc->sg
3455 * and fulfill length specified in the byte count register,
3456 * - for read case, discard trailing data from the device
3457 * - for write case, padding zero data to the device
3458 */
3459 u16 pad_buf[1] = { 0 };
3460 unsigned int words = bytes >> 1;
3461 unsigned int i;
3462
3463 if (words) /* warning if bytes > 1 */
7fb6ec28 3464 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3465 ap->id, bytes);
3466
3467 for (i = 0; i < words; i++)
3468 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3469
14be71f4 3470 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3471 return;
3472 }
3473
cedc9a47 3474 sg = &qc->__sg[qc->cursg];
1da177e4 3475
1da177e4
LT		 3476 page = sg->page;
3477 offset = sg->offset + qc->cursg_ofs;
3478
3479 /* get the current page and offset */
3480 page = nth_page(page, (offset >> PAGE_SHIFT));
3481 offset %= PAGE_SIZE;
3482
6952df03 3483 /* don't overrun current sg */
32529e01 3484 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3485
3486 /* don't cross page boundaries */
3487 count = min(count, (unsigned int)PAGE_SIZE - offset);
3488
3489 buf = kmap(page) + offset;
3490
3491 bytes -= count;
3492 qc->curbytes += count;
3493 qc->cursg_ofs += count;
3494
32529e01 3495 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3496 qc->cursg++;
3497 qc->cursg_ofs = 0;
3498 }
3499
3500 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3501
3502 /* do the actual data transfer */
3503 ata_data_xfer(ap, buf, count, do_write);
3504
3505 kunmap(page);
3506
563a6e1f 3507 if (bytes)
1da177e4 3508 goto next_sg;
1da177e4
LT		 3509}
3510
6ae4cfb5
AL		 3511/**
3512 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3513 * @qc: Command on going
3514 *
3515 * Transfer Transfer data from/to the ATAPI device.
3516 *
3517 * LOCKING:
3518 * Inherited from caller.
6ae4cfb5
AL		 3519 */
3520
1da177e4
LT		 3521static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3522{
3523 struct ata_port *ap = qc->ap;
3524 struct ata_device *dev = qc->dev;
3525 unsigned int ireason, bc_lo, bc_hi, bytes;
3526 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3527
3528 ap->ops->tf_read(ap, &qc->tf);
3529 ireason = qc->tf.nsect;
3530 bc_lo = qc->tf.lbam;
3531 bc_hi = qc->tf.lbah;
3532 bytes = (bc_hi << 8) | bc_lo;
3533
3534 /* shall be cleared to zero, indicating xfer of data */
3535 if (ireason & (1 << 0))
3536 goto err_out;
3537
3538 /* make sure transfer direction matches expected */
3539 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3540 if (do_write != i_write)
3541 goto err_out;
3542
3543 __atapi_pio_bytes(qc, bytes);
3544
3545 return;
3546
3547err_out:
3548 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3549 ap->id, dev->devno);
11a56d24 3550 qc->err_mask |= AC_ERR_HSM;
14be71f4 3551 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3552}
3553
3554/**
6f0ef4fa
RD		 3555 * ata_pio_block - start PIO on a block
3556 * @ap: the target ata_port
1da177e4
LT		 3557 *
3558 * LOCKING:
0cba632b 3559 * None. (executing in kernel thread context)
1da177e4
LT		 3560 */
3561
3562static void ata_pio_block(struct ata_port *ap)
3563{
3564 struct ata_queued_cmd *qc;
3565 u8 status;
3566
3567 /*
6f0ef4fa 3568 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3569 * Sometimes when we enter, BSY will be cleared in
3570 * a chk-status or two. If not, the drive is probably seeking
3571 * or something. Snooze for a couple msecs, then
3572 * chk-status again. If still busy, fall back to
14be71f4 3573 * HSM_ST_POLL state.
1da177e4
LT		 3574 */
3575 status = ata_busy_wait(ap, ATA_BUSY, 5);
3576 if (status & ATA_BUSY) {
3577 msleep(2);
3578 status = ata_busy_wait(ap, ATA_BUSY, 10);
3579 if (status & ATA_BUSY) {
14be71f4 3580 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3581 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3582 return;
3583 }
3584 }
3585
3586 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3587 WARN_ON(qc == NULL);
1da177e4 3588
fe79e683
AL		 3589 /* check error */
3590 if (status & (ATA_ERR | ATA_DF)) {
3591 qc->err_mask |= AC_ERR_DEV;
3592 ap->hsm_task_state = HSM_ST_ERR;
3593 return;
3594 }
3595
3596 /* transfer data if any */
1da177e4 3597 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3598 /* DRQ=0 means no more data to transfer */
1da177e4 3599 if ((status & ATA_DRQ) == 0) {
14be71f4 3600 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3601 return;
3602 }
3603
3604 atapi_pio_bytes(qc);
3605 } else {
3606 /* handle BSY=0, DRQ=0 as error */
3607 if ((status & ATA_DRQ) == 0) {
11a56d24 3608 qc->err_mask |= AC_ERR_HSM;
14be71f4 3609 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3610 return;
3611 }
3612
3613 ata_pio_sector(qc);
3614 }
3615}
3616
3617static void ata_pio_error(struct ata_port *ap)
3618{
3619 struct ata_queued_cmd *qc;
a7dac447 3620
1da177e4 3621 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3622 WARN_ON(qc == NULL);
1da177e4 3623
0565c26d
AL		 3624 if (qc->tf.command != ATA_CMD_PACKET)
3625 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3626
2e9edbf8 3627 /* make sure qc->err_mask is available to
1c848984
AL		 3628 * know what's wrong and recover
3629 */
a4631474 3630 WARN_ON(qc->err_mask == 0);
1c848984 3631
14be71f4 3632 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3633
a22e2eb0 3634 ata_poll_qc_complete(qc);
1da177e4
LT		 3635}
3636
3637static void ata_pio_task(void *_data)
3638{
3639 struct ata_port *ap = _data;
7fb6ec28
JG		 3640 unsigned long timeout;
3641 int qc_completed;
3642
3643fsm_start:
3644 timeout = 0;
3645 qc_completed = 0;
1da177e4 3646
14be71f4
AL		 3647 switch (ap->hsm_task_state) {
3648 case HSM_ST_IDLE:
1da177e4
LT		 3649 return;
3650
14be71f4 3651 case HSM_ST:
1da177e4
LT		 3652 ata_pio_block(ap);
3653 break;
3654
14be71f4 3655 case HSM_ST_LAST:
7fb6ec28 3656 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3657 break;
3658
14be71f4
AL		 3659 case HSM_ST_POLL:
3660 case HSM_ST_LAST_POLL:
1da177e4
LT		 3661 timeout = ata_pio_poll(ap);
3662 break;
3663
14be71f4
AL		 3664 case HSM_ST_TMOUT:
3665 case HSM_ST_ERR:
1da177e4
LT		 3666 ata_pio_error(ap);
3667 return;
3668 }
3669
3670 if (timeout)
8061f5f0 3671 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3672 else if (!qc_completed)
3673 goto fsm_start;
1da177e4
LT		 3674}
3675
8061f5f0
TH		 3676/**
3677 * atapi_packet_task - Write CDB bytes to hardware
3678 * @_data: Port to which ATAPI device is attached.
3679 *
3680 * When device has indicated its readiness to accept
3681 * a CDB, this function is called. Send the CDB.
3682 * If DMA is to be performed, exit immediately.
3683 * Otherwise, we are in polling mode, so poll
3684 * status under operation succeeds or fails.
3685 *
3686 * LOCKING:
3687 * Kernel thread context (may sleep)
3688 */
3689
3690static void atapi_packet_task(void *_data)
3691{
3692 struct ata_port *ap = _data;
3693 struct ata_queued_cmd *qc;
3694 u8 status;
3695
3696 qc = ata_qc_from_tag(ap, ap->active_tag);
3697 WARN_ON(qc == NULL);
3698 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3699
3700 /* sleep-wait for BSY to clear */
3701 DPRINTK("busy wait\n");
3702 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3703 qc->err_mask |= AC_ERR_TIMEOUT;
3704 goto err_out;
3705 }
3706
3707 /* make sure DRQ is set */
3708 status = ata_chk_status(ap);
3709 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3710 qc->err_mask |= AC_ERR_HSM;
3711 goto err_out;
3712 }
3713
3714 /* send SCSI cdb */
3715 DPRINTK("send cdb\n");
3716 WARN_ON(qc->dev->cdb_len < 12);
3717
3718 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3719 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3720 unsigned long flags;
3721
3722 /* Once we're done issuing command and kicking bmdma,
3723 * irq handler takes over. To not lose irq, we need
3724 * to clear NOINTR flag before sending cdb, but
3725 * interrupt handler shouldn't be invoked before we're
3726 * finished. Hence, the following locking.
3727 */
3728 spin_lock_irqsave(&ap->host_set->lock, flags);
3729 ap->flags &= ~ATA_FLAG_NOINTR;
3730 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3731 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3732 ap->ops->bmdma_start(qc); /* initiate bmdma */
3733 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3734 } else {
3735 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3736
3737 /* PIO commands are handled by polling */
3738 ap->hsm_task_state = HSM_ST;
3739 ata_port_queue_task(ap, ata_pio_task, ap, 0);
3740 }
3741
3742 return;
3743
3744err_out:
3745 ata_poll_qc_complete(qc);
3746}
3747
1da177e4
LT		 3748/**
3749 * ata_qc_timeout - Handle timeout of queued command
3750 * @qc: Command that timed out
3751 *
3752 * Some part of the kernel (currently, only the SCSI layer)
3753 * has noticed that the active command on port @ap has not
3754 * completed after a specified length of time. Handle this
3755 * condition by disabling DMA (if necessary) and completing
3756 * transactions, with error if necessary.
3757 *
3758 * This also handles the case of the "lost interrupt", where
3759 * for some reason (possibly hardware bug, possibly driver bug)
3760 * an interrupt was not delivered to the driver, even though the
3761 * transaction completed successfully.
3762 *
3763 * LOCKING:
0cba632b 3764 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3765 */
3766
3767static void ata_qc_timeout(struct ata_queued_cmd *qc)
3768{
3769 struct ata_port *ap = qc->ap;
b8f6153e 3770 struct ata_host_set *host_set = ap->host_set;
1da177e4 3771 u8 host_stat = 0, drv_stat;
b8f6153e 3772 unsigned long flags;
1da177e4
LT		 3773
3774 DPRINTK("ENTER\n");
3775
c18d06f8
TH		 3776 ap->hsm_task_state = HSM_ST_IDLE;
3777
b8f6153e
JG		 3778 spin_lock_irqsave(&host_set->lock, flags);
3779
1da177e4
LT		 3780 switch (qc->tf.protocol) {
3781
3782 case ATA_PROT_DMA:
3783 case ATA_PROT_ATAPI_DMA:
3784 host_stat = ap->ops->bmdma_status(ap);
3785
3786 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3787 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3788
3789 /* fall through */
3790
3791 default:
3792 ata_altstatus(ap);
3793 drv_stat = ata_chk_status(ap);
3794
3795 /* ack bmdma irq events */
3796 ap->ops->irq_clear(ap);
3797
3798 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3799 ap->id, qc->tf.command, drv_stat, host_stat);
3800
3801 /* complete taskfile transaction */
a22e2eb0 3802 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3803 break;
3804 }
b8f6153e
JG		 3805
3806 spin_unlock_irqrestore(&host_set->lock, flags);
3807
a72ec4ce
TH		 3808 ata_eh_qc_complete(qc);
3809
1da177e4
LT		 3810 DPRINTK("EXIT\n");
3811}
3812
3813/**
3814 * ata_eng_timeout - Handle timeout of queued command
3815 * @ap: Port on which timed-out command is active
3816 *
3817 * Some part of the kernel (currently, only the SCSI layer)
3818 * has noticed that the active command on port @ap has not
3819 * completed after a specified length of time. Handle this
3820 * condition by disabling DMA (if necessary) and completing
3821 * transactions, with error if necessary.
3822 *
3823 * This also handles the case of the "lost interrupt", where
3824 * for some reason (possibly hardware bug, possibly driver bug)
3825 * an interrupt was not delivered to the driver, even though the
3826 * transaction completed successfully.
3827 *
3828 * LOCKING:
3829 * Inherited from SCSI layer (none, can sleep)
3830 */
3831
3832void ata_eng_timeout(struct ata_port *ap)
3833{
1da177e4
LT		 3834 DPRINTK("ENTER\n");
3835
f6379020 3836 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3837
1da177e4
LT		 3838 DPRINTK("EXIT\n");
3839}
3840
3841/**
3842 * ata_qc_new - Request an available ATA command, for queueing
3843 * @ap: Port associated with device @dev
3844 * @dev: Device from whom we request an available command structure
3845 *
3846 * LOCKING:
0cba632b 3847 * None.
1da177e4
LT		 3848 */
3849
3850static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3851{
3852 struct ata_queued_cmd *qc = NULL;
3853 unsigned int i;
3854
3855 for (i = 0; i < ATA_MAX_QUEUE; i++)
3856 if (!test_and_set_bit(i, &ap->qactive)) {
3857 qc = ata_qc_from_tag(ap, i);
3858 break;
3859 }
3860
3861 if (qc)
3862 qc->tag = i;
3863
3864 return qc;
3865}
3866
3867/**
3868 * ata_qc_new_init - Request an available ATA command, and initialize it
3869 * @ap: Port associated with device @dev
3870 * @dev: Device from whom we request an available command structure
3871 *
3872 * LOCKING:
0cba632b 3873 * None.
1da177e4
LT		 3874 */
3875
3876struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3877 struct ata_device *dev)
3878{
3879 struct ata_queued_cmd *qc;
3880
3881 qc = ata_qc_new(ap);
3882 if (qc) {
1da177e4
LT		 3883 qc->scsicmd = NULL;
3884 qc->ap = ap;
3885 qc->dev = dev;
1da177e4 3886
2c13b7ce 3887 ata_qc_reinit(qc);
1da177e4
LT		 3888 }
3889
3890 return qc;
3891}
3892
1da177e4
LT		 3893/**
3894 * ata_qc_free - free unused ata_queued_cmd
3895 * @qc: Command to complete
3896 *
3897 * Designed to free unused ata_queued_cmd object
3898 * in case something prevents using it.
3899 *
3900 * LOCKING:
0cba632b 3901 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3902 */
3903void ata_qc_free(struct ata_queued_cmd *qc)
3904{
4ba946e9
TH		 3905 struct ata_port *ap = qc->ap;
3906 unsigned int tag;
3907
a4631474 3908 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3909
4ba946e9
TH		 3910 qc->flags = 0;
3911 tag = qc->tag;
3912 if (likely(ata_tag_valid(tag))) {
3913 if (tag == ap->active_tag)
3914 ap->active_tag = ATA_TAG_POISON;
3915 qc->tag = ATA_TAG_POISON;
3916 clear_bit(tag, &ap->qactive);
3917 }
1da177e4
LT		 3918}
3919
76014427 3920void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3921{
a4631474
TH		 3922 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3923 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3924
3925 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3926 ata_sg_clean(qc);
3927
3f3791d3
AL		 3928 /* atapi: mark qc as inactive to prevent the interrupt handler
3929 * from completing the command twice later, before the error handler
3930 * is called. (when rc != 0 and atapi request sense is needed)
3931 */
3932 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3933
1da177e4 3934 /* call completion callback */
77853bf2 3935 qc->complete_fn(qc);
1da177e4
LT		 3936}
3937
3938static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3939{
3940 struct ata_port *ap = qc->ap;
3941
3942 switch (qc->tf.protocol) {
3943 case ATA_PROT_DMA:
3944 case ATA_PROT_ATAPI_DMA:
3945 return 1;
3946
3947 case ATA_PROT_ATAPI:
3948 case ATA_PROT_PIO:
1da177e4
LT		 3949 if (ap->flags & ATA_FLAG_PIO_DMA)
3950 return 1;
3951
3952 /* fall through */
3953
3954 default:
3955 return 0;
3956 }
3957
3958 /* never reached */
3959}
3960
3961/**
3962 * ata_qc_issue - issue taskfile to device
3963 * @qc: command to issue to device
3964 *
3965 * Prepare an ATA command to submission to device.
3966 * This includes mapping the data into a DMA-able
3967 * area, filling in the S/G table, and finally
3968 * writing the taskfile to hardware, starting the command.
3969 *
3970 * LOCKING:
3971 * spin_lock_irqsave(host_set lock)
3972 *
3973 * RETURNS:
9a3d9eb0 3974 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3975 */
3976
9a3d9eb0 3977unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3978{
3979 struct ata_port *ap = qc->ap;
3980
3981 if (ata_should_dma_map(qc)) {
3982 if (qc->flags & ATA_QCFLAG_SG) {
3983 if (ata_sg_setup(qc))
8e436af9 3984 goto sg_err;
1da177e4
LT		 3985 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3986 if (ata_sg_setup_one(qc))
8e436af9 3987 goto sg_err;
1da177e4
LT		 3988 }
3989 } else {
3990 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3991 }
3992
3993 ap->ops->qc_prep(qc);
3994
3995 qc->ap->active_tag = qc->tag;
3996 qc->flags |= ATA_QCFLAG_ACTIVE;
3997
3998 return ap->ops->qc_issue(qc);
3999
8e436af9
TH		 4000sg_err:
4001 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 4002 return AC_ERR_SYSTEM;
1da177e4
LT		 4003}
4004
0baab86b 4005
1da177e4
LT		 4006/**
4007 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4008 * @qc: command to issue to device
4009 *
4010 * Using various libata functions and hooks, this function
4011 * starts an ATA command. ATA commands are grouped into
4012 * classes called "protocols", and issuing each type of protocol
4013 * is slightly different.
4014 *
0baab86b
EF		 4015 * May be used as the qc_issue() entry in ata_port_operations.
4016 *
1da177e4
LT		 4017 * LOCKING:
4018 * spin_lock_irqsave(host_set lock)
4019 *
4020 * RETURNS:
9a3d9eb0 4021 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4022 */
4023
9a3d9eb0 4024unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4025{
4026 struct ata_port *ap = qc->ap;
4027
4028 ata_dev_select(ap, qc->dev->devno, 1, 0);
4029
4030 switch (qc->tf.protocol) {
4031 case ATA_PROT_NODATA:
e5338254 4032 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4033 break;
4034
4035 case ATA_PROT_DMA:
4036 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4037 ap->ops->bmdma_setup(qc); /* set up bmdma */
4038 ap->ops->bmdma_start(qc); /* initiate bmdma */
4039 break;
4040
4041 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4042 ata_qc_set_polling(qc);
e5338254 4043 ata_tf_to_host(ap, &qc->tf);
14be71f4 4044 ap->hsm_task_state = HSM_ST;
8061f5f0 4045 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4046 break;
4047
4048 case ATA_PROT_ATAPI:
4049 ata_qc_set_polling(qc);
e5338254 4050 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4051 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4052 break;
4053
4054 case ATA_PROT_ATAPI_NODATA:
c1389503 4055 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4056 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4057 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4058 break;
4059
4060 case ATA_PROT_ATAPI_DMA:
c1389503 4061 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4062 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4063 ap->ops->bmdma_setup(qc); /* set up bmdma */
8061f5f0 4064 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4065 break;
4066
4067 default:
4068 WARN_ON(1);
9a3d9eb0 4069 return AC_ERR_SYSTEM;
1da177e4
LT		 4070 }
4071
4072 return 0;
4073}
4074
1da177e4
LT		 4075/**
4076 * ata_host_intr - Handle host interrupt for given (port, task)
4077 * @ap: Port on which interrupt arrived (possibly...)
4078 * @qc: Taskfile currently active in engine
4079 *
4080 * Handle host interrupt for given queued command. Currently,
4081 * only DMA interrupts are handled. All other commands are
4082 * handled via polling with interrupts disabled (nIEN bit).
4083 *
4084 * LOCKING:
4085 * spin_lock_irqsave(host_set lock)
4086 *
4087 * RETURNS:
4088 * One if interrupt was handled, zero if not (shared irq).
4089 */
4090
4091inline unsigned int ata_host_intr (struct ata_port *ap,
4092 struct ata_queued_cmd *qc)
4093{
4094 u8 status, host_stat;
4095
4096 switch (qc->tf.protocol) {
4097
4098 case ATA_PROT_DMA:
4099 case ATA_PROT_ATAPI_DMA:
4100 case ATA_PROT_ATAPI:
4101 /* check status of DMA engine */
4102 host_stat = ap->ops->bmdma_status(ap);
4103 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4104
4105 /* if it's not our irq... */
4106 if (!(host_stat & ATA_DMA_INTR))
4107 goto idle_irq;
4108
4109 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4110 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4111
4112 /* fall through */
4113
4114 case ATA_PROT_ATAPI_NODATA:
4115 case ATA_PROT_NODATA:
4116 /* check altstatus */
4117 status = ata_altstatus(ap);
4118 if (status & ATA_BUSY)
4119 goto idle_irq;
4120
4121 /* check main status, clearing INTRQ */
4122 status = ata_chk_status(ap);
4123 if (unlikely(status & ATA_BUSY))
4124 goto idle_irq;
4125 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4126 ap->id, qc->tf.protocol, status);
4127
4128 /* ack bmdma irq events */
4129 ap->ops->irq_clear(ap);
4130
4131 /* complete taskfile transaction */
a22e2eb0
AL		 4132 qc->err_mask |= ac_err_mask(status);
4133 ata_qc_complete(qc);
1da177e4
LT		 4134 break;
4135
4136 default:
4137 goto idle_irq;
4138 }
4139
4140 return 1; /* irq handled */
4141
4142idle_irq:
4143 ap->stats.idle_irq++;
4144
4145#ifdef ATA_IRQ_TRAP
4146 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4147 ata_irq_ack(ap, 0); /* debug trap */
4148 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4149 return 1;
1da177e4
LT		 4150 }
4151#endif
4152 return 0; /* irq not handled */
4153}
4154
4155/**
4156 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4157 * @irq: irq line (unused)
4158 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4159 * @regs: unused
4160 *
0cba632b
JG		 4161 * Default interrupt handler for PCI IDE devices. Calls
4162 * ata_host_intr() for each port that is not disabled.
4163 *
1da177e4 4164 * LOCKING:
0cba632b 4165 * Obtains host_set lock during operation.
1da177e4
LT		 4166 *
4167 * RETURNS:
0cba632b 4168 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4169 */
4170
4171irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4172{
4173 struct ata_host_set *host_set = dev_instance;
4174 unsigned int i;
4175 unsigned int handled = 0;
4176 unsigned long flags;
4177
4178 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4179 spin_lock_irqsave(&host_set->lock, flags);
4180
4181 for (i = 0; i < host_set->n_ports; i++) {
4182 struct ata_port *ap;
4183
4184 ap = host_set->ports[i];
c1389503
TH		 4185 if (ap &&
4186 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4187 struct ata_queued_cmd *qc;
4188
4189 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4190 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4191 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4192 handled |= ata_host_intr(ap, qc);
4193 }
4194 }
4195
4196 spin_unlock_irqrestore(&host_set->lock, flags);
4197
4198 return IRQ_RETVAL(handled);
4199}
4200
0baab86b 4201
9b847548
JA		 4202/*
4203 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4204 * without filling any other registers
4205 */
4206static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4207 u8 cmd)
4208{
4209 struct ata_taskfile tf;
4210 int err;
4211
4212 ata_tf_init(ap, &tf, dev->devno);
4213
4214 tf.command = cmd;
4215 tf.flags |= ATA_TFLAG_DEVICE;
4216 tf.protocol = ATA_PROT_NODATA;
4217
4218 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4219 if (err)
4220 printk(KERN_ERR "%s: ata command failed: %d\n",
4221 __FUNCTION__, err);
4222
4223 return err;
4224}
4225
4226static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4227{
4228 u8 cmd;
4229
4230 if (!ata_try_flush_cache(dev))
4231 return 0;
4232
4233 if (ata_id_has_flush_ext(dev->id))
4234 cmd = ATA_CMD_FLUSH_EXT;
4235 else
4236 cmd = ATA_CMD_FLUSH;
4237
4238 return ata_do_simple_cmd(ap, dev, cmd);
4239}
4240
4241static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4242{
4243 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4244}
4245
4246static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4247{
4248 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4249}
4250
4251/**
4252 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4253 * @ap: port the device is connected to
4254 * @dev: the device to resume
9b847548
JA		 4255 *
4256 * Kick the drive back into action, by sending it an idle immediate
4257 * command and making sure its transfer mode matches between drive
4258 * and host.
4259 *
4260 */
4261int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4262{
4263 if (ap->flags & ATA_FLAG_SUSPENDED) {
4264 ap->flags &= ~ATA_FLAG_SUSPENDED;
4265 ata_set_mode(ap);
4266 }
4267 if (!ata_dev_present(dev))
4268 return 0;
4269 if (dev->class == ATA_DEV_ATA)
4270 ata_start_drive(ap, dev);
4271
4272 return 0;
4273}
4274
4275/**
4276 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4277 * @ap: port the device is connected to
4278 * @dev: the device to suspend
9b847548
JA		 4279 *
4280 * Flush the cache on the drive, if appropriate, then issue a
4281 * standbynow command.
9b847548 4282 */
082776e4 4283int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548
JA		 4284{
4285 if (!ata_dev_present(dev))
4286 return 0;
4287 if (dev->class == ATA_DEV_ATA)
4288 ata_flush_cache(ap, dev);
4289
082776e4
NC		 4290 if (state.event != PM_EVENT_FREEZE)
4291 ata_standby_drive(ap, dev);
9b847548
JA		 4292 ap->flags |= ATA_FLAG_SUSPENDED;
4293 return 0;
4294}
4295
c893a3ae
RD		 4296/**
4297 * ata_port_start - Set port up for dma.
4298 * @ap: Port to initialize
4299 *
4300 * Called just after data structures for each port are
4301 * initialized. Allocates space for PRD table.
4302 *
4303 * May be used as the port_start() entry in ata_port_operations.
4304 *
4305 * LOCKING:
4306 * Inherited from caller.
4307 */
4308
1da177e4
LT		 4309int ata_port_start (struct ata_port *ap)
4310{
2f1f610b 4311 struct device *dev = ap->dev;
6037d6bb 4312 int rc;
1da177e4
LT		 4313
4314 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4315 if (!ap->prd)
4316 return -ENOMEM;
4317
6037d6bb
JG		 4318 rc = ata_pad_alloc(ap, dev);
4319 if (rc) {
cedc9a47 4320 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4321 return rc;
cedc9a47
JG		 4322 }
4323
1da177e4
LT		 4324 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4325
4326 return 0;
4327}
4328
0baab86b
EF		 4329
4330/**
4331 * ata_port_stop - Undo ata_port_start()
4332 * @ap: Port to shut down
4333 *
4334 * Frees the PRD table.
4335 *
4336 * May be used as the port_stop() entry in ata_port_operations.
4337 *
4338 * LOCKING:
6f0ef4fa 4339 * Inherited from caller.
0baab86b
EF		 4340 */
4341
1da177e4
LT		 4342void ata_port_stop (struct ata_port *ap)
4343{
2f1f610b 4344 struct device *dev = ap->dev;
1da177e4
LT		 4345
4346 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4347 ata_pad_free(ap, dev);
1da177e4
LT		 4348}
4349
aa8f0dc6
JG		 4350void ata_host_stop (struct ata_host_set *host_set)
4351{
4352 if (host_set->mmio_base)
4353 iounmap(host_set->mmio_base);
4354}
4355
4356
1da177e4
LT		 4357/**
4358 * ata_host_remove - Unregister SCSI host structure with upper layers
4359 * @ap: Port to unregister
4360 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4361 *
4362 * LOCKING:
6f0ef4fa 4363 * Inherited from caller.
1da177e4
LT		 4364 */
4365
4366static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4367{
4368 struct Scsi_Host *sh = ap->host;
4369
4370 DPRINTK("ENTER\n");
4371
4372 if (do_unregister)
4373 scsi_remove_host(sh);
4374
4375 ap->ops->port_stop(ap);
4376}
4377
4378/**
4379 * ata_host_init - Initialize an ata_port structure
4380 * @ap: Structure to initialize
4381 * @host: associated SCSI mid-layer structure
4382 * @host_set: Collection of hosts to which @ap belongs
4383 * @ent: Probe information provided by low-level driver
4384 * @port_no: Port number associated with this ata_port
4385 *
0cba632b
JG		 4386 * Initialize a new ata_port structure, and its associated
4387 * scsi_host.
4388 *
1da177e4 4389 * LOCKING:
0cba632b 4390 * Inherited from caller.
1da177e4
LT		 4391 */
4392
4393static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4394 struct ata_host_set *host_set,
057ace5e 4395 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4396{
4397 unsigned int i;
4398
4399 host->max_id = 16;
4400 host->max_lun = 1;
4401 host->max_channel = 1;
4402 host->unique_id = ata_unique_id++;
4403 host->max_cmd_len = 12;
12413197 4404
1da177e4
LT		 4405 ap->flags = ATA_FLAG_PORT_DISABLED;
4406 ap->id = host->unique_id;
4407 ap->host = host;
4408 ap->ctl = ATA_DEVCTL_OBS;
4409 ap->host_set = host_set;
2f1f610b 4410 ap->dev = ent->dev;
1da177e4
LT		 4411 ap->port_no = port_no;
4412 ap->hard_port_no =
4413 ent->legacy_mode ? ent->hard_port_no : port_no;
4414 ap->pio_mask = ent->pio_mask;
4415 ap->mwdma_mask = ent->mwdma_mask;
4416 ap->udma_mask = ent->udma_mask;
4417 ap->flags |= ent->host_flags;
4418 ap->ops = ent->port_ops;
4419 ap->cbl = ATA_CBL_NONE;
4420 ap->active_tag = ATA_TAG_POISON;
4421 ap->last_ctl = 0xFF;
4422
86e45b6b 4423 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4424 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4425
acf356b1
TH		 4426 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4427 struct ata_device *dev = &ap->device[i];
4428 dev->devno = i;
4429 dev->pio_mask = UINT_MAX;
4430 dev->mwdma_mask = UINT_MAX;
4431 dev->udma_mask = UINT_MAX;
4432 }
1da177e4
LT		 4433
4434#ifdef ATA_IRQ_TRAP
4435 ap->stats.unhandled_irq = 1;
4436 ap->stats.idle_irq = 1;
4437#endif
4438
4439 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4440}
4441
4442/**
4443 * ata_host_add - Attach low-level ATA driver to system
4444 * @ent: Information provided by low-level driver
4445 * @host_set: Collections of ports to which we add
4446 * @port_no: Port number associated with this host
4447 *
0cba632b
JG		 4448 * Attach low-level ATA driver to system.
4449 *
1da177e4 4450 * LOCKING:
0cba632b 4451 * PCI/etc. bus probe sem.
1da177e4
LT		 4452 *
4453 * RETURNS:
0cba632b 4454 * New ata_port on success, for NULL on error.
1da177e4
LT		 4455 */
4456
057ace5e 4457static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4458 struct ata_host_set *host_set,
4459 unsigned int port_no)
4460{
4461 struct Scsi_Host *host;
4462 struct ata_port *ap;
4463 int rc;
4464
4465 DPRINTK("ENTER\n");
aec5c3c1
TH		 4466
4467 if (!ent->port_ops->probe_reset &&
4468 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4469 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4470 port_no);
4471 return NULL;
4472 }
4473
1da177e4
LT		 4474 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4475 if (!host)
4476 return NULL;
4477
30afc84c
TH		 4478 host->transportt = &ata_scsi_transport_template;
4479
1da177e4
LT		 4480 ap = (struct ata_port *) &host->hostdata[0];
4481
4482 ata_host_init(ap, host, host_set, ent, port_no);
4483
4484 rc = ap->ops->port_start(ap);
4485 if (rc)
4486 goto err_out;
4487
4488 return ap;
4489
4490err_out:
4491 scsi_host_put(host);
4492 return NULL;
4493}
4494
4495/**
0cba632b
JG		 4496 * ata_device_add - Register hardware device with ATA and SCSI layers
4497 * @ent: Probe information describing hardware device to be registered
4498 *
4499 * This function processes the information provided in the probe
4500 * information struct @ent, allocates the necessary ATA and SCSI
4501 * host information structures, initializes them, and registers
4502 * everything with requisite kernel subsystems.
4503 *
4504 * This function requests irqs, probes the ATA bus, and probes
4505 * the SCSI bus.
1da177e4
LT		 4506 *
4507 * LOCKING:
0cba632b 4508 * PCI/etc. bus probe sem.
1da177e4
LT		 4509 *
4510 * RETURNS:
0cba632b 4511 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4512 */
4513
057ace5e 4514int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4515{
4516 unsigned int count = 0, i;
4517 struct device *dev = ent->dev;
4518 struct ata_host_set *host_set;
4519
4520 DPRINTK("ENTER\n");
4521 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4522 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4523 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4524 if (!host_set)
4525 return 0;
1da177e4
LT		 4526 spin_lock_init(&host_set->lock);
4527
4528 host_set->dev = dev;
4529 host_set->n_ports = ent->n_ports;
4530 host_set->irq = ent->irq;
4531 host_set->mmio_base = ent->mmio_base;
4532 host_set->private_data = ent->private_data;
4533 host_set->ops = ent->port_ops;
4534
4535 /* register each port bound to this device */
4536 for (i = 0; i < ent->n_ports; i++) {
4537 struct ata_port *ap;
4538 unsigned long xfer_mode_mask;
4539
4540 ap = ata_host_add(ent, host_set, i);
4541 if (!ap)
4542 goto err_out;
4543
4544 host_set->ports[i] = ap;
4545 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4546 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4547 (ap->pio_mask << ATA_SHIFT_PIO);
4548
4549 /* print per-port info to dmesg */
4550 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4551 "bmdma 0x%lX irq %lu\n",
4552 ap->id,
4553 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4554 ata_mode_string(xfer_mode_mask),
4555 ap->ioaddr.cmd_addr,
4556 ap->ioaddr.ctl_addr,
4557 ap->ioaddr.bmdma_addr,
4558 ent->irq);
4559
4560 ata_chk_status(ap);
4561 host_set->ops->irq_clear(ap);
4562 count++;
4563 }
4564
57f3bda8
RD		 4565 if (!count)
4566 goto err_free_ret;
1da177e4
LT		 4567
4568 /* obtain irq, that is shared between channels */
4569 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4570 DRV_NAME, host_set))
4571 goto err_out;
4572
4573 /* perform each probe synchronously */
4574 DPRINTK("probe begin\n");
4575 for (i = 0; i < count; i++) {
4576 struct ata_port *ap;
4577 int rc;
4578
4579 ap = host_set->ports[i];
4580
c893a3ae 4581 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4582 rc = ata_bus_probe(ap);
c893a3ae 4583 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4584
4585 if (rc) {
4586 /* FIXME: do something useful here?
4587 * Current libata behavior will
4588 * tear down everything when
4589 * the module is removed
4590 * or the h/w is unplugged.
4591 */
4592 }
4593
4594 rc = scsi_add_host(ap->host, dev);
4595 if (rc) {
4596 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4597 ap->id);
4598 /* FIXME: do something useful here */
4599 /* FIXME: handle unconditional calls to
4600 * scsi_scan_host and ata_host_remove, below,
4601 * at the very least
4602 */
4603 }
4604 }
4605
4606 /* probes are done, now scan each port's disk(s) */
c893a3ae 4607 DPRINTK("host probe begin\n");
1da177e4
LT		 4608 for (i = 0; i < count; i++) {
4609 struct ata_port *ap = host_set->ports[i];
4610
644dd0cc 4611 ata_scsi_scan_host(ap);
1da177e4
LT		 4612 }
4613
4614 dev_set_drvdata(dev, host_set);
4615
4616 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4617 return ent->n_ports; /* success */
4618
4619err_out:
4620 for (i = 0; i < count; i++) {
4621 ata_host_remove(host_set->ports[i], 1);
4622 scsi_host_put(host_set->ports[i]->host);
4623 }
57f3bda8 4624err_free_ret:
1da177e4
LT		 4625 kfree(host_set);
4626 VPRINTK("EXIT, returning 0\n");
4627 return 0;
4628}
4629
17b14451
AC		 4630/**
4631 * ata_host_set_remove - PCI layer callback for device removal
4632 * @host_set: ATA host set that was removed
4633 *
2e9edbf8 4634 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4635 * objects.
4636 *
4637 * LOCKING:
4638 * Inherited from calling layer (may sleep).
4639 */
4640
17b14451
AC		 4641void ata_host_set_remove(struct ata_host_set *host_set)
4642{
4643 struct ata_port *ap;
4644 unsigned int i;
4645
4646 for (i = 0; i < host_set->n_ports; i++) {
4647 ap = host_set->ports[i];
4648 scsi_remove_host(ap->host);
4649 }
4650
4651 free_irq(host_set->irq, host_set);
4652
4653 for (i = 0; i < host_set->n_ports; i++) {
4654 ap = host_set->ports[i];
4655
4656 ata_scsi_release(ap->host);
4657
4658 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4659 struct ata_ioports *ioaddr = &ap->ioaddr;
4660
4661 if (ioaddr->cmd_addr == 0x1f0)
4662 release_region(0x1f0, 8);
4663 else if (ioaddr->cmd_addr == 0x170)
4664 release_region(0x170, 8);
4665 }
4666
4667 scsi_host_put(ap->host);
4668 }
4669
4670 if (host_set->ops->host_stop)
4671 host_set->ops->host_stop(host_set);
4672
4673 kfree(host_set);
4674}
4675
1da177e4
LT		 4676/**
4677 * ata_scsi_release - SCSI layer callback hook for host unload
4678 * @host: libata host to be unloaded
4679 *
4680 * Performs all duties necessary to shut down a libata port...
4681 * Kill port kthread, disable port, and release resources.
4682 *
4683 * LOCKING:
4684 * Inherited from SCSI layer.
4685 *
4686 * RETURNS:
4687 * One.
4688 */
4689
4690int ata_scsi_release(struct Scsi_Host *host)
4691{
4692 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4693 int i;
1da177e4
LT		 4694
4695 DPRINTK("ENTER\n");
4696
4697 ap->ops->port_disable(ap);
4698 ata_host_remove(ap, 0);
d9572b1d
TH		 4699 for (i = 0; i < ATA_MAX_DEVICES; i++)
4700 kfree(ap->device[i].id);
1da177e4
LT		 4701
4702 DPRINTK("EXIT\n");
4703 return 1;
4704}
4705
4706/**
4707 * ata_std_ports - initialize ioaddr with standard port offsets.
4708 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4709 *
4710 * Utility function which initializes data_addr, error_addr,
4711 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4712 * device_addr, status_addr, and command_addr to standard offsets
4713 * relative to cmd_addr.
4714 *
4715 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4716 */
0baab86b 4717
1da177e4
LT		 4718void ata_std_ports(struct ata_ioports *ioaddr)
4719{
4720 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4721 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4722 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4723 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4724 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4725 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4726 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4727 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4728 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4729 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4730}
4731
0baab86b 4732
374b1873
JG		 4733#ifdef CONFIG_PCI
4734
4735void ata_pci_host_stop (struct ata_host_set *host_set)
4736{
4737 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4738
4739 pci_iounmap(pdev, host_set->mmio_base);
4740}
4741
1da177e4
LT		 4742/**
4743 * ata_pci_remove_one - PCI layer callback for device removal
4744 * @pdev: PCI device that was removed
4745 *
4746 * PCI layer indicates to libata via this hook that
6f0ef4fa 4747 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4748 * Handle this by unregistering all objects associated
4749 * with this PCI device. Free those objects. Then finally
4750 * release PCI resources and disable device.
4751 *
4752 * LOCKING:
4753 * Inherited from PCI layer (may sleep).
4754 */
4755
4756void ata_pci_remove_one (struct pci_dev *pdev)
4757{
4758 struct device *dev = pci_dev_to_dev(pdev);
4759 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4760
17b14451 4761 ata_host_set_remove(host_set);
1da177e4
LT		 4762 pci_release_regions(pdev);
4763 pci_disable_device(pdev);
4764 dev_set_drvdata(dev, NULL);
4765}
4766
4767/* move to PCI subsystem */
057ace5e 4768int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4769{
4770 unsigned long tmp = 0;
4771
4772 switch (bits->width) {
4773 case 1: {
4774 u8 tmp8 = 0;
4775 pci_read_config_byte(pdev, bits->reg, &tmp8);
4776 tmp = tmp8;
4777 break;
4778 }
4779 case 2: {
4780 u16 tmp16 = 0;
4781 pci_read_config_word(pdev, bits->reg, &tmp16);
4782 tmp = tmp16;
4783 break;
4784 }
4785 case 4: {
4786 u32 tmp32 = 0;
4787 pci_read_config_dword(pdev, bits->reg, &tmp32);
4788 tmp = tmp32;
4789 break;
4790 }
4791
4792 default:
4793 return -EINVAL;
4794 }
4795
4796 tmp &= bits->mask;
4797
4798 return (tmp == bits->val) ? 1 : 0;
4799}
9b847548
JA		 4800
4801int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4802{
4803 pci_save_state(pdev);
4804 pci_disable_device(pdev);
4805 pci_set_power_state(pdev, PCI_D3hot);
4806 return 0;
4807}
4808
4809int ata_pci_device_resume(struct pci_dev *pdev)
4810{
4811 pci_set_power_state(pdev, PCI_D0);
4812 pci_restore_state(pdev);
4813 pci_enable_device(pdev);
4814 pci_set_master(pdev);
4815 return 0;
4816}
1da177e4
LT		 4817#endif /* CONFIG_PCI */
4818
4819
1da177e4
LT		 4820static int __init ata_init(void)
4821{
4822 ata_wq = create_workqueue("ata");
4823 if (!ata_wq)
4824 return -ENOMEM;
4825
4826 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4827 return 0;
4828}
4829
4830static void __exit ata_exit(void)
4831{
4832 destroy_workqueue(ata_wq);
4833}
4834
4835module_init(ata_init);
4836module_exit(ata_exit);
4837
67846b30
JG		 4838static unsigned long ratelimit_time;
4839static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4840
4841int ata_ratelimit(void)
4842{
4843 int rc;
4844 unsigned long flags;
4845
4846 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4847
4848 if (time_after(jiffies, ratelimit_time)) {
4849 rc = 1;
4850 ratelimit_time = jiffies + (HZ/5);
4851 } else
4852 rc = 0;
4853
4854 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4855
4856 return rc;
4857}
4858
1da177e4
LT		 4859/*
4860 * libata is essentially a library of internal helper functions for
4861 * low-level ATA host controller drivers. As such, the API/ABI is
4862 * likely to change as new drivers are added and updated.
4863 * Do not depend on ABI/API stability.
4864 */
4865
4866EXPORT_SYMBOL_GPL(ata_std_bios_param);
4867EXPORT_SYMBOL_GPL(ata_std_ports);
4868EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 4869EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 4870EXPORT_SYMBOL_GPL(ata_sg_init);
4871EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 4872EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 4873EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4874EXPORT_SYMBOL_GPL(ata_eng_timeout);
4875EXPORT_SYMBOL_GPL(ata_tf_load);
4876EXPORT_SYMBOL_GPL(ata_tf_read);
4877EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4878EXPORT_SYMBOL_GPL(ata_std_dev_select);
4879EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4880EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4881EXPORT_SYMBOL_GPL(ata_check_status);
4882EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 4883EXPORT_SYMBOL_GPL(ata_exec_command);
4884EXPORT_SYMBOL_GPL(ata_port_start);
4885EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 4886EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 4887EXPORT_SYMBOL_GPL(ata_interrupt);
4888EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 4889EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 4890EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4891EXPORT_SYMBOL_GPL(ata_bmdma_start);
4892EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4893EXPORT_SYMBOL_GPL(ata_bmdma_status);
4894EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4895EXPORT_SYMBOL_GPL(ata_port_probe);
4896EXPORT_SYMBOL_GPL(sata_phy_reset);
4897EXPORT_SYMBOL_GPL(__sata_phy_reset);
4898EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 4899EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 4900EXPORT_SYMBOL_GPL(ata_std_softreset);
4901EXPORT_SYMBOL_GPL(sata_std_hardreset);
4902EXPORT_SYMBOL_GPL(ata_std_postreset);
4903EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 4904EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 4905EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 4906EXPORT_SYMBOL_GPL(ata_dev_classify);
4907EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 4908EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 4909EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 4910EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 4911EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 4912EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4913EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4914EXPORT_SYMBOL_GPL(ata_scsi_error);
4915EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4916EXPORT_SYMBOL_GPL(ata_scsi_release);
4917EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 4918EXPORT_SYMBOL_GPL(ata_id_string);
4919EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 4920EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 4921EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
4922EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 4923
1bc4ccff 4924EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 4925EXPORT_SYMBOL_GPL(ata_timing_compute);
4926EXPORT_SYMBOL_GPL(ata_timing_merge);
4927
1da177e4
LT		 4928#ifdef CONFIG_PCI
4929EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 4930EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 4931EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4932EXPORT_SYMBOL_GPL(ata_pci_init_one);
4933EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 4934EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
4935EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 4936EXPORT_SYMBOL_GPL(ata_pci_default_filter);
4937EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 4938#endif /* CONFIG_PCI */
9b847548
JA		 4939
4940EXPORT_SYMBOL_GPL(ata_device_suspend);
4941EXPORT_SYMBOL_GPL(ata_device_resume);
4942EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
4943EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux kernel - Deliverables
This page took 0.450266 seconds and 5 git commands to generate.