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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
67846b30 | 51 | #include <linux/jiffies.h> |
378f058c | 52 | #include <linux/scatterlist.h> |
1da177e4 | 53 | #include <scsi/scsi.h> |
1da177e4 | 54 | #include "scsi_priv.h" |
193515d5 | 55 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
56 | #include <scsi/scsi_host.h> |
57 | #include <linux/libata.h> | |
58 | #include <asm/io.h> | |
59 | #include <asm/semaphore.h> | |
60 | #include <asm/byteorder.h> | |
61 | ||
62 | #include "libata.h" | |
63 | ||
6aff8f1f TH |
64 | static unsigned int ata_dev_init_params(struct ata_port *ap, |
65 | struct ata_device *dev); | |
1da177e4 LT |
66 | static void ata_set_mode(struct ata_port *ap); |
67 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | |
057ace5e | 68 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift); |
1da177e4 | 69 | static int fgb(u32 bitmap); |
057ace5e | 70 | static int ata_choose_xfer_mode(const struct ata_port *ap, |
1da177e4 LT |
71 | u8 *xfer_mode_out, |
72 | unsigned int *xfer_shift_out); | |
1da177e4 LT |
73 | |
74 | static unsigned int ata_unique_id = 1; | |
75 | static struct workqueue_struct *ata_wq; | |
76 | ||
1623c81e JG |
77 | int atapi_enabled = 0; |
78 | module_param(atapi_enabled, int, 0444); | |
79 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
80 | ||
c3c013a2 JG |
81 | int libata_fua = 0; |
82 | module_param_named(fua, libata_fua, int, 0444); | |
83 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
84 | ||
1da177e4 LT |
85 | MODULE_AUTHOR("Jeff Garzik"); |
86 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
87 | MODULE_LICENSE("GPL"); | |
88 | MODULE_VERSION(DRV_VERSION); | |
89 | ||
0baab86b | 90 | |
1da177e4 LT |
91 | /** |
92 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
93 | * @tf: Taskfile to convert | |
94 | * @fis: Buffer into which data will output | |
95 | * @pmp: Port multiplier port | |
96 | * | |
97 | * Converts a standard ATA taskfile to a Serial ATA | |
98 | * FIS structure (Register - Host to Device). | |
99 | * | |
100 | * LOCKING: | |
101 | * Inherited from caller. | |
102 | */ | |
103 | ||
057ace5e | 104 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
105 | { |
106 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
107 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
108 | bit 7 indicates Command FIS */ | |
109 | fis[2] = tf->command; | |
110 | fis[3] = tf->feature; | |
111 | ||
112 | fis[4] = tf->lbal; | |
113 | fis[5] = tf->lbam; | |
114 | fis[6] = tf->lbah; | |
115 | fis[7] = tf->device; | |
116 | ||
117 | fis[8] = tf->hob_lbal; | |
118 | fis[9] = tf->hob_lbam; | |
119 | fis[10] = tf->hob_lbah; | |
120 | fis[11] = tf->hob_feature; | |
121 | ||
122 | fis[12] = tf->nsect; | |
123 | fis[13] = tf->hob_nsect; | |
124 | fis[14] = 0; | |
125 | fis[15] = tf->ctl; | |
126 | ||
127 | fis[16] = 0; | |
128 | fis[17] = 0; | |
129 | fis[18] = 0; | |
130 | fis[19] = 0; | |
131 | } | |
132 | ||
133 | /** | |
134 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
135 | * @fis: Buffer from which data will be input | |
136 | * @tf: Taskfile to output | |
137 | * | |
e12a1be6 | 138 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
139 | * |
140 | * LOCKING: | |
141 | * Inherited from caller. | |
142 | */ | |
143 | ||
057ace5e | 144 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
145 | { |
146 | tf->command = fis[2]; /* status */ | |
147 | tf->feature = fis[3]; /* error */ | |
148 | ||
149 | tf->lbal = fis[4]; | |
150 | tf->lbam = fis[5]; | |
151 | tf->lbah = fis[6]; | |
152 | tf->device = fis[7]; | |
153 | ||
154 | tf->hob_lbal = fis[8]; | |
155 | tf->hob_lbam = fis[9]; | |
156 | tf->hob_lbah = fis[10]; | |
157 | ||
158 | tf->nsect = fis[12]; | |
159 | tf->hob_nsect = fis[13]; | |
160 | } | |
161 | ||
8cbd6df1 AL |
162 | static const u8 ata_rw_cmds[] = { |
163 | /* pio multi */ | |
164 | ATA_CMD_READ_MULTI, | |
165 | ATA_CMD_WRITE_MULTI, | |
166 | ATA_CMD_READ_MULTI_EXT, | |
167 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
168 | 0, |
169 | 0, | |
170 | 0, | |
171 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
172 | /* pio */ |
173 | ATA_CMD_PIO_READ, | |
174 | ATA_CMD_PIO_WRITE, | |
175 | ATA_CMD_PIO_READ_EXT, | |
176 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
177 | 0, |
178 | 0, | |
179 | 0, | |
180 | 0, | |
8cbd6df1 AL |
181 | /* dma */ |
182 | ATA_CMD_READ, | |
183 | ATA_CMD_WRITE, | |
184 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
185 | ATA_CMD_WRITE_EXT, |
186 | 0, | |
187 | 0, | |
188 | 0, | |
189 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 190 | }; |
1da177e4 LT |
191 | |
192 | /** | |
8cbd6df1 AL |
193 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
194 | * @qc: command to examine and configure | |
1da177e4 | 195 | * |
8cbd6df1 AL |
196 | * Examine the device configuration and tf->flags to calculate |
197 | * the proper read/write commands and protocol to use. | |
1da177e4 LT |
198 | * |
199 | * LOCKING: | |
200 | * caller. | |
201 | */ | |
9a3dccc4 | 202 | int ata_rwcmd_protocol(struct ata_queued_cmd *qc) |
1da177e4 | 203 | { |
8cbd6df1 AL |
204 | struct ata_taskfile *tf = &qc->tf; |
205 | struct ata_device *dev = qc->dev; | |
9a3dccc4 | 206 | u8 cmd; |
1da177e4 | 207 | |
9a3dccc4 | 208 | int index, fua, lba48, write; |
8cbd6df1 | 209 | |
9a3dccc4 | 210 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
211 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
212 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 213 | |
8cbd6df1 AL |
214 | if (dev->flags & ATA_DFLAG_PIO) { |
215 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 216 | index = dev->multi_count ? 0 : 8; |
8d238e01 AC |
217 | } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) { |
218 | /* Unable to use DMA due to host limitation */ | |
219 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 220 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
221 | } else { |
222 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 223 | index = 16; |
8cbd6df1 | 224 | } |
1da177e4 | 225 | |
9a3dccc4 TH |
226 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
227 | if (cmd) { | |
228 | tf->command = cmd; | |
229 | return 0; | |
230 | } | |
231 | return -1; | |
1da177e4 LT |
232 | } |
233 | ||
cb95d562 TH |
234 | /** |
235 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
236 | * @pio_mask: pio_mask | |
237 | * @mwdma_mask: mwdma_mask | |
238 | * @udma_mask: udma_mask | |
239 | * | |
240 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
241 | * unsigned int xfer_mask. | |
242 | * | |
243 | * LOCKING: | |
244 | * None. | |
245 | * | |
246 | * RETURNS: | |
247 | * Packed xfer_mask. | |
248 | */ | |
249 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
250 | unsigned int mwdma_mask, | |
251 | unsigned int udma_mask) | |
252 | { | |
253 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
254 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
255 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
256 | } | |
257 | ||
258 | static const struct ata_xfer_ent { | |
259 | unsigned int shift, bits; | |
260 | u8 base; | |
261 | } ata_xfer_tbl[] = { | |
262 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
263 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
264 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
265 | { -1, }, | |
266 | }; | |
267 | ||
268 | /** | |
269 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
270 | * @xfer_mask: xfer_mask of interest | |
271 | * | |
272 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
273 | * bit of @xfer_mask is considered. | |
274 | * | |
275 | * LOCKING: | |
276 | * None. | |
277 | * | |
278 | * RETURNS: | |
279 | * Matching XFER_* value, 0 if no match found. | |
280 | */ | |
281 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
282 | { | |
283 | int highbit = fls(xfer_mask) - 1; | |
284 | const struct ata_xfer_ent *ent; | |
285 | ||
286 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
287 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
288 | return ent->base + highbit - ent->shift; | |
289 | return 0; | |
290 | } | |
291 | ||
292 | /** | |
293 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
294 | * @xfer_mode: XFER_* of interest | |
295 | * | |
296 | * Return matching xfer_mask for @xfer_mode. | |
297 | * | |
298 | * LOCKING: | |
299 | * None. | |
300 | * | |
301 | * RETURNS: | |
302 | * Matching xfer_mask, 0 if no match found. | |
303 | */ | |
304 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
305 | { | |
306 | const struct ata_xfer_ent *ent; | |
307 | ||
308 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
309 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
310 | return 1 << (ent->shift + xfer_mode - ent->base); | |
311 | return 0; | |
312 | } | |
313 | ||
314 | /** | |
315 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
316 | * @xfer_mode: XFER_* of interest | |
317 | * | |
318 | * Return matching xfer_shift for @xfer_mode. | |
319 | * | |
320 | * LOCKING: | |
321 | * None. | |
322 | * | |
323 | * RETURNS: | |
324 | * Matching xfer_shift, -1 if no match found. | |
325 | */ | |
326 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
327 | { | |
328 | const struct ata_xfer_ent *ent; | |
329 | ||
330 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
331 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
332 | return ent->shift; | |
333 | return -1; | |
334 | } | |
335 | ||
98ac62de | 336 | static const char * const xfer_mode_str[] = { |
1da7b0d0 TH |
337 | "PIO0", |
338 | "PIO1", | |
339 | "PIO2", | |
340 | "PIO3", | |
341 | "PIO4", | |
342 | "MWDMA0", | |
343 | "MWDMA1", | |
344 | "MWDMA2", | |
1da177e4 LT |
345 | "UDMA/16", |
346 | "UDMA/25", | |
347 | "UDMA/33", | |
348 | "UDMA/44", | |
349 | "UDMA/66", | |
350 | "UDMA/100", | |
351 | "UDMA/133", | |
352 | "UDMA7", | |
1da177e4 LT |
353 | }; |
354 | ||
355 | /** | |
1da7b0d0 TH |
356 | * ata_mode_string - convert xfer_mask to string |
357 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
358 | * |
359 | * Determine string which represents the highest speed | |
1da7b0d0 | 360 | * (highest bit in @modemask). |
1da177e4 LT |
361 | * |
362 | * LOCKING: | |
363 | * None. | |
364 | * | |
365 | * RETURNS: | |
366 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 367 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 LT |
368 | */ |
369 | ||
1da7b0d0 | 370 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 371 | { |
1da7b0d0 | 372 | int highbit; |
1da177e4 | 373 | |
1da7b0d0 TH |
374 | highbit = fls(xfer_mask) - 1; |
375 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
376 | return xfer_mode_str[highbit]; | |
1da177e4 | 377 | return "<n/a>"; |
1da177e4 LT |
378 | } |
379 | ||
380 | /** | |
381 | * ata_pio_devchk - PATA device presence detection | |
382 | * @ap: ATA channel to examine | |
383 | * @device: Device to examine (starting at zero) | |
384 | * | |
385 | * This technique was originally described in | |
386 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
387 | * later found its way into the ATA/ATAPI spec. | |
388 | * | |
389 | * Write a pattern to the ATA shadow registers, | |
390 | * and if a device is present, it will respond by | |
391 | * correctly storing and echoing back the | |
392 | * ATA shadow register contents. | |
393 | * | |
394 | * LOCKING: | |
395 | * caller. | |
396 | */ | |
397 | ||
398 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
399 | unsigned int device) | |
400 | { | |
401 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
402 | u8 nsect, lbal; | |
403 | ||
404 | ap->ops->dev_select(ap, device); | |
405 | ||
406 | outb(0x55, ioaddr->nsect_addr); | |
407 | outb(0xaa, ioaddr->lbal_addr); | |
408 | ||
409 | outb(0xaa, ioaddr->nsect_addr); | |
410 | outb(0x55, ioaddr->lbal_addr); | |
411 | ||
412 | outb(0x55, ioaddr->nsect_addr); | |
413 | outb(0xaa, ioaddr->lbal_addr); | |
414 | ||
415 | nsect = inb(ioaddr->nsect_addr); | |
416 | lbal = inb(ioaddr->lbal_addr); | |
417 | ||
418 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
419 | return 1; /* we found a device */ | |
420 | ||
421 | return 0; /* nothing found */ | |
422 | } | |
423 | ||
424 | /** | |
425 | * ata_mmio_devchk - PATA device presence detection | |
426 | * @ap: ATA channel to examine | |
427 | * @device: Device to examine (starting at zero) | |
428 | * | |
429 | * This technique was originally described in | |
430 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
431 | * later found its way into the ATA/ATAPI spec. | |
432 | * | |
433 | * Write a pattern to the ATA shadow registers, | |
434 | * and if a device is present, it will respond by | |
435 | * correctly storing and echoing back the | |
436 | * ATA shadow register contents. | |
437 | * | |
438 | * LOCKING: | |
439 | * caller. | |
440 | */ | |
441 | ||
442 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
443 | unsigned int device) | |
444 | { | |
445 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
446 | u8 nsect, lbal; | |
447 | ||
448 | ap->ops->dev_select(ap, device); | |
449 | ||
450 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
451 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
452 | ||
453 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
454 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
455 | ||
456 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
457 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
458 | ||
459 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
460 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
461 | ||
462 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
463 | return 1; /* we found a device */ | |
464 | ||
465 | return 0; /* nothing found */ | |
466 | } | |
467 | ||
468 | /** | |
469 | * ata_devchk - PATA device presence detection | |
470 | * @ap: ATA channel to examine | |
471 | * @device: Device to examine (starting at zero) | |
472 | * | |
473 | * Dispatch ATA device presence detection, depending | |
474 | * on whether we are using PIO or MMIO to talk to the | |
475 | * ATA shadow registers. | |
476 | * | |
477 | * LOCKING: | |
478 | * caller. | |
479 | */ | |
480 | ||
481 | static unsigned int ata_devchk(struct ata_port *ap, | |
482 | unsigned int device) | |
483 | { | |
484 | if (ap->flags & ATA_FLAG_MMIO) | |
485 | return ata_mmio_devchk(ap, device); | |
486 | return ata_pio_devchk(ap, device); | |
487 | } | |
488 | ||
489 | /** | |
490 | * ata_dev_classify - determine device type based on ATA-spec signature | |
491 | * @tf: ATA taskfile register set for device to be identified | |
492 | * | |
493 | * Determine from taskfile register contents whether a device is | |
494 | * ATA or ATAPI, as per "Signature and persistence" section | |
495 | * of ATA/PI spec (volume 1, sect 5.14). | |
496 | * | |
497 | * LOCKING: | |
498 | * None. | |
499 | * | |
500 | * RETURNS: | |
501 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
502 | * the event of failure. | |
503 | */ | |
504 | ||
057ace5e | 505 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
506 | { |
507 | /* Apple's open source Darwin code hints that some devices only | |
508 | * put a proper signature into the LBA mid/high registers, | |
509 | * So, we only check those. It's sufficient for uniqueness. | |
510 | */ | |
511 | ||
512 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
513 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
514 | DPRINTK("found ATA device by sig\n"); | |
515 | return ATA_DEV_ATA; | |
516 | } | |
517 | ||
518 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
519 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
520 | DPRINTK("found ATAPI device by sig\n"); | |
521 | return ATA_DEV_ATAPI; | |
522 | } | |
523 | ||
524 | DPRINTK("unknown device\n"); | |
525 | return ATA_DEV_UNKNOWN; | |
526 | } | |
527 | ||
528 | /** | |
529 | * ata_dev_try_classify - Parse returned ATA device signature | |
530 | * @ap: ATA channel to examine | |
531 | * @device: Device to examine (starting at zero) | |
b4dc7623 | 532 | * @r_err: Value of error register on completion |
1da177e4 LT |
533 | * |
534 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
535 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
536 | * shadow registers, indicating the results of device detection | |
537 | * and diagnostics. | |
538 | * | |
539 | * Select the ATA device, and read the values from the ATA shadow | |
540 | * registers. Then parse according to the Error register value, | |
541 | * and the spec-defined values examined by ata_dev_classify(). | |
542 | * | |
543 | * LOCKING: | |
544 | * caller. | |
b4dc7623 TH |
545 | * |
546 | * RETURNS: | |
547 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 LT |
548 | */ |
549 | ||
b4dc7623 TH |
550 | static unsigned int |
551 | ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) | |
1da177e4 | 552 | { |
1da177e4 LT |
553 | struct ata_taskfile tf; |
554 | unsigned int class; | |
555 | u8 err; | |
556 | ||
557 | ap->ops->dev_select(ap, device); | |
558 | ||
559 | memset(&tf, 0, sizeof(tf)); | |
560 | ||
1da177e4 | 561 | ap->ops->tf_read(ap, &tf); |
0169e284 | 562 | err = tf.feature; |
b4dc7623 TH |
563 | if (r_err) |
564 | *r_err = err; | |
1da177e4 LT |
565 | |
566 | /* see if device passed diags */ | |
567 | if (err == 1) | |
568 | /* do nothing */ ; | |
569 | else if ((device == 0) && (err == 0x81)) | |
570 | /* do nothing */ ; | |
571 | else | |
b4dc7623 | 572 | return ATA_DEV_NONE; |
1da177e4 | 573 | |
b4dc7623 | 574 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 575 | class = ata_dev_classify(&tf); |
b4dc7623 | 576 | |
1da177e4 | 577 | if (class == ATA_DEV_UNKNOWN) |
b4dc7623 | 578 | return ATA_DEV_NONE; |
1da177e4 | 579 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) |
b4dc7623 TH |
580 | return ATA_DEV_NONE; |
581 | return class; | |
1da177e4 LT |
582 | } |
583 | ||
584 | /** | |
6a62a04d | 585 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
586 | * @id: IDENTIFY DEVICE results we will examine |
587 | * @s: string into which data is output | |
588 | * @ofs: offset into identify device page | |
589 | * @len: length of string to return. must be an even number. | |
590 | * | |
591 | * The strings in the IDENTIFY DEVICE page are broken up into | |
592 | * 16-bit chunks. Run through the string, and output each | |
593 | * 8-bit chunk linearly, regardless of platform. | |
594 | * | |
595 | * LOCKING: | |
596 | * caller. | |
597 | */ | |
598 | ||
6a62a04d TH |
599 | void ata_id_string(const u16 *id, unsigned char *s, |
600 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
601 | { |
602 | unsigned int c; | |
603 | ||
604 | while (len > 0) { | |
605 | c = id[ofs] >> 8; | |
606 | *s = c; | |
607 | s++; | |
608 | ||
609 | c = id[ofs] & 0xff; | |
610 | *s = c; | |
611 | s++; | |
612 | ||
613 | ofs++; | |
614 | len -= 2; | |
615 | } | |
616 | } | |
617 | ||
0e949ff3 | 618 | /** |
6a62a04d | 619 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
620 | * @id: IDENTIFY DEVICE results we will examine |
621 | * @s: string into which data is output | |
622 | * @ofs: offset into identify device page | |
623 | * @len: length of string to return. must be an odd number. | |
624 | * | |
6a62a04d | 625 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
626 | * trims trailing spaces and terminates the resulting string with |
627 | * null. @len must be actual maximum length (even number) + 1. | |
628 | * | |
629 | * LOCKING: | |
630 | * caller. | |
631 | */ | |
6a62a04d TH |
632 | void ata_id_c_string(const u16 *id, unsigned char *s, |
633 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
634 | { |
635 | unsigned char *p; | |
636 | ||
637 | WARN_ON(!(len & 1)); | |
638 | ||
6a62a04d | 639 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
640 | |
641 | p = s + strnlen(s, len - 1); | |
642 | while (p > s && p[-1] == ' ') | |
643 | p--; | |
644 | *p = '\0'; | |
645 | } | |
0baab86b | 646 | |
2940740b TH |
647 | static u64 ata_id_n_sectors(const u16 *id) |
648 | { | |
649 | if (ata_id_has_lba(id)) { | |
650 | if (ata_id_has_lba48(id)) | |
651 | return ata_id_u64(id, 100); | |
652 | else | |
653 | return ata_id_u32(id, 60); | |
654 | } else { | |
655 | if (ata_id_current_chs_valid(id)) | |
656 | return ata_id_u32(id, 57); | |
657 | else | |
658 | return id[1] * id[3] * id[6]; | |
659 | } | |
660 | } | |
661 | ||
0baab86b EF |
662 | /** |
663 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
664 | * @ap: ATA channel to manipulate | |
665 | * @device: ATA device (numbered from zero) to select | |
666 | * | |
667 | * This function performs no actual function. | |
668 | * | |
669 | * May be used as the dev_select() entry in ata_port_operations. | |
670 | * | |
671 | * LOCKING: | |
672 | * caller. | |
673 | */ | |
1da177e4 LT |
674 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
675 | { | |
676 | } | |
677 | ||
0baab86b | 678 | |
1da177e4 LT |
679 | /** |
680 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
681 | * @ap: ATA channel to manipulate | |
682 | * @device: ATA device (numbered from zero) to select | |
683 | * | |
684 | * Use the method defined in the ATA specification to | |
685 | * make either device 0, or device 1, active on the | |
0baab86b EF |
686 | * ATA channel. Works with both PIO and MMIO. |
687 | * | |
688 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
689 | * |
690 | * LOCKING: | |
691 | * caller. | |
692 | */ | |
693 | ||
694 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
695 | { | |
696 | u8 tmp; | |
697 | ||
698 | if (device == 0) | |
699 | tmp = ATA_DEVICE_OBS; | |
700 | else | |
701 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
702 | ||
703 | if (ap->flags & ATA_FLAG_MMIO) { | |
704 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
705 | } else { | |
706 | outb(tmp, ap->ioaddr.device_addr); | |
707 | } | |
708 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
709 | } | |
710 | ||
711 | /** | |
712 | * ata_dev_select - Select device 0/1 on ATA bus | |
713 | * @ap: ATA channel to manipulate | |
714 | * @device: ATA device (numbered from zero) to select | |
715 | * @wait: non-zero to wait for Status register BSY bit to clear | |
716 | * @can_sleep: non-zero if context allows sleeping | |
717 | * | |
718 | * Use the method defined in the ATA specification to | |
719 | * make either device 0, or device 1, active on the | |
720 | * ATA channel. | |
721 | * | |
722 | * This is a high-level version of ata_std_dev_select(), | |
723 | * which additionally provides the services of inserting | |
724 | * the proper pauses and status polling, where needed. | |
725 | * | |
726 | * LOCKING: | |
727 | * caller. | |
728 | */ | |
729 | ||
730 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
731 | unsigned int wait, unsigned int can_sleep) | |
732 | { | |
733 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
734 | ap->id, device, wait); | |
735 | ||
736 | if (wait) | |
737 | ata_wait_idle(ap); | |
738 | ||
739 | ap->ops->dev_select(ap, device); | |
740 | ||
741 | if (wait) { | |
742 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
743 | msleep(150); | |
744 | ata_wait_idle(ap); | |
745 | } | |
746 | } | |
747 | ||
748 | /** | |
749 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 750 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 751 | * |
0bd3300a TH |
752 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
753 | * page. | |
1da177e4 LT |
754 | * |
755 | * LOCKING: | |
756 | * caller. | |
757 | */ | |
758 | ||
0bd3300a | 759 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
760 | { |
761 | DPRINTK("49==0x%04x " | |
762 | "53==0x%04x " | |
763 | "63==0x%04x " | |
764 | "64==0x%04x " | |
765 | "75==0x%04x \n", | |
0bd3300a TH |
766 | id[49], |
767 | id[53], | |
768 | id[63], | |
769 | id[64], | |
770 | id[75]); | |
1da177e4 LT |
771 | DPRINTK("80==0x%04x " |
772 | "81==0x%04x " | |
773 | "82==0x%04x " | |
774 | "83==0x%04x " | |
775 | "84==0x%04x \n", | |
0bd3300a TH |
776 | id[80], |
777 | id[81], | |
778 | id[82], | |
779 | id[83], | |
780 | id[84]); | |
1da177e4 LT |
781 | DPRINTK("88==0x%04x " |
782 | "93==0x%04x\n", | |
0bd3300a TH |
783 | id[88], |
784 | id[93]); | |
1da177e4 LT |
785 | } |
786 | ||
cb95d562 TH |
787 | /** |
788 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
789 | * @id: IDENTIFY data to compute xfer mask from | |
790 | * | |
791 | * Compute the xfermask for this device. This is not as trivial | |
792 | * as it seems if we must consider early devices correctly. | |
793 | * | |
794 | * FIXME: pre IDE drive timing (do we care ?). | |
795 | * | |
796 | * LOCKING: | |
797 | * None. | |
798 | * | |
799 | * RETURNS: | |
800 | * Computed xfermask | |
801 | */ | |
802 | static unsigned int ata_id_xfermask(const u16 *id) | |
803 | { | |
804 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
805 | ||
806 | /* Usual case. Word 53 indicates word 64 is valid */ | |
807 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
808 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
809 | pio_mask <<= 3; | |
810 | pio_mask |= 0x7; | |
811 | } else { | |
812 | /* If word 64 isn't valid then Word 51 high byte holds | |
813 | * the PIO timing number for the maximum. Turn it into | |
814 | * a mask. | |
815 | */ | |
816 | pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | |
817 | ||
818 | /* But wait.. there's more. Design your standards by | |
819 | * committee and you too can get a free iordy field to | |
820 | * process. However its the speeds not the modes that | |
821 | * are supported... Note drivers using the timing API | |
822 | * will get this right anyway | |
823 | */ | |
824 | } | |
825 | ||
826 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
827 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
828 | ||
829 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
830 | } | |
831 | ||
11e29e21 AC |
832 | /* |
833 | * Compute the PIO modes available for this device. This is not as | |
834 | * trivial as it seems if we must consider early devices correctly. | |
835 | * | |
836 | * FIXME: pre IDE drive timing (do we care ?). | |
837 | */ | |
838 | ||
057ace5e | 839 | static unsigned int ata_pio_modes(const struct ata_device *adev) |
11e29e21 AC |
840 | { |
841 | u16 modes; | |
842 | ||
ffa29456 AC |
843 | /* Usual case. Word 53 indicates word 64 is valid */ |
844 | if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
11e29e21 AC |
845 | modes = adev->id[ATA_ID_PIO_MODES] & 0x03; |
846 | modes <<= 3; | |
847 | modes |= 0x7; | |
848 | return modes; | |
849 | } | |
850 | ||
ffa29456 AC |
851 | /* If word 64 isn't valid then Word 51 high byte holds the PIO timing |
852 | number for the maximum. Turn it into a mask and return it */ | |
853 | modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ; | |
11e29e21 | 854 | return modes; |
ffa29456 AC |
855 | /* But wait.. there's more. Design your standards by committee and |
856 | you too can get a free iordy field to process. However its the | |
857 | speeds not the modes that are supported... Note drivers using the | |
858 | timing API will get this right anyway */ | |
11e29e21 AC |
859 | } |
860 | ||
86e45b6b TH |
861 | /** |
862 | * ata_port_queue_task - Queue port_task | |
863 | * @ap: The ata_port to queue port_task for | |
864 | * | |
865 | * Schedule @fn(@data) for execution after @delay jiffies using | |
866 | * port_task. There is one port_task per port and it's the | |
867 | * user(low level driver)'s responsibility to make sure that only | |
868 | * one task is active at any given time. | |
869 | * | |
870 | * libata core layer takes care of synchronization between | |
871 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
872 | * synchronization. | |
873 | * | |
874 | * LOCKING: | |
875 | * Inherited from caller. | |
876 | */ | |
877 | void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data, | |
878 | unsigned long delay) | |
879 | { | |
880 | int rc; | |
881 | ||
2e755f68 | 882 | if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK) |
86e45b6b TH |
883 | return; |
884 | ||
885 | PREPARE_WORK(&ap->port_task, fn, data); | |
886 | ||
887 | if (!delay) | |
888 | rc = queue_work(ata_wq, &ap->port_task); | |
889 | else | |
890 | rc = queue_delayed_work(ata_wq, &ap->port_task, delay); | |
891 | ||
892 | /* rc == 0 means that another user is using port task */ | |
893 | WARN_ON(rc == 0); | |
894 | } | |
895 | ||
896 | /** | |
897 | * ata_port_flush_task - Flush port_task | |
898 | * @ap: The ata_port to flush port_task for | |
899 | * | |
900 | * After this function completes, port_task is guranteed not to | |
901 | * be running or scheduled. | |
902 | * | |
903 | * LOCKING: | |
904 | * Kernel thread context (may sleep) | |
905 | */ | |
906 | void ata_port_flush_task(struct ata_port *ap) | |
907 | { | |
908 | unsigned long flags; | |
909 | ||
910 | DPRINTK("ENTER\n"); | |
911 | ||
912 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2e755f68 | 913 | ap->flags |= ATA_FLAG_FLUSH_PORT_TASK; |
86e45b6b TH |
914 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
915 | ||
916 | DPRINTK("flush #1\n"); | |
917 | flush_workqueue(ata_wq); | |
918 | ||
919 | /* | |
920 | * At this point, if a task is running, it's guaranteed to see | |
921 | * the FLUSH flag; thus, it will never queue pio tasks again. | |
922 | * Cancel and flush. | |
923 | */ | |
924 | if (!cancel_delayed_work(&ap->port_task)) { | |
925 | DPRINTK("flush #2\n"); | |
926 | flush_workqueue(ata_wq); | |
927 | } | |
928 | ||
929 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2e755f68 | 930 | ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK; |
86e45b6b TH |
931 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
932 | ||
933 | DPRINTK("EXIT\n"); | |
934 | } | |
935 | ||
77853bf2 | 936 | void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 937 | { |
77853bf2 | 938 | struct completion *waiting = qc->private_data; |
a2a7a662 | 939 | |
77853bf2 | 940 | qc->ap->ops->tf_read(qc->ap, &qc->tf); |
a2a7a662 | 941 | complete(waiting); |
a2a7a662 TH |
942 | } |
943 | ||
944 | /** | |
945 | * ata_exec_internal - execute libata internal command | |
946 | * @ap: Port to which the command is sent | |
947 | * @dev: Device to which the command is sent | |
948 | * @tf: Taskfile registers for the command and the result | |
949 | * @dma_dir: Data tranfer direction of the command | |
950 | * @buf: Data buffer of the command | |
951 | * @buflen: Length of data buffer | |
952 | * | |
953 | * Executes libata internal command with timeout. @tf contains | |
954 | * command on entry and result on return. Timeout and error | |
955 | * conditions are reported via return value. No recovery action | |
956 | * is taken after a command times out. It's caller's duty to | |
957 | * clean up after timeout. | |
958 | * | |
959 | * LOCKING: | |
960 | * None. Should be called with kernel context, might sleep. | |
961 | */ | |
962 | ||
963 | static unsigned | |
964 | ata_exec_internal(struct ata_port *ap, struct ata_device *dev, | |
965 | struct ata_taskfile *tf, | |
966 | int dma_dir, void *buf, unsigned int buflen) | |
967 | { | |
968 | u8 command = tf->command; | |
969 | struct ata_queued_cmd *qc; | |
970 | DECLARE_COMPLETION(wait); | |
971 | unsigned long flags; | |
77853bf2 | 972 | unsigned int err_mask; |
a2a7a662 TH |
973 | |
974 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
975 | ||
976 | qc = ata_qc_new_init(ap, dev); | |
977 | BUG_ON(qc == NULL); | |
978 | ||
979 | qc->tf = *tf; | |
980 | qc->dma_dir = dma_dir; | |
981 | if (dma_dir != DMA_NONE) { | |
982 | ata_sg_init_one(qc, buf, buflen); | |
983 | qc->nsect = buflen / ATA_SECT_SIZE; | |
984 | } | |
985 | ||
77853bf2 | 986 | qc->private_data = &wait; |
a2a7a662 TH |
987 | qc->complete_fn = ata_qc_complete_internal; |
988 | ||
9a3d9eb0 TH |
989 | qc->err_mask = ata_qc_issue(qc); |
990 | if (qc->err_mask) | |
8e436af9 | 991 | ata_qc_complete(qc); |
a2a7a662 TH |
992 | |
993 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
994 | ||
995 | if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) { | |
996 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
997 | ||
998 | /* We're racing with irq here. If we lose, the | |
999 | * following test prevents us from completing the qc | |
1000 | * again. If completion irq occurs after here but | |
1001 | * before the caller cleans up, it will result in a | |
1002 | * spurious interrupt. We can live with that. | |
1003 | */ | |
77853bf2 | 1004 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
11a56d24 | 1005 | qc->err_mask = AC_ERR_TIMEOUT; |
a2a7a662 TH |
1006 | ata_qc_complete(qc); |
1007 | printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n", | |
1008 | ap->id, command); | |
1009 | } | |
1010 | ||
1011 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1012 | } | |
1013 | ||
77853bf2 TH |
1014 | *tf = qc->tf; |
1015 | err_mask = qc->err_mask; | |
1016 | ||
1017 | ata_qc_free(qc); | |
1018 | ||
1019 | return err_mask; | |
a2a7a662 TH |
1020 | } |
1021 | ||
1bc4ccff AC |
1022 | /** |
1023 | * ata_pio_need_iordy - check if iordy needed | |
1024 | * @adev: ATA device | |
1025 | * | |
1026 | * Check if the current speed of the device requires IORDY. Used | |
1027 | * by various controllers for chip configuration. | |
1028 | */ | |
1029 | ||
1030 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |
1031 | { | |
1032 | int pio; | |
1033 | int speed = adev->pio_mode - XFER_PIO_0; | |
1034 | ||
1035 | if (speed < 2) | |
1036 | return 0; | |
1037 | if (speed > 2) | |
1038 | return 1; | |
1039 | ||
1040 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ | |
1041 | ||
1042 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ | |
1043 | pio = adev->id[ATA_ID_EIDE_PIO]; | |
1044 | /* Is the speed faster than the drive allows non IORDY ? */ | |
1045 | if (pio) { | |
1046 | /* This is cycle times not frequency - watch the logic! */ | |
1047 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
1048 | return 1; | |
1049 | return 0; | |
1050 | } | |
1051 | } | |
1052 | return 0; | |
1053 | } | |
1054 | ||
1da177e4 | 1055 | /** |
49016aca TH |
1056 | * ata_dev_read_id - Read ID data from the specified device |
1057 | * @ap: port on which target device resides | |
1058 | * @dev: target device | |
1059 | * @p_class: pointer to class of the target device (may be changed) | |
1060 | * @post_reset: is this read ID post-reset? | |
d9572b1d | 1061 | * @p_id: read IDENTIFY page (newly allocated) |
1da177e4 | 1062 | * |
49016aca TH |
1063 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1064 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
1065 | * devices. This function also takes care of EDD signature | |
1066 | * misreporting (to be removed once EDD support is gone) and | |
1067 | * issues ATA_CMD_INIT_DEV_PARAMS for pre-ATA4 drives. | |
1da177e4 LT |
1068 | * |
1069 | * LOCKING: | |
49016aca TH |
1070 | * Kernel thread context (may sleep) |
1071 | * | |
1072 | * RETURNS: | |
1073 | * 0 on success, -errno otherwise. | |
1da177e4 | 1074 | */ |
49016aca | 1075 | static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev, |
d9572b1d | 1076 | unsigned int *p_class, int post_reset, u16 **p_id) |
1da177e4 | 1077 | { |
49016aca | 1078 | unsigned int class = *p_class; |
1da177e4 | 1079 | unsigned int using_edd; |
a0123703 | 1080 | struct ata_taskfile tf; |
49016aca | 1081 | unsigned int err_mask = 0; |
d9572b1d | 1082 | u16 *id; |
49016aca TH |
1083 | const char *reason; |
1084 | int rc; | |
1da177e4 | 1085 | |
49016aca | 1086 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno); |
1da177e4 | 1087 | |
61eb066a TH |
1088 | if (ap->ops->probe_reset || |
1089 | ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET)) | |
1da177e4 LT |
1090 | using_edd = 0; |
1091 | else | |
1092 | using_edd = 1; | |
1093 | ||
49016aca | 1094 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
1da177e4 | 1095 | |
d9572b1d TH |
1096 | id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL); |
1097 | if (id == NULL) { | |
1098 | rc = -ENOMEM; | |
1099 | reason = "out of memory"; | |
1100 | goto err_out; | |
1101 | } | |
1102 | ||
49016aca TH |
1103 | retry: |
1104 | ata_tf_init(ap, &tf, dev->devno); | |
a0123703 | 1105 | |
49016aca TH |
1106 | switch (class) { |
1107 | case ATA_DEV_ATA: | |
a0123703 | 1108 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1109 | break; |
1110 | case ATA_DEV_ATAPI: | |
a0123703 | 1111 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1112 | break; |
1113 | default: | |
1114 | rc = -ENODEV; | |
1115 | reason = "unsupported class"; | |
1116 | goto err_out; | |
1da177e4 LT |
1117 | } |
1118 | ||
a0123703 | 1119 | tf.protocol = ATA_PROT_PIO; |
1da177e4 | 1120 | |
a0123703 | 1121 | err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE, |
49016aca | 1122 | id, sizeof(id[0]) * ATA_ID_WORDS); |
1da177e4 | 1123 | |
a0123703 | 1124 | if (err_mask) { |
49016aca TH |
1125 | rc = -EIO; |
1126 | reason = "I/O error"; | |
1127 | ||
a0123703 TH |
1128 | if (err_mask & ~AC_ERR_DEV) |
1129 | goto err_out; | |
0169e284 | 1130 | |
1da177e4 LT |
1131 | /* |
1132 | * arg! EDD works for all test cases, but seems to return | |
1133 | * the ATA signature for some ATAPI devices. Until the | |
1134 | * reason for this is found and fixed, we fix up the mess | |
1135 | * here. If IDENTIFY DEVICE returns command aborted | |
1136 | * (as ATAPI devices do), then we issue an | |
1137 | * IDENTIFY PACKET DEVICE. | |
1138 | * | |
1139 | * ATA software reset (SRST, the default) does not appear | |
1140 | * to have this problem. | |
1141 | */ | |
49016aca | 1142 | if ((using_edd) && (class == ATA_DEV_ATA)) { |
a0123703 | 1143 | u8 err = tf.feature; |
1da177e4 | 1144 | if (err & ATA_ABORTED) { |
49016aca | 1145 | class = ATA_DEV_ATAPI; |
1da177e4 LT |
1146 | goto retry; |
1147 | } | |
1148 | } | |
1149 | goto err_out; | |
1150 | } | |
1151 | ||
49016aca | 1152 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 LT |
1153 | |
1154 | /* print device capabilities */ | |
1155 | printk(KERN_DEBUG "ata%u: dev %u cfg " | |
1156 | "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
49016aca TH |
1157 | ap->id, dev->devno, |
1158 | id[49], id[82], id[83], id[84], id[85], id[86], id[87], id[88]); | |
1159 | ||
1160 | /* sanity check */ | |
1161 | if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) { | |
1162 | rc = -EINVAL; | |
1163 | reason = "device reports illegal type"; | |
1164 | goto err_out; | |
1165 | } | |
1166 | ||
1167 | if (post_reset && class == ATA_DEV_ATA) { | |
1168 | /* | |
1169 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1170 | * SRST RESET | |
1171 | * IDENTIFY | |
1172 | * INITIALIZE DEVICE PARAMETERS | |
1173 | * anything else.. | |
1174 | * Some drives were very specific about that exact sequence. | |
1175 | */ | |
1176 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
1177 | err_mask = ata_dev_init_params(ap, dev); | |
1178 | if (err_mask) { | |
1179 | rc = -EIO; | |
1180 | reason = "INIT_DEV_PARAMS failed"; | |
1181 | goto err_out; | |
1182 | } | |
1183 | ||
1184 | /* current CHS translation info (id[53-58]) might be | |
1185 | * changed. reread the identify device info. | |
1186 | */ | |
1187 | post_reset = 0; | |
1188 | goto retry; | |
1189 | } | |
1190 | } | |
1191 | ||
1192 | *p_class = class; | |
d9572b1d | 1193 | *p_id = id; |
49016aca TH |
1194 | return 0; |
1195 | ||
1196 | err_out: | |
1197 | printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n", | |
1198 | ap->id, dev->devno, reason); | |
d9572b1d | 1199 | kfree(id); |
49016aca TH |
1200 | return rc; |
1201 | } | |
1202 | ||
4b2f3ede TH |
1203 | static inline u8 ata_dev_knobble(const struct ata_port *ap, |
1204 | struct ata_device *dev) | |
1205 | { | |
1206 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); | |
1207 | } | |
1208 | ||
49016aca | 1209 | /** |
ffeae418 TH |
1210 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
1211 | * @ap: Port on which target device resides | |
1212 | * @dev: Target device to configure | |
4c2d721a | 1213 | * @print_info: Enable device info printout |
ffeae418 TH |
1214 | * |
1215 | * Configure @dev according to @dev->id. Generic and low-level | |
1216 | * driver specific fixups are also applied. | |
49016aca TH |
1217 | * |
1218 | * LOCKING: | |
ffeae418 TH |
1219 | * Kernel thread context (may sleep) |
1220 | * | |
1221 | * RETURNS: | |
1222 | * 0 on success, -errno otherwise | |
49016aca | 1223 | */ |
4c2d721a TH |
1224 | static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev, |
1225 | int print_info) | |
49016aca | 1226 | { |
ff8854b2 | 1227 | unsigned int xfer_mask; |
49016aca TH |
1228 | int i, rc; |
1229 | ||
1230 | if (!ata_dev_present(dev)) { | |
1231 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
ffeae418 TH |
1232 | ap->id, dev->devno); |
1233 | return 0; | |
49016aca TH |
1234 | } |
1235 | ||
ffeae418 | 1236 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno); |
1da177e4 | 1237 | |
208a9933 TH |
1238 | /* initialize to-be-configured parameters */ |
1239 | dev->flags = 0; | |
1240 | dev->max_sectors = 0; | |
1241 | dev->cdb_len = 0; | |
1242 | dev->n_sectors = 0; | |
1243 | dev->cylinders = 0; | |
1244 | dev->heads = 0; | |
1245 | dev->sectors = 0; | |
1246 | ||
1da177e4 LT |
1247 | /* |
1248 | * common ATA, ATAPI feature tests | |
1249 | */ | |
1250 | ||
8bf62ece AL |
1251 | /* we require DMA support (bits 8 of word 49) */ |
1252 | if (!ata_id_has_dma(dev->id)) { | |
1253 | printk(KERN_DEBUG "ata%u: no dma\n", ap->id); | |
ffeae418 | 1254 | rc = -EINVAL; |
1da177e4 LT |
1255 | goto err_out_nosup; |
1256 | } | |
1257 | ||
ff8854b2 TH |
1258 | /* find max transfer mode; for printk only */ |
1259 | xfer_mask = ata_id_xfermask(dev->id); | |
1da177e4 | 1260 | |
0bd3300a | 1261 | ata_dump_id(dev->id); |
1da177e4 LT |
1262 | |
1263 | /* ATA-specific feature tests */ | |
1264 | if (dev->class == ATA_DEV_ATA) { | |
2940740b TH |
1265 | dev->n_sectors = ata_id_n_sectors(dev->id); |
1266 | ||
8bf62ece | 1267 | if (ata_id_has_lba(dev->id)) { |
4c2d721a | 1268 | const char *lba_desc; |
8bf62ece | 1269 | |
4c2d721a TH |
1270 | lba_desc = "LBA"; |
1271 | dev->flags |= ATA_DFLAG_LBA; | |
1272 | if (ata_id_has_lba48(dev->id)) { | |
8bf62ece | 1273 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a TH |
1274 | lba_desc = "LBA48"; |
1275 | } | |
8bf62ece AL |
1276 | |
1277 | /* print device info to dmesg */ | |
4c2d721a TH |
1278 | if (print_info) |
1279 | printk(KERN_INFO "ata%u: dev %u ATA-%d, " | |
1280 | "max %s, %Lu sectors: %s\n", | |
1281 | ap->id, dev->devno, | |
1282 | ata_id_major_version(dev->id), | |
ff8854b2 | 1283 | ata_mode_string(xfer_mask), |
4c2d721a TH |
1284 | (unsigned long long)dev->n_sectors, |
1285 | lba_desc); | |
ffeae418 | 1286 | } else { |
8bf62ece AL |
1287 | /* CHS */ |
1288 | ||
1289 | /* Default translation */ | |
1290 | dev->cylinders = dev->id[1]; | |
1291 | dev->heads = dev->id[3]; | |
1292 | dev->sectors = dev->id[6]; | |
8bf62ece AL |
1293 | |
1294 | if (ata_id_current_chs_valid(dev->id)) { | |
1295 | /* Current CHS translation is valid. */ | |
1296 | dev->cylinders = dev->id[54]; | |
1297 | dev->heads = dev->id[55]; | |
1298 | dev->sectors = dev->id[56]; | |
8bf62ece AL |
1299 | } |
1300 | ||
1301 | /* print device info to dmesg */ | |
4c2d721a TH |
1302 | if (print_info) |
1303 | printk(KERN_INFO "ata%u: dev %u ATA-%d, " | |
1304 | "max %s, %Lu sectors: CHS %u/%u/%u\n", | |
1305 | ap->id, dev->devno, | |
1306 | ata_id_major_version(dev->id), | |
ff8854b2 | 1307 | ata_mode_string(xfer_mask), |
4c2d721a TH |
1308 | (unsigned long long)dev->n_sectors, |
1309 | dev->cylinders, dev->heads, dev->sectors); | |
1da177e4 LT |
1310 | } |
1311 | ||
6e7846e9 | 1312 | dev->cdb_len = 16; |
1da177e4 LT |
1313 | } |
1314 | ||
1315 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1316 | else if (dev->class == ATA_DEV_ATAPI) { |
1da177e4 LT |
1317 | rc = atapi_cdb_len(dev->id); |
1318 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1319 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | |
ffeae418 | 1320 | rc = -EINVAL; |
1da177e4 LT |
1321 | goto err_out_nosup; |
1322 | } | |
6e7846e9 | 1323 | dev->cdb_len = (unsigned int) rc; |
1da177e4 LT |
1324 | |
1325 | /* print device info to dmesg */ | |
4c2d721a TH |
1326 | if (print_info) |
1327 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | |
ff8854b2 | 1328 | ap->id, dev->devno, ata_mode_string(xfer_mask)); |
1da177e4 LT |
1329 | } |
1330 | ||
6e7846e9 TH |
1331 | ap->host->max_cmd_len = 0; |
1332 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1333 | ap->host->max_cmd_len = max_t(unsigned int, | |
1334 | ap->host->max_cmd_len, | |
1335 | ap->device[i].cdb_len); | |
1336 | ||
4b2f3ede TH |
1337 | /* limit bridge transfers to udma5, 200 sectors */ |
1338 | if (ata_dev_knobble(ap, dev)) { | |
4c2d721a TH |
1339 | if (print_info) |
1340 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", | |
1341 | ap->id, dev->devno); | |
4b2f3ede TH |
1342 | ap->udma_mask &= ATA_UDMA5; |
1343 | dev->max_sectors = ATA_MAX_SECTORS; | |
1344 | } | |
1345 | ||
1346 | if (ap->ops->dev_config) | |
1347 | ap->ops->dev_config(ap, dev); | |
1348 | ||
1da177e4 | 1349 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); |
ffeae418 | 1350 | return 0; |
1da177e4 LT |
1351 | |
1352 | err_out_nosup: | |
1353 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | |
ffeae418 | 1354 | ap->id, dev->devno); |
1da177e4 | 1355 | DPRINTK("EXIT, err\n"); |
ffeae418 | 1356 | return rc; |
1da177e4 LT |
1357 | } |
1358 | ||
1359 | /** | |
1360 | * ata_bus_probe - Reset and probe ATA bus | |
1361 | * @ap: Bus to probe | |
1362 | * | |
0cba632b JG |
1363 | * Master ATA bus probing function. Initiates a hardware-dependent |
1364 | * bus reset, then attempts to identify any devices found on | |
1365 | * the bus. | |
1366 | * | |
1da177e4 | 1367 | * LOCKING: |
0cba632b | 1368 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1369 | * |
1370 | * RETURNS: | |
1371 | * Zero on success, non-zero on error. | |
1372 | */ | |
1373 | ||
1374 | static int ata_bus_probe(struct ata_port *ap) | |
1375 | { | |
28ca5c57 TH |
1376 | unsigned int classes[ATA_MAX_DEVICES]; |
1377 | unsigned int i, rc, found = 0; | |
1da177e4 | 1378 | |
28ca5c57 | 1379 | ata_port_probe(ap); |
c19ba8af | 1380 | |
28ca5c57 TH |
1381 | /* reset */ |
1382 | if (ap->ops->probe_reset) { | |
c19ba8af | 1383 | rc = ap->ops->probe_reset(ap, classes); |
28ca5c57 TH |
1384 | if (rc) { |
1385 | printk("ata%u: reset failed (errno=%d)\n", ap->id, rc); | |
1386 | return rc; | |
c19ba8af | 1387 | } |
28ca5c57 TH |
1388 | |
1389 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1390 | if (classes[i] == ATA_DEV_UNKNOWN) | |
1391 | classes[i] = ATA_DEV_NONE; | |
1392 | } else { | |
c19ba8af TH |
1393 | ap->ops->phy_reset(ap); |
1394 | ||
28ca5c57 TH |
1395 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1396 | if (!(ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1397 | classes[i] = ap->device[i].class; | |
1398 | else | |
1399 | ap->device[i].class = ATA_DEV_UNKNOWN; | |
1400 | } | |
1401 | ata_port_probe(ap); | |
1402 | } | |
1da177e4 | 1403 | |
28ca5c57 | 1404 | /* read IDENTIFY page and configure devices */ |
1da177e4 | 1405 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
ffeae418 TH |
1406 | struct ata_device *dev = &ap->device[i]; |
1407 | ||
28ca5c57 TH |
1408 | dev->class = classes[i]; |
1409 | ||
ffeae418 TH |
1410 | if (!ata_dev_present(dev)) |
1411 | continue; | |
1412 | ||
1413 | WARN_ON(dev->id != NULL); | |
1414 | if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) { | |
1415 | dev->class = ATA_DEV_NONE; | |
1416 | continue; | |
1417 | } | |
1418 | ||
4c2d721a | 1419 | if (ata_dev_configure(ap, dev, 1)) { |
ffeae418 TH |
1420 | dev->class++; /* disable device */ |
1421 | continue; | |
1da177e4 | 1422 | } |
ffeae418 | 1423 | |
ffeae418 | 1424 | found = 1; |
1da177e4 LT |
1425 | } |
1426 | ||
28ca5c57 | 1427 | if (!found) |
1da177e4 LT |
1428 | goto err_out_disable; |
1429 | ||
1430 | ata_set_mode(ap); | |
1431 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1432 | goto err_out_disable; | |
1433 | ||
1434 | return 0; | |
1435 | ||
1436 | err_out_disable: | |
1437 | ap->ops->port_disable(ap); | |
1da177e4 LT |
1438 | return -1; |
1439 | } | |
1440 | ||
1441 | /** | |
0cba632b JG |
1442 | * ata_port_probe - Mark port as enabled |
1443 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1444 | * |
0cba632b JG |
1445 | * Modify @ap data structure such that the system |
1446 | * thinks that the entire port is enabled. | |
1447 | * | |
1448 | * LOCKING: host_set lock, or some other form of | |
1449 | * serialization. | |
1da177e4 LT |
1450 | */ |
1451 | ||
1452 | void ata_port_probe(struct ata_port *ap) | |
1453 | { | |
1454 | ap->flags &= ~ATA_FLAG_PORT_DISABLED; | |
1455 | } | |
1456 | ||
3be680b7 TH |
1457 | /** |
1458 | * sata_print_link_status - Print SATA link status | |
1459 | * @ap: SATA port to printk link status about | |
1460 | * | |
1461 | * This function prints link speed and status of a SATA link. | |
1462 | * | |
1463 | * LOCKING: | |
1464 | * None. | |
1465 | */ | |
1466 | static void sata_print_link_status(struct ata_port *ap) | |
1467 | { | |
1468 | u32 sstatus, tmp; | |
1469 | const char *speed; | |
1470 | ||
1471 | if (!ap->ops->scr_read) | |
1472 | return; | |
1473 | ||
1474 | sstatus = scr_read(ap, SCR_STATUS); | |
1475 | ||
1476 | if (sata_dev_present(ap)) { | |
1477 | tmp = (sstatus >> 4) & 0xf; | |
1478 | if (tmp & (1 << 0)) | |
1479 | speed = "1.5"; | |
1480 | else if (tmp & (1 << 1)) | |
1481 | speed = "3.0"; | |
1482 | else | |
1483 | speed = "<unknown>"; | |
1484 | printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n", | |
1485 | ap->id, speed, sstatus); | |
1486 | } else { | |
1487 | printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n", | |
1488 | ap->id, sstatus); | |
1489 | } | |
1490 | } | |
1491 | ||
1da177e4 | 1492 | /** |
780a87f7 JG |
1493 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1494 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1495 | * |
780a87f7 JG |
1496 | * This function issues commands to standard SATA Sxxx |
1497 | * PHY registers, to wake up the phy (and device), and | |
1498 | * clear any reset condition. | |
1da177e4 LT |
1499 | * |
1500 | * LOCKING: | |
0cba632b | 1501 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1502 | * |
1503 | */ | |
1504 | void __sata_phy_reset(struct ata_port *ap) | |
1505 | { | |
1506 | u32 sstatus; | |
1507 | unsigned long timeout = jiffies + (HZ * 5); | |
1508 | ||
1509 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e BR |
1510 | /* issue phy wake/reset */ |
1511 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
62ba2841 TH |
1512 | /* Couldn't find anything in SATA I/II specs, but |
1513 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1514 | mdelay(1); | |
1da177e4 | 1515 | } |
cdcca89e | 1516 | scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */ |
1da177e4 LT |
1517 | |
1518 | /* wait for phy to become ready, if necessary */ | |
1519 | do { | |
1520 | msleep(200); | |
1521 | sstatus = scr_read(ap, SCR_STATUS); | |
1522 | if ((sstatus & 0xf) != 1) | |
1523 | break; | |
1524 | } while (time_before(jiffies, timeout)); | |
1525 | ||
3be680b7 TH |
1526 | /* print link status */ |
1527 | sata_print_link_status(ap); | |
656563e3 | 1528 | |
3be680b7 TH |
1529 | /* TODO: phy layer with polling, timeouts, etc. */ |
1530 | if (sata_dev_present(ap)) | |
1da177e4 | 1531 | ata_port_probe(ap); |
3be680b7 | 1532 | else |
1da177e4 | 1533 | ata_port_disable(ap); |
1da177e4 LT |
1534 | |
1535 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1536 | return; | |
1537 | ||
1538 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1539 | ata_port_disable(ap); | |
1540 | return; | |
1541 | } | |
1542 | ||
1543 | ap->cbl = ATA_CBL_SATA; | |
1544 | } | |
1545 | ||
1546 | /** | |
780a87f7 JG |
1547 | * sata_phy_reset - Reset SATA bus. |
1548 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1549 | * |
780a87f7 JG |
1550 | * This function resets the SATA bus, and then probes |
1551 | * the bus for devices. | |
1da177e4 LT |
1552 | * |
1553 | * LOCKING: | |
0cba632b | 1554 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1555 | * |
1556 | */ | |
1557 | void sata_phy_reset(struct ata_port *ap) | |
1558 | { | |
1559 | __sata_phy_reset(ap); | |
1560 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1561 | return; | |
1562 | ata_bus_reset(ap); | |
1563 | } | |
1564 | ||
1565 | /** | |
780a87f7 JG |
1566 | * ata_port_disable - Disable port. |
1567 | * @ap: Port to be disabled. | |
1da177e4 | 1568 | * |
780a87f7 JG |
1569 | * Modify @ap data structure such that the system |
1570 | * thinks that the entire port is disabled, and should | |
1571 | * never attempt to probe or communicate with devices | |
1572 | * on this port. | |
1573 | * | |
1574 | * LOCKING: host_set lock, or some other form of | |
1575 | * serialization. | |
1da177e4 LT |
1576 | */ |
1577 | ||
1578 | void ata_port_disable(struct ata_port *ap) | |
1579 | { | |
1580 | ap->device[0].class = ATA_DEV_NONE; | |
1581 | ap->device[1].class = ATA_DEV_NONE; | |
1582 | ap->flags |= ATA_FLAG_PORT_DISABLED; | |
1583 | } | |
1584 | ||
452503f9 AC |
1585 | /* |
1586 | * This mode timing computation functionality is ported over from | |
1587 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
1588 | */ | |
1589 | /* | |
1590 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | |
1591 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | |
1592 | * for PIO 5, which is a nonstandard extension and UDMA6, which | |
1593 | * is currently supported only by Maxtor drives. | |
1594 | */ | |
1595 | ||
1596 | static const struct ata_timing ata_timing[] = { | |
1597 | ||
1598 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
1599 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
1600 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
1601 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
1602 | ||
1603 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, | |
1604 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
1605 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
1606 | ||
1607 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
1608 | ||
1609 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, | |
1610 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
1611 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
1612 | ||
1613 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, | |
1614 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
1615 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
1616 | ||
1617 | /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */ | |
1618 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, | |
1619 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
1620 | ||
1621 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
1622 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
1623 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
1624 | ||
1625 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
1626 | ||
1627 | { 0xFF } | |
1628 | }; | |
1629 | ||
1630 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
1631 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
1632 | ||
1633 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
1634 | { | |
1635 | q->setup = EZ(t->setup * 1000, T); | |
1636 | q->act8b = EZ(t->act8b * 1000, T); | |
1637 | q->rec8b = EZ(t->rec8b * 1000, T); | |
1638 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
1639 | q->active = EZ(t->active * 1000, T); | |
1640 | q->recover = EZ(t->recover * 1000, T); | |
1641 | q->cycle = EZ(t->cycle * 1000, T); | |
1642 | q->udma = EZ(t->udma * 1000, UT); | |
1643 | } | |
1644 | ||
1645 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
1646 | struct ata_timing *m, unsigned int what) | |
1647 | { | |
1648 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
1649 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
1650 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
1651 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
1652 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
1653 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
1654 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
1655 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
1656 | } | |
1657 | ||
1658 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
1659 | { | |
1660 | const struct ata_timing *t; | |
1661 | ||
1662 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 1663 | if (t->mode == 0xFF) |
452503f9 AC |
1664 | return NULL; |
1665 | return t; | |
1666 | } | |
1667 | ||
1668 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
1669 | struct ata_timing *t, int T, int UT) | |
1670 | { | |
1671 | const struct ata_timing *s; | |
1672 | struct ata_timing p; | |
1673 | ||
1674 | /* | |
1675 | * Find the mode. | |
75b1f2f8 | 1676 | */ |
452503f9 AC |
1677 | |
1678 | if (!(s = ata_timing_find_mode(speed))) | |
1679 | return -EINVAL; | |
1680 | ||
75b1f2f8 AL |
1681 | memcpy(t, s, sizeof(*s)); |
1682 | ||
452503f9 AC |
1683 | /* |
1684 | * If the drive is an EIDE drive, it can tell us it needs extended | |
1685 | * PIO/MW_DMA cycle timing. | |
1686 | */ | |
1687 | ||
1688 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
1689 | memset(&p, 0, sizeof(p)); | |
1690 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
1691 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
1692 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
1693 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
1694 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
1695 | } | |
1696 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
1697 | } | |
1698 | ||
1699 | /* | |
1700 | * Convert the timing to bus clock counts. | |
1701 | */ | |
1702 | ||
75b1f2f8 | 1703 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
1704 | |
1705 | /* | |
c893a3ae RD |
1706 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
1707 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
1708 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
1709 | */ |
1710 | ||
1711 | if (speed > XFER_PIO_4) { | |
1712 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
1713 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
1714 | } | |
1715 | ||
1716 | /* | |
c893a3ae | 1717 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
1718 | */ |
1719 | ||
1720 | if (t->act8b + t->rec8b < t->cyc8b) { | |
1721 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
1722 | t->rec8b = t->cyc8b - t->act8b; | |
1723 | } | |
1724 | ||
1725 | if (t->active + t->recover < t->cycle) { | |
1726 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
1727 | t->recover = t->cycle - t->active; | |
1728 | } | |
1729 | ||
1730 | return 0; | |
1731 | } | |
1732 | ||
057ace5e | 1733 | static const struct { |
1da177e4 LT |
1734 | unsigned int shift; |
1735 | u8 base; | |
1736 | } xfer_mode_classes[] = { | |
1737 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | |
1738 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | |
1739 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | |
1740 | }; | |
1741 | ||
858119e1 | 1742 | static u8 base_from_shift(unsigned int shift) |
1da177e4 LT |
1743 | { |
1744 | int i; | |
1745 | ||
1746 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | |
1747 | if (xfer_mode_classes[i].shift == shift) | |
1748 | return xfer_mode_classes[i].base; | |
1749 | ||
1750 | return 0xff; | |
1751 | } | |
1752 | ||
1753 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |
1754 | { | |
1755 | int ofs, idx; | |
1756 | u8 base; | |
1757 | ||
1758 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1759 | return; | |
1760 | ||
1761 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
1762 | dev->flags |= ATA_DFLAG_PIO; | |
1763 | ||
1764 | ata_dev_set_xfermode(ap, dev); | |
1765 | ||
1766 | base = base_from_shift(dev->xfer_shift); | |
1767 | ofs = dev->xfer_mode - base; | |
1768 | idx = ofs + dev->xfer_shift; | |
1769 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | |
1770 | ||
48a8a14f TH |
1771 | if (ata_dev_revalidate(ap, dev, 0)) { |
1772 | printk(KERN_ERR "ata%u: failed to revalidate after set " | |
1773 | "xfermode, disabled\n", ap->id); | |
1774 | ata_port_disable(ap); | |
1775 | } | |
1776 | ||
1da177e4 LT |
1777 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", |
1778 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | |
1779 | ||
1780 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | |
1781 | ap->id, dev->devno, xfer_mode_str[idx]); | |
1782 | } | |
1783 | ||
1784 | static int ata_host_set_pio(struct ata_port *ap) | |
1785 | { | |
1786 | unsigned int mask; | |
1787 | int x, i; | |
1788 | u8 base, xfer_mode; | |
1789 | ||
1790 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | |
1791 | x = fgb(mask); | |
1792 | if (x < 0) { | |
1793 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | |
1794 | return -1; | |
1795 | } | |
1796 | ||
1797 | base = base_from_shift(ATA_SHIFT_PIO); | |
1798 | xfer_mode = base + x; | |
1799 | ||
1800 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | |
1801 | (int)base, (int)xfer_mode, mask, x); | |
1802 | ||
1803 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1804 | struct ata_device *dev = &ap->device[i]; | |
1805 | if (ata_dev_present(dev)) { | |
1806 | dev->pio_mode = xfer_mode; | |
1807 | dev->xfer_mode = xfer_mode; | |
1808 | dev->xfer_shift = ATA_SHIFT_PIO; | |
1809 | if (ap->ops->set_piomode) | |
1810 | ap->ops->set_piomode(ap, dev); | |
1811 | } | |
1812 | } | |
1813 | ||
1814 | return 0; | |
1815 | } | |
1816 | ||
1817 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |
1818 | unsigned int xfer_shift) | |
1819 | { | |
1820 | int i; | |
1821 | ||
1822 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1823 | struct ata_device *dev = &ap->device[i]; | |
1824 | if (ata_dev_present(dev)) { | |
1825 | dev->dma_mode = xfer_mode; | |
1826 | dev->xfer_mode = xfer_mode; | |
1827 | dev->xfer_shift = xfer_shift; | |
1828 | if (ap->ops->set_dmamode) | |
1829 | ap->ops->set_dmamode(ap, dev); | |
1830 | } | |
1831 | } | |
1832 | } | |
1833 | ||
1834 | /** | |
1835 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1836 | * @ap: port on which timings will be programmed | |
1837 | * | |
780a87f7 JG |
1838 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). |
1839 | * | |
1da177e4 | 1840 | * LOCKING: |
0cba632b | 1841 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1842 | */ |
1843 | static void ata_set_mode(struct ata_port *ap) | |
1844 | { | |
8cbd6df1 | 1845 | unsigned int xfer_shift; |
1da177e4 LT |
1846 | u8 xfer_mode; |
1847 | int rc; | |
1848 | ||
1849 | /* step 1: always set host PIO timings */ | |
1850 | rc = ata_host_set_pio(ap); | |
1851 | if (rc) | |
1852 | goto err_out; | |
1853 | ||
1854 | /* step 2: choose the best data xfer mode */ | |
1855 | xfer_mode = xfer_shift = 0; | |
1856 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | |
1857 | if (rc) | |
1858 | goto err_out; | |
1859 | ||
1860 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | |
1861 | if (xfer_shift != ATA_SHIFT_PIO) | |
1862 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | |
1863 | ||
1864 | /* step 4: update devices' xfer mode */ | |
1865 | ata_dev_set_mode(ap, &ap->device[0]); | |
1866 | ata_dev_set_mode(ap, &ap->device[1]); | |
1867 | ||
1868 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1869 | return; | |
1870 | ||
1871 | if (ap->ops->post_set_mode) | |
1872 | ap->ops->post_set_mode(ap); | |
1873 | ||
1da177e4 LT |
1874 | return; |
1875 | ||
1876 | err_out: | |
1877 | ata_port_disable(ap); | |
1878 | } | |
1879 | ||
1fdffbce JG |
1880 | /** |
1881 | * ata_tf_to_host - issue ATA taskfile to host controller | |
1882 | * @ap: port to which command is being issued | |
1883 | * @tf: ATA taskfile register set | |
1884 | * | |
1885 | * Issues ATA taskfile register set to ATA host controller, | |
1886 | * with proper synchronization with interrupt handler and | |
1887 | * other threads. | |
1888 | * | |
1889 | * LOCKING: | |
1890 | * spin_lock_irqsave(host_set lock) | |
1891 | */ | |
1892 | ||
1893 | static inline void ata_tf_to_host(struct ata_port *ap, | |
1894 | const struct ata_taskfile *tf) | |
1895 | { | |
1896 | ap->ops->tf_load(ap, tf); | |
1897 | ap->ops->exec_command(ap, tf); | |
1898 | } | |
1899 | ||
1da177e4 LT |
1900 | /** |
1901 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
1902 | * @ap: port containing status register to be polled | |
1903 | * @tmout_pat: impatience timeout | |
1904 | * @tmout: overall timeout | |
1905 | * | |
780a87f7 JG |
1906 | * Sleep until ATA Status register bit BSY clears, |
1907 | * or a timeout occurs. | |
1908 | * | |
1909 | * LOCKING: None. | |
1da177e4 LT |
1910 | */ |
1911 | ||
6f8b9958 TH |
1912 | unsigned int ata_busy_sleep (struct ata_port *ap, |
1913 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
1914 | { |
1915 | unsigned long timer_start, timeout; | |
1916 | u8 status; | |
1917 | ||
1918 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
1919 | timer_start = jiffies; | |
1920 | timeout = timer_start + tmout_pat; | |
1921 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1922 | msleep(50); | |
1923 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
1924 | } | |
1925 | ||
1926 | if (status & ATA_BUSY) | |
1927 | printk(KERN_WARNING "ata%u is slow to respond, " | |
1928 | "please be patient\n", ap->id); | |
1929 | ||
1930 | timeout = timer_start + tmout; | |
1931 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1932 | msleep(50); | |
1933 | status = ata_chk_status(ap); | |
1934 | } | |
1935 | ||
1936 | if (status & ATA_BUSY) { | |
1937 | printk(KERN_ERR "ata%u failed to respond (%lu secs)\n", | |
1938 | ap->id, tmout / HZ); | |
1939 | return 1; | |
1940 | } | |
1941 | ||
1942 | return 0; | |
1943 | } | |
1944 | ||
1945 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
1946 | { | |
1947 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1948 | unsigned int dev0 = devmask & (1 << 0); | |
1949 | unsigned int dev1 = devmask & (1 << 1); | |
1950 | unsigned long timeout; | |
1951 | ||
1952 | /* if device 0 was found in ata_devchk, wait for its | |
1953 | * BSY bit to clear | |
1954 | */ | |
1955 | if (dev0) | |
1956 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1957 | ||
1958 | /* if device 1 was found in ata_devchk, wait for | |
1959 | * register access, then wait for BSY to clear | |
1960 | */ | |
1961 | timeout = jiffies + ATA_TMOUT_BOOT; | |
1962 | while (dev1) { | |
1963 | u8 nsect, lbal; | |
1964 | ||
1965 | ap->ops->dev_select(ap, 1); | |
1966 | if (ap->flags & ATA_FLAG_MMIO) { | |
1967 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
1968 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
1969 | } else { | |
1970 | nsect = inb(ioaddr->nsect_addr); | |
1971 | lbal = inb(ioaddr->lbal_addr); | |
1972 | } | |
1973 | if ((nsect == 1) && (lbal == 1)) | |
1974 | break; | |
1975 | if (time_after(jiffies, timeout)) { | |
1976 | dev1 = 0; | |
1977 | break; | |
1978 | } | |
1979 | msleep(50); /* give drive a breather */ | |
1980 | } | |
1981 | if (dev1) | |
1982 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1983 | ||
1984 | /* is all this really necessary? */ | |
1985 | ap->ops->dev_select(ap, 0); | |
1986 | if (dev1) | |
1987 | ap->ops->dev_select(ap, 1); | |
1988 | if (dev0) | |
1989 | ap->ops->dev_select(ap, 0); | |
1990 | } | |
1991 | ||
1992 | /** | |
0cba632b JG |
1993 | * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command. |
1994 | * @ap: Port to reset and probe | |
1995 | * | |
1996 | * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and | |
1997 | * probe the bus. Not often used these days. | |
1da177e4 LT |
1998 | * |
1999 | * LOCKING: | |
0cba632b | 2000 | * PCI/etc. bus probe sem. |
e5338254 | 2001 | * Obtains host_set lock. |
1da177e4 LT |
2002 | * |
2003 | */ | |
2004 | ||
2005 | static unsigned int ata_bus_edd(struct ata_port *ap) | |
2006 | { | |
2007 | struct ata_taskfile tf; | |
e5338254 | 2008 | unsigned long flags; |
1da177e4 LT |
2009 | |
2010 | /* set up execute-device-diag (bus reset) taskfile */ | |
2011 | /* also, take interrupts to a known state (disabled) */ | |
2012 | DPRINTK("execute-device-diag\n"); | |
2013 | ata_tf_init(ap, &tf, 0); | |
2014 | tf.ctl |= ATA_NIEN; | |
2015 | tf.command = ATA_CMD_EDD; | |
2016 | tf.protocol = ATA_PROT_NODATA; | |
2017 | ||
2018 | /* do bus reset */ | |
e5338254 | 2019 | spin_lock_irqsave(&ap->host_set->lock, flags); |
1da177e4 | 2020 | ata_tf_to_host(ap, &tf); |
e5338254 | 2021 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
1da177e4 LT |
2022 | |
2023 | /* spec says at least 2ms. but who knows with those | |
2024 | * crazy ATAPI devices... | |
2025 | */ | |
2026 | msleep(150); | |
2027 | ||
2028 | return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2029 | } | |
2030 | ||
2031 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
2032 | unsigned int devmask) | |
2033 | { | |
2034 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2035 | ||
2036 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
2037 | ||
2038 | /* software reset. causes dev0 to be selected */ | |
2039 | if (ap->flags & ATA_FLAG_MMIO) { | |
2040 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2041 | udelay(20); /* FIXME: flush */ | |
2042 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
2043 | udelay(20); /* FIXME: flush */ | |
2044 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2045 | } else { | |
2046 | outb(ap->ctl, ioaddr->ctl_addr); | |
2047 | udelay(10); | |
2048 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2049 | udelay(10); | |
2050 | outb(ap->ctl, ioaddr->ctl_addr); | |
2051 | } | |
2052 | ||
2053 | /* spec mandates ">= 2ms" before checking status. | |
2054 | * We wait 150ms, because that was the magic delay used for | |
2055 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2056 | * between when the ATA command register is written, and then | |
2057 | * status is checked. Because waiting for "a while" before | |
2058 | * checking status is fine, post SRST, we perform this magic | |
2059 | * delay here as well. | |
2060 | */ | |
2061 | msleep(150); | |
2062 | ||
2063 | ata_bus_post_reset(ap, devmask); | |
2064 | ||
2065 | return 0; | |
2066 | } | |
2067 | ||
2068 | /** | |
2069 | * ata_bus_reset - reset host port and associated ATA channel | |
2070 | * @ap: port to reset | |
2071 | * | |
2072 | * This is typically the first time we actually start issuing | |
2073 | * commands to the ATA channel. We wait for BSY to clear, then | |
2074 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2075 | * result. Determine what devices, if any, are on the channel | |
2076 | * by looking at the device 0/1 error register. Look at the signature | |
2077 | * stored in each device's taskfile registers, to determine if | |
2078 | * the device is ATA or ATAPI. | |
2079 | * | |
2080 | * LOCKING: | |
0cba632b JG |
2081 | * PCI/etc. bus probe sem. |
2082 | * Obtains host_set lock. | |
1da177e4 LT |
2083 | * |
2084 | * SIDE EFFECTS: | |
2085 | * Sets ATA_FLAG_PORT_DISABLED if bus reset fails. | |
2086 | */ | |
2087 | ||
2088 | void ata_bus_reset(struct ata_port *ap) | |
2089 | { | |
2090 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2091 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2092 | u8 err; | |
2093 | unsigned int dev0, dev1 = 0, rc = 0, devmask = 0; | |
2094 | ||
2095 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2096 | ||
2097 | /* determine if device 0/1 are present */ | |
2098 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2099 | dev0 = 1; | |
2100 | else { | |
2101 | dev0 = ata_devchk(ap, 0); | |
2102 | if (slave_possible) | |
2103 | dev1 = ata_devchk(ap, 1); | |
2104 | } | |
2105 | ||
2106 | if (dev0) | |
2107 | devmask |= (1 << 0); | |
2108 | if (dev1) | |
2109 | devmask |= (1 << 1); | |
2110 | ||
2111 | /* select device 0 again */ | |
2112 | ap->ops->dev_select(ap, 0); | |
2113 | ||
2114 | /* issue bus reset */ | |
2115 | if (ap->flags & ATA_FLAG_SRST) | |
2116 | rc = ata_bus_softreset(ap, devmask); | |
2117 | else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) { | |
2118 | /* set up device control */ | |
2119 | if (ap->flags & ATA_FLAG_MMIO) | |
2120 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2121 | else | |
2122 | outb(ap->ctl, ioaddr->ctl_addr); | |
2123 | rc = ata_bus_edd(ap); | |
2124 | } | |
2125 | ||
2126 | if (rc) | |
2127 | goto err_out; | |
2128 | ||
2129 | /* | |
2130 | * determine by signature whether we have ATA or ATAPI devices | |
2131 | */ | |
b4dc7623 | 2132 | ap->device[0].class = ata_dev_try_classify(ap, 0, &err); |
1da177e4 | 2133 | if ((slave_possible) && (err != 0x81)) |
b4dc7623 | 2134 | ap->device[1].class = ata_dev_try_classify(ap, 1, &err); |
1da177e4 LT |
2135 | |
2136 | /* re-enable interrupts */ | |
2137 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2138 | ata_irq_on(ap); | |
2139 | ||
2140 | /* is double-select really necessary? */ | |
2141 | if (ap->device[1].class != ATA_DEV_NONE) | |
2142 | ap->ops->dev_select(ap, 1); | |
2143 | if (ap->device[0].class != ATA_DEV_NONE) | |
2144 | ap->ops->dev_select(ap, 0); | |
2145 | ||
2146 | /* if no devices were detected, disable this port */ | |
2147 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2148 | (ap->device[1].class == ATA_DEV_NONE)) | |
2149 | goto err_out; | |
2150 | ||
2151 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2152 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2153 | if (ap->flags & ATA_FLAG_MMIO) | |
2154 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2155 | else | |
2156 | outb(ap->ctl, ioaddr->ctl_addr); | |
2157 | } | |
2158 | ||
2159 | DPRINTK("EXIT\n"); | |
2160 | return; | |
2161 | ||
2162 | err_out: | |
2163 | printk(KERN_ERR "ata%u: disabling port\n", ap->id); | |
2164 | ap->ops->port_disable(ap); | |
2165 | ||
2166 | DPRINTK("EXIT\n"); | |
2167 | } | |
2168 | ||
7a7921e8 TH |
2169 | static int sata_phy_resume(struct ata_port *ap) |
2170 | { | |
2171 | unsigned long timeout = jiffies + (HZ * 5); | |
2172 | u32 sstatus; | |
2173 | ||
2174 | scr_write_flush(ap, SCR_CONTROL, 0x300); | |
2175 | ||
2176 | /* Wait for phy to become ready, if necessary. */ | |
2177 | do { | |
2178 | msleep(200); | |
2179 | sstatus = scr_read(ap, SCR_STATUS); | |
2180 | if ((sstatus & 0xf) != 1) | |
2181 | return 0; | |
2182 | } while (time_before(jiffies, timeout)); | |
2183 | ||
2184 | return -1; | |
2185 | } | |
2186 | ||
8a19ac89 TH |
2187 | /** |
2188 | * ata_std_probeinit - initialize probing | |
2189 | * @ap: port to be probed | |
2190 | * | |
2191 | * @ap is about to be probed. Initialize it. This function is | |
2192 | * to be used as standard callback for ata_drive_probe_reset(). | |
3a39746a TH |
2193 | * |
2194 | * NOTE!!! Do not use this function as probeinit if a low level | |
2195 | * driver implements only hardreset. Just pass NULL as probeinit | |
2196 | * in that case. Using this function is probably okay but doing | |
2197 | * so makes reset sequence different from the original | |
2198 | * ->phy_reset implementation and Jeff nervous. :-P | |
8a19ac89 TH |
2199 | */ |
2200 | extern void ata_std_probeinit(struct ata_port *ap) | |
2201 | { | |
3a39746a | 2202 | if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) { |
8a19ac89 | 2203 | sata_phy_resume(ap); |
3a39746a TH |
2204 | if (sata_dev_present(ap)) |
2205 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2206 | } | |
8a19ac89 TH |
2207 | } |
2208 | ||
c2bd5804 TH |
2209 | /** |
2210 | * ata_std_softreset - reset host port via ATA SRST | |
2211 | * @ap: port to reset | |
2212 | * @verbose: fail verbosely | |
2213 | * @classes: resulting classes of attached devices | |
2214 | * | |
2215 | * Reset host port using ATA SRST. This function is to be used | |
2216 | * as standard callback for ata_drive_*_reset() functions. | |
2217 | * | |
2218 | * LOCKING: | |
2219 | * Kernel thread context (may sleep) | |
2220 | * | |
2221 | * RETURNS: | |
2222 | * 0 on success, -errno otherwise. | |
2223 | */ | |
2224 | int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes) | |
2225 | { | |
2226 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2227 | unsigned int devmask = 0, err_mask; | |
2228 | u8 err; | |
2229 | ||
2230 | DPRINTK("ENTER\n"); | |
2231 | ||
3a39746a TH |
2232 | if (ap->ops->scr_read && !sata_dev_present(ap)) { |
2233 | classes[0] = ATA_DEV_NONE; | |
2234 | goto out; | |
2235 | } | |
2236 | ||
c2bd5804 TH |
2237 | /* determine if device 0/1 are present */ |
2238 | if (ata_devchk(ap, 0)) | |
2239 | devmask |= (1 << 0); | |
2240 | if (slave_possible && ata_devchk(ap, 1)) | |
2241 | devmask |= (1 << 1); | |
2242 | ||
c2bd5804 TH |
2243 | /* select device 0 again */ |
2244 | ap->ops->dev_select(ap, 0); | |
2245 | ||
2246 | /* issue bus reset */ | |
2247 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
2248 | err_mask = ata_bus_softreset(ap, devmask); | |
2249 | if (err_mask) { | |
2250 | if (verbose) | |
2251 | printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n", | |
2252 | ap->id, err_mask); | |
2253 | else | |
2254 | DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n", | |
2255 | err_mask); | |
2256 | return -EIO; | |
2257 | } | |
2258 | ||
2259 | /* determine by signature whether we have ATA or ATAPI devices */ | |
2260 | classes[0] = ata_dev_try_classify(ap, 0, &err); | |
2261 | if (slave_possible && err != 0x81) | |
2262 | classes[1] = ata_dev_try_classify(ap, 1, &err); | |
2263 | ||
3a39746a | 2264 | out: |
c2bd5804 TH |
2265 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
2266 | return 0; | |
2267 | } | |
2268 | ||
2269 | /** | |
2270 | * sata_std_hardreset - reset host port via SATA phy reset | |
2271 | * @ap: port to reset | |
2272 | * @verbose: fail verbosely | |
2273 | * @class: resulting class of attached device | |
2274 | * | |
2275 | * SATA phy-reset host port using DET bits of SControl register. | |
2276 | * This function is to be used as standard callback for | |
2277 | * ata_drive_*_reset(). | |
2278 | * | |
2279 | * LOCKING: | |
2280 | * Kernel thread context (may sleep) | |
2281 | * | |
2282 | * RETURNS: | |
2283 | * 0 on success, -errno otherwise. | |
2284 | */ | |
2285 | int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class) | |
2286 | { | |
c2bd5804 TH |
2287 | DPRINTK("ENTER\n"); |
2288 | ||
2289 | /* Issue phy wake/reset */ | |
2290 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
2291 | ||
2292 | /* | |
2293 | * Couldn't find anything in SATA I/II specs, but AHCI-1.1 | |
2294 | * 10.4.2 says at least 1 ms. | |
2295 | */ | |
2296 | msleep(1); | |
2297 | ||
7a7921e8 TH |
2298 | /* Bring phy back */ |
2299 | sata_phy_resume(ap); | |
c2bd5804 | 2300 | |
c2bd5804 TH |
2301 | /* TODO: phy layer with polling, timeouts, etc. */ |
2302 | if (!sata_dev_present(ap)) { | |
2303 | *class = ATA_DEV_NONE; | |
2304 | DPRINTK("EXIT, link offline\n"); | |
2305 | return 0; | |
2306 | } | |
2307 | ||
2308 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
2309 | if (verbose) | |
2310 | printk(KERN_ERR "ata%u: COMRESET failed " | |
2311 | "(device not ready)\n", ap->id); | |
2312 | else | |
2313 | DPRINTK("EXIT, device not ready\n"); | |
2314 | return -EIO; | |
2315 | } | |
2316 | ||
3a39746a TH |
2317 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
2318 | ||
c2bd5804 TH |
2319 | *class = ata_dev_try_classify(ap, 0, NULL); |
2320 | ||
2321 | DPRINTK("EXIT, class=%u\n", *class); | |
2322 | return 0; | |
2323 | } | |
2324 | ||
2325 | /** | |
2326 | * ata_std_postreset - standard postreset callback | |
2327 | * @ap: the target ata_port | |
2328 | * @classes: classes of attached devices | |
2329 | * | |
2330 | * This function is invoked after a successful reset. Note that | |
2331 | * the device might have been reset more than once using | |
2332 | * different reset methods before postreset is invoked. | |
c2bd5804 TH |
2333 | * |
2334 | * This function is to be used as standard callback for | |
2335 | * ata_drive_*_reset(). | |
2336 | * | |
2337 | * LOCKING: | |
2338 | * Kernel thread context (may sleep) | |
2339 | */ | |
2340 | void ata_std_postreset(struct ata_port *ap, unsigned int *classes) | |
2341 | { | |
2342 | DPRINTK("ENTER\n"); | |
2343 | ||
56497bd5 | 2344 | /* set cable type if it isn't already set */ |
c2bd5804 TH |
2345 | if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA) |
2346 | ap->cbl = ATA_CBL_SATA; | |
2347 | ||
2348 | /* print link status */ | |
2349 | if (ap->cbl == ATA_CBL_SATA) | |
2350 | sata_print_link_status(ap); | |
2351 | ||
3a39746a TH |
2352 | /* re-enable interrupts */ |
2353 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2354 | ata_irq_on(ap); | |
c2bd5804 TH |
2355 | |
2356 | /* is double-select really necessary? */ | |
2357 | if (classes[0] != ATA_DEV_NONE) | |
2358 | ap->ops->dev_select(ap, 1); | |
2359 | if (classes[1] != ATA_DEV_NONE) | |
2360 | ap->ops->dev_select(ap, 0); | |
2361 | ||
3a39746a TH |
2362 | /* bail out if no device is present */ |
2363 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
2364 | DPRINTK("EXIT, no device\n"); | |
2365 | return; | |
2366 | } | |
2367 | ||
2368 | /* set up device control */ | |
2369 | if (ap->ioaddr.ctl_addr) { | |
2370 | if (ap->flags & ATA_FLAG_MMIO) | |
2371 | writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
2372 | else | |
2373 | outb(ap->ctl, ap->ioaddr.ctl_addr); | |
2374 | } | |
c2bd5804 TH |
2375 | |
2376 | DPRINTK("EXIT\n"); | |
2377 | } | |
2378 | ||
2379 | /** | |
2380 | * ata_std_probe_reset - standard probe reset method | |
2381 | * @ap: prot to perform probe-reset | |
2382 | * @classes: resulting classes of attached devices | |
2383 | * | |
2384 | * The stock off-the-shelf ->probe_reset method. | |
2385 | * | |
2386 | * LOCKING: | |
2387 | * Kernel thread context (may sleep) | |
2388 | * | |
2389 | * RETURNS: | |
2390 | * 0 on success, -errno otherwise. | |
2391 | */ | |
2392 | int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes) | |
2393 | { | |
2394 | ata_reset_fn_t hardreset; | |
2395 | ||
2396 | hardreset = NULL; | |
b911fc3a | 2397 | if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) |
c2bd5804 TH |
2398 | hardreset = sata_std_hardreset; |
2399 | ||
8a19ac89 | 2400 | return ata_drive_probe_reset(ap, ata_std_probeinit, |
7944ea95 | 2401 | ata_std_softreset, hardreset, |
c2bd5804 TH |
2402 | ata_std_postreset, classes); |
2403 | } | |
2404 | ||
a62c0fc5 TH |
2405 | static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset, |
2406 | ata_postreset_fn_t postreset, | |
2407 | unsigned int *classes) | |
2408 | { | |
2409 | int i, rc; | |
2410 | ||
2411 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2412 | classes[i] = ATA_DEV_UNKNOWN; | |
2413 | ||
2414 | rc = reset(ap, 0, classes); | |
2415 | if (rc) | |
2416 | return rc; | |
2417 | ||
2418 | /* If any class isn't ATA_DEV_UNKNOWN, consider classification | |
2419 | * is complete and convert all ATA_DEV_UNKNOWN to | |
2420 | * ATA_DEV_NONE. | |
2421 | */ | |
2422 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2423 | if (classes[i] != ATA_DEV_UNKNOWN) | |
2424 | break; | |
2425 | ||
2426 | if (i < ATA_MAX_DEVICES) | |
2427 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2428 | if (classes[i] == ATA_DEV_UNKNOWN) | |
2429 | classes[i] = ATA_DEV_NONE; | |
2430 | ||
2431 | if (postreset) | |
2432 | postreset(ap, classes); | |
2433 | ||
2434 | return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV; | |
2435 | } | |
2436 | ||
2437 | /** | |
2438 | * ata_drive_probe_reset - Perform probe reset with given methods | |
2439 | * @ap: port to reset | |
7944ea95 | 2440 | * @probeinit: probeinit method (can be NULL) |
a62c0fc5 TH |
2441 | * @softreset: softreset method (can be NULL) |
2442 | * @hardreset: hardreset method (can be NULL) | |
2443 | * @postreset: postreset method (can be NULL) | |
2444 | * @classes: resulting classes of attached devices | |
2445 | * | |
2446 | * Reset the specified port and classify attached devices using | |
2447 | * given methods. This function prefers softreset but tries all | |
2448 | * possible reset sequences to reset and classify devices. This | |
2449 | * function is intended to be used for constructing ->probe_reset | |
2450 | * callback by low level drivers. | |
2451 | * | |
2452 | * Reset methods should follow the following rules. | |
2453 | * | |
2454 | * - Return 0 on sucess, -errno on failure. | |
2455 | * - If classification is supported, fill classes[] with | |
2456 | * recognized class codes. | |
2457 | * - If classification is not supported, leave classes[] alone. | |
2458 | * - If verbose is non-zero, print error message on failure; | |
2459 | * otherwise, shut up. | |
2460 | * | |
2461 | * LOCKING: | |
2462 | * Kernel thread context (may sleep) | |
2463 | * | |
2464 | * RETURNS: | |
2465 | * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV | |
2466 | * if classification fails, and any error code from reset | |
2467 | * methods. | |
2468 | */ | |
7944ea95 | 2469 | int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit, |
a62c0fc5 TH |
2470 | ata_reset_fn_t softreset, ata_reset_fn_t hardreset, |
2471 | ata_postreset_fn_t postreset, unsigned int *classes) | |
2472 | { | |
2473 | int rc = -EINVAL; | |
2474 | ||
7944ea95 TH |
2475 | if (probeinit) |
2476 | probeinit(ap); | |
2477 | ||
a62c0fc5 TH |
2478 | if (softreset) { |
2479 | rc = do_probe_reset(ap, softreset, postreset, classes); | |
2480 | if (rc == 0) | |
2481 | return 0; | |
2482 | } | |
2483 | ||
2484 | if (!hardreset) | |
2485 | return rc; | |
2486 | ||
2487 | rc = do_probe_reset(ap, hardreset, postreset, classes); | |
2488 | if (rc == 0 || rc != -ENODEV) | |
2489 | return rc; | |
2490 | ||
2491 | if (softreset) | |
2492 | rc = do_probe_reset(ap, softreset, postreset, classes); | |
2493 | ||
2494 | return rc; | |
2495 | } | |
2496 | ||
623a3128 TH |
2497 | /** |
2498 | * ata_dev_same_device - Determine whether new ID matches configured device | |
2499 | * @ap: port on which the device to compare against resides | |
2500 | * @dev: device to compare against | |
2501 | * @new_class: class of the new device | |
2502 | * @new_id: IDENTIFY page of the new device | |
2503 | * | |
2504 | * Compare @new_class and @new_id against @dev and determine | |
2505 | * whether @dev is the device indicated by @new_class and | |
2506 | * @new_id. | |
2507 | * | |
2508 | * LOCKING: | |
2509 | * None. | |
2510 | * | |
2511 | * RETURNS: | |
2512 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
2513 | */ | |
2514 | static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev, | |
2515 | unsigned int new_class, const u16 *new_id) | |
2516 | { | |
2517 | const u16 *old_id = dev->id; | |
2518 | unsigned char model[2][41], serial[2][21]; | |
2519 | u64 new_n_sectors; | |
2520 | ||
2521 | if (dev->class != new_class) { | |
2522 | printk(KERN_INFO | |
2523 | "ata%u: dev %u class mismatch %d != %d\n", | |
2524 | ap->id, dev->devno, dev->class, new_class); | |
2525 | return 0; | |
2526 | } | |
2527 | ||
2528 | ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0])); | |
2529 | ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1])); | |
2530 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0])); | |
2531 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1])); | |
2532 | new_n_sectors = ata_id_n_sectors(new_id); | |
2533 | ||
2534 | if (strcmp(model[0], model[1])) { | |
2535 | printk(KERN_INFO | |
2536 | "ata%u: dev %u model number mismatch '%s' != '%s'\n", | |
2537 | ap->id, dev->devno, model[0], model[1]); | |
2538 | return 0; | |
2539 | } | |
2540 | ||
2541 | if (strcmp(serial[0], serial[1])) { | |
2542 | printk(KERN_INFO | |
2543 | "ata%u: dev %u serial number mismatch '%s' != '%s'\n", | |
2544 | ap->id, dev->devno, serial[0], serial[1]); | |
2545 | return 0; | |
2546 | } | |
2547 | ||
2548 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { | |
2549 | printk(KERN_INFO | |
2550 | "ata%u: dev %u n_sectors mismatch %llu != %llu\n", | |
2551 | ap->id, dev->devno, (unsigned long long)dev->n_sectors, | |
2552 | (unsigned long long)new_n_sectors); | |
2553 | return 0; | |
2554 | } | |
2555 | ||
2556 | return 1; | |
2557 | } | |
2558 | ||
2559 | /** | |
2560 | * ata_dev_revalidate - Revalidate ATA device | |
2561 | * @ap: port on which the device to revalidate resides | |
2562 | * @dev: device to revalidate | |
2563 | * @post_reset: is this revalidation after reset? | |
2564 | * | |
2565 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
2566 | * the port. | |
2567 | * | |
2568 | * LOCKING: | |
2569 | * Kernel thread context (may sleep) | |
2570 | * | |
2571 | * RETURNS: | |
2572 | * 0 on success, negative errno otherwise | |
2573 | */ | |
2574 | int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev, | |
2575 | int post_reset) | |
2576 | { | |
2577 | unsigned int class; | |
2578 | u16 *id; | |
2579 | int rc; | |
2580 | ||
2581 | if (!ata_dev_present(dev)) | |
2582 | return -ENODEV; | |
2583 | ||
2584 | class = dev->class; | |
2585 | id = NULL; | |
2586 | ||
2587 | /* allocate & read ID data */ | |
2588 | rc = ata_dev_read_id(ap, dev, &class, post_reset, &id); | |
2589 | if (rc) | |
2590 | goto fail; | |
2591 | ||
2592 | /* is the device still there? */ | |
2593 | if (!ata_dev_same_device(ap, dev, class, id)) { | |
2594 | rc = -ENODEV; | |
2595 | goto fail; | |
2596 | } | |
2597 | ||
2598 | kfree(dev->id); | |
2599 | dev->id = id; | |
2600 | ||
2601 | /* configure device according to the new ID */ | |
2602 | return ata_dev_configure(ap, dev, 0); | |
2603 | ||
2604 | fail: | |
2605 | printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n", | |
2606 | ap->id, dev->devno, rc); | |
2607 | kfree(id); | |
2608 | return rc; | |
2609 | } | |
2610 | ||
057ace5e JG |
2611 | static void ata_pr_blacklisted(const struct ata_port *ap, |
2612 | const struct ata_device *dev) | |
1da177e4 LT |
2613 | { |
2614 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | |
2615 | ap->id, dev->devno); | |
2616 | } | |
2617 | ||
98ac62de | 2618 | static const char * const ata_dma_blacklist [] = { |
1da177e4 LT |
2619 | "WDC AC11000H", |
2620 | "WDC AC22100H", | |
2621 | "WDC AC32500H", | |
2622 | "WDC AC33100H", | |
2623 | "WDC AC31600H", | |
2624 | "WDC AC32100H", | |
2625 | "WDC AC23200L", | |
2626 | "Compaq CRD-8241B", | |
2627 | "CRD-8400B", | |
2628 | "CRD-8480B", | |
2629 | "CRD-8482B", | |
2630 | "CRD-84", | |
2631 | "SanDisk SDP3B", | |
2632 | "SanDisk SDP3B-64", | |
2633 | "SANYO CD-ROM CRD", | |
2634 | "HITACHI CDR-8", | |
2635 | "HITACHI CDR-8335", | |
2636 | "HITACHI CDR-8435", | |
2637 | "Toshiba CD-ROM XM-6202B", | |
e922256a | 2638 | "TOSHIBA CD-ROM XM-1702BC", |
1da177e4 LT |
2639 | "CD-532E-A", |
2640 | "E-IDE CD-ROM CR-840", | |
2641 | "CD-ROM Drive/F5A", | |
2642 | "WPI CDD-820", | |
2643 | "SAMSUNG CD-ROM SC-148C", | |
2644 | "SAMSUNG CD-ROM SC", | |
2645 | "SanDisk SDP3B-64", | |
1da177e4 LT |
2646 | "ATAPI CD-ROM DRIVE 40X MAXIMUM", |
2647 | "_NEC DV5800A", | |
2648 | }; | |
2649 | ||
057ace5e | 2650 | static int ata_dma_blacklisted(const struct ata_device *dev) |
1da177e4 | 2651 | { |
2e02671d | 2652 | unsigned char model_num[41]; |
1da177e4 LT |
2653 | int i; |
2654 | ||
6a62a04d | 2655 | ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num)); |
1da177e4 LT |
2656 | |
2657 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) | |
2e02671d | 2658 | if (!strcmp(ata_dma_blacklist[i], model_num)) |
1da177e4 LT |
2659 | return 1; |
2660 | ||
2661 | return 0; | |
2662 | } | |
2663 | ||
057ace5e | 2664 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift) |
1da177e4 | 2665 | { |
057ace5e | 2666 | const struct ata_device *master, *slave; |
1da177e4 LT |
2667 | unsigned int mask; |
2668 | ||
2669 | master = &ap->device[0]; | |
2670 | slave = &ap->device[1]; | |
2671 | ||
a4631474 | 2672 | WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave)); |
1da177e4 LT |
2673 | |
2674 | if (shift == ATA_SHIFT_UDMA) { | |
2675 | mask = ap->udma_mask; | |
2676 | if (ata_dev_present(master)) { | |
2677 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | |
057ace5e | 2678 | if (ata_dma_blacklisted(master)) { |
1da177e4 LT |
2679 | mask = 0; |
2680 | ata_pr_blacklisted(ap, master); | |
2681 | } | |
2682 | } | |
2683 | if (ata_dev_present(slave)) { | |
2684 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | |
057ace5e | 2685 | if (ata_dma_blacklisted(slave)) { |
1da177e4 LT |
2686 | mask = 0; |
2687 | ata_pr_blacklisted(ap, slave); | |
2688 | } | |
2689 | } | |
2690 | } | |
2691 | else if (shift == ATA_SHIFT_MWDMA) { | |
2692 | mask = ap->mwdma_mask; | |
2693 | if (ata_dev_present(master)) { | |
2694 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | |
057ace5e | 2695 | if (ata_dma_blacklisted(master)) { |
1da177e4 LT |
2696 | mask = 0; |
2697 | ata_pr_blacklisted(ap, master); | |
2698 | } | |
2699 | } | |
2700 | if (ata_dev_present(slave)) { | |
2701 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | |
057ace5e | 2702 | if (ata_dma_blacklisted(slave)) { |
1da177e4 LT |
2703 | mask = 0; |
2704 | ata_pr_blacklisted(ap, slave); | |
2705 | } | |
2706 | } | |
2707 | } | |
2708 | else if (shift == ATA_SHIFT_PIO) { | |
2709 | mask = ap->pio_mask; | |
2710 | if (ata_dev_present(master)) { | |
2711 | /* spec doesn't return explicit support for | |
2712 | * PIO0-2, so we fake it | |
2713 | */ | |
2714 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | |
2715 | tmp_mode <<= 3; | |
2716 | tmp_mode |= 0x7; | |
2717 | mask &= tmp_mode; | |
2718 | } | |
2719 | if (ata_dev_present(slave)) { | |
2720 | /* spec doesn't return explicit support for | |
2721 | * PIO0-2, so we fake it | |
2722 | */ | |
2723 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | |
2724 | tmp_mode <<= 3; | |
2725 | tmp_mode |= 0x7; | |
2726 | mask &= tmp_mode; | |
2727 | } | |
2728 | } | |
2729 | else { | |
2730 | mask = 0xffffffff; /* shut up compiler warning */ | |
2731 | BUG(); | |
2732 | } | |
2733 | ||
2734 | return mask; | |
2735 | } | |
2736 | ||
2737 | /* find greatest bit */ | |
2738 | static int fgb(u32 bitmap) | |
2739 | { | |
2740 | unsigned int i; | |
2741 | int x = -1; | |
2742 | ||
2743 | for (i = 0; i < 32; i++) | |
2744 | if (bitmap & (1 << i)) | |
2745 | x = i; | |
2746 | ||
2747 | return x; | |
2748 | } | |
2749 | ||
2750 | /** | |
2751 | * ata_choose_xfer_mode - attempt to find best transfer mode | |
2752 | * @ap: Port for which an xfer mode will be selected | |
2753 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | |
2754 | * @xfer_shift_out: (output) bit shift that selects this mode | |
2755 | * | |
0cba632b JG |
2756 | * Based on host and device capabilities, determine the |
2757 | * maximum transfer mode that is amenable to all. | |
2758 | * | |
1da177e4 | 2759 | * LOCKING: |
0cba632b | 2760 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2761 | * |
2762 | * RETURNS: | |
2763 | * Zero on success, negative on error. | |
2764 | */ | |
2765 | ||
057ace5e | 2766 | static int ata_choose_xfer_mode(const struct ata_port *ap, |
1da177e4 LT |
2767 | u8 *xfer_mode_out, |
2768 | unsigned int *xfer_shift_out) | |
2769 | { | |
2770 | unsigned int mask, shift; | |
2771 | int x, i; | |
2772 | ||
2773 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | |
2774 | shift = xfer_mode_classes[i].shift; | |
2775 | mask = ata_get_mode_mask(ap, shift); | |
2776 | ||
2777 | x = fgb(mask); | |
2778 | if (x >= 0) { | |
2779 | *xfer_mode_out = xfer_mode_classes[i].base + x; | |
2780 | *xfer_shift_out = shift; | |
2781 | return 0; | |
2782 | } | |
2783 | } | |
2784 | ||
2785 | return -1; | |
2786 | } | |
2787 | ||
2788 | /** | |
2789 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
2790 | * @ap: Port associated with device @dev | |
2791 | * @dev: Device to which command will be sent | |
2792 | * | |
780a87f7 JG |
2793 | * Issue SET FEATURES - XFER MODE command to device @dev |
2794 | * on port @ap. | |
2795 | * | |
1da177e4 | 2796 | * LOCKING: |
0cba632b | 2797 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2798 | */ |
2799 | ||
2800 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) | |
2801 | { | |
a0123703 | 2802 | struct ata_taskfile tf; |
1da177e4 LT |
2803 | |
2804 | /* set up set-features taskfile */ | |
2805 | DPRINTK("set features - xfer mode\n"); | |
2806 | ||
a0123703 TH |
2807 | ata_tf_init(ap, &tf, dev->devno); |
2808 | tf.command = ATA_CMD_SET_FEATURES; | |
2809 | tf.feature = SETFEATURES_XFER; | |
2810 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2811 | tf.protocol = ATA_PROT_NODATA; | |
2812 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 2813 | |
a0123703 TH |
2814 | if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) { |
2815 | printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n", | |
2816 | ap->id); | |
1da177e4 | 2817 | ata_port_disable(ap); |
a0123703 | 2818 | } |
1da177e4 LT |
2819 | |
2820 | DPRINTK("EXIT\n"); | |
2821 | } | |
2822 | ||
8bf62ece AL |
2823 | /** |
2824 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
2825 | * @ap: Port associated with device @dev | |
2826 | * @dev: Device to which command will be sent | |
2827 | * | |
2828 | * LOCKING: | |
6aff8f1f TH |
2829 | * Kernel thread context (may sleep) |
2830 | * | |
2831 | * RETURNS: | |
2832 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece AL |
2833 | */ |
2834 | ||
6aff8f1f TH |
2835 | static unsigned int ata_dev_init_params(struct ata_port *ap, |
2836 | struct ata_device *dev) | |
8bf62ece | 2837 | { |
a0123703 | 2838 | struct ata_taskfile tf; |
6aff8f1f | 2839 | unsigned int err_mask; |
8bf62ece AL |
2840 | u16 sectors = dev->id[6]; |
2841 | u16 heads = dev->id[3]; | |
2842 | ||
2843 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
2844 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
6aff8f1f | 2845 | return 0; |
8bf62ece AL |
2846 | |
2847 | /* set up init dev params taskfile */ | |
2848 | DPRINTK("init dev params \n"); | |
2849 | ||
a0123703 TH |
2850 | ata_tf_init(ap, &tf, dev->devno); |
2851 | tf.command = ATA_CMD_INIT_DEV_PARAMS; | |
2852 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2853 | tf.protocol = ATA_PROT_NODATA; | |
2854 | tf.nsect = sectors; | |
2855 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 2856 | |
6aff8f1f | 2857 | err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0); |
8bf62ece | 2858 | |
6aff8f1f TH |
2859 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
2860 | return err_mask; | |
8bf62ece AL |
2861 | } |
2862 | ||
1da177e4 | 2863 | /** |
0cba632b JG |
2864 | * ata_sg_clean - Unmap DMA memory associated with command |
2865 | * @qc: Command containing DMA memory to be released | |
2866 | * | |
2867 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
2868 | * |
2869 | * LOCKING: | |
0cba632b | 2870 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2871 | */ |
2872 | ||
2873 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
2874 | { | |
2875 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 2876 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 2877 | int dir = qc->dma_dir; |
cedc9a47 | 2878 | void *pad_buf = NULL; |
1da177e4 | 2879 | |
a4631474 TH |
2880 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
2881 | WARN_ON(sg == NULL); | |
1da177e4 LT |
2882 | |
2883 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 2884 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 2885 | |
2c13b7ce | 2886 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 2887 | |
cedc9a47 JG |
2888 | /* if we padded the buffer out to 32-bit bound, and data |
2889 | * xfer direction is from-device, we must copy from the | |
2890 | * pad buffer back into the supplied buffer | |
2891 | */ | |
2892 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
2893 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2894 | ||
2895 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d JG |
2896 | if (qc->n_elem) |
2897 | dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
cedc9a47 JG |
2898 | /* restore last sg */ |
2899 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
2900 | if (pad_buf) { | |
2901 | struct scatterlist *psg = &qc->pad_sgent; | |
2902 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
2903 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 2904 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
2905 | } |
2906 | } else { | |
2e242fa9 | 2907 | if (qc->n_elem) |
e1410f2d JG |
2908 | dma_unmap_single(ap->host_set->dev, |
2909 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), | |
2910 | dir); | |
cedc9a47 JG |
2911 | /* restore sg */ |
2912 | sg->length += qc->pad_len; | |
2913 | if (pad_buf) | |
2914 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
2915 | pad_buf, qc->pad_len); | |
2916 | } | |
1da177e4 LT |
2917 | |
2918 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 2919 | qc->__sg = NULL; |
1da177e4 LT |
2920 | } |
2921 | ||
2922 | /** | |
2923 | * ata_fill_sg - Fill PCI IDE PRD table | |
2924 | * @qc: Metadata associated with taskfile to be transferred | |
2925 | * | |
780a87f7 JG |
2926 | * Fill PCI IDE PRD (scatter-gather) table with segments |
2927 | * associated with the current disk command. | |
2928 | * | |
1da177e4 | 2929 | * LOCKING: |
780a87f7 | 2930 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2931 | * |
2932 | */ | |
2933 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
2934 | { | |
1da177e4 | 2935 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
2936 | struct scatterlist *sg; |
2937 | unsigned int idx; | |
1da177e4 | 2938 | |
a4631474 | 2939 | WARN_ON(qc->__sg == NULL); |
f131883e | 2940 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
2941 | |
2942 | idx = 0; | |
cedc9a47 | 2943 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
2944 | u32 addr, offset; |
2945 | u32 sg_len, len; | |
2946 | ||
2947 | /* determine if physical DMA addr spans 64K boundary. | |
2948 | * Note h/w doesn't support 64-bit, so we unconditionally | |
2949 | * truncate dma_addr_t to u32. | |
2950 | */ | |
2951 | addr = (u32) sg_dma_address(sg); | |
2952 | sg_len = sg_dma_len(sg); | |
2953 | ||
2954 | while (sg_len) { | |
2955 | offset = addr & 0xffff; | |
2956 | len = sg_len; | |
2957 | if ((offset + sg_len) > 0x10000) | |
2958 | len = 0x10000 - offset; | |
2959 | ||
2960 | ap->prd[idx].addr = cpu_to_le32(addr); | |
2961 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
2962 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
2963 | ||
2964 | idx++; | |
2965 | sg_len -= len; | |
2966 | addr += len; | |
2967 | } | |
2968 | } | |
2969 | ||
2970 | if (idx) | |
2971 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
2972 | } | |
2973 | /** | |
2974 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
2975 | * @qc: Metadata associated with taskfile to check | |
2976 | * | |
780a87f7 JG |
2977 | * Allow low-level driver to filter ATA PACKET commands, returning |
2978 | * a status indicating whether or not it is OK to use DMA for the | |
2979 | * supplied PACKET command. | |
2980 | * | |
1da177e4 | 2981 | * LOCKING: |
0cba632b JG |
2982 | * spin_lock_irqsave(host_set lock) |
2983 | * | |
1da177e4 LT |
2984 | * RETURNS: 0 when ATAPI DMA can be used |
2985 | * nonzero otherwise | |
2986 | */ | |
2987 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
2988 | { | |
2989 | struct ata_port *ap = qc->ap; | |
2990 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
2991 | ||
2992 | if (ap->ops->check_atapi_dma) | |
2993 | rc = ap->ops->check_atapi_dma(qc); | |
2994 | ||
2995 | return rc; | |
2996 | } | |
2997 | /** | |
2998 | * ata_qc_prep - Prepare taskfile for submission | |
2999 | * @qc: Metadata associated with taskfile to be prepared | |
3000 | * | |
780a87f7 JG |
3001 | * Prepare ATA taskfile for submission. |
3002 | * | |
1da177e4 LT |
3003 | * LOCKING: |
3004 | * spin_lock_irqsave(host_set lock) | |
3005 | */ | |
3006 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
3007 | { | |
3008 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3009 | return; | |
3010 | ||
3011 | ata_fill_sg(qc); | |
3012 | } | |
3013 | ||
0cba632b JG |
3014 | /** |
3015 | * ata_sg_init_one - Associate command with memory buffer | |
3016 | * @qc: Command to be associated | |
3017 | * @buf: Memory buffer | |
3018 | * @buflen: Length of memory buffer, in bytes. | |
3019 | * | |
3020 | * Initialize the data-related elements of queued_cmd @qc | |
3021 | * to point to a single memory buffer, @buf of byte length @buflen. | |
3022 | * | |
3023 | * LOCKING: | |
3024 | * spin_lock_irqsave(host_set lock) | |
3025 | */ | |
3026 | ||
1da177e4 LT |
3027 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
3028 | { | |
3029 | struct scatterlist *sg; | |
3030 | ||
3031 | qc->flags |= ATA_QCFLAG_SINGLE; | |
3032 | ||
3033 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
cedc9a47 | 3034 | qc->__sg = &qc->sgent; |
1da177e4 | 3035 | qc->n_elem = 1; |
cedc9a47 | 3036 | qc->orig_n_elem = 1; |
1da177e4 LT |
3037 | qc->buf_virt = buf; |
3038 | ||
cedc9a47 | 3039 | sg = qc->__sg; |
f0612bbc | 3040 | sg_init_one(sg, buf, buflen); |
1da177e4 LT |
3041 | } |
3042 | ||
0cba632b JG |
3043 | /** |
3044 | * ata_sg_init - Associate command with scatter-gather table. | |
3045 | * @qc: Command to be associated | |
3046 | * @sg: Scatter-gather table. | |
3047 | * @n_elem: Number of elements in s/g table. | |
3048 | * | |
3049 | * Initialize the data-related elements of queued_cmd @qc | |
3050 | * to point to a scatter-gather table @sg, containing @n_elem | |
3051 | * elements. | |
3052 | * | |
3053 | * LOCKING: | |
3054 | * spin_lock_irqsave(host_set lock) | |
3055 | */ | |
3056 | ||
1da177e4 LT |
3057 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
3058 | unsigned int n_elem) | |
3059 | { | |
3060 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 3061 | qc->__sg = sg; |
1da177e4 | 3062 | qc->n_elem = n_elem; |
cedc9a47 | 3063 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
3064 | } |
3065 | ||
3066 | /** | |
0cba632b JG |
3067 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
3068 | * @qc: Command with memory buffer to be mapped. | |
3069 | * | |
3070 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
3071 | * |
3072 | * LOCKING: | |
3073 | * spin_lock_irqsave(host_set lock) | |
3074 | * | |
3075 | * RETURNS: | |
0cba632b | 3076 | * Zero on success, negative on error. |
1da177e4 LT |
3077 | */ |
3078 | ||
3079 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
3080 | { | |
3081 | struct ata_port *ap = qc->ap; | |
3082 | int dir = qc->dma_dir; | |
cedc9a47 | 3083 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3084 | dma_addr_t dma_address; |
2e242fa9 | 3085 | int trim_sg = 0; |
1da177e4 | 3086 | |
cedc9a47 JG |
3087 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3088 | qc->pad_len = sg->length & 3; | |
3089 | if (qc->pad_len) { | |
3090 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3091 | struct scatterlist *psg = &qc->pad_sgent; | |
3092 | ||
a4631474 | 3093 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3094 | |
3095 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3096 | ||
3097 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
3098 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
3099 | qc->pad_len); | |
3100 | ||
3101 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3102 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3103 | /* trim sg */ | |
3104 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
3105 | if (sg->length == 0) |
3106 | trim_sg = 1; | |
cedc9a47 JG |
3107 | |
3108 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
3109 | sg->length, qc->pad_len); | |
3110 | } | |
3111 | ||
2e242fa9 TH |
3112 | if (trim_sg) { |
3113 | qc->n_elem--; | |
e1410f2d JG |
3114 | goto skip_map; |
3115 | } | |
3116 | ||
1da177e4 | 3117 | dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt, |
32529e01 | 3118 | sg->length, dir); |
537a95d9 TH |
3119 | if (dma_mapping_error(dma_address)) { |
3120 | /* restore sg */ | |
3121 | sg->length += qc->pad_len; | |
1da177e4 | 3122 | return -1; |
537a95d9 | 3123 | } |
1da177e4 LT |
3124 | |
3125 | sg_dma_address(sg) = dma_address; | |
32529e01 | 3126 | sg_dma_len(sg) = sg->length; |
1da177e4 | 3127 | |
2e242fa9 | 3128 | skip_map: |
1da177e4 LT |
3129 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
3130 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3131 | ||
3132 | return 0; | |
3133 | } | |
3134 | ||
3135 | /** | |
0cba632b JG |
3136 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
3137 | * @qc: Command with scatter-gather table to be mapped. | |
3138 | * | |
3139 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
3140 | * |
3141 | * LOCKING: | |
3142 | * spin_lock_irqsave(host_set lock) | |
3143 | * | |
3144 | * RETURNS: | |
0cba632b | 3145 | * Zero on success, negative on error. |
1da177e4 LT |
3146 | * |
3147 | */ | |
3148 | ||
3149 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
3150 | { | |
3151 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
3152 | struct scatterlist *sg = qc->__sg; |
3153 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 3154 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 LT |
3155 | |
3156 | VPRINTK("ENTER, ata%u\n", ap->id); | |
a4631474 | 3157 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 3158 | |
cedc9a47 JG |
3159 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3160 | qc->pad_len = lsg->length & 3; | |
3161 | if (qc->pad_len) { | |
3162 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3163 | struct scatterlist *psg = &qc->pad_sgent; | |
3164 | unsigned int offset; | |
3165 | ||
a4631474 | 3166 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3167 | |
3168 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3169 | ||
3170 | /* | |
3171 | * psg->page/offset are used to copy to-be-written | |
3172 | * data in this function or read data in ata_sg_clean. | |
3173 | */ | |
3174 | offset = lsg->offset + lsg->length - qc->pad_len; | |
3175 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
3176 | psg->offset = offset_in_page(offset); | |
3177 | ||
3178 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
3179 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3180 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 3181 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3182 | } |
3183 | ||
3184 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3185 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3186 | /* trim last sg */ | |
3187 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
3188 | if (lsg->length == 0) |
3189 | trim_sg = 1; | |
cedc9a47 JG |
3190 | |
3191 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
3192 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
3193 | } | |
3194 | ||
e1410f2d JG |
3195 | pre_n_elem = qc->n_elem; |
3196 | if (trim_sg && pre_n_elem) | |
3197 | pre_n_elem--; | |
3198 | ||
3199 | if (!pre_n_elem) { | |
3200 | n_elem = 0; | |
3201 | goto skip_map; | |
3202 | } | |
3203 | ||
1da177e4 | 3204 | dir = qc->dma_dir; |
e1410f2d | 3205 | n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
3206 | if (n_elem < 1) { |
3207 | /* restore last sg */ | |
3208 | lsg->length += qc->pad_len; | |
1da177e4 | 3209 | return -1; |
537a95d9 | 3210 | } |
1da177e4 LT |
3211 | |
3212 | DPRINTK("%d sg elements mapped\n", n_elem); | |
3213 | ||
e1410f2d | 3214 | skip_map: |
1da177e4 LT |
3215 | qc->n_elem = n_elem; |
3216 | ||
3217 | return 0; | |
3218 | } | |
3219 | ||
40e8c82c TH |
3220 | /** |
3221 | * ata_poll_qc_complete - turn irq back on and finish qc | |
3222 | * @qc: Command to complete | |
8e8b77dd | 3223 | * @err_mask: ATA status register content |
40e8c82c TH |
3224 | * |
3225 | * LOCKING: | |
3226 | * None. (grabs host lock) | |
3227 | */ | |
3228 | ||
a22e2eb0 | 3229 | void ata_poll_qc_complete(struct ata_queued_cmd *qc) |
40e8c82c TH |
3230 | { |
3231 | struct ata_port *ap = qc->ap; | |
b8f6153e | 3232 | unsigned long flags; |
40e8c82c | 3233 | |
b8f6153e | 3234 | spin_lock_irqsave(&ap->host_set->lock, flags); |
40e8c82c TH |
3235 | ap->flags &= ~ATA_FLAG_NOINTR; |
3236 | ata_irq_on(ap); | |
a22e2eb0 | 3237 | ata_qc_complete(qc); |
b8f6153e | 3238 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
40e8c82c TH |
3239 | } |
3240 | ||
1da177e4 | 3241 | /** |
c893a3ae | 3242 | * ata_pio_poll - poll using PIO, depending on current state |
6f0ef4fa | 3243 | * @ap: the target ata_port |
1da177e4 LT |
3244 | * |
3245 | * LOCKING: | |
0cba632b | 3246 | * None. (executing in kernel thread context) |
1da177e4 LT |
3247 | * |
3248 | * RETURNS: | |
6f0ef4fa | 3249 | * timeout value to use |
1da177e4 LT |
3250 | */ |
3251 | ||
3252 | static unsigned long ata_pio_poll(struct ata_port *ap) | |
3253 | { | |
c14b8331 | 3254 | struct ata_queued_cmd *qc; |
1da177e4 | 3255 | u8 status; |
14be71f4 AL |
3256 | unsigned int poll_state = HSM_ST_UNKNOWN; |
3257 | unsigned int reg_state = HSM_ST_UNKNOWN; | |
14be71f4 | 3258 | |
c14b8331 | 3259 | qc = ata_qc_from_tag(ap, ap->active_tag); |
a4631474 | 3260 | WARN_ON(qc == NULL); |
c14b8331 | 3261 | |
14be71f4 AL |
3262 | switch (ap->hsm_task_state) { |
3263 | case HSM_ST: | |
3264 | case HSM_ST_POLL: | |
3265 | poll_state = HSM_ST_POLL; | |
3266 | reg_state = HSM_ST; | |
1da177e4 | 3267 | break; |
14be71f4 AL |
3268 | case HSM_ST_LAST: |
3269 | case HSM_ST_LAST_POLL: | |
3270 | poll_state = HSM_ST_LAST_POLL; | |
3271 | reg_state = HSM_ST_LAST; | |
1da177e4 LT |
3272 | break; |
3273 | default: | |
3274 | BUG(); | |
3275 | break; | |
3276 | } | |
3277 | ||
3278 | status = ata_chk_status(ap); | |
3279 | if (status & ATA_BUSY) { | |
3280 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
11a56d24 | 3281 | qc->err_mask |= AC_ERR_TIMEOUT; |
7c398335 | 3282 | ap->hsm_task_state = HSM_ST_TMOUT; |
1da177e4 LT |
3283 | return 0; |
3284 | } | |
14be71f4 | 3285 | ap->hsm_task_state = poll_state; |
1da177e4 LT |
3286 | return ATA_SHORT_PAUSE; |
3287 | } | |
3288 | ||
14be71f4 | 3289 | ap->hsm_task_state = reg_state; |
1da177e4 LT |
3290 | return 0; |
3291 | } | |
3292 | ||
3293 | /** | |
6f0ef4fa RD |
3294 | * ata_pio_complete - check if drive is busy or idle |
3295 | * @ap: the target ata_port | |
1da177e4 LT |
3296 | * |
3297 | * LOCKING: | |
0cba632b | 3298 | * None. (executing in kernel thread context) |
7fb6ec28 JG |
3299 | * |
3300 | * RETURNS: | |
3301 | * Non-zero if qc completed, zero otherwise. | |
1da177e4 LT |
3302 | */ |
3303 | ||
7fb6ec28 | 3304 | static int ata_pio_complete (struct ata_port *ap) |
1da177e4 LT |
3305 | { |
3306 | struct ata_queued_cmd *qc; | |
3307 | u8 drv_stat; | |
3308 | ||
3309 | /* | |
31433ea3 AC |
3310 | * This is purely heuristic. This is a fast path. Sometimes when |
3311 | * we enter, BSY will be cleared in a chk-status or two. If not, | |
3312 | * the drive is probably seeking or something. Snooze for a couple | |
3313 | * msecs, then chk-status again. If still busy, fall back to | |
14be71f4 | 3314 | * HSM_ST_POLL state. |
1da177e4 | 3315 | */ |
fe79e683 AL |
3316 | drv_stat = ata_busy_wait(ap, ATA_BUSY, 10); |
3317 | if (drv_stat & ATA_BUSY) { | |
1da177e4 | 3318 | msleep(2); |
fe79e683 AL |
3319 | drv_stat = ata_busy_wait(ap, ATA_BUSY, 10); |
3320 | if (drv_stat & ATA_BUSY) { | |
14be71f4 | 3321 | ap->hsm_task_state = HSM_ST_LAST_POLL; |
1da177e4 | 3322 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
7fb6ec28 | 3323 | return 0; |
1da177e4 LT |
3324 | } |
3325 | } | |
3326 | ||
c14b8331 | 3327 | qc = ata_qc_from_tag(ap, ap->active_tag); |
a4631474 | 3328 | WARN_ON(qc == NULL); |
c14b8331 | 3329 | |
1da177e4 LT |
3330 | drv_stat = ata_wait_idle(ap); |
3331 | if (!ata_ok(drv_stat)) { | |
1c848984 | 3332 | qc->err_mask |= __ac_err_mask(drv_stat); |
14be71f4 | 3333 | ap->hsm_task_state = HSM_ST_ERR; |
7fb6ec28 | 3334 | return 0; |
1da177e4 LT |
3335 | } |
3336 | ||
14be71f4 | 3337 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 3338 | |
a4631474 | 3339 | WARN_ON(qc->err_mask); |
a22e2eb0 | 3340 | ata_poll_qc_complete(qc); |
7fb6ec28 JG |
3341 | |
3342 | /* another command may start at this point */ | |
3343 | ||
3344 | return 1; | |
1da177e4 LT |
3345 | } |
3346 | ||
0baab86b EF |
3347 | |
3348 | /** | |
c893a3ae | 3349 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
3350 | * @buf: Buffer to swap |
3351 | * @buf_words: Number of 16-bit words in buffer. | |
3352 | * | |
3353 | * Swap halves of 16-bit words if needed to convert from | |
3354 | * little-endian byte order to native cpu byte order, or | |
3355 | * vice-versa. | |
3356 | * | |
3357 | * LOCKING: | |
6f0ef4fa | 3358 | * Inherited from caller. |
0baab86b | 3359 | */ |
1da177e4 LT |
3360 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
3361 | { | |
3362 | #ifdef __BIG_ENDIAN | |
3363 | unsigned int i; | |
3364 | ||
3365 | for (i = 0; i < buf_words; i++) | |
3366 | buf[i] = le16_to_cpu(buf[i]); | |
3367 | #endif /* __BIG_ENDIAN */ | |
3368 | } | |
3369 | ||
6ae4cfb5 AL |
3370 | /** |
3371 | * ata_mmio_data_xfer - Transfer data by MMIO | |
3372 | * @ap: port to read/write | |
3373 | * @buf: data buffer | |
3374 | * @buflen: buffer length | |
344babaa | 3375 | * @write_data: read/write |
6ae4cfb5 AL |
3376 | * |
3377 | * Transfer data from/to the device data register by MMIO. | |
3378 | * | |
3379 | * LOCKING: | |
3380 | * Inherited from caller. | |
6ae4cfb5 AL |
3381 | */ |
3382 | ||
1da177e4 LT |
3383 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
3384 | unsigned int buflen, int write_data) | |
3385 | { | |
3386 | unsigned int i; | |
3387 | unsigned int words = buflen >> 1; | |
3388 | u16 *buf16 = (u16 *) buf; | |
3389 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
3390 | ||
6ae4cfb5 | 3391 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
3392 | if (write_data) { |
3393 | for (i = 0; i < words; i++) | |
3394 | writew(le16_to_cpu(buf16[i]), mmio); | |
3395 | } else { | |
3396 | for (i = 0; i < words; i++) | |
3397 | buf16[i] = cpu_to_le16(readw(mmio)); | |
3398 | } | |
6ae4cfb5 AL |
3399 | |
3400 | /* Transfer trailing 1 byte, if any. */ | |
3401 | if (unlikely(buflen & 0x01)) { | |
3402 | u16 align_buf[1] = { 0 }; | |
3403 | unsigned char *trailing_buf = buf + buflen - 1; | |
3404 | ||
3405 | if (write_data) { | |
3406 | memcpy(align_buf, trailing_buf, 1); | |
3407 | writew(le16_to_cpu(align_buf[0]), mmio); | |
3408 | } else { | |
3409 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
3410 | memcpy(trailing_buf, align_buf, 1); | |
3411 | } | |
3412 | } | |
1da177e4 LT |
3413 | } |
3414 | ||
6ae4cfb5 AL |
3415 | /** |
3416 | * ata_pio_data_xfer - Transfer data by PIO | |
3417 | * @ap: port to read/write | |
3418 | * @buf: data buffer | |
3419 | * @buflen: buffer length | |
344babaa | 3420 | * @write_data: read/write |
6ae4cfb5 AL |
3421 | * |
3422 | * Transfer data from/to the device data register by PIO. | |
3423 | * | |
3424 | * LOCKING: | |
3425 | * Inherited from caller. | |
6ae4cfb5 AL |
3426 | */ |
3427 | ||
1da177e4 LT |
3428 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
3429 | unsigned int buflen, int write_data) | |
3430 | { | |
6ae4cfb5 | 3431 | unsigned int words = buflen >> 1; |
1da177e4 | 3432 | |
6ae4cfb5 | 3433 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 3434 | if (write_data) |
6ae4cfb5 | 3435 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 3436 | else |
6ae4cfb5 AL |
3437 | insw(ap->ioaddr.data_addr, buf, words); |
3438 | ||
3439 | /* Transfer trailing 1 byte, if any. */ | |
3440 | if (unlikely(buflen & 0x01)) { | |
3441 | u16 align_buf[1] = { 0 }; | |
3442 | unsigned char *trailing_buf = buf + buflen - 1; | |
3443 | ||
3444 | if (write_data) { | |
3445 | memcpy(align_buf, trailing_buf, 1); | |
3446 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3447 | } else { | |
3448 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
3449 | memcpy(trailing_buf, align_buf, 1); | |
3450 | } | |
3451 | } | |
1da177e4 LT |
3452 | } |
3453 | ||
6ae4cfb5 AL |
3454 | /** |
3455 | * ata_data_xfer - Transfer data from/to the data register. | |
3456 | * @ap: port to read/write | |
3457 | * @buf: data buffer | |
3458 | * @buflen: buffer length | |
3459 | * @do_write: read/write | |
3460 | * | |
3461 | * Transfer data from/to the device data register. | |
3462 | * | |
3463 | * LOCKING: | |
3464 | * Inherited from caller. | |
6ae4cfb5 AL |
3465 | */ |
3466 | ||
1da177e4 LT |
3467 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
3468 | unsigned int buflen, int do_write) | |
3469 | { | |
a1bd9e68 AC |
3470 | /* Make the crap hardware pay the costs not the good stuff */ |
3471 | if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) { | |
3472 | unsigned long flags; | |
3473 | local_irq_save(flags); | |
3474 | if (ap->flags & ATA_FLAG_MMIO) | |
3475 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
3476 | else | |
3477 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
3478 | local_irq_restore(flags); | |
3479 | } else { | |
3480 | if (ap->flags & ATA_FLAG_MMIO) | |
3481 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
3482 | else | |
3483 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
3484 | } | |
1da177e4 LT |
3485 | } |
3486 | ||
6ae4cfb5 AL |
3487 | /** |
3488 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
3489 | * @qc: Command on going | |
3490 | * | |
3491 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
3492 | * | |
3493 | * LOCKING: | |
3494 | * Inherited from caller. | |
3495 | */ | |
3496 | ||
1da177e4 LT |
3497 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
3498 | { | |
3499 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3500 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3501 | struct ata_port *ap = qc->ap; |
3502 | struct page *page; | |
3503 | unsigned int offset; | |
3504 | unsigned char *buf; | |
3505 | ||
3506 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 3507 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3508 | |
3509 | page = sg[qc->cursg].page; | |
3510 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
3511 | ||
3512 | /* get the current page and offset */ | |
3513 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3514 | offset %= PAGE_SIZE; | |
3515 | ||
3516 | buf = kmap(page) + offset; | |
3517 | ||
3518 | qc->cursect++; | |
3519 | qc->cursg_ofs++; | |
3520 | ||
32529e01 | 3521 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
3522 | qc->cursg++; |
3523 | qc->cursg_ofs = 0; | |
3524 | } | |
3525 | ||
3526 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3527 | ||
3528 | /* do the actual data transfer */ | |
3529 | do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3530 | ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write); | |
3531 | ||
3532 | kunmap(page); | |
3533 | } | |
3534 | ||
6ae4cfb5 AL |
3535 | /** |
3536 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3537 | * @qc: Command on going | |
3538 | * @bytes: number of bytes | |
3539 | * | |
3540 | * Transfer Transfer data from/to the ATAPI device. | |
3541 | * | |
3542 | * LOCKING: | |
3543 | * Inherited from caller. | |
3544 | * | |
3545 | */ | |
3546 | ||
1da177e4 LT |
3547 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
3548 | { | |
3549 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3550 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3551 | struct ata_port *ap = qc->ap; |
3552 | struct page *page; | |
3553 | unsigned char *buf; | |
3554 | unsigned int offset, count; | |
3555 | ||
563a6e1f | 3556 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 3557 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3558 | |
3559 | next_sg: | |
563a6e1f | 3560 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 3561 | /* |
563a6e1f AL |
3562 | * The end of qc->sg is reached and the device expects |
3563 | * more data to transfer. In order not to overrun qc->sg | |
3564 | * and fulfill length specified in the byte count register, | |
3565 | * - for read case, discard trailing data from the device | |
3566 | * - for write case, padding zero data to the device | |
3567 | */ | |
3568 | u16 pad_buf[1] = { 0 }; | |
3569 | unsigned int words = bytes >> 1; | |
3570 | unsigned int i; | |
3571 | ||
3572 | if (words) /* warning if bytes > 1 */ | |
7fb6ec28 | 3573 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", |
563a6e1f AL |
3574 | ap->id, bytes); |
3575 | ||
3576 | for (i = 0; i < words; i++) | |
3577 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | |
3578 | ||
14be71f4 | 3579 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
3580 | return; |
3581 | } | |
3582 | ||
cedc9a47 | 3583 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 3584 | |
1da177e4 LT |
3585 | page = sg->page; |
3586 | offset = sg->offset + qc->cursg_ofs; | |
3587 | ||
3588 | /* get the current page and offset */ | |
3589 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3590 | offset %= PAGE_SIZE; | |
3591 | ||
6952df03 | 3592 | /* don't overrun current sg */ |
32529e01 | 3593 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
3594 | |
3595 | /* don't cross page boundaries */ | |
3596 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
3597 | ||
3598 | buf = kmap(page) + offset; | |
3599 | ||
3600 | bytes -= count; | |
3601 | qc->curbytes += count; | |
3602 | qc->cursg_ofs += count; | |
3603 | ||
32529e01 | 3604 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
3605 | qc->cursg++; |
3606 | qc->cursg_ofs = 0; | |
3607 | } | |
3608 | ||
3609 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3610 | ||
3611 | /* do the actual data transfer */ | |
3612 | ata_data_xfer(ap, buf, count, do_write); | |
3613 | ||
3614 | kunmap(page); | |
3615 | ||
563a6e1f | 3616 | if (bytes) |
1da177e4 | 3617 | goto next_sg; |
1da177e4 LT |
3618 | } |
3619 | ||
6ae4cfb5 AL |
3620 | /** |
3621 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3622 | * @qc: Command on going | |
3623 | * | |
3624 | * Transfer Transfer data from/to the ATAPI device. | |
3625 | * | |
3626 | * LOCKING: | |
3627 | * Inherited from caller. | |
6ae4cfb5 AL |
3628 | */ |
3629 | ||
1da177e4 LT |
3630 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
3631 | { | |
3632 | struct ata_port *ap = qc->ap; | |
3633 | struct ata_device *dev = qc->dev; | |
3634 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
3635 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
3636 | ||
3637 | ap->ops->tf_read(ap, &qc->tf); | |
3638 | ireason = qc->tf.nsect; | |
3639 | bc_lo = qc->tf.lbam; | |
3640 | bc_hi = qc->tf.lbah; | |
3641 | bytes = (bc_hi << 8) | bc_lo; | |
3642 | ||
3643 | /* shall be cleared to zero, indicating xfer of data */ | |
3644 | if (ireason & (1 << 0)) | |
3645 | goto err_out; | |
3646 | ||
3647 | /* make sure transfer direction matches expected */ | |
3648 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
3649 | if (do_write != i_write) | |
3650 | goto err_out; | |
3651 | ||
3652 | __atapi_pio_bytes(qc, bytes); | |
3653 | ||
3654 | return; | |
3655 | ||
3656 | err_out: | |
3657 | printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", | |
3658 | ap->id, dev->devno); | |
11a56d24 | 3659 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 3660 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3661 | } |
3662 | ||
3663 | /** | |
6f0ef4fa RD |
3664 | * ata_pio_block - start PIO on a block |
3665 | * @ap: the target ata_port | |
1da177e4 LT |
3666 | * |
3667 | * LOCKING: | |
0cba632b | 3668 | * None. (executing in kernel thread context) |
1da177e4 LT |
3669 | */ |
3670 | ||
3671 | static void ata_pio_block(struct ata_port *ap) | |
3672 | { | |
3673 | struct ata_queued_cmd *qc; | |
3674 | u8 status; | |
3675 | ||
3676 | /* | |
6f0ef4fa | 3677 | * This is purely heuristic. This is a fast path. |
1da177e4 LT |
3678 | * Sometimes when we enter, BSY will be cleared in |
3679 | * a chk-status or two. If not, the drive is probably seeking | |
3680 | * or something. Snooze for a couple msecs, then | |
3681 | * chk-status again. If still busy, fall back to | |
14be71f4 | 3682 | * HSM_ST_POLL state. |
1da177e4 LT |
3683 | */ |
3684 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
3685 | if (status & ATA_BUSY) { | |
3686 | msleep(2); | |
3687 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
3688 | if (status & ATA_BUSY) { | |
14be71f4 | 3689 | ap->hsm_task_state = HSM_ST_POLL; |
1da177e4 LT |
3690 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
3691 | return; | |
3692 | } | |
3693 | } | |
3694 | ||
3695 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
a4631474 | 3696 | WARN_ON(qc == NULL); |
1da177e4 | 3697 | |
fe79e683 AL |
3698 | /* check error */ |
3699 | if (status & (ATA_ERR | ATA_DF)) { | |
3700 | qc->err_mask |= AC_ERR_DEV; | |
3701 | ap->hsm_task_state = HSM_ST_ERR; | |
3702 | return; | |
3703 | } | |
3704 | ||
3705 | /* transfer data if any */ | |
1da177e4 | 3706 | if (is_atapi_taskfile(&qc->tf)) { |
fe79e683 | 3707 | /* DRQ=0 means no more data to transfer */ |
1da177e4 | 3708 | if ((status & ATA_DRQ) == 0) { |
14be71f4 | 3709 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3710 | return; |
3711 | } | |
3712 | ||
3713 | atapi_pio_bytes(qc); | |
3714 | } else { | |
3715 | /* handle BSY=0, DRQ=0 as error */ | |
3716 | if ((status & ATA_DRQ) == 0) { | |
11a56d24 | 3717 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 3718 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3719 | return; |
3720 | } | |
3721 | ||
3722 | ata_pio_sector(qc); | |
3723 | } | |
3724 | } | |
3725 | ||
3726 | static void ata_pio_error(struct ata_port *ap) | |
3727 | { | |
3728 | struct ata_queued_cmd *qc; | |
a7dac447 | 3729 | |
1da177e4 | 3730 | qc = ata_qc_from_tag(ap, ap->active_tag); |
a4631474 | 3731 | WARN_ON(qc == NULL); |
1da177e4 | 3732 | |
0565c26d AL |
3733 | if (qc->tf.command != ATA_CMD_PACKET) |
3734 | printk(KERN_WARNING "ata%u: PIO error\n", ap->id); | |
3735 | ||
1c848984 AL |
3736 | /* make sure qc->err_mask is available to |
3737 | * know what's wrong and recover | |
3738 | */ | |
a4631474 | 3739 | WARN_ON(qc->err_mask == 0); |
1c848984 | 3740 | |
14be71f4 | 3741 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 3742 | |
a22e2eb0 | 3743 | ata_poll_qc_complete(qc); |
1da177e4 LT |
3744 | } |
3745 | ||
3746 | static void ata_pio_task(void *_data) | |
3747 | { | |
3748 | struct ata_port *ap = _data; | |
7fb6ec28 JG |
3749 | unsigned long timeout; |
3750 | int qc_completed; | |
3751 | ||
3752 | fsm_start: | |
3753 | timeout = 0; | |
3754 | qc_completed = 0; | |
1da177e4 | 3755 | |
14be71f4 AL |
3756 | switch (ap->hsm_task_state) { |
3757 | case HSM_ST_IDLE: | |
1da177e4 LT |
3758 | return; |
3759 | ||
14be71f4 | 3760 | case HSM_ST: |
1da177e4 LT |
3761 | ata_pio_block(ap); |
3762 | break; | |
3763 | ||
14be71f4 | 3764 | case HSM_ST_LAST: |
7fb6ec28 | 3765 | qc_completed = ata_pio_complete(ap); |
1da177e4 LT |
3766 | break; |
3767 | ||
14be71f4 AL |
3768 | case HSM_ST_POLL: |
3769 | case HSM_ST_LAST_POLL: | |
1da177e4 LT |
3770 | timeout = ata_pio_poll(ap); |
3771 | break; | |
3772 | ||
14be71f4 AL |
3773 | case HSM_ST_TMOUT: |
3774 | case HSM_ST_ERR: | |
1da177e4 LT |
3775 | ata_pio_error(ap); |
3776 | return; | |
3777 | } | |
3778 | ||
3779 | if (timeout) | |
8061f5f0 | 3780 | ata_port_queue_task(ap, ata_pio_task, ap, timeout); |
7fb6ec28 JG |
3781 | else if (!qc_completed) |
3782 | goto fsm_start; | |
1da177e4 LT |
3783 | } |
3784 | ||
8061f5f0 TH |
3785 | /** |
3786 | * atapi_packet_task - Write CDB bytes to hardware | |
3787 | * @_data: Port to which ATAPI device is attached. | |
3788 | * | |
3789 | * When device has indicated its readiness to accept | |
3790 | * a CDB, this function is called. Send the CDB. | |
3791 | * If DMA is to be performed, exit immediately. | |
3792 | * Otherwise, we are in polling mode, so poll | |
3793 | * status under operation succeeds or fails. | |
3794 | * | |
3795 | * LOCKING: | |
3796 | * Kernel thread context (may sleep) | |
3797 | */ | |
3798 | ||
3799 | static void atapi_packet_task(void *_data) | |
3800 | { | |
3801 | struct ata_port *ap = _data; | |
3802 | struct ata_queued_cmd *qc; | |
3803 | u8 status; | |
3804 | ||
3805 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3806 | WARN_ON(qc == NULL); | |
3807 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
3808 | ||
3809 | /* sleep-wait for BSY to clear */ | |
3810 | DPRINTK("busy wait\n"); | |
3811 | if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) { | |
3812 | qc->err_mask |= AC_ERR_TIMEOUT; | |
3813 | goto err_out; | |
3814 | } | |
3815 | ||
3816 | /* make sure DRQ is set */ | |
3817 | status = ata_chk_status(ap); | |
3818 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) { | |
3819 | qc->err_mask |= AC_ERR_HSM; | |
3820 | goto err_out; | |
3821 | } | |
3822 | ||
3823 | /* send SCSI cdb */ | |
3824 | DPRINTK("send cdb\n"); | |
3825 | WARN_ON(qc->dev->cdb_len < 12); | |
3826 | ||
3827 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || | |
3828 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | |
3829 | unsigned long flags; | |
3830 | ||
3831 | /* Once we're done issuing command and kicking bmdma, | |
3832 | * irq handler takes over. To not lose irq, we need | |
3833 | * to clear NOINTR flag before sending cdb, but | |
3834 | * interrupt handler shouldn't be invoked before we're | |
3835 | * finished. Hence, the following locking. | |
3836 | */ | |
3837 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
3838 | ap->flags &= ~ATA_FLAG_NOINTR; | |
3839 | ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1); | |
3840 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | |
3841 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3842 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
3843 | } else { | |
3844 | ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1); | |
3845 | ||
3846 | /* PIO commands are handled by polling */ | |
3847 | ap->hsm_task_state = HSM_ST; | |
3848 | ata_port_queue_task(ap, ata_pio_task, ap, 0); | |
3849 | } | |
3850 | ||
3851 | return; | |
3852 | ||
3853 | err_out: | |
3854 | ata_poll_qc_complete(qc); | |
3855 | } | |
3856 | ||
1da177e4 LT |
3857 | /** |
3858 | * ata_qc_timeout - Handle timeout of queued command | |
3859 | * @qc: Command that timed out | |
3860 | * | |
3861 | * Some part of the kernel (currently, only the SCSI layer) | |
3862 | * has noticed that the active command on port @ap has not | |
3863 | * completed after a specified length of time. Handle this | |
3864 | * condition by disabling DMA (if necessary) and completing | |
3865 | * transactions, with error if necessary. | |
3866 | * | |
3867 | * This also handles the case of the "lost interrupt", where | |
3868 | * for some reason (possibly hardware bug, possibly driver bug) | |
3869 | * an interrupt was not delivered to the driver, even though the | |
3870 | * transaction completed successfully. | |
3871 | * | |
3872 | * LOCKING: | |
0cba632b | 3873 | * Inherited from SCSI layer (none, can sleep) |
1da177e4 LT |
3874 | */ |
3875 | ||
3876 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | |
3877 | { | |
3878 | struct ata_port *ap = qc->ap; | |
b8f6153e | 3879 | struct ata_host_set *host_set = ap->host_set; |
1da177e4 | 3880 | u8 host_stat = 0, drv_stat; |
b8f6153e | 3881 | unsigned long flags; |
1da177e4 LT |
3882 | |
3883 | DPRINTK("ENTER\n"); | |
3884 | ||
c18d06f8 TH |
3885 | ap->hsm_task_state = HSM_ST_IDLE; |
3886 | ||
b8f6153e JG |
3887 | spin_lock_irqsave(&host_set->lock, flags); |
3888 | ||
1da177e4 LT |
3889 | switch (qc->tf.protocol) { |
3890 | ||
3891 | case ATA_PROT_DMA: | |
3892 | case ATA_PROT_ATAPI_DMA: | |
3893 | host_stat = ap->ops->bmdma_status(ap); | |
3894 | ||
3895 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3896 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
3897 | |
3898 | /* fall through */ | |
3899 | ||
3900 | default: | |
3901 | ata_altstatus(ap); | |
3902 | drv_stat = ata_chk_status(ap); | |
3903 | ||
3904 | /* ack bmdma irq events */ | |
3905 | ap->ops->irq_clear(ap); | |
3906 | ||
3907 | printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n", | |
3908 | ap->id, qc->tf.command, drv_stat, host_stat); | |
3909 | ||
3910 | /* complete taskfile transaction */ | |
a22e2eb0 | 3911 | qc->err_mask |= ac_err_mask(drv_stat); |
1da177e4 LT |
3912 | break; |
3913 | } | |
b8f6153e JG |
3914 | |
3915 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3916 | ||
a72ec4ce TH |
3917 | ata_eh_qc_complete(qc); |
3918 | ||
1da177e4 LT |
3919 | DPRINTK("EXIT\n"); |
3920 | } | |
3921 | ||
3922 | /** | |
3923 | * ata_eng_timeout - Handle timeout of queued command | |
3924 | * @ap: Port on which timed-out command is active | |
3925 | * | |
3926 | * Some part of the kernel (currently, only the SCSI layer) | |
3927 | * has noticed that the active command on port @ap has not | |
3928 | * completed after a specified length of time. Handle this | |
3929 | * condition by disabling DMA (if necessary) and completing | |
3930 | * transactions, with error if necessary. | |
3931 | * | |
3932 | * This also handles the case of the "lost interrupt", where | |
3933 | * for some reason (possibly hardware bug, possibly driver bug) | |
3934 | * an interrupt was not delivered to the driver, even though the | |
3935 | * transaction completed successfully. | |
3936 | * | |
3937 | * LOCKING: | |
3938 | * Inherited from SCSI layer (none, can sleep) | |
3939 | */ | |
3940 | ||
3941 | void ata_eng_timeout(struct ata_port *ap) | |
3942 | { | |
1da177e4 LT |
3943 | DPRINTK("ENTER\n"); |
3944 | ||
f6379020 | 3945 | ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag)); |
1da177e4 | 3946 | |
1da177e4 LT |
3947 | DPRINTK("EXIT\n"); |
3948 | } | |
3949 | ||
3950 | /** | |
3951 | * ata_qc_new - Request an available ATA command, for queueing | |
3952 | * @ap: Port associated with device @dev | |
3953 | * @dev: Device from whom we request an available command structure | |
3954 | * | |
3955 | * LOCKING: | |
0cba632b | 3956 | * None. |
1da177e4 LT |
3957 | */ |
3958 | ||
3959 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
3960 | { | |
3961 | struct ata_queued_cmd *qc = NULL; | |
3962 | unsigned int i; | |
3963 | ||
3964 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
3965 | if (!test_and_set_bit(i, &ap->qactive)) { | |
3966 | qc = ata_qc_from_tag(ap, i); | |
3967 | break; | |
3968 | } | |
3969 | ||
3970 | if (qc) | |
3971 | qc->tag = i; | |
3972 | ||
3973 | return qc; | |
3974 | } | |
3975 | ||
3976 | /** | |
3977 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
3978 | * @ap: Port associated with device @dev | |
3979 | * @dev: Device from whom we request an available command structure | |
3980 | * | |
3981 | * LOCKING: | |
0cba632b | 3982 | * None. |
1da177e4 LT |
3983 | */ |
3984 | ||
3985 | struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | |
3986 | struct ata_device *dev) | |
3987 | { | |
3988 | struct ata_queued_cmd *qc; | |
3989 | ||
3990 | qc = ata_qc_new(ap); | |
3991 | if (qc) { | |
1da177e4 LT |
3992 | qc->scsicmd = NULL; |
3993 | qc->ap = ap; | |
3994 | qc->dev = dev; | |
1da177e4 | 3995 | |
2c13b7ce | 3996 | ata_qc_reinit(qc); |
1da177e4 LT |
3997 | } |
3998 | ||
3999 | return qc; | |
4000 | } | |
4001 | ||
1da177e4 LT |
4002 | /** |
4003 | * ata_qc_free - free unused ata_queued_cmd | |
4004 | * @qc: Command to complete | |
4005 | * | |
4006 | * Designed to free unused ata_queued_cmd object | |
4007 | * in case something prevents using it. | |
4008 | * | |
4009 | * LOCKING: | |
0cba632b | 4010 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
4011 | */ |
4012 | void ata_qc_free(struct ata_queued_cmd *qc) | |
4013 | { | |
4ba946e9 TH |
4014 | struct ata_port *ap = qc->ap; |
4015 | unsigned int tag; | |
4016 | ||
a4631474 | 4017 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 4018 | |
4ba946e9 TH |
4019 | qc->flags = 0; |
4020 | tag = qc->tag; | |
4021 | if (likely(ata_tag_valid(tag))) { | |
4022 | if (tag == ap->active_tag) | |
4023 | ap->active_tag = ATA_TAG_POISON; | |
4024 | qc->tag = ATA_TAG_POISON; | |
4025 | clear_bit(tag, &ap->qactive); | |
4026 | } | |
1da177e4 LT |
4027 | } |
4028 | ||
76014427 | 4029 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 4030 | { |
a4631474 TH |
4031 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4032 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
4033 | |
4034 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4035 | ata_sg_clean(qc); | |
4036 | ||
3f3791d3 AL |
4037 | /* atapi: mark qc as inactive to prevent the interrupt handler |
4038 | * from completing the command twice later, before the error handler | |
4039 | * is called. (when rc != 0 and atapi request sense is needed) | |
4040 | */ | |
4041 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
4042 | ||
1da177e4 | 4043 | /* call completion callback */ |
77853bf2 | 4044 | qc->complete_fn(qc); |
1da177e4 LT |
4045 | } |
4046 | ||
4047 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
4048 | { | |
4049 | struct ata_port *ap = qc->ap; | |
4050 | ||
4051 | switch (qc->tf.protocol) { | |
4052 | case ATA_PROT_DMA: | |
4053 | case ATA_PROT_ATAPI_DMA: | |
4054 | return 1; | |
4055 | ||
4056 | case ATA_PROT_ATAPI: | |
4057 | case ATA_PROT_PIO: | |
4058 | case ATA_PROT_PIO_MULT: | |
4059 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
4060 | return 1; | |
4061 | ||
4062 | /* fall through */ | |
4063 | ||
4064 | default: | |
4065 | return 0; | |
4066 | } | |
4067 | ||
4068 | /* never reached */ | |
4069 | } | |
4070 | ||
4071 | /** | |
4072 | * ata_qc_issue - issue taskfile to device | |
4073 | * @qc: command to issue to device | |
4074 | * | |
4075 | * Prepare an ATA command to submission to device. | |
4076 | * This includes mapping the data into a DMA-able | |
4077 | * area, filling in the S/G table, and finally | |
4078 | * writing the taskfile to hardware, starting the command. | |
4079 | * | |
4080 | * LOCKING: | |
4081 | * spin_lock_irqsave(host_set lock) | |
4082 | * | |
4083 | * RETURNS: | |
9a3d9eb0 | 4084 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
4085 | */ |
4086 | ||
9a3d9eb0 | 4087 | unsigned int ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
4088 | { |
4089 | struct ata_port *ap = qc->ap; | |
4090 | ||
4091 | if (ata_should_dma_map(qc)) { | |
4092 | if (qc->flags & ATA_QCFLAG_SG) { | |
4093 | if (ata_sg_setup(qc)) | |
8e436af9 | 4094 | goto sg_err; |
1da177e4 LT |
4095 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
4096 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 4097 | goto sg_err; |
1da177e4 LT |
4098 | } |
4099 | } else { | |
4100 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
4101 | } | |
4102 | ||
4103 | ap->ops->qc_prep(qc); | |
4104 | ||
4105 | qc->ap->active_tag = qc->tag; | |
4106 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
4107 | ||
4108 | return ap->ops->qc_issue(qc); | |
4109 | ||
8e436af9 TH |
4110 | sg_err: |
4111 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
9a3d9eb0 | 4112 | return AC_ERR_SYSTEM; |
1da177e4 LT |
4113 | } |
4114 | ||
0baab86b | 4115 | |
1da177e4 LT |
4116 | /** |
4117 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
4118 | * @qc: command to issue to device | |
4119 | * | |
4120 | * Using various libata functions and hooks, this function | |
4121 | * starts an ATA command. ATA commands are grouped into | |
4122 | * classes called "protocols", and issuing each type of protocol | |
4123 | * is slightly different. | |
4124 | * | |
0baab86b EF |
4125 | * May be used as the qc_issue() entry in ata_port_operations. |
4126 | * | |
1da177e4 LT |
4127 | * LOCKING: |
4128 | * spin_lock_irqsave(host_set lock) | |
4129 | * | |
4130 | * RETURNS: | |
9a3d9eb0 | 4131 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
4132 | */ |
4133 | ||
9a3d9eb0 | 4134 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
4135 | { |
4136 | struct ata_port *ap = qc->ap; | |
4137 | ||
4138 | ata_dev_select(ap, qc->dev->devno, 1, 0); | |
4139 | ||
4140 | switch (qc->tf.protocol) { | |
4141 | case ATA_PROT_NODATA: | |
e5338254 | 4142 | ata_tf_to_host(ap, &qc->tf); |
1da177e4 LT |
4143 | break; |
4144 | ||
4145 | case ATA_PROT_DMA: | |
4146 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
4147 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
4148 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
4149 | break; | |
4150 | ||
4151 | case ATA_PROT_PIO: /* load tf registers, initiate polling pio */ | |
4152 | ata_qc_set_polling(qc); | |
e5338254 | 4153 | ata_tf_to_host(ap, &qc->tf); |
14be71f4 | 4154 | ap->hsm_task_state = HSM_ST; |
8061f5f0 | 4155 | ata_port_queue_task(ap, ata_pio_task, ap, 0); |
1da177e4 LT |
4156 | break; |
4157 | ||
4158 | case ATA_PROT_ATAPI: | |
4159 | ata_qc_set_polling(qc); | |
e5338254 | 4160 | ata_tf_to_host(ap, &qc->tf); |
8061f5f0 | 4161 | ata_port_queue_task(ap, atapi_packet_task, ap, 0); |
1da177e4 LT |
4162 | break; |
4163 | ||
4164 | case ATA_PROT_ATAPI_NODATA: | |
c1389503 | 4165 | ap->flags |= ATA_FLAG_NOINTR; |
e5338254 | 4166 | ata_tf_to_host(ap, &qc->tf); |
8061f5f0 | 4167 | ata_port_queue_task(ap, atapi_packet_task, ap, 0); |
1da177e4 LT |
4168 | break; |
4169 | ||
4170 | case ATA_PROT_ATAPI_DMA: | |
c1389503 | 4171 | ap->flags |= ATA_FLAG_NOINTR; |
1da177e4 LT |
4172 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
4173 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
8061f5f0 | 4174 | ata_port_queue_task(ap, atapi_packet_task, ap, 0); |
1da177e4 LT |
4175 | break; |
4176 | ||
4177 | default: | |
4178 | WARN_ON(1); | |
9a3d9eb0 | 4179 | return AC_ERR_SYSTEM; |
1da177e4 LT |
4180 | } |
4181 | ||
4182 | return 0; | |
4183 | } | |
4184 | ||
4185 | /** | |
0baab86b | 4186 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction |
1da177e4 LT |
4187 | * @qc: Info associated with this ATA transaction. |
4188 | * | |
4189 | * LOCKING: | |
4190 | * spin_lock_irqsave(host_set lock) | |
4191 | */ | |
4192 | ||
4193 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |
4194 | { | |
4195 | struct ata_port *ap = qc->ap; | |
4196 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
4197 | u8 dmactl; | |
4198 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
4199 | ||
4200 | /* load PRD table addr. */ | |
4201 | mb(); /* make sure PRD table writes are visible to controller */ | |
4202 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); | |
4203 | ||
4204 | /* specify data direction, triple-check start bit is clear */ | |
4205 | dmactl = readb(mmio + ATA_DMA_CMD); | |
4206 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
4207 | if (!rw) | |
4208 | dmactl |= ATA_DMA_WR; | |
4209 | writeb(dmactl, mmio + ATA_DMA_CMD); | |
4210 | ||
4211 | /* issue r/w command */ | |
4212 | ap->ops->exec_command(ap, &qc->tf); | |
4213 | } | |
4214 | ||
4215 | /** | |
b73fc89f | 4216 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction |
1da177e4 LT |
4217 | * @qc: Info associated with this ATA transaction. |
4218 | * | |
4219 | * LOCKING: | |
4220 | * spin_lock_irqsave(host_set lock) | |
4221 | */ | |
4222 | ||
4223 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) | |
4224 | { | |
4225 | struct ata_port *ap = qc->ap; | |
4226 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
4227 | u8 dmactl; | |
4228 | ||
4229 | /* start host DMA transaction */ | |
4230 | dmactl = readb(mmio + ATA_DMA_CMD); | |
4231 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | |
4232 | ||
4233 | /* Strictly, one may wish to issue a readb() here, to | |
4234 | * flush the mmio write. However, control also passes | |
4235 | * to the hardware at this point, and it will interrupt | |
4236 | * us when we are to resume control. So, in effect, | |
4237 | * we don't care when the mmio write flushes. | |
4238 | * Further, a read of the DMA status register _immediately_ | |
4239 | * following the write may not be what certain flaky hardware | |
4240 | * is expected, so I think it is best to not add a readb() | |
4241 | * without first all the MMIO ATA cards/mobos. | |
4242 | * Or maybe I'm just being paranoid. | |
4243 | */ | |
4244 | } | |
4245 | ||
4246 | /** | |
4247 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) | |
4248 | * @qc: Info associated with this ATA transaction. | |
4249 | * | |
4250 | * LOCKING: | |
4251 | * spin_lock_irqsave(host_set lock) | |
4252 | */ | |
4253 | ||
4254 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) | |
4255 | { | |
4256 | struct ata_port *ap = qc->ap; | |
4257 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
4258 | u8 dmactl; | |
4259 | ||
4260 | /* load PRD table addr. */ | |
4261 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); | |
4262 | ||
4263 | /* specify data direction, triple-check start bit is clear */ | |
4264 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
4265 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
4266 | if (!rw) | |
4267 | dmactl |= ATA_DMA_WR; | |
4268 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
4269 | ||
4270 | /* issue r/w command */ | |
4271 | ap->ops->exec_command(ap, &qc->tf); | |
4272 | } | |
4273 | ||
4274 | /** | |
4275 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) | |
4276 | * @qc: Info associated with this ATA transaction. | |
4277 | * | |
4278 | * LOCKING: | |
4279 | * spin_lock_irqsave(host_set lock) | |
4280 | */ | |
4281 | ||
4282 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) | |
4283 | { | |
4284 | struct ata_port *ap = qc->ap; | |
4285 | u8 dmactl; | |
4286 | ||
4287 | /* start host DMA transaction */ | |
4288 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
4289 | outb(dmactl | ATA_DMA_START, | |
4290 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
4291 | } | |
4292 | ||
0baab86b EF |
4293 | |
4294 | /** | |
4295 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
4296 | * @qc: Info associated with this ATA transaction. | |
4297 | * | |
4298 | * Writes the ATA_DMA_START flag to the DMA command register. | |
4299 | * | |
4300 | * May be used as the bmdma_start() entry in ata_port_operations. | |
4301 | * | |
4302 | * LOCKING: | |
4303 | * spin_lock_irqsave(host_set lock) | |
4304 | */ | |
1da177e4 LT |
4305 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
4306 | { | |
4307 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
4308 | ata_bmdma_start_mmio(qc); | |
4309 | else | |
4310 | ata_bmdma_start_pio(qc); | |
4311 | } | |
4312 | ||
0baab86b EF |
4313 | |
4314 | /** | |
4315 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction | |
4316 | * @qc: Info associated with this ATA transaction. | |
4317 | * | |
4318 | * Writes address of PRD table to device's PRD Table Address | |
4319 | * register, sets the DMA control register, and calls | |
4320 | * ops->exec_command() to start the transfer. | |
4321 | * | |
4322 | * May be used as the bmdma_setup() entry in ata_port_operations. | |
4323 | * | |
4324 | * LOCKING: | |
4325 | * spin_lock_irqsave(host_set lock) | |
4326 | */ | |
1da177e4 LT |
4327 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
4328 | { | |
4329 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
4330 | ata_bmdma_setup_mmio(qc); | |
4331 | else | |
4332 | ata_bmdma_setup_pio(qc); | |
4333 | } | |
4334 | ||
0baab86b EF |
4335 | |
4336 | /** | |
4337 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | |
decc6d0b | 4338 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
4339 | * |
4340 | * Clear interrupt and error flags in DMA status register. | |
4341 | * | |
4342 | * May be used as the irq_clear() entry in ata_port_operations. | |
4343 | * | |
4344 | * LOCKING: | |
4345 | * spin_lock_irqsave(host_set lock) | |
4346 | */ | |
4347 | ||
1da177e4 LT |
4348 | void ata_bmdma_irq_clear(struct ata_port *ap) |
4349 | { | |
4350 | if (ap->flags & ATA_FLAG_MMIO) { | |
4351 | void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; | |
4352 | writeb(readb(mmio), mmio); | |
4353 | } else { | |
4354 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; | |
4355 | outb(inb(addr), addr); | |
4356 | } | |
4357 | ||
4358 | } | |
4359 | ||
0baab86b EF |
4360 | |
4361 | /** | |
4362 | * ata_bmdma_status - Read PCI IDE BMDMA status | |
decc6d0b | 4363 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
4364 | * |
4365 | * Read and return BMDMA status register. | |
4366 | * | |
4367 | * May be used as the bmdma_status() entry in ata_port_operations. | |
4368 | * | |
4369 | * LOCKING: | |
4370 | * spin_lock_irqsave(host_set lock) | |
4371 | */ | |
4372 | ||
1da177e4 LT |
4373 | u8 ata_bmdma_status(struct ata_port *ap) |
4374 | { | |
4375 | u8 host_stat; | |
4376 | if (ap->flags & ATA_FLAG_MMIO) { | |
4377 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
4378 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
4379 | } else | |
ee500aab | 4380 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
1da177e4 LT |
4381 | return host_stat; |
4382 | } | |
4383 | ||
0baab86b EF |
4384 | |
4385 | /** | |
4386 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | |
b73fc89f | 4387 | * @qc: Command we are ending DMA for |
0baab86b EF |
4388 | * |
4389 | * Clears the ATA_DMA_START flag in the dma control register | |
4390 | * | |
4391 | * May be used as the bmdma_stop() entry in ata_port_operations. | |
4392 | * | |
4393 | * LOCKING: | |
4394 | * spin_lock_irqsave(host_set lock) | |
4395 | */ | |
4396 | ||
b73fc89f | 4397 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
1da177e4 | 4398 | { |
b73fc89f | 4399 | struct ata_port *ap = qc->ap; |
1da177e4 LT |
4400 | if (ap->flags & ATA_FLAG_MMIO) { |
4401 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
4402 | ||
4403 | /* clear start/stop bit */ | |
4404 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, | |
4405 | mmio + ATA_DMA_CMD); | |
4406 | } else { | |
4407 | /* clear start/stop bit */ | |
4408 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, | |
4409 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
4410 | } | |
4411 | ||
4412 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | |
4413 | ata_altstatus(ap); /* dummy read */ | |
4414 | } | |
4415 | ||
4416 | /** | |
4417 | * ata_host_intr - Handle host interrupt for given (port, task) | |
4418 | * @ap: Port on which interrupt arrived (possibly...) | |
4419 | * @qc: Taskfile currently active in engine | |
4420 | * | |
4421 | * Handle host interrupt for given queued command. Currently, | |
4422 | * only DMA interrupts are handled. All other commands are | |
4423 | * handled via polling with interrupts disabled (nIEN bit). | |
4424 | * | |
4425 | * LOCKING: | |
4426 | * spin_lock_irqsave(host_set lock) | |
4427 | * | |
4428 | * RETURNS: | |
4429 | * One if interrupt was handled, zero if not (shared irq). | |
4430 | */ | |
4431 | ||
4432 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
4433 | struct ata_queued_cmd *qc) | |
4434 | { | |
4435 | u8 status, host_stat; | |
4436 | ||
4437 | switch (qc->tf.protocol) { | |
4438 | ||
4439 | case ATA_PROT_DMA: | |
4440 | case ATA_PROT_ATAPI_DMA: | |
4441 | case ATA_PROT_ATAPI: | |
4442 | /* check status of DMA engine */ | |
4443 | host_stat = ap->ops->bmdma_status(ap); | |
4444 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
4445 | ||
4446 | /* if it's not our irq... */ | |
4447 | if (!(host_stat & ATA_DMA_INTR)) | |
4448 | goto idle_irq; | |
4449 | ||
4450 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 4451 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
4452 | |
4453 | /* fall through */ | |
4454 | ||
4455 | case ATA_PROT_ATAPI_NODATA: | |
4456 | case ATA_PROT_NODATA: | |
4457 | /* check altstatus */ | |
4458 | status = ata_altstatus(ap); | |
4459 | if (status & ATA_BUSY) | |
4460 | goto idle_irq; | |
4461 | ||
4462 | /* check main status, clearing INTRQ */ | |
4463 | status = ata_chk_status(ap); | |
4464 | if (unlikely(status & ATA_BUSY)) | |
4465 | goto idle_irq; | |
4466 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | |
4467 | ap->id, qc->tf.protocol, status); | |
4468 | ||
4469 | /* ack bmdma irq events */ | |
4470 | ap->ops->irq_clear(ap); | |
4471 | ||
4472 | /* complete taskfile transaction */ | |
a22e2eb0 AL |
4473 | qc->err_mask |= ac_err_mask(status); |
4474 | ata_qc_complete(qc); | |
1da177e4 LT |
4475 | break; |
4476 | ||
4477 | default: | |
4478 | goto idle_irq; | |
4479 | } | |
4480 | ||
4481 | return 1; /* irq handled */ | |
4482 | ||
4483 | idle_irq: | |
4484 | ap->stats.idle_irq++; | |
4485 | ||
4486 | #ifdef ATA_IRQ_TRAP | |
4487 | if ((ap->stats.idle_irq % 1000) == 0) { | |
4488 | handled = 1; | |
4489 | ata_irq_ack(ap, 0); /* debug trap */ | |
4490 | printk(KERN_WARNING "ata%d: irq trap\n", ap->id); | |
4491 | } | |
4492 | #endif | |
4493 | return 0; /* irq not handled */ | |
4494 | } | |
4495 | ||
4496 | /** | |
4497 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
4498 | * @irq: irq line (unused) |
4499 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
4500 | * @regs: unused |
4501 | * | |
0cba632b JG |
4502 | * Default interrupt handler for PCI IDE devices. Calls |
4503 | * ata_host_intr() for each port that is not disabled. | |
4504 | * | |
1da177e4 | 4505 | * LOCKING: |
0cba632b | 4506 | * Obtains host_set lock during operation. |
1da177e4 LT |
4507 | * |
4508 | * RETURNS: | |
0cba632b | 4509 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
4510 | */ |
4511 | ||
4512 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
4513 | { | |
4514 | struct ata_host_set *host_set = dev_instance; | |
4515 | unsigned int i; | |
4516 | unsigned int handled = 0; | |
4517 | unsigned long flags; | |
4518 | ||
4519 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
4520 | spin_lock_irqsave(&host_set->lock, flags); | |
4521 | ||
4522 | for (i = 0; i < host_set->n_ports; i++) { | |
4523 | struct ata_port *ap; | |
4524 | ||
4525 | ap = host_set->ports[i]; | |
c1389503 TH |
4526 | if (ap && |
4527 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | |
1da177e4 LT |
4528 | struct ata_queued_cmd *qc; |
4529 | ||
4530 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
21b1ed74 AL |
4531 | if (qc && (!(qc->tf.ctl & ATA_NIEN)) && |
4532 | (qc->flags & ATA_QCFLAG_ACTIVE)) | |
1da177e4 LT |
4533 | handled |= ata_host_intr(ap, qc); |
4534 | } | |
4535 | } | |
4536 | ||
4537 | spin_unlock_irqrestore(&host_set->lock, flags); | |
4538 | ||
4539 | return IRQ_RETVAL(handled); | |
4540 | } | |
4541 | ||
0baab86b | 4542 | |
9b847548 JA |
4543 | /* |
4544 | * Execute a 'simple' command, that only consists of the opcode 'cmd' itself, | |
4545 | * without filling any other registers | |
4546 | */ | |
4547 | static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev, | |
4548 | u8 cmd) | |
4549 | { | |
4550 | struct ata_taskfile tf; | |
4551 | int err; | |
4552 | ||
4553 | ata_tf_init(ap, &tf, dev->devno); | |
4554 | ||
4555 | tf.command = cmd; | |
4556 | tf.flags |= ATA_TFLAG_DEVICE; | |
4557 | tf.protocol = ATA_PROT_NODATA; | |
4558 | ||
4559 | err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0); | |
4560 | if (err) | |
4561 | printk(KERN_ERR "%s: ata command failed: %d\n", | |
4562 | __FUNCTION__, err); | |
4563 | ||
4564 | return err; | |
4565 | } | |
4566 | ||
4567 | static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev) | |
4568 | { | |
4569 | u8 cmd; | |
4570 | ||
4571 | if (!ata_try_flush_cache(dev)) | |
4572 | return 0; | |
4573 | ||
4574 | if (ata_id_has_flush_ext(dev->id)) | |
4575 | cmd = ATA_CMD_FLUSH_EXT; | |
4576 | else | |
4577 | cmd = ATA_CMD_FLUSH; | |
4578 | ||
4579 | return ata_do_simple_cmd(ap, dev, cmd); | |
4580 | } | |
4581 | ||
4582 | static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev) | |
4583 | { | |
4584 | return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1); | |
4585 | } | |
4586 | ||
4587 | static int ata_start_drive(struct ata_port *ap, struct ata_device *dev) | |
4588 | { | |
4589 | return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE); | |
4590 | } | |
4591 | ||
4592 | /** | |
4593 | * ata_device_resume - wakeup a previously suspended devices | |
c893a3ae RD |
4594 | * @ap: port the device is connected to |
4595 | * @dev: the device to resume | |
9b847548 JA |
4596 | * |
4597 | * Kick the drive back into action, by sending it an idle immediate | |
4598 | * command and making sure its transfer mode matches between drive | |
4599 | * and host. | |
4600 | * | |
4601 | */ | |
4602 | int ata_device_resume(struct ata_port *ap, struct ata_device *dev) | |
4603 | { | |
4604 | if (ap->flags & ATA_FLAG_SUSPENDED) { | |
4605 | ap->flags &= ~ATA_FLAG_SUSPENDED; | |
4606 | ata_set_mode(ap); | |
4607 | } | |
4608 | if (!ata_dev_present(dev)) | |
4609 | return 0; | |
4610 | if (dev->class == ATA_DEV_ATA) | |
4611 | ata_start_drive(ap, dev); | |
4612 | ||
4613 | return 0; | |
4614 | } | |
4615 | ||
4616 | /** | |
4617 | * ata_device_suspend - prepare a device for suspend | |
c893a3ae RD |
4618 | * @ap: port the device is connected to |
4619 | * @dev: the device to suspend | |
9b847548 JA |
4620 | * |
4621 | * Flush the cache on the drive, if appropriate, then issue a | |
4622 | * standbynow command. | |
9b847548 JA |
4623 | */ |
4624 | int ata_device_suspend(struct ata_port *ap, struct ata_device *dev) | |
4625 | { | |
4626 | if (!ata_dev_present(dev)) | |
4627 | return 0; | |
4628 | if (dev->class == ATA_DEV_ATA) | |
4629 | ata_flush_cache(ap, dev); | |
4630 | ||
4631 | ata_standby_drive(ap, dev); | |
4632 | ap->flags |= ATA_FLAG_SUSPENDED; | |
4633 | return 0; | |
4634 | } | |
4635 | ||
c893a3ae RD |
4636 | /** |
4637 | * ata_port_start - Set port up for dma. | |
4638 | * @ap: Port to initialize | |
4639 | * | |
4640 | * Called just after data structures for each port are | |
4641 | * initialized. Allocates space for PRD table. | |
4642 | * | |
4643 | * May be used as the port_start() entry in ata_port_operations. | |
4644 | * | |
4645 | * LOCKING: | |
4646 | * Inherited from caller. | |
4647 | */ | |
4648 | ||
1da177e4 LT |
4649 | int ata_port_start (struct ata_port *ap) |
4650 | { | |
4651 | struct device *dev = ap->host_set->dev; | |
6037d6bb | 4652 | int rc; |
1da177e4 LT |
4653 | |
4654 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
4655 | if (!ap->prd) | |
4656 | return -ENOMEM; | |
4657 | ||
6037d6bb JG |
4658 | rc = ata_pad_alloc(ap, dev); |
4659 | if (rc) { | |
cedc9a47 | 4660 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 4661 | return rc; |
cedc9a47 JG |
4662 | } |
4663 | ||
1da177e4 LT |
4664 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
4665 | ||
4666 | return 0; | |
4667 | } | |
4668 | ||
0baab86b EF |
4669 | |
4670 | /** | |
4671 | * ata_port_stop - Undo ata_port_start() | |
4672 | * @ap: Port to shut down | |
4673 | * | |
4674 | * Frees the PRD table. | |
4675 | * | |
4676 | * May be used as the port_stop() entry in ata_port_operations. | |
4677 | * | |
4678 | * LOCKING: | |
6f0ef4fa | 4679 | * Inherited from caller. |
0baab86b EF |
4680 | */ |
4681 | ||
1da177e4 LT |
4682 | void ata_port_stop (struct ata_port *ap) |
4683 | { | |
4684 | struct device *dev = ap->host_set->dev; | |
4685 | ||
4686 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 4687 | ata_pad_free(ap, dev); |
1da177e4 LT |
4688 | } |
4689 | ||
aa8f0dc6 JG |
4690 | void ata_host_stop (struct ata_host_set *host_set) |
4691 | { | |
4692 | if (host_set->mmio_base) | |
4693 | iounmap(host_set->mmio_base); | |
4694 | } | |
4695 | ||
4696 | ||
1da177e4 LT |
4697 | /** |
4698 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
4699 | * @ap: Port to unregister | |
4700 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
4701 | * | |
4702 | * LOCKING: | |
6f0ef4fa | 4703 | * Inherited from caller. |
1da177e4 LT |
4704 | */ |
4705 | ||
4706 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
4707 | { | |
4708 | struct Scsi_Host *sh = ap->host; | |
4709 | ||
4710 | DPRINTK("ENTER\n"); | |
4711 | ||
4712 | if (do_unregister) | |
4713 | scsi_remove_host(sh); | |
4714 | ||
4715 | ap->ops->port_stop(ap); | |
4716 | } | |
4717 | ||
4718 | /** | |
4719 | * ata_host_init - Initialize an ata_port structure | |
4720 | * @ap: Structure to initialize | |
4721 | * @host: associated SCSI mid-layer structure | |
4722 | * @host_set: Collection of hosts to which @ap belongs | |
4723 | * @ent: Probe information provided by low-level driver | |
4724 | * @port_no: Port number associated with this ata_port | |
4725 | * | |
0cba632b JG |
4726 | * Initialize a new ata_port structure, and its associated |
4727 | * scsi_host. | |
4728 | * | |
1da177e4 | 4729 | * LOCKING: |
0cba632b | 4730 | * Inherited from caller. |
1da177e4 LT |
4731 | */ |
4732 | ||
4733 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
4734 | struct ata_host_set *host_set, | |
057ace5e | 4735 | const struct ata_probe_ent *ent, unsigned int port_no) |
1da177e4 LT |
4736 | { |
4737 | unsigned int i; | |
4738 | ||
4739 | host->max_id = 16; | |
4740 | host->max_lun = 1; | |
4741 | host->max_channel = 1; | |
4742 | host->unique_id = ata_unique_id++; | |
4743 | host->max_cmd_len = 12; | |
12413197 | 4744 | |
1da177e4 LT |
4745 | ap->flags = ATA_FLAG_PORT_DISABLED; |
4746 | ap->id = host->unique_id; | |
4747 | ap->host = host; | |
4748 | ap->ctl = ATA_DEVCTL_OBS; | |
4749 | ap->host_set = host_set; | |
4750 | ap->port_no = port_no; | |
4751 | ap->hard_port_no = | |
4752 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
4753 | ap->pio_mask = ent->pio_mask; | |
4754 | ap->mwdma_mask = ent->mwdma_mask; | |
4755 | ap->udma_mask = ent->udma_mask; | |
4756 | ap->flags |= ent->host_flags; | |
4757 | ap->ops = ent->port_ops; | |
4758 | ap->cbl = ATA_CBL_NONE; | |
4759 | ap->active_tag = ATA_TAG_POISON; | |
4760 | ap->last_ctl = 0xFF; | |
4761 | ||
86e45b6b | 4762 | INIT_WORK(&ap->port_task, NULL, NULL); |
a72ec4ce | 4763 | INIT_LIST_HEAD(&ap->eh_done_q); |
1da177e4 LT |
4764 | |
4765 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
4766 | ap->device[i].devno = i; | |
4767 | ||
4768 | #ifdef ATA_IRQ_TRAP | |
4769 | ap->stats.unhandled_irq = 1; | |
4770 | ap->stats.idle_irq = 1; | |
4771 | #endif | |
4772 | ||
4773 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
4774 | } | |
4775 | ||
4776 | /** | |
4777 | * ata_host_add - Attach low-level ATA driver to system | |
4778 | * @ent: Information provided by low-level driver | |
4779 | * @host_set: Collections of ports to which we add | |
4780 | * @port_no: Port number associated with this host | |
4781 | * | |
0cba632b JG |
4782 | * Attach low-level ATA driver to system. |
4783 | * | |
1da177e4 | 4784 | * LOCKING: |
0cba632b | 4785 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4786 | * |
4787 | * RETURNS: | |
0cba632b | 4788 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
4789 | */ |
4790 | ||
057ace5e | 4791 | static struct ata_port * ata_host_add(const struct ata_probe_ent *ent, |
1da177e4 LT |
4792 | struct ata_host_set *host_set, |
4793 | unsigned int port_no) | |
4794 | { | |
4795 | struct Scsi_Host *host; | |
4796 | struct ata_port *ap; | |
4797 | int rc; | |
4798 | ||
4799 | DPRINTK("ENTER\n"); | |
4800 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
4801 | if (!host) | |
4802 | return NULL; | |
4803 | ||
4804 | ap = (struct ata_port *) &host->hostdata[0]; | |
4805 | ||
4806 | ata_host_init(ap, host, host_set, ent, port_no); | |
4807 | ||
4808 | rc = ap->ops->port_start(ap); | |
4809 | if (rc) | |
4810 | goto err_out; | |
4811 | ||
4812 | return ap; | |
4813 | ||
4814 | err_out: | |
4815 | scsi_host_put(host); | |
4816 | return NULL; | |
4817 | } | |
4818 | ||
4819 | /** | |
0cba632b JG |
4820 | * ata_device_add - Register hardware device with ATA and SCSI layers |
4821 | * @ent: Probe information describing hardware device to be registered | |
4822 | * | |
4823 | * This function processes the information provided in the probe | |
4824 | * information struct @ent, allocates the necessary ATA and SCSI | |
4825 | * host information structures, initializes them, and registers | |
4826 | * everything with requisite kernel subsystems. | |
4827 | * | |
4828 | * This function requests irqs, probes the ATA bus, and probes | |
4829 | * the SCSI bus. | |
1da177e4 LT |
4830 | * |
4831 | * LOCKING: | |
0cba632b | 4832 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4833 | * |
4834 | * RETURNS: | |
0cba632b | 4835 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 LT |
4836 | */ |
4837 | ||
057ace5e | 4838 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 LT |
4839 | { |
4840 | unsigned int count = 0, i; | |
4841 | struct device *dev = ent->dev; | |
4842 | struct ata_host_set *host_set; | |
4843 | ||
4844 | DPRINTK("ENTER\n"); | |
4845 | /* alloc a container for our list of ATA ports (buses) */ | |
57f3bda8 | 4846 | host_set = kzalloc(sizeof(struct ata_host_set) + |
1da177e4 LT |
4847 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); |
4848 | if (!host_set) | |
4849 | return 0; | |
1da177e4 LT |
4850 | spin_lock_init(&host_set->lock); |
4851 | ||
4852 | host_set->dev = dev; | |
4853 | host_set->n_ports = ent->n_ports; | |
4854 | host_set->irq = ent->irq; | |
4855 | host_set->mmio_base = ent->mmio_base; | |
4856 | host_set->private_data = ent->private_data; | |
4857 | host_set->ops = ent->port_ops; | |
4858 | ||
4859 | /* register each port bound to this device */ | |
4860 | for (i = 0; i < ent->n_ports; i++) { | |
4861 | struct ata_port *ap; | |
4862 | unsigned long xfer_mode_mask; | |
4863 | ||
4864 | ap = ata_host_add(ent, host_set, i); | |
4865 | if (!ap) | |
4866 | goto err_out; | |
4867 | ||
4868 | host_set->ports[i] = ap; | |
4869 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
4870 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
4871 | (ap->pio_mask << ATA_SHIFT_PIO); | |
4872 | ||
4873 | /* print per-port info to dmesg */ | |
4874 | printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX " | |
4875 | "bmdma 0x%lX irq %lu\n", | |
4876 | ap->id, | |
4877 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
4878 | ata_mode_string(xfer_mode_mask), | |
4879 | ap->ioaddr.cmd_addr, | |
4880 | ap->ioaddr.ctl_addr, | |
4881 | ap->ioaddr.bmdma_addr, | |
4882 | ent->irq); | |
4883 | ||
4884 | ata_chk_status(ap); | |
4885 | host_set->ops->irq_clear(ap); | |
4886 | count++; | |
4887 | } | |
4888 | ||
57f3bda8 RD |
4889 | if (!count) |
4890 | goto err_free_ret; | |
1da177e4 LT |
4891 | |
4892 | /* obtain irq, that is shared between channels */ | |
4893 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
4894 | DRV_NAME, host_set)) | |
4895 | goto err_out; | |
4896 | ||
4897 | /* perform each probe synchronously */ | |
4898 | DPRINTK("probe begin\n"); | |
4899 | for (i = 0; i < count; i++) { | |
4900 | struct ata_port *ap; | |
4901 | int rc; | |
4902 | ||
4903 | ap = host_set->ports[i]; | |
4904 | ||
c893a3ae | 4905 | DPRINTK("ata%u: bus probe begin\n", ap->id); |
1da177e4 | 4906 | rc = ata_bus_probe(ap); |
c893a3ae | 4907 | DPRINTK("ata%u: bus probe end\n", ap->id); |
1da177e4 LT |
4908 | |
4909 | if (rc) { | |
4910 | /* FIXME: do something useful here? | |
4911 | * Current libata behavior will | |
4912 | * tear down everything when | |
4913 | * the module is removed | |
4914 | * or the h/w is unplugged. | |
4915 | */ | |
4916 | } | |
4917 | ||
4918 | rc = scsi_add_host(ap->host, dev); | |
4919 | if (rc) { | |
4920 | printk(KERN_ERR "ata%u: scsi_add_host failed\n", | |
4921 | ap->id); | |
4922 | /* FIXME: do something useful here */ | |
4923 | /* FIXME: handle unconditional calls to | |
4924 | * scsi_scan_host and ata_host_remove, below, | |
4925 | * at the very least | |
4926 | */ | |
4927 | } | |
4928 | } | |
4929 | ||
4930 | /* probes are done, now scan each port's disk(s) */ | |
c893a3ae | 4931 | DPRINTK("host probe begin\n"); |
1da177e4 LT |
4932 | for (i = 0; i < count; i++) { |
4933 | struct ata_port *ap = host_set->ports[i]; | |
4934 | ||
644dd0cc | 4935 | ata_scsi_scan_host(ap); |
1da177e4 LT |
4936 | } |
4937 | ||
4938 | dev_set_drvdata(dev, host_set); | |
4939 | ||
4940 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
4941 | return ent->n_ports; /* success */ | |
4942 | ||
4943 | err_out: | |
4944 | for (i = 0; i < count; i++) { | |
4945 | ata_host_remove(host_set->ports[i], 1); | |
4946 | scsi_host_put(host_set->ports[i]->host); | |
4947 | } | |
57f3bda8 | 4948 | err_free_ret: |
1da177e4 LT |
4949 | kfree(host_set); |
4950 | VPRINTK("EXIT, returning 0\n"); | |
4951 | return 0; | |
4952 | } | |
4953 | ||
17b14451 AC |
4954 | /** |
4955 | * ata_host_set_remove - PCI layer callback for device removal | |
4956 | * @host_set: ATA host set that was removed | |
4957 | * | |
4958 | * Unregister all objects associated with this host set. Free those | |
4959 | * objects. | |
4960 | * | |
4961 | * LOCKING: | |
4962 | * Inherited from calling layer (may sleep). | |
4963 | */ | |
4964 | ||
17b14451 AC |
4965 | void ata_host_set_remove(struct ata_host_set *host_set) |
4966 | { | |
4967 | struct ata_port *ap; | |
4968 | unsigned int i; | |
4969 | ||
4970 | for (i = 0; i < host_set->n_ports; i++) { | |
4971 | ap = host_set->ports[i]; | |
4972 | scsi_remove_host(ap->host); | |
4973 | } | |
4974 | ||
4975 | free_irq(host_set->irq, host_set); | |
4976 | ||
4977 | for (i = 0; i < host_set->n_ports; i++) { | |
4978 | ap = host_set->ports[i]; | |
4979 | ||
4980 | ata_scsi_release(ap->host); | |
4981 | ||
4982 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4983 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4984 | ||
4985 | if (ioaddr->cmd_addr == 0x1f0) | |
4986 | release_region(0x1f0, 8); | |
4987 | else if (ioaddr->cmd_addr == 0x170) | |
4988 | release_region(0x170, 8); | |
4989 | } | |
4990 | ||
4991 | scsi_host_put(ap->host); | |
4992 | } | |
4993 | ||
4994 | if (host_set->ops->host_stop) | |
4995 | host_set->ops->host_stop(host_set); | |
4996 | ||
4997 | kfree(host_set); | |
4998 | } | |
4999 | ||
1da177e4 LT |
5000 | /** |
5001 | * ata_scsi_release - SCSI layer callback hook for host unload | |
5002 | * @host: libata host to be unloaded | |
5003 | * | |
5004 | * Performs all duties necessary to shut down a libata port... | |
5005 | * Kill port kthread, disable port, and release resources. | |
5006 | * | |
5007 | * LOCKING: | |
5008 | * Inherited from SCSI layer. | |
5009 | * | |
5010 | * RETURNS: | |
5011 | * One. | |
5012 | */ | |
5013 | ||
5014 | int ata_scsi_release(struct Scsi_Host *host) | |
5015 | { | |
5016 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | |
d9572b1d | 5017 | int i; |
1da177e4 LT |
5018 | |
5019 | DPRINTK("ENTER\n"); | |
5020 | ||
5021 | ap->ops->port_disable(ap); | |
5022 | ata_host_remove(ap, 0); | |
d9572b1d TH |
5023 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
5024 | kfree(ap->device[i].id); | |
1da177e4 LT |
5025 | |
5026 | DPRINTK("EXIT\n"); | |
5027 | return 1; | |
5028 | } | |
5029 | ||
5030 | /** | |
5031 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
5032 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
5033 | * |
5034 | * Utility function which initializes data_addr, error_addr, | |
5035 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
5036 | * device_addr, status_addr, and command_addr to standard offsets | |
5037 | * relative to cmd_addr. | |
5038 | * | |
5039 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 5040 | */ |
0baab86b | 5041 | |
1da177e4 LT |
5042 | void ata_std_ports(struct ata_ioports *ioaddr) |
5043 | { | |
5044 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
5045 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
5046 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
5047 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
5048 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
5049 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
5050 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
5051 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
5052 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
5053 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
5054 | } | |
5055 | ||
0baab86b | 5056 | |
374b1873 JG |
5057 | #ifdef CONFIG_PCI |
5058 | ||
5059 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
5060 | { | |
5061 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
5062 | ||
5063 | pci_iounmap(pdev, host_set->mmio_base); | |
5064 | } | |
5065 | ||
1da177e4 LT |
5066 | /** |
5067 | * ata_pci_remove_one - PCI layer callback for device removal | |
5068 | * @pdev: PCI device that was removed | |
5069 | * | |
5070 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 5071 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
5072 | * Handle this by unregistering all objects associated |
5073 | * with this PCI device. Free those objects. Then finally | |
5074 | * release PCI resources and disable device. | |
5075 | * | |
5076 | * LOCKING: | |
5077 | * Inherited from PCI layer (may sleep). | |
5078 | */ | |
5079 | ||
5080 | void ata_pci_remove_one (struct pci_dev *pdev) | |
5081 | { | |
5082 | struct device *dev = pci_dev_to_dev(pdev); | |
5083 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
1da177e4 | 5084 | |
17b14451 | 5085 | ata_host_set_remove(host_set); |
1da177e4 LT |
5086 | pci_release_regions(pdev); |
5087 | pci_disable_device(pdev); | |
5088 | dev_set_drvdata(dev, NULL); | |
5089 | } | |
5090 | ||
5091 | /* move to PCI subsystem */ | |
057ace5e | 5092 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
5093 | { |
5094 | unsigned long tmp = 0; | |
5095 | ||
5096 | switch (bits->width) { | |
5097 | case 1: { | |
5098 | u8 tmp8 = 0; | |
5099 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
5100 | tmp = tmp8; | |
5101 | break; | |
5102 | } | |
5103 | case 2: { | |
5104 | u16 tmp16 = 0; | |
5105 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
5106 | tmp = tmp16; | |
5107 | break; | |
5108 | } | |
5109 | case 4: { | |
5110 | u32 tmp32 = 0; | |
5111 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
5112 | tmp = tmp32; | |
5113 | break; | |
5114 | } | |
5115 | ||
5116 | default: | |
5117 | return -EINVAL; | |
5118 | } | |
5119 | ||
5120 | tmp &= bits->mask; | |
5121 | ||
5122 | return (tmp == bits->val) ? 1 : 0; | |
5123 | } | |
9b847548 JA |
5124 | |
5125 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state) | |
5126 | { | |
5127 | pci_save_state(pdev); | |
5128 | pci_disable_device(pdev); | |
5129 | pci_set_power_state(pdev, PCI_D3hot); | |
5130 | return 0; | |
5131 | } | |
5132 | ||
5133 | int ata_pci_device_resume(struct pci_dev *pdev) | |
5134 | { | |
5135 | pci_set_power_state(pdev, PCI_D0); | |
5136 | pci_restore_state(pdev); | |
5137 | pci_enable_device(pdev); | |
5138 | pci_set_master(pdev); | |
5139 | return 0; | |
5140 | } | |
1da177e4 LT |
5141 | #endif /* CONFIG_PCI */ |
5142 | ||
5143 | ||
1da177e4 LT |
5144 | static int __init ata_init(void) |
5145 | { | |
5146 | ata_wq = create_workqueue("ata"); | |
5147 | if (!ata_wq) | |
5148 | return -ENOMEM; | |
5149 | ||
5150 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
5151 | return 0; | |
5152 | } | |
5153 | ||
5154 | static void __exit ata_exit(void) | |
5155 | { | |
5156 | destroy_workqueue(ata_wq); | |
5157 | } | |
5158 | ||
5159 | module_init(ata_init); | |
5160 | module_exit(ata_exit); | |
5161 | ||
67846b30 JG |
5162 | static unsigned long ratelimit_time; |
5163 | static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED; | |
5164 | ||
5165 | int ata_ratelimit(void) | |
5166 | { | |
5167 | int rc; | |
5168 | unsigned long flags; | |
5169 | ||
5170 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
5171 | ||
5172 | if (time_after(jiffies, ratelimit_time)) { | |
5173 | rc = 1; | |
5174 | ratelimit_time = jiffies + (HZ/5); | |
5175 | } else | |
5176 | rc = 0; | |
5177 | ||
5178 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
5179 | ||
5180 | return rc; | |
5181 | } | |
5182 | ||
1da177e4 LT |
5183 | /* |
5184 | * libata is essentially a library of internal helper functions for | |
5185 | * low-level ATA host controller drivers. As such, the API/ABI is | |
5186 | * likely to change as new drivers are added and updated. | |
5187 | * Do not depend on ABI/API stability. | |
5188 | */ | |
5189 | ||
5190 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
5191 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
5192 | EXPORT_SYMBOL_GPL(ata_device_add); | |
17b14451 | 5193 | EXPORT_SYMBOL_GPL(ata_host_set_remove); |
1da177e4 LT |
5194 | EXPORT_SYMBOL_GPL(ata_sg_init); |
5195 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
76014427 | 5196 | EXPORT_SYMBOL_GPL(__ata_qc_complete); |
1da177e4 LT |
5197 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
5198 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
5199 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
5200 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
5201 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
5202 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
5203 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
5204 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
5205 | EXPORT_SYMBOL_GPL(ata_check_status); | |
5206 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
5207 | EXPORT_SYMBOL_GPL(ata_exec_command); |
5208 | EXPORT_SYMBOL_GPL(ata_port_start); | |
5209 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 5210 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 LT |
5211 | EXPORT_SYMBOL_GPL(ata_interrupt); |
5212 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
5213 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
5214 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
5215 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
5216 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
5217 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
5218 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
5219 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
5220 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
5221 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
8a19ac89 | 5222 | EXPORT_SYMBOL_GPL(ata_std_probeinit); |
c2bd5804 TH |
5223 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
5224 | EXPORT_SYMBOL_GPL(sata_std_hardreset); | |
5225 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
5226 | EXPORT_SYMBOL_GPL(ata_std_probe_reset); | |
a62c0fc5 | 5227 | EXPORT_SYMBOL_GPL(ata_drive_probe_reset); |
623a3128 | 5228 | EXPORT_SYMBOL_GPL(ata_dev_revalidate); |
1da177e4 | 5229 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 5230 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
6f8b9958 | 5231 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
86e45b6b | 5232 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
5233 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
5234 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
f29841e0 | 5235 | EXPORT_SYMBOL_GPL(ata_scsi_timed_out); |
1da177e4 LT |
5236 | EXPORT_SYMBOL_GPL(ata_scsi_error); |
5237 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
5238 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
5239 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
5240 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
6a62a04d TH |
5241 | EXPORT_SYMBOL_GPL(ata_id_string); |
5242 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
1da177e4 | 5243 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
a72ec4ce TH |
5244 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
5245 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
1da177e4 | 5246 | |
1bc4ccff | 5247 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
5248 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
5249 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
5250 | ||
1da177e4 LT |
5251 | #ifdef CONFIG_PCI |
5252 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 5253 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
5254 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
5255 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
5256 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
9b847548 JA |
5257 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
5258 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
1da177e4 | 5259 | #endif /* CONFIG_PCI */ |
9b847548 JA |
5260 | |
5261 | EXPORT_SYMBOL_GPL(ata_device_suspend); | |
5262 | EXPORT_SYMBOL_GPL(ata_device_resume); | |
5263 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); | |
5264 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); |