Merge branch 'slab/next' of git://git.kernel.org/pub/scm/linux/kernel/git/penberg...
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc.h
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d4379acd 4 * Copyright (C) 2004-2012 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
2e0fef85 22#include <scsi/scsi_host.h>
88a2cfbb
JS
23
24#if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
25#define CONFIG_SCSI_LPFC_DEBUG_FS
26#endif
27
dea3101e 28struct lpfc_sli2_slim;
29
3772a991
JS
30#define LPFC_PCI_DEV_LP 0x1
31#define LPFC_PCI_DEV_OC 0x2
32
33#define LPFC_SLI_REV2 2
34#define LPFC_SLI_REV3 3
35#define LPFC_SLI_REV4 4
36
97eab634 37#define LPFC_MAX_TARGET 4096 /* max number of targets supported */
e17da18e
JS
38#define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
39 requests */
40#define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
41 the NameServer before giving up. */
445cf4f4 42#define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
81301a9b 43#define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
e2aed29f
JS
44#define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
45 cmnd for menlo needs nearly twice as for firmware
46 downloads using bsg */
81301a9b
JS
47#define LPFC_DEFAULT_PROT_SG_SEG_CNT 4096 /* sg protection elements count */
48#define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
0558056c 49#define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
81301a9b 50#define LPFC_MAX_PROT_SG_SEG_CNT 4096 /* prot sg element count per scsi cmd*/
dea3101e 51#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
445cf4f4 52#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
495a714c 53#define LPFC_VNAME_LEN 100 /* vport symbolic name length */
977b5a0a
JS
54#define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
55 queue depth change in millisecs */
56#define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
7dc517df 57#define LPFC_MIN_TGT_QDEPTH 10
977b5a0a 58#define LPFC_MAX_TGT_QDEPTH 0xFFFF
dea3101e 59
ea2151b4
JS
60#define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
61 collection. */
92d7f7b0
JS
62/*
63 * Following time intervals are used of adjusting SCSI device
64 * queue depths when there are driver resource error or Firmware
65 * resource error.
66 */
67#define QUEUE_RAMP_DOWN_INTERVAL (1 * HZ) /* 1 Second */
68#define QUEUE_RAMP_UP_INTERVAL (300 * HZ) /* 5 minutes */
69
70/* Number of exchanges reserved for discovery to complete */
71#define LPFC_DISC_IOCB_BUFF_COUNT 20
72
858c9f6c 73#define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
311464ec 74#define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
858c9f6c 75
9399627f
JS
76/* Error Attention event polling interval */
77#define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
78
dea3101e 79/* Define macros for 64 bit support */
80#define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
81#define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
82#define getPaddr(high, low) ((dma_addr_t)( \
83 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
84/* Provide maximum configuration definitions. */
85#define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
dea3101e 86#define FC_MAX_ADPTMSG 64
87
88#define MAX_HBAEVT 32
89
9399627f
JS
90/* Number of MSI-X vectors the driver uses */
91#define LPFC_MSIX_VECTORS 2
92
5e9d9b82
JS
93/* lpfc wait event data ready flag */
94#define LPFC_DATA_READY (1<<0)
95
809c7536
JS
96/* queue dump line buffer size */
97#define LPFC_LBUF_SZ 128
98
618a5230
JS
99/* mailbox system shutdown options */
100#define LPFC_MBX_NO_WAIT 0
101#define LPFC_MBX_WAIT 1
102
875fbdfe
JSEC
103enum lpfc_polling_flags {
104 ENABLE_FCP_RING_POLLING = 0x1,
105 DISABLE_FCP_RING_INT = 0x2
106};
107
dea3101e 108/* Provide DMA memory definitions the driver uses per port instance. */
109struct lpfc_dmabuf {
110 struct list_head list;
111 void *virt; /* virtual address ptr */
112 dma_addr_t phys; /* mapped address */
76bb24ef 113 uint32_t buffer_tag; /* used for tagged queue ring */
dea3101e 114};
115
116struct lpfc_dma_pool {
117 struct lpfc_dmabuf *elements;
118 uint32_t max_count;
119 uint32_t current_count;
120};
121
ed957684 122struct hbq_dmabuf {
da0436e9 123 struct lpfc_dmabuf hbuf;
ed957684 124 struct lpfc_dmabuf dbuf;
51ef4c26 125 uint32_t size;
ed957684 126 uint32_t tag;
4d9ab994 127 struct lpfc_cq_event cq_event;
45ed1190 128 unsigned long time_stamp;
ed957684
JS
129};
130
dea3101e 131/* Priority bit. Set value to exceed low water mark in lpfc_mem. */
132#define MEM_PRI 0x100
133
134
135/****************************************************************************/
136/* Device VPD save area */
137/****************************************************************************/
138typedef struct lpfc_vpd {
139 uint32_t status; /* vpd status value */
140 uint32_t length; /* number of bytes actually returned */
141 struct {
142 uint32_t rsvd1; /* Revision numbers */
143 uint32_t biuRev;
144 uint32_t smRev;
145 uint32_t smFwRev;
146 uint32_t endecRev;
147 uint16_t rBit;
148 uint8_t fcphHigh;
149 uint8_t fcphLow;
150 uint8_t feaLevelHigh;
151 uint8_t feaLevelLow;
152 uint32_t postKernRev;
153 uint32_t opFwRev;
154 uint8_t opFwName[16];
155 uint32_t sli1FwRev;
156 uint8_t sli1FwName[16];
157 uint32_t sli2FwRev;
158 uint8_t sli2FwName[16];
159 } rev;
92d7f7b0
JS
160 struct {
161#ifdef __BIG_ENDIAN_BITFIELD
da0436e9
JS
162 uint32_t rsvd3 :19; /* Reserved */
163 uint32_t cdss : 1; /* Configure Data Security SLI */
164 uint32_t rsvd2 : 3; /* Reserved */
165 uint32_t cbg : 1; /* Configure BlockGuard */
92d7f7b0
JS
166 uint32_t cmv : 1; /* Configure Max VPIs */
167 uint32_t ccrp : 1; /* Config Command Ring Polling */
168 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
169 uint32_t chbs : 1; /* Cofigure Host Backing store */
170 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
171 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
172 uint32_t cmx : 1; /* Configure Max XRIs */
173 uint32_t cmr : 1; /* Configure Max RPIs */
174#else /* __LITTLE_ENDIAN */
175 uint32_t cmr : 1; /* Configure Max RPIs */
176 uint32_t cmx : 1; /* Configure Max XRIs */
177 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
178 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
179 uint32_t chbs : 1; /* Cofigure Host Backing store */
180 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
181 uint32_t ccrp : 1; /* Config Command Ring Polling */
182 uint32_t cmv : 1; /* Configure Max VPIs */
da0436e9
JS
183 uint32_t cbg : 1; /* Configure BlockGuard */
184 uint32_t rsvd2 : 3; /* Reserved */
185 uint32_t cdss : 1; /* Configure Data Security SLI */
186 uint32_t rsvd3 :19; /* Reserved */
92d7f7b0
JS
187#endif
188 } sli3Feat;
dea3101e 189} lpfc_vpd_t;
190
191struct lpfc_scsi_buf;
192
193
194/*
195 * lpfc stat counters
196 */
197struct lpfc_stats {
198 /* Statistics for ELS commands */
199 uint32_t elsLogiCol;
200 uint32_t elsRetryExceeded;
201 uint32_t elsXmitRetry;
202 uint32_t elsDelayRetry;
203 uint32_t elsRcvDrop;
204 uint32_t elsRcvFrame;
205 uint32_t elsRcvRSCN;
206 uint32_t elsRcvRNID;
207 uint32_t elsRcvFARP;
208 uint32_t elsRcvFARPR;
209 uint32_t elsRcvFLOGI;
210 uint32_t elsRcvPLOGI;
211 uint32_t elsRcvADISC;
212 uint32_t elsRcvPDISC;
213 uint32_t elsRcvFAN;
214 uint32_t elsRcvLOGO;
215 uint32_t elsRcvPRLO;
216 uint32_t elsRcvPRLI;
7bb3b137 217 uint32_t elsRcvLIRR;
12265f68 218 uint32_t elsRcvRLS;
7bb3b137
JW
219 uint32_t elsRcvRPS;
220 uint32_t elsRcvRPL;
5ffc266e 221 uint32_t elsRcvRRQ;
12265f68
JS
222 uint32_t elsRcvRTV;
223 uint32_t elsRcvECHO;
dea3101e 224 uint32_t elsXmitFLOGI;
92d7f7b0 225 uint32_t elsXmitFDISC;
dea3101e 226 uint32_t elsXmitPLOGI;
227 uint32_t elsXmitPRLI;
228 uint32_t elsXmitADISC;
229 uint32_t elsXmitLOGO;
230 uint32_t elsXmitSCR;
231 uint32_t elsXmitRNID;
232 uint32_t elsXmitFARP;
233 uint32_t elsXmitFARPR;
234 uint32_t elsXmitACC;
235 uint32_t elsXmitLSRJT;
236
237 uint32_t frameRcvBcast;
238 uint32_t frameRcvMulti;
239 uint32_t strayXmitCmpl;
240 uint32_t frameXmitDelay;
241 uint32_t xriCmdCmpl;
242 uint32_t xriStatErr;
243 uint32_t LinkUp;
244 uint32_t LinkDown;
245 uint32_t LinkMultiEvent;
246 uint32_t NoRcvBuf;
247 uint32_t fcpCmd;
248 uint32_t fcpCmpl;
249 uint32_t fcpRspErr;
250 uint32_t fcpRemoteStop;
251 uint32_t fcpPortRjt;
252 uint32_t fcpPortBusy;
253 uint32_t fcpError;
254 uint32_t fcpLocalErr;
255};
256
2e0fef85
JS
257struct lpfc_hba;
258
92d7f7b0 259
2e0fef85 260enum discovery_state {
92d7f7b0
JS
261 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
262 LPFC_VPORT_FAILED = 1, /* vport has failed */
263 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
264 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
265 LPFC_FDISC = 8, /* FDISC sent for vport */
266 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
267 * configured */
268 LPFC_NS_REG = 10, /* Register with NameServer */
269 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
270 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
271 * device authentication / discovery */
272 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
273 LPFC_VPORT_READY = 32,
2e0fef85
JS
274};
275
276enum hba_state {
277 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
278 LPFC_WARM_START = 1, /* HBA state after selective reset */
279 LPFC_INIT_START = 2, /* Initial state after board reset */
280 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
281 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
282 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
92d7f7b0 283 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
2e0fef85 284 * CLEAR_LA */
92d7f7b0 285 LPFC_HBA_READY = 32,
2e0fef85
JS
286 LPFC_HBA_ERROR = -1
287};
288
289struct lpfc_vport {
2e0fef85 290 struct lpfc_hba *phba;
3772a991 291 struct list_head listentry;
2e0fef85
JS
292 uint8_t port_type;
293#define LPFC_PHYSICAL_PORT 1
294#define LPFC_NPIV_PORT 2
295#define LPFC_FABRIC_PORT 3
296 enum discovery_state port_state;
297
92d7f7b0 298 uint16_t vpi;
da0436e9 299 uint16_t vfi;
c868595d
JS
300 uint8_t vpi_state;
301#define LPFC_VPI_REGISTERED 0x1
2e0fef85
JS
302
303 uint32_t fc_flag; /* FC flags */
304/* Several of these flags are HBA centric and should be moved to
305 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
306 */
92d7f7b0
JS
307#define FC_PT2PT 0x1 /* pt2pt with no fabric */
308#define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
309#define FC_DISC_TMO 0x4 /* Discovery timer running */
310#define FC_PUBLIC_LOOP 0x8 /* Public loop */
311#define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
312#define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
313#define FC_NLP_MORE 0x40 /* More node to process in node tbl */
314#define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
315#define FC_FABRIC 0x100 /* We are fabric attached */
4b40c59e 316#define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
92d7f7b0 317#define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
4b40c59e 318#define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
92d7f7b0
JS
319#define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
320#define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
321#define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
322#define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
92d7f7b0
JS
323#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
324#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
1c6834a7 325#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
695a814e
JS
326#define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
327#define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
328#define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
92494144 329#define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
2e0fef85 330
7ee5d43e
JS
331 uint32_t ct_flags;
332#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
333#define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
334#define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
335#define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
336#define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
337
2e0fef85
JS
338 struct list_head fc_nodes;
339
340 /* Keep counters for the number of entries in each list. */
341 uint16_t fc_plogi_cnt;
342 uint16_t fc_adisc_cnt;
343 uint16_t fc_reglogin_cnt;
344 uint16_t fc_prli_cnt;
345 uint16_t fc_unmap_cnt;
346 uint16_t fc_map_cnt;
347 uint16_t fc_npr_cnt;
348 uint16_t fc_unused_cnt;
349 struct serv_parm fc_sparam; /* buffer for our service parameters */
350
351 uint32_t fc_myDID; /* fibre channel S_ID */
352 uint32_t fc_prevDID; /* previous fibre channel S_ID */
92494144
JS
353 struct lpfc_name fabric_portname;
354 struct lpfc_name fabric_nodename;
2e0fef85
JS
355
356 int32_t stopped; /* HBA has not been restarted since last ERATT */
357 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
358
359 uint32_t num_disc_nodes; /*in addition to hba_state */
360
361 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
362 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
7f5f3d0d 363 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
2e0fef85
JS
364 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
365 struct lpfc_name fc_nodename; /* fc nodename */
366 struct lpfc_name fc_portname; /* fc portname */
367
368 struct lpfc_work_evt disc_timeout_evt;
369
370 struct timer_list fc_disctmo; /* Discovery rescue timer */
371 uint8_t fc_ns_retry; /* retries for fabric nameserver */
372 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
373
374 spinlock_t work_port_lock;
375 uint32_t work_port_events; /* Timeout to be handled */
858c9f6c
JS
376#define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
377#define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
378#define WORKER_FDMI_TMO 0x4 /* vport: FDMI timeout */
92494144 379#define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
858c9f6c
JS
380
381#define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
382#define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
b1c11812 383#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
858c9f6c
JS
384#define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
385#define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
2a9bf3d0 386#define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
2e0fef85
JS
387
388 struct timer_list fc_fdmitmo;
389 struct timer_list els_tmofunc;
92494144 390 struct timer_list delayed_disc_tmo;
2e0fef85
JS
391
392 int unreg_vpi_cmpl;
393
394 uint8_t load_flag;
395#define FC_LOADING 0x1 /* HBA in process of loading drvr */
396#define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
3de2a653
JS
397 /* Vport Config Parameters */
398 uint32_t cfg_scan_down;
399 uint32_t cfg_lun_queue_depth;
400 uint32_t cfg_nodev_tmo;
401 uint32_t cfg_devloss_tmo;
402 uint32_t cfg_restrict_login;
403 uint32_t cfg_peer_port_login;
404 uint32_t cfg_fcp_class;
405 uint32_t cfg_use_adisc;
406 uint32_t cfg_fdmi_on;
407 uint32_t cfg_discovery_threads;
e8b62011 408 uint32_t cfg_log_verbose;
3de2a653 409 uint32_t cfg_max_luns;
7ee5d43e 410 uint32_t cfg_enable_da_id;
977b5a0a 411 uint32_t cfg_max_scsicmpl_time;
7dc517df 412 uint32_t cfg_tgt_queue_depth;
3de2a653
JS
413
414 uint32_t dev_loss_tmo_changed;
51ef4c26
JS
415
416 struct fc_vport *fc_vport;
417
923e4b6a 418#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
51ef4c26
JS
419 struct dentry *debug_disc_trc;
420 struct dentry *debug_nodelist;
421 struct dentry *vport_debugfs_root;
422 struct lpfc_debugfs_trc *disc_trc;
423 atomic_t disc_trc_cnt;
424#endif
ea2151b4
JS
425 uint8_t stat_data_enabled;
426 uint8_t stat_data_blocked;
da0436e9 427 struct list_head rcv_buffer_list;
45ed1190 428 unsigned long rcv_buffer_time_stamp;
da0436e9
JS
429 uint32_t vport_flag;
430#define STATIC_VPORT 1
2e0fef85
JS
431};
432
ed957684
JS
433struct hbq_s {
434 uint16_t entry_count; /* Current number of HBQ slots */
a8adb832 435 uint16_t buffer_count; /* Current number of buffers posted */
ed957684
JS
436 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
437 uint32_t hbqPutIdx; /* HBQ slot to use */
438 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
51ef4c26
JS
439 void *hbq_virt; /* Virtual ptr to this hbq */
440 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
441 /* Callback for HBQ buffer allocation */
442 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
443 /* Callback for HBQ buffer free */
444 void (*hbq_free_buffer) (struct lpfc_hba *,
445 struct hbq_dmabuf *);
ed957684
JS
446};
447
51ef4c26
JS
448#define LPFC_MAX_HBQS 4
449/* this matches the position in the lpfc_hbq_defs array */
92d7f7b0 450#define LPFC_ELS_HBQ 0
51ef4c26 451#define LPFC_EXTRA_HBQ 1
ed957684 452
7af67051
JS
453enum hba_temp_state {
454 HBA_NORMAL_TEMP,
455 HBA_OVER_TEMP
456};
457
db2378e0
JS
458enum intr_type_t {
459 NONE = 0,
460 INTx,
461 MSI,
462 MSIX,
463};
464
f1c3b0fc
JS
465struct unsol_rcv_ct_ctx {
466 uint32_t ctxt_id;
467 uint32_t SID;
4fede78f
JS
468 uint32_t flags;
469#define UNSOL_VALID 0x00000001
7851fe2c
JS
470 uint16_t oxid;
471 uint16_t rxid;
f1c3b0fc
JS
472};
473
76a95d75
JS
474#define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
475#define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
476#define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
477#define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
478#define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
479#define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
480#define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
481#define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_16G
482#define LPFC_USER_LINK_SPEED_BITMAP ((1 << LPFC_USER_LINK_SPEED_16G) | \
483 (1 << LPFC_USER_LINK_SPEED_10G) | \
484 (1 << LPFC_USER_LINK_SPEED_8G) | \
485 (1 << LPFC_USER_LINK_SPEED_4G) | \
486 (1 << LPFC_USER_LINK_SPEED_2G) | \
487 (1 << LPFC_USER_LINK_SPEED_1G) | \
488 (1 << LPFC_USER_LINK_SPEED_AUTO))
489#define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16"
490
7ad20aa9
JS
491enum nemb_type {
492 nemb_mse = 1,
493 nemb_hbd
494};
495
496enum mbox_type {
497 mbox_rd = 1,
498 mbox_wr
499};
500
501enum dma_type {
502 dma_mbox = 1,
503 dma_ebuf
504};
505
506enum sta_type {
507 sta_pre_addr = 1,
508 sta_pos_addr
509};
510
511struct lpfc_mbox_ext_buf_ctx {
512 uint32_t state;
513#define LPFC_BSG_MBOX_IDLE 0
514#define LPFC_BSG_MBOX_HOST 1
515#define LPFC_BSG_MBOX_PORT 2
516#define LPFC_BSG_MBOX_DONE 3
517#define LPFC_BSG_MBOX_ABTS 4
518 enum nemb_type nembType;
519 enum mbox_type mboxType;
520 uint32_t numBuf;
521 uint32_t mbxTag;
522 uint32_t seqNum;
523 struct lpfc_dmabuf *mbx_dmabuf;
524 struct list_head ext_dmabuf_list;
525};
526
dea3101e 527struct lpfc_hba {
3772a991
JS
528 /* SCSI interface function jump table entries */
529 int (*lpfc_new_scsi_buf)
530 (struct lpfc_vport *, int);
531 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
19ca7609 532 (struct lpfc_hba *, struct lpfc_nodelist *);
3772a991
JS
533 int (*lpfc_scsi_prep_dma_buf)
534 (struct lpfc_hba *, struct lpfc_scsi_buf *);
535 void (*lpfc_scsi_unprep_dma_buf)
536 (struct lpfc_hba *, struct lpfc_scsi_buf *);
537 void (*lpfc_release_scsi_buf)
538 (struct lpfc_hba *, struct lpfc_scsi_buf *);
539 void (*lpfc_rampdown_queue_depth)
540 (struct lpfc_hba *);
541 void (*lpfc_scsi_prep_cmnd)
542 (struct lpfc_vport *, struct lpfc_scsi_buf *,
543 struct lpfc_nodelist *);
acd6859b 544
3772a991
JS
545 /* IOCB interface function jump table entries */
546 int (*__lpfc_sli_issue_iocb)
547 (struct lpfc_hba *, uint32_t,
548 struct lpfc_iocbq *, uint32_t);
549 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
550 struct lpfc_iocbq *);
551 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
3772a991
JS
552 IOCB_t * (*lpfc_get_iocb_from_iocbq)
553 (struct lpfc_iocbq *);
554 void (*lpfc_scsi_cmd_iocb_cmpl)
555 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
556
557 /* MBOX interface function jump table entries */
558 int (*lpfc_sli_issue_mbox)
559 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
acd6859b 560
3772a991
JS
561 /* Slow-path IOCB process function jump table entries */
562 void (*lpfc_sli_handle_slow_ring_event)
563 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
564 uint32_t mask);
acd6859b 565
3772a991
JS
566 /* INIT device interface function jump table entries */
567 int (*lpfc_sli_hbq_to_firmware)
568 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
569 int (*lpfc_sli_brdrestart)
570 (struct lpfc_hba *);
571 int (*lpfc_sli_brdready)
572 (struct lpfc_hba *, uint32_t);
573 void (*lpfc_handle_eratt)
574 (struct lpfc_hba *);
575 void (*lpfc_stop_port)
576 (struct lpfc_hba *);
84d1b006 577 int (*lpfc_hba_init_link)
6e7288d9 578 (struct lpfc_hba *, uint32_t);
84d1b006 579 int (*lpfc_hba_down_link)
6e7288d9 580 (struct lpfc_hba *, uint32_t);
7f86059a
JS
581 int (*lpfc_selective_reset)
582 (struct lpfc_hba *);
3772a991 583
acd6859b
JS
584 int (*lpfc_bg_scsi_prep_dma_buf)
585 (struct lpfc_hba *, struct lpfc_scsi_buf *);
586 /* Add new entries here */
587
3772a991
JS
588 /* SLI4 specific HBA data structure */
589 struct lpfc_sli4_hba sli4_hba;
590
dea3101e 591 struct lpfc_sli sli;
3772a991
JS
592 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
593 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
ed957684 594 uint32_t sli3_options; /* Mask of enabled SLI3 options */
34b02dcd
JS
595#define LPFC_SLI3_HBQ_ENABLED 0x01
596#define LPFC_SLI3_NPIV_ENABLED 0x02
597#define LPFC_SLI3_VPORT_TEARDOWN 0x04
598#define LPFC_SLI3_CRP_ENABLED 0x08
81301a9b 599#define LPFC_SLI3_BG_ENABLED 0x20
da0436e9 600#define LPFC_SLI3_DSS_ENABLED 0x40
fedd3b7b
JS
601#define LPFC_SLI4_PERFH_ENABLED 0x80
602#define LPFC_SLI4_PHWQ_ENABLED 0x100
ed957684
JS
603 uint32_t iocb_cmd_size;
604 uint32_t iocb_rsp_size;
2e0fef85
JS
605
606 enum hba_state link_state;
607 uint32_t link_flag; /* link state flags */
311464ec 608#define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
2e0fef85
JS
609 /* This flag is set while issuing */
610 /* INIT_LINK mailbox command */
92d7f7b0 611#define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
1b32f6aa 612#define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
2e0fef85 613
9399627f
JS
614 uint32_t hba_flag; /* hba generic flags */
615#define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
da0436e9 616#define DEFER_ERATT 0x2 /* Deferred error attention in progress */
76a95d75 617#define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
45ed1190 618#define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
da0436e9
JS
619#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
620#define FCP_XRI_ABORT_EVENT 0x20
621#define ELS_XRI_ABORT_EVENT 0x40
622#define ASYNC_EVENT 0x80
a0c87cbd 623#define LINK_DISABLED 0x100 /* Link disabled by user */
a93ff37a
JS
624#define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
625#define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
626#define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
627#define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
628#define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
19ca7609 629#define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
4f2e66c6 630#define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */
45ed1190 631 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
34b02dcd
JS
632 struct lpfc_dmabuf slim2p;
633
634 MAILBOX_t *mbox;
7a470277 635 uint32_t *mbox_ext;
7ad20aa9 636 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
9399627f 637 uint32_t ha_copy;
34b02dcd
JS
638 struct _PCB *pcb;
639 struct _IOCB *IOCBs;
2e0fef85 640
34b02dcd 641 struct lpfc_dmabuf hbqslimp;
2e0fef85 642
dea3101e 643 uint16_t pci_cfg_value;
644
dea3101e 645 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
646
647 uint32_t fc_eventTag; /* event tag for link attention */
4d9ab994 648 uint32_t link_events;
dea3101e 649
dea3101e 650 /* These fields used to be binfo */
dea3101e 651 uint32_t fc_pref_DID; /* preferred D_ID */
92d7f7b0 652 uint8_t fc_pref_ALPA; /* preferred AL_PA */
12265f68 653 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
dea3101e 654 uint32_t fc_edtov; /* E_D_TOV timer value */
655 uint32_t fc_arbtov; /* ARB_TOV timer value */
656 uint32_t fc_ratov; /* R_A_TOV timer value */
657 uint32_t fc_rttov; /* R_T_TOV timer value */
658 uint32_t fc_altov; /* AL_TOV timer value */
659 uint32_t fc_crtov; /* C_R_TOV timer value */
660 uint32_t fc_citov; /* C_I_TOV timer value */
dea3101e 661
dea3101e 662 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
663 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
664
dea3101e 665 uint32_t lmt;
dea3101e 666
667 uint32_t fc_topology; /* link topology, from LINK INIT */
668
669 struct lpfc_stats fc_stat;
670
dea3101e 671 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
672 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
673
2e0fef85
JS
674 uint8_t wwnn[8];
675 uint8_t wwpn[8];
dea3101e 676 uint32_t RandomData[7];
677
3de2a653 678 /* HBA Config Parameters */
dea3101e 679 uint32_t cfg_ack0;
78b2d852 680 uint32_t cfg_enable_npiv;
19ca7609 681 uint32_t cfg_enable_rrq;
dea3101e 682 uint32_t cfg_topology;
dea3101e 683 uint32_t cfg_link_speed;
7d791df7
JS
684#define LPFC_FCF_FOV 1 /* Fast fcf failover */
685#define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
686 uint32_t cfg_fcf_failover_policy;
dea3101e 687 uint32_t cfg_cr_delay;
688 uint32_t cfg_cr_count;
cf5bf97e 689 uint32_t cfg_multi_ring_support;
a4bc3379
JS
690 uint32_t cfg_multi_ring_rctl;
691 uint32_t cfg_multi_ring_type;
875fbdfe
JSEC
692 uint32_t cfg_poll;
693 uint32_t cfg_poll_tmo;
4ff43246 694 uint32_t cfg_use_msi;
da0436e9
JS
695 uint32_t cfg_fcp_imax;
696 uint32_t cfg_fcp_wq_count;
697 uint32_t cfg_fcp_eq_count;
dea3101e 698 uint32_t cfg_sg_seg_cnt;
81301a9b 699 uint32_t cfg_prot_sg_seg_cnt;
dea3101e 700 uint32_t cfg_sg_dma_buf_size;
a12e07bc 701 uint64_t cfg_soft_wwnn;
c3f28afa 702 uint64_t cfg_soft_wwpn;
3de2a653 703 uint32_t cfg_hba_queue_depth;
13815c83
JS
704 uint32_t cfg_enable_hba_reset;
705 uint32_t cfg_enable_hba_heartbeat;
81301a9b 706 uint32_t cfg_enable_bg;
7a470277 707 uint32_t cfg_hostmem_hgp;
da0436e9 708 uint32_t cfg_log_verbose;
0d878419 709 uint32_t cfg_aer_support;
912e3acd 710 uint32_t cfg_sriov_nr_virtfn;
2a9bf3d0 711 uint32_t cfg_iocb_cnt;
84d1b006 712 uint32_t cfg_suppress_link_up;
e40a02c1
JS
713#define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
714#define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
715#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
ab56dc2e 716 uint32_t cfg_enable_dss;
dea3101e 717 lpfc_vpd_t vpd; /* vital product data */
718
dea3101e 719 struct pci_dev *pcidev;
720 struct list_head work_list;
721 uint32_t work_ha; /* Host Attention Bits for WT */
722 uint32_t work_ha_mask; /* HA Bits owned by WT */
723 uint32_t work_hs; /* HS stored in case of ERRAT */
724 uint32_t work_status[2]; /* Extra status from SLIM */
dea3101e 725
5e9d9b82 726 wait_queue_head_t work_waitq;
dea3101e 727 struct task_struct *worker_thread;
d7c255b2 728 unsigned long data_flags;
dea3101e 729
3163f725 730 uint32_t hbq_in_use; /* HBQs in use flag */
3772a991 731 struct list_head rb_pend_list; /* Received buffers to be processed */
ed957684 732 uint32_t hbq_count; /* Count of configured HBQs */
92d7f7b0 733 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
ed957684 734
8fa38513
JS
735 uint32_t fcp_qidx; /* next work queue to post work to */
736
dea3101e 737 unsigned long pci_bar0_map; /* Physical address for PCI BAR0 */
3772a991 738 unsigned long pci_bar1_map; /* Physical address for PCI BAR1 */
dea3101e 739 unsigned long pci_bar2_map; /* Physical address for PCI BAR2 */
740 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
741 PCI BAR0 */
742 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
743 PCI BAR2 */
744
745 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
746 void __iomem *HAregaddr; /* virtual address for host attn reg */
747 void __iomem *CAregaddr; /* virtual address for chip attn reg */
748 void __iomem *HSregaddr; /* virtual address for host status
749 reg */
750 void __iomem *HCregaddr; /* virtual address for host ctl reg */
751
ed957684 752 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
34b02dcd 753 struct lpfc_pgp *port_gp;
ed957684 754 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
92d7f7b0 755 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
ed957684 756
dea3101e 757 int brd_no; /* FC board number */
dea3101e 758 char SerialNumber[32]; /* adapter Serial Number */
759 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
760 char ModelDesc[256]; /* Model Description */
761 char ModelName[80]; /* Model Name */
762 char ProgramType[256]; /* Program Type */
763 char Port[20]; /* Port No */
764 uint8_t vpd_flag; /* VPD data flag */
765
766#define VPD_MODEL_DESC 0x1 /* valid vpd model description */
767#define VPD_MODEL_NAME 0x2 /* valid vpd model name */
768#define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
769#define VPD_PORT 0x8 /* valid vpd port data */
770#define VPD_MASK 0xf /* mask for any vpd data */
771
a12e07bc 772 uint8_t soft_wwn_enable;
c3f28afa 773
875fbdfe 774 struct timer_list fcp_poll_timer;
9399627f 775 struct timer_list eratt_poll;
875fbdfe 776
dea3101e 777 /*
778 * stat counters
779 */
780 uint64_t fc4InputRequests;
781 uint64_t fc4OutputRequests;
782 uint64_t fc4ControlRequests;
81301a9b
JS
783 uint64_t bg_guard_err_cnt;
784 uint64_t bg_apptag_err_cnt;
785 uint64_t bg_reftag_err_cnt;
dea3101e 786
dea3101e 787 /* fastpath list. */
875fbdfe 788 spinlock_t scsi_buf_list_lock;
dea3101e 789 struct list_head lpfc_scsi_buf_list;
790 uint32_t total_scsi_bufs;
791 struct list_head lpfc_iocb_list;
792 uint32_t total_iocbq_bufs;
19ca7609 793 struct list_head active_rrq_list;
2e0fef85 794 spinlock_t hbalock;
dea3101e 795
796 /* pci_mem_pools */
797 struct pci_pool *lpfc_scsi_dma_buf_pool;
798 struct pci_pool *lpfc_mbuf_pool;
da0436e9
JS
799 struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
800 struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
8568a4d2 801 struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
dea3101e 802 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
803
804 mempool_t *mbox_mem_pool;
805 mempool_t *nlp_mem_pool;
19ca7609 806 mempool_t *rrq_pool;
f888ba3c
JSEC
807
808 struct fc_host_statistics link_stats;
db2378e0 809 enum intr_type_t intr_type;
5b75da2f
JS
810 uint32_t intr_mode;
811#define LPFC_INTR_ERROR 0xFFFFFFFF
9399627f 812 struct msix_entry msix_entries[LPFC_MSIX_VECTORS];
858c9f6c 813
2e0fef85 814 struct list_head port_list;
549e55cd
JS
815 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
816 uint16_t max_vpi; /* Maximum virtual nports */
09372820 817#define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
da0436e9
JS
818 uint16_t max_vports; /*
819 * For IOV HBAs max_vpi can change
820 * after a reset. max_vports is max
821 * number of vports present. This can
822 * be greater than max_vpi.
823 */
824 uint16_t vpi_base;
825 uint16_t vfi_base;
549e55cd 826 unsigned long *vpi_bmask; /* vpi allocation table */
6d368e53
JS
827 uint16_t *vpi_ids;
828 uint16_t vpi_count;
829 struct list_head lpfc_vpi_blk_list;
92d7f7b0
JS
830
831 /* Data structure used by fabric iocb scheduler */
832 struct list_head fabric_iocb_list;
833 atomic_t fabric_iocb_count;
834 struct timer_list fabric_block_timer;
835 unsigned long bit_flags;
836#define FABRIC_COMANDS_BLOCKED 0
837 atomic_t num_rsrc_err;
838 atomic_t num_cmd_success;
839 unsigned long last_rsrc_error_time;
840 unsigned long last_ramp_down_time;
841 unsigned long last_ramp_up_time;
923e4b6a 842#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
858c9f6c
JS
843 struct dentry *hba_debugfs_root;
844 atomic_t debugfs_vport_count;
78b2d852 845 struct dentry *debug_hbqinfo;
c95d6c6c
JS
846 struct dentry *debug_dumpHostSlim;
847 struct dentry *debug_dumpHBASlim;
f9bb2da1
JS
848 struct dentry *debug_dumpData; /* BlockGuard BPL */
849 struct dentry *debug_dumpDif; /* BlockGuard BPL */
850 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
4ac9b226
JS
851 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
852 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
f9bb2da1
JS
853 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
854 struct dentry *debug_writeApp; /* inject write app_tag errors */
855 struct dentry *debug_writeRef; /* inject write ref_tag errors */
acd6859b 856 struct dentry *debug_readGuard; /* inject read guard_tag errors */
f9bb2da1
JS
857 struct dentry *debug_readApp; /* inject read app_tag errors */
858 struct dentry *debug_readRef; /* inject read ref_tag errors */
859
860 /* T10 DIF error injection */
861 uint32_t lpfc_injerr_wgrd_cnt;
862 uint32_t lpfc_injerr_wapp_cnt;
863 uint32_t lpfc_injerr_wref_cnt;
acd6859b 864 uint32_t lpfc_injerr_rgrd_cnt;
f9bb2da1
JS
865 uint32_t lpfc_injerr_rapp_cnt;
866 uint32_t lpfc_injerr_rref_cnt;
4ac9b226
JS
867 uint32_t lpfc_injerr_nportid;
868 struct lpfc_name lpfc_injerr_wwpn;
f9bb2da1 869 sector_t lpfc_injerr_lba;
acd6859b 870#define LPFC_INJERR_LBA_OFF (sector_t)(-1)
f9bb2da1 871
a58cbd52
JS
872 struct dentry *debug_slow_ring_trc;
873 struct lpfc_debugfs_trc *slow_ring_trc;
874 atomic_t slow_ring_trc_cnt;
2a622bfb
JS
875 /* iDiag debugfs sub-directory */
876 struct dentry *idiag_root;
877 struct dentry *idiag_pci_cfg;
b76f2dc9 878 struct dentry *idiag_bar_acc;
2a622bfb 879 struct dentry *idiag_que_info;
86a80846
JS
880 struct dentry *idiag_que_acc;
881 struct dentry *idiag_drb_acc;
b76f2dc9
JS
882 struct dentry *idiag_ctl_acc;
883 struct dentry *idiag_mbx_acc;
884 struct dentry *idiag_ext_acc;
858c9f6c
JS
885#endif
886
0ff10d46
JS
887 /* Used for deferred freeing of ELS data buffers */
888 struct list_head elsbuf;
889 int elsbuf_cnt;
890 int elsbuf_prev_cnt;
891
57127f15 892 uint8_t temp_sensor_support;
858c9f6c
JS
893 /* Fields used for heart beat. */
894 unsigned long last_completion_time;
bc73905a 895 unsigned long skipped_hb;
858c9f6c
JS
896 struct timer_list hb_tmofunc;
897 uint8_t hb_outstanding;
19ca7609 898 struct timer_list rrq_tmr;
84774a4d 899 enum hba_temp_state over_temp_state;
e47c9093
JS
900 /* ndlp reference management */
901 spinlock_t ndlp_lock;
76bb24ef
JS
902 /*
903 * Following bit will be set for all buffer tags which are not
904 * associated with any HBQ.
905 */
906#define QUE_BUFTAG_BIT (1<<31)
907 uint32_t buffer_tag_count;
84774a4d
JS
908 int wait_4_mlo_maint_flg;
909 wait_queue_head_t wait_4_mlo_m_q;
ea2151b4
JS
910 /* data structure used for latency data collection */
911#define LPFC_NO_BUCKET 0
912#define LPFC_LINEAR_BUCKET 1
913#define LPFC_POWER2_BUCKET 2
914 uint8_t bucket_type;
915 uint32_t bucket_base;
916 uint32_t bucket_step;
917
918/* Maximum number of events that can be outstanding at any time*/
919#define LPFC_MAX_EVT_COUNT 512
920 atomic_t fast_event_count;
32b9793f
JS
921 uint32_t fcoe_eventtag;
922 uint32_t fcoe_eventtag_at_fcf_scan;
80c17849
JS
923 uint32_t fcoe_cvl_eventtag;
924 uint32_t fcoe_cvl_eventtag_attn;
da0436e9
JS
925 struct lpfc_fcf fcf;
926 uint8_t fc_map[3];
927 uint8_t valid_vlan;
928 uint16_t vlan_id;
929 struct list_head fcf_conn_rec_list;
f1c3b0fc 930
4fede78f 931 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
f1c3b0fc
JS
932 struct list_head ct_ev_waiters;
933 struct unsol_rcv_ct_ctx ct_ctx[64];
934 uint32_t ctx_idx;
e2aed29f
JS
935
936 uint8_t menlo_flag; /* menlo generic flags */
937#define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
2a9bf3d0
JS
938 uint32_t iocb_cnt;
939 uint32_t iocb_max;
d7c47992 940 atomic_t sdev_cnt;
bc73905a
JS
941 uint8_t fips_spec_rev;
942 uint8_t fips_level;
dea3101e 943};
944
2e0fef85
JS
945static inline struct Scsi_Host *
946lpfc_shost_from_vport(struct lpfc_vport *vport)
947{
948 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
949}
950
5b8bd0c9 951static inline void
2e0fef85
JS
952lpfc_set_loopback_flag(struct lpfc_hba *phba)
953{
5b8bd0c9 954 if (phba->cfg_topology == FLAGS_LOCAL_LB)
2e0fef85 955 phba->link_flag |= LS_LOOPBACK_MODE;
5b8bd0c9 956 else
2e0fef85
JS
957 phba->link_flag &= ~LS_LOOPBACK_MODE;
958}
959
960static inline int
961lpfc_is_link_up(struct lpfc_hba *phba)
962{
963 return phba->link_state == LPFC_LINK_UP ||
92d7f7b0
JS
964 phba->link_state == LPFC_CLEAR_LA ||
965 phba->link_state == LPFC_HBA_READY;
5b8bd0c9 966}
dea3101e 967
5e9d9b82
JS
968static inline void
969lpfc_worker_wake_up(struct lpfc_hba *phba)
970{
971 /* Set the lpfc data pending flag */
972 set_bit(LPFC_DATA_READY, &phba->data_flags);
973
974 /* Wake up worker thread */
975 wake_up(&phba->work_waitq);
976 return;
977}
978
9940b97b
JS
979static inline int
980lpfc_readl(void __iomem *addr, uint32_t *data)
981{
982 uint32_t temp;
983 temp = readl(addr);
984 if (temp == 0xffffffff)
985 return -EIO;
986 *data = temp;
987 return 0;
988}
989
990static inline int
9399627f
JS
991lpfc_sli_read_hs(struct lpfc_hba *phba)
992{
993 /*
994 * There was a link/board error. Read the status register to retrieve
995 * the error event and process it.
996 */
997 phba->sli.slistat.err_attn_event++;
998
9940b97b
JS
999 /* Save status info and check for unplug error */
1000 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1001 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1002 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1003 return -EIO;
1004 }
9399627f
JS
1005
1006 /* Clear chip Host Attention error bit */
1007 writel(HA_ERATT, phba->HAregaddr);
1008 readl(phba->HAregaddr); /* flush */
1009 phba->pport->stopped = 1;
1010
9940b97b 1011 return 0;
9399627f 1012}
This page took 0.669194 seconds and 5 git commands to generate.