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[SCSI] lpfc 8.3.28: Miscellaneous fixes in sysfs and mgmt interfaces
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc.h
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
2a622bfb 4 * Copyright (C) 2004-2011 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
2e0fef85 22#include <scsi/scsi_host.h>
88a2cfbb
JS		 23
24#if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
25#define CONFIG_SCSI_LPFC_DEBUG_FS
26#endif
27
dea3101e 28struct lpfc_sli2_slim;
29
3772a991
JS		 30#define LPFC_PCI_DEV_LP 0x1
31#define LPFC_PCI_DEV_OC 0x2
32
33#define LPFC_SLI_REV2 2
34#define LPFC_SLI_REV3 3
35#define LPFC_SLI_REV4 4
36
97eab634 37#define LPFC_MAX_TARGET 4096 /* max number of targets supported */
e17da18e
JS		 38#define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
39 requests */
40#define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
41 the NameServer before giving up. */
445cf4f4 42#define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
81301a9b 43#define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
e2aed29f
JS		 44#define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
45 cmnd for menlo needs nearly twice as for firmware
46 downloads using bsg */
81301a9b
JS		 47#define LPFC_DEFAULT_PROT_SG_SEG_CNT 4096 /* sg protection elements count */
48#define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
0558056c 49#define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
81301a9b 50#define LPFC_MAX_PROT_SG_SEG_CNT 4096 /* prot sg element count per scsi cmd*/
dea3101e 51#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
445cf4f4 52#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
495a714c 53#define LPFC_VNAME_LEN 100 /* vport symbolic name length */
977b5a0a
JS		 54#define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
55 queue depth change in millisecs */
56#define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
7dc517df 57#define LPFC_MIN_TGT_QDEPTH 10
977b5a0a 58#define LPFC_MAX_TGT_QDEPTH 0xFFFF
dea3101e 59
ea2151b4
JS		 60#define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
61 collection. */
92d7f7b0
JS		 62/*
63 * Following time intervals are used of adjusting SCSI device
64 * queue depths when there are driver resource error or Firmware
65 * resource error.
66 */
67#define QUEUE_RAMP_DOWN_INTERVAL (1 * HZ) /* 1 Second */
68#define QUEUE_RAMP_UP_INTERVAL (300 * HZ) /* 5 minutes */
69
70/* Number of exchanges reserved for discovery to complete */
71#define LPFC_DISC_IOCB_BUFF_COUNT 20
72
858c9f6c 73#define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
311464ec 74#define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
858c9f6c 75
9399627f
JS		 76/* Error Attention event polling interval */
77#define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
78
dea3101e 79/* Define macros for 64 bit support */
80#define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
81#define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
82#define getPaddr(high, low) ((dma_addr_t)( \
83 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
84/* Provide maximum configuration definitions. */
85#define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
dea3101e 86#define FC_MAX_ADPTMSG 64
87
88#define MAX_HBAEVT 32
89
9399627f
JS		 90/* Number of MSI-X vectors the driver uses */
91#define LPFC_MSIX_VECTORS 2
92
5e9d9b82
JS		 93/* lpfc wait event data ready flag */
94#define LPFC_DATA_READY (1<<0)
95
875fbdfe
JSEC		 96enum lpfc_polling_flags {
97 ENABLE_FCP_RING_POLLING = 0x1,
98 DISABLE_FCP_RING_INT = 0x2
99};
100
dea3101e 101/* Provide DMA memory definitions the driver uses per port instance. */
102struct lpfc_dmabuf {
103 struct list_head list;
104 void *virt; /* virtual address ptr */
105 dma_addr_t phys; /* mapped address */
76bb24ef 106 uint32_t buffer_tag; /* used for tagged queue ring */
dea3101e 107};
108
109struct lpfc_dma_pool {
110 struct lpfc_dmabuf *elements;
111 uint32_t max_count;
112 uint32_t current_count;
113};
114
ed957684 115struct hbq_dmabuf {
da0436e9 116 struct lpfc_dmabuf hbuf;
ed957684 117 struct lpfc_dmabuf dbuf;
51ef4c26 118 uint32_t size;
ed957684 119 uint32_t tag;
4d9ab994 120 struct lpfc_cq_event cq_event;
45ed1190 121 unsigned long time_stamp;
ed957684
JS		 122};
123
dea3101e 124/* Priority bit. Set value to exceed low water mark in lpfc_mem. */
125#define MEM_PRI 0x100
126
127
128/****************************************************************************/
129/* Device VPD save area */
130/****************************************************************************/
131typedef struct lpfc_vpd {
132 uint32_t status; /* vpd status value */
133 uint32_t length; /* number of bytes actually returned */
134 struct {
135 uint32_t rsvd1; /* Revision numbers */
136 uint32_t biuRev;
137 uint32_t smRev;
138 uint32_t smFwRev;
139 uint32_t endecRev;
140 uint16_t rBit;
141 uint8_t fcphHigh;
142 uint8_t fcphLow;
143 uint8_t feaLevelHigh;
144 uint8_t feaLevelLow;
145 uint32_t postKernRev;
146 uint32_t opFwRev;
147 uint8_t opFwName[16];
148 uint32_t sli1FwRev;
149 uint8_t sli1FwName[16];
150 uint32_t sli2FwRev;
151 uint8_t sli2FwName[16];
152 } rev;
92d7f7b0
JS		 153 struct {
154#ifdef __BIG_ENDIAN_BITFIELD
da0436e9
JS		 155 uint32_t rsvd3 :19; /* Reserved */
156 uint32_t cdss : 1; /* Configure Data Security SLI */
157 uint32_t rsvd2 : 3; /* Reserved */
158 uint32_t cbg : 1; /* Configure BlockGuard */
92d7f7b0
JS		 159 uint32_t cmv : 1; /* Configure Max VPIs */
160 uint32_t ccrp : 1; /* Config Command Ring Polling */
161 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
162 uint32_t chbs : 1; /* Cofigure Host Backing store */
163 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
164 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
165 uint32_t cmx : 1; /* Configure Max XRIs */
166 uint32_t cmr : 1; /* Configure Max RPIs */
167#else /* __LITTLE_ENDIAN */
168 uint32_t cmr : 1; /* Configure Max RPIs */
169 uint32_t cmx : 1; /* Configure Max XRIs */
170 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
171 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
172 uint32_t chbs : 1; /* Cofigure Host Backing store */
173 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
174 uint32_t ccrp : 1; /* Config Command Ring Polling */
175 uint32_t cmv : 1; /* Configure Max VPIs */
da0436e9
JS		 176 uint32_t cbg : 1; /* Configure BlockGuard */
177 uint32_t rsvd2 : 3; /* Reserved */
178 uint32_t cdss : 1; /* Configure Data Security SLI */
179 uint32_t rsvd3 :19; /* Reserved */
92d7f7b0
JS		 180#endif
181 } sli3Feat;
dea3101e 182} lpfc_vpd_t;
183
184struct lpfc_scsi_buf;
185
186
187/*
188 * lpfc stat counters
189 */
190struct lpfc_stats {
191 /* Statistics for ELS commands */
192 uint32_t elsLogiCol;
193 uint32_t elsRetryExceeded;
194 uint32_t elsXmitRetry;
195 uint32_t elsDelayRetry;
196 uint32_t elsRcvDrop;
197 uint32_t elsRcvFrame;
198 uint32_t elsRcvRSCN;
199 uint32_t elsRcvRNID;
200 uint32_t elsRcvFARP;
201 uint32_t elsRcvFARPR;
202 uint32_t elsRcvFLOGI;
203 uint32_t elsRcvPLOGI;
204 uint32_t elsRcvADISC;
205 uint32_t elsRcvPDISC;
206 uint32_t elsRcvFAN;
207 uint32_t elsRcvLOGO;
208 uint32_t elsRcvPRLO;
209 uint32_t elsRcvPRLI;
7bb3b137 210 uint32_t elsRcvLIRR;
12265f68 211 uint32_t elsRcvRLS;
7bb3b137
JW		 212 uint32_t elsRcvRPS;
213 uint32_t elsRcvRPL;
5ffc266e 214 uint32_t elsRcvRRQ;
12265f68
JS		 215 uint32_t elsRcvRTV;
216 uint32_t elsRcvECHO;
dea3101e 217 uint32_t elsXmitFLOGI;
92d7f7b0 218 uint32_t elsXmitFDISC;
dea3101e 219 uint32_t elsXmitPLOGI;
220 uint32_t elsXmitPRLI;
221 uint32_t elsXmitADISC;
222 uint32_t elsXmitLOGO;
223 uint32_t elsXmitSCR;
224 uint32_t elsXmitRNID;
225 uint32_t elsXmitFARP;
226 uint32_t elsXmitFARPR;
227 uint32_t elsXmitACC;
228 uint32_t elsXmitLSRJT;
229
230 uint32_t frameRcvBcast;
231 uint32_t frameRcvMulti;
232 uint32_t strayXmitCmpl;
233 uint32_t frameXmitDelay;
234 uint32_t xriCmdCmpl;
235 uint32_t xriStatErr;
236 uint32_t LinkUp;
237 uint32_t LinkDown;
238 uint32_t LinkMultiEvent;
239 uint32_t NoRcvBuf;
240 uint32_t fcpCmd;
241 uint32_t fcpCmpl;
242 uint32_t fcpRspErr;
243 uint32_t fcpRemoteStop;
244 uint32_t fcpPortRjt;
245 uint32_t fcpPortBusy;
246 uint32_t fcpError;
247 uint32_t fcpLocalErr;
248};
249
2e0fef85
JS		 250struct lpfc_hba;
251
92d7f7b0 252
2e0fef85 253enum discovery_state {
92d7f7b0
JS		 254 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
255 LPFC_VPORT_FAILED = 1, /* vport has failed */
256 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
257 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
258 LPFC_FDISC = 8, /* FDISC sent for vport */
259 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
260 * configured */
261 LPFC_NS_REG = 10, /* Register with NameServer */
262 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
263 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
264 * device authentication / discovery */
265 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
266 LPFC_VPORT_READY = 32,
2e0fef85
JS		 267};
268
269enum hba_state {
270 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
271 LPFC_WARM_START = 1, /* HBA state after selective reset */
272 LPFC_INIT_START = 2, /* Initial state after board reset */
273 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
274 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
275 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
92d7f7b0 276 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
2e0fef85 277 * CLEAR_LA */
92d7f7b0 278 LPFC_HBA_READY = 32,
2e0fef85
JS		 279 LPFC_HBA_ERROR = -1
280};
281
282struct lpfc_vport {
2e0fef85 283 struct lpfc_hba *phba;
3772a991 284 struct list_head listentry;
2e0fef85
JS		 285 uint8_t port_type;
286#define LPFC_PHYSICAL_PORT 1
287#define LPFC_NPIV_PORT 2
288#define LPFC_FABRIC_PORT 3
289 enum discovery_state port_state;
290
92d7f7b0 291 uint16_t vpi;
da0436e9 292 uint16_t vfi;
c868595d
JS		 293 uint8_t vpi_state;
294#define LPFC_VPI_REGISTERED 0x1
2e0fef85
JS		 295
296 uint32_t fc_flag; /* FC flags */
297/* Several of these flags are HBA centric and should be moved to
298 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
299 */
92d7f7b0
JS		 300#define FC_PT2PT 0x1 /* pt2pt with no fabric */
301#define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
302#define FC_DISC_TMO 0x4 /* Discovery timer running */
303#define FC_PUBLIC_LOOP 0x8 /* Public loop */
304#define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
305#define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
306#define FC_NLP_MORE 0x40 /* More node to process in node tbl */
307#define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
308#define FC_FABRIC 0x100 /* We are fabric attached */
4b40c59e 309#define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
92d7f7b0 310#define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
4b40c59e 311#define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
92d7f7b0
JS		 312#define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
313#define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
314#define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
315#define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
92d7f7b0
JS		 316#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
317#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
1c6834a7 318#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
695a814e
JS		 319#define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
320#define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
321#define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
92494144 322#define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
2e0fef85 323
7ee5d43e
JS		 324 uint32_t ct_flags;
325#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
326#define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
327#define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
328#define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
329#define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
330
2e0fef85
JS		 331 struct list_head fc_nodes;
332
333 /* Keep counters for the number of entries in each list. */
334 uint16_t fc_plogi_cnt;
335 uint16_t fc_adisc_cnt;
336 uint16_t fc_reglogin_cnt;
337 uint16_t fc_prli_cnt;
338 uint16_t fc_unmap_cnt;
339 uint16_t fc_map_cnt;
340 uint16_t fc_npr_cnt;
341 uint16_t fc_unused_cnt;
342 struct serv_parm fc_sparam; /* buffer for our service parameters */
343
344 uint32_t fc_myDID; /* fibre channel S_ID */
345 uint32_t fc_prevDID; /* previous fibre channel S_ID */
92494144
JS		 346 struct lpfc_name fabric_portname;
347 struct lpfc_name fabric_nodename;
2e0fef85
JS		 348
349 int32_t stopped; /* HBA has not been restarted since last ERATT */
350 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
351
352 uint32_t num_disc_nodes; /*in addition to hba_state */
353
354 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
355 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
7f5f3d0d 356 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
2e0fef85
JS		 357 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
358 struct lpfc_name fc_nodename; /* fc nodename */
359 struct lpfc_name fc_portname; /* fc portname */
360
361 struct lpfc_work_evt disc_timeout_evt;
362
363 struct timer_list fc_disctmo; /* Discovery rescue timer */
364 uint8_t fc_ns_retry; /* retries for fabric nameserver */
365 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
366
367 spinlock_t work_port_lock;
368 uint32_t work_port_events; /* Timeout to be handled */
858c9f6c
JS		 369#define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
370#define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
371#define WORKER_FDMI_TMO 0x4 /* vport: FDMI timeout */
92494144 372#define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
858c9f6c
JS		 373
374#define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
375#define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
b1c11812 376#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
858c9f6c
JS		 377#define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
378#define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
2a9bf3d0 379#define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
2e0fef85
JS		 380
381 struct timer_list fc_fdmitmo;
382 struct timer_list els_tmofunc;
92494144 383 struct timer_list delayed_disc_tmo;
2e0fef85
JS		 384
385 int unreg_vpi_cmpl;
386
387 uint8_t load_flag;
388#define FC_LOADING 0x1 /* HBA in process of loading drvr */
389#define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
3de2a653
JS		 390 /* Vport Config Parameters */
391 uint32_t cfg_scan_down;
392 uint32_t cfg_lun_queue_depth;
393 uint32_t cfg_nodev_tmo;
394 uint32_t cfg_devloss_tmo;
395 uint32_t cfg_restrict_login;
396 uint32_t cfg_peer_port_login;
397 uint32_t cfg_fcp_class;
398 uint32_t cfg_use_adisc;
399 uint32_t cfg_fdmi_on;
400 uint32_t cfg_discovery_threads;
e8b62011 401 uint32_t cfg_log_verbose;
3de2a653 402 uint32_t cfg_max_luns;
7ee5d43e 403 uint32_t cfg_enable_da_id;
977b5a0a 404 uint32_t cfg_max_scsicmpl_time;
7dc517df 405 uint32_t cfg_tgt_queue_depth;
3de2a653
JS		 406
407 uint32_t dev_loss_tmo_changed;
51ef4c26
JS		 408
409 struct fc_vport *fc_vport;
410
923e4b6a 411#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
51ef4c26
JS		 412 struct dentry *debug_disc_trc;
413 struct dentry *debug_nodelist;
414 struct dentry *vport_debugfs_root;
415 struct lpfc_debugfs_trc *disc_trc;
416 atomic_t disc_trc_cnt;
417#endif
ea2151b4
JS		 418 uint8_t stat_data_enabled;
419 uint8_t stat_data_blocked;
da0436e9 420 struct list_head rcv_buffer_list;
45ed1190 421 unsigned long rcv_buffer_time_stamp;
da0436e9
JS		 422 uint32_t vport_flag;
423#define STATIC_VPORT 1
2e0fef85
JS		 424};
425
ed957684
JS		 426struct hbq_s {
427 uint16_t entry_count; /* Current number of HBQ slots */
a8adb832 428 uint16_t buffer_count; /* Current number of buffers posted */
ed957684
JS		 429 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
430 uint32_t hbqPutIdx; /* HBQ slot to use */
431 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
51ef4c26
JS		 432 void *hbq_virt; /* Virtual ptr to this hbq */
433 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
434 /* Callback for HBQ buffer allocation */
435 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
436 /* Callback for HBQ buffer free */
437 void (*hbq_free_buffer) (struct lpfc_hba *,
438 struct hbq_dmabuf *);
ed957684
JS		 439};
440
51ef4c26
JS		 441#define LPFC_MAX_HBQS 4
442/* this matches the position in the lpfc_hbq_defs array */
92d7f7b0 443#define LPFC_ELS_HBQ 0
51ef4c26 444#define LPFC_EXTRA_HBQ 1
ed957684 445
7af67051
JS		 446enum hba_temp_state {
447 HBA_NORMAL_TEMP,
448 HBA_OVER_TEMP
449};
450
db2378e0
JS		 451enum intr_type_t {
452 NONE = 0,
453 INTx,
454 MSI,
455 MSIX,
456};
457
f1c3b0fc
JS		 458struct unsol_rcv_ct_ctx {
459 uint32_t ctxt_id;
460 uint32_t SID;
4fede78f
JS		 461 uint32_t flags;
462#define UNSOL_VALID 0x00000001
7851fe2c
JS		 463 uint16_t oxid;
464 uint16_t rxid;
f1c3b0fc
JS		 465};
466
76a95d75
JS		 467#define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
468#define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
469#define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
470#define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
471#define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
472#define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
473#define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
474#define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_16G
475#define LPFC_USER_LINK_SPEED_BITMAP ((1 << LPFC_USER_LINK_SPEED_16G) | \
476 (1 << LPFC_USER_LINK_SPEED_10G) | \
477 (1 << LPFC_USER_LINK_SPEED_8G) | \
478 (1 << LPFC_USER_LINK_SPEED_4G) | \
479 (1 << LPFC_USER_LINK_SPEED_2G) | \
480 (1 << LPFC_USER_LINK_SPEED_1G) | \
481 (1 << LPFC_USER_LINK_SPEED_AUTO))
482#define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16"
483
7ad20aa9
JS		 484enum nemb_type {
485 nemb_mse = 1,
486 nemb_hbd
487};
488
489enum mbox_type {
490 mbox_rd = 1,
491 mbox_wr
492};
493
494enum dma_type {
495 dma_mbox = 1,
496 dma_ebuf
497};
498
499enum sta_type {
500 sta_pre_addr = 1,
501 sta_pos_addr
502};
503
504struct lpfc_mbox_ext_buf_ctx {
505 uint32_t state;
506#define LPFC_BSG_MBOX_IDLE 0
507#define LPFC_BSG_MBOX_HOST 1
508#define LPFC_BSG_MBOX_PORT 2
509#define LPFC_BSG_MBOX_DONE 3
510#define LPFC_BSG_MBOX_ABTS 4
511 enum nemb_type nembType;
512 enum mbox_type mboxType;
513 uint32_t numBuf;
514 uint32_t mbxTag;
515 uint32_t seqNum;
516 struct lpfc_dmabuf *mbx_dmabuf;
517 struct list_head ext_dmabuf_list;
518};
519
dea3101e 520struct lpfc_hba {
3772a991
JS		 521 /* SCSI interface function jump table entries */
522 int (*lpfc_new_scsi_buf)
523 (struct lpfc_vport *, int);
524 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
19ca7609 525 (struct lpfc_hba *, struct lpfc_nodelist *);
3772a991
JS		 526 int (*lpfc_scsi_prep_dma_buf)
527 (struct lpfc_hba *, struct lpfc_scsi_buf *);
528 void (*lpfc_scsi_unprep_dma_buf)
529 (struct lpfc_hba *, struct lpfc_scsi_buf *);
530 void (*lpfc_release_scsi_buf)
531 (struct lpfc_hba *, struct lpfc_scsi_buf *);
532 void (*lpfc_rampdown_queue_depth)
533 (struct lpfc_hba *);
534 void (*lpfc_scsi_prep_cmnd)
535 (struct lpfc_vport *, struct lpfc_scsi_buf *,
536 struct lpfc_nodelist *);
3772a991
JS		 537 /* IOCB interface function jump table entries */
538 int (*__lpfc_sli_issue_iocb)
539 (struct lpfc_hba *, uint32_t,
540 struct lpfc_iocbq *, uint32_t);
541 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
542 struct lpfc_iocbq *);
543 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
544
545
546 IOCB_t * (*lpfc_get_iocb_from_iocbq)
547 (struct lpfc_iocbq *);
548 void (*lpfc_scsi_cmd_iocb_cmpl)
549 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
550
551 /* MBOX interface function jump table entries */
552 int (*lpfc_sli_issue_mbox)
553 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
554 /* Slow-path IOCB process function jump table entries */
555 void (*lpfc_sli_handle_slow_ring_event)
556 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
557 uint32_t mask);
558 /* INIT device interface function jump table entries */
559 int (*lpfc_sli_hbq_to_firmware)
560 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
561 int (*lpfc_sli_brdrestart)
562 (struct lpfc_hba *);
563 int (*lpfc_sli_brdready)
564 (struct lpfc_hba *, uint32_t);
565 void (*lpfc_handle_eratt)
566 (struct lpfc_hba *);
567 void (*lpfc_stop_port)
568 (struct lpfc_hba *);
84d1b006 569 int (*lpfc_hba_init_link)
6e7288d9 570 (struct lpfc_hba *, uint32_t);
84d1b006 571 int (*lpfc_hba_down_link)
6e7288d9 572 (struct lpfc_hba *, uint32_t);
7f86059a
JS		 573 int (*lpfc_selective_reset)
574 (struct lpfc_hba *);
3772a991 575
3772a991
JS		 576 /* SLI4 specific HBA data structure */
577 struct lpfc_sli4_hba sli4_hba;
578
dea3101e 579 struct lpfc_sli sli;
3772a991
JS		 580 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
581 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
ed957684 582 uint32_t sli3_options; /* Mask of enabled SLI3 options */
34b02dcd
JS		 583#define LPFC_SLI3_HBQ_ENABLED 0x01
584#define LPFC_SLI3_NPIV_ENABLED 0x02
585#define LPFC_SLI3_VPORT_TEARDOWN 0x04
586#define LPFC_SLI3_CRP_ENABLED 0x08
81301a9b 587#define LPFC_SLI3_BG_ENABLED 0x20
da0436e9 588#define LPFC_SLI3_DSS_ENABLED 0x40
fedd3b7b
JS		 589#define LPFC_SLI4_PERFH_ENABLED 0x80
590#define LPFC_SLI4_PHWQ_ENABLED 0x100
ed957684
JS		 591 uint32_t iocb_cmd_size;
592 uint32_t iocb_rsp_size;
2e0fef85
JS		 593
594 enum hba_state link_state;
595 uint32_t link_flag; /* link state flags */
311464ec 596#define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
2e0fef85
JS		 597 /* This flag is set while issuing */
598 /* INIT_LINK mailbox command */
92d7f7b0 599#define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
1b32f6aa 600#define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
2e0fef85 601
9399627f
JS		 602 uint32_t hba_flag; /* hba generic flags */
603#define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
da0436e9 604#define DEFER_ERATT 0x2 /* Deferred error attention in progress */
76a95d75 605#define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
45ed1190 606#define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
da0436e9
JS		 607#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
608#define FCP_XRI_ABORT_EVENT 0x20
609#define ELS_XRI_ABORT_EVENT 0x40
610#define ASYNC_EVENT 0x80
a0c87cbd 611#define LINK_DISABLED 0x100 /* Link disabled by user */
a93ff37a
JS		 612#define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
613#define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
614#define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
615#define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
616#define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
19ca7609 617#define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
45ed1190 618 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
34b02dcd
JS		 619 struct lpfc_dmabuf slim2p;
620
621 MAILBOX_t *mbox;
7a470277 622 uint32_t *mbox_ext;
7ad20aa9 623 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
9399627f 624 uint32_t ha_copy;
34b02dcd
JS		 625 struct _PCB *pcb;
626 struct _IOCB *IOCBs;
2e0fef85 627
34b02dcd 628 struct lpfc_dmabuf hbqslimp;
2e0fef85 629
dea3101e 630 uint16_t pci_cfg_value;
631
dea3101e 632 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
633
634 uint32_t fc_eventTag; /* event tag for link attention */
4d9ab994 635 uint32_t link_events;
dea3101e 636
dea3101e 637 /* These fields used to be binfo */
dea3101e 638 uint32_t fc_pref_DID; /* preferred D_ID */
92d7f7b0 639 uint8_t fc_pref_ALPA; /* preferred AL_PA */
12265f68 640 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
dea3101e 641 uint32_t fc_edtov; /* E_D_TOV timer value */
642 uint32_t fc_arbtov; /* ARB_TOV timer value */
643 uint32_t fc_ratov; /* R_A_TOV timer value */
644 uint32_t fc_rttov; /* R_T_TOV timer value */
645 uint32_t fc_altov; /* AL_TOV timer value */
646 uint32_t fc_crtov; /* C_R_TOV timer value */
647 uint32_t fc_citov; /* C_I_TOV timer value */
dea3101e 648
dea3101e 649 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
650 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
651
dea3101e 652 uint32_t lmt;
dea3101e 653
654 uint32_t fc_topology; /* link topology, from LINK INIT */
655
656 struct lpfc_stats fc_stat;
657
dea3101e 658 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
659 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
660
2e0fef85
JS		 661 uint8_t wwnn[8];
662 uint8_t wwpn[8];
dea3101e 663 uint32_t RandomData[7];
664
3de2a653 665 /* HBA Config Parameters */
dea3101e 666 uint32_t cfg_ack0;
78b2d852 667 uint32_t cfg_enable_npiv;
19ca7609 668 uint32_t cfg_enable_rrq;
dea3101e 669 uint32_t cfg_topology;
dea3101e 670 uint32_t cfg_link_speed;
7d791df7
JS		 671#define LPFC_FCF_FOV 1 /* Fast fcf failover */
672#define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
673 uint32_t cfg_fcf_failover_policy;
dea3101e 674 uint32_t cfg_cr_delay;
675 uint32_t cfg_cr_count;
cf5bf97e 676 uint32_t cfg_multi_ring_support;
a4bc3379
JS		 677 uint32_t cfg_multi_ring_rctl;
678 uint32_t cfg_multi_ring_type;
875fbdfe
JSEC		 679 uint32_t cfg_poll;
680 uint32_t cfg_poll_tmo;
4ff43246 681 uint32_t cfg_use_msi;
da0436e9
JS		 682 uint32_t cfg_fcp_imax;
683 uint32_t cfg_fcp_wq_count;
684 uint32_t cfg_fcp_eq_count;
dea3101e 685 uint32_t cfg_sg_seg_cnt;
81301a9b 686 uint32_t cfg_prot_sg_seg_cnt;
dea3101e 687 uint32_t cfg_sg_dma_buf_size;
a12e07bc 688 uint64_t cfg_soft_wwnn;
c3f28afa 689 uint64_t cfg_soft_wwpn;
3de2a653 690 uint32_t cfg_hba_queue_depth;
13815c83
JS		 691 uint32_t cfg_enable_hba_reset;
692 uint32_t cfg_enable_hba_heartbeat;
81301a9b 693 uint32_t cfg_enable_bg;
7a470277 694 uint32_t cfg_hostmem_hgp;
da0436e9 695 uint32_t cfg_log_verbose;
0d878419 696 uint32_t cfg_aer_support;
912e3acd 697 uint32_t cfg_sriov_nr_virtfn;
2a9bf3d0 698 uint32_t cfg_iocb_cnt;
84d1b006 699 uint32_t cfg_suppress_link_up;
e40a02c1
JS		 700#define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
701#define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
702#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
ab56dc2e 703 uint32_t cfg_enable_dss;
dea3101e 704 lpfc_vpd_t vpd; /* vital product data */
705
dea3101e 706 struct pci_dev *pcidev;
707 struct list_head work_list;
708 uint32_t work_ha; /* Host Attention Bits for WT */
709 uint32_t work_ha_mask; /* HA Bits owned by WT */
710 uint32_t work_hs; /* HS stored in case of ERRAT */
711 uint32_t work_status[2]; /* Extra status from SLIM */
dea3101e 712
5e9d9b82 713 wait_queue_head_t work_waitq;
dea3101e 714 struct task_struct *worker_thread;
d7c255b2 715 unsigned long data_flags;
dea3101e 716
3163f725 717 uint32_t hbq_in_use; /* HBQs in use flag */
3772a991 718 struct list_head rb_pend_list; /* Received buffers to be processed */
ed957684 719 uint32_t hbq_count; /* Count of configured HBQs */
92d7f7b0 720 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
ed957684 721
8fa38513
JS		 722 uint32_t fcp_qidx; /* next work queue to post work to */
723
dea3101e 724 unsigned long pci_bar0_map; /* Physical address for PCI BAR0 */
3772a991 725 unsigned long pci_bar1_map; /* Physical address for PCI BAR1 */
dea3101e 726 unsigned long pci_bar2_map; /* Physical address for PCI BAR2 */
727 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
728 PCI BAR0 */
729 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
730 PCI BAR2 */
731
732 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
733 void __iomem *HAregaddr; /* virtual address for host attn reg */
734 void __iomem *CAregaddr; /* virtual address for chip attn reg */
735 void __iomem *HSregaddr; /* virtual address for host status
736 reg */
737 void __iomem *HCregaddr; /* virtual address for host ctl reg */
738
ed957684 739 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
34b02dcd 740 struct lpfc_pgp *port_gp;
ed957684 741 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
92d7f7b0 742 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
ed957684 743
dea3101e 744 int brd_no; /* FC board number */
dea3101e 745 char SerialNumber[32]; /* adapter Serial Number */
746 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
747 char ModelDesc[256]; /* Model Description */
748 char ModelName[80]; /* Model Name */
749 char ProgramType[256]; /* Program Type */
750 char Port[20]; /* Port No */
751 uint8_t vpd_flag; /* VPD data flag */
752
753#define VPD_MODEL_DESC 0x1 /* valid vpd model description */
754#define VPD_MODEL_NAME 0x2 /* valid vpd model name */
755#define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
756#define VPD_PORT 0x8 /* valid vpd port data */
757#define VPD_MASK 0xf /* mask for any vpd data */
758
a12e07bc 759 uint8_t soft_wwn_enable;
c3f28afa 760
875fbdfe 761 struct timer_list fcp_poll_timer;
9399627f 762 struct timer_list eratt_poll;
875fbdfe 763
dea3101e 764 /*
765 * stat counters
766 */
767 uint64_t fc4InputRequests;
768 uint64_t fc4OutputRequests;
769 uint64_t fc4ControlRequests;
81301a9b
JS		 770 uint64_t bg_guard_err_cnt;
771 uint64_t bg_apptag_err_cnt;
772 uint64_t bg_reftag_err_cnt;
dea3101e 773
dea3101e 774 /* fastpath list. */
875fbdfe 775 spinlock_t scsi_buf_list_lock;
dea3101e 776 struct list_head lpfc_scsi_buf_list;
777 uint32_t total_scsi_bufs;
778 struct list_head lpfc_iocb_list;
779 uint32_t total_iocbq_bufs;
19ca7609 780 struct list_head active_rrq_list;
2e0fef85 781 spinlock_t hbalock;
dea3101e 782
783 /* pci_mem_pools */
784 struct pci_pool *lpfc_scsi_dma_buf_pool;
785 struct pci_pool *lpfc_mbuf_pool;
da0436e9
JS		 786 struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
787 struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
8568a4d2 788 struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
dea3101e 789 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
790
791 mempool_t *mbox_mem_pool;
792 mempool_t *nlp_mem_pool;
19ca7609 793 mempool_t *rrq_pool;
f888ba3c
JSEC		 794
795 struct fc_host_statistics link_stats;
db2378e0 796 enum intr_type_t intr_type;
5b75da2f
JS		 797 uint32_t intr_mode;
798#define LPFC_INTR_ERROR 0xFFFFFFFF
9399627f 799 struct msix_entry msix_entries[LPFC_MSIX_VECTORS];
858c9f6c 800
2e0fef85 801 struct list_head port_list;
549e55cd
JS		 802 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
803 uint16_t max_vpi; /* Maximum virtual nports */
09372820 804#define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
da0436e9
JS		 805 uint16_t max_vports; /*
806 * For IOV HBAs max_vpi can change
807 * after a reset. max_vports is max
808 * number of vports present. This can
809 * be greater than max_vpi.
810 */
811 uint16_t vpi_base;
812 uint16_t vfi_base;
549e55cd 813 unsigned long *vpi_bmask; /* vpi allocation table */
6d368e53
JS		 814 uint16_t *vpi_ids;
815 uint16_t vpi_count;
816 struct list_head lpfc_vpi_blk_list;
92d7f7b0
JS		 817
818 /* Data structure used by fabric iocb scheduler */
819 struct list_head fabric_iocb_list;
820 atomic_t fabric_iocb_count;
821 struct timer_list fabric_block_timer;
822 unsigned long bit_flags;
823#define FABRIC_COMANDS_BLOCKED 0
824 atomic_t num_rsrc_err;
825 atomic_t num_cmd_success;
826 unsigned long last_rsrc_error_time;
827 unsigned long last_ramp_down_time;
828 unsigned long last_ramp_up_time;
923e4b6a 829#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
858c9f6c
JS		 830 struct dentry *hba_debugfs_root;
831 atomic_t debugfs_vport_count;
78b2d852 832 struct dentry *debug_hbqinfo;
c95d6c6c
JS		 833 struct dentry *debug_dumpHostSlim;
834 struct dentry *debug_dumpHBASlim;
f9bb2da1
JS		 835 struct dentry *debug_dumpData; /* BlockGuard BPL */
836 struct dentry *debug_dumpDif; /* BlockGuard BPL */
837 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
838 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
839 struct dentry *debug_writeApp; /* inject write app_tag errors */
840 struct dentry *debug_writeRef; /* inject write ref_tag errors */
841 struct dentry *debug_readApp; /* inject read app_tag errors */
842 struct dentry *debug_readRef; /* inject read ref_tag errors */
843
844 /* T10 DIF error injection */
845 uint32_t lpfc_injerr_wgrd_cnt;
846 uint32_t lpfc_injerr_wapp_cnt;
847 uint32_t lpfc_injerr_wref_cnt;
848 uint32_t lpfc_injerr_rapp_cnt;
849 uint32_t lpfc_injerr_rref_cnt;
850 sector_t lpfc_injerr_lba;
851#define LPFC_INJERR_LBA_OFF (sector_t)0xffffffffffffffff
852
a58cbd52
JS		 853 struct dentry *debug_slow_ring_trc;
854 struct lpfc_debugfs_trc *slow_ring_trc;
855 atomic_t slow_ring_trc_cnt;
2a622bfb
JS		 856 /* iDiag debugfs sub-directory */
857 struct dentry *idiag_root;
858 struct dentry *idiag_pci_cfg;
b76f2dc9 859 struct dentry *idiag_bar_acc;
2a622bfb 860 struct dentry *idiag_que_info;
86a80846
JS		 861 struct dentry *idiag_que_acc;
862 struct dentry *idiag_drb_acc;
b76f2dc9
JS		 863 struct dentry *idiag_ctl_acc;
864 struct dentry *idiag_mbx_acc;
865 struct dentry *idiag_ext_acc;
858c9f6c
JS		 866#endif
867
0ff10d46
JS		 868 /* Used for deferred freeing of ELS data buffers */
869 struct list_head elsbuf;
870 int elsbuf_cnt;
871 int elsbuf_prev_cnt;
872
57127f15 873 uint8_t temp_sensor_support;
858c9f6c
JS		 874 /* Fields used for heart beat. */
875 unsigned long last_completion_time;
bc73905a 876 unsigned long skipped_hb;
858c9f6c
JS		 877 struct timer_list hb_tmofunc;
878 uint8_t hb_outstanding;
19ca7609 879 struct timer_list rrq_tmr;
84774a4d 880 enum hba_temp_state over_temp_state;
e47c9093
JS		 881 /* ndlp reference management */
882 spinlock_t ndlp_lock;
76bb24ef
JS		 883 /*
884 * Following bit will be set for all buffer tags which are not
885 * associated with any HBQ.
886 */
887#define QUE_BUFTAG_BIT (1<<31)
888 uint32_t buffer_tag_count;
84774a4d
JS		 889 int wait_4_mlo_maint_flg;
890 wait_queue_head_t wait_4_mlo_m_q;
ea2151b4
JS		 891 /* data structure used for latency data collection */
892#define LPFC_NO_BUCKET 0
893#define LPFC_LINEAR_BUCKET 1
894#define LPFC_POWER2_BUCKET 2
895 uint8_t bucket_type;
896 uint32_t bucket_base;
897 uint32_t bucket_step;
898
899/* Maximum number of events that can be outstanding at any time*/
900#define LPFC_MAX_EVT_COUNT 512
901 atomic_t fast_event_count;
32b9793f
JS		 902 uint32_t fcoe_eventtag;
903 uint32_t fcoe_eventtag_at_fcf_scan;
da0436e9
JS		 904 struct lpfc_fcf fcf;
905 uint8_t fc_map[3];
906 uint8_t valid_vlan;
907 uint16_t vlan_id;
908 struct list_head fcf_conn_rec_list;
f1c3b0fc 909
4fede78f 910 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
f1c3b0fc
JS		 911 struct list_head ct_ev_waiters;
912 struct unsol_rcv_ct_ctx ct_ctx[64];
913 uint32_t ctx_idx;
e2aed29f
JS		 914
915 uint8_t menlo_flag; /* menlo generic flags */
916#define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
2a9bf3d0
JS		 917 uint32_t iocb_cnt;
918 uint32_t iocb_max;
d7c47992 919 atomic_t sdev_cnt;
bc73905a
JS		 920 uint8_t fips_spec_rev;
921 uint8_t fips_level;
dea3101e 922};
923
2e0fef85
JS		 924static inline struct Scsi_Host *
925lpfc_shost_from_vport(struct lpfc_vport *vport)
926{
927 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
928}
929
5b8bd0c9 930static inline void
2e0fef85
JS		 931lpfc_set_loopback_flag(struct lpfc_hba *phba)
932{
5b8bd0c9 933 if (phba->cfg_topology == FLAGS_LOCAL_LB)
2e0fef85 934 phba->link_flag |= LS_LOOPBACK_MODE;
5b8bd0c9 935 else
2e0fef85
JS		 936 phba->link_flag &= ~LS_LOOPBACK_MODE;
937}
938
939static inline int
940lpfc_is_link_up(struct lpfc_hba *phba)
941{
942 return phba->link_state == LPFC_LINK_UP ||
92d7f7b0
JS		 943 phba->link_state == LPFC_CLEAR_LA ||
944 phba->link_state == LPFC_HBA_READY;
5b8bd0c9 945}
dea3101e 946
5e9d9b82
JS		 947static inline void
948lpfc_worker_wake_up(struct lpfc_hba *phba)
949{
950 /* Set the lpfc data pending flag */
951 set_bit(LPFC_DATA_READY, &phba->data_flags);
952
953 /* Wake up worker thread */
954 wake_up(&phba->work_waitq);
955 return;
956}
957
9940b97b
JS		 958static inline int
959lpfc_readl(void __iomem *addr, uint32_t *data)
960{
961 uint32_t temp;
962 temp = readl(addr);
963 if (temp == 0xffffffff)
964 return -EIO;
965 *data = temp;
966 return 0;
967}
968
969static inline int
9399627f
JS		 970lpfc_sli_read_hs(struct lpfc_hba *phba)
971{
972 /*
973 * There was a link/board error. Read the status register to retrieve
974 * the error event and process it.
975 */
976 phba->sli.slistat.err_attn_event++;
977
9940b97b
JS		 978 /* Save status info and check for unplug error */
979 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
980 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
981 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
982 return -EIO;
983 }
9399627f
JS		 984
985 /* Clear chip Host Attention error bit */
986 writel(HA_ERATT, phba->HAregaddr);
987 readl(phba->HAregaddr); /* flush */
988 phba->pport->stopped = 1;
989
9940b97b 990 return 0;
9399627f 991}
Linux kernel - Deliverables
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