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[SCSI] lpfc 8.1.11 : Discovery Fixes
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc_init.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
41415862 4 * Copyright (C) 2004-2006 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
dea3101e 22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/idr.h>
26#include <linux/interrupt.h>
27#include <linux/kthread.h>
28#include <linux/pci.h>
29#include <linux/spinlock.h>
30
91886523 31#include <scsi/scsi.h>
dea3101e 32#include <scsi/scsi_device.h>
33#include <scsi/scsi_host.h>
34#include <scsi/scsi_transport_fc.h>
35
36#include "lpfc_hw.h"
37#include "lpfc_sli.h"
38#include "lpfc_disc.h"
39#include "lpfc_scsi.h"
40#include "lpfc.h"
41#include "lpfc_logmsg.h"
42#include "lpfc_crtn.h"
43#include "lpfc_version.h"
44
74b72a59 45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int);
dea3101e 46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
47static int lpfc_post_rcv_buf(struct lpfc_hba *);
48
49static struct scsi_transport_template *lpfc_transport_template = NULL;
50static DEFINE_IDR(lpfc_hba_index);
51
52/************************************************************************/
53/* */
54/* lpfc_config_port_prep */
55/* This routine will do LPFC initialization prior to the */
56/* CONFIG_PORT mailbox command. This will be initialized */
57/* as a SLI layer callback routine. */
58/* This routine returns 0 on success or -ERESTART if it wants */
59/* the SLI layer to reset the HBA and try again. Any */
60/* other return value indicates an error. */
61/* */
62/************************************************************************/
63int
64lpfc_config_port_prep(struct lpfc_hba * phba)
65{
66 lpfc_vpd_t *vp = &phba->vpd;
67 int i = 0, rc;
68 LPFC_MBOXQ_t *pmb;
69 MAILBOX_t *mb;
70 char *lpfc_vpd_data = NULL;
71 uint16_t offset = 0;
72 static char licensed[56] =
73 "key unlock for use with gnu public licensed code only\0";
65a29c16 74 static int init_key = 1;
dea3101e 75
76 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
77 if (!pmb) {
78 phba->hba_state = LPFC_HBA_ERROR;
79 return -ENOMEM;
80 }
81
82 mb = &pmb->mb;
83 phba->hba_state = LPFC_INIT_MBX_CMDS;
84
85 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS		 86 if (init_key) {
87 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 88
65a29c16
JS		 89 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
90 *ptext = cpu_to_be32(*ptext);
91 init_key = 0;
92 }
dea3101e 93
94 lpfc_read_nv(phba, pmb);
95 memset((char*)mb->un.varRDnvp.rsvd3, 0,
96 sizeof (mb->un.varRDnvp.rsvd3));
97 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
98 sizeof (licensed));
99
100 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
101
102 if (rc != MBX_SUCCESS) {
103 lpfc_printf_log(phba,
104 KERN_ERR,
105 LOG_MBOX,
106 "%d:0324 Config Port initialization "
107 "error, mbxCmd x%x READ_NVPARM, "
108 "mbxStatus x%x\n",
109 phba->brd_no,
110 mb->mbxCommand, mb->mbxStatus);
111 mempool_free(pmb, phba->mbox_mem_pool);
112 return -ERESTART;
113 }
114 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
115 sizeof (mb->un.varRDnvp.nodename));
116 }
117
118 /* Setup and issue mailbox READ REV command */
119 lpfc_read_rev(phba, pmb);
120 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
121 if (rc != MBX_SUCCESS) {
122 lpfc_printf_log(phba,
123 KERN_ERR,
124 LOG_INIT,
125 "%d:0439 Adapter failed to init, mbxCmd x%x "
126 "READ_REV, mbxStatus x%x\n",
127 phba->brd_no,
128 mb->mbxCommand, mb->mbxStatus);
129 mempool_free( pmb, phba->mbox_mem_pool);
130 return -ERESTART;
131 }
132
1de933f3
JSEC		 133 /*
134 * The value of rr must be 1 since the driver set the cv field to 1.
135 * This setting requires the FW to set all revision fields.
dea3101e 136 */
1de933f3 137 if (mb->un.varRdRev.rr == 0) {
dea3101e 138 vp->rev.rBit = 0;
1de933f3
JSEC		 139 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
140 "%d:0440 Adapter failed to init, READ_REV has "
141 "missing revision information.\n",
142 phba->brd_no);
dea3101e 143 mempool_free(pmb, phba->mbox_mem_pool);
144 return -ERESTART;
dea3101e 145 }
146
147 /* Save information as VPD data */
1de933f3
JSEC		 148 vp->rev.rBit = 1;
149 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
150 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
151 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
152 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 153 vp->rev.biuRev = mb->un.varRdRev.biuRev;
154 vp->rev.smRev = mb->un.varRdRev.smRev;
155 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
156 vp->rev.endecRev = mb->un.varRdRev.endecRev;
157 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
158 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
159 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
160 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
161 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
162 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
163
164 if (lpfc_is_LC_HBA(phba->pcidev->device))
165 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
166 sizeof (phba->RandomData));
167
dea3101e 168 /* Get adapter VPD information */
169 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
170 if (!pmb->context2)
171 goto out_free_mbox;
172 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
173 if (!lpfc_vpd_data)
174 goto out_free_context2;
175
176 do {
177 lpfc_dump_mem(phba, pmb, offset);
178 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
179
180 if (rc != MBX_SUCCESS) {
181 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
182 "%d:0441 VPD not present on adapter, "
183 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
184 phba->brd_no,
185 mb->mbxCommand, mb->mbxStatus);
74b72a59 186 mb->un.varDmp.word_cnt = 0;
dea3101e 187 }
74b72a59
JW		 188 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
189 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
dea3101e 190 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
191 mb->un.varDmp.word_cnt);
192 offset += mb->un.varDmp.word_cnt;
74b72a59
JW		 193 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
194 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e 195
196 kfree(lpfc_vpd_data);
197out_free_context2:
198 kfree(pmb->context2);
199out_free_mbox:
200 mempool_free(pmb, phba->mbox_mem_pool);
201 return 0;
202}
203
204/************************************************************************/
205/* */
206/* lpfc_config_port_post */
207/* This routine will do LPFC initialization after the */
208/* CONFIG_PORT mailbox command. This will be initialized */
209/* as a SLI layer callback routine. */
210/* This routine returns 0 on success. Any other return value */
211/* indicates an error. */
212/* */
213/************************************************************************/
214int
215lpfc_config_port_post(struct lpfc_hba * phba)
216{
217 LPFC_MBOXQ_t *pmb;
218 MAILBOX_t *mb;
219 struct lpfc_dmabuf *mp;
220 struct lpfc_sli *psli = &phba->sli;
221 uint32_t status, timeout;
222 int i, j, rc;
223
224 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb) {
226 phba->hba_state = LPFC_HBA_ERROR;
227 return -ENOMEM;
228 }
229 mb = &pmb->mb;
230
231 lpfc_config_link(phba, pmb);
232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233 if (rc != MBX_SUCCESS) {
234 lpfc_printf_log(phba,
235 KERN_ERR,
236 LOG_INIT,
237 "%d:0447 Adapter failed init, mbxCmd x%x "
238 "CONFIG_LINK mbxStatus x%x\n",
239 phba->brd_no,
240 mb->mbxCommand, mb->mbxStatus);
241 phba->hba_state = LPFC_HBA_ERROR;
242 mempool_free( pmb, phba->mbox_mem_pool);
243 return -EIO;
244 }
245
246 /* Get login parameters for NID. */
247 lpfc_read_sparam(phba, pmb);
248 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
249 lpfc_printf_log(phba,
250 KERN_ERR,
251 LOG_INIT,
252 "%d:0448 Adapter failed init, mbxCmd x%x "
253 "READ_SPARM mbxStatus x%x\n",
254 phba->brd_no,
255 mb->mbxCommand, mb->mbxStatus);
256 phba->hba_state = LPFC_HBA_ERROR;
257 mp = (struct lpfc_dmabuf *) pmb->context1;
258 mempool_free( pmb, phba->mbox_mem_pool);
259 lpfc_mbuf_free(phba, mp->virt, mp->phys);
260 kfree(mp);
261 return -EIO;
262 }
263
264 mp = (struct lpfc_dmabuf *) pmb->context1;
265
266 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
267 lpfc_mbuf_free(phba, mp->virt, mp->phys);
268 kfree(mp);
269 pmb->context1 = NULL;
270
c3f28afa
JS		 271 if (phba->cfg_soft_wwpn)
272 u64_to_wwn(phba->cfg_soft_wwpn, phba->fc_sparam.portName.u.wwn);
dea3101e 273 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
274 sizeof (struct lpfc_name));
275 memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
276 sizeof (struct lpfc_name));
277 /* If no serial number in VPD data, use low 6 bytes of WWNN */
278 /* This should be consolidated into parse_vpd ? - mr */
279 if (phba->SerialNumber[0] == 0) {
280 uint8_t *outptr;
281
68ce1eb5 282 outptr = &phba->fc_nodename.u.s.IEEE[0];
dea3101e 283 for (i = 0; i < 12; i++) {
284 status = *outptr++;
285 j = ((status & 0xf0) >> 4);
286 if (j <= 9)
287 phba->SerialNumber[i] =
288 (char)((uint8_t) 0x30 + (uint8_t) j);
289 else
290 phba->SerialNumber[i] =
291 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
292 i++;
293 j = (status & 0xf);
294 if (j <= 9)
295 phba->SerialNumber[i] =
296 (char)((uint8_t) 0x30 + (uint8_t) j);
297 else
298 phba->SerialNumber[i] =
299 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
300 }
301 }
302
dea3101e 303 lpfc_read_config(phba, pmb);
304 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
305 lpfc_printf_log(phba,
306 KERN_ERR,
307 LOG_INIT,
308 "%d:0453 Adapter failed to init, mbxCmd x%x "
309 "READ_CONFIG, mbxStatus x%x\n",
310 phba->brd_no,
311 mb->mbxCommand, mb->mbxStatus);
312 phba->hba_state = LPFC_HBA_ERROR;
313 mempool_free( pmb, phba->mbox_mem_pool);
314 return -EIO;
315 }
316
317 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
318 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
319 phba->cfg_hba_queue_depth =
320 mb->un.varRdConfig.max_xri + 1;
321
322 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW		 323
324 /* Get the default values for Model Name and Description */
325 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
326
327 if ((phba->cfg_link_speed > LINK_SPEED_10G)
328 || ((phba->cfg_link_speed == LINK_SPEED_1G)
329 && !(phba->lmt & LMT_1Gb))
330 || ((phba->cfg_link_speed == LINK_SPEED_2G)
331 && !(phba->lmt & LMT_2Gb))
332 || ((phba->cfg_link_speed == LINK_SPEED_4G)
333 && !(phba->lmt & LMT_4Gb))
334 || ((phba->cfg_link_speed == LINK_SPEED_8G)
335 && !(phba->lmt & LMT_8Gb))
336 || ((phba->cfg_link_speed == LINK_SPEED_10G)
337 && !(phba->lmt & LMT_10Gb))) {
338 /* Reset link speed to auto */
dea3101e 339 lpfc_printf_log(phba,
340 KERN_WARNING,
341 LOG_LINK_EVENT,
342 "%d:1302 Invalid speed for this board: "
343 "Reset link speed to auto: x%x\n",
344 phba->brd_no,
345 phba->cfg_link_speed);
346 phba->cfg_link_speed = LINK_SPEED_AUTO;
347 }
348
349 phba->hba_state = LPFC_LINK_DOWN;
350
351 /* Only process IOCBs on ring 0 till hba_state is READY */
352 if (psli->ring[psli->ip_ring].cmdringaddr)
353 psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT;
354 if (psli->ring[psli->fcp_ring].cmdringaddr)
355 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
356 if (psli->ring[psli->next_ring].cmdringaddr)
357 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
358
359 /* Post receive buffers for desired rings */
360 lpfc_post_rcv_buf(phba);
361
362 /* Enable appropriate host interrupts */
363 spin_lock_irq(phba->host->host_lock);
364 status = readl(phba->HCregaddr);
365 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
366 if (psli->num_rings > 0)
367 status |= HC_R0INT_ENA;
368 if (psli->num_rings > 1)
369 status |= HC_R1INT_ENA;
370 if (psli->num_rings > 2)
371 status |= HC_R2INT_ENA;
372 if (psli->num_rings > 3)
373 status |= HC_R3INT_ENA;
374
875fbdfe
JSEC		 375 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
376 (phba->cfg_poll & DISABLE_FCP_RING_INT))
377 status &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
378
dea3101e 379 writel(status, phba->HCregaddr);
380 readl(phba->HCregaddr); /* flush */
381 spin_unlock_irq(phba->host->host_lock);
382
383 /*
384 * Setup the ring 0 (els) timeout handler
385 */
386 timeout = phba->fc_ratov << 1;
387 phba->els_tmofunc.expires = jiffies + HZ * timeout;
388 add_timer(&phba->els_tmofunc);
389
390 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
391 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
8aee918a
JS		 392 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
393 if (rc != MBX_SUCCESS) {
dea3101e 394 lpfc_printf_log(phba,
395 KERN_ERR,
396 LOG_INIT,
397 "%d:0454 Adapter failed to init, mbxCmd x%x "
398 "INIT_LINK, mbxStatus x%x\n",
399 phba->brd_no,
400 mb->mbxCommand, mb->mbxStatus);
401
402 /* Clear all interrupt enable conditions */
403 writel(0, phba->HCregaddr);
404 readl(phba->HCregaddr); /* flush */
405 /* Clear all pending interrupts */
406 writel(0xffffffff, phba->HAregaddr);
407 readl(phba->HAregaddr); /* flush */
408
409 phba->hba_state = LPFC_HBA_ERROR;
8aee918a
JS		 410 if (rc != MBX_BUSY)
411 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 412 return -EIO;
413 }
414 /* MBOX buffer will be freed in mbox compl */
415
ce8b3ce5
JS		 416 return (0);
417}
418
419static int
420lpfc_discovery_wait(struct lpfc_hba *phba)
421{
422 int i = 0;
423
dea3101e 424 while ((phba->hba_state != LPFC_HBA_READY) ||
425 (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
426 ((phba->fc_map_cnt == 0) && (i<2)) ||
ce8b3ce5 427 (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
dea3101e 428 /* Check every second for 30 retries. */
429 i++;
430 if (i > 30) {
ce8b3ce5 431 return -ETIMEDOUT;
dea3101e 432 }
433 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
434 /* The link is down. Set linkdown timeout */
ce8b3ce5 435 return -ETIMEDOUT;
dea3101e 436 }
437
438 /* Delay for 1 second to give discovery time to complete. */
439 msleep(1000);
440
441 }
442
ce8b3ce5 443 return 0;
dea3101e 444}
445
446/************************************************************************/
447/* */
448/* lpfc_hba_down_prep */
449/* This routine will do LPFC uninitialization before the */
450/* HBA is reset when bringing down the SLI Layer. This will be */
451/* initialized as a SLI layer callback routine. */
452/* This routine returns 0 on success. Any other return value */
453/* indicates an error. */
454/* */
455/************************************************************************/
456int
457lpfc_hba_down_prep(struct lpfc_hba * phba)
458{
459 /* Disable interrupts */
460 writel(0, phba->HCregaddr);
461 readl(phba->HCregaddr); /* flush */
462
463 /* Cleanup potential discovery resources */
464 lpfc_els_flush_rscn(phba);
465 lpfc_els_flush_cmd(phba);
466 lpfc_disc_flush_list(phba);
467
468 return (0);
469}
470
41415862
JW		 471/************************************************************************/
472/* */
473/* lpfc_hba_down_post */
474/* This routine will do uninitialization after the HBA is reset */
475/* when bringing down the SLI Layer. */
476/* This routine returns 0 on success. Any other return value */
477/* indicates an error. */
478/* */
479/************************************************************************/
480int
481lpfc_hba_down_post(struct lpfc_hba * phba)
482{
483 struct lpfc_sli *psli = &phba->sli;
484 struct lpfc_sli_ring *pring;
485 struct lpfc_dmabuf *mp, *next_mp;
486 int i;
487
488 /* Cleanup preposted buffers on the ELS ring */
489 pring = &psli->ring[LPFC_ELS_RING];
490 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
491 list_del(&mp->list);
492 pring->postbufq_cnt--;
493 lpfc_mbuf_free(phba, mp->virt, mp->phys);
494 kfree(mp);
495 }
496
497 for (i = 0; i < psli->num_rings; i++) {
498 pring = &psli->ring[i];
499 lpfc_sli_abort_iocb_ring(phba, pring);
500 }
501
502 return 0;
503}
504
dea3101e 505/************************************************************************/
506/* */
507/* lpfc_handle_eratt */
508/* This routine will handle processing a Host Attention */
509/* Error Status event. This will be initialized */
510/* as a SLI layer callback routine. */
511/* */
512/************************************************************************/
513void
514lpfc_handle_eratt(struct lpfc_hba * phba)
515{
516 struct lpfc_sli *psli = &phba->sli;
517 struct lpfc_sli_ring *pring;
d2873e4c 518 uint32_t event_data;
dea3101e 519
dea3101e 520 if (phba->work_hs & HS_FFER6) {
521 /* Re-establishing Link */
522 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
523 "%d:1301 Re-establishing Link "
524 "Data: x%x x%x x%x\n",
525 phba->brd_no, phba->work_hs,
526 phba->work_status[0], phba->work_status[1]);
527 spin_lock_irq(phba->host->host_lock);
528 phba->fc_flag |= FC_ESTABLISH_LINK;
9290831f 529 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
dea3101e 530 spin_unlock_irq(phba->host->host_lock);
531
532 /*
533 * Firmware stops when it triggled erratt with HS_FFER6.
534 * That could cause the I/Os dropped by the firmware.
535 * Error iocb (I/O) on txcmplq and let the SCSI layer
536 * retry it after re-establishing link.
537 */
538 pring = &psli->ring[psli->fcp_ring];
539 lpfc_sli_abort_iocb_ring(phba, pring);
540
541
542 /*
543 * There was a firmware error. Take the hba offline and then
544 * attempt to restart it.
545 */
546 lpfc_offline(phba);
41415862 547 lpfc_sli_brdrestart(phba);
dea3101e 548 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
549 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
550 return;
551 }
552 } else {
553 /* The if clause above forces this code path when the status
554 * failure is a value other than FFER6. Do not call the offline
555 * twice. This is the adapter hardware error path.
556 */
557 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
558 "%d:0457 Adapter Hardware Error "
559 "Data: x%x x%x x%x\n",
560 phba->brd_no, phba->work_hs,
561 phba->work_status[0], phba->work_status[1]);
562
d2873e4c
JS		 563 event_data = FC_REG_DUMP_EVENT;
564 fc_host_post_vendor_event(phba->host, fc_get_event_number(),
565 sizeof(event_data), (char *) &event_data,
566 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
567
9290831f 568 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
dea3101e 569 lpfc_offline(phba);
41415862
JW		 570 phba->hba_state = LPFC_HBA_ERROR;
571 lpfc_hba_down_post(phba);
dea3101e 572 }
573}
574
575/************************************************************************/
576/* */
577/* lpfc_handle_latt */
578/* This routine will handle processing a Host Attention */
579/* Link Status event. This will be initialized */
580/* as a SLI layer callback routine. */
581/* */
582/************************************************************************/
583void
584lpfc_handle_latt(struct lpfc_hba * phba)
585{
586 struct lpfc_sli *psli = &phba->sli;
587 LPFC_MBOXQ_t *pmb;
588 volatile uint32_t control;
589 struct lpfc_dmabuf *mp;
590 int rc = -ENOMEM;
591
592 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
593 if (!pmb)
594 goto lpfc_handle_latt_err_exit;
595
596 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
597 if (!mp)
598 goto lpfc_handle_latt_free_pmb;
599
600 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
601 if (!mp->virt)
602 goto lpfc_handle_latt_free_mp;
603
604 rc = -EIO;
605
6281bfe0
JSEC		 606 /* Cleanup any outstanding ELS commands */
607 lpfc_els_flush_cmd(phba);
dea3101e 608
609 psli->slistat.link_event++;
610 lpfc_read_la(phba, pmb, mp);
611 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
612 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
613 if (rc == MBX_NOT_FINISHED)
614 goto lpfc_handle_latt_free_mp;
615
616 /* Clear Link Attention in HA REG */
617 spin_lock_irq(phba->host->host_lock);
618 writel(HA_LATT, phba->HAregaddr);
619 readl(phba->HAregaddr); /* flush */
620 spin_unlock_irq(phba->host->host_lock);
621
622 return;
623
624lpfc_handle_latt_free_mp:
625 kfree(mp);
626lpfc_handle_latt_free_pmb:
627 kfree(pmb);
628lpfc_handle_latt_err_exit:
629 /* Enable Link attention interrupts */
630 spin_lock_irq(phba->host->host_lock);
631 psli->sli_flag |= LPFC_PROCESS_LA;
632 control = readl(phba->HCregaddr);
633 control |= HC_LAINT_ENA;
634 writel(control, phba->HCregaddr);
635 readl(phba->HCregaddr); /* flush */
636
637 /* Clear Link Attention in HA REG */
638 writel(HA_LATT, phba->HAregaddr);
639 readl(phba->HAregaddr); /* flush */
640 spin_unlock_irq(phba->host->host_lock);
641 lpfc_linkdown(phba);
642 phba->hba_state = LPFC_HBA_ERROR;
643
644 /* The other case is an error from issue_mbox */
645 if (rc == -ENOMEM)
646 lpfc_printf_log(phba,
647 KERN_WARNING,
648 LOG_MBOX,
649 "%d:0300 READ_LA: no buffers\n",
650 phba->brd_no);
651
652 return;
653}
654
655/************************************************************************/
656/* */
657/* lpfc_parse_vpd */
658/* This routine will parse the VPD data */
659/* */
660/************************************************************************/
661static int
74b72a59 662lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd, int len)
dea3101e 663{
664 uint8_t lenlo, lenhi;
665 uint32_t Length;
666 int i, j;
667 int finished = 0;
668 int index = 0;
669
670 if (!vpd)
671 return 0;
672
673 /* Vital Product */
674 lpfc_printf_log(phba,
675 KERN_INFO,
676 LOG_INIT,
677 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
678 phba->brd_no,
679 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
680 (uint32_t) vpd[3]);
74b72a59 681 while (!finished && (index < (len - 4))) {
dea3101e 682 switch (vpd[index]) {
683 case 0x82:
74b72a59 684 case 0x91:
dea3101e 685 index += 1;
686 lenlo = vpd[index];
687 index += 1;
688 lenhi = vpd[index];
689 index += 1;
690 i = ((((unsigned short)lenhi) << 8) + lenlo);
691 index += i;
692 break;
693 case 0x90:
694 index += 1;
695 lenlo = vpd[index];
696 index += 1;
697 lenhi = vpd[index];
698 index += 1;
699 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW		 700 if (Length > len - index)
701 Length = len - index;
dea3101e 702 while (Length > 0) {
703 /* Look for Serial Number */
704 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
705 index += 2;
706 i = vpd[index];
707 index += 1;
708 j = 0;
709 Length -= (3+i);
710 while(i--) {
711 phba->SerialNumber[j++] = vpd[index++];
712 if (j == 31)
713 break;
714 }
715 phba->SerialNumber[j] = 0;
716 continue;
717 }
718 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
719 phba->vpd_flag |= VPD_MODEL_DESC;
720 index += 2;
721 i = vpd[index];
722 index += 1;
723 j = 0;
724 Length -= (3+i);
725 while(i--) {
726 phba->ModelDesc[j++] = vpd[index++];
727 if (j == 255)
728 break;
729 }
730 phba->ModelDesc[j] = 0;
731 continue;
732 }
733 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
734 phba->vpd_flag |= VPD_MODEL_NAME;
735 index += 2;
736 i = vpd[index];
737 index += 1;
738 j = 0;
739 Length -= (3+i);
740 while(i--) {
741 phba->ModelName[j++] = vpd[index++];
742 if (j == 79)
743 break;
744 }
745 phba->ModelName[j] = 0;
746 continue;
747 }
748 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
749 phba->vpd_flag |= VPD_PROGRAM_TYPE;
750 index += 2;
751 i = vpd[index];
752 index += 1;
753 j = 0;
754 Length -= (3+i);
755 while(i--) {
756 phba->ProgramType[j++] = vpd[index++];
757 if (j == 255)
758 break;
759 }
760 phba->ProgramType[j] = 0;
761 continue;
762 }
763 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
764 phba->vpd_flag |= VPD_PORT;
765 index += 2;
766 i = vpd[index];
767 index += 1;
768 j = 0;
769 Length -= (3+i);
770 while(i--) {
771 phba->Port[j++] = vpd[index++];
772 if (j == 19)
773 break;
774 }
775 phba->Port[j] = 0;
776 continue;
777 }
778 else {
779 index += 2;
780 i = vpd[index];
781 index += 1;
782 index += i;
783 Length -= (3 + i);
784 }
785 }
786 finished = 0;
787 break;
788 case 0x78:
789 finished = 1;
790 break;
791 default:
792 index ++;
793 break;
794 }
74b72a59 795 }
dea3101e 796
797 return(1);
798}
799
800static void
801lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
802{
803 lpfc_vpd_t *vp;
fefcb2b6
JSEC		 804 uint16_t dev_id = phba->pcidev->device;
805 uint16_t dev_subid = phba->pcidev->subsystem_device;
719396b4 806 uint8_t hdrtype;
74b72a59 807 int max_speed;
719396b4 808 char * ports;
74b72a59
JW		 809 struct {
810 char * name;
811 int max_speed;
812 char * ports;
813 char * bus;
071fbd3d 814 } m = {"<Unknown>", 0, "", ""};
74b72a59 815
719396b4
JW		 816 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
817 ports = (hdrtype == 0x80) ? "2-port " : "";
74b72a59
JW		 818 if (mdp && mdp[0] != '\0'
819 && descp && descp[0] != '\0')
820 return;
821
822 if (phba->lmt & LMT_10Gb)
823 max_speed = 10;
824 else if (phba->lmt & LMT_8Gb)
825 max_speed = 8;
826 else if (phba->lmt & LMT_4Gb)
827 max_speed = 4;
828 else if (phba->lmt & LMT_2Gb)
829 max_speed = 2;
830 else
831 max_speed = 1;
dea3101e 832
833 vp = &phba->vpd;
dea3101e 834
e4adb204 835 switch (dev_id) {
06325e74 836 case PCI_DEVICE_ID_FIREFLY:
74b72a59 837 m = (typeof(m)){"LP6000", max_speed, "", "PCI"};
06325e74 838 break;
dea3101e 839 case PCI_DEVICE_ID_SUPERFLY:
840 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
74b72a59 841 m = (typeof(m)){"LP7000", max_speed, "", "PCI"};
dea3101e 842 else
74b72a59 843 m = (typeof(m)){"LP7000E", max_speed, "", "PCI"};
dea3101e 844 break;
845 case PCI_DEVICE_ID_DRAGONFLY:
74b72a59 846 m = (typeof(m)){"LP8000", max_speed, "", "PCI"};
dea3101e 847 break;
848 case PCI_DEVICE_ID_CENTAUR:
849 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
74b72a59 850 m = (typeof(m)){"LP9002", max_speed, "", "PCI"};
dea3101e 851 else
74b72a59 852 m = (typeof(m)){"LP9000", max_speed, "", "PCI"};
dea3101e 853 break;
854 case PCI_DEVICE_ID_RFLY:
74b72a59 855 m = (typeof(m)){"LP952", max_speed, "", "PCI"};
dea3101e 856 break;
857 case PCI_DEVICE_ID_PEGASUS:
74b72a59 858 m = (typeof(m)){"LP9802", max_speed, "", "PCI-X"};
dea3101e 859 break;
860 case PCI_DEVICE_ID_THOR:
964b77e7 861 if (hdrtype == 0x80)
74b72a59
JW		 862 m = (typeof(m)){"LP10000DC",
863 max_speed, ports, "PCI-X"};
964b77e7 864 else
74b72a59
JW		 865 m = (typeof(m)){"LP10000",
866 max_speed, ports, "PCI-X"};
dea3101e 867 break;
868 case PCI_DEVICE_ID_VIPER:
74b72a59 869 m = (typeof(m)){"LPX1000", max_speed, "", "PCI-X"};
dea3101e 870 break;
871 case PCI_DEVICE_ID_PFLY:
74b72a59 872 m = (typeof(m)){"LP982", max_speed, "", "PCI-X"};
dea3101e 873 break;
874 case PCI_DEVICE_ID_TFLY:
964b77e7 875 if (hdrtype == 0x80)
74b72a59 876 m = (typeof(m)){"LP1050DC", max_speed, ports, "PCI-X"};
964b77e7 877 else
74b72a59 878 m = (typeof(m)){"LP1050", max_speed, ports, "PCI-X"};
dea3101e 879 break;
880 case PCI_DEVICE_ID_HELIOS:
964b77e7 881 if (hdrtype == 0x80)
74b72a59 882 m = (typeof(m)){"LP11002", max_speed, ports, "PCI-X2"};
964b77e7 883 else
74b72a59 884 m = (typeof(m)){"LP11000", max_speed, ports, "PCI-X2"};
dea3101e 885 break;
e4adb204 886 case PCI_DEVICE_ID_HELIOS_SCSP:
74b72a59 887 m = (typeof(m)){"LP11000-SP", max_speed, ports, "PCI-X2"};
e4adb204
JSEC		 888 break;
889 case PCI_DEVICE_ID_HELIOS_DCSP:
74b72a59 890 m = (typeof(m)){"LP11002-SP", max_speed, ports, "PCI-X2"};
e4adb204
JSEC		 891 break;
892 case PCI_DEVICE_ID_NEPTUNE:
893 if (hdrtype == 0x80)
74b72a59 894 m = (typeof(m)){"LPe1002", max_speed, ports, "PCIe"};
e4adb204 895 else
74b72a59 896 m = (typeof(m)){"LPe1000", max_speed, ports, "PCIe"};
e4adb204
JSEC		 897 break;
898 case PCI_DEVICE_ID_NEPTUNE_SCSP:
74b72a59 899 m = (typeof(m)){"LPe1000-SP", max_speed, ports, "PCIe"};
e4adb204
JSEC		 900 break;
901 case PCI_DEVICE_ID_NEPTUNE_DCSP:
74b72a59 902 m = (typeof(m)){"LPe1002-SP", max_speed, ports, "PCIe"};
e4adb204 903 break;
dea3101e 904 case PCI_DEVICE_ID_BMID:
74b72a59 905 m = (typeof(m)){"LP1150", max_speed, ports, "PCI-X2"};
dea3101e 906 break;
907 case PCI_DEVICE_ID_BSMB:
74b72a59 908 m = (typeof(m)){"LP111", max_speed, ports, "PCI-X2"};
dea3101e 909 break;
910 case PCI_DEVICE_ID_ZEPHYR:
964b77e7 911 if (hdrtype == 0x80)
74b72a59 912 m = (typeof(m)){"LPe11002", max_speed, ports, "PCIe"};
964b77e7 913 else
74b72a59 914 m = (typeof(m)){"LPe11000", max_speed, ports, "PCIe"};
dea3101e 915 break;
e4adb204 916 case PCI_DEVICE_ID_ZEPHYR_SCSP:
74b72a59 917 m = (typeof(m)){"LPe11000", max_speed, ports, "PCIe"};
e4adb204
JSEC		 918 break;
919 case PCI_DEVICE_ID_ZEPHYR_DCSP:
74b72a59 920 m = (typeof(m)){"LPe11002-SP", max_speed, ports, "PCIe"};
e4adb204 921 break;
dea3101e 922 case PCI_DEVICE_ID_ZMID:
74b72a59 923 m = (typeof(m)){"LPe1150", max_speed, ports, "PCIe"};
dea3101e 924 break;
925 case PCI_DEVICE_ID_ZSMB:
74b72a59 926 m = (typeof(m)){"LPe111", max_speed, ports, "PCIe"};
dea3101e 927 break;
928 case PCI_DEVICE_ID_LP101:
74b72a59 929 m = (typeof(m)){"LP101", max_speed, ports, "PCI-X"};
dea3101e 930 break;
931 case PCI_DEVICE_ID_LP10000S:
74b72a59 932 m = (typeof(m)){"LP10000-S", max_speed, ports, "PCI"};
06325e74 933 break;
e4adb204 934 case PCI_DEVICE_ID_LP11000S:
e4adb204 935 case PCI_DEVICE_ID_LPE11000S:
5cc36b3c
JSEC		 936 switch (dev_subid) {
937 case PCI_SUBSYSTEM_ID_LP11000S:
74b72a59
JW		 938 m = (typeof(m)){"LP11000-S", max_speed,
939 ports, "PCI-X2"};
5cc36b3c
JSEC		 940 break;
941 case PCI_SUBSYSTEM_ID_LP11002S:
74b72a59
JW		 942 m = (typeof(m)){"LP11002-S", max_speed,
943 ports, "PCI-X2"};
5cc36b3c
JSEC		 944 break;
945 case PCI_SUBSYSTEM_ID_LPE11000S:
74b72a59
JW		 946 m = (typeof(m)){"LPe11000-S", max_speed,
947 ports, "PCIe"};
5cc36b3c
JSEC		 948 break;
949 case PCI_SUBSYSTEM_ID_LPE11002S:
74b72a59
JW		 950 m = (typeof(m)){"LPe11002-S", max_speed,
951 ports, "PCIe"};
5cc36b3c
JSEC		 952 break;
953 case PCI_SUBSYSTEM_ID_LPE11010S:
74b72a59
JW		 954 m = (typeof(m)){"LPe11010-S", max_speed,
955 "10-port ", "PCIe"};
5cc36b3c
JSEC		 956 break;
957 default:
041976fb 958 m = (typeof(m)){ NULL };
5cc36b3c
JSEC		 959 break;
960 }
961 break;
962 default:
041976fb 963 m = (typeof(m)){ NULL };
e4adb204 964 break;
dea3101e 965 }
74b72a59
JW		 966
967 if (mdp && mdp[0] == '\0')
968 snprintf(mdp, 79,"%s", m.name);
969 if (descp && descp[0] == '\0')
970 snprintf(descp, 255,
971 "Emulex %s %dGb %s%s Fibre Channel Adapter",
972 m.name, m.max_speed, m.ports, m.bus);
dea3101e 973}
974
975/**************************************************/
976/* lpfc_post_buffer */
977/* */
978/* This routine will post count buffers to the */
979/* ring with the QUE_RING_BUF_CN command. This */
980/* allows 3 buffers / command to be posted. */
981/* Returns the number of buffers NOT posted. */
982/**************************************************/
983int
984lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
985 int type)
986{
987 IOCB_t *icmd;
0bd4ca25 988 struct lpfc_iocbq *iocb;
dea3101e 989 struct lpfc_dmabuf *mp1, *mp2;
990
991 cnt += pring->missbufcnt;
992
993 /* While there are buffers to post */
994 while (cnt > 0) {
995 /* Allocate buffer for command iocb */
996 spin_lock_irq(phba->host->host_lock);
0bd4ca25 997 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 998 spin_unlock_irq(phba->host->host_lock);
999 if (iocb == NULL) {
1000 pring->missbufcnt = cnt;
1001 return cnt;
1002 }
dea3101e 1003 icmd = &iocb->iocb;
1004
1005 /* 2 buffers can be posted per command */
1006 /* Allocate buffer to post */
1007 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
1008 if (mp1)
1009 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
1010 &mp1->phys);
1011 if (mp1 == 0 || mp1->virt == 0) {
c9475cb0 1012 kfree(mp1);
dea3101e 1013 spin_lock_irq(phba->host->host_lock);
604a3e30 1014 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1015 spin_unlock_irq(phba->host->host_lock);
1016 pring->missbufcnt = cnt;
1017 return cnt;
1018 }
1019
1020 INIT_LIST_HEAD(&mp1->list);
1021 /* Allocate buffer to post */
1022 if (cnt > 1) {
1023 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
1024 if (mp2)
1025 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
1026 &mp2->phys);
1027 if (mp2 == 0 || mp2->virt == 0) {
c9475cb0 1028 kfree(mp2);
dea3101e 1029 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
1030 kfree(mp1);
1031 spin_lock_irq(phba->host->host_lock);
604a3e30 1032 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1033 spin_unlock_irq(phba->host->host_lock);
1034 pring->missbufcnt = cnt;
1035 return cnt;
1036 }
1037
1038 INIT_LIST_HEAD(&mp2->list);
1039 } else {
1040 mp2 = NULL;
1041 }
1042
1043 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
1044 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
1045 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
1046 icmd->ulpBdeCount = 1;
1047 cnt--;
1048 if (mp2) {
1049 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
1050 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
1051 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
1052 cnt--;
1053 icmd->ulpBdeCount = 2;
1054 }
1055
1056 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
1057 icmd->ulpLe = 1;
1058
1059 spin_lock_irq(phba->host->host_lock);
1060 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
1061 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
1062 kfree(mp1);
1063 cnt++;
1064 if (mp2) {
1065 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
1066 kfree(mp2);
1067 cnt++;
1068 }
604a3e30 1069 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1070 pring->missbufcnt = cnt;
1071 spin_unlock_irq(phba->host->host_lock);
1072 return cnt;
1073 }
1074 spin_unlock_irq(phba->host->host_lock);
1075 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
1076 if (mp2) {
1077 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
1078 }
1079 }
1080 pring->missbufcnt = 0;
1081 return 0;
1082}
1083
1084/************************************************************************/
1085/* */
1086/* lpfc_post_rcv_buf */
1087/* This routine post initial rcv buffers to the configured rings */
1088/* */
1089/************************************************************************/
1090static int
1091lpfc_post_rcv_buf(struct lpfc_hba * phba)
1092{
1093 struct lpfc_sli *psli = &phba->sli;
1094
1095 /* Ring 0, ELS / CT buffers */
1096 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
1097 /* Ring 2 - FCP no buffers needed */
1098
1099 return 0;
1100}
1101
1102#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
1103
1104/************************************************************************/
1105/* */
1106/* lpfc_sha_init */
1107/* */
1108/************************************************************************/
1109static void
1110lpfc_sha_init(uint32_t * HashResultPointer)
1111{
1112 HashResultPointer[0] = 0x67452301;
1113 HashResultPointer[1] = 0xEFCDAB89;
1114 HashResultPointer[2] = 0x98BADCFE;
1115 HashResultPointer[3] = 0x10325476;
1116 HashResultPointer[4] = 0xC3D2E1F0;
1117}
1118
1119/************************************************************************/
1120/* */
1121/* lpfc_sha_iterate */
1122/* */
1123/************************************************************************/
1124static void
1125lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
1126{
1127 int t;
1128 uint32_t TEMP;
1129 uint32_t A, B, C, D, E;
1130 t = 16;
1131 do {
1132 HashWorkingPointer[t] =
1133 S(1,
1134 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
1135 8] ^
1136 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
1137 } while (++t <= 79);
1138 t = 0;
1139 A = HashResultPointer[0];
1140 B = HashResultPointer[1];
1141 C = HashResultPointer[2];
1142 D = HashResultPointer[3];
1143 E = HashResultPointer[4];
1144
1145 do {
1146 if (t < 20) {
1147 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
1148 } else if (t < 40) {
1149 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
1150 } else if (t < 60) {
1151 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
1152 } else {
1153 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
1154 }
1155 TEMP += S(5, A) + E + HashWorkingPointer[t];
1156 E = D;
1157 D = C;
1158 C = S(30, B);
1159 B = A;
1160 A = TEMP;
1161 } while (++t <= 79);
1162
1163 HashResultPointer[0] += A;
1164 HashResultPointer[1] += B;
1165 HashResultPointer[2] += C;
1166 HashResultPointer[3] += D;
1167 HashResultPointer[4] += E;
1168
1169}
1170
1171/************************************************************************/
1172/* */
1173/* lpfc_challenge_key */
1174/* */
1175/************************************************************************/
1176static void
1177lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
1178{
1179 *HashWorking = (*RandomChallenge ^ *HashWorking);
1180}
1181
1182/************************************************************************/
1183/* */
1184/* lpfc_hba_init */
1185/* */
1186/************************************************************************/
1187void
1188lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
1189{
1190 int t;
1191 uint32_t *HashWorking;
1192 uint32_t *pwwnn = phba->wwnn;
1193
1194 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL);
1195 if (!HashWorking)
1196 return;
1197
1198 memset(HashWorking, 0, (80 * sizeof(uint32_t)));
1199 HashWorking[0] = HashWorking[78] = *pwwnn++;
1200 HashWorking[1] = HashWorking[79] = *pwwnn;
1201
1202 for (t = 0; t < 7; t++)
1203 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
1204
1205 lpfc_sha_init(hbainit);
1206 lpfc_sha_iterate(hbainit, HashWorking);
1207 kfree(HashWorking);
1208}
1209
1210static void
1211lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind)
1212{
1213 struct lpfc_nodelist *ndlp, *next_ndlp;
1214
1215 /* clean up phba - lpfc specific */
1216 lpfc_can_disctmo(phba);
1217 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
1218 nlp_listp) {
1219 lpfc_nlp_remove(phba, ndlp);
1220 }
1221
1222 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
1223 nlp_listp) {
1224 lpfc_nlp_remove(phba, ndlp);
1225 }
1226
1227 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
1228 nlp_listp) {
1229 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
1230 }
1231
1232 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
1233 nlp_listp) {
1234 lpfc_nlp_remove(phba, ndlp);
1235 }
1236
1237 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
1238 nlp_listp) {
1239 lpfc_nlp_remove(phba, ndlp);
1240 }
1241
1242 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list,
1243 nlp_listp) {
1244 lpfc_nlp_remove(phba, ndlp);
1245 }
1246
1247 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
1248 nlp_listp) {
1249 lpfc_nlp_remove(phba, ndlp);
1250 }
1251
1252 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
1253 nlp_listp) {
1254 lpfc_nlp_remove(phba, ndlp);
1255 }
1256
1257 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1258 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1259 INIT_LIST_HEAD(&phba->fc_unused_list);
1260 INIT_LIST_HEAD(&phba->fc_plogi_list);
1261 INIT_LIST_HEAD(&phba->fc_adisc_list);
1262 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1263 INIT_LIST_HEAD(&phba->fc_prli_list);
1264 INIT_LIST_HEAD(&phba->fc_npr_list);
1265
1266 phba->fc_map_cnt = 0;
1267 phba->fc_unmap_cnt = 0;
1268 phba->fc_plogi_cnt = 0;
1269 phba->fc_adisc_cnt = 0;
1270 phba->fc_reglogin_cnt = 0;
1271 phba->fc_prli_cnt = 0;
1272 phba->fc_npr_cnt = 0;
1273 phba->fc_unused_cnt= 0;
1274 return;
1275}
1276
1277static void
1278lpfc_establish_link_tmo(unsigned long ptr)
1279{
1280 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
1281 unsigned long iflag;
1282
1283
1284 /* Re-establishing Link, timer expired */
1285 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
1286 "%d:1300 Re-establishing Link, timer expired "
1287 "Data: x%x x%x\n",
1288 phba->brd_no, phba->fc_flag, phba->hba_state);
1289 spin_lock_irqsave(phba->host->host_lock, iflag);
1290 phba->fc_flag &= ~FC_ESTABLISH_LINK;
1291 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1292}
1293
1294static int
1295lpfc_stop_timer(struct lpfc_hba * phba)
1296{
1297 struct lpfc_sli *psli = &phba->sli;
1298
1299 /* Instead of a timer, this has been converted to a
1300 * deferred procedding list.
1301 */
1302 while (!list_empty(&phba->freebufList)) {
1303
1304 struct lpfc_dmabuf *mp = NULL;
1305
1306 list_remove_head((&phba->freebufList), mp,
1307 struct lpfc_dmabuf, list);
1308 if (mp) {
1309 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1310 kfree(mp);
1311 }
1312 }
1313
875fbdfe 1314 del_timer_sync(&phba->fcp_poll_timer);
dea3101e 1315 del_timer_sync(&phba->fc_estabtmo);
1316 del_timer_sync(&phba->fc_disctmo);
1317 del_timer_sync(&phba->fc_fdmitmo);
1318 del_timer_sync(&phba->els_tmofunc);
1319 psli = &phba->sli;
1320 del_timer_sync(&psli->mbox_tmo);
1321 return(1);
1322}
1323
1324int
1325lpfc_online(struct lpfc_hba * phba)
1326{
1327 if (!phba)
1328 return 0;
1329
1330 if (!(phba->fc_flag & FC_OFFLINE_MODE))
1331 return 0;
1332
1333 lpfc_printf_log(phba,
1334 KERN_WARNING,
1335 LOG_INIT,
1336 "%d:0458 Bring Adapter online\n",
1337 phba->brd_no);
1338
1339 if (!lpfc_sli_queue_setup(phba))
1340 return 1;
1341
1342 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */
1343 return 1;
1344
1345 spin_lock_irq(phba->host->host_lock);
1346 phba->fc_flag &= ~FC_OFFLINE_MODE;
1347 spin_unlock_irq(phba->host->host_lock);
1348
dea3101e 1349 return 0;
1350}
1351
1352int
1353lpfc_offline(struct lpfc_hba * phba)
1354{
1355 struct lpfc_sli_ring *pring;
1356 struct lpfc_sli *psli;
1357 unsigned long iflag;
688a8863
JS		 1358 int i;
1359 int cnt = 0;
dea3101e 1360
1361 if (!phba)
1362 return 0;
1363
1364 if (phba->fc_flag & FC_OFFLINE_MODE)
1365 return 0;
1366
dea3101e 1367 psli = &phba->sli;
dea3101e 1368
1369 lpfc_linkdown(phba);
b4c02652 1370 lpfc_sli_flush_mbox_queue(phba);
dea3101e 1371
688a8863
JS		 1372 for (i = 0; i < psli->num_rings; i++) {
1373 pring = &psli->ring[i];
1374 /* The linkdown event takes 30 seconds to timeout. */
1375 while (pring->txcmplq_cnt) {
1376 mdelay(10);
1377 if (cnt++ > 3000) {
1378 lpfc_printf_log(phba,
1379 KERN_WARNING, LOG_INIT,
1380 "%d:0466 Outstanding IO when "
1381 "bringing Adapter offline\n",
1382 phba->brd_no);
1383 break;
1384 }
1385 }
dea3101e 1386 }
1387
688a8863 1388
dea3101e 1389 /* stop all timers associated with this hba */
1390 lpfc_stop_timer(phba);
1391 phba->work_hba_events = 0;
33ccf8d1 1392 phba->work_ha = 0;
dea3101e 1393
1394 lpfc_printf_log(phba,
1395 KERN_WARNING,
1396 LOG_INIT,
1397 "%d:0460 Bring Adapter offline\n",
1398 phba->brd_no);
1399
1400 /* Bring down the SLI Layer and cleanup. The HBA is offline
1401 now. */
1402 lpfc_sli_hba_down(phba);
1403 lpfc_cleanup(phba, 1);
1404 spin_lock_irqsave(phba->host->host_lock, iflag);
1405 phba->fc_flag |= FC_OFFLINE_MODE;
1406 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1407 return 0;
1408}
1409
1410/******************************************************************************
1411* Function name: lpfc_scsi_free
1412*
1413* Description: Called from lpfc_pci_remove_one free internal driver resources
1414*
1415******************************************************************************/
1416static int
1417lpfc_scsi_free(struct lpfc_hba * phba)
1418{
1419 struct lpfc_scsi_buf *sb, *sb_next;
1420 struct lpfc_iocbq *io, *io_next;
1421
1422 spin_lock_irq(phba->host->host_lock);
1423 /* Release all the lpfc_scsi_bufs maintained by this host. */
1424 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) {
1425 list_del(&sb->list);
1426 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
1427 sb->dma_handle);
1428 kfree(sb);
1429 phba->total_scsi_bufs--;
1430 }
1431
1432 /* Release all the lpfc_iocbq entries maintained by this host. */
1433 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
1434 list_del(&io->list);
1435 kfree(io);
1436 phba->total_iocbq_bufs--;
1437 }
1438
1439 spin_unlock_irq(phba->host->host_lock);
1440
1441 return 0;
1442}
1443
1444
1445static int __devinit
1446lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1447{
1448 struct Scsi_Host *host;
1449 struct lpfc_hba *phba;
1450 struct lpfc_sli *psli;
1451 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
1452 unsigned long bar0map_len, bar2map_len;
1453 int error = -ENODEV, retval;
1454 int i;
604a3e30 1455 uint16_t iotag;
dea3101e 1456
1457 if (pci_enable_device(pdev))
1458 goto out;
1459 if (pci_request_regions(pdev, LPFC_DRIVER_NAME))
1460 goto out_disable_device;
1461
f888ba3c 1462 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba));
dea3101e 1463 if (!host)
1464 goto out_release_regions;
1465
1466 phba = (struct lpfc_hba*)host->hostdata;
1467 memset(phba, 0, sizeof (struct lpfc_hba));
dea3101e 1468 phba->host = host;
1469
1470 phba->fc_flag |= FC_LOADING;
1471 phba->pcidev = pdev;
1472
1473 /* Assign an unused board number */
1474 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL))
1475 goto out_put_host;
1476
1477 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no);
1478 if (error)
1479 goto out_put_host;
1480
1481 host->unique_id = phba->brd_no;
dea3101e 1482 INIT_LIST_HEAD(&phba->ctrspbuflist);
1483 INIT_LIST_HEAD(&phba->rnidrspbuflist);
1484 INIT_LIST_HEAD(&phba->freebufList);
1485
1486 /* Initialize timers used by driver */
1487 init_timer(&phba->fc_estabtmo);
1488 phba->fc_estabtmo.function = lpfc_establish_link_tmo;
1489 phba->fc_estabtmo.data = (unsigned long)phba;
1490 init_timer(&phba->fc_disctmo);
1491 phba->fc_disctmo.function = lpfc_disc_timeout;
1492 phba->fc_disctmo.data = (unsigned long)phba;
1493
1494 init_timer(&phba->fc_fdmitmo);
1495 phba->fc_fdmitmo.function = lpfc_fdmi_tmo;
1496 phba->fc_fdmitmo.data = (unsigned long)phba;
1497 init_timer(&phba->els_tmofunc);
1498 phba->els_tmofunc.function = lpfc_els_timeout;
1499 phba->els_tmofunc.data = (unsigned long)phba;
1500 psli = &phba->sli;
1501 init_timer(&psli->mbox_tmo);
1502 psli->mbox_tmo.function = lpfc_mbox_timeout;
1503 psli->mbox_tmo.data = (unsigned long)phba;
1504
875fbdfe
JSEC		 1505 init_timer(&phba->fcp_poll_timer);
1506 phba->fcp_poll_timer.function = lpfc_poll_timeout;
1507 phba->fcp_poll_timer.data = (unsigned long)phba;
1508
dea3101e 1509 /*
1510 * Get all the module params for configuring this host and then
1511 * establish the host parameters.
1512 */
1513 lpfc_get_cfgparam(phba);
1514
1515 host->max_id = LPFC_MAX_TARGET;
1516 host->max_lun = phba->cfg_max_luns;
1517 host->this_id = -1;
1518
1519 /* Initialize all internally managed lists. */
1520 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1521 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1522 INIT_LIST_HEAD(&phba->fc_unused_list);
1523 INIT_LIST_HEAD(&phba->fc_plogi_list);
1524 INIT_LIST_HEAD(&phba->fc_adisc_list);
1525 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1526 INIT_LIST_HEAD(&phba->fc_prli_list);
1527 INIT_LIST_HEAD(&phba->fc_npr_list);
1528
1529
1530 pci_set_master(pdev);
1531 retval = pci_set_mwi(pdev);
1532 if (retval)
1533 dev_printk(KERN_WARNING, &pdev->dev,
1534 "Warning: pci_set_mwi returned %d\n", retval);
1535
1536 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
1537 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
1538 goto out_idr_remove;
1539
1540 /*
1541 * Get the bus address of Bar0 and Bar2 and the number of bytes
1542 * required by each mapping.
1543 */
1544 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0);
1545 bar0map_len = pci_resource_len(phba->pcidev, 0);
1546
1547 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
1548 bar2map_len = pci_resource_len(phba->pcidev, 2);
1549
901a920f 1550 /* Map HBA SLIM to a kernel virtual address. */
dea3101e 1551 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
901a920f
JW		 1552 if (!phba->slim_memmap_p) {
1553 error = -ENODEV;
1554 dev_printk(KERN_ERR, &pdev->dev,
1555 "ioremap failed for SLIM memory.\n");
1556 goto out_idr_remove;
1557 }
1558
1559 /* Map HBA Control Registers to a kernel virtual address. */
dea3101e 1560 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
901a920f
JW		 1561 if (!phba->ctrl_regs_memmap_p) {
1562 error = -ENODEV;
1563 dev_printk(KERN_ERR, &pdev->dev,
1564 "ioremap failed for HBA control registers.\n");
1565 goto out_iounmap_slim;
1566 }
dea3101e 1567
1568 /* Allocate memory for SLI-2 structures */
1569 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
1570 &phba->slim2p_mapping, GFP_KERNEL);
1571 if (!phba->slim2p)
1572 goto out_iounmap;
1573
f91b392c 1574 memset(phba->slim2p, 0, SLI2_SLIM_SIZE);
dea3101e 1575
1576 /* Initialize the SLI Layer to run with lpfc HBAs. */
1577 lpfc_sli_setup(phba);
1578 lpfc_sli_queue_setup(phba);
1579
1580 error = lpfc_mem_alloc(phba);
1581 if (error)
1582 goto out_free_slim;
1583
1584 /* Initialize and populate the iocb list per host. */
1585 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
1586 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
1587 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
1588 if (iocbq_entry == NULL) {
1589 printk(KERN_ERR "%s: only allocated %d iocbs of "
1590 "expected %d count. Unloading driver.\n",
1591 __FUNCTION__, i, LPFC_IOCB_LIST_CNT);
1592 error = -ENOMEM;
1593 goto out_free_iocbq;
1594 }
1595
1596 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
604a3e30
JB		 1597 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
1598 if (iotag == 0) {
1599 kfree (iocbq_entry);
1600 printk(KERN_ERR "%s: failed to allocate IOTAG. "
1601 "Unloading driver.\n",
1602 __FUNCTION__);
1603 error = -ENOMEM;
1604 goto out_free_iocbq;
1605 }
dea3101e 1606 spin_lock_irq(phba->host->host_lock);
1607 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
1608 phba->total_iocbq_bufs++;
1609 spin_unlock_irq(phba->host->host_lock);
1610 }
1611
1612 /* Initialize HBA structure */
1613 phba->fc_edtov = FF_DEF_EDTOV;
1614 phba->fc_ratov = FF_DEF_RATOV;
1615 phba->fc_altov = FF_DEF_ALTOV;
1616 phba->fc_arbtov = FF_DEF_ARBTOV;
1617
1618 INIT_LIST_HEAD(&phba->work_list);
1619 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
1620 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
1621
1622 /* Startup the kernel thread for this host adapter. */
1623 phba->worker_thread = kthread_run(lpfc_do_work, phba,
1624 "lpfc_worker_%d", phba->brd_no);
1625 if (IS_ERR(phba->worker_thread)) {
1626 error = PTR_ERR(phba->worker_thread);
1627 goto out_free_iocbq;
1628 }
1629
8f6d98d2
JS		 1630 /*
1631 * Set initial can_queue value since 0 is no longer supported and
1632 * scsi_add_host will fail. This will be adjusted later based on the
1633 * max xri value determined in hba setup.
1634 */
dea3101e 1635 host->can_queue = phba->cfg_hba_queue_depth - 10;
1636
1637 /* Tell the midlayer we support 16 byte commands */
1638 host->max_cmd_len = 16;
1639
1640 /* Initialize the list of scsi buffers used by driver for scsi IO. */
875fbdfe 1641 spin_lock_init(&phba->scsi_buf_list_lock);
dea3101e 1642 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
1643
1644 host->transportt = lpfc_transport_template;
dea3101e 1645 pci_set_drvdata(pdev, host);
1646 error = scsi_add_host(host, &pdev->dev);
1647 if (error)
1648 goto out_kthread_stop;
1649
1650 error = lpfc_alloc_sysfs_attr(phba);
1651 if (error)
defbcf11 1652 goto out_remove_host;
dea3101e 1653
1d6f359a 1654 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, IRQF_SHARED,
dea3101e 1655 LPFC_DRIVER_NAME, phba);
1656 if (error) {
1657 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1658 "%d:0451 Enable interrupt handler failed\n",
1659 phba->brd_no);
1660 goto out_free_sysfs_attr;
1661 }
1662 phba->MBslimaddr = phba->slim_memmap_p;
1663 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
1664 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
1665 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
1666 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
1667
1668 error = lpfc_sli_hba_setup(phba);
defbcf11
JS		 1669 if (error) {
1670 error = -ENODEV;
dea3101e 1671 goto out_free_irq;
defbcf11 1672 }
dea3101e 1673
8f6d98d2
JS		 1674 /*
1675 * hba setup may have changed the hba_queue_depth so we need to adjust
1676 * the value of can_queue.
1677 */
1678 host->can_queue = phba->cfg_hba_queue_depth - 10;
1679
ce8b3ce5
JS		 1680 lpfc_discovery_wait(phba);
1681
875fbdfe
JSEC		 1682 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
1683 spin_lock_irq(phba->host->host_lock);
1684 lpfc_poll_start_timer(phba);
1685 spin_unlock_irq(phba->host->host_lock);
1686 }
1687
dea3101e 1688 /*
1689 * set fixed host attributes
1690 * Must done after lpfc_sli_hba_setup()
1691 */
1692
68ce1eb5
AM		 1693 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
1694 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
dea3101e 1695 fc_host_supported_classes(host) = FC_COS_CLASS3;
1696
1697 memset(fc_host_supported_fc4s(host), 0,
1698 sizeof(fc_host_supported_fc4s(host)));
1699 fc_host_supported_fc4s(host)[2] = 1;
1700 fc_host_supported_fc4s(host)[7] = 1;
1701
1702 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
1703
1704 fc_host_supported_speeds(host) = 0;
74b72a59 1705 if (phba->lmt & LMT_10Gb)
dea3101e 1706 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
74b72a59 1707 if (phba->lmt & LMT_4Gb)
dea3101e 1708 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
74b72a59 1709 if (phba->lmt & LMT_2Gb)
dea3101e 1710 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
74b72a59
JW		 1711 if (phba->lmt & LMT_1Gb)
1712 fc_host_supported_speeds(host) |= FC_PORTSPEED_1GBIT;
dea3101e 1713
1714 fc_host_maxframe_size(host) =
1715 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
1716 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb);
1717
1718 /* This value is also unchanging */
1719 memset(fc_host_active_fc4s(host), 0,
1720 sizeof(fc_host_active_fc4s(host)));
1721 fc_host_active_fc4s(host)[2] = 1;
1722 fc_host_active_fc4s(host)[7] = 1;
1723
1724 spin_lock_irq(phba->host->host_lock);
1725 phba->fc_flag &= ~FC_LOADING;
1726 spin_unlock_irq(phba->host->host_lock);
1727 return 0;
1728
1729out_free_irq:
1730 lpfc_stop_timer(phba);
1731 phba->work_hba_events = 0;
1732 free_irq(phba->pcidev->irq, phba);
1733out_free_sysfs_attr:
1734 lpfc_free_sysfs_attr(phba);
defbcf11
JS		 1735out_remove_host:
1736 fc_remove_host(phba->host);
1737 scsi_remove_host(phba->host);
dea3101e 1738out_kthread_stop:
1739 kthread_stop(phba->worker_thread);
1740out_free_iocbq:
1741 list_for_each_entry_safe(iocbq_entry, iocbq_next,
1742 &phba->lpfc_iocb_list, list) {
1743 spin_lock_irq(phba->host->host_lock);
1744 kfree(iocbq_entry);
1745 phba->total_iocbq_bufs--;
1746 spin_unlock_irq(phba->host->host_lock);
1747 }
1748 lpfc_mem_free(phba);
1749out_free_slim:
1750 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p,
1751 phba->slim2p_mapping);
1752out_iounmap:
1753 iounmap(phba->ctrl_regs_memmap_p);
901a920f 1754out_iounmap_slim:
dea3101e 1755 iounmap(phba->slim_memmap_p);
1756out_idr_remove:
1757 idr_remove(&lpfc_hba_index, phba->brd_no);
1758out_put_host:
defbcf11 1759 phba->host = NULL;
dea3101e 1760 scsi_host_put(host);
1761out_release_regions:
1762 pci_release_regions(pdev);
1763out_disable_device:
1764 pci_disable_device(pdev);
1765out:
defbcf11 1766 pci_set_drvdata(pdev, NULL);
dea3101e 1767 return error;
1768}
1769
1770static void __devexit
1771lpfc_pci_remove_one(struct pci_dev *pdev)
1772{
1773 struct Scsi_Host *host = pci_get_drvdata(pdev);
7f0b5b19 1774 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
dea3101e 1775 unsigned long iflag;
1776
1777 lpfc_free_sysfs_attr(phba);
1778
1779 spin_lock_irqsave(phba->host->host_lock, iflag);
1780 phba->fc_flag |= FC_UNLOADING;
1781
1782 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1783
1784 fc_remove_host(phba->host);
1785 scsi_remove_host(phba->host);
1786
1787 kthread_stop(phba->worker_thread);
1788
1789 /*
1790 * Bring down the SLI Layer. This step disable all interrupts,
1791 * clears the rings, discards all mailbox commands, and resets
1792 * the HBA.
1793 */
1794 lpfc_sli_hba_down(phba);
41415862 1795 lpfc_sli_brdrestart(phba);
dea3101e 1796
1797 /* Release the irq reservation */
1798 free_irq(phba->pcidev->irq, phba);
1799
1800 lpfc_cleanup(phba, 0);
1801 lpfc_stop_timer(phba);
1802 phba->work_hba_events = 0;
1803
1804 /*
1805 * Call scsi_free before mem_free since scsi bufs are released to their
1806 * corresponding pools here.
1807 */
1808 lpfc_scsi_free(phba);
1809 lpfc_mem_free(phba);
1810
1811 /* Free resources associated with SLI2 interface */
1812 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
1813 phba->slim2p, phba->slim2p_mapping);
1814
1815 /* unmap adapter SLIM and Control Registers */
1816 iounmap(phba->ctrl_regs_memmap_p);
1817 iounmap(phba->slim_memmap_p);
1818
1819 pci_release_regions(phba->pcidev);
1820 pci_disable_device(phba->pcidev);
1821
1822 idr_remove(&lpfc_hba_index, phba->brd_no);
1823 scsi_host_put(phba->host);
1824
1825 pci_set_drvdata(pdev, NULL);
1826}
1827
1828static struct pci_device_id lpfc_id_table[] = {
1829 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
1830 PCI_ANY_ID, PCI_ANY_ID, },
06325e74
JSEC		 1831 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
1832 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1833 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
1834 PCI_ANY_ID, PCI_ANY_ID, },
1835 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
1836 PCI_ANY_ID, PCI_ANY_ID, },
1837 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR,
1838 PCI_ANY_ID, PCI_ANY_ID, },
1839 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY,
1840 PCI_ANY_ID, PCI_ANY_ID, },
1841 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY,
1842 PCI_ANY_ID, PCI_ANY_ID, },
1843 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY,
1844 PCI_ANY_ID, PCI_ANY_ID, },
1845 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
1846 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1847 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE,
1848 PCI_ANY_ID, PCI_ANY_ID, },
1849 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP,
1850 PCI_ANY_ID, PCI_ANY_ID, },
1851 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP,
1852 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1853 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
1854 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1855 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP,
1856 PCI_ANY_ID, PCI_ANY_ID, },
1857 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP,
1858 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1859 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
1860 PCI_ANY_ID, PCI_ANY_ID, },
1861 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
1862 PCI_ANY_ID, PCI_ANY_ID, },
1863 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
1864 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1865 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP,
1866 PCI_ANY_ID, PCI_ANY_ID, },
1867 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP,
1868 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1869 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
1870 PCI_ANY_ID, PCI_ANY_ID, },
1871 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
1872 PCI_ANY_ID, PCI_ANY_ID, },
1873 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY,
1874 PCI_ANY_ID, PCI_ANY_ID, },
1875 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101,
1876 PCI_ANY_ID, PCI_ANY_ID, },
1877 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
1878 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1879 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S,
1880 PCI_ANY_ID, PCI_ANY_ID, },
1881 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S,
1882 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1883 { 0 }
1884};
1885
1886MODULE_DEVICE_TABLE(pci, lpfc_id_table);
1887
1888static struct pci_driver lpfc_driver = {
1889 .name = LPFC_DRIVER_NAME,
1890 .id_table = lpfc_id_table,
1891 .probe = lpfc_pci_probe_one,
1892 .remove = __devexit_p(lpfc_pci_remove_one),
1893};
1894
1895static int __init
1896lpfc_init(void)
1897{
1898 int error = 0;
1899
1900 printk(LPFC_MODULE_DESC "\n");
c44ce173 1901 printk(LPFC_COPYRIGHT "\n");
dea3101e 1902
1903 lpfc_transport_template =
1904 fc_attach_transport(&lpfc_transport_functions);
1905 if (!lpfc_transport_template)
1906 return -ENOMEM;
1907 error = pci_register_driver(&lpfc_driver);
1908 if (error)
1909 fc_release_transport(lpfc_transport_template);
1910
1911 return error;
1912}
1913
1914static void __exit
1915lpfc_exit(void)
1916{
1917 pci_unregister_driver(&lpfc_driver);
1918 fc_release_transport(lpfc_transport_template);
1919}
1920
1921module_init(lpfc_init);
1922module_exit(lpfc_exit);
1923MODULE_LICENSE("GPL");
1924MODULE_DESCRIPTION(LPFC_MODULE_DESC);
1925MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
1926MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Linux kernel - Deliverables
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