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[PATCH] convert aic94xx over to using the sas transport end device
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc_init.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
41415862 4 * Copyright (C) 2004-2006 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
dea3101e 22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/idr.h>
26#include <linux/interrupt.h>
27#include <linux/kthread.h>
28#include <linux/pci.h>
29#include <linux/spinlock.h>
30
91886523 31#include <scsi/scsi.h>
dea3101e 32#include <scsi/scsi_device.h>
33#include <scsi/scsi_host.h>
34#include <scsi/scsi_transport_fc.h>
35
36#include "lpfc_hw.h"
37#include "lpfc_sli.h"
38#include "lpfc_disc.h"
39#include "lpfc_scsi.h"
40#include "lpfc.h"
41#include "lpfc_logmsg.h"
42#include "lpfc_crtn.h"
43#include "lpfc_version.h"
44
45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *);
46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
47static int lpfc_post_rcv_buf(struct lpfc_hba *);
48
49static struct scsi_transport_template *lpfc_transport_template = NULL;
50static DEFINE_IDR(lpfc_hba_index);
51
52/************************************************************************/
53/* */
54/* lpfc_config_port_prep */
55/* This routine will do LPFC initialization prior to the */
56/* CONFIG_PORT mailbox command. This will be initialized */
57/* as a SLI layer callback routine. */
58/* This routine returns 0 on success or -ERESTART if it wants */
59/* the SLI layer to reset the HBA and try again. Any */
60/* other return value indicates an error. */
61/* */
62/************************************************************************/
63int
64lpfc_config_port_prep(struct lpfc_hba * phba)
65{
66 lpfc_vpd_t *vp = &phba->vpd;
67 int i = 0, rc;
68 LPFC_MBOXQ_t *pmb;
69 MAILBOX_t *mb;
70 char *lpfc_vpd_data = NULL;
71 uint16_t offset = 0;
72 static char licensed[56] =
73 "key unlock for use with gnu public licensed code only\0";
74
75 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
76 if (!pmb) {
77 phba->hba_state = LPFC_HBA_ERROR;
78 return -ENOMEM;
79 }
80
81 mb = &pmb->mb;
82 phba->hba_state = LPFC_INIT_MBX_CMDS;
83
84 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
85 uint32_t *ptext = (uint32_t *) licensed;
86
87 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
88 *ptext = cpu_to_be32(*ptext);
89
90 lpfc_read_nv(phba, pmb);
91 memset((char*)mb->un.varRDnvp.rsvd3, 0,
92 sizeof (mb->un.varRDnvp.rsvd3));
93 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
94 sizeof (licensed));
95
96 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
97
98 if (rc != MBX_SUCCESS) {
99 lpfc_printf_log(phba,
100 KERN_ERR,
101 LOG_MBOX,
102 "%d:0324 Config Port initialization "
103 "error, mbxCmd x%x READ_NVPARM, "
104 "mbxStatus x%x\n",
105 phba->brd_no,
106 mb->mbxCommand, mb->mbxStatus);
107 mempool_free(pmb, phba->mbox_mem_pool);
108 return -ERESTART;
109 }
110 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
111 sizeof (mb->un.varRDnvp.nodename));
112 }
113
114 /* Setup and issue mailbox READ REV command */
115 lpfc_read_rev(phba, pmb);
116 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
117 if (rc != MBX_SUCCESS) {
118 lpfc_printf_log(phba,
119 KERN_ERR,
120 LOG_INIT,
121 "%d:0439 Adapter failed to init, mbxCmd x%x "
122 "READ_REV, mbxStatus x%x\n",
123 phba->brd_no,
124 mb->mbxCommand, mb->mbxStatus);
125 mempool_free( pmb, phba->mbox_mem_pool);
126 return -ERESTART;
127 }
128
1de933f3
JSEC		 129 /*
130 * The value of rr must be 1 since the driver set the cv field to 1.
131 * This setting requires the FW to set all revision fields.
dea3101e 132 */
1de933f3 133 if (mb->un.varRdRev.rr == 0) {
dea3101e 134 vp->rev.rBit = 0;
1de933f3
JSEC		 135 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
136 "%d:0440 Adapter failed to init, READ_REV has "
137 "missing revision information.\n",
138 phba->brd_no);
dea3101e 139 mempool_free(pmb, phba->mbox_mem_pool);
140 return -ERESTART;
dea3101e 141 }
142
143 /* Save information as VPD data */
1de933f3
JSEC		 144 vp->rev.rBit = 1;
145 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
146 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
147 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
148 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 149 vp->rev.biuRev = mb->un.varRdRev.biuRev;
150 vp->rev.smRev = mb->un.varRdRev.smRev;
151 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
152 vp->rev.endecRev = mb->un.varRdRev.endecRev;
153 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
154 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
155 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
156 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
157 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
158 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
159
160 if (lpfc_is_LC_HBA(phba->pcidev->device))
161 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
162 sizeof (phba->RandomData));
163
164 /* Get the default values for Model Name and Description */
165 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
166
167 /* Get adapter VPD information */
168 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
169 if (!pmb->context2)
170 goto out_free_mbox;
171 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
172 if (!lpfc_vpd_data)
173 goto out_free_context2;
174
175 do {
176 lpfc_dump_mem(phba, pmb, offset);
177 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
178
179 if (rc != MBX_SUCCESS) {
180 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
181 "%d:0441 VPD not present on adapter, "
182 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
183 phba->brd_no,
184 mb->mbxCommand, mb->mbxStatus);
185 kfree(lpfc_vpd_data);
186 lpfc_vpd_data = NULL;
187 break;
188 }
189
190 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
191 mb->un.varDmp.word_cnt);
192 offset += mb->un.varDmp.word_cnt;
193 } while (mb->un.varDmp.word_cnt);
194 lpfc_parse_vpd(phba, lpfc_vpd_data);
195
196 kfree(lpfc_vpd_data);
197out_free_context2:
198 kfree(pmb->context2);
199out_free_mbox:
200 mempool_free(pmb, phba->mbox_mem_pool);
201 return 0;
202}
203
204/************************************************************************/
205/* */
206/* lpfc_config_port_post */
207/* This routine will do LPFC initialization after the */
208/* CONFIG_PORT mailbox command. This will be initialized */
209/* as a SLI layer callback routine. */
210/* This routine returns 0 on success. Any other return value */
211/* indicates an error. */
212/* */
213/************************************************************************/
214int
215lpfc_config_port_post(struct lpfc_hba * phba)
216{
217 LPFC_MBOXQ_t *pmb;
218 MAILBOX_t *mb;
219 struct lpfc_dmabuf *mp;
220 struct lpfc_sli *psli = &phba->sli;
221 uint32_t status, timeout;
222 int i, j, rc;
223
224 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb) {
226 phba->hba_state = LPFC_HBA_ERROR;
227 return -ENOMEM;
228 }
229 mb = &pmb->mb;
230
231 lpfc_config_link(phba, pmb);
232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233 if (rc != MBX_SUCCESS) {
234 lpfc_printf_log(phba,
235 KERN_ERR,
236 LOG_INIT,
237 "%d:0447 Adapter failed init, mbxCmd x%x "
238 "CONFIG_LINK mbxStatus x%x\n",
239 phba->brd_no,
240 mb->mbxCommand, mb->mbxStatus);
241 phba->hba_state = LPFC_HBA_ERROR;
242 mempool_free( pmb, phba->mbox_mem_pool);
243 return -EIO;
244 }
245
246 /* Get login parameters for NID. */
247 lpfc_read_sparam(phba, pmb);
248 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
249 lpfc_printf_log(phba,
250 KERN_ERR,
251 LOG_INIT,
252 "%d:0448 Adapter failed init, mbxCmd x%x "
253 "READ_SPARM mbxStatus x%x\n",
254 phba->brd_no,
255 mb->mbxCommand, mb->mbxStatus);
256 phba->hba_state = LPFC_HBA_ERROR;
257 mp = (struct lpfc_dmabuf *) pmb->context1;
258 mempool_free( pmb, phba->mbox_mem_pool);
259 lpfc_mbuf_free(phba, mp->virt, mp->phys);
260 kfree(mp);
261 return -EIO;
262 }
263
264 mp = (struct lpfc_dmabuf *) pmb->context1;
265
266 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
267 lpfc_mbuf_free(phba, mp->virt, mp->phys);
268 kfree(mp);
269 pmb->context1 = NULL;
270
271 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
272 sizeof (struct lpfc_name));
273 memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
274 sizeof (struct lpfc_name));
275 /* If no serial number in VPD data, use low 6 bytes of WWNN */
276 /* This should be consolidated into parse_vpd ? - mr */
277 if (phba->SerialNumber[0] == 0) {
278 uint8_t *outptr;
279
68ce1eb5 280 outptr = &phba->fc_nodename.u.s.IEEE[0];
dea3101e 281 for (i = 0; i < 12; i++) {
282 status = *outptr++;
283 j = ((status & 0xf0) >> 4);
284 if (j <= 9)
285 phba->SerialNumber[i] =
286 (char)((uint8_t) 0x30 + (uint8_t) j);
287 else
288 phba->SerialNumber[i] =
289 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
290 i++;
291 j = (status & 0xf);
292 if (j <= 9)
293 phba->SerialNumber[i] =
294 (char)((uint8_t) 0x30 + (uint8_t) j);
295 else
296 phba->SerialNumber[i] =
297 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
298 }
299 }
300
301 /* This should turn on DELAYED ABTS for ELS timeouts */
302 lpfc_set_slim(phba, pmb, 0x052198, 0x1);
303 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
304 phba->hba_state = LPFC_HBA_ERROR;
305 mempool_free( pmb, phba->mbox_mem_pool);
306 return -EIO;
307 }
308
309
310 lpfc_read_config(phba, pmb);
311 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
312 lpfc_printf_log(phba,
313 KERN_ERR,
314 LOG_INIT,
315 "%d:0453 Adapter failed to init, mbxCmd x%x "
316 "READ_CONFIG, mbxStatus x%x\n",
317 phba->brd_no,
318 mb->mbxCommand, mb->mbxStatus);
319 phba->hba_state = LPFC_HBA_ERROR;
320 mempool_free( pmb, phba->mbox_mem_pool);
321 return -EIO;
322 }
323
324 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
325 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
326 phba->cfg_hba_queue_depth =
327 mb->un.varRdConfig.max_xri + 1;
328
329 phba->lmt = mb->un.varRdConfig.lmt;
330 /* HBA is not 4GB capable, or HBA is not 2GB capable,
331 don't let link speed ask for it */
332 if ((((phba->lmt & LMT_4250_10bit) != LMT_4250_10bit) &&
333 (phba->cfg_link_speed > LINK_SPEED_2G)) ||
334 (((phba->lmt & LMT_2125_10bit) != LMT_2125_10bit) &&
335 (phba->cfg_link_speed > LINK_SPEED_1G))) {
336 /* Reset link speed to auto. 1G/2GB HBA cfg'd for 4G */
337 lpfc_printf_log(phba,
338 KERN_WARNING,
339 LOG_LINK_EVENT,
340 "%d:1302 Invalid speed for this board: "
341 "Reset link speed to auto: x%x\n",
342 phba->brd_no,
343 phba->cfg_link_speed);
344 phba->cfg_link_speed = LINK_SPEED_AUTO;
345 }
346
347 phba->hba_state = LPFC_LINK_DOWN;
348
349 /* Only process IOCBs on ring 0 till hba_state is READY */
350 if (psli->ring[psli->ip_ring].cmdringaddr)
351 psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT;
352 if (psli->ring[psli->fcp_ring].cmdringaddr)
353 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
354 if (psli->ring[psli->next_ring].cmdringaddr)
355 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
356
357 /* Post receive buffers for desired rings */
358 lpfc_post_rcv_buf(phba);
359
360 /* Enable appropriate host interrupts */
361 spin_lock_irq(phba->host->host_lock);
362 status = readl(phba->HCregaddr);
363 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
364 if (psli->num_rings > 0)
365 status |= HC_R0INT_ENA;
366 if (psli->num_rings > 1)
367 status |= HC_R1INT_ENA;
368 if (psli->num_rings > 2)
369 status |= HC_R2INT_ENA;
370 if (psli->num_rings > 3)
371 status |= HC_R3INT_ENA;
372
875fbdfe
JSEC		 373 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
374 (phba->cfg_poll & DISABLE_FCP_RING_INT))
375 status &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
376
dea3101e 377 writel(status, phba->HCregaddr);
378 readl(phba->HCregaddr); /* flush */
379 spin_unlock_irq(phba->host->host_lock);
380
381 /*
382 * Setup the ring 0 (els) timeout handler
383 */
384 timeout = phba->fc_ratov << 1;
385 phba->els_tmofunc.expires = jiffies + HZ * timeout;
386 add_timer(&phba->els_tmofunc);
387
388 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
389 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
390 if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) {
391 lpfc_printf_log(phba,
392 KERN_ERR,
393 LOG_INIT,
394 "%d:0454 Adapter failed to init, mbxCmd x%x "
395 "INIT_LINK, mbxStatus x%x\n",
396 phba->brd_no,
397 mb->mbxCommand, mb->mbxStatus);
398
399 /* Clear all interrupt enable conditions */
400 writel(0, phba->HCregaddr);
401 readl(phba->HCregaddr); /* flush */
402 /* Clear all pending interrupts */
403 writel(0xffffffff, phba->HAregaddr);
404 readl(phba->HAregaddr); /* flush */
405
406 phba->hba_state = LPFC_HBA_ERROR;
407 mempool_free(pmb, phba->mbox_mem_pool);
408 return -EIO;
409 }
410 /* MBOX buffer will be freed in mbox compl */
411
412 i = 0;
413 while ((phba->hba_state != LPFC_HBA_READY) ||
414 (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
415 ((phba->fc_map_cnt == 0) && (i<2)) ||
416 (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
417 /* Check every second for 30 retries. */
418 i++;
419 if (i > 30) {
420 break;
421 }
422 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
423 /* The link is down. Set linkdown timeout */
424 break;
425 }
426
427 /* Delay for 1 second to give discovery time to complete. */
428 msleep(1000);
429
430 }
431
432 /* Since num_disc_nodes keys off of PLOGI, delay a bit to let
433 * any potential PRLIs to flush thru the SLI sub-system.
434 */
435 msleep(50);
436
437 return (0);
438}
439
440/************************************************************************/
441/* */
442/* lpfc_hba_down_prep */
443/* This routine will do LPFC uninitialization before the */
444/* HBA is reset when bringing down the SLI Layer. This will be */
445/* initialized as a SLI layer callback routine. */
446/* This routine returns 0 on success. Any other return value */
447/* indicates an error. */
448/* */
449/************************************************************************/
450int
451lpfc_hba_down_prep(struct lpfc_hba * phba)
452{
453 /* Disable interrupts */
454 writel(0, phba->HCregaddr);
455 readl(phba->HCregaddr); /* flush */
456
457 /* Cleanup potential discovery resources */
458 lpfc_els_flush_rscn(phba);
459 lpfc_els_flush_cmd(phba);
460 lpfc_disc_flush_list(phba);
461
41415862
JW		 462 /* Disable SLI2 since we disabled interrupts */
463 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
dea3101e 464 return (0);
465}
466
41415862
JW		 467/************************************************************************/
468/* */
469/* lpfc_hba_down_post */
470/* This routine will do uninitialization after the HBA is reset */
471/* when bringing down the SLI Layer. */
472/* This routine returns 0 on success. Any other return value */
473/* indicates an error. */
474/* */
475/************************************************************************/
476int
477lpfc_hba_down_post(struct lpfc_hba * phba)
478{
479 struct lpfc_sli *psli = &phba->sli;
480 struct lpfc_sli_ring *pring;
481 struct lpfc_dmabuf *mp, *next_mp;
482 int i;
483
484 /* Cleanup preposted buffers on the ELS ring */
485 pring = &psli->ring[LPFC_ELS_RING];
486 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
487 list_del(&mp->list);
488 pring->postbufq_cnt--;
489 lpfc_mbuf_free(phba, mp->virt, mp->phys);
490 kfree(mp);
491 }
492
493 for (i = 0; i < psli->num_rings; i++) {
494 pring = &psli->ring[i];
495 lpfc_sli_abort_iocb_ring(phba, pring);
496 }
497
498 return 0;
499}
500
dea3101e 501/************************************************************************/
502/* */
503/* lpfc_handle_eratt */
504/* This routine will handle processing a Host Attention */
505/* Error Status event. This will be initialized */
506/* as a SLI layer callback routine. */
507/* */
508/************************************************************************/
509void
510lpfc_handle_eratt(struct lpfc_hba * phba)
511{
512 struct lpfc_sli *psli = &phba->sli;
513 struct lpfc_sli_ring *pring;
514
dea3101e 515 if (phba->work_hs & HS_FFER6) {
516 /* Re-establishing Link */
517 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
518 "%d:1301 Re-establishing Link "
519 "Data: x%x x%x x%x\n",
520 phba->brd_no, phba->work_hs,
521 phba->work_status[0], phba->work_status[1]);
522 spin_lock_irq(phba->host->host_lock);
523 phba->fc_flag |= FC_ESTABLISH_LINK;
524 spin_unlock_irq(phba->host->host_lock);
525
526 /*
527 * Firmware stops when it triggled erratt with HS_FFER6.
528 * That could cause the I/Os dropped by the firmware.
529 * Error iocb (I/O) on txcmplq and let the SCSI layer
530 * retry it after re-establishing link.
531 */
532 pring = &psli->ring[psli->fcp_ring];
533 lpfc_sli_abort_iocb_ring(phba, pring);
534
535
536 /*
537 * There was a firmware error. Take the hba offline and then
538 * attempt to restart it.
539 */
540 lpfc_offline(phba);
41415862 541 lpfc_sli_brdrestart(phba);
dea3101e 542 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
543 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
544 return;
545 }
546 } else {
547 /* The if clause above forces this code path when the status
548 * failure is a value other than FFER6. Do not call the offline
549 * twice. This is the adapter hardware error path.
550 */
551 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
552 "%d:0457 Adapter Hardware Error "
553 "Data: x%x x%x x%x\n",
554 phba->brd_no, phba->work_hs,
555 phba->work_status[0], phba->work_status[1]);
556
557 lpfc_offline(phba);
41415862
JW		 558 phba->hba_state = LPFC_HBA_ERROR;
559 lpfc_hba_down_post(phba);
dea3101e 560 }
561}
562
563/************************************************************************/
564/* */
565/* lpfc_handle_latt */
566/* This routine will handle processing a Host Attention */
567/* Link Status event. This will be initialized */
568/* as a SLI layer callback routine. */
569/* */
570/************************************************************************/
571void
572lpfc_handle_latt(struct lpfc_hba * phba)
573{
574 struct lpfc_sli *psli = &phba->sli;
575 LPFC_MBOXQ_t *pmb;
576 volatile uint32_t control;
577 struct lpfc_dmabuf *mp;
578 int rc = -ENOMEM;
579
580 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
581 if (!pmb)
582 goto lpfc_handle_latt_err_exit;
583
584 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
585 if (!mp)
586 goto lpfc_handle_latt_free_pmb;
587
588 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
589 if (!mp->virt)
590 goto lpfc_handle_latt_free_mp;
591
592 rc = -EIO;
593
6281bfe0
JSEC		 594 /* Cleanup any outstanding ELS commands */
595 lpfc_els_flush_cmd(phba);
dea3101e 596
597 psli->slistat.link_event++;
598 lpfc_read_la(phba, pmb, mp);
599 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
600 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
601 if (rc == MBX_NOT_FINISHED)
602 goto lpfc_handle_latt_free_mp;
603
604 /* Clear Link Attention in HA REG */
605 spin_lock_irq(phba->host->host_lock);
606 writel(HA_LATT, phba->HAregaddr);
607 readl(phba->HAregaddr); /* flush */
608 spin_unlock_irq(phba->host->host_lock);
609
610 return;
611
612lpfc_handle_latt_free_mp:
613 kfree(mp);
614lpfc_handle_latt_free_pmb:
615 kfree(pmb);
616lpfc_handle_latt_err_exit:
617 /* Enable Link attention interrupts */
618 spin_lock_irq(phba->host->host_lock);
619 psli->sli_flag |= LPFC_PROCESS_LA;
620 control = readl(phba->HCregaddr);
621 control |= HC_LAINT_ENA;
622 writel(control, phba->HCregaddr);
623 readl(phba->HCregaddr); /* flush */
624
625 /* Clear Link Attention in HA REG */
626 writel(HA_LATT, phba->HAregaddr);
627 readl(phba->HAregaddr); /* flush */
628 spin_unlock_irq(phba->host->host_lock);
629 lpfc_linkdown(phba);
630 phba->hba_state = LPFC_HBA_ERROR;
631
632 /* The other case is an error from issue_mbox */
633 if (rc == -ENOMEM)
634 lpfc_printf_log(phba,
635 KERN_WARNING,
636 LOG_MBOX,
637 "%d:0300 READ_LA: no buffers\n",
638 phba->brd_no);
639
640 return;
641}
642
643/************************************************************************/
644/* */
645/* lpfc_parse_vpd */
646/* This routine will parse the VPD data */
647/* */
648/************************************************************************/
649static int
650lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd)
651{
652 uint8_t lenlo, lenhi;
653 uint32_t Length;
654 int i, j;
655 int finished = 0;
656 int index = 0;
657
658 if (!vpd)
659 return 0;
660
661 /* Vital Product */
662 lpfc_printf_log(phba,
663 KERN_INFO,
664 LOG_INIT,
665 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
666 phba->brd_no,
667 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
668 (uint32_t) vpd[3]);
669 do {
670 switch (vpd[index]) {
671 case 0x82:
672 index += 1;
673 lenlo = vpd[index];
674 index += 1;
675 lenhi = vpd[index];
676 index += 1;
677 i = ((((unsigned short)lenhi) << 8) + lenlo);
678 index += i;
679 break;
680 case 0x90:
681 index += 1;
682 lenlo = vpd[index];
683 index += 1;
684 lenhi = vpd[index];
685 index += 1;
686 Length = ((((unsigned short)lenhi) << 8) + lenlo);
687
688 while (Length > 0) {
689 /* Look for Serial Number */
690 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
691 index += 2;
692 i = vpd[index];
693 index += 1;
694 j = 0;
695 Length -= (3+i);
696 while(i--) {
697 phba->SerialNumber[j++] = vpd[index++];
698 if (j == 31)
699 break;
700 }
701 phba->SerialNumber[j] = 0;
702 continue;
703 }
704 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
705 phba->vpd_flag |= VPD_MODEL_DESC;
706 index += 2;
707 i = vpd[index];
708 index += 1;
709 j = 0;
710 Length -= (3+i);
711 while(i--) {
712 phba->ModelDesc[j++] = vpd[index++];
713 if (j == 255)
714 break;
715 }
716 phba->ModelDesc[j] = 0;
717 continue;
718 }
719 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
720 phba->vpd_flag |= VPD_MODEL_NAME;
721 index += 2;
722 i = vpd[index];
723 index += 1;
724 j = 0;
725 Length -= (3+i);
726 while(i--) {
727 phba->ModelName[j++] = vpd[index++];
728 if (j == 79)
729 break;
730 }
731 phba->ModelName[j] = 0;
732 continue;
733 }
734 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
735 phba->vpd_flag |= VPD_PROGRAM_TYPE;
736 index += 2;
737 i = vpd[index];
738 index += 1;
739 j = 0;
740 Length -= (3+i);
741 while(i--) {
742 phba->ProgramType[j++] = vpd[index++];
743 if (j == 255)
744 break;
745 }
746 phba->ProgramType[j] = 0;
747 continue;
748 }
749 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
750 phba->vpd_flag |= VPD_PORT;
751 index += 2;
752 i = vpd[index];
753 index += 1;
754 j = 0;
755 Length -= (3+i);
756 while(i--) {
757 phba->Port[j++] = vpd[index++];
758 if (j == 19)
759 break;
760 }
761 phba->Port[j] = 0;
762 continue;
763 }
764 else {
765 index += 2;
766 i = vpd[index];
767 index += 1;
768 index += i;
769 Length -= (3 + i);
770 }
771 }
772 finished = 0;
773 break;
774 case 0x78:
775 finished = 1;
776 break;
777 default:
778 index ++;
779 break;
780 }
781 } while (!finished && (index < 108));
782
783 return(1);
784}
785
786static void
787lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
788{
789 lpfc_vpd_t *vp;
fefcb2b6
JSEC		 790 uint16_t dev_id = phba->pcidev->device;
791 uint16_t dev_subid = phba->pcidev->subsystem_device;
792 uint8_t hdrtype = phba->pcidev->hdr_type;
5cc36b3c 793 char *model_str = "";
dea3101e 794
795 vp = &phba->vpd;
dea3101e 796
e4adb204 797 switch (dev_id) {
06325e74 798 case PCI_DEVICE_ID_FIREFLY:
5cc36b3c 799 model_str = "LP6000 1Gb PCI";
06325e74 800 break;
dea3101e 801 case PCI_DEVICE_ID_SUPERFLY:
802 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
5cc36b3c 803 model_str = "LP7000 1Gb PCI";
dea3101e 804 else
5cc36b3c 805 model_str = "LP7000E 1Gb PCI";
dea3101e 806 break;
807 case PCI_DEVICE_ID_DRAGONFLY:
5cc36b3c 808 model_str = "LP8000 1Gb PCI";
dea3101e 809 break;
810 case PCI_DEVICE_ID_CENTAUR:
811 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
5cc36b3c 812 model_str = "LP9002 2Gb PCI";
dea3101e 813 else
5cc36b3c 814 model_str = "LP9000 1Gb PCI";
dea3101e 815 break;
816 case PCI_DEVICE_ID_RFLY:
5cc36b3c 817 model_str = "LP952 2Gb PCI";
dea3101e 818 break;
819 case PCI_DEVICE_ID_PEGASUS:
5cc36b3c 820 model_str = "LP9802 2Gb PCI-X";
dea3101e 821 break;
822 case PCI_DEVICE_ID_THOR:
964b77e7 823 if (hdrtype == 0x80)
5cc36b3c 824 model_str = "LP10000DC 2Gb 2-port PCI-X";
964b77e7 825 else
5cc36b3c 826 model_str = "LP10000 2Gb PCI-X";
dea3101e 827 break;
828 case PCI_DEVICE_ID_VIPER:
5cc36b3c 829 model_str = "LPX1000 10Gb PCI-X";
dea3101e 830 break;
831 case PCI_DEVICE_ID_PFLY:
5cc36b3c 832 model_str = "LP982 2Gb PCI-X";
dea3101e 833 break;
834 case PCI_DEVICE_ID_TFLY:
964b77e7 835 if (hdrtype == 0x80)
5cc36b3c 836 model_str = "LP1050DC 2Gb 2-port PCI-X";
964b77e7 837 else
5cc36b3c 838 model_str = "LP1050 2Gb PCI-X";
dea3101e 839 break;
840 case PCI_DEVICE_ID_HELIOS:
964b77e7 841 if (hdrtype == 0x80)
5cc36b3c 842 model_str = "LP11002 4Gb 2-port PCI-X2";
964b77e7 843 else
5cc36b3c 844 model_str = "LP11000 4Gb PCI-X2";
dea3101e 845 break;
e4adb204 846 case PCI_DEVICE_ID_HELIOS_SCSP:
5cc36b3c 847 model_str = "LP11000-SP 4Gb PCI-X2";
e4adb204
JSEC		 848 break;
849 case PCI_DEVICE_ID_HELIOS_DCSP:
5cc36b3c 850 model_str = "LP11002-SP 4Gb 2-port PCI-X2";
e4adb204
JSEC		 851 break;
852 case PCI_DEVICE_ID_NEPTUNE:
853 if (hdrtype == 0x80)
5cc36b3c 854 model_str = "LPe1002 4Gb 2-port";
e4adb204 855 else
5cc36b3c 856 model_str = "LPe1000 4Gb PCIe";
e4adb204
JSEC		 857 break;
858 case PCI_DEVICE_ID_NEPTUNE_SCSP:
5cc36b3c 859 model_str = "LPe1000-SP 4Gb PCIe";
e4adb204
JSEC		 860 break;
861 case PCI_DEVICE_ID_NEPTUNE_DCSP:
5cc36b3c 862 model_str = "LPe1002-SP 4Gb 2-port PCIe";
e4adb204 863 break;
dea3101e 864 case PCI_DEVICE_ID_BMID:
5cc36b3c 865 model_str = "LP1150 4Gb PCI-X2";
dea3101e 866 break;
867 case PCI_DEVICE_ID_BSMB:
5cc36b3c 868 model_str = "LP111 4Gb PCI-X2";
dea3101e 869 break;
870 case PCI_DEVICE_ID_ZEPHYR:
964b77e7 871 if (hdrtype == 0x80)
5cc36b3c 872 model_str = "LPe11002 4Gb 2-port PCIe";
964b77e7 873 else
5cc36b3c 874 model_str = "LPe11000 4Gb PCIe";
dea3101e 875 break;
e4adb204 876 case PCI_DEVICE_ID_ZEPHYR_SCSP:
5cc36b3c 877 model_str = "LPe11000-SP 4Gb PCIe";
e4adb204
JSEC		 878 break;
879 case PCI_DEVICE_ID_ZEPHYR_DCSP:
5cc36b3c 880 model_str = "LPe11002-SP 4Gb 2-port PCIe";
e4adb204 881 break;
dea3101e 882 case PCI_DEVICE_ID_ZMID:
5cc36b3c 883 model_str = "LPe1150 4Gb PCIe";
dea3101e 884 break;
885 case PCI_DEVICE_ID_ZSMB:
5cc36b3c 886 model_str = "LPe111 4Gb PCIe";
dea3101e 887 break;
888 case PCI_DEVICE_ID_LP101:
5cc36b3c 889 model_str = "LP101 2Gb PCI-X";
dea3101e 890 break;
891 case PCI_DEVICE_ID_LP10000S:
5cc36b3c 892 model_str = "LP10000-S 2Gb PCI";
06325e74 893 break;
e4adb204 894 case PCI_DEVICE_ID_LP11000S:
e4adb204 895 case PCI_DEVICE_ID_LPE11000S:
5cc36b3c
JSEC		 896 switch (dev_subid) {
897 case PCI_SUBSYSTEM_ID_LP11000S:
898 model_str = "LP11002-S 4Gb PCI-X2";
899 break;
900 case PCI_SUBSYSTEM_ID_LP11002S:
901 model_str = "LP11000-S 4Gb 2-port PCI-X2";
902 break;
903 case PCI_SUBSYSTEM_ID_LPE11000S:
904 model_str = "LPe11002-S 4Gb PCIe";
905 break;
906 case PCI_SUBSYSTEM_ID_LPE11002S:
907 model_str = "LPe11002-S 4Gb 2-port PCIe";
908 break;
909 case PCI_SUBSYSTEM_ID_LPE11010S:
910 model_str = "LPe11010-S 4Gb 10-port PCIe";
911 break;
912 default:
913 break;
914 }
915 break;
916 default:
e4adb204 917 break;
dea3101e 918 }
919 if (mdp)
5cc36b3c 920 sscanf(model_str, "%s", mdp);
dea3101e 921 if (descp)
5cc36b3c 922 sprintf(descp, "Emulex %s Fibre Channel Adapter", model_str);
dea3101e 923}
924
925/**************************************************/
926/* lpfc_post_buffer */
927/* */
928/* This routine will post count buffers to the */
929/* ring with the QUE_RING_BUF_CN command. This */
930/* allows 3 buffers / command to be posted. */
931/* Returns the number of buffers NOT posted. */
932/**************************************************/
933int
934lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
935 int type)
936{
937 IOCB_t *icmd;
0bd4ca25 938 struct lpfc_iocbq *iocb;
dea3101e 939 struct lpfc_dmabuf *mp1, *mp2;
940
941 cnt += pring->missbufcnt;
942
943 /* While there are buffers to post */
944 while (cnt > 0) {
945 /* Allocate buffer for command iocb */
946 spin_lock_irq(phba->host->host_lock);
0bd4ca25 947 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 948 spin_unlock_irq(phba->host->host_lock);
949 if (iocb == NULL) {
950 pring->missbufcnt = cnt;
951 return cnt;
952 }
dea3101e 953 icmd = &iocb->iocb;
954
955 /* 2 buffers can be posted per command */
956 /* Allocate buffer to post */
957 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
958 if (mp1)
959 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
960 &mp1->phys);
961 if (mp1 == 0 || mp1->virt == 0) {
c9475cb0 962 kfree(mp1);
dea3101e 963 spin_lock_irq(phba->host->host_lock);
604a3e30 964 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 965 spin_unlock_irq(phba->host->host_lock);
966 pring->missbufcnt = cnt;
967 return cnt;
968 }
969
970 INIT_LIST_HEAD(&mp1->list);
971 /* Allocate buffer to post */
972 if (cnt > 1) {
973 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
974 if (mp2)
975 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
976 &mp2->phys);
977 if (mp2 == 0 || mp2->virt == 0) {
c9475cb0 978 kfree(mp2);
dea3101e 979 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
980 kfree(mp1);
981 spin_lock_irq(phba->host->host_lock);
604a3e30 982 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 983 spin_unlock_irq(phba->host->host_lock);
984 pring->missbufcnt = cnt;
985 return cnt;
986 }
987
988 INIT_LIST_HEAD(&mp2->list);
989 } else {
990 mp2 = NULL;
991 }
992
993 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
994 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
995 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
996 icmd->ulpBdeCount = 1;
997 cnt--;
998 if (mp2) {
999 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
1000 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
1001 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
1002 cnt--;
1003 icmd->ulpBdeCount = 2;
1004 }
1005
1006 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
1007 icmd->ulpLe = 1;
1008
1009 spin_lock_irq(phba->host->host_lock);
1010 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
1011 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
1012 kfree(mp1);
1013 cnt++;
1014 if (mp2) {
1015 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
1016 kfree(mp2);
1017 cnt++;
1018 }
604a3e30 1019 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1020 pring->missbufcnt = cnt;
1021 spin_unlock_irq(phba->host->host_lock);
1022 return cnt;
1023 }
1024 spin_unlock_irq(phba->host->host_lock);
1025 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
1026 if (mp2) {
1027 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
1028 }
1029 }
1030 pring->missbufcnt = 0;
1031 return 0;
1032}
1033
1034/************************************************************************/
1035/* */
1036/* lpfc_post_rcv_buf */
1037/* This routine post initial rcv buffers to the configured rings */
1038/* */
1039/************************************************************************/
1040static int
1041lpfc_post_rcv_buf(struct lpfc_hba * phba)
1042{
1043 struct lpfc_sli *psli = &phba->sli;
1044
1045 /* Ring 0, ELS / CT buffers */
1046 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
1047 /* Ring 2 - FCP no buffers needed */
1048
1049 return 0;
1050}
1051
1052#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
1053
1054/************************************************************************/
1055/* */
1056/* lpfc_sha_init */
1057/* */
1058/************************************************************************/
1059static void
1060lpfc_sha_init(uint32_t * HashResultPointer)
1061{
1062 HashResultPointer[0] = 0x67452301;
1063 HashResultPointer[1] = 0xEFCDAB89;
1064 HashResultPointer[2] = 0x98BADCFE;
1065 HashResultPointer[3] = 0x10325476;
1066 HashResultPointer[4] = 0xC3D2E1F0;
1067}
1068
1069/************************************************************************/
1070/* */
1071/* lpfc_sha_iterate */
1072/* */
1073/************************************************************************/
1074static void
1075lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
1076{
1077 int t;
1078 uint32_t TEMP;
1079 uint32_t A, B, C, D, E;
1080 t = 16;
1081 do {
1082 HashWorkingPointer[t] =
1083 S(1,
1084 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
1085 8] ^
1086 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
1087 } while (++t <= 79);
1088 t = 0;
1089 A = HashResultPointer[0];
1090 B = HashResultPointer[1];
1091 C = HashResultPointer[2];
1092 D = HashResultPointer[3];
1093 E = HashResultPointer[4];
1094
1095 do {
1096 if (t < 20) {
1097 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
1098 } else if (t < 40) {
1099 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
1100 } else if (t < 60) {
1101 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
1102 } else {
1103 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
1104 }
1105 TEMP += S(5, A) + E + HashWorkingPointer[t];
1106 E = D;
1107 D = C;
1108 C = S(30, B);
1109 B = A;
1110 A = TEMP;
1111 } while (++t <= 79);
1112
1113 HashResultPointer[0] += A;
1114 HashResultPointer[1] += B;
1115 HashResultPointer[2] += C;
1116 HashResultPointer[3] += D;
1117 HashResultPointer[4] += E;
1118
1119}
1120
1121/************************************************************************/
1122/* */
1123/* lpfc_challenge_key */
1124/* */
1125/************************************************************************/
1126static void
1127lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
1128{
1129 *HashWorking = (*RandomChallenge ^ *HashWorking);
1130}
1131
1132/************************************************************************/
1133/* */
1134/* lpfc_hba_init */
1135/* */
1136/************************************************************************/
1137void
1138lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
1139{
1140 int t;
1141 uint32_t *HashWorking;
1142 uint32_t *pwwnn = phba->wwnn;
1143
1144 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL);
1145 if (!HashWorking)
1146 return;
1147
1148 memset(HashWorking, 0, (80 * sizeof(uint32_t)));
1149 HashWorking[0] = HashWorking[78] = *pwwnn++;
1150 HashWorking[1] = HashWorking[79] = *pwwnn;
1151
1152 for (t = 0; t < 7; t++)
1153 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
1154
1155 lpfc_sha_init(hbainit);
1156 lpfc_sha_iterate(hbainit, HashWorking);
1157 kfree(HashWorking);
1158}
1159
1160static void
1161lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind)
1162{
1163 struct lpfc_nodelist *ndlp, *next_ndlp;
1164
1165 /* clean up phba - lpfc specific */
1166 lpfc_can_disctmo(phba);
1167 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
1168 nlp_listp) {
1169 lpfc_nlp_remove(phba, ndlp);
1170 }
1171
1172 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
1173 nlp_listp) {
1174 lpfc_nlp_remove(phba, ndlp);
1175 }
1176
1177 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
1178 nlp_listp) {
1179 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
1180 }
1181
1182 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
1183 nlp_listp) {
1184 lpfc_nlp_remove(phba, ndlp);
1185 }
1186
1187 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
1188 nlp_listp) {
1189 lpfc_nlp_remove(phba, ndlp);
1190 }
1191
1192 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list,
1193 nlp_listp) {
1194 lpfc_nlp_remove(phba, ndlp);
1195 }
1196
1197 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
1198 nlp_listp) {
1199 lpfc_nlp_remove(phba, ndlp);
1200 }
1201
1202 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
1203 nlp_listp) {
1204 lpfc_nlp_remove(phba, ndlp);
1205 }
1206
1207 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1208 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1209 INIT_LIST_HEAD(&phba->fc_unused_list);
1210 INIT_LIST_HEAD(&phba->fc_plogi_list);
1211 INIT_LIST_HEAD(&phba->fc_adisc_list);
1212 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1213 INIT_LIST_HEAD(&phba->fc_prli_list);
1214 INIT_LIST_HEAD(&phba->fc_npr_list);
1215
1216 phba->fc_map_cnt = 0;
1217 phba->fc_unmap_cnt = 0;
1218 phba->fc_plogi_cnt = 0;
1219 phba->fc_adisc_cnt = 0;
1220 phba->fc_reglogin_cnt = 0;
1221 phba->fc_prli_cnt = 0;
1222 phba->fc_npr_cnt = 0;
1223 phba->fc_unused_cnt= 0;
1224 return;
1225}
1226
1227static void
1228lpfc_establish_link_tmo(unsigned long ptr)
1229{
1230 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
1231 unsigned long iflag;
1232
1233
1234 /* Re-establishing Link, timer expired */
1235 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
1236 "%d:1300 Re-establishing Link, timer expired "
1237 "Data: x%x x%x\n",
1238 phba->brd_no, phba->fc_flag, phba->hba_state);
1239 spin_lock_irqsave(phba->host->host_lock, iflag);
1240 phba->fc_flag &= ~FC_ESTABLISH_LINK;
1241 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1242}
1243
1244static int
1245lpfc_stop_timer(struct lpfc_hba * phba)
1246{
1247 struct lpfc_sli *psli = &phba->sli;
1248
1249 /* Instead of a timer, this has been converted to a
1250 * deferred procedding list.
1251 */
1252 while (!list_empty(&phba->freebufList)) {
1253
1254 struct lpfc_dmabuf *mp = NULL;
1255
1256 list_remove_head((&phba->freebufList), mp,
1257 struct lpfc_dmabuf, list);
1258 if (mp) {
1259 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1260 kfree(mp);
1261 }
1262 }
1263
875fbdfe 1264 del_timer_sync(&phba->fcp_poll_timer);
dea3101e 1265 del_timer_sync(&phba->fc_estabtmo);
1266 del_timer_sync(&phba->fc_disctmo);
1267 del_timer_sync(&phba->fc_fdmitmo);
1268 del_timer_sync(&phba->els_tmofunc);
1269 psli = &phba->sli;
1270 del_timer_sync(&psli->mbox_tmo);
1271 return(1);
1272}
1273
1274int
1275lpfc_online(struct lpfc_hba * phba)
1276{
1277 if (!phba)
1278 return 0;
1279
1280 if (!(phba->fc_flag & FC_OFFLINE_MODE))
1281 return 0;
1282
1283 lpfc_printf_log(phba,
1284 KERN_WARNING,
1285 LOG_INIT,
1286 "%d:0458 Bring Adapter online\n",
1287 phba->brd_no);
1288
1289 if (!lpfc_sli_queue_setup(phba))
1290 return 1;
1291
1292 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */
1293 return 1;
1294
1295 spin_lock_irq(phba->host->host_lock);
1296 phba->fc_flag &= ~FC_OFFLINE_MODE;
1297 spin_unlock_irq(phba->host->host_lock);
1298
dea3101e 1299 return 0;
1300}
1301
1302int
1303lpfc_offline(struct lpfc_hba * phba)
1304{
1305 struct lpfc_sli_ring *pring;
1306 struct lpfc_sli *psli;
1307 unsigned long iflag;
1308 int i = 0;
1309
1310 if (!phba)
1311 return 0;
1312
1313 if (phba->fc_flag & FC_OFFLINE_MODE)
1314 return 0;
1315
dea3101e 1316 psli = &phba->sli;
1317 pring = &psli->ring[psli->fcp_ring];
1318
1319 lpfc_linkdown(phba);
1320
1321 /* The linkdown event takes 30 seconds to timeout. */
1322 while (pring->txcmplq_cnt) {
1323 mdelay(10);
1324 if (i++ > 3000)
1325 break;
1326 }
1327
1328 /* stop all timers associated with this hba */
1329 lpfc_stop_timer(phba);
1330 phba->work_hba_events = 0;
1331
1332 lpfc_printf_log(phba,
1333 KERN_WARNING,
1334 LOG_INIT,
1335 "%d:0460 Bring Adapter offline\n",
1336 phba->brd_no);
1337
1338 /* Bring down the SLI Layer and cleanup. The HBA is offline
1339 now. */
1340 lpfc_sli_hba_down(phba);
1341 lpfc_cleanup(phba, 1);
1342 spin_lock_irqsave(phba->host->host_lock, iflag);
1343 phba->fc_flag |= FC_OFFLINE_MODE;
1344 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1345 return 0;
1346}
1347
1348/******************************************************************************
1349* Function name: lpfc_scsi_free
1350*
1351* Description: Called from lpfc_pci_remove_one free internal driver resources
1352*
1353******************************************************************************/
1354static int
1355lpfc_scsi_free(struct lpfc_hba * phba)
1356{
1357 struct lpfc_scsi_buf *sb, *sb_next;
1358 struct lpfc_iocbq *io, *io_next;
1359
1360 spin_lock_irq(phba->host->host_lock);
1361 /* Release all the lpfc_scsi_bufs maintained by this host. */
1362 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) {
1363 list_del(&sb->list);
1364 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
1365 sb->dma_handle);
1366 kfree(sb);
1367 phba->total_scsi_bufs--;
1368 }
1369
1370 /* Release all the lpfc_iocbq entries maintained by this host. */
1371 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
1372 list_del(&io->list);
1373 kfree(io);
1374 phba->total_iocbq_bufs--;
1375 }
1376
1377 spin_unlock_irq(phba->host->host_lock);
1378
1379 return 0;
1380}
1381
1382
1383static int __devinit
1384lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1385{
1386 struct Scsi_Host *host;
1387 struct lpfc_hba *phba;
1388 struct lpfc_sli *psli;
1389 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
1390 unsigned long bar0map_len, bar2map_len;
1391 int error = -ENODEV, retval;
1392 int i;
604a3e30 1393 uint16_t iotag;
dea3101e 1394
1395 if (pci_enable_device(pdev))
1396 goto out;
1397 if (pci_request_regions(pdev, LPFC_DRIVER_NAME))
1398 goto out_disable_device;
1399
f888ba3c 1400 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba));
dea3101e 1401 if (!host)
1402 goto out_release_regions;
1403
1404 phba = (struct lpfc_hba*)host->hostdata;
1405 memset(phba, 0, sizeof (struct lpfc_hba));
dea3101e 1406 phba->host = host;
1407
1408 phba->fc_flag |= FC_LOADING;
1409 phba->pcidev = pdev;
1410
1411 /* Assign an unused board number */
1412 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL))
1413 goto out_put_host;
1414
1415 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no);
1416 if (error)
1417 goto out_put_host;
1418
1419 host->unique_id = phba->brd_no;
6175c02a 1420 init_MUTEX(&phba->hba_can_block);
dea3101e 1421 INIT_LIST_HEAD(&phba->ctrspbuflist);
1422 INIT_LIST_HEAD(&phba->rnidrspbuflist);
1423 INIT_LIST_HEAD(&phba->freebufList);
1424
1425 /* Initialize timers used by driver */
1426 init_timer(&phba->fc_estabtmo);
1427 phba->fc_estabtmo.function = lpfc_establish_link_tmo;
1428 phba->fc_estabtmo.data = (unsigned long)phba;
1429 init_timer(&phba->fc_disctmo);
1430 phba->fc_disctmo.function = lpfc_disc_timeout;
1431 phba->fc_disctmo.data = (unsigned long)phba;
1432
1433 init_timer(&phba->fc_fdmitmo);
1434 phba->fc_fdmitmo.function = lpfc_fdmi_tmo;
1435 phba->fc_fdmitmo.data = (unsigned long)phba;
1436 init_timer(&phba->els_tmofunc);
1437 phba->els_tmofunc.function = lpfc_els_timeout;
1438 phba->els_tmofunc.data = (unsigned long)phba;
1439 psli = &phba->sli;
1440 init_timer(&psli->mbox_tmo);
1441 psli->mbox_tmo.function = lpfc_mbox_timeout;
1442 psli->mbox_tmo.data = (unsigned long)phba;
1443
875fbdfe
JSEC		 1444 init_timer(&phba->fcp_poll_timer);
1445 phba->fcp_poll_timer.function = lpfc_poll_timeout;
1446 phba->fcp_poll_timer.data = (unsigned long)phba;
1447
dea3101e 1448 /*
1449 * Get all the module params for configuring this host and then
1450 * establish the host parameters.
1451 */
1452 lpfc_get_cfgparam(phba);
1453
1454 host->max_id = LPFC_MAX_TARGET;
1455 host->max_lun = phba->cfg_max_luns;
1456 host->this_id = -1;
1457
1458 /* Initialize all internally managed lists. */
1459 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1460 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1461 INIT_LIST_HEAD(&phba->fc_unused_list);
1462 INIT_LIST_HEAD(&phba->fc_plogi_list);
1463 INIT_LIST_HEAD(&phba->fc_adisc_list);
1464 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1465 INIT_LIST_HEAD(&phba->fc_prli_list);
1466 INIT_LIST_HEAD(&phba->fc_npr_list);
1467
1468
1469 pci_set_master(pdev);
1470 retval = pci_set_mwi(pdev);
1471 if (retval)
1472 dev_printk(KERN_WARNING, &pdev->dev,
1473 "Warning: pci_set_mwi returned %d\n", retval);
1474
1475 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
1476 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
1477 goto out_idr_remove;
1478
1479 /*
1480 * Get the bus address of Bar0 and Bar2 and the number of bytes
1481 * required by each mapping.
1482 */
1483 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0);
1484 bar0map_len = pci_resource_len(phba->pcidev, 0);
1485
1486 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
1487 bar2map_len = pci_resource_len(phba->pcidev, 2);
1488
901a920f 1489 /* Map HBA SLIM to a kernel virtual address. */
dea3101e 1490 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
901a920f
JW		 1491 if (!phba->slim_memmap_p) {
1492 error = -ENODEV;
1493 dev_printk(KERN_ERR, &pdev->dev,
1494 "ioremap failed for SLIM memory.\n");
1495 goto out_idr_remove;
1496 }
1497
1498 /* Map HBA Control Registers to a kernel virtual address. */
dea3101e 1499 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
901a920f
JW		 1500 if (!phba->ctrl_regs_memmap_p) {
1501 error = -ENODEV;
1502 dev_printk(KERN_ERR, &pdev->dev,
1503 "ioremap failed for HBA control registers.\n");
1504 goto out_iounmap_slim;
1505 }
dea3101e 1506
1507 /* Allocate memory for SLI-2 structures */
1508 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
1509 &phba->slim2p_mapping, GFP_KERNEL);
1510 if (!phba->slim2p)
1511 goto out_iounmap;
1512
f91b392c 1513 memset(phba->slim2p, 0, SLI2_SLIM_SIZE);
dea3101e 1514
1515 /* Initialize the SLI Layer to run with lpfc HBAs. */
1516 lpfc_sli_setup(phba);
1517 lpfc_sli_queue_setup(phba);
1518
1519 error = lpfc_mem_alloc(phba);
1520 if (error)
1521 goto out_free_slim;
1522
1523 /* Initialize and populate the iocb list per host. */
1524 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
1525 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
1526 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
1527 if (iocbq_entry == NULL) {
1528 printk(KERN_ERR "%s: only allocated %d iocbs of "
1529 "expected %d count. Unloading driver.\n",
1530 __FUNCTION__, i, LPFC_IOCB_LIST_CNT);
1531 error = -ENOMEM;
1532 goto out_free_iocbq;
1533 }
1534
1535 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
604a3e30
JB		 1536 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
1537 if (iotag == 0) {
1538 kfree (iocbq_entry);
1539 printk(KERN_ERR "%s: failed to allocate IOTAG. "
1540 "Unloading driver.\n",
1541 __FUNCTION__);
1542 error = -ENOMEM;
1543 goto out_free_iocbq;
1544 }
dea3101e 1545 spin_lock_irq(phba->host->host_lock);
1546 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
1547 phba->total_iocbq_bufs++;
1548 spin_unlock_irq(phba->host->host_lock);
1549 }
1550
1551 /* Initialize HBA structure */
1552 phba->fc_edtov = FF_DEF_EDTOV;
1553 phba->fc_ratov = FF_DEF_RATOV;
1554 phba->fc_altov = FF_DEF_ALTOV;
1555 phba->fc_arbtov = FF_DEF_ARBTOV;
1556
1557 INIT_LIST_HEAD(&phba->work_list);
1558 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
1559 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
1560
1561 /* Startup the kernel thread for this host adapter. */
1562 phba->worker_thread = kthread_run(lpfc_do_work, phba,
1563 "lpfc_worker_%d", phba->brd_no);
1564 if (IS_ERR(phba->worker_thread)) {
1565 error = PTR_ERR(phba->worker_thread);
1566 goto out_free_iocbq;
1567 }
1568
1569 /* We can rely on a queue depth attribute only after SLI HBA setup */
1570 host->can_queue = phba->cfg_hba_queue_depth - 10;
1571
1572 /* Tell the midlayer we support 16 byte commands */
1573 host->max_cmd_len = 16;
1574
1575 /* Initialize the list of scsi buffers used by driver for scsi IO. */
875fbdfe 1576 spin_lock_init(&phba->scsi_buf_list_lock);
dea3101e 1577 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
1578
1579 host->transportt = lpfc_transport_template;
dea3101e 1580 pci_set_drvdata(pdev, host);
1581 error = scsi_add_host(host, &pdev->dev);
1582 if (error)
1583 goto out_kthread_stop;
1584
1585 error = lpfc_alloc_sysfs_attr(phba);
1586 if (error)
1587 goto out_kthread_stop;
1588
1589 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ,
1590 LPFC_DRIVER_NAME, phba);
1591 if (error) {
1592 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1593 "%d:0451 Enable interrupt handler failed\n",
1594 phba->brd_no);
1595 goto out_free_sysfs_attr;
1596 }
1597 phba->MBslimaddr = phba->slim_memmap_p;
1598 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
1599 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
1600 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
1601 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
1602
1603 error = lpfc_sli_hba_setup(phba);
1604 if (error)
1605 goto out_free_irq;
1606
875fbdfe
JSEC		 1607 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
1608 spin_lock_irq(phba->host->host_lock);
1609 lpfc_poll_start_timer(phba);
1610 spin_unlock_irq(phba->host->host_lock);
1611 }
1612
dea3101e 1613 /*
1614 * set fixed host attributes
1615 * Must done after lpfc_sli_hba_setup()
1616 */
1617
68ce1eb5
AM		 1618 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
1619 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
dea3101e 1620 fc_host_supported_classes(host) = FC_COS_CLASS3;
1621
1622 memset(fc_host_supported_fc4s(host), 0,
1623 sizeof(fc_host_supported_fc4s(host)));
1624 fc_host_supported_fc4s(host)[2] = 1;
1625 fc_host_supported_fc4s(host)[7] = 1;
1626
1627 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
1628
1629 fc_host_supported_speeds(host) = 0;
1630 switch (FC_JEDEC_ID(phba->vpd.rev.biuRev)) {
1631 case VIPER_JEDEC_ID:
1632 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
1633 break;
1634 case HELIOS_JEDEC_ID:
1635 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
1636 /* Fall through */
1637 case CENTAUR_2G_JEDEC_ID:
1638 case PEGASUS_JEDEC_ID:
1639 case THOR_JEDEC_ID:
1640 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
1641 /* Fall through */
1642 default:
1643 fc_host_supported_speeds(host) = FC_PORTSPEED_1GBIT;
1644 }
1645
1646 fc_host_maxframe_size(host) =
1647 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
1648 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb);
1649
1650 /* This value is also unchanging */
1651 memset(fc_host_active_fc4s(host), 0,
1652 sizeof(fc_host_active_fc4s(host)));
1653 fc_host_active_fc4s(host)[2] = 1;
1654 fc_host_active_fc4s(host)[7] = 1;
1655
1656 spin_lock_irq(phba->host->host_lock);
1657 phba->fc_flag &= ~FC_LOADING;
1658 spin_unlock_irq(phba->host->host_lock);
1659 return 0;
1660
1661out_free_irq:
1662 lpfc_stop_timer(phba);
1663 phba->work_hba_events = 0;
1664 free_irq(phba->pcidev->irq, phba);
1665out_free_sysfs_attr:
1666 lpfc_free_sysfs_attr(phba);
1667out_kthread_stop:
1668 kthread_stop(phba->worker_thread);
1669out_free_iocbq:
1670 list_for_each_entry_safe(iocbq_entry, iocbq_next,
1671 &phba->lpfc_iocb_list, list) {
1672 spin_lock_irq(phba->host->host_lock);
1673 kfree(iocbq_entry);
1674 phba->total_iocbq_bufs--;
1675 spin_unlock_irq(phba->host->host_lock);
1676 }
1677 lpfc_mem_free(phba);
1678out_free_slim:
1679 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p,
1680 phba->slim2p_mapping);
1681out_iounmap:
1682 iounmap(phba->ctrl_regs_memmap_p);
901a920f 1683out_iounmap_slim:
dea3101e 1684 iounmap(phba->slim_memmap_p);
1685out_idr_remove:
1686 idr_remove(&lpfc_hba_index, phba->brd_no);
1687out_put_host:
1688 scsi_host_put(host);
1689out_release_regions:
1690 pci_release_regions(pdev);
1691out_disable_device:
1692 pci_disable_device(pdev);
1693out:
1694 return error;
1695}
1696
1697static void __devexit
1698lpfc_pci_remove_one(struct pci_dev *pdev)
1699{
1700 struct Scsi_Host *host = pci_get_drvdata(pdev);
7f0b5b19 1701 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
dea3101e 1702 unsigned long iflag;
1703
1704 lpfc_free_sysfs_attr(phba);
1705
1706 spin_lock_irqsave(phba->host->host_lock, iflag);
1707 phba->fc_flag |= FC_UNLOADING;
1708
1709 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1710
1711 fc_remove_host(phba->host);
1712 scsi_remove_host(phba->host);
1713
1714 kthread_stop(phba->worker_thread);
1715
1716 /*
1717 * Bring down the SLI Layer. This step disable all interrupts,
1718 * clears the rings, discards all mailbox commands, and resets
1719 * the HBA.
1720 */
1721 lpfc_sli_hba_down(phba);
41415862 1722 lpfc_sli_brdrestart(phba);
dea3101e 1723
1724 /* Release the irq reservation */
1725 free_irq(phba->pcidev->irq, phba);
1726
1727 lpfc_cleanup(phba, 0);
1728 lpfc_stop_timer(phba);
1729 phba->work_hba_events = 0;
1730
1731 /*
1732 * Call scsi_free before mem_free since scsi bufs are released to their
1733 * corresponding pools here.
1734 */
1735 lpfc_scsi_free(phba);
1736 lpfc_mem_free(phba);
1737
1738 /* Free resources associated with SLI2 interface */
1739 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
1740 phba->slim2p, phba->slim2p_mapping);
1741
1742 /* unmap adapter SLIM and Control Registers */
1743 iounmap(phba->ctrl_regs_memmap_p);
1744 iounmap(phba->slim_memmap_p);
1745
1746 pci_release_regions(phba->pcidev);
1747 pci_disable_device(phba->pcidev);
1748
1749 idr_remove(&lpfc_hba_index, phba->brd_no);
1750 scsi_host_put(phba->host);
1751
1752 pci_set_drvdata(pdev, NULL);
1753}
1754
1755static struct pci_device_id lpfc_id_table[] = {
1756 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
1757 PCI_ANY_ID, PCI_ANY_ID, },
06325e74
JSEC		 1758 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
1759 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1760 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
1761 PCI_ANY_ID, PCI_ANY_ID, },
1762 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
1763 PCI_ANY_ID, PCI_ANY_ID, },
1764 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR,
1765 PCI_ANY_ID, PCI_ANY_ID, },
1766 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY,
1767 PCI_ANY_ID, PCI_ANY_ID, },
1768 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY,
1769 PCI_ANY_ID, PCI_ANY_ID, },
1770 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY,
1771 PCI_ANY_ID, PCI_ANY_ID, },
1772 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
1773 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1774 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE,
1775 PCI_ANY_ID, PCI_ANY_ID, },
1776 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP,
1777 PCI_ANY_ID, PCI_ANY_ID, },
1778 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP,
1779 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1780 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
1781 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1782 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP,
1783 PCI_ANY_ID, PCI_ANY_ID, },
1784 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP,
1785 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1786 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
1787 PCI_ANY_ID, PCI_ANY_ID, },
1788 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
1789 PCI_ANY_ID, PCI_ANY_ID, },
1790 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
1791 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1792 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP,
1793 PCI_ANY_ID, PCI_ANY_ID, },
1794 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP,
1795 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1796 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
1797 PCI_ANY_ID, PCI_ANY_ID, },
1798 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
1799 PCI_ANY_ID, PCI_ANY_ID, },
1800 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY,
1801 PCI_ANY_ID, PCI_ANY_ID, },
1802 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101,
1803 PCI_ANY_ID, PCI_ANY_ID, },
1804 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
1805 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1806 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S,
1807 PCI_ANY_ID, PCI_ANY_ID, },
1808 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S,
1809 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1810 { 0 }
1811};
1812
1813MODULE_DEVICE_TABLE(pci, lpfc_id_table);
1814
1815static struct pci_driver lpfc_driver = {
1816 .name = LPFC_DRIVER_NAME,
1817 .id_table = lpfc_id_table,
1818 .probe = lpfc_pci_probe_one,
1819 .remove = __devexit_p(lpfc_pci_remove_one),
1820};
1821
1822static int __init
1823lpfc_init(void)
1824{
1825 int error = 0;
1826
1827 printk(LPFC_MODULE_DESC "\n");
c44ce173 1828 printk(LPFC_COPYRIGHT "\n");
dea3101e 1829
1830 lpfc_transport_template =
1831 fc_attach_transport(&lpfc_transport_functions);
1832 if (!lpfc_transport_template)
1833 return -ENOMEM;
1834 error = pci_register_driver(&lpfc_driver);
1835 if (error)
1836 fc_release_transport(lpfc_transport_template);
1837
1838 return error;
1839}
1840
1841static void __exit
1842lpfc_exit(void)
1843{
1844 pci_unregister_driver(&lpfc_driver);
1845 fc_release_transport(lpfc_transport_template);
1846}
1847
1848module_init(lpfc_init);
1849module_exit(lpfc_exit);
1850MODULE_LICENSE("GPL");
1851MODULE_DESCRIPTION(LPFC_MODULE_DESC);
1852MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
1853MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Linux kernel - Deliverables
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