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[SCSI] lpfc 8.1.1 : Added code to adjust lun queue depth to avoid target overloading
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc_init.c
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dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173
JSEC		 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
dea3101e 22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/idr.h>
26#include <linux/interrupt.h>
27#include <linux/kthread.h>
28#include <linux/pci.h>
29#include <linux/spinlock.h>
30
91886523 31#include <scsi/scsi.h>
dea3101e 32#include <scsi/scsi_device.h>
33#include <scsi/scsi_host.h>
34#include <scsi/scsi_transport_fc.h>
35
36#include "lpfc_hw.h"
37#include "lpfc_sli.h"
38#include "lpfc_disc.h"
39#include "lpfc_scsi.h"
40#include "lpfc.h"
41#include "lpfc_logmsg.h"
42#include "lpfc_crtn.h"
43#include "lpfc_version.h"
44
45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *);
46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
47static int lpfc_post_rcv_buf(struct lpfc_hba *);
48
49static struct scsi_transport_template *lpfc_transport_template = NULL;
50static DEFINE_IDR(lpfc_hba_index);
51
52/************************************************************************/
53/* */
54/* lpfc_config_port_prep */
55/* This routine will do LPFC initialization prior to the */
56/* CONFIG_PORT mailbox command. This will be initialized */
57/* as a SLI layer callback routine. */
58/* This routine returns 0 on success or -ERESTART if it wants */
59/* the SLI layer to reset the HBA and try again. Any */
60/* other return value indicates an error. */
61/* */
62/************************************************************************/
63int
64lpfc_config_port_prep(struct lpfc_hba * phba)
65{
66 lpfc_vpd_t *vp = &phba->vpd;
67 int i = 0, rc;
68 LPFC_MBOXQ_t *pmb;
69 MAILBOX_t *mb;
70 char *lpfc_vpd_data = NULL;
71 uint16_t offset = 0;
72 static char licensed[56] =
73 "key unlock for use with gnu public licensed code only\0";
74
75 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
76 if (!pmb) {
77 phba->hba_state = LPFC_HBA_ERROR;
78 return -ENOMEM;
79 }
80
81 mb = &pmb->mb;
82 phba->hba_state = LPFC_INIT_MBX_CMDS;
83
84 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
85 uint32_t *ptext = (uint32_t *) licensed;
86
87 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
88 *ptext = cpu_to_be32(*ptext);
89
90 lpfc_read_nv(phba, pmb);
91 memset((char*)mb->un.varRDnvp.rsvd3, 0,
92 sizeof (mb->un.varRDnvp.rsvd3));
93 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
94 sizeof (licensed));
95
96 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
97
98 if (rc != MBX_SUCCESS) {
99 lpfc_printf_log(phba,
100 KERN_ERR,
101 LOG_MBOX,
102 "%d:0324 Config Port initialization "
103 "error, mbxCmd x%x READ_NVPARM, "
104 "mbxStatus x%x\n",
105 phba->brd_no,
106 mb->mbxCommand, mb->mbxStatus);
107 mempool_free(pmb, phba->mbox_mem_pool);
108 return -ERESTART;
109 }
110 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
111 sizeof (mb->un.varRDnvp.nodename));
112 }
113
114 /* Setup and issue mailbox READ REV command */
115 lpfc_read_rev(phba, pmb);
116 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
117 if (rc != MBX_SUCCESS) {
118 lpfc_printf_log(phba,
119 KERN_ERR,
120 LOG_INIT,
121 "%d:0439 Adapter failed to init, mbxCmd x%x "
122 "READ_REV, mbxStatus x%x\n",
123 phba->brd_no,
124 mb->mbxCommand, mb->mbxStatus);
125 mempool_free( pmb, phba->mbox_mem_pool);
126 return -ERESTART;
127 }
128
1de933f3
JSEC		 129 /*
130 * The value of rr must be 1 since the driver set the cv field to 1.
131 * This setting requires the FW to set all revision fields.
dea3101e 132 */
1de933f3 133 if (mb->un.varRdRev.rr == 0) {
dea3101e 134 vp->rev.rBit = 0;
1de933f3
JSEC		 135 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
136 "%d:0440 Adapter failed to init, READ_REV has "
137 "missing revision information.\n",
138 phba->brd_no);
dea3101e 139 mempool_free(pmb, phba->mbox_mem_pool);
140 return -ERESTART;
dea3101e 141 }
142
143 /* Save information as VPD data */
1de933f3
JSEC		 144 vp->rev.rBit = 1;
145 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
146 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
147 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
148 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 149 vp->rev.biuRev = mb->un.varRdRev.biuRev;
150 vp->rev.smRev = mb->un.varRdRev.smRev;
151 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
152 vp->rev.endecRev = mb->un.varRdRev.endecRev;
153 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
154 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
155 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
156 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
157 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
158 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
159
160 if (lpfc_is_LC_HBA(phba->pcidev->device))
161 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
162 sizeof (phba->RandomData));
163
164 /* Get the default values for Model Name and Description */
165 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
166
167 /* Get adapter VPD information */
168 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
169 if (!pmb->context2)
170 goto out_free_mbox;
171 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
172 if (!lpfc_vpd_data)
173 goto out_free_context2;
174
175 do {
176 lpfc_dump_mem(phba, pmb, offset);
177 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
178
179 if (rc != MBX_SUCCESS) {
180 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
181 "%d:0441 VPD not present on adapter, "
182 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
183 phba->brd_no,
184 mb->mbxCommand, mb->mbxStatus);
185 kfree(lpfc_vpd_data);
186 lpfc_vpd_data = NULL;
187 break;
188 }
189
190 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
191 mb->un.varDmp.word_cnt);
192 offset += mb->un.varDmp.word_cnt;
193 } while (mb->un.varDmp.word_cnt);
194 lpfc_parse_vpd(phba, lpfc_vpd_data);
195
196 kfree(lpfc_vpd_data);
197out_free_context2:
198 kfree(pmb->context2);
199out_free_mbox:
200 mempool_free(pmb, phba->mbox_mem_pool);
201 return 0;
202}
203
204/************************************************************************/
205/* */
206/* lpfc_config_port_post */
207/* This routine will do LPFC initialization after the */
208/* CONFIG_PORT mailbox command. This will be initialized */
209/* as a SLI layer callback routine. */
210/* This routine returns 0 on success. Any other return value */
211/* indicates an error. */
212/* */
213/************************************************************************/
214int
215lpfc_config_port_post(struct lpfc_hba * phba)
216{
217 LPFC_MBOXQ_t *pmb;
218 MAILBOX_t *mb;
219 struct lpfc_dmabuf *mp;
220 struct lpfc_sli *psli = &phba->sli;
221 uint32_t status, timeout;
222 int i, j, rc;
223
224 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb) {
226 phba->hba_state = LPFC_HBA_ERROR;
227 return -ENOMEM;
228 }
229 mb = &pmb->mb;
230
231 lpfc_config_link(phba, pmb);
232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233 if (rc != MBX_SUCCESS) {
234 lpfc_printf_log(phba,
235 KERN_ERR,
236 LOG_INIT,
237 "%d:0447 Adapter failed init, mbxCmd x%x "
238 "CONFIG_LINK mbxStatus x%x\n",
239 phba->brd_no,
240 mb->mbxCommand, mb->mbxStatus);
241 phba->hba_state = LPFC_HBA_ERROR;
242 mempool_free( pmb, phba->mbox_mem_pool);
243 return -EIO;
244 }
245
246 /* Get login parameters for NID. */
247 lpfc_read_sparam(phba, pmb);
248 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
249 lpfc_printf_log(phba,
250 KERN_ERR,
251 LOG_INIT,
252 "%d:0448 Adapter failed init, mbxCmd x%x "
253 "READ_SPARM mbxStatus x%x\n",
254 phba->brd_no,
255 mb->mbxCommand, mb->mbxStatus);
256 phba->hba_state = LPFC_HBA_ERROR;
257 mp = (struct lpfc_dmabuf *) pmb->context1;
258 mempool_free( pmb, phba->mbox_mem_pool);
259 lpfc_mbuf_free(phba, mp->virt, mp->phys);
260 kfree(mp);
261 return -EIO;
262 }
263
264 mp = (struct lpfc_dmabuf *) pmb->context1;
265
266 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
267 lpfc_mbuf_free(phba, mp->virt, mp->phys);
268 kfree(mp);
269 pmb->context1 = NULL;
270
271 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
272 sizeof (struct lpfc_name));
273 memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
274 sizeof (struct lpfc_name));
275 /* If no serial number in VPD data, use low 6 bytes of WWNN */
276 /* This should be consolidated into parse_vpd ? - mr */
277 if (phba->SerialNumber[0] == 0) {
278 uint8_t *outptr;
279
68ce1eb5 280 outptr = &phba->fc_nodename.u.s.IEEE[0];
dea3101e 281 for (i = 0; i < 12; i++) {
282 status = *outptr++;
283 j = ((status & 0xf0) >> 4);
284 if (j <= 9)
285 phba->SerialNumber[i] =
286 (char)((uint8_t) 0x30 + (uint8_t) j);
287 else
288 phba->SerialNumber[i] =
289 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
290 i++;
291 j = (status & 0xf);
292 if (j <= 9)
293 phba->SerialNumber[i] =
294 (char)((uint8_t) 0x30 + (uint8_t) j);
295 else
296 phba->SerialNumber[i] =
297 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
298 }
299 }
300
301 /* This should turn on DELAYED ABTS for ELS timeouts */
302 lpfc_set_slim(phba, pmb, 0x052198, 0x1);
303 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
304 phba->hba_state = LPFC_HBA_ERROR;
305 mempool_free( pmb, phba->mbox_mem_pool);
306 return -EIO;
307 }
308
309
310 lpfc_read_config(phba, pmb);
311 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
312 lpfc_printf_log(phba,
313 KERN_ERR,
314 LOG_INIT,
315 "%d:0453 Adapter failed to init, mbxCmd x%x "
316 "READ_CONFIG, mbxStatus x%x\n",
317 phba->brd_no,
318 mb->mbxCommand, mb->mbxStatus);
319 phba->hba_state = LPFC_HBA_ERROR;
320 mempool_free( pmb, phba->mbox_mem_pool);
321 return -EIO;
322 }
323
324 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
325 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
326 phba->cfg_hba_queue_depth =
327 mb->un.varRdConfig.max_xri + 1;
328
329 phba->lmt = mb->un.varRdConfig.lmt;
330 /* HBA is not 4GB capable, or HBA is not 2GB capable,
331 don't let link speed ask for it */
332 if ((((phba->lmt & LMT_4250_10bit) != LMT_4250_10bit) &&
333 (phba->cfg_link_speed > LINK_SPEED_2G)) ||
334 (((phba->lmt & LMT_2125_10bit) != LMT_2125_10bit) &&
335 (phba->cfg_link_speed > LINK_SPEED_1G))) {
336 /* Reset link speed to auto. 1G/2GB HBA cfg'd for 4G */
337 lpfc_printf_log(phba,
338 KERN_WARNING,
339 LOG_LINK_EVENT,
340 "%d:1302 Invalid speed for this board: "
341 "Reset link speed to auto: x%x\n",
342 phba->brd_no,
343 phba->cfg_link_speed);
344 phba->cfg_link_speed = LINK_SPEED_AUTO;
345 }
346
347 phba->hba_state = LPFC_LINK_DOWN;
348
349 /* Only process IOCBs on ring 0 till hba_state is READY */
350 if (psli->ring[psli->ip_ring].cmdringaddr)
351 psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT;
352 if (psli->ring[psli->fcp_ring].cmdringaddr)
353 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
354 if (psli->ring[psli->next_ring].cmdringaddr)
355 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
356
357 /* Post receive buffers for desired rings */
358 lpfc_post_rcv_buf(phba);
359
360 /* Enable appropriate host interrupts */
361 spin_lock_irq(phba->host->host_lock);
362 status = readl(phba->HCregaddr);
363 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
364 if (psli->num_rings > 0)
365 status |= HC_R0INT_ENA;
366 if (psli->num_rings > 1)
367 status |= HC_R1INT_ENA;
368 if (psli->num_rings > 2)
369 status |= HC_R2INT_ENA;
370 if (psli->num_rings > 3)
371 status |= HC_R3INT_ENA;
372
875fbdfe
JSEC		 373 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
374 (phba->cfg_poll & DISABLE_FCP_RING_INT))
375 status &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
376
dea3101e 377 writel(status, phba->HCregaddr);
378 readl(phba->HCregaddr); /* flush */
379 spin_unlock_irq(phba->host->host_lock);
380
381 /*
382 * Setup the ring 0 (els) timeout handler
383 */
384 timeout = phba->fc_ratov << 1;
385 phba->els_tmofunc.expires = jiffies + HZ * timeout;
386 add_timer(&phba->els_tmofunc);
387
388 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
389 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
390 if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) {
391 lpfc_printf_log(phba,
392 KERN_ERR,
393 LOG_INIT,
394 "%d:0454 Adapter failed to init, mbxCmd x%x "
395 "INIT_LINK, mbxStatus x%x\n",
396 phba->brd_no,
397 mb->mbxCommand, mb->mbxStatus);
398
399 /* Clear all interrupt enable conditions */
400 writel(0, phba->HCregaddr);
401 readl(phba->HCregaddr); /* flush */
402 /* Clear all pending interrupts */
403 writel(0xffffffff, phba->HAregaddr);
404 readl(phba->HAregaddr); /* flush */
405
406 phba->hba_state = LPFC_HBA_ERROR;
407 mempool_free(pmb, phba->mbox_mem_pool);
408 return -EIO;
409 }
410 /* MBOX buffer will be freed in mbox compl */
411
412 i = 0;
413 while ((phba->hba_state != LPFC_HBA_READY) ||
414 (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
415 ((phba->fc_map_cnt == 0) && (i<2)) ||
416 (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
417 /* Check every second for 30 retries. */
418 i++;
419 if (i > 30) {
420 break;
421 }
422 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
423 /* The link is down. Set linkdown timeout */
424 break;
425 }
426
427 /* Delay for 1 second to give discovery time to complete. */
428 msleep(1000);
429
430 }
431
432 /* Since num_disc_nodes keys off of PLOGI, delay a bit to let
433 * any potential PRLIs to flush thru the SLI sub-system.
434 */
435 msleep(50);
436
437 return (0);
438}
439
440/************************************************************************/
441/* */
442/* lpfc_hba_down_prep */
443/* This routine will do LPFC uninitialization before the */
444/* HBA is reset when bringing down the SLI Layer. This will be */
445/* initialized as a SLI layer callback routine. */
446/* This routine returns 0 on success. Any other return value */
447/* indicates an error. */
448/* */
449/************************************************************************/
450int
451lpfc_hba_down_prep(struct lpfc_hba * phba)
452{
453 /* Disable interrupts */
454 writel(0, phba->HCregaddr);
455 readl(phba->HCregaddr); /* flush */
456
457 /* Cleanup potential discovery resources */
458 lpfc_els_flush_rscn(phba);
459 lpfc_els_flush_cmd(phba);
460 lpfc_disc_flush_list(phba);
461
462 return (0);
463}
464
465/************************************************************************/
466/* */
467/* lpfc_handle_eratt */
468/* This routine will handle processing a Host Attention */
469/* Error Status event. This will be initialized */
470/* as a SLI layer callback routine. */
471/* */
472/************************************************************************/
473void
474lpfc_handle_eratt(struct lpfc_hba * phba)
475{
476 struct lpfc_sli *psli = &phba->sli;
477 struct lpfc_sli_ring *pring;
478
479 /*
480 * If a reset is sent to the HBA restore PCI configuration registers.
481 */
482 if ( phba->hba_state == LPFC_INIT_START ) {
483 mdelay(1);
484 readl(phba->HCregaddr); /* flush */
485 writel(0, phba->HCregaddr);
486 readl(phba->HCregaddr); /* flush */
487
488 /* Restore PCI cmd register */
489 pci_write_config_word(phba->pcidev,
490 PCI_COMMAND, phba->pci_cfg_value);
491 }
492
493 if (phba->work_hs & HS_FFER6) {
494 /* Re-establishing Link */
495 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
496 "%d:1301 Re-establishing Link "
497 "Data: x%x x%x x%x\n",
498 phba->brd_no, phba->work_hs,
499 phba->work_status[0], phba->work_status[1]);
500 spin_lock_irq(phba->host->host_lock);
501 phba->fc_flag |= FC_ESTABLISH_LINK;
502 spin_unlock_irq(phba->host->host_lock);
503
504 /*
505 * Firmware stops when it triggled erratt with HS_FFER6.
506 * That could cause the I/Os dropped by the firmware.
507 * Error iocb (I/O) on txcmplq and let the SCSI layer
508 * retry it after re-establishing link.
509 */
510 pring = &psli->ring[psli->fcp_ring];
511 lpfc_sli_abort_iocb_ring(phba, pring);
512
513
514 /*
515 * There was a firmware error. Take the hba offline and then
516 * attempt to restart it.
517 */
518 lpfc_offline(phba);
519 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
520 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
521 return;
522 }
523 } else {
524 /* The if clause above forces this code path when the status
525 * failure is a value other than FFER6. Do not call the offline
526 * twice. This is the adapter hardware error path.
527 */
528 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
529 "%d:0457 Adapter Hardware Error "
530 "Data: x%x x%x x%x\n",
531 phba->brd_no, phba->work_hs,
532 phba->work_status[0], phba->work_status[1]);
533
534 lpfc_offline(phba);
535
dea3101e 536 }
537}
538
539/************************************************************************/
540/* */
541/* lpfc_handle_latt */
542/* This routine will handle processing a Host Attention */
543/* Link Status event. This will be initialized */
544/* as a SLI layer callback routine. */
545/* */
546/************************************************************************/
547void
548lpfc_handle_latt(struct lpfc_hba * phba)
549{
550 struct lpfc_sli *psli = &phba->sli;
551 LPFC_MBOXQ_t *pmb;
552 volatile uint32_t control;
553 struct lpfc_dmabuf *mp;
554 int rc = -ENOMEM;
555
556 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
557 if (!pmb)
558 goto lpfc_handle_latt_err_exit;
559
560 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
561 if (!mp)
562 goto lpfc_handle_latt_free_pmb;
563
564 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
565 if (!mp->virt)
566 goto lpfc_handle_latt_free_mp;
567
568 rc = -EIO;
569
6281bfe0
JSEC		 570 /* Cleanup any outstanding ELS commands */
571 lpfc_els_flush_cmd(phba);
dea3101e 572
573 psli->slistat.link_event++;
574 lpfc_read_la(phba, pmb, mp);
575 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
576 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
577 if (rc == MBX_NOT_FINISHED)
578 goto lpfc_handle_latt_free_mp;
579
580 /* Clear Link Attention in HA REG */
581 spin_lock_irq(phba->host->host_lock);
582 writel(HA_LATT, phba->HAregaddr);
583 readl(phba->HAregaddr); /* flush */
584 spin_unlock_irq(phba->host->host_lock);
585
586 return;
587
588lpfc_handle_latt_free_mp:
589 kfree(mp);
590lpfc_handle_latt_free_pmb:
591 kfree(pmb);
592lpfc_handle_latt_err_exit:
593 /* Enable Link attention interrupts */
594 spin_lock_irq(phba->host->host_lock);
595 psli->sli_flag |= LPFC_PROCESS_LA;
596 control = readl(phba->HCregaddr);
597 control |= HC_LAINT_ENA;
598 writel(control, phba->HCregaddr);
599 readl(phba->HCregaddr); /* flush */
600
601 /* Clear Link Attention in HA REG */
602 writel(HA_LATT, phba->HAregaddr);
603 readl(phba->HAregaddr); /* flush */
604 spin_unlock_irq(phba->host->host_lock);
605 lpfc_linkdown(phba);
606 phba->hba_state = LPFC_HBA_ERROR;
607
608 /* The other case is an error from issue_mbox */
609 if (rc == -ENOMEM)
610 lpfc_printf_log(phba,
611 KERN_WARNING,
612 LOG_MBOX,
613 "%d:0300 READ_LA: no buffers\n",
614 phba->brd_no);
615
616 return;
617}
618
619/************************************************************************/
620/* */
621/* lpfc_parse_vpd */
622/* This routine will parse the VPD data */
623/* */
624/************************************************************************/
625static int
626lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd)
627{
628 uint8_t lenlo, lenhi;
629 uint32_t Length;
630 int i, j;
631 int finished = 0;
632 int index = 0;
633
634 if (!vpd)
635 return 0;
636
637 /* Vital Product */
638 lpfc_printf_log(phba,
639 KERN_INFO,
640 LOG_INIT,
641 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
642 phba->brd_no,
643 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
644 (uint32_t) vpd[3]);
645 do {
646 switch (vpd[index]) {
647 case 0x82:
648 index += 1;
649 lenlo = vpd[index];
650 index += 1;
651 lenhi = vpd[index];
652 index += 1;
653 i = ((((unsigned short)lenhi) << 8) + lenlo);
654 index += i;
655 break;
656 case 0x90:
657 index += 1;
658 lenlo = vpd[index];
659 index += 1;
660 lenhi = vpd[index];
661 index += 1;
662 Length = ((((unsigned short)lenhi) << 8) + lenlo);
663
664 while (Length > 0) {
665 /* Look for Serial Number */
666 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
667 index += 2;
668 i = vpd[index];
669 index += 1;
670 j = 0;
671 Length -= (3+i);
672 while(i--) {
673 phba->SerialNumber[j++] = vpd[index++];
674 if (j == 31)
675 break;
676 }
677 phba->SerialNumber[j] = 0;
678 continue;
679 }
680 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
681 phba->vpd_flag |= VPD_MODEL_DESC;
682 index += 2;
683 i = vpd[index];
684 index += 1;
685 j = 0;
686 Length -= (3+i);
687 while(i--) {
688 phba->ModelDesc[j++] = vpd[index++];
689 if (j == 255)
690 break;
691 }
692 phba->ModelDesc[j] = 0;
693 continue;
694 }
695 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
696 phba->vpd_flag |= VPD_MODEL_NAME;
697 index += 2;
698 i = vpd[index];
699 index += 1;
700 j = 0;
701 Length -= (3+i);
702 while(i--) {
703 phba->ModelName[j++] = vpd[index++];
704 if (j == 79)
705 break;
706 }
707 phba->ModelName[j] = 0;
708 continue;
709 }
710 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
711 phba->vpd_flag |= VPD_PROGRAM_TYPE;
712 index += 2;
713 i = vpd[index];
714 index += 1;
715 j = 0;
716 Length -= (3+i);
717 while(i--) {
718 phba->ProgramType[j++] = vpd[index++];
719 if (j == 255)
720 break;
721 }
722 phba->ProgramType[j] = 0;
723 continue;
724 }
725 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
726 phba->vpd_flag |= VPD_PORT;
727 index += 2;
728 i = vpd[index];
729 index += 1;
730 j = 0;
731 Length -= (3+i);
732 while(i--) {
733 phba->Port[j++] = vpd[index++];
734 if (j == 19)
735 break;
736 }
737 phba->Port[j] = 0;
738 continue;
739 }
740 else {
741 index += 2;
742 i = vpd[index];
743 index += 1;
744 index += i;
745 Length -= (3 + i);
746 }
747 }
748 finished = 0;
749 break;
750 case 0x78:
751 finished = 1;
752 break;
753 default:
754 index ++;
755 break;
756 }
757 } while (!finished && (index < 108));
758
759 return(1);
760}
761
762static void
763lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
764{
765 lpfc_vpd_t *vp;
e4adb204 766 uint16_t dev_id;
5cc36b3c 767 uint16_t dev_subid;
964b77e7 768 uint8_t hdrtype;
5cc36b3c 769 char *model_str = "";
dea3101e 770
771 vp = &phba->vpd;
e4adb204 772 pci_read_config_word(phba->pcidev, PCI_DEVICE_ID, &dev_id);
964b77e7 773 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
dea3101e 774
e4adb204 775 switch (dev_id) {
06325e74 776 case PCI_DEVICE_ID_FIREFLY:
5cc36b3c 777 model_str = "LP6000 1Gb PCI";
06325e74 778 break;
dea3101e 779 case PCI_DEVICE_ID_SUPERFLY:
780 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
5cc36b3c 781 model_str = "LP7000 1Gb PCI";
dea3101e 782 else
5cc36b3c 783 model_str = "LP7000E 1Gb PCI";
dea3101e 784 break;
785 case PCI_DEVICE_ID_DRAGONFLY:
5cc36b3c 786 model_str = "LP8000 1Gb PCI";
dea3101e 787 break;
788 case PCI_DEVICE_ID_CENTAUR:
789 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
5cc36b3c 790 model_str = "LP9002 2Gb PCI";
dea3101e 791 else
5cc36b3c 792 model_str = "LP9000 1Gb PCI";
dea3101e 793 break;
794 case PCI_DEVICE_ID_RFLY:
5cc36b3c 795 model_str = "LP952 2Gb PCI";
dea3101e 796 break;
797 case PCI_DEVICE_ID_PEGASUS:
5cc36b3c 798 model_str = "LP9802 2Gb PCI-X";
dea3101e 799 break;
800 case PCI_DEVICE_ID_THOR:
964b77e7 801 if (hdrtype == 0x80)
5cc36b3c 802 model_str = "LP10000DC 2Gb 2-port PCI-X";
964b77e7 803 else
5cc36b3c 804 model_str = "LP10000 2Gb PCI-X";
dea3101e 805 break;
806 case PCI_DEVICE_ID_VIPER:
5cc36b3c 807 model_str = "LPX1000 10Gb PCI-X";
dea3101e 808 break;
809 case PCI_DEVICE_ID_PFLY:
5cc36b3c 810 model_str = "LP982 2Gb PCI-X";
dea3101e 811 break;
812 case PCI_DEVICE_ID_TFLY:
964b77e7 813 if (hdrtype == 0x80)
5cc36b3c 814 model_str = "LP1050DC 2Gb 2-port PCI-X";
964b77e7 815 else
5cc36b3c 816 model_str = "LP1050 2Gb PCI-X";
dea3101e 817 break;
818 case PCI_DEVICE_ID_HELIOS:
964b77e7 819 if (hdrtype == 0x80)
5cc36b3c 820 model_str = "LP11002 4Gb 2-port PCI-X2";
964b77e7 821 else
5cc36b3c 822 model_str = "LP11000 4Gb PCI-X2";
dea3101e 823 break;
e4adb204 824 case PCI_DEVICE_ID_HELIOS_SCSP:
5cc36b3c 825 model_str = "LP11000-SP 4Gb PCI-X2";
e4adb204
JSEC		 826 break;
827 case PCI_DEVICE_ID_HELIOS_DCSP:
5cc36b3c 828 model_str = "LP11002-SP 4Gb 2-port PCI-X2";
e4adb204
JSEC		 829 break;
830 case PCI_DEVICE_ID_NEPTUNE:
831 if (hdrtype == 0x80)
5cc36b3c 832 model_str = "LPe1002 4Gb 2-port";
e4adb204 833 else
5cc36b3c 834 model_str = "LPe1000 4Gb PCIe";
e4adb204
JSEC		 835 break;
836 case PCI_DEVICE_ID_NEPTUNE_SCSP:
5cc36b3c 837 model_str = "LPe1000-SP 4Gb PCIe";
e4adb204
JSEC		 838 break;
839 case PCI_DEVICE_ID_NEPTUNE_DCSP:
5cc36b3c 840 model_str = "LPe1002-SP 4Gb 2-port PCIe";
e4adb204 841 break;
dea3101e 842 case PCI_DEVICE_ID_BMID:
5cc36b3c 843 model_str = "LP1150 4Gb PCI-X2";
dea3101e 844 break;
845 case PCI_DEVICE_ID_BSMB:
5cc36b3c 846 model_str = "LP111 4Gb PCI-X2";
dea3101e 847 break;
848 case PCI_DEVICE_ID_ZEPHYR:
964b77e7 849 if (hdrtype == 0x80)
5cc36b3c 850 model_str = "LPe11002 4Gb 2-port PCIe";
964b77e7 851 else
5cc36b3c 852 model_str = "LPe11000 4Gb PCIe";
dea3101e 853 break;
e4adb204 854 case PCI_DEVICE_ID_ZEPHYR_SCSP:
5cc36b3c 855 model_str = "LPe11000-SP 4Gb PCIe";
e4adb204
JSEC		 856 break;
857 case PCI_DEVICE_ID_ZEPHYR_DCSP:
5cc36b3c 858 model_str = "LPe11002-SP 4Gb 2-port PCIe";
e4adb204 859 break;
dea3101e 860 case PCI_DEVICE_ID_ZMID:
5cc36b3c 861 model_str = "LPe1150 4Gb PCIe";
dea3101e 862 break;
863 case PCI_DEVICE_ID_ZSMB:
5cc36b3c 864 model_str = "LPe111 4Gb PCIe";
dea3101e 865 break;
866 case PCI_DEVICE_ID_LP101:
5cc36b3c 867 model_str = "LP101 2Gb PCI-X";
dea3101e 868 break;
869 case PCI_DEVICE_ID_LP10000S:
5cc36b3c 870 model_str = "LP10000-S 2Gb PCI";
06325e74 871 break;
e4adb204 872 case PCI_DEVICE_ID_LP11000S:
e4adb204 873 case PCI_DEVICE_ID_LPE11000S:
5cc36b3c
JSEC		 874 pci_read_config_word(phba->pcidev, PCI_SUBSYSTEM_ID,
875 &dev_subid);
876 switch (dev_subid) {
877 case PCI_SUBSYSTEM_ID_LP11000S:
878 model_str = "LP11002-S 4Gb PCI-X2";
879 break;
880 case PCI_SUBSYSTEM_ID_LP11002S:
881 model_str = "LP11000-S 4Gb 2-port PCI-X2";
882 break;
883 case PCI_SUBSYSTEM_ID_LPE11000S:
884 model_str = "LPe11002-S 4Gb PCIe";
885 break;
886 case PCI_SUBSYSTEM_ID_LPE11002S:
887 model_str = "LPe11002-S 4Gb 2-port PCIe";
888 break;
889 case PCI_SUBSYSTEM_ID_LPE11010S:
890 model_str = "LPe11010-S 4Gb 10-port PCIe";
891 break;
892 default:
893 break;
894 }
895 break;
896 default:
e4adb204 897 break;
dea3101e 898 }
899 if (mdp)
5cc36b3c 900 sscanf(model_str, "%s", mdp);
dea3101e 901 if (descp)
5cc36b3c 902 sprintf(descp, "Emulex %s Fibre Channel Adapter", model_str);
dea3101e 903}
904
905/**************************************************/
906/* lpfc_post_buffer */
907/* */
908/* This routine will post count buffers to the */
909/* ring with the QUE_RING_BUF_CN command. This */
910/* allows 3 buffers / command to be posted. */
911/* Returns the number of buffers NOT posted. */
912/**************************************************/
913int
914lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
915 int type)
916{
917 IOCB_t *icmd;
0bd4ca25 918 struct lpfc_iocbq *iocb;
dea3101e 919 struct lpfc_dmabuf *mp1, *mp2;
920
921 cnt += pring->missbufcnt;
922
923 /* While there are buffers to post */
924 while (cnt > 0) {
925 /* Allocate buffer for command iocb */
926 spin_lock_irq(phba->host->host_lock);
0bd4ca25 927 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 928 spin_unlock_irq(phba->host->host_lock);
929 if (iocb == NULL) {
930 pring->missbufcnt = cnt;
931 return cnt;
932 }
dea3101e 933 icmd = &iocb->iocb;
934
935 /* 2 buffers can be posted per command */
936 /* Allocate buffer to post */
937 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
938 if (mp1)
939 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
940 &mp1->phys);
941 if (mp1 == 0 || mp1->virt == 0) {
c9475cb0 942 kfree(mp1);
dea3101e 943 spin_lock_irq(phba->host->host_lock);
604a3e30 944 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 945 spin_unlock_irq(phba->host->host_lock);
946 pring->missbufcnt = cnt;
947 return cnt;
948 }
949
950 INIT_LIST_HEAD(&mp1->list);
951 /* Allocate buffer to post */
952 if (cnt > 1) {
953 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
954 if (mp2)
955 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
956 &mp2->phys);
957 if (mp2 == 0 || mp2->virt == 0) {
c9475cb0 958 kfree(mp2);
dea3101e 959 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
960 kfree(mp1);
961 spin_lock_irq(phba->host->host_lock);
604a3e30 962 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 963 spin_unlock_irq(phba->host->host_lock);
964 pring->missbufcnt = cnt;
965 return cnt;
966 }
967
968 INIT_LIST_HEAD(&mp2->list);
969 } else {
970 mp2 = NULL;
971 }
972
973 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
974 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
975 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
976 icmd->ulpBdeCount = 1;
977 cnt--;
978 if (mp2) {
979 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
980 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
981 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
982 cnt--;
983 icmd->ulpBdeCount = 2;
984 }
985
986 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
987 icmd->ulpLe = 1;
988
989 spin_lock_irq(phba->host->host_lock);
990 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
991 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
992 kfree(mp1);
993 cnt++;
994 if (mp2) {
995 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
996 kfree(mp2);
997 cnt++;
998 }
604a3e30 999 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1000 pring->missbufcnt = cnt;
1001 spin_unlock_irq(phba->host->host_lock);
1002 return cnt;
1003 }
1004 spin_unlock_irq(phba->host->host_lock);
1005 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
1006 if (mp2) {
1007 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
1008 }
1009 }
1010 pring->missbufcnt = 0;
1011 return 0;
1012}
1013
1014/************************************************************************/
1015/* */
1016/* lpfc_post_rcv_buf */
1017/* This routine post initial rcv buffers to the configured rings */
1018/* */
1019/************************************************************************/
1020static int
1021lpfc_post_rcv_buf(struct lpfc_hba * phba)
1022{
1023 struct lpfc_sli *psli = &phba->sli;
1024
1025 /* Ring 0, ELS / CT buffers */
1026 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
1027 /* Ring 2 - FCP no buffers needed */
1028
1029 return 0;
1030}
1031
1032#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
1033
1034/************************************************************************/
1035/* */
1036/* lpfc_sha_init */
1037/* */
1038/************************************************************************/
1039static void
1040lpfc_sha_init(uint32_t * HashResultPointer)
1041{
1042 HashResultPointer[0] = 0x67452301;
1043 HashResultPointer[1] = 0xEFCDAB89;
1044 HashResultPointer[2] = 0x98BADCFE;
1045 HashResultPointer[3] = 0x10325476;
1046 HashResultPointer[4] = 0xC3D2E1F0;
1047}
1048
1049/************************************************************************/
1050/* */
1051/* lpfc_sha_iterate */
1052/* */
1053/************************************************************************/
1054static void
1055lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
1056{
1057 int t;
1058 uint32_t TEMP;
1059 uint32_t A, B, C, D, E;
1060 t = 16;
1061 do {
1062 HashWorkingPointer[t] =
1063 S(1,
1064 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
1065 8] ^
1066 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
1067 } while (++t <= 79);
1068 t = 0;
1069 A = HashResultPointer[0];
1070 B = HashResultPointer[1];
1071 C = HashResultPointer[2];
1072 D = HashResultPointer[3];
1073 E = HashResultPointer[4];
1074
1075 do {
1076 if (t < 20) {
1077 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
1078 } else if (t < 40) {
1079 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
1080 } else if (t < 60) {
1081 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
1082 } else {
1083 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
1084 }
1085 TEMP += S(5, A) + E + HashWorkingPointer[t];
1086 E = D;
1087 D = C;
1088 C = S(30, B);
1089 B = A;
1090 A = TEMP;
1091 } while (++t <= 79);
1092
1093 HashResultPointer[0] += A;
1094 HashResultPointer[1] += B;
1095 HashResultPointer[2] += C;
1096 HashResultPointer[3] += D;
1097 HashResultPointer[4] += E;
1098
1099}
1100
1101/************************************************************************/
1102/* */
1103/* lpfc_challenge_key */
1104/* */
1105/************************************************************************/
1106static void
1107lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
1108{
1109 *HashWorking = (*RandomChallenge ^ *HashWorking);
1110}
1111
1112/************************************************************************/
1113/* */
1114/* lpfc_hba_init */
1115/* */
1116/************************************************************************/
1117void
1118lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
1119{
1120 int t;
1121 uint32_t *HashWorking;
1122 uint32_t *pwwnn = phba->wwnn;
1123
1124 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL);
1125 if (!HashWorking)
1126 return;
1127
1128 memset(HashWorking, 0, (80 * sizeof(uint32_t)));
1129 HashWorking[0] = HashWorking[78] = *pwwnn++;
1130 HashWorking[1] = HashWorking[79] = *pwwnn;
1131
1132 for (t = 0; t < 7; t++)
1133 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
1134
1135 lpfc_sha_init(hbainit);
1136 lpfc_sha_iterate(hbainit, HashWorking);
1137 kfree(HashWorking);
1138}
1139
1140static void
1141lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind)
1142{
1143 struct lpfc_nodelist *ndlp, *next_ndlp;
1144
1145 /* clean up phba - lpfc specific */
1146 lpfc_can_disctmo(phba);
1147 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
1148 nlp_listp) {
1149 lpfc_nlp_remove(phba, ndlp);
1150 }
1151
1152 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
1153 nlp_listp) {
1154 lpfc_nlp_remove(phba, ndlp);
1155 }
1156
1157 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
1158 nlp_listp) {
1159 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
1160 }
1161
1162 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
1163 nlp_listp) {
1164 lpfc_nlp_remove(phba, ndlp);
1165 }
1166
1167 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
1168 nlp_listp) {
1169 lpfc_nlp_remove(phba, ndlp);
1170 }
1171
1172 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list,
1173 nlp_listp) {
1174 lpfc_nlp_remove(phba, ndlp);
1175 }
1176
1177 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
1178 nlp_listp) {
1179 lpfc_nlp_remove(phba, ndlp);
1180 }
1181
1182 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
1183 nlp_listp) {
1184 lpfc_nlp_remove(phba, ndlp);
1185 }
1186
1187 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1188 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1189 INIT_LIST_HEAD(&phba->fc_unused_list);
1190 INIT_LIST_HEAD(&phba->fc_plogi_list);
1191 INIT_LIST_HEAD(&phba->fc_adisc_list);
1192 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1193 INIT_LIST_HEAD(&phba->fc_prli_list);
1194 INIT_LIST_HEAD(&phba->fc_npr_list);
1195
1196 phba->fc_map_cnt = 0;
1197 phba->fc_unmap_cnt = 0;
1198 phba->fc_plogi_cnt = 0;
1199 phba->fc_adisc_cnt = 0;
1200 phba->fc_reglogin_cnt = 0;
1201 phba->fc_prli_cnt = 0;
1202 phba->fc_npr_cnt = 0;
1203 phba->fc_unused_cnt= 0;
1204 return;
1205}
1206
1207static void
1208lpfc_establish_link_tmo(unsigned long ptr)
1209{
1210 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
1211 unsigned long iflag;
1212
1213
1214 /* Re-establishing Link, timer expired */
1215 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
1216 "%d:1300 Re-establishing Link, timer expired "
1217 "Data: x%x x%x\n",
1218 phba->brd_no, phba->fc_flag, phba->hba_state);
1219 spin_lock_irqsave(phba->host->host_lock, iflag);
1220 phba->fc_flag &= ~FC_ESTABLISH_LINK;
1221 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1222}
1223
1224static int
1225lpfc_stop_timer(struct lpfc_hba * phba)
1226{
1227 struct lpfc_sli *psli = &phba->sli;
1228
1229 /* Instead of a timer, this has been converted to a
1230 * deferred procedding list.
1231 */
1232 while (!list_empty(&phba->freebufList)) {
1233
1234 struct lpfc_dmabuf *mp = NULL;
1235
1236 list_remove_head((&phba->freebufList), mp,
1237 struct lpfc_dmabuf, list);
1238 if (mp) {
1239 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1240 kfree(mp);
1241 }
1242 }
1243
875fbdfe 1244 del_timer_sync(&phba->fcp_poll_timer);
dea3101e 1245 del_timer_sync(&phba->fc_estabtmo);
1246 del_timer_sync(&phba->fc_disctmo);
1247 del_timer_sync(&phba->fc_fdmitmo);
1248 del_timer_sync(&phba->els_tmofunc);
1249 psli = &phba->sli;
1250 del_timer_sync(&psli->mbox_tmo);
1251 return(1);
1252}
1253
1254int
1255lpfc_online(struct lpfc_hba * phba)
1256{
1257 if (!phba)
1258 return 0;
1259
1260 if (!(phba->fc_flag & FC_OFFLINE_MODE))
1261 return 0;
1262
1263 lpfc_printf_log(phba,
1264 KERN_WARNING,
1265 LOG_INIT,
1266 "%d:0458 Bring Adapter online\n",
1267 phba->brd_no);
1268
1269 if (!lpfc_sli_queue_setup(phba))
1270 return 1;
1271
1272 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */
1273 return 1;
1274
1275 spin_lock_irq(phba->host->host_lock);
1276 phba->fc_flag &= ~FC_OFFLINE_MODE;
1277 spin_unlock_irq(phba->host->host_lock);
1278
dea3101e 1279 return 0;
1280}
1281
1282int
1283lpfc_offline(struct lpfc_hba * phba)
1284{
1285 struct lpfc_sli_ring *pring;
1286 struct lpfc_sli *psli;
1287 unsigned long iflag;
1288 int i = 0;
1289
1290 if (!phba)
1291 return 0;
1292
1293 if (phba->fc_flag & FC_OFFLINE_MODE)
1294 return 0;
1295
dea3101e 1296 psli = &phba->sli;
1297 pring = &psli->ring[psli->fcp_ring];
1298
1299 lpfc_linkdown(phba);
1300
1301 /* The linkdown event takes 30 seconds to timeout. */
1302 while (pring->txcmplq_cnt) {
1303 mdelay(10);
1304 if (i++ > 3000)
1305 break;
1306 }
1307
1308 /* stop all timers associated with this hba */
1309 lpfc_stop_timer(phba);
1310 phba->work_hba_events = 0;
1311
1312 lpfc_printf_log(phba,
1313 KERN_WARNING,
1314 LOG_INIT,
1315 "%d:0460 Bring Adapter offline\n",
1316 phba->brd_no);
1317
1318 /* Bring down the SLI Layer and cleanup. The HBA is offline
1319 now. */
1320 lpfc_sli_hba_down(phba);
1321 lpfc_cleanup(phba, 1);
1322 spin_lock_irqsave(phba->host->host_lock, iflag);
1323 phba->fc_flag |= FC_OFFLINE_MODE;
1324 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1325 return 0;
1326}
1327
1328/******************************************************************************
1329* Function name: lpfc_scsi_free
1330*
1331* Description: Called from lpfc_pci_remove_one free internal driver resources
1332*
1333******************************************************************************/
1334static int
1335lpfc_scsi_free(struct lpfc_hba * phba)
1336{
1337 struct lpfc_scsi_buf *sb, *sb_next;
1338 struct lpfc_iocbq *io, *io_next;
1339
1340 spin_lock_irq(phba->host->host_lock);
1341 /* Release all the lpfc_scsi_bufs maintained by this host. */
1342 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) {
1343 list_del(&sb->list);
1344 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
1345 sb->dma_handle);
1346 kfree(sb);
1347 phba->total_scsi_bufs--;
1348 }
1349
1350 /* Release all the lpfc_iocbq entries maintained by this host. */
1351 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
1352 list_del(&io->list);
1353 kfree(io);
1354 phba->total_iocbq_bufs--;
1355 }
1356
1357 spin_unlock_irq(phba->host->host_lock);
1358
1359 return 0;
1360}
1361
1362
1363static int __devinit
1364lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1365{
1366 struct Scsi_Host *host;
1367 struct lpfc_hba *phba;
1368 struct lpfc_sli *psli;
1369 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
1370 unsigned long bar0map_len, bar2map_len;
1371 int error = -ENODEV, retval;
1372 int i;
604a3e30 1373 uint16_t iotag;
dea3101e 1374
1375 if (pci_enable_device(pdev))
1376 goto out;
1377 if (pci_request_regions(pdev, LPFC_DRIVER_NAME))
1378 goto out_disable_device;
1379
f888ba3c 1380 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba));
dea3101e 1381 if (!host)
1382 goto out_release_regions;
1383
1384 phba = (struct lpfc_hba*)host->hostdata;
1385 memset(phba, 0, sizeof (struct lpfc_hba));
dea3101e 1386 phba->host = host;
1387
1388 phba->fc_flag |= FC_LOADING;
1389 phba->pcidev = pdev;
1390
1391 /* Assign an unused board number */
1392 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL))
1393 goto out_put_host;
1394
1395 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no);
1396 if (error)
1397 goto out_put_host;
1398
1399 host->unique_id = phba->brd_no;
6175c02a 1400 init_MUTEX(&phba->hba_can_block);
dea3101e 1401 INIT_LIST_HEAD(&phba->ctrspbuflist);
1402 INIT_LIST_HEAD(&phba->rnidrspbuflist);
1403 INIT_LIST_HEAD(&phba->freebufList);
1404
1405 /* Initialize timers used by driver */
1406 init_timer(&phba->fc_estabtmo);
1407 phba->fc_estabtmo.function = lpfc_establish_link_tmo;
1408 phba->fc_estabtmo.data = (unsigned long)phba;
1409 init_timer(&phba->fc_disctmo);
1410 phba->fc_disctmo.function = lpfc_disc_timeout;
1411 phba->fc_disctmo.data = (unsigned long)phba;
1412
1413 init_timer(&phba->fc_fdmitmo);
1414 phba->fc_fdmitmo.function = lpfc_fdmi_tmo;
1415 phba->fc_fdmitmo.data = (unsigned long)phba;
1416 init_timer(&phba->els_tmofunc);
1417 phba->els_tmofunc.function = lpfc_els_timeout;
1418 phba->els_tmofunc.data = (unsigned long)phba;
1419 psli = &phba->sli;
1420 init_timer(&psli->mbox_tmo);
1421 psli->mbox_tmo.function = lpfc_mbox_timeout;
1422 psli->mbox_tmo.data = (unsigned long)phba;
1423
875fbdfe
JSEC		 1424 init_timer(&phba->fcp_poll_timer);
1425 phba->fcp_poll_timer.function = lpfc_poll_timeout;
1426 phba->fcp_poll_timer.data = (unsigned long)phba;
1427
dea3101e 1428 /*
1429 * Get all the module params for configuring this host and then
1430 * establish the host parameters.
1431 */
1432 lpfc_get_cfgparam(phba);
1433
1434 host->max_id = LPFC_MAX_TARGET;
1435 host->max_lun = phba->cfg_max_luns;
1436 host->this_id = -1;
1437
1438 /* Initialize all internally managed lists. */
1439 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1440 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1441 INIT_LIST_HEAD(&phba->fc_unused_list);
1442 INIT_LIST_HEAD(&phba->fc_plogi_list);
1443 INIT_LIST_HEAD(&phba->fc_adisc_list);
1444 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1445 INIT_LIST_HEAD(&phba->fc_prli_list);
1446 INIT_LIST_HEAD(&phba->fc_npr_list);
1447
1448
1449 pci_set_master(pdev);
1450 retval = pci_set_mwi(pdev);
1451 if (retval)
1452 dev_printk(KERN_WARNING, &pdev->dev,
1453 "Warning: pci_set_mwi returned %d\n", retval);
1454
1455 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
1456 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
1457 goto out_idr_remove;
1458
1459 /*
1460 * Get the bus address of Bar0 and Bar2 and the number of bytes
1461 * required by each mapping.
1462 */
1463 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0);
1464 bar0map_len = pci_resource_len(phba->pcidev, 0);
1465
1466 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
1467 bar2map_len = pci_resource_len(phba->pcidev, 2);
1468
1469 /* Map HBA SLIM and Control Registers to a kernel virtual address. */
1470 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
1471 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
1472
1473 /* Allocate memory for SLI-2 structures */
1474 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
1475 &phba->slim2p_mapping, GFP_KERNEL);
1476 if (!phba->slim2p)
1477 goto out_iounmap;
1478
f91b392c 1479 memset(phba->slim2p, 0, SLI2_SLIM_SIZE);
dea3101e 1480
1481 /* Initialize the SLI Layer to run with lpfc HBAs. */
1482 lpfc_sli_setup(phba);
1483 lpfc_sli_queue_setup(phba);
1484
1485 error = lpfc_mem_alloc(phba);
1486 if (error)
1487 goto out_free_slim;
1488
1489 /* Initialize and populate the iocb list per host. */
1490 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
1491 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
1492 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
1493 if (iocbq_entry == NULL) {
1494 printk(KERN_ERR "%s: only allocated %d iocbs of "
1495 "expected %d count. Unloading driver.\n",
1496 __FUNCTION__, i, LPFC_IOCB_LIST_CNT);
1497 error = -ENOMEM;
1498 goto out_free_iocbq;
1499 }
1500
1501 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
604a3e30
JB		 1502 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
1503 if (iotag == 0) {
1504 kfree (iocbq_entry);
1505 printk(KERN_ERR "%s: failed to allocate IOTAG. "
1506 "Unloading driver.\n",
1507 __FUNCTION__);
1508 error = -ENOMEM;
1509 goto out_free_iocbq;
1510 }
dea3101e 1511 spin_lock_irq(phba->host->host_lock);
1512 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
1513 phba->total_iocbq_bufs++;
1514 spin_unlock_irq(phba->host->host_lock);
1515 }
1516
1517 /* Initialize HBA structure */
1518 phba->fc_edtov = FF_DEF_EDTOV;
1519 phba->fc_ratov = FF_DEF_RATOV;
1520 phba->fc_altov = FF_DEF_ALTOV;
1521 phba->fc_arbtov = FF_DEF_ARBTOV;
1522
1523 INIT_LIST_HEAD(&phba->work_list);
1524 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
1525 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
1526
1527 /* Startup the kernel thread for this host adapter. */
1528 phba->worker_thread = kthread_run(lpfc_do_work, phba,
1529 "lpfc_worker_%d", phba->brd_no);
1530 if (IS_ERR(phba->worker_thread)) {
1531 error = PTR_ERR(phba->worker_thread);
1532 goto out_free_iocbq;
1533 }
1534
1535 /* We can rely on a queue depth attribute only after SLI HBA setup */
1536 host->can_queue = phba->cfg_hba_queue_depth - 10;
1537
1538 /* Tell the midlayer we support 16 byte commands */
1539 host->max_cmd_len = 16;
1540
1541 /* Initialize the list of scsi buffers used by driver for scsi IO. */
875fbdfe 1542 spin_lock_init(&phba->scsi_buf_list_lock);
dea3101e 1543 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
1544
1545 host->transportt = lpfc_transport_template;
1546 host->hostdata[0] = (unsigned long)phba;
1547 pci_set_drvdata(pdev, host);
1548 error = scsi_add_host(host, &pdev->dev);
1549 if (error)
1550 goto out_kthread_stop;
1551
1552 error = lpfc_alloc_sysfs_attr(phba);
1553 if (error)
1554 goto out_kthread_stop;
1555
1556 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ,
1557 LPFC_DRIVER_NAME, phba);
1558 if (error) {
1559 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1560 "%d:0451 Enable interrupt handler failed\n",
1561 phba->brd_no);
1562 goto out_free_sysfs_attr;
1563 }
1564 phba->MBslimaddr = phba->slim_memmap_p;
1565 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
1566 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
1567 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
1568 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
1569
1570 error = lpfc_sli_hba_setup(phba);
1571 if (error)
1572 goto out_free_irq;
1573
875fbdfe
JSEC		 1574 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
1575 spin_lock_irq(phba->host->host_lock);
1576 lpfc_poll_start_timer(phba);
1577 spin_unlock_irq(phba->host->host_lock);
1578 }
1579
dea3101e 1580 /*
1581 * set fixed host attributes
1582 * Must done after lpfc_sli_hba_setup()
1583 */
1584
68ce1eb5
AM		 1585 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
1586 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
dea3101e 1587 fc_host_supported_classes(host) = FC_COS_CLASS3;
1588
1589 memset(fc_host_supported_fc4s(host), 0,
1590 sizeof(fc_host_supported_fc4s(host)));
1591 fc_host_supported_fc4s(host)[2] = 1;
1592 fc_host_supported_fc4s(host)[7] = 1;
1593
1594 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
1595
1596 fc_host_supported_speeds(host) = 0;
1597 switch (FC_JEDEC_ID(phba->vpd.rev.biuRev)) {
1598 case VIPER_JEDEC_ID:
1599 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
1600 break;
1601 case HELIOS_JEDEC_ID:
1602 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
1603 /* Fall through */
1604 case CENTAUR_2G_JEDEC_ID:
1605 case PEGASUS_JEDEC_ID:
1606 case THOR_JEDEC_ID:
1607 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
1608 /* Fall through */
1609 default:
1610 fc_host_supported_speeds(host) = FC_PORTSPEED_1GBIT;
1611 }
1612
1613 fc_host_maxframe_size(host) =
1614 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
1615 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb);
1616
1617 /* This value is also unchanging */
1618 memset(fc_host_active_fc4s(host), 0,
1619 sizeof(fc_host_active_fc4s(host)));
1620 fc_host_active_fc4s(host)[2] = 1;
1621 fc_host_active_fc4s(host)[7] = 1;
1622
1623 spin_lock_irq(phba->host->host_lock);
1624 phba->fc_flag &= ~FC_LOADING;
1625 spin_unlock_irq(phba->host->host_lock);
1626 return 0;
1627
1628out_free_irq:
1629 lpfc_stop_timer(phba);
1630 phba->work_hba_events = 0;
1631 free_irq(phba->pcidev->irq, phba);
1632out_free_sysfs_attr:
1633 lpfc_free_sysfs_attr(phba);
1634out_kthread_stop:
1635 kthread_stop(phba->worker_thread);
1636out_free_iocbq:
1637 list_for_each_entry_safe(iocbq_entry, iocbq_next,
1638 &phba->lpfc_iocb_list, list) {
1639 spin_lock_irq(phba->host->host_lock);
1640 kfree(iocbq_entry);
1641 phba->total_iocbq_bufs--;
1642 spin_unlock_irq(phba->host->host_lock);
1643 }
1644 lpfc_mem_free(phba);
1645out_free_slim:
1646 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p,
1647 phba->slim2p_mapping);
1648out_iounmap:
1649 iounmap(phba->ctrl_regs_memmap_p);
1650 iounmap(phba->slim_memmap_p);
1651out_idr_remove:
1652 idr_remove(&lpfc_hba_index, phba->brd_no);
1653out_put_host:
1654 scsi_host_put(host);
1655out_release_regions:
1656 pci_release_regions(pdev);
1657out_disable_device:
1658 pci_disable_device(pdev);
1659out:
1660 return error;
1661}
1662
1663static void __devexit
1664lpfc_pci_remove_one(struct pci_dev *pdev)
1665{
1666 struct Scsi_Host *host = pci_get_drvdata(pdev);
1667 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata[0];
1668 unsigned long iflag;
1669
1670 lpfc_free_sysfs_attr(phba);
1671
1672 spin_lock_irqsave(phba->host->host_lock, iflag);
1673 phba->fc_flag |= FC_UNLOADING;
1674
1675 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1676
1677 fc_remove_host(phba->host);
1678 scsi_remove_host(phba->host);
1679
1680 kthread_stop(phba->worker_thread);
1681
1682 /*
1683 * Bring down the SLI Layer. This step disable all interrupts,
1684 * clears the rings, discards all mailbox commands, and resets
1685 * the HBA.
1686 */
1687 lpfc_sli_hba_down(phba);
1688
1689 /* Release the irq reservation */
1690 free_irq(phba->pcidev->irq, phba);
1691
1692 lpfc_cleanup(phba, 0);
1693 lpfc_stop_timer(phba);
1694 phba->work_hba_events = 0;
1695
1696 /*
1697 * Call scsi_free before mem_free since scsi bufs are released to their
1698 * corresponding pools here.
1699 */
1700 lpfc_scsi_free(phba);
1701 lpfc_mem_free(phba);
1702
1703 /* Free resources associated with SLI2 interface */
1704 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
1705 phba->slim2p, phba->slim2p_mapping);
1706
1707 /* unmap adapter SLIM and Control Registers */
1708 iounmap(phba->ctrl_regs_memmap_p);
1709 iounmap(phba->slim_memmap_p);
1710
1711 pci_release_regions(phba->pcidev);
1712 pci_disable_device(phba->pcidev);
1713
1714 idr_remove(&lpfc_hba_index, phba->brd_no);
1715 scsi_host_put(phba->host);
1716
1717 pci_set_drvdata(pdev, NULL);
1718}
1719
1720static struct pci_device_id lpfc_id_table[] = {
1721 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
1722 PCI_ANY_ID, PCI_ANY_ID, },
06325e74
JSEC		 1723 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
1724 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1725 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
1726 PCI_ANY_ID, PCI_ANY_ID, },
1727 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
1728 PCI_ANY_ID, PCI_ANY_ID, },
1729 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR,
1730 PCI_ANY_ID, PCI_ANY_ID, },
1731 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY,
1732 PCI_ANY_ID, PCI_ANY_ID, },
1733 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY,
1734 PCI_ANY_ID, PCI_ANY_ID, },
1735 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY,
1736 PCI_ANY_ID, PCI_ANY_ID, },
1737 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
1738 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1739 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE,
1740 PCI_ANY_ID, PCI_ANY_ID, },
1741 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP,
1742 PCI_ANY_ID, PCI_ANY_ID, },
1743 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP,
1744 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1745 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
1746 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1747 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP,
1748 PCI_ANY_ID, PCI_ANY_ID, },
1749 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP,
1750 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1751 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
1752 PCI_ANY_ID, PCI_ANY_ID, },
1753 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
1754 PCI_ANY_ID, PCI_ANY_ID, },
1755 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
1756 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1757 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP,
1758 PCI_ANY_ID, PCI_ANY_ID, },
1759 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP,
1760 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1761 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
1762 PCI_ANY_ID, PCI_ANY_ID, },
1763 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
1764 PCI_ANY_ID, PCI_ANY_ID, },
1765 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY,
1766 PCI_ANY_ID, PCI_ANY_ID, },
1767 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101,
1768 PCI_ANY_ID, PCI_ANY_ID, },
1769 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
1770 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1771 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S,
1772 PCI_ANY_ID, PCI_ANY_ID, },
1773 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S,
1774 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1775 { 0 }
1776};
1777
1778MODULE_DEVICE_TABLE(pci, lpfc_id_table);
1779
1780static struct pci_driver lpfc_driver = {
1781 .name = LPFC_DRIVER_NAME,
1782 .id_table = lpfc_id_table,
1783 .probe = lpfc_pci_probe_one,
1784 .remove = __devexit_p(lpfc_pci_remove_one),
1785};
1786
1787static int __init
1788lpfc_init(void)
1789{
1790 int error = 0;
1791
1792 printk(LPFC_MODULE_DESC "\n");
c44ce173 1793 printk(LPFC_COPYRIGHT "\n");
dea3101e 1794
1795 lpfc_transport_template =
1796 fc_attach_transport(&lpfc_transport_functions);
1797 if (!lpfc_transport_template)
1798 return -ENOMEM;
1799 error = pci_register_driver(&lpfc_driver);
1800 if (error)
1801 fc_release_transport(lpfc_transport_template);
1802
1803 return error;
1804}
1805
1806static void __exit
1807lpfc_exit(void)
1808{
1809 pci_unregister_driver(&lpfc_driver);
1810 fc_release_transport(lpfc_transport_template);
1811}
1812
1813module_init(lpfc_init);
1814module_exit(lpfc_exit);
1815MODULE_LICENSE("GPL");
1816MODULE_DESCRIPTION(LPFC_MODULE_DESC);
1817MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
1818MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Linux kernel - Deliverables
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