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[SCSI] lpfc 8.1.11 : Add MSI (Message Signalled Interrupts) support
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc_init.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
41415862 4 * Copyright (C) 2004-2006 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
dea3101e 22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/idr.h>
26#include <linux/interrupt.h>
27#include <linux/kthread.h>
28#include <linux/pci.h>
29#include <linux/spinlock.h>
30
91886523 31#include <scsi/scsi.h>
dea3101e 32#include <scsi/scsi_device.h>
33#include <scsi/scsi_host.h>
34#include <scsi/scsi_transport_fc.h>
35
36#include "lpfc_hw.h"
37#include "lpfc_sli.h"
38#include "lpfc_disc.h"
39#include "lpfc_scsi.h"
40#include "lpfc.h"
41#include "lpfc_logmsg.h"
42#include "lpfc_crtn.h"
43#include "lpfc_version.h"
44
74b72a59 45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int);
dea3101e 46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
47static int lpfc_post_rcv_buf(struct lpfc_hba *);
48
49static struct scsi_transport_template *lpfc_transport_template = NULL;
50static DEFINE_IDR(lpfc_hba_index);
51
52/************************************************************************/
53/* */
54/* lpfc_config_port_prep */
55/* This routine will do LPFC initialization prior to the */
56/* CONFIG_PORT mailbox command. This will be initialized */
57/* as a SLI layer callback routine. */
58/* This routine returns 0 on success or -ERESTART if it wants */
59/* the SLI layer to reset the HBA and try again. Any */
60/* other return value indicates an error. */
61/* */
62/************************************************************************/
63int
64lpfc_config_port_prep(struct lpfc_hba * phba)
65{
66 lpfc_vpd_t *vp = &phba->vpd;
67 int i = 0, rc;
68 LPFC_MBOXQ_t *pmb;
69 MAILBOX_t *mb;
70 char *lpfc_vpd_data = NULL;
71 uint16_t offset = 0;
72 static char licensed[56] =
73 "key unlock for use with gnu public licensed code only\0";
65a29c16 74 static int init_key = 1;
dea3101e 75
76 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
77 if (!pmb) {
78 phba->hba_state = LPFC_HBA_ERROR;
79 return -ENOMEM;
80 }
81
82 mb = &pmb->mb;
83 phba->hba_state = LPFC_INIT_MBX_CMDS;
84
85 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS		 86 if (init_key) {
87 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 88
65a29c16
JS		 89 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
90 *ptext = cpu_to_be32(*ptext);
91 init_key = 0;
92 }
dea3101e 93
94 lpfc_read_nv(phba, pmb);
95 memset((char*)mb->un.varRDnvp.rsvd3, 0,
96 sizeof (mb->un.varRDnvp.rsvd3));
97 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
98 sizeof (licensed));
99
100 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
101
102 if (rc != MBX_SUCCESS) {
103 lpfc_printf_log(phba,
104 KERN_ERR,
105 LOG_MBOX,
106 "%d:0324 Config Port initialization "
107 "error, mbxCmd x%x READ_NVPARM, "
108 "mbxStatus x%x\n",
109 phba->brd_no,
110 mb->mbxCommand, mb->mbxStatus);
111 mempool_free(pmb, phba->mbox_mem_pool);
112 return -ERESTART;
113 }
114 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
115 sizeof (mb->un.varRDnvp.nodename));
116 }
117
118 /* Setup and issue mailbox READ REV command */
119 lpfc_read_rev(phba, pmb);
120 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
121 if (rc != MBX_SUCCESS) {
122 lpfc_printf_log(phba,
123 KERN_ERR,
124 LOG_INIT,
125 "%d:0439 Adapter failed to init, mbxCmd x%x "
126 "READ_REV, mbxStatus x%x\n",
127 phba->brd_no,
128 mb->mbxCommand, mb->mbxStatus);
129 mempool_free( pmb, phba->mbox_mem_pool);
130 return -ERESTART;
131 }
132
1de933f3
JSEC		 133 /*
134 * The value of rr must be 1 since the driver set the cv field to 1.
135 * This setting requires the FW to set all revision fields.
dea3101e 136 */
1de933f3 137 if (mb->un.varRdRev.rr == 0) {
dea3101e 138 vp->rev.rBit = 0;
1de933f3
JSEC		 139 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
140 "%d:0440 Adapter failed to init, READ_REV has "
141 "missing revision information.\n",
142 phba->brd_no);
dea3101e 143 mempool_free(pmb, phba->mbox_mem_pool);
144 return -ERESTART;
dea3101e 145 }
146
147 /* Save information as VPD data */
1de933f3
JSEC		 148 vp->rev.rBit = 1;
149 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
150 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
151 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
152 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 153 vp->rev.biuRev = mb->un.varRdRev.biuRev;
154 vp->rev.smRev = mb->un.varRdRev.smRev;
155 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
156 vp->rev.endecRev = mb->un.varRdRev.endecRev;
157 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
158 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
159 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
160 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
161 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
162 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
163
164 if (lpfc_is_LC_HBA(phba->pcidev->device))
165 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
166 sizeof (phba->RandomData));
167
dea3101e 168 /* Get adapter VPD information */
169 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
170 if (!pmb->context2)
171 goto out_free_mbox;
172 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
173 if (!lpfc_vpd_data)
174 goto out_free_context2;
175
176 do {
177 lpfc_dump_mem(phba, pmb, offset);
178 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
179
180 if (rc != MBX_SUCCESS) {
181 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
182 "%d:0441 VPD not present on adapter, "
183 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
184 phba->brd_no,
185 mb->mbxCommand, mb->mbxStatus);
74b72a59 186 mb->un.varDmp.word_cnt = 0;
dea3101e 187 }
74b72a59
JW		 188 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
189 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
dea3101e 190 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
191 mb->un.varDmp.word_cnt);
192 offset += mb->un.varDmp.word_cnt;
74b72a59
JW		 193 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
194 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e 195
196 kfree(lpfc_vpd_data);
197out_free_context2:
198 kfree(pmb->context2);
199out_free_mbox:
200 mempool_free(pmb, phba->mbox_mem_pool);
201 return 0;
202}
203
204/************************************************************************/
205/* */
206/* lpfc_config_port_post */
207/* This routine will do LPFC initialization after the */
208/* CONFIG_PORT mailbox command. This will be initialized */
209/* as a SLI layer callback routine. */
210/* This routine returns 0 on success. Any other return value */
211/* indicates an error. */
212/* */
213/************************************************************************/
214int
215lpfc_config_port_post(struct lpfc_hba * phba)
216{
217 LPFC_MBOXQ_t *pmb;
218 MAILBOX_t *mb;
219 struct lpfc_dmabuf *mp;
220 struct lpfc_sli *psli = &phba->sli;
221 uint32_t status, timeout;
222 int i, j, rc;
223
224 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb) {
226 phba->hba_state = LPFC_HBA_ERROR;
227 return -ENOMEM;
228 }
229 mb = &pmb->mb;
230
231 lpfc_config_link(phba, pmb);
232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233 if (rc != MBX_SUCCESS) {
234 lpfc_printf_log(phba,
235 KERN_ERR,
236 LOG_INIT,
237 "%d:0447 Adapter failed init, mbxCmd x%x "
238 "CONFIG_LINK mbxStatus x%x\n",
239 phba->brd_no,
240 mb->mbxCommand, mb->mbxStatus);
241 phba->hba_state = LPFC_HBA_ERROR;
242 mempool_free( pmb, phba->mbox_mem_pool);
243 return -EIO;
244 }
245
246 /* Get login parameters for NID. */
247 lpfc_read_sparam(phba, pmb);
248 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
249 lpfc_printf_log(phba,
250 KERN_ERR,
251 LOG_INIT,
252 "%d:0448 Adapter failed init, mbxCmd x%x "
253 "READ_SPARM mbxStatus x%x\n",
254 phba->brd_no,
255 mb->mbxCommand, mb->mbxStatus);
256 phba->hba_state = LPFC_HBA_ERROR;
257 mp = (struct lpfc_dmabuf *) pmb->context1;
258 mempool_free( pmb, phba->mbox_mem_pool);
259 lpfc_mbuf_free(phba, mp->virt, mp->phys);
260 kfree(mp);
261 return -EIO;
262 }
263
264 mp = (struct lpfc_dmabuf *) pmb->context1;
265
266 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
267 lpfc_mbuf_free(phba, mp->virt, mp->phys);
268 kfree(mp);
269 pmb->context1 = NULL;
270
c3f28afa
JS		 271 if (phba->cfg_soft_wwpn)
272 u64_to_wwn(phba->cfg_soft_wwpn, phba->fc_sparam.portName.u.wwn);
dea3101e 273 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
274 sizeof (struct lpfc_name));
275 memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
276 sizeof (struct lpfc_name));
277 /* If no serial number in VPD data, use low 6 bytes of WWNN */
278 /* This should be consolidated into parse_vpd ? - mr */
279 if (phba->SerialNumber[0] == 0) {
280 uint8_t *outptr;
281
68ce1eb5 282 outptr = &phba->fc_nodename.u.s.IEEE[0];
dea3101e 283 for (i = 0; i < 12; i++) {
284 status = *outptr++;
285 j = ((status & 0xf0) >> 4);
286 if (j <= 9)
287 phba->SerialNumber[i] =
288 (char)((uint8_t) 0x30 + (uint8_t) j);
289 else
290 phba->SerialNumber[i] =
291 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
292 i++;
293 j = (status & 0xf);
294 if (j <= 9)
295 phba->SerialNumber[i] =
296 (char)((uint8_t) 0x30 + (uint8_t) j);
297 else
298 phba->SerialNumber[i] =
299 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
300 }
301 }
302
dea3101e 303 lpfc_read_config(phba, pmb);
304 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
305 lpfc_printf_log(phba,
306 KERN_ERR,
307 LOG_INIT,
308 "%d:0453 Adapter failed to init, mbxCmd x%x "
309 "READ_CONFIG, mbxStatus x%x\n",
310 phba->brd_no,
311 mb->mbxCommand, mb->mbxStatus);
312 phba->hba_state = LPFC_HBA_ERROR;
313 mempool_free( pmb, phba->mbox_mem_pool);
314 return -EIO;
315 }
316
317 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
318 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
319 phba->cfg_hba_queue_depth =
320 mb->un.varRdConfig.max_xri + 1;
321
322 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW		 323
324 /* Get the default values for Model Name and Description */
325 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
326
327 if ((phba->cfg_link_speed > LINK_SPEED_10G)
328 || ((phba->cfg_link_speed == LINK_SPEED_1G)
329 && !(phba->lmt & LMT_1Gb))
330 || ((phba->cfg_link_speed == LINK_SPEED_2G)
331 && !(phba->lmt & LMT_2Gb))
332 || ((phba->cfg_link_speed == LINK_SPEED_4G)
333 && !(phba->lmt & LMT_4Gb))
334 || ((phba->cfg_link_speed == LINK_SPEED_8G)
335 && !(phba->lmt & LMT_8Gb))
336 || ((phba->cfg_link_speed == LINK_SPEED_10G)
337 && !(phba->lmt & LMT_10Gb))) {
338 /* Reset link speed to auto */
dea3101e 339 lpfc_printf_log(phba,
340 KERN_WARNING,
341 LOG_LINK_EVENT,
342 "%d:1302 Invalid speed for this board: "
343 "Reset link speed to auto: x%x\n",
344 phba->brd_no,
345 phba->cfg_link_speed);
346 phba->cfg_link_speed = LINK_SPEED_AUTO;
347 }
348
349 phba->hba_state = LPFC_LINK_DOWN;
350
351 /* Only process IOCBs on ring 0 till hba_state is READY */
a4bc3379
JS		 352 if (psli->ring[psli->extra_ring].cmdringaddr)
353 psli->ring[psli->extra_ring].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e 354 if (psli->ring[psli->fcp_ring].cmdringaddr)
355 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
356 if (psli->ring[psli->next_ring].cmdringaddr)
357 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
358
359 /* Post receive buffers for desired rings */
360 lpfc_post_rcv_buf(phba);
361
362 /* Enable appropriate host interrupts */
363 spin_lock_irq(phba->host->host_lock);
364 status = readl(phba->HCregaddr);
365 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
366 if (psli->num_rings > 0)
367 status |= HC_R0INT_ENA;
368 if (psli->num_rings > 1)
369 status |= HC_R1INT_ENA;
370 if (psli->num_rings > 2)
371 status |= HC_R2INT_ENA;
372 if (psli->num_rings > 3)
373 status |= HC_R3INT_ENA;
374
875fbdfe
JSEC		 375 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
376 (phba->cfg_poll & DISABLE_FCP_RING_INT))
377 status &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
378
dea3101e 379 writel(status, phba->HCregaddr);
380 readl(phba->HCregaddr); /* flush */
381 spin_unlock_irq(phba->host->host_lock);
382
383 /*
384 * Setup the ring 0 (els) timeout handler
385 */
386 timeout = phba->fc_ratov << 1;
387 phba->els_tmofunc.expires = jiffies + HZ * timeout;
388 add_timer(&phba->els_tmofunc);
389
390 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
391 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
8aee918a
JS		 392 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
393 if (rc != MBX_SUCCESS) {
dea3101e 394 lpfc_printf_log(phba,
395 KERN_ERR,
396 LOG_INIT,
397 "%d:0454 Adapter failed to init, mbxCmd x%x "
398 "INIT_LINK, mbxStatus x%x\n",
399 phba->brd_no,
400 mb->mbxCommand, mb->mbxStatus);
401
402 /* Clear all interrupt enable conditions */
403 writel(0, phba->HCregaddr);
404 readl(phba->HCregaddr); /* flush */
405 /* Clear all pending interrupts */
406 writel(0xffffffff, phba->HAregaddr);
407 readl(phba->HAregaddr); /* flush */
408
409 phba->hba_state = LPFC_HBA_ERROR;
8aee918a
JS		 410 if (rc != MBX_BUSY)
411 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 412 return -EIO;
413 }
414 /* MBOX buffer will be freed in mbox compl */
415
ce8b3ce5
JS		 416 return (0);
417}
418
419static int
420lpfc_discovery_wait(struct lpfc_hba *phba)
421{
422 int i = 0;
423
dea3101e 424 while ((phba->hba_state != LPFC_HBA_READY) ||
425 (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
426 ((phba->fc_map_cnt == 0) && (i<2)) ||
ce8b3ce5 427 (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
dea3101e 428 /* Check every second for 30 retries. */
429 i++;
430 if (i > 30) {
ce8b3ce5 431 return -ETIMEDOUT;
dea3101e 432 }
433 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
434 /* The link is down. Set linkdown timeout */
ce8b3ce5 435 return -ETIMEDOUT;
dea3101e 436 }
437
438 /* Delay for 1 second to give discovery time to complete. */
439 msleep(1000);
440
441 }
442
ce8b3ce5 443 return 0;
dea3101e 444}
445
446/************************************************************************/
447/* */
448/* lpfc_hba_down_prep */
449/* This routine will do LPFC uninitialization before the */
450/* HBA is reset when bringing down the SLI Layer. This will be */
451/* initialized as a SLI layer callback routine. */
452/* This routine returns 0 on success. Any other return value */
453/* indicates an error. */
454/* */
455/************************************************************************/
456int
457lpfc_hba_down_prep(struct lpfc_hba * phba)
458{
459 /* Disable interrupts */
460 writel(0, phba->HCregaddr);
461 readl(phba->HCregaddr); /* flush */
462
463 /* Cleanup potential discovery resources */
464 lpfc_els_flush_rscn(phba);
465 lpfc_els_flush_cmd(phba);
466 lpfc_disc_flush_list(phba);
467
468 return (0);
469}
470
41415862
JW		 471/************************************************************************/
472/* */
473/* lpfc_hba_down_post */
474/* This routine will do uninitialization after the HBA is reset */
475/* when bringing down the SLI Layer. */
476/* This routine returns 0 on success. Any other return value */
477/* indicates an error. */
478/* */
479/************************************************************************/
480int
481lpfc_hba_down_post(struct lpfc_hba * phba)
482{
483 struct lpfc_sli *psli = &phba->sli;
484 struct lpfc_sli_ring *pring;
485 struct lpfc_dmabuf *mp, *next_mp;
486 int i;
487
488 /* Cleanup preposted buffers on the ELS ring */
489 pring = &psli->ring[LPFC_ELS_RING];
490 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
491 list_del(&mp->list);
492 pring->postbufq_cnt--;
493 lpfc_mbuf_free(phba, mp->virt, mp->phys);
494 kfree(mp);
495 }
496
497 for (i = 0; i < psli->num_rings; i++) {
498 pring = &psli->ring[i];
499 lpfc_sli_abort_iocb_ring(phba, pring);
500 }
501
502 return 0;
503}
504
dea3101e 505/************************************************************************/
506/* */
507/* lpfc_handle_eratt */
508/* This routine will handle processing a Host Attention */
509/* Error Status event. This will be initialized */
510/* as a SLI layer callback routine. */
511/* */
512/************************************************************************/
513void
514lpfc_handle_eratt(struct lpfc_hba * phba)
515{
516 struct lpfc_sli *psli = &phba->sli;
517 struct lpfc_sli_ring *pring;
d2873e4c 518 uint32_t event_data;
dea3101e 519
dea3101e 520 if (phba->work_hs & HS_FFER6) {
521 /* Re-establishing Link */
522 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
523 "%d:1301 Re-establishing Link "
524 "Data: x%x x%x x%x\n",
525 phba->brd_no, phba->work_hs,
526 phba->work_status[0], phba->work_status[1]);
527 spin_lock_irq(phba->host->host_lock);
528 phba->fc_flag |= FC_ESTABLISH_LINK;
9290831f 529 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
dea3101e 530 spin_unlock_irq(phba->host->host_lock);
531
532 /*
533 * Firmware stops when it triggled erratt with HS_FFER6.
534 * That could cause the I/Os dropped by the firmware.
535 * Error iocb (I/O) on txcmplq and let the SCSI layer
536 * retry it after re-establishing link.
537 */
538 pring = &psli->ring[psli->fcp_ring];
539 lpfc_sli_abort_iocb_ring(phba, pring);
540
541
542 /*
543 * There was a firmware error. Take the hba offline and then
544 * attempt to restart it.
545 */
546 lpfc_offline(phba);
41415862 547 lpfc_sli_brdrestart(phba);
dea3101e 548 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
549 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
550 return;
551 }
552 } else {
553 /* The if clause above forces this code path when the status
554 * failure is a value other than FFER6. Do not call the offline
555 * twice. This is the adapter hardware error path.
556 */
557 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
558 "%d:0457 Adapter Hardware Error "
559 "Data: x%x x%x x%x\n",
560 phba->brd_no, phba->work_hs,
561 phba->work_status[0], phba->work_status[1]);
562
d2873e4c
JS		 563 event_data = FC_REG_DUMP_EVENT;
564 fc_host_post_vendor_event(phba->host, fc_get_event_number(),
565 sizeof(event_data), (char *) &event_data,
566 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
567
9290831f 568 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
dea3101e 569 lpfc_offline(phba);
41415862
JW		 570 phba->hba_state = LPFC_HBA_ERROR;
571 lpfc_hba_down_post(phba);
dea3101e 572 }
573}
574
575/************************************************************************/
576/* */
577/* lpfc_handle_latt */
578/* This routine will handle processing a Host Attention */
579/* Link Status event. This will be initialized */
580/* as a SLI layer callback routine. */
581/* */
582/************************************************************************/
583void
584lpfc_handle_latt(struct lpfc_hba * phba)
585{
586 struct lpfc_sli *psli = &phba->sli;
587 LPFC_MBOXQ_t *pmb;
588 volatile uint32_t control;
589 struct lpfc_dmabuf *mp;
590 int rc = -ENOMEM;
591
592 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
593 if (!pmb)
594 goto lpfc_handle_latt_err_exit;
595
596 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
597 if (!mp)
598 goto lpfc_handle_latt_free_pmb;
599
600 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
601 if (!mp->virt)
602 goto lpfc_handle_latt_free_mp;
603
604 rc = -EIO;
605
6281bfe0
JSEC		 606 /* Cleanup any outstanding ELS commands */
607 lpfc_els_flush_cmd(phba);
dea3101e 608
609 psli->slistat.link_event++;
610 lpfc_read_la(phba, pmb, mp);
611 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
612 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
613 if (rc == MBX_NOT_FINISHED)
14691150 614 goto lpfc_handle_latt_free_mbuf;
dea3101e 615
616 /* Clear Link Attention in HA REG */
617 spin_lock_irq(phba->host->host_lock);
618 writel(HA_LATT, phba->HAregaddr);
619 readl(phba->HAregaddr); /* flush */
620 spin_unlock_irq(phba->host->host_lock);
621
622 return;
623
14691150
JS		 624lpfc_handle_latt_free_mbuf:
625 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e 626lpfc_handle_latt_free_mp:
627 kfree(mp);
628lpfc_handle_latt_free_pmb:
629 kfree(pmb);
630lpfc_handle_latt_err_exit:
631 /* Enable Link attention interrupts */
632 spin_lock_irq(phba->host->host_lock);
633 psli->sli_flag |= LPFC_PROCESS_LA;
634 control = readl(phba->HCregaddr);
635 control |= HC_LAINT_ENA;
636 writel(control, phba->HCregaddr);
637 readl(phba->HCregaddr); /* flush */
638
639 /* Clear Link Attention in HA REG */
640 writel(HA_LATT, phba->HAregaddr);
641 readl(phba->HAregaddr); /* flush */
642 spin_unlock_irq(phba->host->host_lock);
643 lpfc_linkdown(phba);
644 phba->hba_state = LPFC_HBA_ERROR;
645
646 /* The other case is an error from issue_mbox */
647 if (rc == -ENOMEM)
648 lpfc_printf_log(phba,
649 KERN_WARNING,
650 LOG_MBOX,
651 "%d:0300 READ_LA: no buffers\n",
652 phba->brd_no);
653
654 return;
655}
656
657/************************************************************************/
658/* */
659/* lpfc_parse_vpd */
660/* This routine will parse the VPD data */
661/* */
662/************************************************************************/
663static int
74b72a59 664lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd, int len)
dea3101e 665{
666 uint8_t lenlo, lenhi;
667 uint32_t Length;
668 int i, j;
669 int finished = 0;
670 int index = 0;
671
672 if (!vpd)
673 return 0;
674
675 /* Vital Product */
676 lpfc_printf_log(phba,
677 KERN_INFO,
678 LOG_INIT,
679 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
680 phba->brd_no,
681 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
682 (uint32_t) vpd[3]);
74b72a59 683 while (!finished && (index < (len - 4))) {
dea3101e 684 switch (vpd[index]) {
685 case 0x82:
74b72a59 686 case 0x91:
dea3101e 687 index += 1;
688 lenlo = vpd[index];
689 index += 1;
690 lenhi = vpd[index];
691 index += 1;
692 i = ((((unsigned short)lenhi) << 8) + lenlo);
693 index += i;
694 break;
695 case 0x90:
696 index += 1;
697 lenlo = vpd[index];
698 index += 1;
699 lenhi = vpd[index];
700 index += 1;
701 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW		 702 if (Length > len - index)
703 Length = len - index;
dea3101e 704 while (Length > 0) {
705 /* Look for Serial Number */
706 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
707 index += 2;
708 i = vpd[index];
709 index += 1;
710 j = 0;
711 Length -= (3+i);
712 while(i--) {
713 phba->SerialNumber[j++] = vpd[index++];
714 if (j == 31)
715 break;
716 }
717 phba->SerialNumber[j] = 0;
718 continue;
719 }
720 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
721 phba->vpd_flag |= VPD_MODEL_DESC;
722 index += 2;
723 i = vpd[index];
724 index += 1;
725 j = 0;
726 Length -= (3+i);
727 while(i--) {
728 phba->ModelDesc[j++] = vpd[index++];
729 if (j == 255)
730 break;
731 }
732 phba->ModelDesc[j] = 0;
733 continue;
734 }
735 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
736 phba->vpd_flag |= VPD_MODEL_NAME;
737 index += 2;
738 i = vpd[index];
739 index += 1;
740 j = 0;
741 Length -= (3+i);
742 while(i--) {
743 phba->ModelName[j++] = vpd[index++];
744 if (j == 79)
745 break;
746 }
747 phba->ModelName[j] = 0;
748 continue;
749 }
750 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
751 phba->vpd_flag |= VPD_PROGRAM_TYPE;
752 index += 2;
753 i = vpd[index];
754 index += 1;
755 j = 0;
756 Length -= (3+i);
757 while(i--) {
758 phba->ProgramType[j++] = vpd[index++];
759 if (j == 255)
760 break;
761 }
762 phba->ProgramType[j] = 0;
763 continue;
764 }
765 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
766 phba->vpd_flag |= VPD_PORT;
767 index += 2;
768 i = vpd[index];
769 index += 1;
770 j = 0;
771 Length -= (3+i);
772 while(i--) {
773 phba->Port[j++] = vpd[index++];
774 if (j == 19)
775 break;
776 }
777 phba->Port[j] = 0;
778 continue;
779 }
780 else {
781 index += 2;
782 i = vpd[index];
783 index += 1;
784 index += i;
785 Length -= (3 + i);
786 }
787 }
788 finished = 0;
789 break;
790 case 0x78:
791 finished = 1;
792 break;
793 default:
794 index ++;
795 break;
796 }
74b72a59 797 }
dea3101e 798
799 return(1);
800}
801
802static void
803lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
804{
805 lpfc_vpd_t *vp;
fefcb2b6
JSEC		 806 uint16_t dev_id = phba->pcidev->device;
807 uint16_t dev_subid = phba->pcidev->subsystem_device;
719396b4 808 uint8_t hdrtype;
74b72a59 809 int max_speed;
719396b4 810 char * ports;
74b72a59
JW		 811 struct {
812 char * name;
813 int max_speed;
814 char * ports;
815 char * bus;
071fbd3d 816 } m = {"<Unknown>", 0, "", ""};
74b72a59 817
719396b4
JW		 818 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
819 ports = (hdrtype == 0x80) ? "2-port " : "";
74b72a59
JW		 820 if (mdp && mdp[0] != '\0'
821 && descp && descp[0] != '\0')
822 return;
823
824 if (phba->lmt & LMT_10Gb)
825 max_speed = 10;
826 else if (phba->lmt & LMT_8Gb)
827 max_speed = 8;
828 else if (phba->lmt & LMT_4Gb)
829 max_speed = 4;
830 else if (phba->lmt & LMT_2Gb)
831 max_speed = 2;
832 else
833 max_speed = 1;
dea3101e 834
835 vp = &phba->vpd;
dea3101e 836
e4adb204 837 switch (dev_id) {
06325e74 838 case PCI_DEVICE_ID_FIREFLY:
74b72a59 839 m = (typeof(m)){"LP6000", max_speed, "", "PCI"};
06325e74 840 break;
dea3101e 841 case PCI_DEVICE_ID_SUPERFLY:
842 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
74b72a59 843 m = (typeof(m)){"LP7000", max_speed, "", "PCI"};
dea3101e 844 else
74b72a59 845 m = (typeof(m)){"LP7000E", max_speed, "", "PCI"};
dea3101e 846 break;
847 case PCI_DEVICE_ID_DRAGONFLY:
74b72a59 848 m = (typeof(m)){"LP8000", max_speed, "", "PCI"};
dea3101e 849 break;
850 case PCI_DEVICE_ID_CENTAUR:
851 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
74b72a59 852 m = (typeof(m)){"LP9002", max_speed, "", "PCI"};
dea3101e 853 else
74b72a59 854 m = (typeof(m)){"LP9000", max_speed, "", "PCI"};
dea3101e 855 break;
856 case PCI_DEVICE_ID_RFLY:
74b72a59 857 m = (typeof(m)){"LP952", max_speed, "", "PCI"};
dea3101e 858 break;
859 case PCI_DEVICE_ID_PEGASUS:
74b72a59 860 m = (typeof(m)){"LP9802", max_speed, "", "PCI-X"};
dea3101e 861 break;
862 case PCI_DEVICE_ID_THOR:
964b77e7 863 if (hdrtype == 0x80)
74b72a59
JW		 864 m = (typeof(m)){"LP10000DC",
865 max_speed, ports, "PCI-X"};
964b77e7 866 else
74b72a59
JW		 867 m = (typeof(m)){"LP10000",
868 max_speed, ports, "PCI-X"};
dea3101e 869 break;
870 case PCI_DEVICE_ID_VIPER:
74b72a59 871 m = (typeof(m)){"LPX1000", max_speed, "", "PCI-X"};
dea3101e 872 break;
873 case PCI_DEVICE_ID_PFLY:
74b72a59 874 m = (typeof(m)){"LP982", max_speed, "", "PCI-X"};
dea3101e 875 break;
876 case PCI_DEVICE_ID_TFLY:
964b77e7 877 if (hdrtype == 0x80)
74b72a59 878 m = (typeof(m)){"LP1050DC", max_speed, ports, "PCI-X"};
964b77e7 879 else
74b72a59 880 m = (typeof(m)){"LP1050", max_speed, ports, "PCI-X"};
dea3101e 881 break;
882 case PCI_DEVICE_ID_HELIOS:
964b77e7 883 if (hdrtype == 0x80)
74b72a59 884 m = (typeof(m)){"LP11002", max_speed, ports, "PCI-X2"};
964b77e7 885 else
74b72a59 886 m = (typeof(m)){"LP11000", max_speed, ports, "PCI-X2"};
dea3101e 887 break;
e4adb204 888 case PCI_DEVICE_ID_HELIOS_SCSP:
74b72a59 889 m = (typeof(m)){"LP11000-SP", max_speed, ports, "PCI-X2"};
e4adb204
JSEC		 890 break;
891 case PCI_DEVICE_ID_HELIOS_DCSP:
74b72a59 892 m = (typeof(m)){"LP11002-SP", max_speed, ports, "PCI-X2"};
e4adb204
JSEC		 893 break;
894 case PCI_DEVICE_ID_NEPTUNE:
895 if (hdrtype == 0x80)
74b72a59 896 m = (typeof(m)){"LPe1002", max_speed, ports, "PCIe"};
e4adb204 897 else
74b72a59 898 m = (typeof(m)){"LPe1000", max_speed, ports, "PCIe"};
e4adb204
JSEC		 899 break;
900 case PCI_DEVICE_ID_NEPTUNE_SCSP:
74b72a59 901 m = (typeof(m)){"LPe1000-SP", max_speed, ports, "PCIe"};
e4adb204
JSEC		 902 break;
903 case PCI_DEVICE_ID_NEPTUNE_DCSP:
74b72a59 904 m = (typeof(m)){"LPe1002-SP", max_speed, ports, "PCIe"};
e4adb204 905 break;
dea3101e 906 case PCI_DEVICE_ID_BMID:
74b72a59 907 m = (typeof(m)){"LP1150", max_speed, ports, "PCI-X2"};
dea3101e 908 break;
909 case PCI_DEVICE_ID_BSMB:
74b72a59 910 m = (typeof(m)){"LP111", max_speed, ports, "PCI-X2"};
dea3101e 911 break;
912 case PCI_DEVICE_ID_ZEPHYR:
964b77e7 913 if (hdrtype == 0x80)
74b72a59 914 m = (typeof(m)){"LPe11002", max_speed, ports, "PCIe"};
964b77e7 915 else
74b72a59 916 m = (typeof(m)){"LPe11000", max_speed, ports, "PCIe"};
dea3101e 917 break;
e4adb204 918 case PCI_DEVICE_ID_ZEPHYR_SCSP:
74b72a59 919 m = (typeof(m)){"LPe11000", max_speed, ports, "PCIe"};
e4adb204
JSEC		 920 break;
921 case PCI_DEVICE_ID_ZEPHYR_DCSP:
74b72a59 922 m = (typeof(m)){"LPe11002-SP", max_speed, ports, "PCIe"};
e4adb204 923 break;
dea3101e 924 case PCI_DEVICE_ID_ZMID:
74b72a59 925 m = (typeof(m)){"LPe1150", max_speed, ports, "PCIe"};
dea3101e 926 break;
927 case PCI_DEVICE_ID_ZSMB:
74b72a59 928 m = (typeof(m)){"LPe111", max_speed, ports, "PCIe"};
dea3101e 929 break;
930 case PCI_DEVICE_ID_LP101:
74b72a59 931 m = (typeof(m)){"LP101", max_speed, ports, "PCI-X"};
dea3101e 932 break;
933 case PCI_DEVICE_ID_LP10000S:
74b72a59 934 m = (typeof(m)){"LP10000-S", max_speed, ports, "PCI"};
06325e74 935 break;
e4adb204 936 case PCI_DEVICE_ID_LP11000S:
e4adb204 937 case PCI_DEVICE_ID_LPE11000S:
5cc36b3c
JSEC		 938 switch (dev_subid) {
939 case PCI_SUBSYSTEM_ID_LP11000S:
74b72a59
JW		 940 m = (typeof(m)){"LP11000-S", max_speed,
941 ports, "PCI-X2"};
5cc36b3c
JSEC		 942 break;
943 case PCI_SUBSYSTEM_ID_LP11002S:
74b72a59
JW		 944 m = (typeof(m)){"LP11002-S", max_speed,
945 ports, "PCI-X2"};
5cc36b3c
JSEC		 946 break;
947 case PCI_SUBSYSTEM_ID_LPE11000S:
74b72a59
JW		 948 m = (typeof(m)){"LPe11000-S", max_speed,
949 ports, "PCIe"};
5cc36b3c
JSEC		 950 break;
951 case PCI_SUBSYSTEM_ID_LPE11002S:
74b72a59
JW		 952 m = (typeof(m)){"LPe11002-S", max_speed,
953 ports, "PCIe"};
5cc36b3c
JSEC		 954 break;
955 case PCI_SUBSYSTEM_ID_LPE11010S:
74b72a59
JW		 956 m = (typeof(m)){"LPe11010-S", max_speed,
957 "10-port ", "PCIe"};
5cc36b3c
JSEC		 958 break;
959 default:
041976fb 960 m = (typeof(m)){ NULL };
5cc36b3c
JSEC		 961 break;
962 }
963 break;
964 default:
041976fb 965 m = (typeof(m)){ NULL };
e4adb204 966 break;
dea3101e 967 }
74b72a59
JW		 968
969 if (mdp && mdp[0] == '\0')
970 snprintf(mdp, 79,"%s", m.name);
971 if (descp && descp[0] == '\0')
972 snprintf(descp, 255,
973 "Emulex %s %dGb %s%s Fibre Channel Adapter",
974 m.name, m.max_speed, m.ports, m.bus);
dea3101e 975}
976
977/**************************************************/
978/* lpfc_post_buffer */
979/* */
980/* This routine will post count buffers to the */
981/* ring with the QUE_RING_BUF_CN command. This */
982/* allows 3 buffers / command to be posted. */
983/* Returns the number of buffers NOT posted. */
984/**************************************************/
985int
986lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
987 int type)
988{
989 IOCB_t *icmd;
0bd4ca25 990 struct lpfc_iocbq *iocb;
dea3101e 991 struct lpfc_dmabuf *mp1, *mp2;
992
993 cnt += pring->missbufcnt;
994
995 /* While there are buffers to post */
996 while (cnt > 0) {
997 /* Allocate buffer for command iocb */
998 spin_lock_irq(phba->host->host_lock);
0bd4ca25 999 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 1000 spin_unlock_irq(phba->host->host_lock);
1001 if (iocb == NULL) {
1002 pring->missbufcnt = cnt;
1003 return cnt;
1004 }
dea3101e 1005 icmd = &iocb->iocb;
1006
1007 /* 2 buffers can be posted per command */
1008 /* Allocate buffer to post */
1009 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
1010 if (mp1)
1011 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
1012 &mp1->phys);
1013 if (mp1 == 0 || mp1->virt == 0) {
c9475cb0 1014 kfree(mp1);
dea3101e 1015 spin_lock_irq(phba->host->host_lock);
604a3e30 1016 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1017 spin_unlock_irq(phba->host->host_lock);
1018 pring->missbufcnt = cnt;
1019 return cnt;
1020 }
1021
1022 INIT_LIST_HEAD(&mp1->list);
1023 /* Allocate buffer to post */
1024 if (cnt > 1) {
1025 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
1026 if (mp2)
1027 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
1028 &mp2->phys);
1029 if (mp2 == 0 || mp2->virt == 0) {
c9475cb0 1030 kfree(mp2);
dea3101e 1031 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
1032 kfree(mp1);
1033 spin_lock_irq(phba->host->host_lock);
604a3e30 1034 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1035 spin_unlock_irq(phba->host->host_lock);
1036 pring->missbufcnt = cnt;
1037 return cnt;
1038 }
1039
1040 INIT_LIST_HEAD(&mp2->list);
1041 } else {
1042 mp2 = NULL;
1043 }
1044
1045 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
1046 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
1047 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
1048 icmd->ulpBdeCount = 1;
1049 cnt--;
1050 if (mp2) {
1051 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
1052 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
1053 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
1054 cnt--;
1055 icmd->ulpBdeCount = 2;
1056 }
1057
1058 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
1059 icmd->ulpLe = 1;
1060
1061 spin_lock_irq(phba->host->host_lock);
1062 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
1063 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
1064 kfree(mp1);
1065 cnt++;
1066 if (mp2) {
1067 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
1068 kfree(mp2);
1069 cnt++;
1070 }
604a3e30 1071 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1072 pring->missbufcnt = cnt;
1073 spin_unlock_irq(phba->host->host_lock);
1074 return cnt;
1075 }
1076 spin_unlock_irq(phba->host->host_lock);
1077 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
1078 if (mp2) {
1079 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
1080 }
1081 }
1082 pring->missbufcnt = 0;
1083 return 0;
1084}
1085
1086/************************************************************************/
1087/* */
1088/* lpfc_post_rcv_buf */
1089/* This routine post initial rcv buffers to the configured rings */
1090/* */
1091/************************************************************************/
1092static int
1093lpfc_post_rcv_buf(struct lpfc_hba * phba)
1094{
1095 struct lpfc_sli *psli = &phba->sli;
1096
1097 /* Ring 0, ELS / CT buffers */
1098 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
1099 /* Ring 2 - FCP no buffers needed */
1100
1101 return 0;
1102}
1103
1104#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
1105
1106/************************************************************************/
1107/* */
1108/* lpfc_sha_init */
1109/* */
1110/************************************************************************/
1111static void
1112lpfc_sha_init(uint32_t * HashResultPointer)
1113{
1114 HashResultPointer[0] = 0x67452301;
1115 HashResultPointer[1] = 0xEFCDAB89;
1116 HashResultPointer[2] = 0x98BADCFE;
1117 HashResultPointer[3] = 0x10325476;
1118 HashResultPointer[4] = 0xC3D2E1F0;
1119}
1120
1121/************************************************************************/
1122/* */
1123/* lpfc_sha_iterate */
1124/* */
1125/************************************************************************/
1126static void
1127lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
1128{
1129 int t;
1130 uint32_t TEMP;
1131 uint32_t A, B, C, D, E;
1132 t = 16;
1133 do {
1134 HashWorkingPointer[t] =
1135 S(1,
1136 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
1137 8] ^
1138 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
1139 } while (++t <= 79);
1140 t = 0;
1141 A = HashResultPointer[0];
1142 B = HashResultPointer[1];
1143 C = HashResultPointer[2];
1144 D = HashResultPointer[3];
1145 E = HashResultPointer[4];
1146
1147 do {
1148 if (t < 20) {
1149 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
1150 } else if (t < 40) {
1151 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
1152 } else if (t < 60) {
1153 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
1154 } else {
1155 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
1156 }
1157 TEMP += S(5, A) + E + HashWorkingPointer[t];
1158 E = D;
1159 D = C;
1160 C = S(30, B);
1161 B = A;
1162 A = TEMP;
1163 } while (++t <= 79);
1164
1165 HashResultPointer[0] += A;
1166 HashResultPointer[1] += B;
1167 HashResultPointer[2] += C;
1168 HashResultPointer[3] += D;
1169 HashResultPointer[4] += E;
1170
1171}
1172
1173/************************************************************************/
1174/* */
1175/* lpfc_challenge_key */
1176/* */
1177/************************************************************************/
1178static void
1179lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
1180{
1181 *HashWorking = (*RandomChallenge ^ *HashWorking);
1182}
1183
1184/************************************************************************/
1185/* */
1186/* lpfc_hba_init */
1187/* */
1188/************************************************************************/
1189void
1190lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
1191{
1192 int t;
1193 uint32_t *HashWorking;
1194 uint32_t *pwwnn = phba->wwnn;
1195
1196 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL);
1197 if (!HashWorking)
1198 return;
1199
1200 memset(HashWorking, 0, (80 * sizeof(uint32_t)));
1201 HashWorking[0] = HashWorking[78] = *pwwnn++;
1202 HashWorking[1] = HashWorking[79] = *pwwnn;
1203
1204 for (t = 0; t < 7; t++)
1205 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
1206
1207 lpfc_sha_init(hbainit);
1208 lpfc_sha_iterate(hbainit, HashWorking);
1209 kfree(HashWorking);
1210}
1211
1212static void
1213lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind)
1214{
1215 struct lpfc_nodelist *ndlp, *next_ndlp;
1216
1217 /* clean up phba - lpfc specific */
1218 lpfc_can_disctmo(phba);
1219 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
1220 nlp_listp) {
1221 lpfc_nlp_remove(phba, ndlp);
1222 }
1223
1224 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
1225 nlp_listp) {
1226 lpfc_nlp_remove(phba, ndlp);
1227 }
1228
1229 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
1230 nlp_listp) {
1231 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
1232 }
1233
1234 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
1235 nlp_listp) {
1236 lpfc_nlp_remove(phba, ndlp);
1237 }
1238
1239 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
1240 nlp_listp) {
1241 lpfc_nlp_remove(phba, ndlp);
1242 }
1243
1244 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list,
1245 nlp_listp) {
1246 lpfc_nlp_remove(phba, ndlp);
1247 }
1248
1249 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
1250 nlp_listp) {
1251 lpfc_nlp_remove(phba, ndlp);
1252 }
1253
1254 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
1255 nlp_listp) {
1256 lpfc_nlp_remove(phba, ndlp);
1257 }
1258
1259 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1260 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1261 INIT_LIST_HEAD(&phba->fc_unused_list);
1262 INIT_LIST_HEAD(&phba->fc_plogi_list);
1263 INIT_LIST_HEAD(&phba->fc_adisc_list);
1264 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1265 INIT_LIST_HEAD(&phba->fc_prli_list);
1266 INIT_LIST_HEAD(&phba->fc_npr_list);
1267
1268 phba->fc_map_cnt = 0;
1269 phba->fc_unmap_cnt = 0;
1270 phba->fc_plogi_cnt = 0;
1271 phba->fc_adisc_cnt = 0;
1272 phba->fc_reglogin_cnt = 0;
1273 phba->fc_prli_cnt = 0;
1274 phba->fc_npr_cnt = 0;
1275 phba->fc_unused_cnt= 0;
1276 return;
1277}
1278
1279static void
1280lpfc_establish_link_tmo(unsigned long ptr)
1281{
1282 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
1283 unsigned long iflag;
1284
1285
1286 /* Re-establishing Link, timer expired */
1287 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
1288 "%d:1300 Re-establishing Link, timer expired "
1289 "Data: x%x x%x\n",
1290 phba->brd_no, phba->fc_flag, phba->hba_state);
1291 spin_lock_irqsave(phba->host->host_lock, iflag);
1292 phba->fc_flag &= ~FC_ESTABLISH_LINK;
1293 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1294}
1295
1296static int
1297lpfc_stop_timer(struct lpfc_hba * phba)
1298{
1299 struct lpfc_sli *psli = &phba->sli;
1300
1301 /* Instead of a timer, this has been converted to a
1302 * deferred procedding list.
1303 */
1304 while (!list_empty(&phba->freebufList)) {
1305
1306 struct lpfc_dmabuf *mp = NULL;
1307
1308 list_remove_head((&phba->freebufList), mp,
1309 struct lpfc_dmabuf, list);
1310 if (mp) {
1311 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1312 kfree(mp);
1313 }
1314 }
1315
875fbdfe 1316 del_timer_sync(&phba->fcp_poll_timer);
dea3101e 1317 del_timer_sync(&phba->fc_estabtmo);
1318 del_timer_sync(&phba->fc_disctmo);
1319 del_timer_sync(&phba->fc_fdmitmo);
1320 del_timer_sync(&phba->els_tmofunc);
1321 psli = &phba->sli;
1322 del_timer_sync(&psli->mbox_tmo);
1323 return(1);
1324}
1325
1326int
1327lpfc_online(struct lpfc_hba * phba)
1328{
1329 if (!phba)
1330 return 0;
1331
1332 if (!(phba->fc_flag & FC_OFFLINE_MODE))
1333 return 0;
1334
1335 lpfc_printf_log(phba,
1336 KERN_WARNING,
1337 LOG_INIT,
1338 "%d:0458 Bring Adapter online\n",
1339 phba->brd_no);
1340
1341 if (!lpfc_sli_queue_setup(phba))
1342 return 1;
1343
1344 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */
1345 return 1;
1346
1347 spin_lock_irq(phba->host->host_lock);
1348 phba->fc_flag &= ~FC_OFFLINE_MODE;
1349 spin_unlock_irq(phba->host->host_lock);
1350
dea3101e 1351 return 0;
1352}
1353
1354int
1355lpfc_offline(struct lpfc_hba * phba)
1356{
1357 struct lpfc_sli_ring *pring;
1358 struct lpfc_sli *psli;
1359 unsigned long iflag;
688a8863
JS		 1360 int i;
1361 int cnt = 0;
dea3101e 1362
1363 if (!phba)
1364 return 0;
1365
1366 if (phba->fc_flag & FC_OFFLINE_MODE)
1367 return 0;
1368
dea3101e 1369 psli = &phba->sli;
dea3101e 1370
1371 lpfc_linkdown(phba);
b4c02652 1372 lpfc_sli_flush_mbox_queue(phba);
dea3101e 1373
688a8863
JS		 1374 for (i = 0; i < psli->num_rings; i++) {
1375 pring = &psli->ring[i];
1376 /* The linkdown event takes 30 seconds to timeout. */
1377 while (pring->txcmplq_cnt) {
1378 mdelay(10);
1379 if (cnt++ > 3000) {
1380 lpfc_printf_log(phba,
1381 KERN_WARNING, LOG_INIT,
1382 "%d:0466 Outstanding IO when "
1383 "bringing Adapter offline\n",
1384 phba->brd_no);
1385 break;
1386 }
1387 }
dea3101e 1388 }
1389
688a8863 1390
dea3101e 1391 /* stop all timers associated with this hba */
1392 lpfc_stop_timer(phba);
1393 phba->work_hba_events = 0;
33ccf8d1 1394 phba->work_ha = 0;
dea3101e 1395
1396 lpfc_printf_log(phba,
1397 KERN_WARNING,
1398 LOG_INIT,
1399 "%d:0460 Bring Adapter offline\n",
1400 phba->brd_no);
1401
1402 /* Bring down the SLI Layer and cleanup. The HBA is offline
1403 now. */
1404 lpfc_sli_hba_down(phba);
1405 lpfc_cleanup(phba, 1);
1406 spin_lock_irqsave(phba->host->host_lock, iflag);
1407 phba->fc_flag |= FC_OFFLINE_MODE;
1408 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1409 return 0;
1410}
1411
1412/******************************************************************************
1413* Function name: lpfc_scsi_free
1414*
1415* Description: Called from lpfc_pci_remove_one free internal driver resources
1416*
1417******************************************************************************/
1418static int
1419lpfc_scsi_free(struct lpfc_hba * phba)
1420{
1421 struct lpfc_scsi_buf *sb, *sb_next;
1422 struct lpfc_iocbq *io, *io_next;
1423
1424 spin_lock_irq(phba->host->host_lock);
1425 /* Release all the lpfc_scsi_bufs maintained by this host. */
1426 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) {
1427 list_del(&sb->list);
1428 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
1429 sb->dma_handle);
1430 kfree(sb);
1431 phba->total_scsi_bufs--;
1432 }
1433
1434 /* Release all the lpfc_iocbq entries maintained by this host. */
1435 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
1436 list_del(&io->list);
1437 kfree(io);
1438 phba->total_iocbq_bufs--;
1439 }
1440
1441 spin_unlock_irq(phba->host->host_lock);
1442
1443 return 0;
1444}
1445
1446
1447static int __devinit
1448lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1449{
1450 struct Scsi_Host *host;
1451 struct lpfc_hba *phba;
1452 struct lpfc_sli *psli;
1453 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
1454 unsigned long bar0map_len, bar2map_len;
1455 int error = -ENODEV, retval;
1456 int i;
604a3e30 1457 uint16_t iotag;
dea3101e 1458
1459 if (pci_enable_device(pdev))
1460 goto out;
1461 if (pci_request_regions(pdev, LPFC_DRIVER_NAME))
1462 goto out_disable_device;
1463
f888ba3c 1464 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba));
dea3101e 1465 if (!host)
1466 goto out_release_regions;
1467
1468 phba = (struct lpfc_hba*)host->hostdata;
1469 memset(phba, 0, sizeof (struct lpfc_hba));
dea3101e 1470 phba->host = host;
1471
1472 phba->fc_flag |= FC_LOADING;
1473 phba->pcidev = pdev;
1474
1475 /* Assign an unused board number */
1476 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL))
1477 goto out_put_host;
1478
1479 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no);
1480 if (error)
1481 goto out_put_host;
1482
1483 host->unique_id = phba->brd_no;
dea3101e 1484 INIT_LIST_HEAD(&phba->ctrspbuflist);
1485 INIT_LIST_HEAD(&phba->rnidrspbuflist);
1486 INIT_LIST_HEAD(&phba->freebufList);
1487
1488 /* Initialize timers used by driver */
1489 init_timer(&phba->fc_estabtmo);
1490 phba->fc_estabtmo.function = lpfc_establish_link_tmo;
1491 phba->fc_estabtmo.data = (unsigned long)phba;
1492 init_timer(&phba->fc_disctmo);
1493 phba->fc_disctmo.function = lpfc_disc_timeout;
1494 phba->fc_disctmo.data = (unsigned long)phba;
1495
1496 init_timer(&phba->fc_fdmitmo);
1497 phba->fc_fdmitmo.function = lpfc_fdmi_tmo;
1498 phba->fc_fdmitmo.data = (unsigned long)phba;
1499 init_timer(&phba->els_tmofunc);
1500 phba->els_tmofunc.function = lpfc_els_timeout;
1501 phba->els_tmofunc.data = (unsigned long)phba;
1502 psli = &phba->sli;
1503 init_timer(&psli->mbox_tmo);
1504 psli->mbox_tmo.function = lpfc_mbox_timeout;
1505 psli->mbox_tmo.data = (unsigned long)phba;
1506
875fbdfe
JSEC		 1507 init_timer(&phba->fcp_poll_timer);
1508 phba->fcp_poll_timer.function = lpfc_poll_timeout;
1509 phba->fcp_poll_timer.data = (unsigned long)phba;
1510
dea3101e 1511 /*
1512 * Get all the module params for configuring this host and then
1513 * establish the host parameters.
1514 */
1515 lpfc_get_cfgparam(phba);
1516
1517 host->max_id = LPFC_MAX_TARGET;
1518 host->max_lun = phba->cfg_max_luns;
1519 host->this_id = -1;
1520
1521 /* Initialize all internally managed lists. */
1522 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1523 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1524 INIT_LIST_HEAD(&phba->fc_unused_list);
1525 INIT_LIST_HEAD(&phba->fc_plogi_list);
1526 INIT_LIST_HEAD(&phba->fc_adisc_list);
1527 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1528 INIT_LIST_HEAD(&phba->fc_prli_list);
1529 INIT_LIST_HEAD(&phba->fc_npr_list);
1530
1531
1532 pci_set_master(pdev);
1533 retval = pci_set_mwi(pdev);
1534 if (retval)
1535 dev_printk(KERN_WARNING, &pdev->dev,
1536 "Warning: pci_set_mwi returned %d\n", retval);
1537
1538 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
1539 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
1540 goto out_idr_remove;
1541
1542 /*
1543 * Get the bus address of Bar0 and Bar2 and the number of bytes
1544 * required by each mapping.
1545 */
1546 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0);
1547 bar0map_len = pci_resource_len(phba->pcidev, 0);
1548
1549 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
1550 bar2map_len = pci_resource_len(phba->pcidev, 2);
1551
901a920f 1552 /* Map HBA SLIM to a kernel virtual address. */
dea3101e 1553 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
901a920f
JW		 1554 if (!phba->slim_memmap_p) {
1555 error = -ENODEV;
1556 dev_printk(KERN_ERR, &pdev->dev,
1557 "ioremap failed for SLIM memory.\n");
1558 goto out_idr_remove;
1559 }
1560
1561 /* Map HBA Control Registers to a kernel virtual address. */
dea3101e 1562 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
901a920f
JW		 1563 if (!phba->ctrl_regs_memmap_p) {
1564 error = -ENODEV;
1565 dev_printk(KERN_ERR, &pdev->dev,
1566 "ioremap failed for HBA control registers.\n");
1567 goto out_iounmap_slim;
1568 }
dea3101e 1569
1570 /* Allocate memory for SLI-2 structures */
1571 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
1572 &phba->slim2p_mapping, GFP_KERNEL);
1573 if (!phba->slim2p)
1574 goto out_iounmap;
1575
f91b392c 1576 memset(phba->slim2p, 0, SLI2_SLIM_SIZE);
dea3101e 1577
1578 /* Initialize the SLI Layer to run with lpfc HBAs. */
1579 lpfc_sli_setup(phba);
1580 lpfc_sli_queue_setup(phba);
1581
1582 error = lpfc_mem_alloc(phba);
1583 if (error)
1584 goto out_free_slim;
1585
1586 /* Initialize and populate the iocb list per host. */
1587 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
1588 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
1589 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
1590 if (iocbq_entry == NULL) {
1591 printk(KERN_ERR "%s: only allocated %d iocbs of "
1592 "expected %d count. Unloading driver.\n",
1593 __FUNCTION__, i, LPFC_IOCB_LIST_CNT);
1594 error = -ENOMEM;
1595 goto out_free_iocbq;
1596 }
1597
1598 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
604a3e30
JB		 1599 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
1600 if (iotag == 0) {
1601 kfree (iocbq_entry);
1602 printk(KERN_ERR "%s: failed to allocate IOTAG. "
1603 "Unloading driver.\n",
1604 __FUNCTION__);
1605 error = -ENOMEM;
1606 goto out_free_iocbq;
1607 }
dea3101e 1608 spin_lock_irq(phba->host->host_lock);
1609 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
1610 phba->total_iocbq_bufs++;
1611 spin_unlock_irq(phba->host->host_lock);
1612 }
1613
1614 /* Initialize HBA structure */
1615 phba->fc_edtov = FF_DEF_EDTOV;
1616 phba->fc_ratov = FF_DEF_RATOV;
1617 phba->fc_altov = FF_DEF_ALTOV;
1618 phba->fc_arbtov = FF_DEF_ARBTOV;
1619
1620 INIT_LIST_HEAD(&phba->work_list);
1621 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
1622 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
1623
1624 /* Startup the kernel thread for this host adapter. */
1625 phba->worker_thread = kthread_run(lpfc_do_work, phba,
1626 "lpfc_worker_%d", phba->brd_no);
1627 if (IS_ERR(phba->worker_thread)) {
1628 error = PTR_ERR(phba->worker_thread);
1629 goto out_free_iocbq;
1630 }
1631
8f6d98d2
JS		 1632 /*
1633 * Set initial can_queue value since 0 is no longer supported and
1634 * scsi_add_host will fail. This will be adjusted later based on the
1635 * max xri value determined in hba setup.
1636 */
dea3101e 1637 host->can_queue = phba->cfg_hba_queue_depth - 10;
1638
1639 /* Tell the midlayer we support 16 byte commands */
1640 host->max_cmd_len = 16;
1641
1642 /* Initialize the list of scsi buffers used by driver for scsi IO. */
875fbdfe 1643 spin_lock_init(&phba->scsi_buf_list_lock);
dea3101e 1644 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
1645
1646 host->transportt = lpfc_transport_template;
dea3101e 1647 pci_set_drvdata(pdev, host);
1648 error = scsi_add_host(host, &pdev->dev);
1649 if (error)
1650 goto out_kthread_stop;
1651
1652 error = lpfc_alloc_sysfs_attr(phba);
1653 if (error)
defbcf11 1654 goto out_remove_host;
dea3101e 1655
4ff43246
JS		 1656 if (phba->cfg_use_msi) {
1657 error = pci_enable_msi(phba->pcidev);
1658 if (error)
1659 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "%d:0452 "
1660 "Enable MSI failed, continuing with "
1661 "IRQ\n", phba->brd_no);
1662 }
1663
1d6f359a 1664 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, IRQF_SHARED,
dea3101e 1665 LPFC_DRIVER_NAME, phba);
1666 if (error) {
1667 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1668 "%d:0451 Enable interrupt handler failed\n",
1669 phba->brd_no);
1670 goto out_free_sysfs_attr;
1671 }
1672 phba->MBslimaddr = phba->slim_memmap_p;
1673 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
1674 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
1675 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
1676 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
1677
1678 error = lpfc_sli_hba_setup(phba);
defbcf11
JS		 1679 if (error) {
1680 error = -ENODEV;
dea3101e 1681 goto out_free_irq;
defbcf11 1682 }
dea3101e 1683
8f6d98d2
JS		 1684 /*
1685 * hba setup may have changed the hba_queue_depth so we need to adjust
1686 * the value of can_queue.
1687 */
1688 host->can_queue = phba->cfg_hba_queue_depth - 10;
1689
ce8b3ce5
JS		 1690 lpfc_discovery_wait(phba);
1691
875fbdfe
JSEC		 1692 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
1693 spin_lock_irq(phba->host->host_lock);
1694 lpfc_poll_start_timer(phba);
1695 spin_unlock_irq(phba->host->host_lock);
1696 }
1697
dea3101e 1698 /*
1699 * set fixed host attributes
1700 * Must done after lpfc_sli_hba_setup()
1701 */
1702
68ce1eb5
AM		 1703 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
1704 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
dea3101e 1705 fc_host_supported_classes(host) = FC_COS_CLASS3;
1706
1707 memset(fc_host_supported_fc4s(host), 0,
1708 sizeof(fc_host_supported_fc4s(host)));
1709 fc_host_supported_fc4s(host)[2] = 1;
1710 fc_host_supported_fc4s(host)[7] = 1;
1711
1712 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
1713
1714 fc_host_supported_speeds(host) = 0;
74b72a59 1715 if (phba->lmt & LMT_10Gb)
dea3101e 1716 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
74b72a59 1717 if (phba->lmt & LMT_4Gb)
dea3101e 1718 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
74b72a59 1719 if (phba->lmt & LMT_2Gb)
dea3101e 1720 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
74b72a59
JW		 1721 if (phba->lmt & LMT_1Gb)
1722 fc_host_supported_speeds(host) |= FC_PORTSPEED_1GBIT;
dea3101e 1723
1724 fc_host_maxframe_size(host) =
1725 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
1726 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb);
1727
1728 /* This value is also unchanging */
1729 memset(fc_host_active_fc4s(host), 0,
1730 sizeof(fc_host_active_fc4s(host)));
1731 fc_host_active_fc4s(host)[2] = 1;
1732 fc_host_active_fc4s(host)[7] = 1;
1733
1734 spin_lock_irq(phba->host->host_lock);
1735 phba->fc_flag &= ~FC_LOADING;
1736 spin_unlock_irq(phba->host->host_lock);
1737 return 0;
1738
1739out_free_irq:
1740 lpfc_stop_timer(phba);
1741 phba->work_hba_events = 0;
1742 free_irq(phba->pcidev->irq, phba);
4ff43246 1743 pci_disable_msi(phba->pcidev);
dea3101e 1744out_free_sysfs_attr:
1745 lpfc_free_sysfs_attr(phba);
defbcf11
JS		 1746out_remove_host:
1747 fc_remove_host(phba->host);
1748 scsi_remove_host(phba->host);
dea3101e 1749out_kthread_stop:
1750 kthread_stop(phba->worker_thread);
1751out_free_iocbq:
1752 list_for_each_entry_safe(iocbq_entry, iocbq_next,
1753 &phba->lpfc_iocb_list, list) {
1754 spin_lock_irq(phba->host->host_lock);
1755 kfree(iocbq_entry);
1756 phba->total_iocbq_bufs--;
1757 spin_unlock_irq(phba->host->host_lock);
1758 }
1759 lpfc_mem_free(phba);
1760out_free_slim:
1761 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p,
1762 phba->slim2p_mapping);
1763out_iounmap:
1764 iounmap(phba->ctrl_regs_memmap_p);
901a920f 1765out_iounmap_slim:
dea3101e 1766 iounmap(phba->slim_memmap_p);
1767out_idr_remove:
1768 idr_remove(&lpfc_hba_index, phba->brd_no);
1769out_put_host:
defbcf11 1770 phba->host = NULL;
dea3101e 1771 scsi_host_put(host);
1772out_release_regions:
1773 pci_release_regions(pdev);
1774out_disable_device:
1775 pci_disable_device(pdev);
1776out:
defbcf11 1777 pci_set_drvdata(pdev, NULL);
dea3101e 1778 return error;
1779}
1780
1781static void __devexit
1782lpfc_pci_remove_one(struct pci_dev *pdev)
1783{
1784 struct Scsi_Host *host = pci_get_drvdata(pdev);
7f0b5b19 1785 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
dea3101e 1786 unsigned long iflag;
1787
1788 lpfc_free_sysfs_attr(phba);
1789
1790 spin_lock_irqsave(phba->host->host_lock, iflag);
1791 phba->fc_flag |= FC_UNLOADING;
1792
1793 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1794
1795 fc_remove_host(phba->host);
1796 scsi_remove_host(phba->host);
1797
1798 kthread_stop(phba->worker_thread);
1799
1800 /*
1801 * Bring down the SLI Layer. This step disable all interrupts,
1802 * clears the rings, discards all mailbox commands, and resets
1803 * the HBA.
1804 */
1805 lpfc_sli_hba_down(phba);
41415862 1806 lpfc_sli_brdrestart(phba);
dea3101e 1807
1808 /* Release the irq reservation */
1809 free_irq(phba->pcidev->irq, phba);
4ff43246 1810 pci_disable_msi(phba->pcidev);
dea3101e 1811
1812 lpfc_cleanup(phba, 0);
1813 lpfc_stop_timer(phba);
1814 phba->work_hba_events = 0;
1815
1816 /*
1817 * Call scsi_free before mem_free since scsi bufs are released to their
1818 * corresponding pools here.
1819 */
1820 lpfc_scsi_free(phba);
1821 lpfc_mem_free(phba);
1822
1823 /* Free resources associated with SLI2 interface */
1824 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
1825 phba->slim2p, phba->slim2p_mapping);
1826
1827 /* unmap adapter SLIM and Control Registers */
1828 iounmap(phba->ctrl_regs_memmap_p);
1829 iounmap(phba->slim_memmap_p);
1830
1831 pci_release_regions(phba->pcidev);
1832 pci_disable_device(phba->pcidev);
1833
1834 idr_remove(&lpfc_hba_index, phba->brd_no);
1835 scsi_host_put(phba->host);
1836
1837 pci_set_drvdata(pdev, NULL);
1838}
1839
1840static struct pci_device_id lpfc_id_table[] = {
1841 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
1842 PCI_ANY_ID, PCI_ANY_ID, },
06325e74
JSEC		 1843 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
1844 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1845 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
1846 PCI_ANY_ID, PCI_ANY_ID, },
1847 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
1848 PCI_ANY_ID, PCI_ANY_ID, },
1849 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR,
1850 PCI_ANY_ID, PCI_ANY_ID, },
1851 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY,
1852 PCI_ANY_ID, PCI_ANY_ID, },
1853 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY,
1854 PCI_ANY_ID, PCI_ANY_ID, },
1855 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY,
1856 PCI_ANY_ID, PCI_ANY_ID, },
1857 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
1858 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1859 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE,
1860 PCI_ANY_ID, PCI_ANY_ID, },
1861 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP,
1862 PCI_ANY_ID, PCI_ANY_ID, },
1863 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP,
1864 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1865 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
1866 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1867 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP,
1868 PCI_ANY_ID, PCI_ANY_ID, },
1869 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP,
1870 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1871 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
1872 PCI_ANY_ID, PCI_ANY_ID, },
1873 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
1874 PCI_ANY_ID, PCI_ANY_ID, },
1875 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
1876 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1877 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP,
1878 PCI_ANY_ID, PCI_ANY_ID, },
1879 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP,
1880 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1881 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
1882 PCI_ANY_ID, PCI_ANY_ID, },
1883 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
1884 PCI_ANY_ID, PCI_ANY_ID, },
1885 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY,
1886 PCI_ANY_ID, PCI_ANY_ID, },
1887 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101,
1888 PCI_ANY_ID, PCI_ANY_ID, },
1889 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
1890 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1891 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S,
1892 PCI_ANY_ID, PCI_ANY_ID, },
1893 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S,
1894 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e 1895 { 0 }
1896};
1897
1898MODULE_DEVICE_TABLE(pci, lpfc_id_table);
1899
1900static struct pci_driver lpfc_driver = {
1901 .name = LPFC_DRIVER_NAME,
1902 .id_table = lpfc_id_table,
1903 .probe = lpfc_pci_probe_one,
1904 .remove = __devexit_p(lpfc_pci_remove_one),
1905};
1906
1907static int __init
1908lpfc_init(void)
1909{
1910 int error = 0;
1911
1912 printk(LPFC_MODULE_DESC "\n");
c44ce173 1913 printk(LPFC_COPYRIGHT "\n");
dea3101e 1914
1915 lpfc_transport_template =
1916 fc_attach_transport(&lpfc_transport_functions);
1917 if (!lpfc_transport_template)
1918 return -ENOMEM;
1919 error = pci_register_driver(&lpfc_driver);
1920 if (error)
1921 fc_release_transport(lpfc_transport_template);
1922
1923 return error;
1924}
1925
1926static void __exit
1927lpfc_exit(void)
1928{
1929 pci_unregister_driver(&lpfc_driver);
1930 fc_release_transport(lpfc_transport_template);
1931}
1932
1933module_init(lpfc_init);
1934module_exit(lpfc_exit);
1935MODULE_LICENSE("GPL");
1936MODULE_DESCRIPTION(LPFC_MODULE_DESC);
1937MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
1938MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Linux kernel - Deliverables
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