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[SCSI] lpfc: Fix for "command completion for iotax x?? not found"
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc_sli.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173
JSEC		 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
dea3101e 22#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
91886523 27#include <scsi/scsi.h>
dea3101e 28#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
f888ba3c 31#include <scsi/scsi_transport_fc.h>
dea3101e 32
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
41
42/*
43 * Define macro to log: Mailbox command x%x cannot issue Data
44 * This allows multiple uses of lpfc_msgBlk0311
45 * w/o perturbing log msg utility.
46 */
47#define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
48 lpfc_printf_log(phba, \
49 KERN_INFO, \
50 LOG_MBOX | LOG_SLI, \
51 "%d:0311 Mailbox command x%x cannot issue " \
52 "Data: x%x x%x x%x\n", \
53 phba->brd_no, \
54 mb->mbxCommand, \
55 phba->hba_state, \
56 psli->sli_flag, \
57 flag);
58
59
60/* There are only four IOCB completion types. */
61typedef enum _lpfc_iocb_type {
62 LPFC_UNKNOWN_IOCB,
63 LPFC_UNSOL_IOCB,
64 LPFC_SOL_IOCB,
65 LPFC_ABORT_IOCB
66} lpfc_iocb_type;
67
604a3e30
JB		 68void
69lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
70{
71 size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
72
73 /*
74 * Clean all volatile data fields, preserve iotag and node struct.
75 */
76 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
77 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
78}
79
dea3101e 80/*
81 * Translate the iocb command to an iocb command type used to decide the final
82 * disposition of each completed IOCB.
83 */
84static lpfc_iocb_type
85lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
86{
87 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
88
89 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
90 return 0;
91
92 switch (iocb_cmnd) {
93 case CMD_XMIT_SEQUENCE_CR:
94 case CMD_XMIT_SEQUENCE_CX:
95 case CMD_XMIT_BCAST_CN:
96 case CMD_XMIT_BCAST_CX:
97 case CMD_ELS_REQUEST_CR:
98 case CMD_ELS_REQUEST_CX:
99 case CMD_CREATE_XRI_CR:
100 case CMD_CREATE_XRI_CX:
101 case CMD_GET_RPI_CN:
102 case CMD_XMIT_ELS_RSP_CX:
103 case CMD_GET_RPI_CR:
104 case CMD_FCP_IWRITE_CR:
105 case CMD_FCP_IWRITE_CX:
106 case CMD_FCP_IREAD_CR:
107 case CMD_FCP_IREAD_CX:
108 case CMD_FCP_ICMND_CR:
109 case CMD_FCP_ICMND_CX:
110 case CMD_ADAPTER_MSG:
111 case CMD_ADAPTER_DUMP:
112 case CMD_XMIT_SEQUENCE64_CR:
113 case CMD_XMIT_SEQUENCE64_CX:
114 case CMD_XMIT_BCAST64_CN:
115 case CMD_XMIT_BCAST64_CX:
116 case CMD_ELS_REQUEST64_CR:
117 case CMD_ELS_REQUEST64_CX:
118 case CMD_FCP_IWRITE64_CR:
119 case CMD_FCP_IWRITE64_CX:
120 case CMD_FCP_IREAD64_CR:
121 case CMD_FCP_IREAD64_CX:
122 case CMD_FCP_ICMND64_CR:
123 case CMD_FCP_ICMND64_CX:
124 case CMD_GEN_REQUEST64_CR:
125 case CMD_GEN_REQUEST64_CX:
126 case CMD_XMIT_ELS_RSP64_CX:
127 type = LPFC_SOL_IOCB;
128 break;
129 case CMD_ABORT_XRI_CN:
130 case CMD_ABORT_XRI_CX:
131 case CMD_CLOSE_XRI_CN:
132 case CMD_CLOSE_XRI_CX:
133 case CMD_XRI_ABORTED_CX:
134 case CMD_ABORT_MXRI64_CN:
135 type = LPFC_ABORT_IOCB;
136 break;
137 case CMD_RCV_SEQUENCE_CX:
138 case CMD_RCV_ELS_REQ_CX:
139 case CMD_RCV_SEQUENCE64_CX:
140 case CMD_RCV_ELS_REQ64_CX:
141 type = LPFC_UNSOL_IOCB;
142 break;
143 default:
144 type = LPFC_UNKNOWN_IOCB;
145 break;
146 }
147
148 return type;
149}
150
151static int
152lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
153{
154 struct lpfc_sli *psli = &phba->sli;
155 MAILBOX_t *pmbox = &pmb->mb;
156 int i, rc;
157
158 for (i = 0; i < psli->num_rings; i++) {
159 phba->hba_state = LPFC_INIT_MBX_CMDS;
160 lpfc_config_ring(phba, i, pmb);
161 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
162 if (rc != MBX_SUCCESS) {
163 lpfc_printf_log(phba,
164 KERN_ERR,
165 LOG_INIT,
166 "%d:0446 Adapter failed to init, "
167 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
168 "ring %d\n",
169 phba->brd_no,
170 pmbox->mbxCommand,
171 pmbox->mbxStatus,
172 i);
173 phba->hba_state = LPFC_HBA_ERROR;
174 return -ENXIO;
175 }
176 }
177 return 0;
178}
179
180static int
181lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
182 struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
183{
184 uint16_t iotag;
185
186 list_add_tail(&piocb->list, &pring->txcmplq);
187 pring->txcmplq_cnt++;
188 if (unlikely(pring->ringno == LPFC_ELS_RING))
189 mod_timer(&phba->els_tmofunc,
190 jiffies + HZ * (phba->fc_ratov << 1));
191
192 if (pring->fast_lookup) {
193 /* Setup fast lookup based on iotag for completion */
194 iotag = piocb->iocb.ulpIoTag;
195 if (iotag && (iotag < pring->fast_iotag))
196 *(pring->fast_lookup + iotag) = piocb;
197 else {
198
199 /* Cmd ring <ringno> put: iotag <iotag> greater then
200 configured max <fast_iotag> wd0 <icmd> */
201 lpfc_printf_log(phba,
202 KERN_ERR,
203 LOG_SLI,
204 "%d:0316 Cmd ring %d put: iotag x%x "
205 "greater then configured max x%x "
206 "wd0 x%x\n",
207 phba->brd_no,
208 pring->ringno, iotag,
209 pring->fast_iotag,
210 *(((uint32_t *)(&piocb->iocb)) + 7));
211 }
212 }
213 return (0);
214}
215
216static struct lpfc_iocbq *
217lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
218{
219 struct list_head *dlp;
220 struct lpfc_iocbq *cmd_iocb;
221
222 dlp = &pring->txq;
223 cmd_iocb = NULL;
224 list_remove_head((&pring->txq), cmd_iocb,
225 struct lpfc_iocbq,
226 list);
227 if (cmd_iocb) {
228 /* If the first ptr is not equal to the list header,
229 * deque the IOCBQ_t and return it.
230 */
231 pring->txq_cnt--;
232 }
233 return (cmd_iocb);
234}
235
236static IOCB_t *
237lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
238{
4cc2da1d 239 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 240 uint32_t max_cmd_idx = pring->numCiocb;
241 IOCB_t *iocb = NULL;
242
243 if ((pring->next_cmdidx == pring->cmdidx) &&
244 (++pring->next_cmdidx >= max_cmd_idx))
245 pring->next_cmdidx = 0;
246
247 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
248
249 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
250
251 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
252 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
253 "%d:0315 Ring %d issue: portCmdGet %d "
254 "is bigger then cmd ring %d\n",
255 phba->brd_no, pring->ringno,
256 pring->local_getidx, max_cmd_idx);
257
258 phba->hba_state = LPFC_HBA_ERROR;
259 /*
260 * All error attention handlers are posted to
261 * worker thread
262 */
263 phba->work_ha |= HA_ERATT;
264 phba->work_hs = HS_FFER3;
265 if (phba->work_wait)
266 wake_up(phba->work_wait);
267
268 return NULL;
269 }
270
271 if (pring->local_getidx == pring->next_cmdidx)
272 return NULL;
273 }
274
275 iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
276
277 return iocb;
278}
279
604a3e30
JB		 280uint16_t
281lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
dea3101e 282{
604a3e30
JB		 283 struct lpfc_iocbq ** new_arr;
284 struct lpfc_iocbq ** old_arr;
285 size_t new_len;
286 struct lpfc_sli *psli = &phba->sli;
287 uint16_t iotag;
dea3101e 288
604a3e30
JB		 289 spin_lock_irq(phba->host->host_lock);
290 iotag = psli->last_iotag;
291 if(++iotag < psli->iocbq_lookup_len) {
292 psli->last_iotag = iotag;
293 psli->iocbq_lookup[iotag] = iocbq;
294 spin_unlock_irq(phba->host->host_lock);
295 iocbq->iotag = iotag;
296 return iotag;
297 }
298 else if (psli->iocbq_lookup_len < (0xffff
299 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
300 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
301 spin_unlock_irq(phba->host->host_lock);
302 new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
303 GFP_KERNEL);
304 if (new_arr) {
305 memset((char *)new_arr, 0,
306 new_len * sizeof (struct lpfc_iocbq *));
307 spin_lock_irq(phba->host->host_lock);
308 old_arr = psli->iocbq_lookup;
309 if (new_len <= psli->iocbq_lookup_len) {
310 /* highly unprobable case */
311 kfree(new_arr);
312 iotag = psli->last_iotag;
313 if(++iotag < psli->iocbq_lookup_len) {
314 psli->last_iotag = iotag;
315 psli->iocbq_lookup[iotag] = iocbq;
316 spin_unlock_irq(phba->host->host_lock);
317 iocbq->iotag = iotag;
318 return iotag;
319 }
320 spin_unlock_irq(phba->host->host_lock);
321 return 0;
322 }
323 if (psli->iocbq_lookup)
324 memcpy(new_arr, old_arr,
325 ((psli->last_iotag + 1) *
326 sizeof (struct lpfc_iocbq *)));
327 psli->iocbq_lookup = new_arr;
328 psli->iocbq_lookup_len = new_len;
329 psli->last_iotag = iotag;
330 psli->iocbq_lookup[iotag] = iocbq;
331 spin_unlock_irq(phba->host->host_lock);
332 iocbq->iotag = iotag;
333 kfree(old_arr);
334 return iotag;
335 }
dea3101e 336 }
337
604a3e30
JB		 338 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
339 "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
340 phba->brd_no, psli->last_iotag);
dea3101e 341
604a3e30 342 return 0;
dea3101e 343}
344
345static void
346lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
347 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
348{
349 /*
604a3e30 350 * Set up an iotag
dea3101e 351 */
604a3e30 352 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 353
354 /*
355 * Issue iocb command to adapter
356 */
357 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
358 wmb();
359 pring->stats.iocb_cmd++;
360
361 /*
362 * If there is no completion routine to call, we can release the
363 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
364 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
365 */
366 if (nextiocb->iocb_cmpl)
367 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30
JB		 368 else
369 lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e 370
371 /*
372 * Let the HBA know what IOCB slot will be the next one the
373 * driver will put a command into.
374 */
375 pring->cmdidx = pring->next_cmdidx;
f91b392c 376 writel(pring->cmdidx, phba->MBslimaddr
dea3101e 377 + (SLIMOFF + (pring->ringno * 2)) * 4);
378}
379
380static void
381lpfc_sli_update_full_ring(struct lpfc_hba * phba,
382 struct lpfc_sli_ring *pring)
383{
384 int ringno = pring->ringno;
385
386 pring->flag |= LPFC_CALL_RING_AVAILABLE;
387
388 wmb();
389
390 /*
391 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
392 * The HBA will tell us when an IOCB entry is available.
393 */
394 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
395 readl(phba->CAregaddr); /* flush */
396
397 pring->stats.iocb_cmd_full++;
398}
399
400static void
401lpfc_sli_update_ring(struct lpfc_hba * phba,
402 struct lpfc_sli_ring *pring)
403{
404 int ringno = pring->ringno;
405
406 /*
407 * Tell the HBA that there is work to do in this ring.
408 */
409 wmb();
410 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
411 readl(phba->CAregaddr); /* flush */
412}
413
414static void
415lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
416{
417 IOCB_t *iocb;
418 struct lpfc_iocbq *nextiocb;
419
420 /*
421 * Check to see if:
422 * (a) there is anything on the txq to send
423 * (b) link is up
424 * (c) link attention events can be processed (fcp ring only)
425 * (d) IOCB processing is not blocked by the outstanding mbox command.
426 */
427 if (pring->txq_cnt &&
428 (phba->hba_state > LPFC_LINK_DOWN) &&
429 (pring->ringno != phba->sli.fcp_ring ||
430 phba->sli.sli_flag & LPFC_PROCESS_LA) &&
431 !(pring->flag & LPFC_STOP_IOCB_MBX)) {
432
433 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
434 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
435 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
436
437 if (iocb)
438 lpfc_sli_update_ring(phba, pring);
439 else
440 lpfc_sli_update_full_ring(phba, pring);
441 }
442
443 return;
444}
445
446/* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
447static void
448lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
449{
4cc2da1d 450 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
dea3101e 451
452 /* If the ring is active, flag it */
453 if (phba->sli.ring[ringno].cmdringaddr) {
454 if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
455 phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
456 /*
457 * Force update of the local copy of cmdGetInx
458 */
459 phba->sli.ring[ringno].local_getidx
460 = le32_to_cpu(pgp->cmdGetInx);
461 spin_lock_irq(phba->host->host_lock);
462 lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
463 spin_unlock_irq(phba->host->host_lock);
464 }
465 }
466}
467
468static int
469lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
470{
471 uint8_t ret;
472
473 switch (mbxCommand) {
474 case MBX_LOAD_SM:
475 case MBX_READ_NV:
476 case MBX_WRITE_NV:
477 case MBX_RUN_BIU_DIAG:
478 case MBX_INIT_LINK:
479 case MBX_DOWN_LINK:
480 case MBX_CONFIG_LINK:
481 case MBX_CONFIG_RING:
482 case MBX_RESET_RING:
483 case MBX_READ_CONFIG:
484 case MBX_READ_RCONFIG:
485 case MBX_READ_SPARM:
486 case MBX_READ_STATUS:
487 case MBX_READ_RPI:
488 case MBX_READ_XRI:
489 case MBX_READ_REV:
490 case MBX_READ_LNK_STAT:
491 case MBX_REG_LOGIN:
492 case MBX_UNREG_LOGIN:
493 case MBX_READ_LA:
494 case MBX_CLEAR_LA:
495 case MBX_DUMP_MEMORY:
496 case MBX_DUMP_CONTEXT:
497 case MBX_RUN_DIAGS:
498 case MBX_RESTART:
499 case MBX_UPDATE_CFG:
500 case MBX_DOWN_LOAD:
501 case MBX_DEL_LD_ENTRY:
502 case MBX_RUN_PROGRAM:
503 case MBX_SET_MASK:
504 case MBX_SET_SLIM:
505 case MBX_UNREG_D_ID:
506 case MBX_CONFIG_FARP:
507 case MBX_LOAD_AREA:
508 case MBX_RUN_BIU_DIAG64:
509 case MBX_CONFIG_PORT:
510 case MBX_READ_SPARM64:
511 case MBX_READ_RPI64:
512 case MBX_REG_LOGIN64:
513 case MBX_READ_LA64:
514 case MBX_FLASH_WR_ULA:
515 case MBX_SET_DEBUG:
516 case MBX_LOAD_EXP_ROM:
517 ret = mbxCommand;
518 break;
519 default:
520 ret = MBX_SHUTDOWN;
521 break;
522 }
523 return (ret);
524}
525static void
526lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
527{
528 wait_queue_head_t *pdone_q;
529
530 /*
531 * If pdone_q is empty, the driver thread gave up waiting and
532 * continued running.
533 */
534 pdone_q = (wait_queue_head_t *) pmboxq->context1;
535 if (pdone_q)
536 wake_up_interruptible(pdone_q);
537 return;
538}
539
540void
541lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
542{
543 struct lpfc_dmabuf *mp;
544 mp = (struct lpfc_dmabuf *) (pmb->context1);
545 if (mp) {
546 lpfc_mbuf_free(phba, mp->virt, mp->phys);
547 kfree(mp);
548 }
549 mempool_free( pmb, phba->mbox_mem_pool);
550 return;
551}
552
553int
554lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
555{
556 MAILBOX_t *mbox;
557 MAILBOX_t *pmbox;
558 LPFC_MBOXQ_t *pmb;
559 struct lpfc_sli *psli;
560 int i, rc;
561 uint32_t process_next;
562
563 psli = &phba->sli;
564 /* We should only get here if we are in SLI2 mode */
565 if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
566 return (1);
567 }
568
569 phba->sli.slistat.mbox_event++;
570
571 /* Get a Mailbox buffer to setup mailbox commands for callback */
572 if ((pmb = phba->sli.mbox_active)) {
573 pmbox = &pmb->mb;
4cc2da1d 574 mbox = &phba->slim2p->mbx;
dea3101e 575
576 /* First check out the status word */
577 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
578
579 /* Sanity check to ensure the host owns the mailbox */
580 if (pmbox->mbxOwner != OWN_HOST) {
581 /* Lets try for a while */
582 for (i = 0; i < 10240; i++) {
583 /* First copy command data */
584 lpfc_sli_pcimem_bcopy(mbox, pmbox,
585 sizeof (uint32_t));
586 if (pmbox->mbxOwner == OWN_HOST)
587 goto mbout;
588 }
589 /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
590 <status> */
591 lpfc_printf_log(phba,
592 KERN_ERR,
593 LOG_MBOX | LOG_SLI,
594 "%d:0304 Stray Mailbox Interrupt "
595 "mbxCommand x%x mbxStatus x%x\n",
596 phba->brd_no,
597 pmbox->mbxCommand,
598 pmbox->mbxStatus);
599
600 spin_lock_irq(phba->host->host_lock);
601 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
602 spin_unlock_irq(phba->host->host_lock);
603 return (1);
604 }
605
606 mbout:
607 del_timer_sync(&phba->sli.mbox_tmo);
608 phba->work_hba_events &= ~WORKER_MBOX_TMO;
609
610 /*
611 * It is a fatal error if unknown mbox command completion.
612 */
613 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
614 MBX_SHUTDOWN) {
615
616 /* Unknow mailbox command compl */
617 lpfc_printf_log(phba,
618 KERN_ERR,
619 LOG_MBOX | LOG_SLI,
620 "%d:0323 Unknown Mailbox command %x Cmpl\n",
621 phba->brd_no,
622 pmbox->mbxCommand);
623 phba->hba_state = LPFC_HBA_ERROR;
624 phba->work_hs = HS_FFER3;
625 lpfc_handle_eratt(phba);
626 return (0);
627 }
628
629 phba->sli.mbox_active = NULL;
630 if (pmbox->mbxStatus) {
631 phba->sli.slistat.mbox_stat_err++;
632 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
633 /* Mbox cmd cmpl error - RETRYing */
634 lpfc_printf_log(phba,
635 KERN_INFO,
636 LOG_MBOX | LOG_SLI,
637 "%d:0305 Mbox cmd cmpl error - "
638 "RETRYing Data: x%x x%x x%x x%x\n",
639 phba->brd_no,
640 pmbox->mbxCommand,
641 pmbox->mbxStatus,
642 pmbox->un.varWords[0],
643 phba->hba_state);
644 pmbox->mbxStatus = 0;
645 pmbox->mbxOwner = OWN_HOST;
646 spin_lock_irq(phba->host->host_lock);
647 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
648 spin_unlock_irq(phba->host->host_lock);
649 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
650 if (rc == MBX_SUCCESS)
651 return (0);
652 }
653 }
654
655 /* Mailbox cmd <cmd> Cmpl <cmpl> */
656 lpfc_printf_log(phba,
657 KERN_INFO,
658 LOG_MBOX | LOG_SLI,
659 "%d:0307 Mailbox cmd x%x Cmpl x%p "
660 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
661 phba->brd_no,
662 pmbox->mbxCommand,
663 pmb->mbox_cmpl,
664 *((uint32_t *) pmbox),
665 pmbox->un.varWords[0],
666 pmbox->un.varWords[1],
667 pmbox->un.varWords[2],
668 pmbox->un.varWords[3],
669 pmbox->un.varWords[4],
670 pmbox->un.varWords[5],
671 pmbox->un.varWords[6],
672 pmbox->un.varWords[7]);
673
674 if (pmb->mbox_cmpl) {
675 lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
676 pmb->mbox_cmpl(phba,pmb);
677 }
678 }
679
680
681 do {
682 process_next = 0; /* by default don't loop */
683 spin_lock_irq(phba->host->host_lock);
684 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
685
686 /* Process next mailbox command if there is one */
687 if ((pmb = lpfc_mbox_get(phba))) {
688 spin_unlock_irq(phba->host->host_lock);
689 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
690 if (rc == MBX_NOT_FINISHED) {
691 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
692 pmb->mbox_cmpl(phba,pmb);
693 process_next = 1;
694 continue; /* loop back */
695 }
696 } else {
697 spin_unlock_irq(phba->host->host_lock);
698 /* Turn on IOCB processing */
699 for (i = 0; i < phba->sli.num_rings; i++) {
700 lpfc_sli_turn_on_ring(phba, i);
701 }
702
703 /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
704 while (!list_empty(&phba->freebufList)) {
705 struct lpfc_dmabuf *mp;
706
707 mp = NULL;
708 list_remove_head((&phba->freebufList),
709 mp,
710 struct lpfc_dmabuf,
711 list);
712 if (mp) {
713 lpfc_mbuf_free(phba, mp->virt,
714 mp->phys);
715 kfree(mp);
716 }
717 }
718 }
719
720 } while (process_next);
721
722 return (0);
723}
724static int
725lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
726 struct lpfc_iocbq *saveq)
727{
728 IOCB_t * irsp;
729 WORD5 * w5p;
730 uint32_t Rctl, Type;
731 uint32_t match, i;
732
733 match = 0;
734 irsp = &(saveq->iocb);
735 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
736 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
737 Rctl = FC_ELS_REQ;
738 Type = FC_ELS_DATA;
739 } else {
740 w5p =
741 (WORD5 *) & (saveq->iocb.un.
742 ulpWord[5]);
743 Rctl = w5p->hcsw.Rctl;
744 Type = w5p->hcsw.Type;
745
746 /* Firmware Workaround */
747 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
748 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
749 Rctl = FC_ELS_REQ;
750 Type = FC_ELS_DATA;
751 w5p->hcsw.Rctl = Rctl;
752 w5p->hcsw.Type = Type;
753 }
754 }
755 /* unSolicited Responses */
756 if (pring->prt[0].profile) {
757 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
758 match = 1;
759 } else {
760 /* We must search, based on rctl / type
761 for the right routine */
762 for (i = 0; i < pring->num_mask;
763 i++) {
764 if ((pring->prt[i].rctl ==
765 Rctl)
766 && (pring->prt[i].
767 type == Type)) {
768 (pring->prt[i].lpfc_sli_rcv_unsol_event)
769 (phba, pring, saveq);
770 match = 1;
771 break;
772 }
773 }
774 }
775 if (match == 0) {
776 /* Unexpected Rctl / Type received */
777 /* Ring <ringno> handler: unexpected
778 Rctl <Rctl> Type <Type> received */
779 lpfc_printf_log(phba,
780 KERN_WARNING,
781 LOG_SLI,
782 "%d:0313 Ring %d handler: unexpected Rctl x%x "
783 "Type x%x received \n",
784 phba->brd_no,
785 pring->ringno,
786 Rctl,
787 Type);
788 }
789 return(1);
790}
791
792static struct lpfc_iocbq *
604a3e30
JB		 793lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
794 struct lpfc_sli_ring * pring,
795 struct lpfc_iocbq * prspiocb)
dea3101e 796{
dea3101e 797 struct lpfc_iocbq *cmd_iocb = NULL;
798 uint16_t iotag;
799
604a3e30
JB		 800 iotag = prspiocb->iocb.ulpIoTag;
801
802 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
803 cmd_iocb = phba->sli.iocbq_lookup[iotag];
804 list_del(&cmd_iocb->list);
805 pring->txcmplq_cnt--;
806 return cmd_iocb;
dea3101e 807 }
808
dea3101e 809 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
604a3e30
JB		 810 "%d:0317 iotag x%x is out off "
811 "range: max iotag x%x wd0 x%x\n",
812 phba->brd_no, iotag,
813 phba->sli.last_iotag,
814 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e 815 return NULL;
816}
817
818static int
819lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
820 struct lpfc_iocbq *saveq)
821{
822 struct lpfc_iocbq * cmdiocbp;
823 int rc = 1;
824 unsigned long iflag;
825
826 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
827 spin_lock_irqsave(phba->host->host_lock, iflag);
604a3e30 828 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
dea3101e 829 if (cmdiocbp) {
830 if (cmdiocbp->iocb_cmpl) {
831 /*
832 * Post all ELS completions to the worker thread.
833 * All other are passed to the completion callback.
834 */
835 if (pring->ringno == LPFC_ELS_RING) {
836 spin_unlock_irqrestore(phba->host->host_lock,
837 iflag);
838 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
839 spin_lock_irqsave(phba->host->host_lock, iflag);
840 }
841 else {
842 if (cmdiocbp->iocb_flag & LPFC_IO_POLL)
843 rc = 0;
844
845 spin_unlock_irqrestore(phba->host->host_lock,
846 iflag);
847 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
848 spin_lock_irqsave(phba->host->host_lock, iflag);
849 }
604a3e30
JB		 850 } else
851 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e 852 } else {
853 /*
854 * Unknown initiating command based on the response iotag.
855 * This could be the case on the ELS ring because of
856 * lpfc_els_abort().
857 */
858 if (pring->ringno != LPFC_ELS_RING) {
859 /*
860 * Ring <ringno> handler: unexpected completion IoTag
861 * <IoTag>
862 */
863 lpfc_printf_log(phba,
864 KERN_WARNING,
865 LOG_SLI,
866 "%d:0322 Ring %d handler: unexpected "
867 "completion IoTag x%x Data: x%x x%x x%x x%x\n",
868 phba->brd_no,
869 pring->ringno,
870 saveq->iocb.ulpIoTag,
871 saveq->iocb.ulpStatus,
872 saveq->iocb.un.ulpWord[4],
873 saveq->iocb.ulpCommand,
874 saveq->iocb.ulpContext);
875 }
876 }
877 spin_unlock_irqrestore(phba->host->host_lock, iflag);
878 return rc;
879}
880
881/*
882 * This routine presumes LPFC_FCP_RING handling and doesn't bother
883 * to check it explicitly.
884 */
885static int
886lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
887 struct lpfc_sli_ring * pring, uint32_t mask)
888{
4cc2da1d 889 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 890 IOCB_t *irsp = NULL;
87f6eaff 891 IOCB_t *entry = NULL;
dea3101e 892 struct lpfc_iocbq *cmdiocbq = NULL;
893 struct lpfc_iocbq rspiocbq;
dea3101e 894 uint32_t status;
895 uint32_t portRspPut, portRspMax;
896 int rc = 1;
897 lpfc_iocb_type type;
898 unsigned long iflag;
899 uint32_t rsp_cmpl = 0;
900 void __iomem *to_slim;
901
902 spin_lock_irqsave(phba->host->host_lock, iflag);
903 pring->stats.iocb_event++;
904
dea3101e 905 /*
906 * The next available response entry should never exceed the maximum
907 * entries. If it does, treat it as an adapter hardware error.
908 */
909 portRspMax = pring->numRiocb;
910 portRspPut = le32_to_cpu(pgp->rspPutInx);
911 if (unlikely(portRspPut >= portRspMax)) {
912 /*
913 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
914 * rsp ring <portRspMax>
915 */
916 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
917 "%d:0312 Ring %d handler: portRspPut %d "
918 "is bigger then rsp ring %d\n",
919 phba->brd_no, pring->ringno, portRspPut,
920 portRspMax);
921
922 phba->hba_state = LPFC_HBA_ERROR;
923
924 /* All error attention handlers are posted to worker thread */
925 phba->work_ha |= HA_ERATT;
926 phba->work_hs = HS_FFER3;
927 if (phba->work_wait)
928 wake_up(phba->work_wait);
929
930 spin_unlock_irqrestore(phba->host->host_lock, iflag);
931 return 1;
932 }
933
934 rmb();
935 while (pring->rspidx != portRspPut) {
87f6eaff
JSEC		 936 /*
937 * Fetch an entry off the ring and copy it into a local data
938 * structure. The copy involves a byte-swap since the
939 * network byte order and pci byte orders are different.
940 */
941 entry = (IOCB_t *) IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
942 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
943 (uint32_t *) &rspiocbq.iocb,
944 sizeof (IOCB_t));
945 irsp = &rspiocbq.iocb;
946
dea3101e 947 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
948 pring->stats.iocb_rsp++;
949 rsp_cmpl++;
950
951 if (unlikely(irsp->ulpStatus)) {
952 /* Rsp ring <ringno> error: IOCB */
953 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
954 "%d:0326 Rsp Ring %d error: IOCB Data: "
955 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
956 phba->brd_no, pring->ringno,
957 irsp->un.ulpWord[0], irsp->un.ulpWord[1],
958 irsp->un.ulpWord[2], irsp->un.ulpWord[3],
959 irsp->un.ulpWord[4], irsp->un.ulpWord[5],
960 *(((uint32_t *) irsp) + 6),
961 *(((uint32_t *) irsp) + 7));
962 }
963
964 switch (type) {
965 case LPFC_ABORT_IOCB:
966 case LPFC_SOL_IOCB:
967 /*
968 * Idle exchange closed via ABTS from port. No iocb
969 * resources need to be recovered.
970 */
971 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
972 printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
973 "Skipping completion\n", __FUNCTION__,
974 irsp->ulpCommand);
975 break;
976 }
977
604a3e30
JB		 978 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
979 &rspiocbq);
dea3101e 980 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
981 spin_unlock_irqrestore(
982 phba->host->host_lock, iflag);
983 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
984 &rspiocbq);
985 spin_lock_irqsave(phba->host->host_lock,
986 iflag);
987 }
988 break;
989 default:
990 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
991 char adaptermsg[LPFC_MAX_ADPTMSG];
992 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
993 memcpy(&adaptermsg[0], (uint8_t *) irsp,
994 MAX_MSG_DATA);
995 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
996 phba->brd_no, adaptermsg);
997 } else {
998 /* Unknown IOCB command */
999 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1000 "%d:0321 Unknown IOCB command "
1001 "Data: x%x, x%x x%x x%x x%x\n",
1002 phba->brd_no, type, irsp->ulpCommand,
1003 irsp->ulpStatus, irsp->ulpIoTag,
1004 irsp->ulpContext);
1005 }
1006 break;
1007 }
1008
1009 /*
1010 * The response IOCB has been processed. Update the ring
1011 * pointer in SLIM. If the port response put pointer has not
1012 * been updated, sync the pgp->rspPutInx and fetch the new port
1013 * response put pointer.
1014 */
1015 if (++pring->rspidx >= portRspMax)
1016 pring->rspidx = 0;
1017
1018 to_slim = phba->MBslimaddr +
1019 (SLIMOFF + (pring->ringno * 2) + 1) * 4;
f91b392c 1020 writel(pring->rspidx, to_slim);
dea3101e 1021
1022 if (pring->rspidx == portRspPut)
1023 portRspPut = le32_to_cpu(pgp->rspPutInx);
1024 }
1025
1026 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1027 pring->stats.iocb_rsp_full++;
1028 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1029 writel(status, phba->CAregaddr);
1030 readl(phba->CAregaddr);
1031 }
1032 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1033 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1034 pring->stats.iocb_cmd_empty++;
1035
1036 /* Force update of the local copy of cmdGetInx */
1037 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1038 lpfc_sli_resume_iocb(phba, pring);
1039
1040 if ((pring->lpfc_sli_cmd_available))
1041 (pring->lpfc_sli_cmd_available) (phba, pring);
1042
1043 }
1044
1045 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1046 return rc;
1047}
1048
1049
1050int
1051lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
1052 struct lpfc_sli_ring * pring, uint32_t mask)
1053{
1054 IOCB_t *entry;
1055 IOCB_t *irsp = NULL;
1056 struct lpfc_iocbq *rspiocbp = NULL;
1057 struct lpfc_iocbq *next_iocb;
1058 struct lpfc_iocbq *cmdiocbp;
1059 struct lpfc_iocbq *saveq;
1060 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
4cc2da1d 1061 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1062 uint8_t iocb_cmd_type;
1063 lpfc_iocb_type type;
1064 uint32_t status, free_saveq;
1065 uint32_t portRspPut, portRspMax;
1066 int rc = 1;
1067 unsigned long iflag;
1068 void __iomem *to_slim;
1069
1070 spin_lock_irqsave(phba->host->host_lock, iflag);
1071 pring->stats.iocb_event++;
1072
dea3101e 1073 /*
1074 * The next available response entry should never exceed the maximum
1075 * entries. If it does, treat it as an adapter hardware error.
1076 */
1077 portRspMax = pring->numRiocb;
1078 portRspPut = le32_to_cpu(pgp->rspPutInx);
1079 if (portRspPut >= portRspMax) {
1080 /*
1081 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1082 * rsp ring <portRspMax>
1083 */
1084 lpfc_printf_log(phba,
1085 KERN_ERR,
1086 LOG_SLI,
1087 "%d:0312 Ring %d handler: portRspPut %d "
1088 "is bigger then rsp ring %d\n",
1089 phba->brd_no,
1090 pring->ringno, portRspPut, portRspMax);
1091
1092 phba->hba_state = LPFC_HBA_ERROR;
1093 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1094
1095 phba->work_hs = HS_FFER3;
1096 lpfc_handle_eratt(phba);
1097
1098 return 1;
1099 }
1100
1101 rmb();
1102 lpfc_iocb_list = &phba->lpfc_iocb_list;
1103 while (pring->rspidx != portRspPut) {
1104 /*
1105 * Build a completion list and call the appropriate handler.
1106 * The process is to get the next available response iocb, get
1107 * a free iocb from the list, copy the response data into the
1108 * free iocb, insert to the continuation list, and update the
1109 * next response index to slim. This process makes response
1110 * iocb's in the ring available to DMA as fast as possible but
1111 * pays a penalty for a copy operation. Since the iocb is
1112 * only 32 bytes, this penalty is considered small relative to
1113 * the PCI reads for register values and a slim write. When
1114 * the ulpLe field is set, the entire Command has been
1115 * received.
1116 */
1117 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
1118 list_remove_head(lpfc_iocb_list, rspiocbp, struct lpfc_iocbq,
1119 list);
1120 if (rspiocbp == NULL) {
1121 printk(KERN_ERR "%s: out of buffers! Failing "
1122 "completion.\n", __FUNCTION__);
1123 break;
1124 }
1125
1126 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
1127 irsp = &rspiocbp->iocb;
1128
1129 if (++pring->rspidx >= portRspMax)
1130 pring->rspidx = 0;
1131
1132 to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
1133 + 1) * 4;
f91b392c 1134 writel(pring->rspidx, to_slim);
dea3101e 1135
1136 if (list_empty(&(pring->iocb_continueq))) {
1137 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1138 } else {
1139 list_add_tail(&rspiocbp->list,
1140 &(pring->iocb_continueq));
1141 }
1142
1143 pring->iocb_continueq_cnt++;
1144 if (irsp->ulpLe) {
1145 /*
1146 * By default, the driver expects to free all resources
1147 * associated with this iocb completion.
1148 */
1149 free_saveq = 1;
1150 saveq = list_get_first(&pring->iocb_continueq,
1151 struct lpfc_iocbq, list);
1152 irsp = &(saveq->iocb);
1153 list_del_init(&pring->iocb_continueq);
1154 pring->iocb_continueq_cnt = 0;
1155
1156 pring->stats.iocb_rsp++;
1157
1158 if (irsp->ulpStatus) {
1159 /* Rsp ring <ringno> error: IOCB */
1160 lpfc_printf_log(phba,
1161 KERN_WARNING,
1162 LOG_SLI,
1163 "%d:0328 Rsp Ring %d error: IOCB Data: "
1164 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
1165 phba->brd_no,
1166 pring->ringno,
1167 irsp->un.ulpWord[0],
1168 irsp->un.ulpWord[1],
1169 irsp->un.ulpWord[2],
1170 irsp->un.ulpWord[3],
1171 irsp->un.ulpWord[4],
1172 irsp->un.ulpWord[5],
1173 *(((uint32_t *) irsp) + 6),
1174 *(((uint32_t *) irsp) + 7));
1175 }
1176
1177 /*
1178 * Fetch the IOCB command type and call the correct
1179 * completion routine. Solicited and Unsolicited
1180 * IOCBs on the ELS ring get freed back to the
1181 * lpfc_iocb_list by the discovery kernel thread.
1182 */
1183 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1184 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1185 if (type == LPFC_SOL_IOCB) {
1186 spin_unlock_irqrestore(phba->host->host_lock,
1187 iflag);
1188 rc = lpfc_sli_process_sol_iocb(phba, pring,
1189 saveq);
1190 spin_lock_irqsave(phba->host->host_lock, iflag);
1191 } else if (type == LPFC_UNSOL_IOCB) {
1192 spin_unlock_irqrestore(phba->host->host_lock,
1193 iflag);
1194 rc = lpfc_sli_process_unsol_iocb(phba, pring,
1195 saveq);
1196 spin_lock_irqsave(phba->host->host_lock, iflag);
1197 } else if (type == LPFC_ABORT_IOCB) {
1198 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1199 ((cmdiocbp =
604a3e30
JB		 1200 lpfc_sli_iocbq_lookup(phba, pring,
1201 saveq)))) {
dea3101e 1202 /* Call the specified completion
1203 routine */
1204 if (cmdiocbp->iocb_cmpl) {
1205 spin_unlock_irqrestore(
1206 phba->host->host_lock,
1207 iflag);
1208 (cmdiocbp->iocb_cmpl) (phba,
1209 cmdiocbp, saveq);
1210 spin_lock_irqsave(
1211 phba->host->host_lock,
1212 iflag);
604a3e30
JB		 1213 } else
1214 lpfc_sli_release_iocbq(phba,
1215 cmdiocbp);
dea3101e 1216 }
1217 } else if (type == LPFC_UNKNOWN_IOCB) {
1218 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1219
1220 char adaptermsg[LPFC_MAX_ADPTMSG];
1221
1222 memset(adaptermsg, 0,
1223 LPFC_MAX_ADPTMSG);
1224 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1225 MAX_MSG_DATA);
1226 dev_warn(&((phba->pcidev)->dev),
1227 "lpfc%d: %s",
1228 phba->brd_no, adaptermsg);
1229 } else {
1230 /* Unknown IOCB command */
1231 lpfc_printf_log(phba,
1232 KERN_ERR,
1233 LOG_SLI,
1234 "%d:0321 Unknown IOCB command "
1235 "Data: x%x x%x x%x x%x\n",
1236 phba->brd_no,
1237 irsp->ulpCommand,
1238 irsp->ulpStatus,
1239 irsp->ulpIoTag,
1240 irsp->ulpContext);
1241 }
1242 }
1243
1244 if (free_saveq) {
1245 if (!list_empty(&saveq->list)) {
1246 list_for_each_entry_safe(rspiocbp,
1247 next_iocb,
1248 &saveq->list,
1249 list) {
604a3e30
JB		 1250 lpfc_sli_release_iocbq(phba,
1251 rspiocbp);
dea3101e 1252 }
1253 }
1254
604a3e30 1255 lpfc_sli_release_iocbq(phba, saveq);
dea3101e 1256 }
1257 }
1258
1259 /*
1260 * If the port response put pointer has not been updated, sync
1261 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1262 * response put pointer.
1263 */
1264 if (pring->rspidx == portRspPut) {
1265 portRspPut = le32_to_cpu(pgp->rspPutInx);
1266 }
1267 } /* while (pring->rspidx != portRspPut) */
1268
1269 if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
1270 /* At least one response entry has been freed */
1271 pring->stats.iocb_rsp_full++;
1272 /* SET RxRE_RSP in Chip Att register */
1273 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1274 writel(status, phba->CAregaddr);
1275 readl(phba->CAregaddr); /* flush */
1276 }
1277 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1278 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1279 pring->stats.iocb_cmd_empty++;
1280
1281 /* Force update of the local copy of cmdGetInx */
1282 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1283 lpfc_sli_resume_iocb(phba, pring);
1284
1285 if ((pring->lpfc_sli_cmd_available))
1286 (pring->lpfc_sli_cmd_available) (phba, pring);
1287
1288 }
1289
1290 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1291 return rc;
1292}
1293
1294int
1295lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1296{
1297 struct lpfc_iocbq *iocb, *next_iocb;
1298 IOCB_t *icmd = NULL, *cmd = NULL;
1299 int errcnt;
dea3101e 1300
1301 errcnt = 0;
1302
1303 /* Error everything on txq and txcmplq
1304 * First do the txq.
1305 */
1306 spin_lock_irq(phba->host->host_lock);
1307 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
1308 list_del_init(&iocb->list);
1309 if (iocb->iocb_cmpl) {
1310 icmd = &iocb->iocb;
1311 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1312 icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1313 spin_unlock_irq(phba->host->host_lock);
1314 (iocb->iocb_cmpl) (phba, iocb, iocb);
1315 spin_lock_irq(phba->host->host_lock);
604a3e30
JB		 1316 } else
1317 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1318 }
1319 pring->txq_cnt = 0;
1320 INIT_LIST_HEAD(&(pring->txq));
1321
1322 /* Next issue ABTS for everything on the txcmplq */
1323 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
1324 cmd = &iocb->iocb;
1325
1326 /*
604a3e30 1327 * Imediate abort of IOCB, deque and call compl
dea3101e 1328 */
dea3101e 1329
1330 list_del_init(&iocb->list);
1331 pring->txcmplq_cnt--;
1332
1333 if (iocb->iocb_cmpl) {
1334 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1335 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1336 spin_unlock_irq(phba->host->host_lock);
1337 (iocb->iocb_cmpl) (phba, iocb, iocb);
1338 spin_lock_irq(phba->host->host_lock);
604a3e30
JB		 1339 } else
1340 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 1341 }
1342
1343 INIT_LIST_HEAD(&pring->txcmplq);
1344 pring->txcmplq_cnt = 0;
1345 spin_unlock_irq(phba->host->host_lock);
1346
1347 return errcnt;
1348}
1349
1350/******************************************************************************
1351* lpfc_sli_send_reset
1352*
1353* Note: After returning from this function, the HBA cannot be accessed for
1354* 1 ms. Since we do not wish to delay in interrupt context, it is the
1355* responsibility of the caller to perform the mdelay(1) and flush via readl().
1356******************************************************************************/
1357static int
1358lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post)
1359{
1360 MAILBOX_t *swpmb;
1361 volatile uint32_t word0;
1362 void __iomem *to_slim;
1363 unsigned long flags = 0;
1364
1365 spin_lock_irqsave(phba->host->host_lock, flags);
1366
1367 /* A board reset must use REAL SLIM. */
1368 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1369
1370 word0 = 0;
1371 swpmb = (MAILBOX_t *) & word0;
1372 swpmb->mbxCommand = MBX_RESTART;
1373 swpmb->mbxHc = 1;
1374
1375 to_slim = phba->MBslimaddr;
1376 writel(*(uint32_t *) swpmb, to_slim);
1377 readl(to_slim); /* flush */
1378
1379 /* Only skip post after fc_ffinit is completed */
1380 if (skip_post) {
1381 word0 = 1; /* This is really setting up word1 */
1382 } else {
1383 word0 = 0; /* This is really setting up word1 */
1384 }
1385 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1386 writel(*(uint32_t *) swpmb, to_slim);
1387 readl(to_slim); /* flush */
1388
1389 /* Turn off parity checking and serr during the physical reset */
1390 pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value);
1391 pci_write_config_word(phba->pcidev, PCI_COMMAND,
1392 (phba->pci_cfg_value &
1393 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
1394
1395 writel(HC_INITFF, phba->HCregaddr);
1396
1397 phba->hba_state = LPFC_INIT_START;
1398 spin_unlock_irqrestore(phba->host->host_lock, flags);
1399
1400 return 0;
1401}
1402
1403static int
1404lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post)
1405{
1406 struct lpfc_sli_ring *pring;
1407 int i;
1408 struct lpfc_dmabuf *mp, *next_mp;
1409 unsigned long flags = 0;
1410
1411 lpfc_sli_send_reset(phba, skip_post);
1412 mdelay(1);
1413
1414 spin_lock_irqsave(phba->host->host_lock, flags);
1415 /* Risk the write on flush case ie no delay after the readl */
1416 readl(phba->HCregaddr); /* flush */
1417 /* Now toggle INITFF bit set by lpfc_sli_send_reset */
1418 writel(0, phba->HCregaddr);
1419 readl(phba->HCregaddr); /* flush */
1420
1421 /* Restore PCI cmd register */
1422 pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value);
1423
1424 /* perform board reset */
1425 phba->fc_eventTag = 0;
1426 phba->fc_myDID = 0;
1427 phba->fc_prevDID = Mask_DID;
1428
1429 /* Reset HBA */
1430 lpfc_printf_log(phba,
1431 KERN_INFO,
1432 LOG_SLI,
1433 "%d:0325 Reset HBA Data: x%x x%x x%x\n",
1434 phba->brd_no,
1435 phba->hba_state,
1436 phba->sli.sli_flag,
1437 skip_post);
1438
1439 /* Initialize relevant SLI info */
1440 for (i = 0; i < phba->sli.num_rings; i++) {
1441 pring = &phba->sli.ring[i];
1442 pring->flag = 0;
1443 pring->rspidx = 0;
1444 pring->next_cmdidx = 0;
1445 pring->local_getidx = 0;
1446 pring->cmdidx = 0;
1447 pring->missbufcnt = 0;
1448 }
1449 spin_unlock_irqrestore(phba->host->host_lock, flags);
1450
1451 if (skip_post) {
1452 mdelay(100);
1453 } else {
1454 mdelay(2000);
1455 }
1456
1457 spin_lock_irqsave(phba->host->host_lock, flags);
1458 /* Cleanup preposted buffers on the ELS ring */
1459 pring = &phba->sli.ring[LPFC_ELS_RING];
1460 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
1461 list_del(&mp->list);
1462 pring->postbufq_cnt--;
1463 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1464 kfree(mp);
1465 }
1466 spin_unlock_irqrestore(phba->host->host_lock, flags);
1467
1468 for (i = 0; i < phba->sli.num_rings; i++)
1469 lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]);
1470
1471 return 0;
1472}
1473
1474static int
1475lpfc_sli_chipset_init(struct lpfc_hba *phba)
1476{
1477 uint32_t status, i = 0;
1478
1479 /* Read the HBA Host Status Register */
1480 status = readl(phba->HSregaddr);
1481
1482 /* Check status register to see what current state is */
1483 i = 0;
1484 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
1485
1486 /* Check every 100ms for 5 retries, then every 500ms for 5, then
1487 * every 2.5 sec for 5, then reset board and every 2.5 sec for
1488 * 4.
1489 */
1490 if (i++ >= 20) {
1491 /* Adapter failed to init, timeout, status reg
1492 <status> */
1493 lpfc_printf_log(phba,
1494 KERN_ERR,
1495 LOG_INIT,
1496 "%d:0436 Adapter failed to init, "
1497 "timeout, status reg x%x\n",
1498 phba->brd_no,
1499 status);
1500 phba->hba_state = LPFC_HBA_ERROR;
1501 return -ETIMEDOUT;
1502 }
1503
1504 /* Check to see if any errors occurred during init */
1505 if (status & HS_FFERM) {
1506 /* ERROR: During chipset initialization */
1507 /* Adapter failed to init, chipset, status reg
1508 <status> */
1509 lpfc_printf_log(phba,
1510 KERN_ERR,
1511 LOG_INIT,
1512 "%d:0437 Adapter failed to init, "
1513 "chipset, status reg x%x\n",
1514 phba->brd_no,
1515 status);
1516 phba->hba_state = LPFC_HBA_ERROR;
1517 return -EIO;
1518 }
1519
1520 if (i <= 5) {
1521 msleep(10);
1522 } else if (i <= 10) {
1523 msleep(500);
1524 } else {
1525 msleep(2500);
1526 }
1527
1528 if (i == 15) {
1529 lpfc_sli_brdreset(phba, 0);
1530 }
1531 /* Read the HBA Host Status Register */
1532 status = readl(phba->HSregaddr);
1533 }
1534
1535 /* Check to see if any errors occurred during init */
1536 if (status & HS_FFERM) {
1537 /* ERROR: During chipset initialization */
1538 /* Adapter failed to init, chipset, status reg <status> */
1539 lpfc_printf_log(phba,
1540 KERN_ERR,
1541 LOG_INIT,
1542 "%d:0438 Adapter failed to init, chipset, "
1543 "status reg x%x\n",
1544 phba->brd_no,
1545 status);
1546 phba->hba_state = LPFC_HBA_ERROR;
1547 return -EIO;
1548 }
1549
1550 /* Clear all interrupt enable conditions */
1551 writel(0, phba->HCregaddr);
1552 readl(phba->HCregaddr); /* flush */
1553
1554 /* setup host attn register */
1555 writel(0xffffffff, phba->HAregaddr);
1556 readl(phba->HAregaddr); /* flush */
1557 return 0;
1558}
1559
1560int
1561lpfc_sli_hba_setup(struct lpfc_hba * phba)
1562{
1563 LPFC_MBOXQ_t *pmb;
1564 uint32_t resetcount = 0, rc = 0, done = 0;
1565
1566 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1567 if (!pmb) {
1568 phba->hba_state = LPFC_HBA_ERROR;
1569 return -ENOMEM;
1570 }
1571
1572 while (resetcount < 2 && !done) {
1573 phba->hba_state = 0;
1574 lpfc_sli_brdreset(phba, 0);
1575 msleep(2500);
1576 rc = lpfc_sli_chipset_init(phba);
1577 if (rc)
1578 break;
1579
1580 resetcount++;
1581
1582 /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
1583 * means the call was successful. Any other nonzero value is a failure,
1584 * but if ERESTART is returned, the driver may reset the HBA and try
1585 * again.
1586 */
1587 rc = lpfc_config_port_prep(phba);
1588 if (rc == -ERESTART) {
1589 phba->hba_state = 0;
1590 continue;
1591 } else if (rc) {
1592 break;
1593 }
1594
1595 phba->hba_state = LPFC_INIT_MBX_CMDS;
1596 lpfc_config_port(phba, pmb);
1597 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1598 if (rc == MBX_SUCCESS)
1599 done = 1;
1600 else {
1601 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1602 "%d:0442 Adapter failed to init, mbxCmd x%x "
1603 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
1604 phba->brd_no, pmb->mb.mbxCommand,
1605 pmb->mb.mbxStatus, 0);
1606 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1607 }
1608 }
1609 if (!done)
1610 goto lpfc_sli_hba_setup_error;
1611
1612 rc = lpfc_sli_ring_map(phba, pmb);
1613
1614 if (rc)
1615 goto lpfc_sli_hba_setup_error;
1616
1617 phba->sli.sli_flag |= LPFC_PROCESS_LA;
1618
1619 rc = lpfc_config_port_post(phba);
1620 if (rc)
1621 goto lpfc_sli_hba_setup_error;
1622
1623 goto lpfc_sli_hba_setup_exit;
1624lpfc_sli_hba_setup_error:
1625 phba->hba_state = LPFC_HBA_ERROR;
1626lpfc_sli_hba_setup_exit:
1627 mempool_free(pmb, phba->mbox_mem_pool);
1628 return rc;
1629}
1630
1631static void
1632lpfc_mbox_abort(struct lpfc_hba * phba)
1633{
1634 LPFC_MBOXQ_t *pmbox;
1635 MAILBOX_t *mb;
1636
1637 if (phba->sli.mbox_active) {
1638 del_timer_sync(&phba->sli.mbox_tmo);
1639 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1640 pmbox = phba->sli.mbox_active;
1641 mb = &pmbox->mb;
1642 phba->sli.mbox_active = NULL;
1643 if (pmbox->mbox_cmpl) {
1644 mb->mbxStatus = MBX_NOT_FINISHED;
1645 (pmbox->mbox_cmpl) (phba, pmbox);
1646 }
1647 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1648 }
1649
1650 /* Abort all the non active mailbox commands. */
1651 spin_lock_irq(phba->host->host_lock);
1652 pmbox = lpfc_mbox_get(phba);
1653 while (pmbox) {
1654 mb = &pmbox->mb;
1655 if (pmbox->mbox_cmpl) {
1656 mb->mbxStatus = MBX_NOT_FINISHED;
1657 spin_unlock_irq(phba->host->host_lock);
1658 (pmbox->mbox_cmpl) (phba, pmbox);
1659 spin_lock_irq(phba->host->host_lock);
1660 }
1661 pmbox = lpfc_mbox_get(phba);
1662 }
1663 spin_unlock_irq(phba->host->host_lock);
1664 return;
1665}
1666
1667/*! lpfc_mbox_timeout
1668 *
1669 * \pre
1670 * \post
1671 * \param hba Pointer to per struct lpfc_hba structure
1672 * \param l1 Pointer to the driver's mailbox queue.
1673 * \return
1674 * void
1675 *
1676 * \b Description:
1677 *
1678 * This routine handles mailbox timeout events at timer interrupt context.
1679 */
1680void
1681lpfc_mbox_timeout(unsigned long ptr)
1682{
1683 struct lpfc_hba *phba;
1684 unsigned long iflag;
1685
1686 phba = (struct lpfc_hba *)ptr;
1687 spin_lock_irqsave(phba->host->host_lock, iflag);
1688 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1689 phba->work_hba_events |= WORKER_MBOX_TMO;
1690 if (phba->work_wait)
1691 wake_up(phba->work_wait);
1692 }
1693 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1694}
1695
1696void
1697lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
1698{
1699 LPFC_MBOXQ_t *pmbox;
1700 MAILBOX_t *mb;
1701
1702 spin_lock_irq(phba->host->host_lock);
1703 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1704 spin_unlock_irq(phba->host->host_lock);
1705 return;
1706 }
1707
db468d10
JSEC		 1708 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1709
dea3101e 1710 pmbox = phba->sli.mbox_active;
1711 mb = &pmbox->mb;
1712
1713 /* Mbox cmd <mbxCommand> timeout */
1714 lpfc_printf_log(phba,
1715 KERN_ERR,
1716 LOG_MBOX | LOG_SLI,
1717 "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
1718 phba->brd_no,
1719 mb->mbxCommand,
1720 phba->hba_state,
1721 phba->sli.sli_flag,
1722 phba->sli.mbox_active);
1723
db468d10
JSEC		 1724 phba->sli.mbox_active = NULL;
1725 if (pmbox->mbox_cmpl) {
1726 mb->mbxStatus = MBX_NOT_FINISHED;
1727 spin_unlock_irq(phba->host->host_lock);
1728 (pmbox->mbox_cmpl) (phba, pmbox);
1729 spin_lock_irq(phba->host->host_lock);
dea3101e 1730 }
db468d10 1731 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea3101e 1732
1733 spin_unlock_irq(phba->host->host_lock);
1734 lpfc_mbox_abort(phba);
1735 return;
1736}
1737
1738int
1739lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
1740{
dea3101e 1741 MAILBOX_t *mb;
1742 struct lpfc_sli *psli;
1743 uint32_t status, evtctr;
1744 uint32_t ha_copy;
1745 int i;
1746 unsigned long drvr_flag = 0;
1747 volatile uint32_t word0, ldata;
1748 void __iomem *to_slim;
1749
1750 psli = &phba->sli;
1751
1752 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1753
1754
1755 mb = &pmbox->mb;
1756 status = MBX_SUCCESS;
1757
1758 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
1759 /* Polling for a mbox command when another one is already active
1760 * is not allowed in SLI. Also, the driver must have established
1761 * SLI2 mode to queue and process multiple mbox commands.
1762 */
1763
1764 if (flag & MBX_POLL) {
1765 spin_unlock_irqrestore(phba->host->host_lock,
1766 drvr_flag);
1767
1768 /* Mbox command <mbxCommand> cannot issue */
1769 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1770 return (MBX_NOT_FINISHED);
1771 }
1772
1773 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1774 spin_unlock_irqrestore(phba->host->host_lock,
1775 drvr_flag);
1776 /* Mbox command <mbxCommand> cannot issue */
1777 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1778 return (MBX_NOT_FINISHED);
1779 }
1780
1781 /* Handle STOP IOCB processing flag. This is only meaningful
1782 * if we are not polling for mbox completion.
1783 */
1784 if (flag & MBX_STOP_IOCB) {
1785 flag &= ~MBX_STOP_IOCB;
1786 /* Now flag each ring */
1787 for (i = 0; i < psli->num_rings; i++) {
1788 /* If the ring is active, flag it */
1789 if (psli->ring[i].cmdringaddr) {
1790 psli->ring[i].flag |=
1791 LPFC_STOP_IOCB_MBX;
1792 }
1793 }
1794 }
1795
1796 /* Another mailbox command is still being processed, queue this
1797 * command to be processed later.
1798 */
1799 lpfc_mbox_put(phba, pmbox);
1800
1801 /* Mbox cmd issue - BUSY */
1802 lpfc_printf_log(phba,
1803 KERN_INFO,
1804 LOG_MBOX | LOG_SLI,
1805 "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
1806 phba->brd_no,
1807 mb->mbxCommand,
1808 phba->hba_state,
1809 psli->sli_flag,
1810 flag);
1811
1812 psli->slistat.mbox_busy++;
1813 spin_unlock_irqrestore(phba->host->host_lock,
1814 drvr_flag);
1815
1816 return (MBX_BUSY);
1817 }
1818
1819 /* Handle STOP IOCB processing flag. This is only meaningful
1820 * if we are not polling for mbox completion.
1821 */
1822 if (flag & MBX_STOP_IOCB) {
1823 flag &= ~MBX_STOP_IOCB;
1824 if (flag == MBX_NOWAIT) {
1825 /* Now flag each ring */
1826 for (i = 0; i < psli->num_rings; i++) {
1827 /* If the ring is active, flag it */
1828 if (psli->ring[i].cmdringaddr) {
1829 psli->ring[i].flag |=
1830 LPFC_STOP_IOCB_MBX;
1831 }
1832 }
1833 }
1834 }
1835
1836 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
1837
1838 /* If we are not polling, we MUST be in SLI2 mode */
1839 if (flag != MBX_POLL) {
1840 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1841 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1842 spin_unlock_irqrestore(phba->host->host_lock,
1843 drvr_flag);
1844 /* Mbox command <mbxCommand> cannot issue */
1845 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
1846 return (MBX_NOT_FINISHED);
1847 }
1848 /* timeout active mbox command */
1849 mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
1850 }
1851
1852 /* Mailbox cmd <cmd> issue */
1853 lpfc_printf_log(phba,
1854 KERN_INFO,
1855 LOG_MBOX | LOG_SLI,
1856 "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
1857 phba->brd_no,
1858 mb->mbxCommand,
1859 phba->hba_state,
1860 psli->sli_flag,
1861 flag);
1862
1863 psli->slistat.mbox_cmd++;
1864 evtctr = psli->slistat.mbox_event;
1865
1866 /* next set own bit for the adapter and copy over command word */
1867 mb->mbxOwner = OWN_CHIP;
1868
1869 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 1870 /* First copy command data to host SLIM area */
4cc2da1d 1871 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea3101e 1872 } else {
1873 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1874 /* copy command data into host mbox for cmpl */
4cc2da1d
JSEC		 1875 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
1876 MAILBOX_CMD_SIZE);
dea3101e 1877 }
1878
1879 /* First copy mbox command data to HBA SLIM, skip past first
1880 word */
1881 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1882 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
1883 MAILBOX_CMD_SIZE - sizeof (uint32_t));
1884
1885 /* Next copy over first word, with mbxOwner set */
1886 ldata = *((volatile uint32_t *)mb);
1887 to_slim = phba->MBslimaddr;
1888 writel(ldata, to_slim);
1889 readl(to_slim); /* flush */
1890
1891 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1892 /* switch over to host mailbox */
1893 psli->sli_flag |= LPFC_SLI2_ACTIVE;
1894 }
1895 }
1896
1897 wmb();
1898 /* interrupt board to doit right away */
1899 writel(CA_MBATT, phba->CAregaddr);
1900 readl(phba->CAregaddr); /* flush */
1901
1902 switch (flag) {
1903 case MBX_NOWAIT:
1904 /* Don't wait for it to finish, just return */
1905 psli->mbox_active = pmbox;
1906 break;
1907
1908 case MBX_POLL:
1909 i = 0;
1910 psli->mbox_active = NULL;
1911 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1912 /* First read mbox status word */
4cc2da1d 1913 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea3101e 1914 word0 = le32_to_cpu(word0);
1915 } else {
1916 /* First read mbox status word */
1917 word0 = readl(phba->MBslimaddr);
1918 }
1919
1920 /* Read the HBA Host Attention Register */
1921 ha_copy = readl(phba->HAregaddr);
1922
1923 /* Wait for command to complete */
1924 while (((word0 & OWN_CHIP) == OWN_CHIP)
1925 || !(ha_copy & HA_MBATT)) {
1926 if (i++ >= 100) {
1927 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1928 spin_unlock_irqrestore(phba->host->host_lock,
1929 drvr_flag);
1930 return (MBX_NOT_FINISHED);
1931 }
1932
1933 /* Check if we took a mbox interrupt while we were
1934 polling */
1935 if (((word0 & OWN_CHIP) != OWN_CHIP)
1936 && (evtctr != psli->slistat.mbox_event))
1937 break;
1938
1939 spin_unlock_irqrestore(phba->host->host_lock,
1940 drvr_flag);
1941
1942 /* Can be in interrupt context, do not sleep */
1943 /* (or might be called with interrupts disabled) */
1944 mdelay(i);
1945
1946 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1947
1948 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1949 /* First copy command data */
4cc2da1d
JSEC		 1950 word0 = *((volatile uint32_t *)
1951 &phba->slim2p->mbx);
dea3101e 1952 word0 = le32_to_cpu(word0);
1953 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1954 MAILBOX_t *slimmb;
1955 volatile uint32_t slimword0;
1956 /* Check real SLIM for any errors */
1957 slimword0 = readl(phba->MBslimaddr);
1958 slimmb = (MAILBOX_t *) & slimword0;
1959 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
1960 && slimmb->mbxStatus) {
1961 psli->sli_flag &=
1962 ~LPFC_SLI2_ACTIVE;
1963 word0 = slimword0;
1964 }
1965 }
1966 } else {
1967 /* First copy command data */
1968 word0 = readl(phba->MBslimaddr);
1969 }
1970 /* Read the HBA Host Attention Register */
1971 ha_copy = readl(phba->HAregaddr);
1972 }
1973
1974 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 1975 /* copy results back to user */
4cc2da1d
JSEC		 1976 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
1977 MAILBOX_CMD_SIZE);
dea3101e 1978 } else {
1979 /* First copy command data */
1980 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
1981 MAILBOX_CMD_SIZE);
1982 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
1983 pmbox->context2) {
1984 lpfc_memcpy_from_slim((void *)pmbox->context2,
1985 phba->MBslimaddr + DMP_RSP_OFFSET,
1986 mb->un.varDmp.word_cnt);
1987 }
1988 }
1989
1990 writel(HA_MBATT, phba->HAregaddr);
1991 readl(phba->HAregaddr); /* flush */
1992
1993 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1994 status = mb->mbxStatus;
1995 }
1996
1997 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
1998 return (status);
1999}
2000
2001static int
2002lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2003 struct lpfc_iocbq * piocb)
2004{
2005 /* Insert the caller's iocb in the txq tail for later processing. */
2006 list_add_tail(&piocb->list, &pring->txq);
2007 pring->txq_cnt++;
2008 return (0);
2009}
2010
2011static struct lpfc_iocbq *
2012lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2013 struct lpfc_iocbq ** piocb)
2014{
2015 struct lpfc_iocbq * nextiocb;
2016
2017 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2018 if (!nextiocb) {
2019 nextiocb = *piocb;
2020 *piocb = NULL;
2021 }
2022
2023 return nextiocb;
2024}
2025
2026int
2027lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2028 struct lpfc_iocbq *piocb, uint32_t flag)
2029{
2030 struct lpfc_iocbq *nextiocb;
2031 IOCB_t *iocb;
2032
2033 /*
2034 * We should never get an IOCB if we are in a < LINK_DOWN state
2035 */
2036 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2037 return IOCB_ERROR;
2038
2039 /*
2040 * Check to see if we are blocking IOCB processing because of a
2041 * outstanding mbox command.
2042 */
2043 if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
2044 goto iocb_busy;
2045
2046 if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
2047 /*
2048 * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
2049 * can be issued if the link is not up.
2050 */
2051 switch (piocb->iocb.ulpCommand) {
2052 case CMD_QUE_RING_BUF_CN:
2053 case CMD_QUE_RING_BUF64_CN:
dea3101e 2054 /*
2055 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2056 * completion, iocb_cmpl MUST be 0.
2057 */
2058 if (piocb->iocb_cmpl)
2059 piocb->iocb_cmpl = NULL;
2060 /*FALLTHROUGH*/
2061 case CMD_CREATE_XRI_CR:
2062 break;
2063 default:
2064 goto iocb_busy;
2065 }
2066
2067 /*
2068 * For FCP commands, we must be in a state where we can process link
2069 * attention events.
2070 */
2071 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
2072 !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
2073 goto iocb_busy;
2074
2075 /*
2076 * Check to see if this is a high priority command.
2077 * If so bypass tx queue processing.
2078 */
2079 if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
2080 (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
2081 lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
2082 piocb = NULL;
2083 }
2084
2085 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2086 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2087 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2088
2089 if (iocb)
2090 lpfc_sli_update_ring(phba, pring);
2091 else
2092 lpfc_sli_update_full_ring(phba, pring);
2093
2094 if (!piocb)
2095 return IOCB_SUCCESS;
2096
2097 goto out_busy;
2098
2099 iocb_busy:
2100 pring->stats.iocb_cmd_delay++;
2101
2102 out_busy:
2103
2104 if (!(flag & SLI_IOCB_RET_IOCB)) {
2105 lpfc_sli_ringtx_put(phba, pring, piocb);
2106 return IOCB_SUCCESS;
2107 }
2108
2109 return IOCB_BUSY;
2110}
2111
2112int
2113lpfc_sli_setup(struct lpfc_hba *phba)
2114{
2115 int i, totiocb = 0;
2116 struct lpfc_sli *psli = &phba->sli;
2117 struct lpfc_sli_ring *pring;
2118
2119 psli->num_rings = MAX_CONFIGURED_RINGS;
2120 psli->sli_flag = 0;
2121 psli->fcp_ring = LPFC_FCP_RING;
2122 psli->next_ring = LPFC_FCP_NEXT_RING;
2123 psli->ip_ring = LPFC_IP_RING;
2124
604a3e30
JB		 2125 psli->iocbq_lookup = NULL;
2126 psli->iocbq_lookup_len = 0;
2127 psli->last_iotag = 0;
2128
dea3101e 2129 for (i = 0; i < psli->num_rings; i++) {
2130 pring = &psli->ring[i];
2131 switch (i) {
2132 case LPFC_FCP_RING: /* ring 0 - FCP */
2133 /* numCiocb and numRiocb are used in config_port */
2134 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
2135 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
2136 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2137 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2138 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2139 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2140 pring->iotag_ctr = 0;
2141 pring->iotag_max =
2142 (phba->cfg_hba_queue_depth * 2);
2143 pring->fast_iotag = pring->iotag_max;
2144 pring->num_mask = 0;
2145 break;
2146 case LPFC_IP_RING: /* ring 1 - IP */
2147 /* numCiocb and numRiocb are used in config_port */
2148 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
2149 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
2150 pring->num_mask = 0;
2151 break;
2152 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
2153 /* numCiocb and numRiocb are used in config_port */
2154 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
2155 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
2156 pring->fast_iotag = 0;
2157 pring->iotag_ctr = 0;
2158 pring->iotag_max = 4096;
2159 pring->num_mask = 4;
2160 pring->prt[0].profile = 0; /* Mask 0 */
2161 pring->prt[0].rctl = FC_ELS_REQ;
2162 pring->prt[0].type = FC_ELS_DATA;
2163 pring->prt[0].lpfc_sli_rcv_unsol_event =
2164 lpfc_els_unsol_event;
2165 pring->prt[1].profile = 0; /* Mask 1 */
2166 pring->prt[1].rctl = FC_ELS_RSP;
2167 pring->prt[1].type = FC_ELS_DATA;
2168 pring->prt[1].lpfc_sli_rcv_unsol_event =
2169 lpfc_els_unsol_event;
2170 pring->prt[2].profile = 0; /* Mask 2 */
2171 /* NameServer Inquiry */
2172 pring->prt[2].rctl = FC_UNSOL_CTL;
2173 /* NameServer */
2174 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
2175 pring->prt[2].lpfc_sli_rcv_unsol_event =
2176 lpfc_ct_unsol_event;
2177 pring->prt[3].profile = 0; /* Mask 3 */
2178 /* NameServer response */
2179 pring->prt[3].rctl = FC_SOL_CTL;
2180 /* NameServer */
2181 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
2182 pring->prt[3].lpfc_sli_rcv_unsol_event =
2183 lpfc_ct_unsol_event;
2184 break;
2185 }
2186 totiocb += (pring->numCiocb + pring->numRiocb);
2187 }
2188 if (totiocb > MAX_SLI2_IOCB) {
2189 /* Too many cmd / rsp ring entries in SLI2 SLIM */
2190 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2191 "%d:0462 Too many cmd / rsp ring entries in "
2192 "SLI2 SLIM Data: x%x x%x\n",
2193 phba->brd_no, totiocb, MAX_SLI2_IOCB);
2194 }
2195
2196 return 0;
2197}
2198
2199int
2200lpfc_sli_queue_setup(struct lpfc_hba * phba)
2201{
2202 struct lpfc_sli *psli;
2203 struct lpfc_sli_ring *pring;
604a3e30 2204 int i;
dea3101e 2205
2206 psli = &phba->sli;
2207 spin_lock_irq(phba->host->host_lock);
2208 INIT_LIST_HEAD(&psli->mboxq);
2209 /* Initialize list headers for txq and txcmplq as double linked lists */
2210 for (i = 0; i < psli->num_rings; i++) {
2211 pring = &psli->ring[i];
2212 pring->ringno = i;
2213 pring->next_cmdidx = 0;
2214 pring->local_getidx = 0;
2215 pring->cmdidx = 0;
2216 INIT_LIST_HEAD(&pring->txq);
2217 INIT_LIST_HEAD(&pring->txcmplq);
2218 INIT_LIST_HEAD(&pring->iocb_continueq);
2219 INIT_LIST_HEAD(&pring->postbufq);
dea3101e 2220 }
2221 spin_unlock_irq(phba->host->host_lock);
2222 return (1);
2223}
2224
2225int
2226lpfc_sli_hba_down(struct lpfc_hba * phba)
2227{
2228 struct lpfc_sli *psli;
2229 struct lpfc_sli_ring *pring;
2230 LPFC_MBOXQ_t *pmb;
2231 struct lpfc_iocbq *iocb, *next_iocb;
2232 IOCB_t *icmd = NULL;
2233 int i;
2234 unsigned long flags = 0;
2235
2236 psli = &phba->sli;
2237 lpfc_hba_down_prep(phba);
2238
2239 spin_lock_irqsave(phba->host->host_lock, flags);
2240
2241 for (i = 0; i < psli->num_rings; i++) {
2242 pring = &psli->ring[i];
2243 pring->flag |= LPFC_DEFERRED_RING_EVENT;
2244
2245 /*
2246 * Error everything on the txq since these iocbs have not been
2247 * given to the FW yet.
2248 */
2249 pring->txq_cnt = 0;
2250
2251 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
2252 list_del_init(&iocb->list);
2253 if (iocb->iocb_cmpl) {
2254 icmd = &iocb->iocb;
2255 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
2256 icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
2257 spin_unlock_irqrestore(phba->host->host_lock,
2258 flags);
2259 (iocb->iocb_cmpl) (phba, iocb, iocb);
2260 spin_lock_irqsave(phba->host->host_lock, flags);
604a3e30
JB		 2261 } else
2262 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2263 }
2264
2265 INIT_LIST_HEAD(&(pring->txq));
2266
2267 if (pring->fast_lookup) {
2268 kfree(pring->fast_lookup);
2269 pring->fast_lookup = NULL;
2270 }
2271
2272 }
2273
2274 spin_unlock_irqrestore(phba->host->host_lock, flags);
2275
2276 /* Return any active mbox cmds */
2277 del_timer_sync(&psli->mbox_tmo);
2278 spin_lock_irqsave(phba->host->host_lock, flags);
2279 phba->work_hba_events &= ~WORKER_MBOX_TMO;
2280 if (psli->mbox_active) {
2281 pmb = psli->mbox_active;
2282 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2283 if (pmb->mbox_cmpl) {
2284 spin_unlock_irqrestore(phba->host->host_lock, flags);
2285 pmb->mbox_cmpl(phba,pmb);
2286 spin_lock_irqsave(phba->host->host_lock, flags);
2287 }
2288 }
2289 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2290 psli->mbox_active = NULL;
2291
2292 /* Return any pending mbox cmds */
2293 while ((pmb = lpfc_mbox_get(phba)) != NULL) {
2294 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2295 if (pmb->mbox_cmpl) {
2296 spin_unlock_irqrestore(phba->host->host_lock, flags);
2297 pmb->mbox_cmpl(phba,pmb);
2298 spin_lock_irqsave(phba->host->host_lock, flags);
2299 }
2300 }
2301
2302 INIT_LIST_HEAD(&psli->mboxq);
2303
2304 spin_unlock_irqrestore(phba->host->host_lock, flags);
2305
2306 /*
2307 * Provided the hba is not in an error state, reset it. It is not
2308 * capable of IO anymore.
2309 */
2310 if (phba->hba_state != LPFC_HBA_ERROR) {
2311 phba->hba_state = LPFC_INIT_START;
2312 lpfc_sli_brdreset(phba, 1);
2313 }
2314
2315 return 1;
2316}
2317
2318void
2319lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
2320{
2321 uint32_t *src = srcp;
2322 uint32_t *dest = destp;
2323 uint32_t ldata;
2324 int i;
2325
2326 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
2327 ldata = *src;
2328 ldata = le32_to_cpu(ldata);
2329 *dest = ldata;
2330 src++;
2331 dest++;
2332 }
2333}
2334
2335int
2336lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2337 struct lpfc_dmabuf * mp)
2338{
2339 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
2340 later */
2341 list_add_tail(&mp->list, &pring->postbufq);
2342
2343 pring->postbufq_cnt++;
2344 return 0;
2345}
2346
2347
2348struct lpfc_dmabuf *
2349lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2350 dma_addr_t phys)
2351{
2352 struct lpfc_dmabuf *mp, *next_mp;
2353 struct list_head *slp = &pring->postbufq;
2354
2355 /* Search postbufq, from the begining, looking for a match on phys */
2356 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
2357 if (mp->phys == phys) {
2358 list_del_init(&mp->list);
2359 pring->postbufq_cnt--;
2360 return mp;
2361 }
2362 }
2363
2364 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2365 "%d:0410 Cannot find virtual addr for mapped buf on "
2366 "ring %d Data x%llx x%p x%p x%x\n",
2367 phba->brd_no, pring->ringno, (unsigned long long)phys,
2368 slp->next, slp->prev, pring->postbufq_cnt);
2369 return NULL;
2370}
2371
2372static void
2373lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2374 struct lpfc_iocbq * rspiocb)
2375{
2376 struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
2377 /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
2378 * just aborted.
2379 * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
2380 */
2381 if (cmdiocb->context2) {
2382 buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
2383
2384 /* Free the response IOCB before completing the abort
2385 command. */
2386 buf_ptr = NULL;
2387 list_remove_head((&buf_ptr1->list), buf_ptr,
2388 struct lpfc_dmabuf, list);
2389 if (buf_ptr) {
2390 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2391 kfree(buf_ptr);
2392 }
2393 lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
2394 kfree(buf_ptr1);
2395 }
2396
2397 if (cmdiocb->context3) {
2398 buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
2399 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2400 kfree(buf_ptr);
2401 }
2402
604a3e30 2403 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e 2404 return;
2405}
2406
2407int
2408lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
2409 struct lpfc_sli_ring * pring,
2410 struct lpfc_iocbq * cmdiocb)
2411{
2412 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
2413 struct lpfc_iocbq *abtsiocbp = NULL;
2414 IOCB_t *icmd = NULL;
2415 IOCB_t *iabt = NULL;
2416
2417 /* issue ABTS for this IOCB based on iotag */
2418 list_remove_head(lpfc_iocb_list, abtsiocbp, struct lpfc_iocbq, list);
2419 if (abtsiocbp == NULL)
2420 return 0;
dea3101e 2421
2422 iabt = &abtsiocbp->iocb;
2423 icmd = &cmdiocb->iocb;
2424 switch (icmd->ulpCommand) {
2425 case CMD_ELS_REQUEST64_CR:
2426 /* Even though we abort the ELS command, the firmware may access
2427 * the BPL or other resources before it processes our
2428 * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
2429 * resources till the actual abort request completes.
2430 */
2431 abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
2432 abtsiocbp->context2 = cmdiocb->context2;
2433 abtsiocbp->context3 = cmdiocb->context3;
2434 cmdiocb->context2 = NULL;
2435 cmdiocb->context3 = NULL;
2436 abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
2437 break;
2438 default:
604a3e30 2439 lpfc_sli_release_iocbq(phba, abtsiocbp);
dea3101e 2440 return 0;
2441 }
2442
2443 iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
2444 iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
2445
2446 iabt->ulpLe = 1;
2447 iabt->ulpClass = CLASS3;
2448 iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
2449
2450 if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
604a3e30 2451 lpfc_sli_release_iocbq(phba, abtsiocbp);
dea3101e 2452 return 0;
2453 }
2454
2455 return 1;
2456}
2457
2458static int
2459lpfc_sli_validate_iocb_cmd(struct lpfc_scsi_buf *lpfc_cmd, uint16_t tgt_id,
2460 uint64_t lun_id, struct lpfc_iocbq *iocb,
2461 uint32_t ctx, lpfc_ctx_cmd ctx_cmd)
2462{
2463 int rc = 1;
2464
2465 if (lpfc_cmd == NULL)
2466 return rc;
2467
2468 switch (ctx_cmd) {
2469 case LPFC_CTX_LUN:
2470 if ((lpfc_cmd->pCmd->device->id == tgt_id) &&
2471 (lpfc_cmd->pCmd->device->lun == lun_id))
2472 rc = 0;
2473 break;
2474 case LPFC_CTX_TGT:
2475 if (lpfc_cmd->pCmd->device->id == tgt_id)
2476 rc = 0;
2477 break;
2478 case LPFC_CTX_CTX:
2479 if (iocb->iocb.ulpContext == ctx)
2480 rc = 0;
2481 case LPFC_CTX_HOST:
2482 rc = 0;
2483 break;
2484 default:
2485 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
2486 __FUNCTION__, ctx_cmd);
2487 break;
2488 }
2489
2490 return rc;
2491}
2492
2493int
2494lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2495 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
2496{
2497 struct lpfc_iocbq *iocb, *next_iocb;
2498 IOCB_t *cmd = NULL;
2499 struct lpfc_scsi_buf *lpfc_cmd;
2500 int sum = 0, ret_val = 0;
2501
2502 /* Next check the txcmplq */
2503 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
2504 cmd = &iocb->iocb;
2505
2506 /* Must be a FCP command */
2507 if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
2508 (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
2509 (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
2510 continue;
2511 }
2512
2513 /* context1 MUST be a struct lpfc_scsi_buf */
2514 lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
2515 ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
2516 NULL, 0, ctx_cmd);
2517 if (ret_val != 0)
2518 continue;
2519 sum++;
2520 }
2521 return sum;
2522}
2523
5eb95af0
JSEC		 2524void
2525lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2526 struct lpfc_iocbq * rspiocb)
2527{
2528 spin_lock_irq(phba->host->host_lock);
604a3e30 2529 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC		 2530 spin_unlock_irq(phba->host->host_lock);
2531 return;
2532}
2533
dea3101e 2534int
2535lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2536 uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
2537 lpfc_ctx_cmd abort_cmd)
2538{
2539 struct lpfc_iocbq *iocb, *next_iocb;
2540 struct lpfc_iocbq *abtsiocb = NULL;
2541 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
2542 IOCB_t *cmd = NULL;
2543 struct lpfc_scsi_buf *lpfc_cmd;
2544 int errcnt = 0, ret_val = 0;
2545
2546 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
2547 cmd = &iocb->iocb;
2548
2549 /* Must be a FCP command */
2550 if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
2551 (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
2552 (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
2553 continue;
2554 }
2555
2556 /* context1 MUST be a struct lpfc_scsi_buf */
2557 lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
2558 ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
2559 iocb, ctx, abort_cmd);
2560 if (ret_val != 0)
2561 continue;
2562
2563 /* issue ABTS for this IOCB based on iotag */
2564 list_remove_head(lpfc_iocb_list, abtsiocb, struct lpfc_iocbq,
2565 list);
2566 if (abtsiocb == NULL) {
2567 errcnt++;
2568 continue;
2569 }
dea3101e 2570
2571 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
2572 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
2573 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
2574 abtsiocb->iocb.ulpLe = 1;
2575 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2576
2577 if (phba->hba_state >= LPFC_LINK_UP)
2578 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
2579 else
2580 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
2581
5eb95af0
JSEC		 2582 /* Setup callback routine and issue the command. */
2583 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea3101e 2584 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
2585 if (ret_val == IOCB_ERROR) {
604a3e30 2586 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e 2587 errcnt++;
2588 continue;
2589 }
2590 }
2591
2592 return errcnt;
2593}
2594
2595void
2596lpfc_sli_wake_iocb_high_priority(struct lpfc_hba * phba,
2597 struct lpfc_iocbq * queue1,
2598 struct lpfc_iocbq * queue2)
2599{
604a3e30
JB		 2600 struct lpfc_iocbq *save_iocbq = queue1->context2;
2601 if (save_iocbq && queue2)
2602 memcpy(&save_iocbq->iocb, &queue2->iocb, sizeof(queue2->iocb));
dea3101e 2603
2604 /* The waiter is looking for LPFC_IO_HIPRI bit to be set
2605 as a signal to wake up */
2606 queue1->iocb_flag |= LPFC_IO_HIPRI;
2607 return;
2608}
2609
2610int
2611lpfc_sli_issue_iocb_wait_high_priority(struct lpfc_hba * phba,
2612 struct lpfc_sli_ring * pring,
2613 struct lpfc_iocbq * piocb,
2614 uint32_t flag,
2615 struct lpfc_iocbq * prspiocbq,
2616 uint32_t timeout)
2617{
2618 int j, delay_time, retval = IOCB_ERROR;
2619
2620 /* The caller must left context1 empty. */
2621 if (piocb->context_un.hipri_wait_queue != 0) {
2622 return IOCB_ERROR;
2623 }
2624
2625 /*
2626 * If the caller has provided a response iocbq buffer, context2 must
2627 * be NULL or its an error.
2628 */
2629 if (prspiocbq && piocb->context2) {
2630 return IOCB_ERROR;
2631 }
2632
2633 piocb->context2 = prspiocbq;
2634
2635 /* Setup callback routine and issue the command. */
2636 piocb->iocb_cmpl = lpfc_sli_wake_iocb_high_priority;
2637 retval = lpfc_sli_issue_iocb(phba, pring, piocb,
2638 flag | SLI_IOCB_HIGH_PRIORITY);
2639 if (retval != IOCB_SUCCESS) {
2640 piocb->context2 = NULL;
2641 return IOCB_ERROR;
2642 }
2643
2644 /*
2645 * This high-priority iocb was sent out-of-band. Poll for its
2646 * completion rather than wait for a signal. Note that the host_lock
2647 * is held by the midlayer and must be released here to allow the
2648 * interrupt handlers to complete the IO and signal this routine via
2649 * the iocb_flag.
2650 * Also, the delay_time is computed to be one second longer than
2651 * the scsi command timeout to give the FW time to abort on
2652 * timeout rather than the driver just giving up. Typically,
2653 * the midlayer does not specify a time for this command so the
2654 * driver is free to enforce its own timeout.
2655 */
2656
2657 delay_time = ((timeout + 1) * 1000) >> 6;
2658 retval = IOCB_ERROR;
2659 spin_unlock_irq(phba->host->host_lock);
2660 for (j = 0; j < 64; j++) {
2661 msleep(delay_time);
2662 if (piocb->iocb_flag & LPFC_IO_HIPRI) {
2663 piocb->iocb_flag &= ~LPFC_IO_HIPRI;
2664 retval = IOCB_SUCCESS;
2665 break;
2666 }
2667 }
2668
2669 spin_lock_irq(phba->host->host_lock);
2670 piocb->context2 = NULL;
2671 return retval;
2672}
2673int
2674lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
2675 uint32_t timeout)
2676{
2677 DECLARE_WAIT_QUEUE_HEAD(done_q);
2678 DECLARE_WAITQUEUE(wq_entry, current);
2679 uint32_t timeleft = 0;
2680 int retval;
2681
2682 /* The caller must leave context1 empty. */
2683 if (pmboxq->context1 != 0) {
2684 return (MBX_NOT_FINISHED);
2685 }
2686
2687 /* setup wake call as IOCB callback */
2688 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
2689 /* setup context field to pass wait_queue pointer to wake function */
2690 pmboxq->context1 = &done_q;
2691
2692 /* start to sleep before we wait, to avoid races */
2693 set_current_state(TASK_INTERRUPTIBLE);
2694 add_wait_queue(&done_q, &wq_entry);
2695
2696 /* now issue the command */
2697 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
2698
2699 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
2700 timeleft = schedule_timeout(timeout * HZ);
2701 pmboxq->context1 = NULL;
2702 /* if schedule_timeout returns 0, we timed out and were not
2703 woken up */
2704 if (timeleft == 0) {
2705 retval = MBX_TIMEOUT;
2706 } else {
2707 retval = MBX_SUCCESS;
2708 }
2709 }
2710
2711
2712 set_current_state(TASK_RUNNING);
2713 remove_wait_queue(&done_q, &wq_entry);
2714 return retval;
2715}
2716
2717irqreturn_t
2718lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
2719{
2720 struct lpfc_hba *phba;
2721 uint32_t ha_copy;
2722 uint32_t work_ha_copy;
2723 unsigned long status;
2724 int i;
2725 uint32_t control;
2726
2727 /*
2728 * Get the driver's phba structure from the dev_id and
2729 * assume the HBA is not interrupting.
2730 */
2731 phba = (struct lpfc_hba *) dev_id;
2732
2733 if (unlikely(!phba))
2734 return IRQ_NONE;
2735
2736 phba->sli.slistat.sli_intr++;
2737
2738 /*
2739 * Call the HBA to see if it is interrupting. If not, don't claim
2740 * the interrupt
2741 */
2742
2743 /* Ignore all interrupts during initialization. */
2744 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2745 return IRQ_NONE;
2746
2747 /*
2748 * Read host attention register to determine interrupt source
2749 * Clear Attention Sources, except Error Attention (to
2750 * preserve status) and Link Attention
2751 */
2752 spin_lock(phba->host->host_lock);
2753 ha_copy = readl(phba->HAregaddr);
2754 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
2755 readl(phba->HAregaddr); /* flush */
2756 spin_unlock(phba->host->host_lock);
2757
2758 if (unlikely(!ha_copy))
2759 return IRQ_NONE;
2760
2761 work_ha_copy = ha_copy & phba->work_ha_mask;
2762
2763 if (unlikely(work_ha_copy)) {
2764 if (work_ha_copy & HA_LATT) {
2765 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
2766 /*
2767 * Turn off Link Attention interrupts
2768 * until CLEAR_LA done
2769 */
2770 spin_lock(phba->host->host_lock);
2771 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
2772 control = readl(phba->HCregaddr);
2773 control &= ~HC_LAINT_ENA;
2774 writel(control, phba->HCregaddr);
2775 readl(phba->HCregaddr); /* flush */
2776 spin_unlock(phba->host->host_lock);
2777 }
2778 else
2779 work_ha_copy &= ~HA_LATT;
2780 }
2781
2782 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
2783 for (i = 0; i < phba->sli.num_rings; i++) {
2784 if (work_ha_copy & (HA_RXATT << (4*i))) {
2785 /*
2786 * Turn off Slow Rings interrupts
2787 */
2788 spin_lock(phba->host->host_lock);
2789 control = readl(phba->HCregaddr);
2790 control &= ~(HC_R0INT_ENA << i);
2791 writel(control, phba->HCregaddr);
2792 readl(phba->HCregaddr); /* flush */
2793 spin_unlock(phba->host->host_lock);
2794 }
2795 }
2796 }
2797
2798 if (work_ha_copy & HA_ERATT) {
2799 phba->hba_state = LPFC_HBA_ERROR;
2800 /*
2801 * There was a link/board error. Read the
2802 * status register to retrieve the error event
2803 * and process it.
2804 */
2805 phba->sli.slistat.err_attn_event++;
2806 /* Save status info */
2807 phba->work_hs = readl(phba->HSregaddr);
2808 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
2809 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
2810
2811 /* Clear Chip error bit */
2812 writel(HA_ERATT, phba->HAregaddr);
2813 readl(phba->HAregaddr); /* flush */
2814
2815 /*
2816 * Reseting the HBA is the only reliable way
2817 * to shutdown interrupt when there is a
2818 * ERROR.
2819 */
2820 lpfc_sli_send_reset(phba, phba->hba_state);
2821 }
2822
2823 spin_lock(phba->host->host_lock);
2824 phba->work_ha |= work_ha_copy;
2825 if (phba->work_wait)
2826 wake_up(phba->work_wait);
2827 spin_unlock(phba->host->host_lock);
2828 }
2829
2830 ha_copy &= ~(phba->work_ha_mask);
2831
2832 /*
2833 * Process all events on FCP ring. Take the optimized path for
2834 * FCP IO. Any other IO is slow path and is handled by
2835 * the worker thread.
2836 */
2837 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
2838 status >>= (4*LPFC_FCP_RING);
2839 if (status & HA_RXATT)
2840 lpfc_sli_handle_fast_ring_event(phba,
2841 &phba->sli.ring[LPFC_FCP_RING],
2842 status);
2843 return IRQ_HANDLED;
2844
2845} /* lpfc_intr_handler */
Linux kernel - Deliverables
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