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[SCSI] lpfc 8.3.33: Parallelize SLI-4 Q distribution
[deliverable/linux.git] / drivers / scsi / lpfc / lpfc_sli4.h
CommitLineData
da0436e9
JS		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
792581de 4 * Copyright (C) 2009-2011 Emulex. All rights reserved. *
da0436e9
JS		 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *******************************************************************/
20
21#define LPFC_ACTIVE_MBOX_WAIT_CNT 100
5af5eee7
JS		 22#define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000
23#define LPFC_XRI_EXCH_BUSY_WAIT_T1 10
24#define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000
da0436e9 25#define LPFC_RELEASE_NOTIFICATION_INTERVAL 32
da0436e9 26#define LPFC_RPI_LOW_WATER_MARK 10
ecfd03c6 27
a93ff37a
JS		 28#define LPFC_UNREG_FCF 1
29#define LPFC_SKIP_UNREG_FCF 0
30
ecfd03c6
JS		 31/* Amount of time in seconds for waiting FCF rediscovery to complete */
32#define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */
33
da0436e9
JS		 34/* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
35#define LPFC_NEMBED_MBOX_SGL_CNT 254
36
37/* Multi-queue arrangement for fast-path FCP work queues */
38#define LPFC_FN_EQN_MAX 8
39#define LPFC_SP_EQN_DEF 1
def9c7a9 40#define LPFC_FP_EQN_DEF 4
da0436e9
JS		 41#define LPFC_FP_EQN_MIN 1
42#define LPFC_FP_EQN_MAX (LPFC_FN_EQN_MAX - LPFC_SP_EQN_DEF)
43
44#define LPFC_FN_WQN_MAX 32
45#define LPFC_SP_WQN_DEF 1
46#define LPFC_FP_WQN_DEF 4
47#define LPFC_FP_WQN_MIN 1
48#define LPFC_FP_WQN_MAX (LPFC_FN_WQN_MAX - LPFC_SP_WQN_DEF)
49
50/*
51 * Provide the default FCF Record attributes used by the driver
52 * when nonFIP mode is configured and there is no other default
53 * FCF Record attributes.
54 */
55#define LPFC_FCOE_FCF_DEF_INDEX 0
56#define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
57#define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
58
dbb6b3ab
JS		 59#define LPFC_FCOE_NULL_VID 0xFFF
60#define LPFC_FCOE_IGNORE_VID 0xFFFF
61
da0436e9
JS		 62/* First 3 bytes of default FCF MAC is specified by FC_MAP */
63#define LPFC_FCOE_FCF_MAC3 0xFF
64#define LPFC_FCOE_FCF_MAC4 0xFF
65#define LPFC_FCOE_FCF_MAC5 0xFE
66#define LPFC_FCOE_FCF_MAP0 0x0E
67#define LPFC_FCOE_FCF_MAP1 0xFC
68#define LPFC_FCOE_FCF_MAP2 0x00
98fc5dd9 69#define LPFC_FCOE_MAX_RCV_SIZE 0x800
da0436e9
JS		 70#define LPFC_FCOE_FKA_ADV_PER 0
71#define LPFC_FCOE_FIP_PRIORITY 0x80
72
6669f9bb
JS		 73#define sli4_sid_from_fc_hdr(fc_hdr) \
74 ((fc_hdr)->fh_s_id[0] << 16 | \
75 (fc_hdr)->fh_s_id[1] << 8 | \
76 (fc_hdr)->fh_s_id[2])
77
939723a4
JS		 78#define sli4_did_from_fc_hdr(fc_hdr) \
79 ((fc_hdr)->fh_d_id[0] << 16 | \
80 (fc_hdr)->fh_d_id[1] << 8 | \
81 (fc_hdr)->fh_d_id[2])
82
5ffc266e
JS		 83#define sli4_fctl_from_fc_hdr(fc_hdr) \
84 ((fc_hdr)->fh_f_ctl[0] << 16 | \
85 (fc_hdr)->fh_f_ctl[1] << 8 | \
86 (fc_hdr)->fh_f_ctl[2])
87
939723a4
JS		 88#define sli4_type_from_fc_hdr(fc_hdr) \
89 ((fc_hdr)->fh_type)
90
88a2cfbb
JS		 91#define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000
92
da0436e9
JS		 93enum lpfc_sli4_queue_type {
94 LPFC_EQ,
95 LPFC_GCQ,
96 LPFC_MCQ,
97 LPFC_WCQ,
98 LPFC_RCQ,
99 LPFC_MQ,
100 LPFC_WQ,
101 LPFC_HRQ,
102 LPFC_DRQ
103};
104
105/* The queue sub-type defines the functional purpose of the queue */
106enum lpfc_sli4_queue_subtype {
107 LPFC_NONE,
108 LPFC_MBOX,
109 LPFC_FCP,
110 LPFC_ELS,
111 LPFC_USOL
112};
113
114union sli4_qe {
115 void *address;
116 struct lpfc_eqe *eqe;
117 struct lpfc_cqe *cqe;
118 struct lpfc_mcqe *mcqe;
119 struct lpfc_wcqe_complete *wcqe_complete;
120 struct lpfc_wcqe_release *wcqe_release;
121 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
122 struct lpfc_rcqe_complete *rcqe_complete;
123 struct lpfc_mqe *mqe;
124 union lpfc_wqe *wqe;
125 struct lpfc_rqe *rqe;
126};
127
128struct lpfc_queue {
129 struct list_head list;
130 enum lpfc_sli4_queue_type type;
131 enum lpfc_sli4_queue_subtype subtype;
132 struct lpfc_hba *phba;
133 struct list_head child_list;
134 uint32_t entry_count; /* Number of entries to support on the queue */
135 uint32_t entry_size; /* Size of each queue entry. */
73d91e50
JS		 136 uint32_t entry_repost; /* Count of entries before doorbell is rung */
137#define LPFC_QUEUE_MIN_REPOST 8
da0436e9 138 uint32_t queue_id; /* Queue ID assigned by the hardware */
2a622bfb 139 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */
da0436e9
JS		 140 struct list_head page_list;
141 uint32_t page_count; /* Number of pages allocated for this queue */
da0436e9
JS		 142 uint32_t host_index; /* The host's index for putting or getting */
143 uint32_t hba_index; /* The last known hba index for get or put */
b84daac9 144
2a76a283
JS		 145 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */
146
b84daac9
JS		 147 /* For q stats */
148 uint32_t q_cnt_1;
149 uint32_t q_cnt_2;
150 uint32_t q_cnt_3;
151 uint64_t q_cnt_4;
152/* defines for EQ stats */
153#define EQ_max_eqe q_cnt_1
154#define EQ_no_entry q_cnt_2
155#define EQ_badstate q_cnt_3
156#define EQ_processed q_cnt_4
157
158/* defines for CQ stats */
159#define CQ_mbox q_cnt_1
160#define CQ_max_cqe q_cnt_1
161#define CQ_release_wqe q_cnt_2
162#define CQ_xri_aborted q_cnt_3
163#define CQ_wq q_cnt_4
164
165/* defines for WQ stats */
166#define WQ_overflow q_cnt_1
167#define WQ_posted q_cnt_4
168
169/* defines for RQ stats */
170#define RQ_no_posted_buf q_cnt_1
171#define RQ_no_buf_found q_cnt_2
172#define RQ_buf_trunc q_cnt_3
173#define RQ_rcv_buf q_cnt_4
174
da0436e9
JS		 175 union sli4_qe qe[1]; /* array to index entries (must be last) */
176};
177
da0436e9
JS		 178struct lpfc_sli4_link {
179 uint8_t speed;
180 uint8_t duplex;
181 uint8_t status;
70f3c073
JS		 182 uint8_t type;
183 uint8_t number;
da0436e9 184 uint8_t fault;
65467b6b 185 uint16_t logical_speed;
70f3c073 186 uint16_t topology;
da0436e9
JS		 187};
188
ecfd03c6
JS		 189struct lpfc_fcf_rec {
190 uint8_t fabric_name[8];
191 uint8_t switch_name[8];
da0436e9
JS		 192 uint8_t mac_addr[6];
193 uint16_t fcf_indx;
ecfd03c6
JS		 194 uint32_t priority;
195 uint16_t vlan_id;
196 uint32_t addr_mode;
197 uint32_t flag;
198#define BOOT_ENABLE 0x01
199#define RECORD_VALID 0x02
200};
201
7d791df7
JS		 202struct lpfc_fcf_pri_rec {
203 uint16_t fcf_index;
204#define LPFC_FCF_ON_PRI_LIST 0x0001
205#define LPFC_FCF_FLOGI_FAILED 0x0002
206 uint16_t flag;
207 uint32_t priority;
208};
209
210struct lpfc_fcf_pri {
211 struct list_head list;
212 struct lpfc_fcf_pri_rec fcf_rec;
213};
214
215/*
216 * Maximum FCF table index, it is for driver internal book keeping, it
217 * just needs to be no less than the supported HBA's FCF table size.
218 */
219#define LPFC_SLI4_FCF_TBL_INDX_MAX 32
220
ecfd03c6 221struct lpfc_fcf {
da0436e9
JS		 222 uint16_t fcfi;
223 uint32_t fcf_flag;
224#define FCF_AVAILABLE 0x01 /* FCF available for discovery */
225#define FCF_REGISTERED 0x02 /* FCF registered with FW */
ecfd03c6
JS		 226#define FCF_SCAN_DONE 0x04 /* FCF table scan done */
227#define FCF_IN_USE 0x08 /* Atleast one discovery completed */
0c9ab6f5
JS		 228#define FCF_INIT_DISC 0x10 /* Initial FCF discovery */
229#define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */
230#define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */
231#define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC)
232#define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */
233#define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */
234#define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */
a93ff37a 235#define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT)
da0436e9 236 uint32_t addr_mode;
999d813f 237 uint32_t eligible_fcf_cnt;
ecfd03c6
JS		 238 struct lpfc_fcf_rec current_rec;
239 struct lpfc_fcf_rec failover_rec;
7d791df7
JS		 240 struct list_head fcf_pri_list;
241 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX];
242 uint32_t current_fcf_scan_pri;
ecfd03c6 243 struct timer_list redisc_wait;
0c9ab6f5 244 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */
da0436e9
JS		 245};
246
0c9ab6f5 247
da0436e9
JS		 248#define LPFC_REGION23_SIGNATURE "RG23"
249#define LPFC_REGION23_VERSION 1
250#define LPFC_REGION23_LAST_REC 0xff
a0c87cbd
JS		 251#define DRIVER_SPECIFIC_TYPE 0xA2
252#define LINUX_DRIVER_ID 0x20
253#define PORT_STE_TYPE 0x1
254
da0436e9
JS		 255struct lpfc_fip_param_hdr {
256 uint8_t type;
257#define FCOE_PARAM_TYPE 0xA0
258 uint8_t length;
259#define FCOE_PARAM_LENGTH 2
260 uint8_t parm_version;
261#define FIPP_VERSION 0x01
262 uint8_t parm_flags;
263#define lpfc_fip_param_hdr_fipp_mode_SHIFT 6
264#define lpfc_fip_param_hdr_fipp_mode_MASK 0x3
265#define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags
6a9c52cf 266#define FIPP_MODE_ON 0x1
da0436e9
JS		 267#define FIPP_MODE_OFF 0x0
268#define FIPP_VLAN_VALID 0x1
269};
270
271struct lpfc_fcoe_params {
272 uint8_t fc_map[3];
273 uint8_t reserved1;
274 uint16_t vlan_tag;
275 uint8_t reserved[2];
276};
277
278struct lpfc_fcf_conn_hdr {
279 uint8_t type;
280#define FCOE_CONN_TBL_TYPE 0xA1
281 uint8_t length; /* words */
282 uint8_t reserved[2];
283};
284
285struct lpfc_fcf_conn_rec {
286 uint16_t flags;
287#define FCFCNCT_VALID 0x0001
288#define FCFCNCT_BOOT 0x0002
289#define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */
290#define FCFCNCT_FBNM_VALID 0x0008
291#define FCFCNCT_SWNM_VALID 0x0010
292#define FCFCNCT_VLAN_VALID 0x0020
293#define FCFCNCT_AM_VALID 0x0040
294#define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */
295#define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */
296
297 uint16_t vlan_tag;
298 uint8_t fabric_name[8];
299 uint8_t switch_name[8];
300};
301
302struct lpfc_fcf_conn_entry {
303 struct list_head list;
304 struct lpfc_fcf_conn_rec conn_rec;
305};
306
307/*
308 * Define the host's bootstrap mailbox. This structure contains
309 * the member attributes needed to create, use, and destroy the
310 * bootstrap mailbox region.
311 *
312 * The macro definitions for the bmbx data structure are defined
313 * in lpfc_hw4.h with the register definition.
314 */
315struct lpfc_bmbx {
316 struct lpfc_dmabuf *dmabuf;
317 struct dma_address dma_address;
318 void *avirt;
319 dma_addr_t aphys;
320 uint32_t bmbx_size;
321};
322
323#define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
324
325#define LPFC_EQE_SIZE_4B 4
326#define LPFC_EQE_SIZE_16B 16
327#define LPFC_CQE_SIZE 16
328#define LPFC_WQE_SIZE 64
329#define LPFC_MQE_SIZE 256
330#define LPFC_RQE_SIZE 8
331
332#define LPFC_EQE_DEF_COUNT 1024
ff78d8f9 333#define LPFC_CQE_DEF_COUNT 1024
f1126688 334#define LPFC_WQE_DEF_COUNT 256
da0436e9
JS		 335#define LPFC_MQE_DEF_COUNT 16
336#define LPFC_RQE_DEF_COUNT 512
337
338#define LPFC_QUEUE_NOARM false
339#define LPFC_QUEUE_REARM true
340
341
342/*
343 * SLI4 CT field defines
344 */
345#define SLI4_CT_RPI 0
346#define SLI4_CT_VPI 1
347#define SLI4_CT_VFI 2
348#define SLI4_CT_FCFI 3
349
28baac74
JS		 350#define LPFC_SLI4_FL1_MAX_SEGMENT_SIZE 0x10000
351#define LPFC_SLI4_FL1_MAX_BUF_SIZE 0X2000
352#define LPFC_SLI4_MIN_BUF_SIZE 0x400
353#define LPFC_SLI4_MAX_BUF_SIZE 0x20000
da0436e9
JS		 354
355/*
356 * SLI4 specific data structures
357 */
358struct lpfc_max_cfg_param {
359 uint16_t max_xri;
360 uint16_t xri_base;
361 uint16_t xri_used;
362 uint16_t max_rpi;
363 uint16_t rpi_base;
364 uint16_t rpi_used;
365 uint16_t max_vpi;
366 uint16_t vpi_base;
367 uint16_t vpi_used;
368 uint16_t max_vfi;
369 uint16_t vfi_base;
370 uint16_t vfi_used;
371 uint16_t max_fcfi;
da0436e9
JS		 372 uint16_t fcfi_used;
373 uint16_t max_eq;
374 uint16_t max_rq;
375 uint16_t max_cq;
376 uint16_t max_wq;
377};
378
379struct lpfc_hba;
380/* SLI4 HBA multi-fcp queue handler struct */
381struct lpfc_fcp_eq_hdl {
382 uint32_t idx;
383 struct lpfc_hba *phba;
384};
385
28baac74
JS		 386/* Port Capabilities for SLI4 Parameters */
387struct lpfc_pc_sli4_params {
388 uint32_t supported;
389 uint32_t if_type;
390 uint32_t sli_rev;
391 uint32_t sli_family;
392 uint32_t featurelevel_1;
393 uint32_t featurelevel_2;
394 uint32_t proto_types;
395#define LPFC_SLI4_PROTO_FCOE 0x0000001
396#define LPFC_SLI4_PROTO_FC 0x0000002
397#define LPFC_SLI4_PROTO_NIC 0x0000004
398#define LPFC_SLI4_PROTO_ISCSI 0x0000008
399#define LPFC_SLI4_PROTO_RDMA 0x0000010
400 uint32_t sge_supp_len;
401 uint32_t if_page_sz;
402 uint32_t rq_db_window;
403 uint32_t loopbk_scope;
404 uint32_t eq_pages_max;
405 uint32_t eqe_size;
406 uint32_t cq_pages_max;
407 uint32_t cqe_size;
408 uint32_t mq_pages_max;
409 uint32_t mqe_size;
410 uint32_t mq_elem_cnt;
411 uint32_t wq_pages_max;
412 uint32_t wqe_size;
413 uint32_t rq_pages_max;
414 uint32_t rqe_size;
415 uint32_t hdr_pages_max;
416 uint32_t hdr_size;
417 uint32_t hdr_pp_align;
418 uint32_t sgl_pages_max;
419 uint32_t sgl_pp_align;
fedd3b7b
JS		 420 uint8_t cqv;
421 uint8_t mqv;
422 uint8_t wqv;
423 uint8_t rqv;
28baac74
JS		 424};
425
912e3acd
JS		 426struct lpfc_iov {
427 uint32_t pf_number;
428 uint32_t vf_number;
429};
430
cd1c8301
JS		 431struct lpfc_sli4_lnk_info {
432 uint8_t lnk_dv;
433#define LPFC_LNK_DAT_INVAL 0
434#define LPFC_LNK_DAT_VAL 1
435 uint8_t lnk_tp;
436#define LPFC_LNK_GE 0x0 /* FCoE */
437#define LPFC_LNK_FC 0x1 /* FC */
438 uint8_t lnk_no;
439};
440
da0436e9
JS		 441/* SLI4 HBA data structure entries */
442struct lpfc_sli4_hba {
443 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
444 PCI BAR0, config space registers */
445 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
446 PCI BAR1, control registers */
447 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
448 PCI BAR2, doorbell registers */
2fcee4bf
JS		 449 union {
450 struct {
451 /* IF Type 0, BAR 0 PCI cfg space reg mem map */
452 void __iomem *UERRLOregaddr;
453 void __iomem *UERRHIregaddr;
454 void __iomem *UEMASKLOregaddr;
455 void __iomem *UEMASKHIregaddr;
456 } if_type0;
457 struct {
458 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */
459 void __iomem *STATUSregaddr;
460 void __iomem *CTRLregaddr;
461 void __iomem *ERR1regaddr;
2e90f4b5
JS		 462#define SLIPORT_ERR1_REG_ERR_CODE_1 0x1
463#define SLIPORT_ERR1_REG_ERR_CODE_2 0x2
2fcee4bf 464 void __iomem *ERR2regaddr;
2e90f4b5
JS		 465#define SLIPORT_ERR2_REG_FW_RESTART 0x0
466#define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1
467#define SLIPORT_ERR2_REG_FORCED_DUMP 0x2
468#define SLIPORT_ERR2_REG_FAILURE_EQ 0x3
469#define SLIPORT_ERR2_REG_FAILURE_CQ 0x4
470#define SLIPORT_ERR2_REG_FAILURE_BUS 0x5
471#define SLIPORT_ERR2_REG_FAILURE_RQ 0x6
2fcee4bf
JS		 472 } if_type2;
473 } u;
474
475 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */
476 void __iomem *PSMPHRregaddr;
477
478 /* Well-known SLI INTF register memory map. */
479 void __iomem *SLIINTFregaddr;
480
481 /* IF type 0, BAR 1 function CSR register memory map */
482 void __iomem *ISRregaddr; /* HST_ISR register */
483 void __iomem *IMRregaddr; /* HST_IMR register */
484 void __iomem *ISCRregaddr; /* HST_ISCR register */
485 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */
486 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */
487 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */
488 void __iomem *EQCQDBregaddr; /* EQCQ_DOORBELL register */
489 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */
490 void __iomem *BMBXregaddr; /* BootStrap MBX register */
da0436e9 491
a747c9ce
JS		 492 uint32_t ue_mask_lo;
493 uint32_t ue_mask_hi;
28baac74
JS		 494 struct lpfc_register sli_intf;
495 struct lpfc_pc_sli4_params pc_sli4_params;
da0436e9
JS		 496 struct msix_entry *msix_entries;
497 uint32_t cfg_eqn;
75baf696 498 uint32_t msix_vec_nr;
da0436e9
JS		 499 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */
500 /* Pointers to the constructed SLI4 queues */
501 struct lpfc_queue **fp_eq; /* Fast-path event queue */
502 struct lpfc_queue *sp_eq; /* Slow-path event queue */
503 struct lpfc_queue **fcp_wq;/* Fast-path FCP work queue */
504 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
505 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
506 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
507 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
508 struct lpfc_queue **fcp_cq;/* Fast-path FCP compl queue */
509 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
510 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */
da0436e9
JS		 511
512 /* Setup information for various queue parameters */
513 int eq_esize;
514 int eq_ecount;
515 int cq_esize;
516 int cq_ecount;
517 int wq_esize;
518 int wq_ecount;
519 int mq_esize;
520 int mq_ecount;
521 int rq_esize;
522 int rq_ecount;
523#define LPFC_SP_EQ_MAX_INTR_SEC 10000
524#define LPFC_FP_EQ_MAX_INTR_SEC 10000
525
526 uint32_t intr_enable;
527 struct lpfc_bmbx bmbx;
528 struct lpfc_max_cfg_param max_cfg_param;
6d368e53
JS		 529 uint16_t extents_in_use; /* must allocate resource extents. */
530 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */
da0436e9
JS		 531 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
532 uint16_t next_rpi;
533 uint16_t scsi_xri_max;
534 uint16_t scsi_xri_cnt;
8a9d2e80 535 uint16_t els_xri_cnt;
6d368e53 536 uint16_t scsi_xri_start;
da0436e9
JS		 537 struct list_head lpfc_free_sgl_list;
538 struct list_head lpfc_sgl_list;
da0436e9 539 struct list_head lpfc_abts_els_sgl_list;
da0436e9 540 struct list_head lpfc_abts_scsi_buf_list;
da0436e9
JS		 541 struct lpfc_sglq **lpfc_sglq_active_list;
542 struct list_head lpfc_rpi_hdr_list;
543 unsigned long *rpi_bmask;
6d368e53 544 uint16_t *rpi_ids;
da0436e9 545 uint16_t rpi_count;
6d368e53
JS		 546 struct list_head lpfc_rpi_blk_list;
547 unsigned long *xri_bmask;
548 uint16_t *xri_ids;
6d368e53
JS		 549 struct list_head lpfc_xri_blk_list;
550 unsigned long *vfi_bmask;
551 uint16_t *vfi_ids;
552 uint16_t vfi_count;
553 struct list_head lpfc_vfi_blk_list;
da0436e9 554 struct lpfc_sli4_flags sli4_flags;
45ed1190 555 struct list_head sp_queue_event;
da0436e9
JS		 556 struct list_head sp_cqe_event_pool;
557 struct list_head sp_asynce_work_queue;
558 struct list_head sp_fcp_xri_aborted_work_queue;
559 struct list_head sp_els_xri_aborted_work_queue;
560 struct list_head sp_unsol_work_queue;
561 struct lpfc_sli4_link link_state;
cd1c8301
JS		 562 struct lpfc_sli4_lnk_info lnk_info;
563 uint32_t pport_name_sta;
564#define LPFC_SLI4_PPNAME_NON 0
565#define LPFC_SLI4_PPNAME_GET 1
912e3acd 566 struct lpfc_iov iov;
da0436e9
JS		 567 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
568 spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */
569};
570
571enum lpfc_sge_type {
572 GEN_BUFF_TYPE,
573 SCSI_BUFF_TYPE
574};
575
0f65ff68
JS		 576enum lpfc_sgl_state {
577 SGL_FREED,
578 SGL_ALLOCATED,
579 SGL_XRI_ABORTED
580};
581
da0436e9
JS		 582struct lpfc_sglq {
583 /* lpfc_sglqs are used in double linked lists */
584 struct list_head list;
585 struct list_head clist;
586 enum lpfc_sge_type buff_type; /* is this a scsi sgl */
0f65ff68 587 enum lpfc_sgl_state state;
19ca7609 588 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */
da0436e9 589 uint16_t iotag; /* pre-assigned IO tag */
6d368e53 590 uint16_t sli4_lxritag; /* logical pre-assigned xri. */
da0436e9
JS		 591 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
592 struct sli4_sge *sgl; /* pre-assigned SGL */
593 void *virt; /* virtual address. */
594 dma_addr_t phys; /* physical address */
595};
596
597struct lpfc_rpi_hdr {
598 struct list_head list;
599 uint32_t len;
600 struct lpfc_dmabuf *dmabuf;
601 uint32_t page_count;
602 uint32_t start_rpi;
603};
604
6d368e53
JS		 605struct lpfc_rsrc_blks {
606 struct list_head list;
607 uint16_t rsrc_start;
608 uint16_t rsrc_size;
609 uint16_t rsrc_used;
610};
611
da0436e9
JS		 612/*
613 * SLI4 specific function prototypes
614 */
615int lpfc_pci_function_reset(struct lpfc_hba *);
73d91e50 616int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *);
da0436e9 617int lpfc_sli4_hba_setup(struct lpfc_hba *);
da0436e9
JS		 618int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
619 uint8_t, uint32_t, bool);
620void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
621void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
622void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
623 struct lpfc_mbx_sge *);
0c9ab6f5
JS		 624int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *,
625 uint16_t);
da0436e9
JS		 626
627void lpfc_sli4_hba_reset(struct lpfc_hba *);
628struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
629 uint32_t);
630void lpfc_sli4_queue_free(struct lpfc_queue *);
631uint32_t lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint16_t);
173edbb2 632uint32_t lpfc_modify_fcp_eq_delay(struct lpfc_hba *, uint16_t);
da0436e9
JS		 633uint32_t lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
634 struct lpfc_queue *, uint32_t, uint32_t);
b19a061a
JS		 635int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
636 struct lpfc_queue *, uint32_t);
da0436e9
JS		 637uint32_t lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
638 struct lpfc_queue *, uint32_t);
639uint32_t lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
640 struct lpfc_queue *, struct lpfc_queue *, uint32_t);
73d91e50 641void lpfc_rq_adjust_repost(struct lpfc_hba *, struct lpfc_queue *, int);
da0436e9
JS		 642uint32_t lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
643uint32_t lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
644uint32_t lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
645uint32_t lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
646uint32_t lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
647 struct lpfc_queue *);
648int lpfc_sli4_queue_setup(struct lpfc_hba *);
649void lpfc_sli4_queue_unset(struct lpfc_hba *);
650int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
651int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *);
da0436e9
JS		 652uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
653int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
da0436e9
JS		 654int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int);
655struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
656struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
657void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
658void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
659int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
660int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
661int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
662struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
663void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
664int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
665void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
666void lpfc_sli4_remove_rpis(struct lpfc_hba *);
667void lpfc_sli4_async_event_proc(struct lpfc_hba *);
ecfd03c6 668void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
6b5151fd
JS		 669int lpfc_sli4_resume_rpi(struct lpfc_nodelist *,
670 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *);
da0436e9
JS		 671void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
672void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
673void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
674 struct sli4_wcqe_xri_aborted *);
675void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
676 struct sli4_wcqe_xri_aborted *);
1151e3ec
JS		 677void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *);
678void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *);
da0436e9
JS		 679int lpfc_sli4_brdreset(struct lpfc_hba *);
680int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
681void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
682int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
76a95d75 683int lpfc_sli4_init_vpi(struct lpfc_vport *);
da0436e9
JS		 684uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
685uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
686void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
0c9ab6f5
JS		 687int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
688int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
689int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
690void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
691void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
692void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
693int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
da0436e9 694int lpfc_sli4_post_status_check(struct lpfc_hba *);
a183a15f
JS		 695uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
696uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
Linux kernel - Deliverables
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