Merge tag 'nfsd-4.6' of git://linux-nfs.org/~bfields/linux
[deliverable/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
CommitLineData
c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS
4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS
24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS
30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS
32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS
38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
c4a3e0a5 45#include <asm/uaccess.h>
43399236 46#include <linux/fs.h>
c4a3e0a5 47#include <linux/compat.h>
cf62a0a5 48#include <linux/blkdev.h>
0b950672 49#include <linux/mutex.h>
c3518837 50#include <linux/poll.h>
c4a3e0a5
BS
51
52#include <scsi/scsi.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsi_device.h>
55#include <scsi/scsi_host.h>
4bcde509 56#include <scsi/scsi_tcq.h>
9c915a8c 57#include "megaraid_sas_fusion.h"
c4a3e0a5
BS
58#include "megaraid_sas.h"
59
1fd10685
YB
60/*
61 * Number of sectors per IO command
62 * Will be set in megasas_init_mfi if user does not provide
63 */
64static unsigned int max_sectors;
65module_param_named(max_sectors, max_sectors, int, 0);
66MODULE_PARM_DESC(max_sectors,
67 "Maximum number of sectors per IO command");
68
80d9da98 69static int msix_disable;
70module_param(msix_disable, int, S_IRUGO);
71MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
72
079eaddf 73static unsigned int msix_vectors;
74module_param(msix_vectors, int, S_IRUGO);
75MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
76
229fe47c 77static int allow_vf_ioctls;
78module_param(allow_vf_ioctls, int, S_IRUGO);
79MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
80
ae09a6c1 81static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9 82module_param(throttlequeuedepth, int, S_IRUGO);
83MODULE_PARM_DESC(throttlequeuedepth,
84 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
85
e3d178ca 86unsigned int resetwaittime = MEGASAS_RESET_WAIT_TIME;
c007b8b2 87module_param(resetwaittime, int, S_IRUGO);
88MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
89 "before resetting adapter. Default: 180");
90
ac95136a
SS
91int smp_affinity_enable = 1;
92module_param(smp_affinity_enable, int, S_IRUGO);
93MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
94
179ac142
SS
95int rdpq_enable = 1;
96module_param(rdpq_enable, int, S_IRUGO);
97MODULE_PARM_DESC(rdpq_enable, " Allocate reply queue in chunks for large queue depth enable/disable Default: disable(0)");
98
308ec459
SS
99unsigned int dual_qdepth_disable;
100module_param(dual_qdepth_disable, int, S_IRUGO);
101MODULE_PARM_DESC(dual_qdepth_disable, "Disable dual queue depth feature. Default: 0");
102
e3d178ca
SS
103unsigned int scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
104module_param(scmd_timeout, int, S_IRUGO);
105MODULE_PARM_DESC(scmd_timeout, "scsi command timeout (10-90s), default 90s. See megasas_reset_timer.");
106
c4a3e0a5
BS
107MODULE_LICENSE("GPL");
108MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS
109MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
110MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 111
058a8fac 112int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 113static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160 114static int megasas_ld_list_query(struct megasas_instance *instance,
115 u8 query_type);
39a98554 116static int megasas_issue_init_mfi(struct megasas_instance *instance);
117static int megasas_register_aen(struct megasas_instance *instance,
118 u32 seq_num, u32 class_locale_word);
2216c305
SS
119static int
120megasas_get_pd_info(struct megasas_instance *instance, u16 device_id);
c4a3e0a5
BS
121/*
122 * PCI ID table for all supported controllers
123 */
124static struct pci_device_id megasas_pci_table[] = {
125
f3d7271c
HK
126 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
127 /* xscale IOP */
128 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
129 /* ppc IOP */
af7a5647 130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
131 /* ppc IOP */
6610a6b3
YB
132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
133 /* gen2*/
134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
135 /* gen2*/
87911122
YB
136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
137 /* skinny*/
138 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
139 /* skinny*/
f3d7271c
HK
140 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
141 /* xscale IOP, vega */
142 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
143 /* xscale IOP */
9c915a8c 144 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
145 /* Fusion */
229fe47c 146 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
147 /* Plasma */
36807e67 148 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
149 /* Invader */
21d3c710
SS
150 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
151 /* Fury */
90c204bc 152 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER)},
153 /* Intruder */
154 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER_24)},
155 /* Intruder 24 port*/
7364d34b 156 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_52)},
157 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_53)},
f3d7271c 158 {}
c4a3e0a5
BS
159};
160
161MODULE_DEVICE_TABLE(pci, megasas_pci_table);
162
163static int megasas_mgmt_majorno;
229fe47c 164struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 165static struct fasync_struct *megasas_async_queue;
0b950672 166static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 167
c3518837
YB
168static int megasas_poll_wait_aen;
169static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 170static u32 support_poll_for_event;
9c915a8c 171u32 megasas_dbg_lvl;
837f5fe8 172static u32 support_device_change;
658dcedb 173
c3518837
YB
174/* define lock for aen poll */
175spinlock_t poll_aen_lock;
176
9c915a8c 177void
7343eb65 178megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
179 u8 alt_status);
ebf054b0 180static u32
181megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
182static int
183megasas_adp_reset_gen2(struct megasas_instance *instance,
184 struct megasas_register_set __iomem *reg_set);
cd50ba8e 185static irqreturn_t megasas_isr(int irq, void *devp);
186static u32
187megasas_init_adapter_mfi(struct megasas_instance *instance);
188u32
189megasas_build_and_issue_cmd(struct megasas_instance *instance,
190 struct scsi_cmnd *scmd);
191static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c 192void
193megasas_release_fusion(struct megasas_instance *instance);
194int
195megasas_ioc_init_fusion(struct megasas_instance *instance);
196void
197megasas_free_cmds_fusion(struct megasas_instance *instance);
198u8
199megasas_get_map_info(struct megasas_instance *instance);
200int
201megasas_sync_map_info(struct megasas_instance *instance);
202int
229fe47c 203wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
204 int seconds);
9c915a8c 205void megasas_reset_reply_desc(struct megasas_instance *instance);
9c915a8c 206void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c 207static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
208 int initial);
209int megasas_check_mpio_paths(struct megasas_instance *instance,
210 struct scsi_cmnd *scmd);
cd50ba8e 211
6d40afbc 212int
cd50ba8e 213megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
214{
215 instance->instancet->fire_cmd(instance,
216 cmd->frame_phys_addr, 0, instance->reg_set);
6d40afbc 217 return 0;
cd50ba8e 218}
7343eb65 219
c4a3e0a5
BS
220/**
221 * megasas_get_cmd - Get a command from the free pool
222 * @instance: Adapter soft state
223 *
224 * Returns a free command from the pool
225 */
9c915a8c 226struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS
227 *instance)
228{
229 unsigned long flags;
230 struct megasas_cmd *cmd = NULL;
231
90dc9d98 232 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS
233
234 if (!list_empty(&instance->cmd_pool)) {
235 cmd = list_entry((&instance->cmd_pool)->next,
236 struct megasas_cmd, list);
237 list_del_init(&cmd->list);
238 } else {
1be18254 239 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS
240 }
241
90dc9d98 242 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS
243 return cmd;
244}
245
246/**
4026e9aa 247 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS
248 * @instance: Adapter soft state
249 * @cmd: Command packet to be returned to free command pool
250 */
9c915a8c 251inline void
4026e9aa 252megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 253{
4026e9aa
SS
254 unsigned long flags;
255 u32 blk_tags;
256 struct megasas_cmd_fusion *cmd_fusion;
257 struct fusion_context *fusion = instance->ctrl_context;
258
259 /* This flag is used only for fusion adapter.
260 * Wait for Interrupt for Polled mode DCMD
90dc9d98 261 */
4026e9aa 262 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 263 return;
c4a3e0a5 264
4026e9aa
SS
265 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
266
267 if (fusion) {
268 blk_tags = instance->max_scsi_cmds + cmd->index;
269 cmd_fusion = fusion->cmd_list[blk_tags];
270 megasas_return_cmd_fusion(instance, cmd_fusion);
271 }
c4a3e0a5 272 cmd->scmd = NULL;
9c915a8c 273 cmd->frame_count = 0;
4026e9aa
SS
274 cmd->flags = 0;
275 if (!fusion && reset_devices)
e5f93a36 276 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 277 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 278
90dc9d98 279 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 280
4026e9aa 281}
1341c939 282
714f5177 283static const char *
284format_timestamp(uint32_t timestamp)
285{
286 static char buffer[32];
287
288 if ((timestamp & 0xff000000) == 0xff000000)
289 snprintf(buffer, sizeof(buffer), "boot + %us", timestamp &
290 0x00ffffff);
291 else
292 snprintf(buffer, sizeof(buffer), "%us", timestamp);
293 return buffer;
294}
295
296static const char *
297format_class(int8_t class)
298{
299 static char buffer[6];
300
301 switch (class) {
302 case MFI_EVT_CLASS_DEBUG:
303 return "debug";
304 case MFI_EVT_CLASS_PROGRESS:
305 return "progress";
306 case MFI_EVT_CLASS_INFO:
307 return "info";
308 case MFI_EVT_CLASS_WARNING:
309 return "WARN";
310 case MFI_EVT_CLASS_CRITICAL:
311 return "CRIT";
312 case MFI_EVT_CLASS_FATAL:
313 return "FATAL";
314 case MFI_EVT_CLASS_DEAD:
315 return "DEAD";
316 default:
317 snprintf(buffer, sizeof(buffer), "%d", class);
318 return buffer;
319 }
320}
321
322/**
323 * megasas_decode_evt: Decode FW AEN event and print critical event
324 * for information.
325 * @instance: Adapter soft state
326 */
327static void
328megasas_decode_evt(struct megasas_instance *instance)
329{
330 struct megasas_evt_detail *evt_detail = instance->evt_detail;
331 union megasas_evt_class_locale class_locale;
332 class_locale.word = le32_to_cpu(evt_detail->cl.word);
333
334 if (class_locale.members.class >= MFI_EVT_CLASS_CRITICAL)
335 dev_info(&instance->pdev->dev, "%d (%s/0x%04x/%s) - %s\n",
336 le32_to_cpu(evt_detail->seq_num),
337 format_timestamp(le32_to_cpu(evt_detail->time_stamp)),
338 (class_locale.members.locale),
339 format_class(class_locale.members.class),
340 evt_detail->description);
341}
342
1341c939 343/**
0d49016b 344* The following functions are defined for xscale
1341c939
SP
345* (deviceid : 1064R, PERC5) controllers
346*/
347
c4a3e0a5 348/**
1341c939 349 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS
350 * @regs: MFI register set
351 */
352static inline void
d46a3ad6 353megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 354{
d46a3ad6 355 struct megasas_register_set __iomem *regs;
da0dc9fb 356
d46a3ad6 357 regs = instance->reg_set;
39a98554 358 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS
359
360 /* Dummy readl to force pci flush */
361 readl(&regs->outbound_intr_mask);
362}
363
b274cab7
SP
364/**
365 * megasas_disable_intr_xscale -Disables interrupt
366 * @regs: MFI register set
367 */
368static inline void
d46a3ad6 369megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 370{
d46a3ad6 371 struct megasas_register_set __iomem *regs;
b274cab7 372 u32 mask = 0x1f;
da0dc9fb 373
d46a3ad6 374 regs = instance->reg_set;
b274cab7
SP
375 writel(mask, &regs->outbound_intr_mask);
376 /* Dummy readl to force pci flush */
377 readl(&regs->outbound_intr_mask);
378}
379
1341c939
SP
380/**
381 * megasas_read_fw_status_reg_xscale - returns the current FW status value
382 * @regs: MFI register set
383 */
384static u32
385megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
386{
387 return readl(&(regs)->outbound_msg_0);
388}
389/**
390 * megasas_clear_interrupt_xscale - Check & clear interrupt
391 * @regs: MFI register set
392 */
0d49016b 393static int
1341c939
SP
394megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
395{
396 u32 status;
39a98554 397 u32 mfiStatus = 0;
da0dc9fb 398
1341c939
SP
399 /*
400 * Check if it is our interrupt
401 */
402 status = readl(&regs->outbound_intr_status);
403
39a98554 404 if (status & MFI_OB_INTR_STATUS_MASK)
405 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
406 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
407 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP
408
409 /*
410 * Clear the interrupt by writing back the same value
411 */
39a98554 412 if (mfiStatus)
413 writel(status, &regs->outbound_intr_status);
1341c939 414
06f579de
YB
415 /* Dummy readl to force pci flush */
416 readl(&regs->outbound_intr_status);
417
39a98554 418 return mfiStatus;
1341c939
SP
419}
420
421/**
422 * megasas_fire_cmd_xscale - Sends command to the FW
423 * @frame_phys_addr : Physical address of cmd
424 * @frame_count : Number of frames for the command
425 * @regs : MFI register set
426 */
0d49016b 427static inline void
0c79e681
YB
428megasas_fire_cmd_xscale(struct megasas_instance *instance,
429 dma_addr_t frame_phys_addr,
430 u32 frame_count,
431 struct megasas_register_set __iomem *regs)
1341c939 432{
39a98554 433 unsigned long flags;
da0dc9fb 434
39a98554 435 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP
436 writel((frame_phys_addr >> 3)|(frame_count),
437 &(regs)->inbound_queue_port);
39a98554 438 spin_unlock_irqrestore(&instance->hba_lock, flags);
439}
440
441/**
442 * megasas_adp_reset_xscale - For controller reset
443 * @regs: MFI register set
444 */
445static int
446megasas_adp_reset_xscale(struct megasas_instance *instance,
447 struct megasas_register_set __iomem *regs)
448{
449 u32 i;
450 u32 pcidata;
da0dc9fb 451
39a98554 452 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
453
454 for (i = 0; i < 3; i++)
455 msleep(1000); /* sleep for 3 secs */
456 pcidata = 0;
457 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 458 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 459 if (pcidata & 0x2) {
1be18254 460 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 461 pcidata &= ~0x2;
462 pci_write_config_dword(instance->pdev,
463 MFI_1068_PCSR_OFFSET, pcidata);
464
465 for (i = 0; i < 2; i++)
466 msleep(1000); /* need to wait 2 secs again */
467
468 pcidata = 0;
469 pci_read_config_dword(instance->pdev,
470 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 471 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 472 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 473 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 474 pcidata = 0;
475 pci_write_config_dword(instance->pdev,
476 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
477 }
478 }
479 return 0;
480}
481
482/**
483 * megasas_check_reset_xscale - For controller reset check
484 * @regs: MFI register set
485 */
486static int
487megasas_check_reset_xscale(struct megasas_instance *instance,
488 struct megasas_register_set __iomem *regs)
489{
8a01a41d 490 if ((atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS
491 (le32_to_cpu(*instance->consumer) ==
492 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 493 return 1;
39a98554 494 return 0;
1341c939
SP
495}
496
497static struct megasas_instance_template megasas_instance_template_xscale = {
498
499 .fire_cmd = megasas_fire_cmd_xscale,
500 .enable_intr = megasas_enable_intr_xscale,
b274cab7 501 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP
502 .clear_intr = megasas_clear_intr_xscale,
503 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 504 .adp_reset = megasas_adp_reset_xscale,
505 .check_reset = megasas_check_reset_xscale,
cd50ba8e 506 .service_isr = megasas_isr,
507 .tasklet = megasas_complete_cmd_dpc,
508 .init_adapter = megasas_init_adapter_mfi,
509 .build_and_issue_cmd = megasas_build_and_issue_cmd,
510 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP
511};
512
513/**
0d49016b 514* This is the end of set of functions & definitions specific
1341c939
SP
515* to xscale (deviceid : 1064R, PERC5) controllers
516*/
517
f9876f0b 518/**
0d49016b 519* The following functions are defined for ppc (deviceid : 0x60)
da0dc9fb 520* controllers
f9876f0b
SP
521*/
522
523/**
524 * megasas_enable_intr_ppc - Enables interrupts
525 * @regs: MFI register set
526 */
527static inline void
d46a3ad6 528megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 529{
d46a3ad6 530 struct megasas_register_set __iomem *regs;
da0dc9fb 531
d46a3ad6 532 regs = instance->reg_set;
f9876f0b 533 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 534
39a98554 535 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP
536
537 /* Dummy readl to force pci flush */
538 readl(&regs->outbound_intr_mask);
539}
540
b274cab7
SP
541/**
542 * megasas_disable_intr_ppc - Disable interrupt
543 * @regs: MFI register set
544 */
545static inline void
d46a3ad6 546megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 547{
d46a3ad6 548 struct megasas_register_set __iomem *regs;
b274cab7 549 u32 mask = 0xFFFFFFFF;
da0dc9fb 550
d46a3ad6 551 regs = instance->reg_set;
b274cab7
SP
552 writel(mask, &regs->outbound_intr_mask);
553 /* Dummy readl to force pci flush */
554 readl(&regs->outbound_intr_mask);
555}
556
f9876f0b
SP
557/**
558 * megasas_read_fw_status_reg_ppc - returns the current FW status value
559 * @regs: MFI register set
560 */
561static u32
562megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
563{
564 return readl(&(regs)->outbound_scratch_pad);
565}
566
567/**
568 * megasas_clear_interrupt_ppc - Check & clear interrupt
569 * @regs: MFI register set
570 */
0d49016b 571static int
f9876f0b
SP
572megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
573{
3cc6851f 574 u32 status, mfiStatus = 0;
575
f9876f0b
SP
576 /*
577 * Check if it is our interrupt
578 */
579 status = readl(&regs->outbound_intr_status);
580
3cc6851f 581 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
582 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
583
584 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
585 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP
586
587 /*
588 * Clear the interrupt by writing back the same value
589 */
590 writel(status, &regs->outbound_doorbell_clear);
591
06f579de
YB
592 /* Dummy readl to force pci flush */
593 readl(&regs->outbound_doorbell_clear);
594
3cc6851f 595 return mfiStatus;
f9876f0b 596}
3cc6851f 597
f9876f0b
SP
598/**
599 * megasas_fire_cmd_ppc - Sends command to the FW
600 * @frame_phys_addr : Physical address of cmd
601 * @frame_count : Number of frames for the command
602 * @regs : MFI register set
603 */
0d49016b 604static inline void
0c79e681
YB
605megasas_fire_cmd_ppc(struct megasas_instance *instance,
606 dma_addr_t frame_phys_addr,
607 u32 frame_count,
608 struct megasas_register_set __iomem *regs)
f9876f0b 609{
39a98554 610 unsigned long flags;
da0dc9fb 611
39a98554 612 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 613 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 614 &(regs)->inbound_queue_port);
39a98554 615 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP
616}
617
39a98554 618/**
619 * megasas_check_reset_ppc - For controller reset check
620 * @regs: MFI register set
621 */
622static int
623megasas_check_reset_ppc(struct megasas_instance *instance,
624 struct megasas_register_set __iomem *regs)
625{
8a01a41d 626 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f 627 return 1;
628
39a98554 629 return 0;
630}
3cc6851f 631
f9876f0b 632static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 633
f9876f0b
SP
634 .fire_cmd = megasas_fire_cmd_ppc,
635 .enable_intr = megasas_enable_intr_ppc,
b274cab7 636 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP
637 .clear_intr = megasas_clear_intr_ppc,
638 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 639 .adp_reset = megasas_adp_reset_xscale,
39a98554 640 .check_reset = megasas_check_reset_ppc,
cd50ba8e 641 .service_isr = megasas_isr,
642 .tasklet = megasas_complete_cmd_dpc,
643 .init_adapter = megasas_init_adapter_mfi,
644 .build_and_issue_cmd = megasas_build_and_issue_cmd,
645 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP
646};
647
87911122
YB
648/**
649 * megasas_enable_intr_skinny - Enables interrupts
650 * @regs: MFI register set
651 */
652static inline void
d46a3ad6 653megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 654{
d46a3ad6 655 struct megasas_register_set __iomem *regs;
da0dc9fb 656
d46a3ad6 657 regs = instance->reg_set;
87911122
YB
658 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
659
660 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
661
662 /* Dummy readl to force pci flush */
663 readl(&regs->outbound_intr_mask);
664}
665
666/**
667 * megasas_disable_intr_skinny - Disables interrupt
668 * @regs: MFI register set
669 */
670static inline void
d46a3ad6 671megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 672{
d46a3ad6 673 struct megasas_register_set __iomem *regs;
87911122 674 u32 mask = 0xFFFFFFFF;
da0dc9fb 675
d46a3ad6 676 regs = instance->reg_set;
87911122
YB
677 writel(mask, &regs->outbound_intr_mask);
678 /* Dummy readl to force pci flush */
679 readl(&regs->outbound_intr_mask);
680}
681
682/**
683 * megasas_read_fw_status_reg_skinny - returns the current FW status value
684 * @regs: MFI register set
685 */
686static u32
687megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
688{
689 return readl(&(regs)->outbound_scratch_pad);
690}
691
692/**
693 * megasas_clear_interrupt_skinny - Check & clear interrupt
694 * @regs: MFI register set
695 */
696static int
697megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
698{
699 u32 status;
ebf054b0 700 u32 mfiStatus = 0;
701
87911122
YB
702 /*
703 * Check if it is our interrupt
704 */
705 status = readl(&regs->outbound_intr_status);
706
707 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 708 return 0;
87911122
YB
709 }
710
ebf054b0 711 /*
712 * Check if it is our interrupt
713 */
a3fda7dd 714 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0 715 MFI_STATE_FAULT) {
716 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
717 } else
718 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
719
87911122
YB
720 /*
721 * Clear the interrupt by writing back the same value
722 */
723 writel(status, &regs->outbound_intr_status);
724
725 /*
da0dc9fb
BH
726 * dummy read to flush PCI
727 */
87911122
YB
728 readl(&regs->outbound_intr_status);
729
ebf054b0 730 return mfiStatus;
87911122
YB
731}
732
733/**
734 * megasas_fire_cmd_skinny - Sends command to the FW
735 * @frame_phys_addr : Physical address of cmd
736 * @frame_count : Number of frames for the command
737 * @regs : MFI register set
738 */
739static inline void
0c79e681
YB
740megasas_fire_cmd_skinny(struct megasas_instance *instance,
741 dma_addr_t frame_phys_addr,
742 u32 frame_count,
87911122
YB
743 struct megasas_register_set __iomem *regs)
744{
0c79e681 745 unsigned long flags;
da0dc9fb 746
39a98554 747 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS
748 writel(upper_32_bits(frame_phys_addr),
749 &(regs)->inbound_high_queue_port);
750 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
751 &(regs)->inbound_low_queue_port);
b99dbe56 752 mmiowb();
39a98554 753 spin_unlock_irqrestore(&instance->hba_lock, flags);
754}
755
39a98554 756/**
757 * megasas_check_reset_skinny - For controller reset check
758 * @regs: MFI register set
759 */
760static int
761megasas_check_reset_skinny(struct megasas_instance *instance,
762 struct megasas_register_set __iomem *regs)
763{
8a01a41d 764 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f 765 return 1;
766
39a98554 767 return 0;
87911122
YB
768}
769
770static struct megasas_instance_template megasas_instance_template_skinny = {
771
772 .fire_cmd = megasas_fire_cmd_skinny,
773 .enable_intr = megasas_enable_intr_skinny,
774 .disable_intr = megasas_disable_intr_skinny,
775 .clear_intr = megasas_clear_intr_skinny,
776 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 777 .adp_reset = megasas_adp_reset_gen2,
39a98554 778 .check_reset = megasas_check_reset_skinny,
cd50ba8e 779 .service_isr = megasas_isr,
780 .tasklet = megasas_complete_cmd_dpc,
781 .init_adapter = megasas_init_adapter_mfi,
782 .build_and_issue_cmd = megasas_build_and_issue_cmd,
783 .issue_dcmd = megasas_issue_dcmd,
87911122
YB
784};
785
786
6610a6b3
YB
787/**
788* The following functions are defined for gen2 (deviceid : 0x78 0x79)
789* controllers
790*/
791
792/**
793 * megasas_enable_intr_gen2 - Enables interrupts
794 * @regs: MFI register set
795 */
796static inline void
d46a3ad6 797megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 798{
d46a3ad6 799 struct megasas_register_set __iomem *regs;
da0dc9fb 800
d46a3ad6 801 regs = instance->reg_set;
6610a6b3
YB
802 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
803
804 /* write ~0x00000005 (4 & 1) to the intr mask*/
805 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
806
807 /* Dummy readl to force pci flush */
808 readl(&regs->outbound_intr_mask);
809}
810
811/**
812 * megasas_disable_intr_gen2 - Disables interrupt
813 * @regs: MFI register set
814 */
815static inline void
d46a3ad6 816megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 817{
d46a3ad6 818 struct megasas_register_set __iomem *regs;
6610a6b3 819 u32 mask = 0xFFFFFFFF;
da0dc9fb 820
d46a3ad6 821 regs = instance->reg_set;
6610a6b3
YB
822 writel(mask, &regs->outbound_intr_mask);
823 /* Dummy readl to force pci flush */
824 readl(&regs->outbound_intr_mask);
825}
826
827/**
828 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
829 * @regs: MFI register set
830 */
831static u32
832megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
833{
834 return readl(&(regs)->outbound_scratch_pad);
835}
836
837/**
838 * megasas_clear_interrupt_gen2 - Check & clear interrupt
839 * @regs: MFI register set
840 */
841static int
842megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
843{
844 u32 status;
39a98554 845 u32 mfiStatus = 0;
da0dc9fb 846
6610a6b3
YB
847 /*
848 * Check if it is our interrupt
849 */
850 status = readl(&regs->outbound_intr_status);
851
b5bccadd 852 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 853 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
854 }
855 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
856 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
857 }
6610a6b3
YB
858
859 /*
860 * Clear the interrupt by writing back the same value
861 */
39a98554 862 if (mfiStatus)
863 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB
864
865 /* Dummy readl to force pci flush */
866 readl(&regs->outbound_intr_status);
867
39a98554 868 return mfiStatus;
6610a6b3
YB
869}
870/**
871 * megasas_fire_cmd_gen2 - Sends command to the FW
872 * @frame_phys_addr : Physical address of cmd
873 * @frame_count : Number of frames for the command
874 * @regs : MFI register set
875 */
876static inline void
0c79e681
YB
877megasas_fire_cmd_gen2(struct megasas_instance *instance,
878 dma_addr_t frame_phys_addr,
879 u32 frame_count,
6610a6b3
YB
880 struct megasas_register_set __iomem *regs)
881{
39a98554 882 unsigned long flags;
da0dc9fb 883
39a98554 884 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB
885 writel((frame_phys_addr | (frame_count<<1))|1,
886 &(regs)->inbound_queue_port);
39a98554 887 spin_unlock_irqrestore(&instance->hba_lock, flags);
888}
889
890/**
891 * megasas_adp_reset_gen2 - For controller reset
892 * @regs: MFI register set
893 */
894static int
895megasas_adp_reset_gen2(struct megasas_instance *instance,
896 struct megasas_register_set __iomem *reg_set)
897{
da0dc9fb
BH
898 u32 retry = 0 ;
899 u32 HostDiag;
900 u32 __iomem *seq_offset = &reg_set->seq_offset;
901 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0 902
903 if (instance->instancet == &megasas_instance_template_skinny) {
904 seq_offset = &reg_set->fusion_seq_offset;
905 hostdiag_offset = &reg_set->fusion_host_diag;
906 }
907
908 writel(0, seq_offset);
909 writel(4, seq_offset);
910 writel(0xb, seq_offset);
911 writel(2, seq_offset);
912 writel(7, seq_offset);
913 writel(0xd, seq_offset);
39a98554 914
39a98554 915 msleep(1000);
916
ebf054b0 917 HostDiag = (u32)readl(hostdiag_offset);
39a98554 918
da0dc9fb 919 while (!(HostDiag & DIAG_WRITE_ENABLE)) {
39a98554 920 msleep(100);
ebf054b0 921 HostDiag = (u32)readl(hostdiag_offset);
1be18254 922 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 923 retry, HostDiag);
924
925 if (retry++ >= 100)
926 return 1;
927
928 }
929
1be18254 930 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 931
ebf054b0 932 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 933
934 ssleep(10);
935
ebf054b0 936 HostDiag = (u32)readl(hostdiag_offset);
da0dc9fb 937 while (HostDiag & DIAG_RESET_ADAPTER) {
39a98554 938 msleep(100);
ebf054b0 939 HostDiag = (u32)readl(hostdiag_offset);
1be18254 940 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 941 retry, HostDiag);
942
943 if (retry++ >= 1000)
944 return 1;
945
946 }
947 return 0;
948}
949
950/**
951 * megasas_check_reset_gen2 - For controller reset check
952 * @regs: MFI register set
953 */
954static int
955megasas_check_reset_gen2(struct megasas_instance *instance,
956 struct megasas_register_set __iomem *regs)
957{
8a01a41d 958 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
707e09bd 959 return 1;
707e09bd 960
39a98554 961 return 0;
6610a6b3
YB
962}
963
964static struct megasas_instance_template megasas_instance_template_gen2 = {
965
966 .fire_cmd = megasas_fire_cmd_gen2,
967 .enable_intr = megasas_enable_intr_gen2,
968 .disable_intr = megasas_disable_intr_gen2,
969 .clear_intr = megasas_clear_intr_gen2,
970 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 971 .adp_reset = megasas_adp_reset_gen2,
972 .check_reset = megasas_check_reset_gen2,
cd50ba8e 973 .service_isr = megasas_isr,
974 .tasklet = megasas_complete_cmd_dpc,
975 .init_adapter = megasas_init_adapter_mfi,
976 .build_and_issue_cmd = megasas_build_and_issue_cmd,
977 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB
978};
979
f9876f0b
SP
980/**
981* This is the end of set of functions & definitions
39a98554 982* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP
983*/
984
9c915a8c 985/*
986 * Template added for TB (Fusion)
987 */
988extern struct megasas_instance_template megasas_instance_template_fusion;
989
c4a3e0a5
BS
990/**
991 * megasas_issue_polled - Issues a polling command
992 * @instance: Adapter soft state
0d49016b 993 * @cmd: Command packet to be issued
c4a3e0a5 994 *
2be2a988 995 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 996 */
9c915a8c 997int
c4a3e0a5
BS
998megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
999{
c4a3e0a5
BS
1000 struct megasas_header *frame_hdr = &cmd->frame->hdr;
1001
6d40afbc 1002 frame_hdr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd 1003 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5 1004
8a01a41d 1005 if ((atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) ||
6d40afbc
SS
1006 (instance->instancet->issue_dcmd(instance, cmd))) {
1007 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1008 __func__, __LINE__);
1009 return DCMD_NOT_FIRED;
1010 }
c4a3e0a5 1011
6d40afbc
SS
1012 return wait_and_poll(instance, cmd, instance->requestorId ?
1013 MEGASAS_ROUTINE_WAIT_TIME_VF : MFI_IO_TIMEOUT_SECS);
c4a3e0a5
BS
1014}
1015
1016/**
1017 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
1018 * @instance: Adapter soft state
1019 * @cmd: Command to be issued
cfbe7554 1020 * @timeout: Timeout in seconds
c4a3e0a5
BS
1021 *
1022 * This function waits on an event for the command to be returned from ISR.
2a3681e5 1023 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS
1024 * Used to issue ioctl commands.
1025 */
90dc9d98 1026int
c4a3e0a5 1027megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 1028 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 1029{
cfbe7554 1030 int ret = 0;
2be2a988 1031 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1032
8a01a41d 1033 if ((atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) ||
6d40afbc
SS
1034 (instance->instancet->issue_dcmd(instance, cmd))) {
1035 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1036 __func__, __LINE__);
1037 return DCMD_NOT_FIRED;
1038 }
1039
cfbe7554
SS
1040 if (timeout) {
1041 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 1042 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
6d40afbc
SS
1043 if (!ret) {
1044 dev_err(&instance->pdev->dev, "Failed from %s %d DCMD Timed out\n",
1045 __func__, __LINE__);
1046 return DCMD_TIMEOUT;
1047 }
cfbe7554
SS
1048 } else
1049 wait_event(instance->int_cmd_wait_q,
2be2a988 1050 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 1051
2be2a988 1052 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
6d40afbc 1053 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS
1054}
1055
1056/**
1057 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
1058 * @instance: Adapter soft state
1059 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 1060 * @timeout: Timeout in seconds
c4a3e0a5 1061 *
cfbe7554 1062 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 1063 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP
1064 * cmd and waits for return status.
1065 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS
1066 */
1067static int
1068megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 1069 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS
1070{
1071 struct megasas_cmd *cmd;
1072 struct megasas_abort_frame *abort_fr;
cfbe7554 1073 int ret = 0;
c4a3e0a5
BS
1074
1075 cmd = megasas_get_cmd(instance);
1076
1077 if (!cmd)
1078 return -1;
1079
1080 abort_fr = &cmd->frame->abort;
1081
1082 /*
1083 * Prepare and issue the abort frame
1084 */
1085 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 1086 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS
1087 abort_fr->flags = cpu_to_le16(0);
1088 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
1089 abort_fr->abort_mfi_phys_addr_lo =
1090 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
1091 abort_fr->abort_mfi_phys_addr_hi =
1092 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS
1093
1094 cmd->sync_cmd = 1;
2be2a988 1095 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1096
8a01a41d 1097 if ((atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) ||
6d40afbc
SS
1098 (instance->instancet->issue_dcmd(instance, cmd))) {
1099 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1100 __func__, __LINE__);
1101 return DCMD_NOT_FIRED;
1102 }
c4a3e0a5 1103
cfbe7554
SS
1104 if (timeout) {
1105 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1106 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554 1107 if (!ret) {
6d40afbc
SS
1108 dev_err(&instance->pdev->dev, "Failed from %s %d Abort Timed out\n",
1109 __func__, __LINE__);
1110 return DCMD_TIMEOUT;
cfbe7554
SS
1111 }
1112 } else
1113 wait_event(instance->abort_cmd_wait_q,
2be2a988 1114 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1115
39a98554 1116 cmd->sync_cmd = 0;
c4a3e0a5
BS
1117
1118 megasas_return_cmd(instance, cmd);
6d40afbc
SS
1119 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
1120 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS
1121}
1122
1123/**
1124 * megasas_make_sgl32 - Prepares 32-bit SGL
1125 * @instance: Adapter soft state
1126 * @scp: SCSI command from the mid-layer
1127 * @mfi_sgl: SGL to be filled in
1128 *
1129 * If successful, this function returns the number of SG elements. Otherwise,
1130 * it returnes -1.
1131 */
858119e1 1132static int
c4a3e0a5
BS
1133megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1134 union megasas_sgl *mfi_sgl)
1135{
1136 int i;
1137 int sge_count;
1138 struct scatterlist *os_sgl;
1139
155d98f0
FT
1140 sge_count = scsi_dma_map(scp);
1141 BUG_ON(sge_count < 0);
c4a3e0a5 1142
155d98f0
FT
1143 if (sge_count) {
1144 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS
1145 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1146 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1147 }
c4a3e0a5 1148 }
c4a3e0a5
BS
1149 return sge_count;
1150}
1151
1152/**
1153 * megasas_make_sgl64 - Prepares 64-bit SGL
1154 * @instance: Adapter soft state
1155 * @scp: SCSI command from the mid-layer
1156 * @mfi_sgl: SGL to be filled in
1157 *
1158 * If successful, this function returns the number of SG elements. Otherwise,
1159 * it returnes -1.
1160 */
858119e1 1161static int
c4a3e0a5
BS
1162megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1163 union megasas_sgl *mfi_sgl)
1164{
1165 int i;
1166 int sge_count;
1167 struct scatterlist *os_sgl;
1168
155d98f0
FT
1169 sge_count = scsi_dma_map(scp);
1170 BUG_ON(sge_count < 0);
c4a3e0a5 1171
155d98f0
FT
1172 if (sge_count) {
1173 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS
1174 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1175 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1176 }
c4a3e0a5 1177 }
c4a3e0a5
BS
1178 return sge_count;
1179}
1180
f4c9a131
YB
1181/**
1182 * megasas_make_sgl_skinny - Prepares IEEE SGL
1183 * @instance: Adapter soft state
1184 * @scp: SCSI command from the mid-layer
1185 * @mfi_sgl: SGL to be filled in
1186 *
1187 * If successful, this function returns the number of SG elements. Otherwise,
1188 * it returnes -1.
1189 */
1190static int
1191megasas_make_sgl_skinny(struct megasas_instance *instance,
1192 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1193{
1194 int i;
1195 int sge_count;
1196 struct scatterlist *os_sgl;
1197
1198 sge_count = scsi_dma_map(scp);
1199
1200 if (sge_count) {
1201 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS
1202 mfi_sgl->sge_skinny[i].length =
1203 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1204 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS
1205 cpu_to_le64(sg_dma_address(os_sgl));
1206 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB
1207 }
1208 }
1209 return sge_count;
1210}
1211
b1df99d9
SP
1212 /**
1213 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1214 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP
1215 * @sge_count : number of sg elements
1216 *
1217 * Returns the number of frames required for numnber of sge's (sge_count)
1218 */
1219
f4c9a131
YB
1220static u32 megasas_get_frame_count(struct megasas_instance *instance,
1221 u8 sge_count, u8 frame_type)
b1df99d9
SP
1222{
1223 int num_cnt;
1224 int sge_bytes;
1225 u32 sge_sz;
da0dc9fb 1226 u32 frame_count = 0;
b1df99d9
SP
1227
1228 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1229 sizeof(struct megasas_sge32);
1230
f4c9a131
YB
1231 if (instance->flag_ieee) {
1232 sge_sz = sizeof(struct megasas_sge_skinny);
1233 }
1234
b1df99d9 1235 /*
d532dbe2 1236 * Main frame can contain 2 SGEs for 64-bit SGLs and
1237 * 3 SGEs for 32-bit SGLs for ldio &
1238 * 1 SGEs for 64-bit SGLs and
1239 * 2 SGEs for 32-bit SGLs for pthru frame
1240 */
1241 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB
1242 if (instance->flag_ieee == 1) {
1243 num_cnt = sge_count - 1;
1244 } else if (IS_DMA64)
d532dbe2 1245 num_cnt = sge_count - 1;
1246 else
1247 num_cnt = sge_count - 2;
1248 } else {
f4c9a131
YB
1249 if (instance->flag_ieee == 1) {
1250 num_cnt = sge_count - 1;
1251 } else if (IS_DMA64)
d532dbe2 1252 num_cnt = sge_count - 2;
1253 else
1254 num_cnt = sge_count - 3;
1255 }
b1df99d9 1256
da0dc9fb 1257 if (num_cnt > 0) {
b1df99d9
SP
1258 sge_bytes = sge_sz * num_cnt;
1259
1260 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1261 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1262 }
1263 /* Main frame */
da0dc9fb 1264 frame_count += 1;
b1df99d9
SP
1265
1266 if (frame_count > 7)
1267 frame_count = 8;
1268 return frame_count;
1269}
1270
c4a3e0a5
BS
1271/**
1272 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1273 * @instance: Adapter soft state
1274 * @scp: SCSI command
1275 * @cmd: Command to be prepared in
1276 *
1277 * This function prepares CDB commands. These are typcially pass-through
1278 * commands to the devices.
1279 */
858119e1 1280static int
c4a3e0a5
BS
1281megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1282 struct megasas_cmd *cmd)
1283{
c4a3e0a5
BS
1284 u32 is_logical;
1285 u32 device_id;
1286 u16 flags = 0;
1287 struct megasas_pthru_frame *pthru;
1288
1289 is_logical = MEGASAS_IS_LOGICAL(scp);
4a5c814d 1290 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS
1291 pthru = (struct megasas_pthru_frame *)cmd->frame;
1292
1293 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1294 flags = MFI_FRAME_DIR_WRITE;
1295 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1296 flags = MFI_FRAME_DIR_READ;
1297 else if (scp->sc_data_direction == PCI_DMA_NONE)
1298 flags = MFI_FRAME_DIR_NONE;
1299
f4c9a131
YB
1300 if (instance->flag_ieee == 1) {
1301 flags |= MFI_FRAME_IEEE;
1302 }
1303
c4a3e0a5
BS
1304 /*
1305 * Prepare the DCDB frame
1306 */
1307 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1308 pthru->cmd_status = 0x0;
1309 pthru->scsi_status = 0x0;
1310 pthru->target_id = device_id;
1311 pthru->lun = scp->device->lun;
1312 pthru->cdb_len = scp->cmd_len;
1313 pthru->timeout = 0;
780a3762 1314 pthru->pad_0 = 0;
94cd65dd
SS
1315 pthru->flags = cpu_to_le16(flags);
1316 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS
1317
1318 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1319
8d568253 1320 /*
da0dc9fb
BH
1321 * If the command is for the tape device, set the
1322 * pthru timeout to the os layer timeout value.
1323 */
8d568253
YB
1324 if (scp->device->type == TYPE_TAPE) {
1325 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1326 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1327 else
94cd65dd 1328 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB
1329 }
1330
c4a3e0a5
BS
1331 /*
1332 * Construct SGL
1333 */
f4c9a131 1334 if (instance->flag_ieee == 1) {
94cd65dd 1335 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB
1336 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1337 &pthru->sgl);
1338 } else if (IS_DMA64) {
94cd65dd 1339 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS
1340 pthru->sge_count = megasas_make_sgl64(instance, scp,
1341 &pthru->sgl);
1342 } else
1343 pthru->sge_count = megasas_make_sgl32(instance, scp,
1344 &pthru->sgl);
1345
bdc6fb8d 1346 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1347 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB
1348 pthru->sge_count);
1349 return 0;
1350 }
1351
c4a3e0a5
BS
1352 /*
1353 * Sense info specific
1354 */
1355 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS
1356 pthru->sense_buf_phys_addr_hi =
1357 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1358 pthru->sense_buf_phys_addr_lo =
1359 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1360
c4a3e0a5
BS
1361 /*
1362 * Compute the total number of frames this command consumes. FW uses
1363 * this number to pull sufficient number of frames from host memory.
1364 */
f4c9a131 1365 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1366 PTHRU_FRAME);
c4a3e0a5
BS
1367
1368 return cmd->frame_count;
1369}
1370
1371/**
1372 * megasas_build_ldio - Prepares IOs to logical devices
1373 * @instance: Adapter soft state
1374 * @scp: SCSI command
fd589a8f 1375 * @cmd: Command to be prepared
c4a3e0a5
BS
1376 *
1377 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1378 */
858119e1 1379static int
c4a3e0a5
BS
1380megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1381 struct megasas_cmd *cmd)
1382{
c4a3e0a5
BS
1383 u32 device_id;
1384 u8 sc = scp->cmnd[0];
1385 u16 flags = 0;
1386 struct megasas_io_frame *ldio;
1387
4a5c814d 1388 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS
1389 ldio = (struct megasas_io_frame *)cmd->frame;
1390
1391 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1392 flags = MFI_FRAME_DIR_WRITE;
1393 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1394 flags = MFI_FRAME_DIR_READ;
1395
f4c9a131
YB
1396 if (instance->flag_ieee == 1) {
1397 flags |= MFI_FRAME_IEEE;
1398 }
1399
c4a3e0a5 1400 /*
b1df99d9 1401 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS
1402 */
1403 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1404 ldio->cmd_status = 0x0;
1405 ldio->scsi_status = 0x0;
1406 ldio->target_id = device_id;
1407 ldio->timeout = 0;
1408 ldio->reserved_0 = 0;
1409 ldio->pad_0 = 0;
94cd65dd 1410 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS
1411 ldio->start_lba_hi = 0;
1412 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1413
1414 /*
1415 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1416 */
1417 if (scp->cmd_len == 6) {
94cd65dd
SS
1418 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1419 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1420 ((u32) scp->cmnd[2] << 8) |
1421 (u32) scp->cmnd[3]);
c4a3e0a5 1422
94cd65dd 1423 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS
1424 }
1425
1426 /*
1427 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1428 */
1429 else if (scp->cmd_len == 10) {
94cd65dd
SS
1430 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1431 ((u32) scp->cmnd[7] << 8));
1432 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1433 ((u32) scp->cmnd[3] << 16) |
1434 ((u32) scp->cmnd[4] << 8) |
1435 (u32) scp->cmnd[5]);
c4a3e0a5
BS
1436 }
1437
1438 /*
1439 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1440 */
1441 else if (scp->cmd_len == 12) {
94cd65dd
SS
1442 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1443 ((u32) scp->cmnd[7] << 16) |
1444 ((u32) scp->cmnd[8] << 8) |
1445 (u32) scp->cmnd[9]);
c4a3e0a5 1446
94cd65dd
SS
1447 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1448 ((u32) scp->cmnd[3] << 16) |
1449 ((u32) scp->cmnd[4] << 8) |
1450 (u32) scp->cmnd[5]);
c4a3e0a5
BS
1451 }
1452
1453 /*
1454 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1455 */
1456 else if (scp->cmd_len == 16) {
94cd65dd
SS
1457 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1458 ((u32) scp->cmnd[11] << 16) |
1459 ((u32) scp->cmnd[12] << 8) |
1460 (u32) scp->cmnd[13]);
c4a3e0a5 1461
94cd65dd
SS
1462 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1463 ((u32) scp->cmnd[7] << 16) |
1464 ((u32) scp->cmnd[8] << 8) |
1465 (u32) scp->cmnd[9]);
c4a3e0a5 1466
94cd65dd
SS
1467 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1468 ((u32) scp->cmnd[3] << 16) |
1469 ((u32) scp->cmnd[4] << 8) |
1470 (u32) scp->cmnd[5]);
c4a3e0a5
BS
1471
1472 }
1473
1474 /*
1475 * Construct SGL
1476 */
f4c9a131 1477 if (instance->flag_ieee) {
94cd65dd 1478 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB
1479 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1480 &ldio->sgl);
1481 } else if (IS_DMA64) {
94cd65dd 1482 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS
1483 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1484 } else
1485 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1486
bdc6fb8d 1487 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1488 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB
1489 ldio->sge_count);
1490 return 0;
1491 }
1492
c4a3e0a5
BS
1493 /*
1494 * Sense info specific
1495 */
1496 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1497 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1498 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1499
b1df99d9
SP
1500 /*
1501 * Compute the total number of frames this command consumes. FW uses
1502 * this number to pull sufficient number of frames from host memory.
1503 */
f4c9a131
YB
1504 cmd->frame_count = megasas_get_frame_count(instance,
1505 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS
1506
1507 return cmd->frame_count;
1508}
1509
1510/**
7497cde8
SS
1511 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1512 * and whether it's RW or non RW
cb59aa6a 1513 * @scmd: SCSI command
0d49016b 1514 *
c4a3e0a5 1515 */
7497cde8 1516inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1517{
7497cde8
SS
1518 int ret;
1519
cb59aa6a
SP
1520 switch (cmd->cmnd[0]) {
1521 case READ_10:
1522 case WRITE_10:
1523 case READ_12:
1524 case WRITE_12:
1525 case READ_6:
1526 case WRITE_6:
1527 case READ_16:
1528 case WRITE_16:
7497cde8
SS
1529 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1530 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1531 break;
cb59aa6a 1532 default:
7497cde8
SS
1533 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1534 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1535 }
7497cde8 1536 return ret;
c4a3e0a5
BS
1537}
1538
658dcedb
SP
1539 /**
1540 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
da0dc9fb 1541 * in FW
658dcedb
SP
1542 * @instance: Adapter soft state
1543 */
1544static inline void
1545megasas_dump_pending_frames(struct megasas_instance *instance)
1546{
1547 struct megasas_cmd *cmd;
1548 int i,n;
1549 union megasas_sgl *mfi_sgl;
1550 struct megasas_io_frame *ldio;
1551 struct megasas_pthru_frame *pthru;
1552 u32 sgcount;
1553 u32 max_cmd = instance->max_fw_cmds;
1554
1be18254
BH
1555 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1556 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1557 if (IS_DMA64)
1be18254 1558 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1559 else
1be18254 1560 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1561
1be18254 1562 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP
1563 for (i = 0; i < max_cmd; i++) {
1564 cmd = instance->cmd_list[i];
da0dc9fb 1565 if (!cmd->scmd)
658dcedb 1566 continue;
1be18254 1567 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1568 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP
1569 ldio = (struct megasas_io_frame *)cmd->frame;
1570 mfi_sgl = &ldio->sgl;
1571 sgcount = ldio->sge_count;
1be18254 1572 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS
1573 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1574 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1575 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1576 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
da0dc9fb 1577 } else {
658dcedb
SP
1578 pthru = (struct megasas_pthru_frame *) cmd->frame;
1579 mfi_sgl = &pthru->sgl;
1580 sgcount = pthru->sge_count;
1be18254 1581 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS
1582 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1583 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1584 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1585 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb 1586 }
da0dc9fb
BH
1587 if (megasas_dbg_lvl & MEGASAS_DBG_LVL) {
1588 for (n = 0; n < sgcount; n++) {
1589 if (IS_DMA64)
1590 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
1591 le32_to_cpu(mfi_sgl->sge64[n].length),
1592 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
1593 else
1594 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
1595 le32_to_cpu(mfi_sgl->sge32[n].length),
1596 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP
1597 }
1598 }
658dcedb 1599 } /*for max_cmd*/
1be18254 1600 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP
1601 for (i = 0; i < max_cmd; i++) {
1602
1603 cmd = instance->cmd_list[i];
1604
da0dc9fb 1605 if (cmd->sync_cmd == 1)
1be18254 1606 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb 1607 }
1be18254 1608 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP
1609}
1610
cd50ba8e 1611u32
1612megasas_build_and_issue_cmd(struct megasas_instance *instance,
1613 struct scsi_cmnd *scmd)
1614{
1615 struct megasas_cmd *cmd;
1616 u32 frame_count;
1617
1618 cmd = megasas_get_cmd(instance);
1619 if (!cmd)
1620 return SCSI_MLQUEUE_HOST_BUSY;
1621
1622 /*
1623 * Logical drive command
1624 */
7497cde8 1625 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e 1626 frame_count = megasas_build_ldio(instance, scmd, cmd);
1627 else
1628 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1629
1630 if (!frame_count)
1631 goto out_return_cmd;
1632
1633 cmd->scmd = scmd;
1634 scmd->SCp.ptr = (char *)cmd;
1635
1636 /*
1637 * Issue the command to the FW
1638 */
1639 atomic_inc(&instance->fw_outstanding);
1640
1641 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1642 cmd->frame_count-1, instance->reg_set);
cd50ba8e 1643
1644 return 0;
1645out_return_cmd:
1646 megasas_return_cmd(instance, cmd);
f9a9dee6 1647 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e 1648}
1649
1650
c4a3e0a5
BS
1651/**
1652 * megasas_queue_command - Queue entry point
1653 * @scmd: SCSI command to be queued
1654 * @done: Callback entry point
1655 */
1656static int
fb1a24ff 1657megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1658{
c4a3e0a5 1659 struct megasas_instance *instance;
18365b13 1660 struct MR_PRIV_DEVICE *mr_device_priv_data;
c4a3e0a5
BS
1661
1662 instance = (struct megasas_instance *)
1663 scmd->device->host->hostdata;
af37acfb 1664
aa00832b
SS
1665 if (instance->unload == 1) {
1666 scmd->result = DID_NO_CONNECT << 16;
1667 scmd->scsi_done(scmd);
1668 return 0;
1669 }
1670
39a98554 1671 if (instance->issuepend_done == 0)
af37acfb
SP
1672 return SCSI_MLQUEUE_HOST_BUSY;
1673
b09e66da 1674
229fe47c 1675 /* Check for an mpio path and adjust behavior */
8a01a41d 1676 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
229fe47c 1677 if (megasas_check_mpio_paths(instance, scmd) ==
1678 (DID_RESET << 16)) {
229fe47c 1679 return SCSI_MLQUEUE_HOST_BUSY;
1680 } else {
229fe47c 1681 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1682 scmd->scsi_done(scmd);
229fe47c 1683 return 0;
1684 }
1685 }
1686
8a01a41d 1687 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
229fe47c 1688 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1689 scmd->scsi_done(scmd);
b09e66da
SS
1690 return 0;
1691 }
1692
18365b13
SS
1693 mr_device_priv_data = scmd->device->hostdata;
1694 if (!mr_device_priv_data) {
18365b13
SS
1695 scmd->result = DID_NO_CONNECT << 16;
1696 scmd->scsi_done(scmd);
1697 return 0;
1698 }
1699
8a01a41d 1700 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
39a98554 1701 return SCSI_MLQUEUE_HOST_BUSY;
39a98554 1702
8a01a41d 1703 if (mr_device_priv_data->tm_busy)
18365b13 1704 return SCSI_MLQUEUE_DEVICE_BUSY;
18365b13 1705
39a98554 1706
c4a3e0a5
BS
1707 scmd->result = 0;
1708
cb59aa6a 1709 if (MEGASAS_IS_LOGICAL(scmd) &&
51087a86
SS
1710 (scmd->device->id >= instance->fw_supported_vd_count ||
1711 scmd->device->lun)) {
cb59aa6a
SP
1712 scmd->result = DID_BAD_TARGET << 16;
1713 goto out_done;
c4a3e0a5
BS
1714 }
1715
02b01e01
SP
1716 switch (scmd->cmnd[0]) {
1717 case SYNCHRONIZE_CACHE:
1718 /*
1719 * FW takes care of flush cache on its own
1720 * No need to send it down
1721 */
1722 scmd->result = DID_OK << 16;
1723 goto out_done;
1724 default:
1725 break;
1726 }
1727
f9a9dee6 1728 return instance->instancet->build_and_issue_cmd(instance, scmd);
cb59aa6a 1729
cb59aa6a 1730 out_done:
fb1a24ff 1731 scmd->scsi_done(scmd);
cb59aa6a 1732 return 0;
c4a3e0a5
BS
1733}
1734
044833b5
YB
1735static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1736{
1737 int i;
1738
1739 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1740
1741 if ((megasas_mgmt_info.instance[i]) &&
1742 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1743 return megasas_mgmt_info.instance[i];
1744 }
1745
1746 return NULL;
1747}
1748
0b48d12d 1749/*
18365b13 1750* megasas_update_sdev_properties - Update sdev structure based on controller's FW capabilities
0b48d12d 1751*
1752* @sdev: OS provided scsi device
1753*
1754* Returns void
1755*/
18365b13 1756void megasas_update_sdev_properties(struct scsi_device *sdev)
0b48d12d 1757{
18365b13 1758 u16 pd_index = 0;
0b48d12d 1759 u32 device_id, ld;
1760 struct megasas_instance *instance;
1761 struct fusion_context *fusion;
18365b13
SS
1762 struct MR_PRIV_DEVICE *mr_device_priv_data;
1763 struct MR_PD_CFG_SEQ_NUM_SYNC *pd_sync;
0b48d12d 1764 struct MR_LD_RAID *raid;
1765 struct MR_DRV_RAID_MAP_ALL *local_map_ptr;
1766
1767 instance = megasas_lookup_instance(sdev->host->host_no);
1768 fusion = instance->ctrl_context;
18365b13 1769 mr_device_priv_data = sdev->hostdata;
0b48d12d 1770
1771 if (!fusion)
1772 return;
1773
18365b13
SS
1774 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS &&
1775 instance->use_seqnum_jbod_fp) {
1776 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1777 sdev->id;
1778 pd_sync = (void *)fusion->pd_seq_sync
1779 [(instance->pd_seq_map_id - 1) & 1];
1780 mr_device_priv_data->is_tm_capable =
1781 pd_sync->seq[pd_index].capability.tmCapable;
1782 } else {
0b48d12d 1783 device_id = ((sdev->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL)
1784 + sdev->id;
1785 local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
1786 ld = MR_TargetIdToLdGet(device_id, local_map_ptr);
1787 raid = MR_LdRaidGet(ld, local_map_ptr);
1788
1789 if (raid->capability.ldPiMode == MR_PROT_INFO_TYPE_CONTROLLER)
18365b13
SS
1790 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1791 mr_device_priv_data->is_tm_capable =
1792 raid->capability.tmCapable;
0b48d12d 1793 }
1794}
1795
2216c305
SS
1796static void megasas_set_device_queue_depth(struct scsi_device *sdev)
1797{
1798 u16 pd_index = 0;
1799 int ret = DCMD_FAILED;
1800 struct megasas_instance *instance;
1801
1802 instance = megasas_lookup_instance(sdev->host->host_no);
1803
1804 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS) {
1805 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
1806
1807 if (instance->pd_info) {
1808 mutex_lock(&instance->hba_mutex);
1809 ret = megasas_get_pd_info(instance, pd_index);
1810 mutex_unlock(&instance->hba_mutex);
1811 }
1812
1813 if (ret != DCMD_SUCCESS)
1814 return;
1815
1816 if (instance->pd_list[pd_index].driveState == MR_PD_STATE_SYSTEM) {
1817
1818 switch (instance->pd_list[pd_index].interface) {
1819 case SAS_PD:
1820 scsi_change_queue_depth(sdev, MEGASAS_SAS_QD);
1821 break;
1822
1823 case SATA_PD:
1824 scsi_change_queue_depth(sdev, MEGASAS_SATA_QD);
1825 break;
1826
1827 default:
1828 scsi_change_queue_depth(sdev, MEGASAS_DEFAULT_PD_QD);
1829 }
1830 }
1831 }
1832}
1833
18365b13 1834
147aab6a
CH
1835static int megasas_slave_configure(struct scsi_device *sdev)
1836{
aed335ee
SS
1837 u16 pd_index = 0;
1838 struct megasas_instance *instance;
1839
1840 instance = megasas_lookup_instance(sdev->host->host_no);
1841 if (instance->allow_fw_scan) {
1842 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS &&
1843 sdev->type == TYPE_DISK) {
1844 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1845 sdev->id;
1846 if (instance->pd_list[pd_index].driveState !=
1847 MR_PD_STATE_SYSTEM)
1848 return -ENXIO;
1849 }
1850 }
2216c305 1851 megasas_set_device_queue_depth(sdev);
18365b13
SS
1852 megasas_update_sdev_properties(sdev);
1853
e5b3a65f 1854 /*
da0dc9fb
BH
1855 * The RAID firmware may require extended timeouts.
1856 */
044833b5 1857 blk_queue_rq_timeout(sdev->request_queue,
e3d178ca 1858 scmd_timeout * HZ);
07e38d94 1859
044833b5
YB
1860 return 0;
1861}
1862
1863static int megasas_slave_alloc(struct scsi_device *sdev)
1864{
da0dc9fb 1865 u16 pd_index = 0;
044833b5 1866 struct megasas_instance *instance ;
18365b13 1867 struct MR_PRIV_DEVICE *mr_device_priv_data;
da0dc9fb 1868
044833b5 1869 instance = megasas_lookup_instance(sdev->host->host_no);
07e38d94 1870 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS) {
044833b5
YB
1871 /*
1872 * Open the OS scan to the SYSTEM PD
1873 */
1874 pd_index =
1875 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1876 sdev->id;
aed335ee
SS
1877 if ((instance->allow_fw_scan || instance->pd_list[pd_index].driveState ==
1878 MR_PD_STATE_SYSTEM)) {
18365b13 1879 goto scan_target;
044833b5
YB
1880 }
1881 return -ENXIO;
1882 }
18365b13
SS
1883
1884scan_target:
1885 mr_device_priv_data = kzalloc(sizeof(*mr_device_priv_data),
1886 GFP_KERNEL);
1887 if (!mr_device_priv_data)
1888 return -ENOMEM;
1889 sdev->hostdata = mr_device_priv_data;
147aab6a
CH
1890 return 0;
1891}
1892
18365b13
SS
1893static void megasas_slave_destroy(struct scsi_device *sdev)
1894{
1895 kfree(sdev->hostdata);
1896 sdev->hostdata = NULL;
1897}
1898
c8dd61ef
SS
1899/*
1900* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
1901* kill adapter
1902* @instance: Adapter soft state
1903*
1904*/
6a6981fe 1905static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS
1906{
1907 int i;
1908 struct megasas_cmd *cmd_mfi;
1909 struct megasas_cmd_fusion *cmd_fusion;
1910 struct fusion_context *fusion = instance->ctrl_context;
1911
1912 /* Find all outstanding ioctls */
1913 if (fusion) {
1914 for (i = 0; i < instance->max_fw_cmds; i++) {
1915 cmd_fusion = fusion->cmd_list[i];
1916 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
1917 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
1918 if (cmd_mfi->sync_cmd &&
1919 cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)
1920 megasas_complete_cmd(instance,
1921 cmd_mfi, DID_OK);
1922 }
1923 }
1924 } else {
1925 for (i = 0; i < instance->max_fw_cmds; i++) {
1926 cmd_mfi = instance->cmd_list[i];
1927 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
1928 MFI_CMD_ABORT)
1929 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
1930 }
1931 }
1932}
1933
1934
9c915a8c 1935void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 1936{
c8dd61ef 1937 /* Set critical error to block I/O & ioctls in case caller didn't */
8a01a41d 1938 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
c8dd61ef
SS
1939 /* Wait 1 second to ensure IO or ioctls in build have posted */
1940 msleep(1000);
39a98554 1941 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef 1942 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 1943 (instance->ctrl_context)) {
da0dc9fb 1944 writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
229fe47c 1945 /* Flush */
1946 readl(&instance->reg_set->doorbell);
8f67c8c5 1947 if (instance->requestorId && instance->peerIsPresent)
229fe47c 1948 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 1949 } else {
c8dd61ef
SS
1950 writel(MFI_STOP_ADP,
1951 &instance->reg_set->inbound_doorbell);
9c915a8c 1952 }
c8dd61ef
SS
1953 /* Complete outstanding ioctls when adapter is killed */
1954 megasas_complete_outstanding_ioctls(instance);
9c915a8c 1955}
1956
1957 /**
1958 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
1959 * restored to max value
1960 * @instance: Adapter soft state
1961 *
1962 */
1963void
1964megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
1965{
1966 unsigned long flags;
ae09a6c1 1967
9c915a8c 1968 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9 1969 && time_after(jiffies, instance->last_time + 5 * HZ)
1970 && atomic_read(&instance->fw_outstanding) <
1971 instance->throttlequeuedepth + 1) {
9c915a8c 1972
1973 spin_lock_irqsave(instance->host->host_lock, flags);
1974 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 1975
308ec459 1976 instance->host->can_queue = instance->cur_can_queue;
9c915a8c 1977 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 1978 }
1979}
1980
7343eb65 1981/**
1982 * megasas_complete_cmd_dpc - Returns FW's controller structure
1983 * @instance_addr: Address of adapter soft state
1984 *
1985 * Tasklet to complete cmds
1986 */
1987static void megasas_complete_cmd_dpc(unsigned long instance_addr)
1988{
1989 u32 producer;
1990 u32 consumer;
1991 u32 context;
1992 struct megasas_cmd *cmd;
1993 struct megasas_instance *instance =
1994 (struct megasas_instance *)instance_addr;
1995 unsigned long flags;
1996
1997 /* If we have already declared adapter dead, donot complete cmds */
8a01a41d 1998 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
7343eb65 1999 return;
2000
2001 spin_lock_irqsave(&instance->completion_lock, flags);
2002
94cd65dd
SS
2003 producer = le32_to_cpu(*instance->producer);
2004 consumer = le32_to_cpu(*instance->consumer);
7343eb65 2005
2006 while (consumer != producer) {
94cd65dd 2007 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 2008 if (context >= instance->max_fw_cmds) {
1be18254 2009 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 2010 context);
2011 BUG();
2012 }
7343eb65 2013
2014 cmd = instance->cmd_list[context];
2015
2016 megasas_complete_cmd(instance, cmd, DID_OK);
2017
2018 consumer++;
2019 if (consumer == (instance->max_fw_cmds + 1)) {
2020 consumer = 0;
2021 }
2022 }
2023
94cd65dd 2024 *instance->consumer = cpu_to_le32(producer);
7343eb65 2025
2026 spin_unlock_irqrestore(&instance->completion_lock, flags);
2027
2028 /*
2029 * Check if we can restore can_queue
2030 */
9c915a8c 2031 megasas_check_and_restore_queue_depth(instance);
7343eb65 2032}
2033
229fe47c 2034/**
2035 * megasas_start_timer - Initializes a timer object
2036 * @instance: Adapter soft state
2037 * @timer: timer object to be initialized
2038 * @fn: timer function
2039 * @interval: time interval between timer function call
2040 *
2041 */
2042void megasas_start_timer(struct megasas_instance *instance,
2043 struct timer_list *timer,
2044 void *fn, unsigned long interval)
2045{
2046 init_timer(timer);
2047 timer->expires = jiffies + interval;
2048 timer->data = (unsigned long)instance;
2049 timer->function = fn;
2050 add_timer(timer);
2051}
2052
707e09bd
YB
2053static void
2054megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
2055
2056static void
2057process_fw_state_change_wq(struct work_struct *work);
2058
2059void megasas_do_ocr(struct megasas_instance *instance)
2060{
2061 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
2062 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
2063 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 2064 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 2065 }
d46a3ad6 2066 instance->instancet->disable_intr(instance);
8a01a41d 2067 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
707e09bd
YB
2068 instance->issuepend_done = 0;
2069
2070 atomic_set(&instance->fw_outstanding, 0);
2071 megasas_internal_reset_defer_cmds(instance);
2072 process_fw_state_change_wq(&instance->work_init);
2073}
2074
4cbfea88
AR
2075static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
2076 int initial)
229fe47c 2077{
2078 struct megasas_cmd *cmd;
2079 struct megasas_dcmd_frame *dcmd;
229fe47c 2080 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c 2081 dma_addr_t new_affiliation_111_h;
2082 int ld, retval = 0;
2083 u8 thisVf;
2084
2085 cmd = megasas_get_cmd(instance);
2086
2087 if (!cmd) {
1be18254
BH
2088 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
2089 "Failed to get cmd for scsi%d\n",
229fe47c 2090 instance->host->host_no);
2091 return -ENOMEM;
2092 }
2093
2094 dcmd = &cmd->frame->dcmd;
2095
4cbfea88 2096 if (!instance->vf_affiliation_111) {
1be18254
BH
2097 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2098 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c 2099 megasas_return_cmd(instance, cmd);
2100 return -ENOMEM;
2101 }
2102
2103 if (initial)
229fe47c 2104 memset(instance->vf_affiliation_111, 0,
2105 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2106 else {
4cbfea88
AR
2107 new_affiliation_111 =
2108 pci_alloc_consistent(instance->pdev,
2109 sizeof(struct MR_LD_VF_AFFILIATION_111),
2110 &new_affiliation_111_h);
2111 if (!new_affiliation_111) {
1be18254
BH
2112 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2113 "memory for new affiliation for scsi%d\n",
4cbfea88 2114 instance->host->host_no);
229fe47c 2115 megasas_return_cmd(instance, cmd);
2116 return -ENOMEM;
2117 }
4cbfea88
AR
2118 memset(new_affiliation_111, 0,
2119 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2120 }
2121
2122 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2123
2124 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2125 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2126 dcmd->sge_count = 1;
2213a467 2127 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c 2128 dcmd->timeout = 0;
2129 dcmd->pad_0 = 0;
2213a467
CH
2130 dcmd->data_xfer_len =
2131 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
2132 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 2133
4cbfea88
AR
2134 if (initial)
2135 dcmd->sgl.sge32[0].phys_addr =
2213a467 2136 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 2137 else
2213a467
CH
2138 dcmd->sgl.sge32[0].phys_addr =
2139 cpu_to_le32(new_affiliation_111_h);
4cbfea88 2140
2213a467
CH
2141 dcmd->sgl.sge32[0].length = cpu_to_le32(
2142 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2143
1be18254 2144 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c 2145 "scsi%d\n", instance->host->host_no);
2146
6d40afbc 2147 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH
2148 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2149 " failed with status 0x%x for scsi%d\n",
229fe47c 2150 dcmd->cmd_status, instance->host->host_no);
2151 retval = 1; /* Do a scan if we couldn't get affiliation */
2152 goto out;
2153 }
2154
2155 if (!initial) {
4cbfea88
AR
2156 thisVf = new_affiliation_111->thisVf;
2157 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
2158 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
2159 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH
2160 dev_warn(&instance->pdev->dev, "SR-IOV: "
2161 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 2162 instance->host->host_no);
4cbfea88
AR
2163 memcpy(instance->vf_affiliation_111,
2164 new_affiliation_111,
2165 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2166 retval = 1;
2167 goto out;
2168 }
4cbfea88
AR
2169 }
2170out:
2171 if (new_affiliation_111) {
2172 pci_free_consistent(instance->pdev,
2173 sizeof(struct MR_LD_VF_AFFILIATION_111),
2174 new_affiliation_111,
2175 new_affiliation_111_h);
2176 }
90dc9d98 2177
4026e9aa 2178 megasas_return_cmd(instance, cmd);
4cbfea88
AR
2179
2180 return retval;
2181}
2182
2183static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
2184 int initial)
2185{
2186 struct megasas_cmd *cmd;
2187 struct megasas_dcmd_frame *dcmd;
2188 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
2189 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
2190 dma_addr_t new_affiliation_h;
2191 int i, j, retval = 0, found = 0, doscan = 0;
2192 u8 thisVf;
2193
2194 cmd = megasas_get_cmd(instance);
2195
2196 if (!cmd) {
1be18254
BH
2197 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
2198 "Failed to get cmd for scsi%d\n",
4cbfea88
AR
2199 instance->host->host_no);
2200 return -ENOMEM;
2201 }
2202
2203 dcmd = &cmd->frame->dcmd;
2204
2205 if (!instance->vf_affiliation) {
1be18254
BH
2206 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2207 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR
2208 megasas_return_cmd(instance, cmd);
2209 return -ENOMEM;
2210 }
2211
2212 if (initial)
2213 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2214 sizeof(struct MR_LD_VF_AFFILIATION));
2215 else {
2216 new_affiliation =
2217 pci_alloc_consistent(instance->pdev,
2218 (MAX_LOGICAL_DRIVES + 1) *
2219 sizeof(struct MR_LD_VF_AFFILIATION),
2220 &new_affiliation_h);
2221 if (!new_affiliation) {
1be18254
BH
2222 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2223 "memory for new affiliation for scsi%d\n",
4cbfea88
AR
2224 instance->host->host_no);
2225 megasas_return_cmd(instance, cmd);
2226 return -ENOMEM;
2227 }
2228 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2229 sizeof(struct MR_LD_VF_AFFILIATION));
2230 }
2231
2232 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2233
2234 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2235 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2236 dcmd->sge_count = 1;
2213a467 2237 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR
2238 dcmd->timeout = 0;
2239 dcmd->pad_0 = 0;
2213a467
CH
2240 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2241 sizeof(struct MR_LD_VF_AFFILIATION));
2242 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR
2243
2244 if (initial)
2213a467
CH
2245 dcmd->sgl.sge32[0].phys_addr =
2246 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2247 else
2213a467
CH
2248 dcmd->sgl.sge32[0].phys_addr =
2249 cpu_to_le32(new_affiliation_h);
4cbfea88 2250
2213a467
CH
2251 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2252 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2253
1be18254 2254 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR
2255 "scsi%d\n", instance->host->host_no);
2256
4cbfea88 2257
6d40afbc 2258 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH
2259 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2260 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR
2261 dcmd->cmd_status, instance->host->host_no);
2262 retval = 1; /* Do a scan if we couldn't get affiliation */
2263 goto out;
2264 }
2265
2266 if (!initial) {
2267 if (!new_affiliation->ldCount) {
1be18254
BH
2268 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2269 "affiliation for passive path for scsi%d\n",
4cbfea88
AR
2270 instance->host->host_no);
2271 retval = 1;
2272 goto out;
2273 }
2274 newmap = new_affiliation->map;
2275 savedmap = instance->vf_affiliation->map;
2276 thisVf = new_affiliation->thisVf;
2277 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2278 found = 0;
2279 for (j = 0; j < instance->vf_affiliation->ldCount;
2280 j++) {
2281 if (newmap->ref.targetId ==
2282 savedmap->ref.targetId) {
2283 found = 1;
2284 if (newmap->policy[thisVf] !=
2285 savedmap->policy[thisVf]) {
2286 doscan = 1;
2287 goto out;
2288 }
229fe47c 2289 }
2290 savedmap = (struct MR_LD_VF_MAP *)
2291 ((unsigned char *)savedmap +
2292 savedmap->size);
4cbfea88
AR
2293 }
2294 if (!found && newmap->policy[thisVf] !=
2295 MR_LD_ACCESS_HIDDEN) {
2296 doscan = 1;
2297 goto out;
2298 }
2299 newmap = (struct MR_LD_VF_MAP *)
2300 ((unsigned char *)newmap + newmap->size);
2301 }
2302
2303 newmap = new_affiliation->map;
2304 savedmap = instance->vf_affiliation->map;
2305
2306 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2307 found = 0;
2308 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2309 if (savedmap->ref.targetId ==
2310 newmap->ref.targetId) {
2311 found = 1;
2312 if (savedmap->policy[thisVf] !=
2313 newmap->policy[thisVf]) {
2314 doscan = 1;
2315 goto out;
2316 }
2317 }
229fe47c 2318 newmap = (struct MR_LD_VF_MAP *)
2319 ((unsigned char *)newmap +
2320 newmap->size);
2321 }
4cbfea88
AR
2322 if (!found && savedmap->policy[thisVf] !=
2323 MR_LD_ACCESS_HIDDEN) {
2324 doscan = 1;
2325 goto out;
2326 }
2327 savedmap = (struct MR_LD_VF_MAP *)
2328 ((unsigned char *)savedmap +
2329 savedmap->size);
229fe47c 2330 }
2331 }
2332out:
4cbfea88 2333 if (doscan) {
1be18254
BH
2334 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2335 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR
2336 memcpy(instance->vf_affiliation, new_affiliation,
2337 new_affiliation->size);
2338 retval = 1;
229fe47c 2339 }
4cbfea88
AR
2340
2341 if (new_affiliation)
2342 pci_free_consistent(instance->pdev,
2343 (MAX_LOGICAL_DRIVES + 1) *
2344 sizeof(struct MR_LD_VF_AFFILIATION),
2345 new_affiliation, new_affiliation_h);
4026e9aa 2346 megasas_return_cmd(instance, cmd);
229fe47c 2347
2348 return retval;
2349}
2350
4cbfea88
AR
2351/* This function will get the current SR-IOV LD/VF affiliation */
2352static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2353 int initial)
2354{
2355 int retval;
2356
2357 if (instance->PlasmaFW111)
2358 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2359 else
2360 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2361 return retval;
2362}
2363
229fe47c 2364/* This function will tell FW to start the SR-IOV heartbeat */
2365int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2366 int initial)
2367{
2368 struct megasas_cmd *cmd;
2369 struct megasas_dcmd_frame *dcmd;
2370 int retval = 0;
2371
2372 cmd = megasas_get_cmd(instance);
2373
2374 if (!cmd) {
1be18254
BH
2375 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2376 "Failed to get cmd for scsi%d\n",
229fe47c 2377 instance->host->host_no);
2378 return -ENOMEM;
2379 }
2380
2381 dcmd = &cmd->frame->dcmd;
2382
2383 if (initial) {
2384 instance->hb_host_mem =
7c845eb5
JP
2385 pci_zalloc_consistent(instance->pdev,
2386 sizeof(struct MR_CTRL_HB_HOST_MEM),
2387 &instance->hb_host_mem_h);
229fe47c 2388 if (!instance->hb_host_mem) {
1be18254
BH
2389 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2390 " memory for heartbeat host memory for scsi%d\n",
2391 instance->host->host_no);
229fe47c 2392 retval = -ENOMEM;
2393 goto out;
2394 }
229fe47c 2395 }
2396
2397 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2398
2213a467 2399 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2400 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2401 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2402 dcmd->sge_count = 1;
2213a467 2403 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c 2404 dcmd->timeout = 0;
2405 dcmd->pad_0 = 0;
2213a467
CH
2406 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2407 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
2408 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h);
2409 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2410
1be18254 2411 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c 2412 instance->host->host_no);
2413
4026e9aa
SS
2414 if (instance->ctrl_context && !instance->mask_interrupts)
2415 retval = megasas_issue_blocked_cmd(instance, cmd,
2416 MEGASAS_ROUTINE_WAIT_TIME_VF);
2417 else
2418 retval = megasas_issue_polled(instance, cmd);
229fe47c 2419
4026e9aa 2420 if (retval) {
2be2a988
SS
2421 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2422 "_MEM_ALLOC DCMD %s for scsi%d\n",
2423 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2424 "timed out" : "failed", instance->host->host_no);
229fe47c 2425 retval = 1;
229fe47c 2426 }
2427
2428out:
2429 megasas_return_cmd(instance, cmd);
2430
2431 return retval;
2432}
2433
2434/* Handler for SR-IOV heartbeat */
2435void megasas_sriov_heartbeat_handler(unsigned long instance_addr)
2436{
2437 struct megasas_instance *instance =
2438 (struct megasas_instance *)instance_addr;
2439
2440 if (instance->hb_host_mem->HB.fwCounter !=
2441 instance->hb_host_mem->HB.driverCounter) {
2442 instance->hb_host_mem->HB.driverCounter =
2443 instance->hb_host_mem->HB.fwCounter;
2444 mod_timer(&instance->sriov_heartbeat_timer,
2445 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2446 } else {
1be18254 2447 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c 2448 "completed for scsi%d\n", instance->host->host_no);
2449 schedule_work(&instance->work_init);
2450 }
2451}
2452
c4a3e0a5
BS
2453/**
2454 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2455 * @instance: Adapter soft state
2456 *
25985edc 2457 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS
2458 * complete all its outstanding commands. Returns error if one or more IOs
2459 * are pending after this time period. It also marks the controller dead.
2460 */
2461static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2462{
ccc7507d 2463 int i, sl, outstanding;
39a98554 2464 u32 reset_index;
c4a3e0a5 2465 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2466 unsigned long flags;
2467 struct list_head clist_local;
2468 struct megasas_cmd *reset_cmd;
707e09bd 2469 u32 fw_state;
39a98554 2470
ccc7507d
SS
2471 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2472 dev_info(&instance->pdev->dev, "%s:%d HBA is killed.\n",
2473 __func__, __LINE__);
2474 return FAILED;
2475 }
39a98554 2476
8a01a41d 2477 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 2478
2479 INIT_LIST_HEAD(&clist_local);
2480 spin_lock_irqsave(&instance->hba_lock, flags);
2481 list_splice_init(&instance->internal_reset_pending_q,
2482 &clist_local);
2483 spin_unlock_irqrestore(&instance->hba_lock, flags);
2484
1be18254 2485 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2486 for (i = 0; i < wait_time; i++) {
2487 msleep(1000);
8a01a41d 2488 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
39a98554 2489 break;
2490 }
2491
8a01a41d 2492 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
1be18254 2493 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
8a01a41d 2494 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
39a98554 2495 return FAILED;
2496 }
2497
da0dc9fb 2498 reset_index = 0;
39a98554 2499 while (!list_empty(&clist_local)) {
da0dc9fb 2500 reset_cmd = list_entry((&clist_local)->next,
39a98554 2501 struct megasas_cmd, list);
2502 list_del_init(&reset_cmd->list);
2503 if (reset_cmd->scmd) {
2504 reset_cmd->scmd->result = DID_RESET << 16;
1be18254 2505 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2506 reset_index, reset_cmd,
5cd049a5 2507 reset_cmd->scmd->cmnd[0]);
39a98554 2508
2509 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2510 megasas_return_cmd(instance, reset_cmd);
2511 } else if (reset_cmd->sync_cmd) {
1be18254 2512 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2513 "reset queue\n",
2514 reset_cmd);
2515
2be2a988 2516 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2517 instance->instancet->fire_cmd(instance,
2518 reset_cmd->frame_phys_addr,
2519 0, instance->reg_set);
2520 } else {
1be18254 2521 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2522 "cmds lst\n",
2523 reset_cmd);
2524 }
2525 reset_index++;
2526 }
2527
2528 return SUCCESS;
2529 }
c4a3e0a5 2530
c007b8b2 2531 for (i = 0; i < resetwaittime; i++) {
ccc7507d 2532 outstanding = atomic_read(&instance->fw_outstanding);
e4a082c7
SP
2533
2534 if (!outstanding)
c4a3e0a5
BS
2535 break;
2536
2537 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2538 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2539 "commands to complete\n",i,outstanding);
7343eb65 2540 /*
2541 * Call cmd completion routine. Cmd to be
2542 * be completed directly without depending on isr.
2543 */
2544 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS
2545 }
2546
2547 msleep(1000);
2548 }
2549
707e09bd 2550 i = 0;
ccc7507d
SS
2551 outstanding = atomic_read(&instance->fw_outstanding);
2552 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2553
2554 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2555 goto no_outstanding;
2556
2557 if (instance->disableOnlineCtrlReset)
2558 goto kill_hba_and_failed;
707e09bd 2559 do {
ccc7507d
SS
2560 if ((fw_state == MFI_STATE_FAULT) || atomic_read(&instance->fw_outstanding)) {
2561 dev_info(&instance->pdev->dev,
2562 "%s:%d waiting_for_outstanding: before issue OCR. FW state = 0x%x, oustanding 0x%x\n",
2563 __func__, __LINE__, fw_state, atomic_read(&instance->fw_outstanding));
2564 if (i == 3)
2565 goto kill_hba_and_failed;
707e09bd 2566 megasas_do_ocr(instance);
707e09bd 2567
ccc7507d
SS
2568 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2569 dev_info(&instance->pdev->dev, "%s:%d OCR failed and HBA is killed.\n",
2570 __func__, __LINE__);
2571 return FAILED;
2572 }
2573 dev_info(&instance->pdev->dev, "%s:%d waiting_for_outstanding: after issue OCR.\n",
2574 __func__, __LINE__);
2575
2576 for (sl = 0; sl < 10; sl++)
2577 msleep(500);
2578
2579 outstanding = atomic_read(&instance->fw_outstanding);
2580
2581 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2582 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2583 goto no_outstanding;
707e09bd
YB
2584 }
2585 i++;
2586 } while (i <= 3);
2587
ccc7507d 2588no_outstanding:
707e09bd 2589
ccc7507d
SS
2590 dev_info(&instance->pdev->dev, "%s:%d no more pending commands remain after reset handling.\n",
2591 __func__, __LINE__);
2592 return SUCCESS;
707e09bd 2593
ccc7507d 2594kill_hba_and_failed:
c4a3e0a5 2595
ccc7507d
SS
2596 /* Reset not supported, kill adapter */
2597 dev_info(&instance->pdev->dev, "%s:%d killing adapter scsi%d"
2598 " disableOnlineCtrlReset %d fw_outstanding %d \n",
2599 __func__, __LINE__, instance->host->host_no, instance->disableOnlineCtrlReset,
2600 atomic_read(&instance->fw_outstanding));
2601 megasas_dump_pending_frames(instance);
2602 megaraid_sas_kill_hba(instance);
39a98554 2603
ccc7507d 2604 return FAILED;
c4a3e0a5
BS
2605}
2606
2607/**
2608 * megasas_generic_reset - Generic reset routine
2609 * @scmd: Mid-layer SCSI command
2610 *
2611 * This routine implements a generic reset handler for device, bus and host
2612 * reset requests. Device, bus and host specific reset handlers can use this
2613 * function after they do their specific tasks.
2614 */
2615static int megasas_generic_reset(struct scsi_cmnd *scmd)
2616{
2617 int ret_val;
2618 struct megasas_instance *instance;
2619
2620 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2621
5cd049a5
CH
2622 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2623 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2624
8a01a41d 2625 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2626 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS
2627 return FAILED;
2628 }
2629
c4a3e0a5 2630 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2631 if (ret_val == SUCCESS)
1be18254 2632 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2633 else
1be18254 2634 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2635
c4a3e0a5
BS
2636 return ret_val;
2637}
2638
05e9ebbe
SP
2639/**
2640 * megasas_reset_timer - quiesce the adapter if required
2641 * @scmd: scsi cmnd
2642 *
2643 * Sets the FW busy flag and reduces the host->can_queue if the
2644 * cmd has not been completed within the timeout period.
2645 */
2646static enum
242f9dcb 2647blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2648{
05e9ebbe
SP
2649 struct megasas_instance *instance;
2650 unsigned long flags;
2651
2652 if (time_after(jiffies, scmd->jiffies_at_alloc +
e3d178ca 2653 (scmd_timeout * 2) * HZ)) {
242f9dcb 2654 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP
2655 }
2656
f575c5d3 2657 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP
2658 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2659 /* FW is busy, throttle IO */
2660 spin_lock_irqsave(instance->host->host_lock, flags);
2661
c5daa6a9 2662 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP
2663 instance->last_time = jiffies;
2664 instance->flag |= MEGASAS_FW_BUSY;
2665
2666 spin_unlock_irqrestore(instance->host->host_lock, flags);
2667 }
242f9dcb 2668 return BLK_EH_RESET_TIMER;
05e9ebbe
SP
2669}
2670
c4a3e0a5
BS
2671/**
2672 * megasas_reset_device - Device reset handler entry point
2673 */
2674static int megasas_reset_device(struct scsi_cmnd *scmd)
2675{
c4a3e0a5
BS
2676 /*
2677 * First wait for all commands to complete
2678 */
da0dc9fb 2679 return megasas_generic_reset(scmd);
c4a3e0a5
BS
2680}
2681
2682/**
2683 * megasas_reset_bus_host - Bus & host reset handler entry point
2684 */
2685static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2686{
2687 int ret;
9c915a8c 2688 struct megasas_instance *instance;
da0dc9fb 2689
9c915a8c 2690 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5
BS
2691
2692 /*
80682fa9 2693 * First wait for all commands to complete
c4a3e0a5 2694 */
5a8cb85b 2695 if (instance->ctrl_context)
229fe47c 2696 ret = megasas_reset_fusion(scmd->device->host, 1);
9c915a8c 2697 else
2698 ret = megasas_generic_reset(scmd);
c4a3e0a5
BS
2699
2700 return ret;
2701}
2702
cf62a0a5
SP
2703/**
2704 * megasas_bios_param - Returns disk geometry for a disk
da0dc9fb 2705 * @sdev: device handle
cf62a0a5
SP
2706 * @bdev: block device
2707 * @capacity: drive capacity
2708 * @geom: geometry parameters
2709 */
2710static int
2711megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2712 sector_t capacity, int geom[])
2713{
2714 int heads;
2715 int sectors;
2716 sector_t cylinders;
2717 unsigned long tmp;
da0dc9fb 2718
cf62a0a5
SP
2719 /* Default heads (64) & sectors (32) */
2720 heads = 64;
2721 sectors = 32;
2722
2723 tmp = heads * sectors;
2724 cylinders = capacity;
2725
2726 sector_div(cylinders, tmp);
2727
2728 /*
2729 * Handle extended translation size for logical drives > 1Gb
2730 */
2731
2732 if (capacity >= 0x200000) {
2733 heads = 255;
2734 sectors = 63;
2735 tmp = heads*sectors;
2736 cylinders = capacity;
2737 sector_div(cylinders, tmp);
2738 }
2739
2740 geom[0] = heads;
2741 geom[1] = sectors;
2742 geom[2] = cylinders;
2743
2744 return 0;
2745}
2746
7e8a75f4
YB
2747static void megasas_aen_polling(struct work_struct *work);
2748
c4a3e0a5
BS
2749/**
2750 * megasas_service_aen - Processes an event notification
2751 * @instance: Adapter soft state
2752 * @cmd: AEN command completed by the ISR
2753 *
2754 * For AEN, driver sends a command down to FW that is held by the FW till an
2755 * event occurs. When an event of interest occurs, FW completes the command
2756 * that it was previously holding.
2757 *
2758 * This routines sends SIGIO signal to processes that have registered with the
2759 * driver for AEN.
2760 */
2761static void
2762megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2763{
c3518837 2764 unsigned long flags;
da0dc9fb 2765
c4a3e0a5
BS
2766 /*
2767 * Don't signal app if it is just an aborted previously registered aen
2768 */
c3518837
YB
2769 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2770 spin_lock_irqsave(&poll_aen_lock, flags);
2771 megasas_poll_wait_aen = 1;
2772 spin_unlock_irqrestore(&poll_aen_lock, flags);
2773 wake_up(&megasas_poll_wait);
c4a3e0a5 2774 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2775 }
c4a3e0a5
BS
2776 else
2777 cmd->abort_aen = 0;
2778
2779 instance->aen_cmd = NULL;
90dc9d98 2780
4026e9aa 2781 megasas_return_cmd(instance, cmd);
7e8a75f4 2782
39a98554 2783 if ((instance->unload == 0) &&
2784 ((instance->issuepend_done == 1))) {
7e8a75f4 2785 struct megasas_aen_event *ev;
da0dc9fb 2786
7e8a75f4
YB
2787 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2788 if (!ev) {
1be18254 2789 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB
2790 } else {
2791 ev->instance = instance;
2792 instance->ev = ev;
c1d390d8
XF
2793 INIT_DELAYED_WORK(&ev->hotplug_work,
2794 megasas_aen_polling);
2795 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB
2796 }
2797 }
c4a3e0a5
BS
2798}
2799
fc62b3fc
SS
2800static ssize_t
2801megasas_fw_crash_buffer_store(struct device *cdev,
2802 struct device_attribute *attr, const char *buf, size_t count)
2803{
2804 struct Scsi_Host *shost = class_to_shost(cdev);
2805 struct megasas_instance *instance =
2806 (struct megasas_instance *) shost->hostdata;
2807 int val = 0;
2808 unsigned long flags;
2809
2810 if (kstrtoint(buf, 0, &val) != 0)
2811 return -EINVAL;
2812
2813 spin_lock_irqsave(&instance->crashdump_lock, flags);
2814 instance->fw_crash_buffer_offset = val;
2815 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2816 return strlen(buf);
2817}
2818
2819static ssize_t
2820megasas_fw_crash_buffer_show(struct device *cdev,
2821 struct device_attribute *attr, char *buf)
2822{
2823 struct Scsi_Host *shost = class_to_shost(cdev);
2824 struct megasas_instance *instance =
2825 (struct megasas_instance *) shost->hostdata;
2826 u32 size;
2827 unsigned long buff_addr;
2828 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
2829 unsigned long src_addr;
2830 unsigned long flags;
2831 u32 buff_offset;
2832
2833 spin_lock_irqsave(&instance->crashdump_lock, flags);
2834 buff_offset = instance->fw_crash_buffer_offset;
2835 if (!instance->crash_dump_buf &&
2836 !((instance->fw_crash_state == AVAILABLE) ||
2837 (instance->fw_crash_state == COPYING))) {
2838 dev_err(&instance->pdev->dev,
2839 "Firmware crash dump is not available\n");
2840 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2841 return -EINVAL;
2842 }
2843
2844 buff_addr = (unsigned long) buf;
2845
da0dc9fb 2846 if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
fc62b3fc
SS
2847 dev_err(&instance->pdev->dev,
2848 "Firmware crash dump offset is out of range\n");
2849 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2850 return 0;
2851 }
2852
2853 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
2854 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
2855
2856 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
2857 (buff_offset % dmachunk);
da0dc9fb 2858 memcpy(buf, (void *)src_addr, size);
fc62b3fc
SS
2859 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2860
2861 return size;
2862}
2863
2864static ssize_t
2865megasas_fw_crash_buffer_size_show(struct device *cdev,
2866 struct device_attribute *attr, char *buf)
2867{
2868 struct Scsi_Host *shost = class_to_shost(cdev);
2869 struct megasas_instance *instance =
2870 (struct megasas_instance *) shost->hostdata;
2871
2872 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
2873 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
2874}
2875
2876static ssize_t
2877megasas_fw_crash_state_store(struct device *cdev,
2878 struct device_attribute *attr, const char *buf, size_t count)
2879{
2880 struct Scsi_Host *shost = class_to_shost(cdev);
2881 struct megasas_instance *instance =
2882 (struct megasas_instance *) shost->hostdata;
2883 int val = 0;
2884 unsigned long flags;
2885
2886 if (kstrtoint(buf, 0, &val) != 0)
2887 return -EINVAL;
2888
2889 if ((val <= AVAILABLE || val > COPY_ERROR)) {
2890 dev_err(&instance->pdev->dev, "application updates invalid "
2891 "firmware crash state\n");
2892 return -EINVAL;
2893 }
2894
2895 instance->fw_crash_state = val;
2896
2897 if ((val == COPIED) || (val == COPY_ERROR)) {
2898 spin_lock_irqsave(&instance->crashdump_lock, flags);
2899 megasas_free_host_crash_buffer(instance);
2900 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2901 if (val == COPY_ERROR)
2902 dev_info(&instance->pdev->dev, "application failed to "
2903 "copy Firmware crash dump\n");
2904 else
2905 dev_info(&instance->pdev->dev, "Firmware crash dump "
2906 "copied successfully\n");
2907 }
2908 return strlen(buf);
2909}
2910
2911static ssize_t
2912megasas_fw_crash_state_show(struct device *cdev,
2913 struct device_attribute *attr, char *buf)
2914{
2915 struct Scsi_Host *shost = class_to_shost(cdev);
2916 struct megasas_instance *instance =
2917 (struct megasas_instance *) shost->hostdata;
da0dc9fb 2918
fc62b3fc
SS
2919 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
2920}
2921
2922static ssize_t
2923megasas_page_size_show(struct device *cdev,
2924 struct device_attribute *attr, char *buf)
2925{
2926 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
2927}
2928
308ec459
SS
2929static ssize_t
2930megasas_ldio_outstanding_show(struct device *cdev, struct device_attribute *attr,
2931 char *buf)
2932{
2933 struct Scsi_Host *shost = class_to_shost(cdev);
2934 struct megasas_instance *instance = (struct megasas_instance *)shost->hostdata;
2935
2936 return snprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&instance->ldio_outstanding));
2937}
2938
fc62b3fc
SS
2939static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
2940 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
2941static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
2942 megasas_fw_crash_buffer_size_show, NULL);
2943static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
2944 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
2945static DEVICE_ATTR(page_size, S_IRUGO,
2946 megasas_page_size_show, NULL);
308ec459
SS
2947static DEVICE_ATTR(ldio_outstanding, S_IRUGO,
2948 megasas_ldio_outstanding_show, NULL);
fc62b3fc
SS
2949
2950struct device_attribute *megaraid_host_attrs[] = {
2951 &dev_attr_fw_crash_buffer_size,
2952 &dev_attr_fw_crash_buffer,
2953 &dev_attr_fw_crash_state,
2954 &dev_attr_page_size,
308ec459 2955 &dev_attr_ldio_outstanding,
fc62b3fc
SS
2956 NULL,
2957};
2958
c4a3e0a5
BS
2959/*
2960 * Scsi host template for megaraid_sas driver
2961 */
2962static struct scsi_host_template megasas_template = {
2963
2964 .module = THIS_MODULE,
43cd7fe4 2965 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 2966 .proc_name = "megaraid_sas",
147aab6a 2967 .slave_configure = megasas_slave_configure,
044833b5 2968 .slave_alloc = megasas_slave_alloc,
18365b13 2969 .slave_destroy = megasas_slave_destroy,
c4a3e0a5
BS
2970 .queuecommand = megasas_queue_command,
2971 .eh_device_reset_handler = megasas_reset_device,
2972 .eh_bus_reset_handler = megasas_reset_bus_host,
2973 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 2974 .eh_timed_out = megasas_reset_timer,
fc62b3fc 2975 .shost_attrs = megaraid_host_attrs,
cf62a0a5 2976 .bios_param = megasas_bios_param,
c4a3e0a5 2977 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 2978 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 2979 .no_write_same = 1,
c4a3e0a5
BS
2980};
2981
2982/**
2983 * megasas_complete_int_cmd - Completes an internal command
2984 * @instance: Adapter soft state
2985 * @cmd: Command to be completed
2986 *
2987 * The megasas_issue_blocked_cmd() function waits for a command to complete
2988 * after it issues a command. This function wakes up that waiting routine by
2989 * calling wake_up() on the wait queue.
2990 */
2991static void
2992megasas_complete_int_cmd(struct megasas_instance *instance,
2993 struct megasas_cmd *cmd)
2994{
2be2a988 2995 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS
2996 wake_up(&instance->int_cmd_wait_q);
2997}
2998
2999/**
3000 * megasas_complete_abort - Completes aborting a command
3001 * @instance: Adapter soft state
3002 * @cmd: Cmd that was issued to abort another cmd
3003 *
0d49016b 3004 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
3005 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS
3006 * wakes up all functions waiting on the same wait queue.
3007 */
3008static void
3009megasas_complete_abort(struct megasas_instance *instance,
3010 struct megasas_cmd *cmd)
3011{
3012 if (cmd->sync_cmd) {
3013 cmd->sync_cmd = 0;
2be2a988 3014 cmd->cmd_status_drv = 0;
c4a3e0a5
BS
3015 wake_up(&instance->abort_cmd_wait_q);
3016 }
c4a3e0a5
BS
3017}
3018
c4a3e0a5
BS
3019/**
3020 * megasas_complete_cmd - Completes a command
3021 * @instance: Adapter soft state
3022 * @cmd: Command to be completed
0d49016b 3023 * @alt_status: If non-zero, use this value as status to
da0dc9fb
BH
3024 * SCSI mid-layer instead of the value returned
3025 * by the FW. This should be used if caller wants
3026 * an alternate status (as in the case of aborted
3027 * commands)
c4a3e0a5 3028 */
9c915a8c 3029void
c4a3e0a5
BS
3030megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
3031 u8 alt_status)
3032{
3033 int exception = 0;
3034 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 3035 unsigned long flags;
9c915a8c 3036 struct fusion_context *fusion = instance->ctrl_context;
3761cb4c 3037 u32 opcode, status;
c4a3e0a5 3038
39a98554 3039 /* flag for the retry reset */
3040 cmd->retry_for_fw_reset = 0;
3041
05e9ebbe
SP
3042 if (cmd->scmd)
3043 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS
3044
3045 switch (hdr->cmd) {
e5f93a36 3046 case MFI_CMD_INVALID:
3047 /* Some older 1068 controller FW may keep a pended
3048 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
3049 when booting the kdump kernel. Ignore this command to
3050 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH
3051 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
3052 "completed\n");
3053 dev_warn(&instance->pdev->dev, "If you have a controller "
3054 "other than PERC5, please upgrade your firmware\n");
e5f93a36 3055 break;
c4a3e0a5
BS
3056 case MFI_CMD_PD_SCSI_IO:
3057 case MFI_CMD_LD_SCSI_IO:
3058
3059 /*
3060 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
3061 * issued either through an IO path or an IOCTL path. If it
3062 * was via IOCTL, we will send it to internal completion.
3063 */
3064 if (cmd->sync_cmd) {
3065 cmd->sync_cmd = 0;
3066 megasas_complete_int_cmd(instance, cmd);
3067 break;
3068 }
3069
c4a3e0a5
BS
3070 case MFI_CMD_LD_READ:
3071 case MFI_CMD_LD_WRITE:
3072
3073 if (alt_status) {
3074 cmd->scmd->result = alt_status << 16;
3075 exception = 1;
3076 }
3077
3078 if (exception) {
3079
e4a082c7 3080 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3081
155d98f0 3082 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS
3083 cmd->scmd->scsi_done(cmd->scmd);
3084 megasas_return_cmd(instance, cmd);
3085
3086 break;
3087 }
3088
3089 switch (hdr->cmd_status) {
3090
3091 case MFI_STAT_OK:
3092 cmd->scmd->result = DID_OK << 16;
3093 break;
3094
3095 case MFI_STAT_SCSI_IO_FAILED:
3096 case MFI_STAT_LD_INIT_IN_PROGRESS:
3097 cmd->scmd->result =
3098 (DID_ERROR << 16) | hdr->scsi_status;
3099 break;
3100
3101 case MFI_STAT_SCSI_DONE_WITH_ERROR:
3102
3103 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
3104
3105 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
3106 memset(cmd->scmd->sense_buffer, 0,
3107 SCSI_SENSE_BUFFERSIZE);
3108 memcpy(cmd->scmd->sense_buffer, cmd->sense,
3109 hdr->sense_len);
3110
3111 cmd->scmd->result |= DRIVER_SENSE << 24;
3112 }
3113
3114 break;
3115
3116 case MFI_STAT_LD_OFFLINE:
3117 case MFI_STAT_DEVICE_NOT_FOUND:
3118 cmd->scmd->result = DID_BAD_TARGET << 16;
3119 break;
3120
3121 default:
1be18254 3122 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS
3123 hdr->cmd_status);
3124 cmd->scmd->result = DID_ERROR << 16;
3125 break;
3126 }
3127
e4a082c7 3128 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3129
155d98f0 3130 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS
3131 cmd->scmd->scsi_done(cmd->scmd);
3132 megasas_return_cmd(instance, cmd);
3133
3134 break;
3135
3136 case MFI_CMD_SMP:
3137 case MFI_CMD_STP:
3138 case MFI_CMD_DCMD:
94cd65dd 3139 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 3140 /* Check for LD map update */
94cd65dd
SS
3141 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
3142 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 3143 fusion->fast_path_io = 0;
9c915a8c 3144 spin_lock_irqsave(instance->host->host_lock, flags);
3761cb4c 3145 instance->map_update_cmd = NULL;
9c915a8c 3146 if (cmd->frame->hdr.cmd_status != 0) {
3147 if (cmd->frame->hdr.cmd_status !=
3148 MFI_STAT_NOT_FOUND)
1be18254 3149 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c 3150 cmd->frame->hdr.cmd_status);
3151 else {
4026e9aa 3152 megasas_return_cmd(instance, cmd);
9c915a8c 3153 spin_unlock_irqrestore(
3154 instance->host->host_lock,
3155 flags);
3156 break;
3157 }
3158 } else
3159 instance->map_id++;
4026e9aa 3160 megasas_return_cmd(instance, cmd);
bc93d425
SS
3161
3162 /*
3163 * Set fast path IO to ZERO.
3164 * Validate Map will set proper value.
3165 * Meanwhile all IOs will go as LD IO.
3166 */
3167 if (MR_ValidateMapInfo(instance))
9c915a8c 3168 fusion->fast_path_io = 1;
3169 else
3170 fusion->fast_path_io = 0;
3171 megasas_sync_map_info(instance);
3172 spin_unlock_irqrestore(instance->host->host_lock,
3173 flags);
3174 break;
3175 }
94cd65dd
SS
3176 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
3177 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB
3178 spin_lock_irqsave(&poll_aen_lock, flags);
3179 megasas_poll_wait_aen = 0;
3180 spin_unlock_irqrestore(&poll_aen_lock, flags);
3181 }
c4a3e0a5 3182
3761cb4c 3183 /* FW has an updated PD sequence */
3184 if ((opcode == MR_DCMD_SYSTEM_PD_MAP_GET_INFO) &&
3185 (cmd->frame->dcmd.mbox.b[0] == 1)) {
3186
3187 spin_lock_irqsave(instance->host->host_lock, flags);
3188 status = cmd->frame->hdr.cmd_status;
3189 instance->jbod_seq_cmd = NULL;
3190 megasas_return_cmd(instance, cmd);
3191
3192 if (status == MFI_STAT_OK) {
3193 instance->pd_seq_map_id++;
3194 /* Re-register a pd sync seq num cmd */
3195 if (megasas_sync_pd_seq_num(instance, true))
3196 instance->use_seqnum_jbod_fp = false;
3197 } else
3198 instance->use_seqnum_jbod_fp = false;
3199
3200 spin_unlock_irqrestore(instance->host->host_lock, flags);
3201 break;
3202 }
3203
c4a3e0a5
BS
3204 /*
3205 * See if got an event notification
3206 */
94cd65dd 3207 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS
3208 megasas_service_aen(instance, cmd);
3209 else
3210 megasas_complete_int_cmd(instance, cmd);
3211
3212 break;
3213
3214 case MFI_CMD_ABORT:
3215 /*
3216 * Cmd issued to abort another cmd returned
3217 */
3218 megasas_complete_abort(instance, cmd);
3219 break;
3220
3221 default:
1be18254 3222 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5
BS
3223 hdr->cmd);
3224 break;
3225 }
3226}
3227
39a98554 3228/**
3229 * megasas_issue_pending_cmds_again - issue all pending cmds
da0dc9fb 3230 * in FW again because of the fw reset
39a98554 3231 * @instance: Adapter soft state
3232 */
3233static inline void
3234megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3235{
3236 struct megasas_cmd *cmd;
3237 struct list_head clist_local;
3238 union megasas_evt_class_locale class_locale;
3239 unsigned long flags;
3240 u32 seq_num;
3241
3242 INIT_LIST_HEAD(&clist_local);
3243 spin_lock_irqsave(&instance->hba_lock, flags);
3244 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3245 spin_unlock_irqrestore(&instance->hba_lock, flags);
3246
3247 while (!list_empty(&clist_local)) {
da0dc9fb 3248 cmd = list_entry((&clist_local)->next,
39a98554 3249 struct megasas_cmd, list);
3250 list_del_init(&cmd->list);
3251
3252 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH
3253 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3254 "detected to be pending while HBA reset\n",
39a98554 3255 cmd, cmd->scmd, cmd->sync_cmd);
3256
3257 cmd->retry_for_fw_reset++;
3258
3259 if (cmd->retry_for_fw_reset == 3) {
1be18254 3260 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3261 "was tried multiple times during reset."
3262 "Shutting down the HBA\n",
3263 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS
3264 instance->instancet->disable_intr(instance);
3265 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3266 megaraid_sas_kill_hba(instance);
39a98554 3267 return;
3268 }
3269 }
3270
3271 if (cmd->sync_cmd == 1) {
3272 if (cmd->scmd) {
1be18254 3273 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3274 "cmd attached to internal command!\n");
3275 }
1be18254 3276 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3277 "on the internal reset queue,"
3278 "issue it again.\n", cmd);
2be2a988 3279 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3280 instance->instancet->fire_cmd(instance,
da0dc9fb 3281 cmd->frame_phys_addr,
39a98554 3282 0, instance->reg_set);
3283 } else if (cmd->scmd) {
1be18254 3284 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3285 "detected on the internal queue, issue again.\n",
5cd049a5 3286 cmd, cmd->scmd->cmnd[0]);
39a98554 3287
3288 atomic_inc(&instance->fw_outstanding);
3289 instance->instancet->fire_cmd(instance,
3290 cmd->frame_phys_addr,
3291 cmd->frame_count-1, instance->reg_set);
3292 } else {
1be18254 3293 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3294 "internal reset defer list while re-issue!!\n",
3295 cmd);
3296 }
3297 }
3298
3299 if (instance->aen_cmd) {
1be18254 3300 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3301 megasas_return_cmd(instance, instance->aen_cmd);
3302
da0dc9fb 3303 instance->aen_cmd = NULL;
39a98554 3304 }
3305
3306 /*
da0dc9fb
BH
3307 * Initiate AEN (Asynchronous Event Notification)
3308 */
39a98554 3309 seq_num = instance->last_seq_num;
3310 class_locale.members.reserved = 0;
3311 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3312 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3313
3314 megasas_register_aen(instance, seq_num, class_locale.word);
3315}
3316
3317/**
3318 * Move the internal reset pending commands to a deferred queue.
3319 *
3320 * We move the commands pending at internal reset time to a
3321 * pending queue. This queue would be flushed after successful
3322 * completion of the internal reset sequence. if the internal reset
3323 * did not complete in time, the kernel reset handler would flush
3324 * these commands.
3325 **/
3326static void
3327megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3328{
3329 struct megasas_cmd *cmd;
3330 int i;
3331 u32 max_cmd = instance->max_fw_cmds;
3332 u32 defer_index;
3333 unsigned long flags;
3334
da0dc9fb 3335 defer_index = 0;
90dc9d98 3336 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3337 for (i = 0; i < max_cmd; i++) {
3338 cmd = instance->cmd_list[i];
3339 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3340 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3341 "on the defer queue as internal\n",
3342 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3343
3344 if (!list_empty(&cmd->list)) {
1be18254 3345 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3346 " moving this cmd:%p, %d %p, it was"
3347 "discovered on some list?\n",
3348 cmd, cmd->sync_cmd, cmd->scmd);
3349
3350 list_del_init(&cmd->list);
3351 }
3352 defer_index++;
3353 list_add_tail(&cmd->list,
3354 &instance->internal_reset_pending_q);
3355 }
3356 }
90dc9d98 3357 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3358}
3359
3360
3361static void
3362process_fw_state_change_wq(struct work_struct *work)
3363{
3364 struct megasas_instance *instance =
3365 container_of(work, struct megasas_instance, work_init);
3366 u32 wait;
3367 unsigned long flags;
3368
8a01a41d 3369 if (atomic_read(&instance->adprecovery) != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3370 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
8a01a41d 3371 atomic_read(&instance->adprecovery));
39a98554 3372 return ;
3373 }
3374
8a01a41d 3375 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3376 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3377 "state, restarting it...\n");
3378
d46a3ad6 3379 instance->instancet->disable_intr(instance);
39a98554 3380 atomic_set(&instance->fw_outstanding, 0);
3381
3382 atomic_set(&instance->fw_reset_no_pci_access, 1);
3383 instance->instancet->adp_reset(instance, instance->reg_set);
da0dc9fb 3384 atomic_set(&instance->fw_reset_no_pci_access, 0);
39a98554 3385
1be18254 3386 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3387 "initiating next stage...\n");
3388
1be18254 3389 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3390 "state 2 starting...\n");
3391
da0dc9fb 3392 /* waiting for about 20 second before start the second init */
39a98554 3393 for (wait = 0; wait < 30; wait++) {
3394 msleep(1000);
3395 }
3396
058a8fac 3397 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3398 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3399
c8dd61ef 3400 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3401 megaraid_sas_kill_hba(instance);
39a98554 3402 return ;
3403 }
3404
3405 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3406 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3407 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3408 ) {
3409 *instance->consumer = *instance->producer;
3410 } else {
3411 *instance->consumer = 0;
3412 *instance->producer = 0;
3413 }
3414
3415 megasas_issue_init_mfi(instance);
3416
3417 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 3418 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
39a98554 3419 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3420 instance->instancet->enable_intr(instance);
39a98554 3421
3422 megasas_issue_pending_cmds_again(instance);
3423 instance->issuepend_done = 1;
3424 }
39a98554 3425}
3426
c4a3e0a5
BS
3427/**
3428 * megasas_deplete_reply_queue - Processes all completed commands
3429 * @instance: Adapter soft state
3430 * @alt_status: Alternate status to be returned to
da0dc9fb
BH
3431 * SCSI mid-layer instead of the status
3432 * returned by the FW
39a98554 3433 * Note: this must be called with hba lock held
c4a3e0a5 3434 */
858119e1 3435static int
39a98554 3436megasas_deplete_reply_queue(struct megasas_instance *instance,
3437 u8 alt_status)
c4a3e0a5 3438{
39a98554 3439 u32 mfiStatus;
3440 u32 fw_state;
3441
3442 if ((mfiStatus = instance->instancet->check_reset(instance,
3443 instance->reg_set)) == 1) {
3444 return IRQ_HANDLED;
3445 }
3446
3447 if ((mfiStatus = instance->instancet->clear_intr(
3448 instance->reg_set)
3449 ) == 0) {
e1419191 3450 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3451 if (!instance->msix_vectors)
e1419191 3452 return IRQ_NONE;
39a98554 3453 }
3454
3455 instance->mfiStatus = mfiStatus;
3456
3457 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3458 fw_state = instance->instancet->read_fw_status_reg(
3459 instance->reg_set) & MFI_STATE_MASK;
3460
3461 if (fw_state != MFI_STATE_FAULT) {
1be18254 3462 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3463 fw_state);
3464 }
3465
3466 if ((fw_state == MFI_STATE_FAULT) &&
3467 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3468 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3469
3470 if ((instance->pdev->device ==
3471 PCI_DEVICE_ID_LSI_SAS1064R) ||
3472 (instance->pdev->device ==
3473 PCI_DEVICE_ID_DELL_PERC5) ||
3474 (instance->pdev->device ==
3475 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3476
3477 *instance->consumer =
94cd65dd 3478 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3479 }
3480
3481
d46a3ad6 3482 instance->instancet->disable_intr(instance);
8a01a41d 3483 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
39a98554 3484 instance->issuepend_done = 0;
3485
3486 atomic_set(&instance->fw_outstanding, 0);
3487 megasas_internal_reset_defer_cmds(instance);
3488
1be18254 3489 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
8a01a41d 3490 fw_state, atomic_read(&instance->adprecovery));
39a98554 3491
3492 schedule_work(&instance->work_init);
3493 return IRQ_HANDLED;
3494
3495 } else {
1be18254 3496 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3497 fw_state, instance->disableOnlineCtrlReset);
3498 }
3499 }
c4a3e0a5 3500
5d018ad0 3501 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS
3502 return IRQ_HANDLED;
3503}
c4a3e0a5
BS
3504/**
3505 * megasas_isr - isr entry point
3506 */
7d12e780 3507static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3508{
c8e858fe 3509 struct megasas_irq_context *irq_context = devp;
3510 struct megasas_instance *instance = irq_context->instance;
39a98554 3511 unsigned long flags;
da0dc9fb 3512 irqreturn_t rc;
39a98554 3513
c8e858fe 3514 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3515 return IRQ_HANDLED;
3516
39a98554 3517 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 3518 rc = megasas_deplete_reply_queue(instance, DID_OK);
39a98554 3519 spin_unlock_irqrestore(&instance->hba_lock, flags);
3520
3521 return rc;
c4a3e0a5
BS
3522}
3523
3524/**
3525 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3526 * @instance: Adapter soft state
c4a3e0a5
BS
3527 *
3528 * During the initialization, FW passes can potentially be in any one of
3529 * several possible states. If the FW in operational, waiting-for-handshake
3530 * states, driver must take steps to bring it to ready state. Otherwise, it
3531 * has to wait for the ready state.
3532 */
9c915a8c 3533int
058a8fac 3534megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS
3535{
3536 int i;
3537 u8 max_wait;
3538 u32 fw_state;
3539 u32 cur_state;
7218df69 3540 u32 abs_state, curr_abs_state;
c4a3e0a5 3541
bc6ac5e8
TH
3542 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3543 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3544
e3bbff9f 3545 if (fw_state != MFI_STATE_READY)
1be18254 3546 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3547 " state\n");
e3bbff9f 3548
c4a3e0a5
BS
3549 while (fw_state != MFI_STATE_READY) {
3550
c4a3e0a5
BS
3551 switch (fw_state) {
3552
3553 case MFI_STATE_FAULT:
1be18254 3554 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac 3555 if (ocr) {
3556 max_wait = MEGASAS_RESET_WAIT_TIME;
3557 cur_state = MFI_STATE_FAULT;
3558 break;
3559 } else
3560 return -ENODEV;
c4a3e0a5
BS
3561
3562 case MFI_STATE_WAIT_HANDSHAKE:
3563 /*
3564 * Set the CLR bit in inbound doorbell
3565 */
0c79e681 3566 if ((instance->pdev->device ==
87911122
YB
3567 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3568 (instance->pdev->device ==
9c915a8c 3569 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3570 (instance->ctrl_context))
87911122
YB
3571 writel(
3572 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3573 &instance->reg_set->doorbell);
5a8cb85b 3574 else
87911122
YB
3575 writel(
3576 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3577 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3578
7218df69 3579 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3580 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3581 break;
3582
e3bbff9f 3583 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3584 if ((instance->pdev->device ==
9c915a8c 3585 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3586 (instance->pdev->device ==
3587 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3588 (instance->ctrl_context))
87911122 3589 writel(MFI_INIT_HOTPLUG,
9c915a8c 3590 &instance->reg_set->doorbell);
5a8cb85b 3591 else
87911122
YB
3592 writel(MFI_INIT_HOTPLUG,
3593 &instance->reg_set->inbound_doorbell);
e3bbff9f 3594
7218df69 3595 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP
3596 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3597 break;
3598
c4a3e0a5
BS
3599 case MFI_STATE_OPERATIONAL:
3600 /*
e3bbff9f 3601 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3602 */
d46a3ad6 3603 instance->instancet->disable_intr(instance);
87911122
YB
3604 if ((instance->pdev->device ==
3605 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3606 (instance->pdev->device ==
9c915a8c 3607 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3608 (instance->ctrl_context)) {
87911122 3609 writel(MFI_RESET_FLAGS,
9c915a8c 3610 &instance->reg_set->doorbell);
5a8cb85b 3611
3612 if (instance->ctrl_context) {
9c915a8c 3613 for (i = 0; i < (10 * 1000); i += 20) {
3614 if (readl(
3615 &instance->
3616 reg_set->
3617 doorbell) & 1)
3618 msleep(20);
3619 else
3620 break;
3621 }
3622 }
87911122
YB
3623 } else
3624 writel(MFI_RESET_FLAGS,
3625 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3626
7218df69 3627 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3628 cur_state = MFI_STATE_OPERATIONAL;
3629 break;
3630
3631 case MFI_STATE_UNDEFINED:
3632 /*
3633 * This state should not last for more than 2 seconds
3634 */
7218df69 3635 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3636 cur_state = MFI_STATE_UNDEFINED;
3637 break;
3638
3639 case MFI_STATE_BB_INIT:
7218df69 3640 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3641 cur_state = MFI_STATE_BB_INIT;
3642 break;
3643
3644 case MFI_STATE_FW_INIT:
7218df69 3645 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3646 cur_state = MFI_STATE_FW_INIT;
3647 break;
3648
3649 case MFI_STATE_FW_INIT_2:
7218df69 3650 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3651 cur_state = MFI_STATE_FW_INIT_2;
3652 break;
3653
3654 case MFI_STATE_DEVICE_SCAN:
7218df69 3655 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3656 cur_state = MFI_STATE_DEVICE_SCAN;
3657 break;
3658
3659 case MFI_STATE_FLUSH_CACHE:
7218df69 3660 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3661 cur_state = MFI_STATE_FLUSH_CACHE;
3662 break;
3663
3664 default:
1be18254 3665 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS
3666 fw_state);
3667 return -ENODEV;
3668 }
3669
3670 /*
3671 * The cur_state should not last for more than max_wait secs
3672 */
3673 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH
3674 curr_abs_state = instance->instancet->
3675 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3676
7218df69 3677 if (abs_state == curr_abs_state) {
c4a3e0a5
BS
3678 msleep(1);
3679 } else
3680 break;
3681 }
3682
3683 /*
3684 * Return error if fw_state hasn't changed after max_wait
3685 */
7218df69 3686 if (curr_abs_state == abs_state) {
1be18254 3687 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS
3688 "in %d secs\n", fw_state, max_wait);
3689 return -ENODEV;
3690 }
bc6ac5e8
TH
3691
3692 abs_state = curr_abs_state;
3693 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3694 }
1be18254 3695 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS
3696
3697 return 0;
3698}
3699
3700/**
3701 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3702 * @instance: Adapter soft state
3703 */
3704static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3705{
3706 int i;
9c915a8c 3707 u32 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS
3708 struct megasas_cmd *cmd;
3709
3710 if (!instance->frame_dma_pool)
3711 return;
3712
3713 /*
3714 * Return all frames to pool
3715 */
3716 for (i = 0; i < max_cmd; i++) {
3717
3718 cmd = instance->cmd_list[i];
3719
3720 if (cmd->frame)
3721 pci_pool_free(instance->frame_dma_pool, cmd->frame,
3722 cmd->frame_phys_addr);
3723
3724 if (cmd->sense)
e3bbff9f 3725 pci_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS
3726 cmd->sense_phys_addr);
3727 }
3728
3729 /*
3730 * Now destroy the pool itself
3731 */
3732 pci_pool_destroy(instance->frame_dma_pool);
3733 pci_pool_destroy(instance->sense_dma_pool);
3734
3735 instance->frame_dma_pool = NULL;
3736 instance->sense_dma_pool = NULL;
3737}
3738
3739/**
3740 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3741 * @instance: Adapter soft state
3742 *
3743 * Each command packet has an embedded DMA memory buffer that is used for
3744 * filling MFI frame and the SG list that immediately follows the frame. This
3745 * function creates those DMA memory buffers for each command packet by using
3746 * PCI pool facility.
3747 */
3748static int megasas_create_frame_pool(struct megasas_instance *instance)
3749{
3750 int i;
3751 u32 max_cmd;
3752 u32 sge_sz;
c4a3e0a5
BS
3753 u32 total_sz;
3754 u32 frame_count;
3755 struct megasas_cmd *cmd;
3756
9c915a8c 3757 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS
3758
3759 /*
3760 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3761 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3762 */
3763 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3764 sizeof(struct megasas_sge32);
3765
da0dc9fb 3766 if (instance->flag_ieee)
f4c9a131 3767 sge_sz = sizeof(struct megasas_sge_skinny);
f4c9a131 3768
c4a3e0a5 3769 /*
200aed58
SS
3770 * For MFI controllers.
3771 * max_num_sge = 60
3772 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3773 * Total 960 byte (15 MFI frame of 64 byte)
3774 *
3775 * Fusion adapter require only 3 extra frame.
3776 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3777 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3778 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3779 */
200aed58 3780 frame_count = instance->ctrl_context ? (3 + 1) : (15 + 1);
c4a3e0a5
BS
3781 total_sz = MEGAMFI_FRAME_SIZE * frame_count;
3782 /*
3783 * Use DMA pool facility provided by PCI layer
3784 */
3785 instance->frame_dma_pool = pci_pool_create("megasas frame pool",
200aed58 3786 instance->pdev, total_sz, 256, 0);
c4a3e0a5
BS
3787
3788 if (!instance->frame_dma_pool) {
1be18254 3789 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS
3790 return -ENOMEM;
3791 }
3792
3793 instance->sense_dma_pool = pci_pool_create("megasas sense pool",
3794 instance->pdev, 128, 4, 0);
3795
3796 if (!instance->sense_dma_pool) {
1be18254 3797 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5
BS
3798
3799 pci_pool_destroy(instance->frame_dma_pool);
3800 instance->frame_dma_pool = NULL;
3801
3802 return -ENOMEM;
3803 }
3804
3805 /*
3806 * Allocate and attach a frame to each of the commands in cmd_list.
3807 * By making cmd->index as the context instead of the &cmd, we can
3808 * always use 32bit context regardless of the architecture
3809 */
3810 for (i = 0; i < max_cmd; i++) {
3811
3812 cmd = instance->cmd_list[i];
3813
3814 cmd->frame = pci_pool_alloc(instance->frame_dma_pool,
3815 GFP_KERNEL, &cmd->frame_phys_addr);
3816
3817 cmd->sense = pci_pool_alloc(instance->sense_dma_pool,
3818 GFP_KERNEL, &cmd->sense_phys_addr);
3819
3820 /*
3821 * megasas_teardown_frame_pool() takes care of freeing
3822 * whatever has been allocated
3823 */
3824 if (!cmd->frame || !cmd->sense) {
1be18254 3825 dev_printk(KERN_DEBUG, &instance->pdev->dev, "pci_pool_alloc failed\n");
c4a3e0a5
BS
3826 megasas_teardown_frame_pool(instance);
3827 return -ENOMEM;
3828 }
3829
707e09bd 3830 memset(cmd->frame, 0, total_sz);
94cd65dd 3831 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 3832 cmd->frame->io.pad_0 = 0;
5a8cb85b 3833 if (!instance->ctrl_context && reset_devices)
e5f93a36 3834 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS
3835 }
3836
3837 return 0;
3838}
3839
3840/**
3841 * megasas_free_cmds - Free all the cmds in the free cmd pool
3842 * @instance: Adapter soft state
3843 */
9c915a8c 3844void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS
3845{
3846 int i;
da0dc9fb 3847
c4a3e0a5
BS
3848 /* First free the MFI frame pool */
3849 megasas_teardown_frame_pool(instance);
3850
3851 /* Free all the commands in the cmd_list */
9c915a8c 3852 for (i = 0; i < instance->max_mfi_cmds; i++)
3853
c4a3e0a5
BS
3854 kfree(instance->cmd_list[i]);
3855
3856 /* Free the cmd_list buffer itself */
3857 kfree(instance->cmd_list);
3858 instance->cmd_list = NULL;
3859
3860 INIT_LIST_HEAD(&instance->cmd_pool);
3861}
3862
3863/**
3864 * megasas_alloc_cmds - Allocates the command packets
3865 * @instance: Adapter soft state
3866 *
3867 * Each command that is issued to the FW, whether IO commands from the OS or
3868 * internal commands like IOCTLs, are wrapped in local data structure called
3869 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
3870 * the FW.
3871 *
3872 * Each frame has a 32-bit field called context (tag). This context is used
3873 * to get back the megasas_cmd from the frame when a frame gets completed in
3874 * the ISR. Typically the address of the megasas_cmd itself would be used as
3875 * the context. But we wanted to keep the differences between 32 and 64 bit
3876 * systems to the mininum. We always use 32 bit integers for the context. In
3877 * this driver, the 32 bit values are the indices into an array cmd_list.
3878 * This array is used only to look up the megasas_cmd given the context. The
3879 * free commands themselves are maintained in a linked list called cmd_pool.
3880 */
9c915a8c 3881int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS
3882{
3883 int i;
3884 int j;
3885 u32 max_cmd;
3886 struct megasas_cmd *cmd;
90dc9d98 3887 struct fusion_context *fusion;
c4a3e0a5 3888
90dc9d98 3889 fusion = instance->ctrl_context;
9c915a8c 3890 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS
3891
3892 /*
3893 * instance->cmd_list is an array of struct megasas_cmd pointers.
3894 * Allocate the dynamic array first and then allocate individual
3895 * commands.
3896 */
dd00cc48 3897 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS
3898
3899 if (!instance->cmd_list) {
1be18254 3900 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS
3901 return -ENOMEM;
3902 }
3903
9c915a8c 3904 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS
3905
3906 for (i = 0; i < max_cmd; i++) {
3907 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
3908 GFP_KERNEL);
3909
3910 if (!instance->cmd_list[i]) {
3911
3912 for (j = 0; j < i; j++)
3913 kfree(instance->cmd_list[j]);
3914
3915 kfree(instance->cmd_list);
3916 instance->cmd_list = NULL;
3917
3918 return -ENOMEM;
3919 }
3920 }
3921
c4a3e0a5
BS
3922 for (i = 0; i < max_cmd; i++) {
3923 cmd = instance->cmd_list[i];
3924 memset(cmd, 0, sizeof(struct megasas_cmd));
3925 cmd->index = i;
39a98554 3926 cmd->scmd = NULL;
c4a3e0a5
BS
3927 cmd->instance = instance;
3928
3929 list_add_tail(&cmd->list, &instance->cmd_pool);
3930 }
3931
3932 /*
3933 * Create a frame pool and assign one frame to each cmd
3934 */
3935 if (megasas_create_frame_pool(instance)) {
1be18254 3936 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS
3937 megasas_free_cmds(instance);
3938 }
3939
3940 return 0;
3941}
3942
6d40afbc
SS
3943/*
3944 * dcmd_timeout_ocr_possible - Check if OCR is possible based on Driver/FW state.
3945 * @instance: Adapter soft state
3946 *
3947 * Return 0 for only Fusion adapter, if driver load/unload is not in progress
3948 * or FW is not under OCR.
3949 */
3950inline int
3951dcmd_timeout_ocr_possible(struct megasas_instance *instance) {
3952
3953 if (!instance->ctrl_context)
3954 return KILL_ADAPTER;
3955 else if (instance->unload ||
3956 test_bit(MEGASAS_FUSION_IN_RESET, &instance->reset_flags))
3957 return IGNORE_TIMEOUT;
3958 else
3959 return INITIATE_OCR;
3960}
3961
2216c305
SS
3962static int
3963megasas_get_pd_info(struct megasas_instance *instance, u16 device_id)
3964{
3965 int ret;
3966 struct megasas_cmd *cmd;
3967 struct megasas_dcmd_frame *dcmd;
3968
3969 cmd = megasas_get_cmd(instance);
3970
3971 if (!cmd) {
3972 dev_err(&instance->pdev->dev, "Failed to get cmd %s\n", __func__);
3973 return -ENOMEM;
3974 }
3975
3976 dcmd = &cmd->frame->dcmd;
3977
3978 memset(instance->pd_info, 0, sizeof(*instance->pd_info));
3979 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3980
3981 dcmd->mbox.s[0] = cpu_to_le16(device_id);
3982 dcmd->cmd = MFI_CMD_DCMD;
3983 dcmd->cmd_status = 0xFF;
3984 dcmd->sge_count = 1;
3985 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
3986 dcmd->timeout = 0;
3987 dcmd->pad_0 = 0;
3988 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_PD_INFO));
3989 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_GET_INFO);
3990 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->pd_info_h);
3991 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_PD_INFO));
3992
3993 if (instance->ctrl_context && !instance->mask_interrupts)
3994 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
3995 else
3996 ret = megasas_issue_polled(instance, cmd);
3997
3998 switch (ret) {
3999 case DCMD_SUCCESS:
4000 instance->pd_list[device_id].interface =
4001 instance->pd_info->state.ddf.pdType.intf;
4002 break;
4003
4004 case DCMD_TIMEOUT:
4005
4006 switch (dcmd_timeout_ocr_possible(instance)) {
4007 case INITIATE_OCR:
4008 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4009 megasas_reset_fusion(instance->host,
4010 MFI_IO_TIMEOUT_OCR);
4011 break;
4012 case KILL_ADAPTER:
4013 megaraid_sas_kill_hba(instance);
4014 break;
4015 case IGNORE_TIMEOUT:
4016 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4017 __func__, __LINE__);
4018 break;
4019 }
4020
4021 break;
4022 }
4023
4024 if (ret != DCMD_TIMEOUT)
4025 megasas_return_cmd(instance, cmd);
4026
4027 return ret;
4028}
81e403ce
YB
4029/*
4030 * megasas_get_pd_list_info - Returns FW's pd_list structure
4031 * @instance: Adapter soft state
4032 * @pd_list: pd_list structure
4033 *
4034 * Issues an internal command (DCMD) to get the FW's controller PD
4035 * list structure. This information is mainly used to find out SYSTEM
4036 * supported by the FW.
4037 */
4038static int
4039megasas_get_pd_list(struct megasas_instance *instance)
4040{
4041 int ret = 0, pd_index = 0;
4042 struct megasas_cmd *cmd;
4043 struct megasas_dcmd_frame *dcmd;
4044 struct MR_PD_LIST *ci;
4045 struct MR_PD_ADDRESS *pd_addr;
4046 dma_addr_t ci_h = 0;
4047
4048 cmd = megasas_get_cmd(instance);
4049
4050 if (!cmd) {
1be18254 4051 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB
4052 return -ENOMEM;
4053 }
4054
4055 dcmd = &cmd->frame->dcmd;
4056
4057 ci = pci_alloc_consistent(instance->pdev,
4058 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h);
4059
4060 if (!ci) {
1be18254 4061 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n");
81e403ce
YB
4062 megasas_return_cmd(instance, cmd);
4063 return -ENOMEM;
4064 }
4065
4066 memset(ci, 0, sizeof(*ci));
4067 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4068
4069 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
4070 dcmd->mbox.b[1] = 0;
4071 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4072 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 4073 dcmd->sge_count = 1;
94cd65dd 4074 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
81e403ce 4075 dcmd->timeout = 0;
780a3762 4076 dcmd->pad_0 = 0;
94cd65dd
SS
4077 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
4078 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
4079 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4080 dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
81e403ce 4081
90dc9d98
SS
4082 if (instance->ctrl_context && !instance->mask_interrupts)
4083 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4084 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS
4085 else
4086 ret = megasas_issue_polled(instance, cmd);
81e403ce 4087
6d40afbc
SS
4088 switch (ret) {
4089 case DCMD_FAILED:
4090 megaraid_sas_kill_hba(instance);
4091 break;
4092 case DCMD_TIMEOUT:
81e403ce 4093
6d40afbc
SS
4094 switch (dcmd_timeout_ocr_possible(instance)) {
4095 case INITIATE_OCR:
4096 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4097 /*
4098 * DCMD failed from AEN path.
4099 * AEN path already hold reset_mutex to avoid PCI access
4100 * while OCR is in progress.
4101 */
4102 mutex_unlock(&instance->reset_mutex);
4103 megasas_reset_fusion(instance->host,
4104 MFI_IO_TIMEOUT_OCR);
4105 mutex_lock(&instance->reset_mutex);
4106 break;
4107 case KILL_ADAPTER:
4108 megaraid_sas_kill_hba(instance);
4109 break;
4110 case IGNORE_TIMEOUT:
4111 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d \n",
4112 __func__, __LINE__);
4113 break;
4114 }
81e403ce 4115
6d40afbc
SS
4116 break;
4117
4118 case DCMD_SUCCESS:
4119 pd_addr = ci->addr;
4120
4121 if ((le32_to_cpu(ci->count) >
4122 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL)))
4123 break;
81e403ce 4124
999ece0a 4125 memset(instance->local_pd_list, 0,
6d40afbc 4126 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
81e403ce 4127
94cd65dd 4128 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
999ece0a 4129 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
6d40afbc 4130 le16_to_cpu(pd_addr->deviceId);
999ece0a 4131 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
6d40afbc 4132 pd_addr->scsiDevType;
999ece0a 4133 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
6d40afbc 4134 MR_PD_STATE_SYSTEM;
81e403ce
YB
4135 pd_addr++;
4136 }
6d40afbc 4137
999ece0a
SS
4138 memcpy(instance->pd_list, instance->local_pd_list,
4139 sizeof(instance->pd_list));
6d40afbc
SS
4140 break;
4141
81e403ce
YB
4142 }
4143
4144 pci_free_consistent(instance->pdev,
4145 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
4146 ci, ci_h);
90dc9d98 4147
6d40afbc
SS
4148 if (ret != DCMD_TIMEOUT)
4149 megasas_return_cmd(instance, cmd);
81e403ce
YB
4150
4151 return ret;
4152}
4153
bdc6fb8d
YB
4154/*
4155 * megasas_get_ld_list_info - Returns FW's ld_list structure
4156 * @instance: Adapter soft state
4157 * @ld_list: ld_list structure
4158 *
4159 * Issues an internal command (DCMD) to get the FW's controller PD
4160 * list structure. This information is mainly used to find out SYSTEM
4161 * supported by the FW.
4162 */
4163static int
4164megasas_get_ld_list(struct megasas_instance *instance)
4165{
4166 int ret = 0, ld_index = 0, ids = 0;
4167 struct megasas_cmd *cmd;
4168 struct megasas_dcmd_frame *dcmd;
4169 struct MR_LD_LIST *ci;
4170 dma_addr_t ci_h = 0;
94cd65dd 4171 u32 ld_count;
bdc6fb8d
YB
4172
4173 cmd = megasas_get_cmd(instance);
4174
4175 if (!cmd) {
1be18254 4176 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB
4177 return -ENOMEM;
4178 }
4179
4180 dcmd = &cmd->frame->dcmd;
4181
4182 ci = pci_alloc_consistent(instance->pdev,
4183 sizeof(struct MR_LD_LIST),
4184 &ci_h);
4185
4186 if (!ci) {
1be18254 4187 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n");
bdc6fb8d
YB
4188 megasas_return_cmd(instance, cmd);
4189 return -ENOMEM;
4190 }
4191
4192 memset(ci, 0, sizeof(*ci));
4193 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4194
51087a86
SS
4195 if (instance->supportmax256vd)
4196 dcmd->mbox.b[0] = 1;
bdc6fb8d 4197 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4198 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 4199 dcmd->sge_count = 1;
94cd65dd 4200 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
bdc6fb8d 4201 dcmd->timeout = 0;
94cd65dd
SS
4202 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
4203 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
4204 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4205 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST));
bdc6fb8d
YB
4206 dcmd->pad_0 = 0;
4207
90dc9d98
SS
4208 if (instance->ctrl_context && !instance->mask_interrupts)
4209 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4210 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS
4211 else
4212 ret = megasas_issue_polled(instance, cmd);
4213
94cd65dd
SS
4214 ld_count = le32_to_cpu(ci->ldCount);
4215
6d40afbc
SS
4216 switch (ret) {
4217 case DCMD_FAILED:
4218 megaraid_sas_kill_hba(instance);
4219 break;
4220 case DCMD_TIMEOUT:
4221
4222 switch (dcmd_timeout_ocr_possible(instance)) {
4223 case INITIATE_OCR:
4224 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4225 /*
4226 * DCMD failed from AEN path.
4227 * AEN path already hold reset_mutex to avoid PCI access
4228 * while OCR is in progress.
4229 */
4230 mutex_unlock(&instance->reset_mutex);
4231 megasas_reset_fusion(instance->host,
4232 MFI_IO_TIMEOUT_OCR);
4233 mutex_lock(&instance->reset_mutex);
4234 break;
4235 case KILL_ADAPTER:
4236 megaraid_sas_kill_hba(instance);
4237 break;
4238 case IGNORE_TIMEOUT:
4239 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4240 __func__, __LINE__);
4241 break;
4242 }
4243
4244 break;
4245
4246 case DCMD_SUCCESS:
4247 if (ld_count > instance->fw_supported_vd_count)
4248 break;
bdc6fb8d 4249
51087a86 4250 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 4251
94cd65dd 4252 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB
4253 if (ci->ldList[ld_index].state != 0) {
4254 ids = ci->ldList[ld_index].ref.targetId;
6d40afbc 4255 instance->ld_ids[ids] = ci->ldList[ld_index].ref.targetId;
bdc6fb8d
YB
4256 }
4257 }
6d40afbc
SS
4258
4259 break;
bdc6fb8d
YB
4260 }
4261
6d40afbc
SS
4262 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_LIST), ci, ci_h);
4263
4264 if (ret != DCMD_TIMEOUT)
4265 megasas_return_cmd(instance, cmd);
bdc6fb8d 4266
bdc6fb8d
YB
4267 return ret;
4268}
4269
21c9e160 4270/**
4271 * megasas_ld_list_query - Returns FW's ld_list structure
4272 * @instance: Adapter soft state
4273 * @ld_list: ld_list structure
4274 *
4275 * Issues an internal command (DCMD) to get the FW's controller PD
4276 * list structure. This information is mainly used to find out SYSTEM
4277 * supported by the FW.
4278 */
4279static int
4280megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
4281{
4282 int ret = 0, ld_index = 0, ids = 0;
4283 struct megasas_cmd *cmd;
4284 struct megasas_dcmd_frame *dcmd;
4285 struct MR_LD_TARGETID_LIST *ci;
4286 dma_addr_t ci_h = 0;
94cd65dd 4287 u32 tgtid_count;
21c9e160 4288
4289 cmd = megasas_get_cmd(instance);
4290
4291 if (!cmd) {
1be18254
BH
4292 dev_warn(&instance->pdev->dev,
4293 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160 4294 return -ENOMEM;
4295 }
4296
4297 dcmd = &cmd->frame->dcmd;
4298
4299 ci = pci_alloc_consistent(instance->pdev,
4300 sizeof(struct MR_LD_TARGETID_LIST), &ci_h);
4301
4302 if (!ci) {
1be18254
BH
4303 dev_warn(&instance->pdev->dev,
4304 "Failed to alloc mem for ld_list_query\n");
21c9e160 4305 megasas_return_cmd(instance, cmd);
4306 return -ENOMEM;
4307 }
4308
4309 memset(ci, 0, sizeof(*ci));
4310 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4311
4312 dcmd->mbox.b[0] = query_type;
51087a86
SS
4313 if (instance->supportmax256vd)
4314 dcmd->mbox.b[2] = 1;
21c9e160 4315
4316 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4317 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 4318 dcmd->sge_count = 1;
94cd65dd 4319 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
21c9e160 4320 dcmd->timeout = 0;
94cd65dd
SS
4321 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
4322 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
4323 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4324 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
21c9e160 4325 dcmd->pad_0 = 0;
4326
90dc9d98 4327 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4328 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS
4329 else
4330 ret = megasas_issue_polled(instance, cmd);
21c9e160 4331
6d40afbc
SS
4332 switch (ret) {
4333 case DCMD_FAILED:
4334 dev_info(&instance->pdev->dev,
4335 "DCMD not supported by firmware - %s %d\n",
4336 __func__, __LINE__);
4337 ret = megasas_get_ld_list(instance);
4338 break;
4339 case DCMD_TIMEOUT:
4340 switch (dcmd_timeout_ocr_possible(instance)) {
4341 case INITIATE_OCR:
4342 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4343 /*
4344 * DCMD failed from AEN path.
4345 * AEN path already hold reset_mutex to avoid PCI access
4346 * while OCR is in progress.
4347 */
4348 mutex_unlock(&instance->reset_mutex);
4349 megasas_reset_fusion(instance->host,
4350 MFI_IO_TIMEOUT_OCR);
4351 mutex_lock(&instance->reset_mutex);
4352 break;
4353 case KILL_ADAPTER:
4354 megaraid_sas_kill_hba(instance);
4355 break;
4356 case IGNORE_TIMEOUT:
4357 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4358 __func__, __LINE__);
4359 break;
4360 }
4361
4362 break;
4363 case DCMD_SUCCESS:
4364 tgtid_count = le32_to_cpu(ci->count);
4365
4366 if ((tgtid_count > (instance->fw_supported_vd_count)))
4367 break;
94cd65dd 4368
21c9e160 4369 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 4370 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160 4371 ids = ci->targetId[ld_index];
4372 instance->ld_ids[ids] = ci->targetId[ld_index];
4373 }
4374
6d40afbc 4375 break;
21c9e160 4376 }
4377
4378 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST),
6d40afbc 4379 ci, ci_h);
21c9e160 4380
6d40afbc
SS
4381 if (ret != DCMD_TIMEOUT)
4382 megasas_return_cmd(instance, cmd);
21c9e160 4383
4384 return ret;
4385}
4386
d009b576
SS
4387/*
4388 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4389 * instance : Controller's instance
4390*/
4391static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4392{
4393 struct fusion_context *fusion;
4394 u32 old_map_sz;
4395 u32 new_map_sz;
4396
4397 fusion = instance->ctrl_context;
4398 /* For MFI based controllers return dummy success */
4399 if (!fusion)
4400 return;
4401
4402 instance->supportmax256vd =
4403 instance->ctrl_info->adapterOperations3.supportMaxExtLDs;
4404 /* Below is additional check to address future FW enhancement */
4405 if (instance->ctrl_info->max_lds > 64)
4406 instance->supportmax256vd = 1;
4407
4408 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4409 * MEGASAS_MAX_DEV_PER_CHANNEL;
4410 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4411 * MEGASAS_MAX_DEV_PER_CHANNEL;
4412 if (instance->supportmax256vd) {
4413 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4414 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4415 } else {
4416 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4417 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4418 }
d88da09a
SS
4419
4420 dev_info(&instance->pdev->dev,
4421 "firmware type\t: %s\n",
4422 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4423 "Legacy(64 VD) firmware");
d009b576 4424
da0dc9fb 4425 old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
d009b576
SS
4426 (sizeof(struct MR_LD_SPAN_MAP) *
4427 (instance->fw_supported_vd_count - 1));
da0dc9fb
BH
4428 new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
4429 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP) +
d009b576
SS
4430 (sizeof(struct MR_LD_SPAN_MAP) *
4431 (instance->drv_supported_vd_count - 1));
4432
4433 fusion->max_map_sz = max(old_map_sz, new_map_sz);
4434
4435
4436 if (instance->supportmax256vd)
4437 fusion->current_map_sz = new_map_sz;
4438 else
4439 fusion->current_map_sz = old_map_sz;
d009b576
SS
4440}
4441
c4a3e0a5
BS
4442/**
4443 * megasas_get_controller_info - Returns FW's controller structure
4444 * @instance: Adapter soft state
c4a3e0a5
BS
4445 *
4446 * Issues an internal command (DCMD) to get the FW's controller structure.
4447 * This information is mainly used to find out the maximum IO transfer per
4448 * command supported by the FW.
4449 */
51087a86 4450int
d009b576 4451megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS
4452{
4453 int ret = 0;
4454 struct megasas_cmd *cmd;
4455 struct megasas_dcmd_frame *dcmd;
4456 struct megasas_ctrl_info *ci;
d009b576 4457 struct megasas_ctrl_info *ctrl_info;
c4a3e0a5
BS
4458 dma_addr_t ci_h = 0;
4459
d009b576
SS
4460 ctrl_info = instance->ctrl_info;
4461
c4a3e0a5
BS
4462 cmd = megasas_get_cmd(instance);
4463
4464 if (!cmd) {
1be18254 4465 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS
4466 return -ENOMEM;
4467 }
4468
4469 dcmd = &cmd->frame->dcmd;
4470
4471 ci = pci_alloc_consistent(instance->pdev,
4472 sizeof(struct megasas_ctrl_info), &ci_h);
4473
4474 if (!ci) {
1be18254 4475 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n");
c4a3e0a5
BS
4476 megasas_return_cmd(instance, cmd);
4477 return -ENOMEM;
4478 }
4479
4480 memset(ci, 0, sizeof(*ci));
4481 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4482
4483 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4484 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4485 dcmd->sge_count = 1;
94cd65dd 4486 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4487 dcmd->timeout = 0;
780a3762 4488 dcmd->pad_0 = 0;
94cd65dd
SS
4489 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4490 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
4491 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4492 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info));
51087a86 4493 dcmd->mbox.b[0] = 1;
c4a3e0a5 4494
90dc9d98 4495 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4496 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS
4497 else
4498 ret = megasas_issue_polled(instance, cmd);
4499
6d40afbc
SS
4500 switch (ret) {
4501 case DCMD_SUCCESS:
c4a3e0a5 4502 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
6d40afbc
SS
4503 /* Save required controller information in
4504 * CPU endianness format.
4505 */
d009b576
SS
4506 le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties);
4507 le32_to_cpus((u32 *)&ctrl_info->adapterOperations2);
4508 le32_to_cpus((u32 *)&ctrl_info->adapterOperations3);
6d40afbc
SS
4509
4510 /* Update the latest Ext VD info.
4511 * From Init path, store current firmware details.
4512 * From OCR path, detect any firmware properties changes.
4513 * in case of Firmware upgrade without system reboot.
4514 */
d009b576 4515 megasas_update_ext_vd_details(instance);
3761cb4c 4516 instance->use_seqnum_jbod_fp =
4517 ctrl_info->adapterOperations3.useSeqNumJbodFP;
6d40afbc
SS
4518
4519 /*Check whether controller is iMR or MR */
4026e9aa
SS
4520 instance->is_imr = (ctrl_info->memory_size ? 0 : 1);
4521 dev_info(&instance->pdev->dev,
6d40afbc
SS
4522 "controller type\t: %s(%dMB)\n",
4523 instance->is_imr ? "iMR" : "MR",
4524 le16_to_cpu(ctrl_info->memory_size));
4525
c4bd2654 4526 instance->disableOnlineCtrlReset =
4527 ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset;
3222251d 4528 instance->secure_jbod_support =
4529 ctrl_info->adapterOperations3.supportSecurityonJBOD;
6d40afbc
SS
4530 dev_info(&instance->pdev->dev, "Online Controller Reset(OCR)\t: %s\n",
4531 instance->disableOnlineCtrlReset ? "Disabled" : "Enabled");
3222251d 4532 dev_info(&instance->pdev->dev, "Secure JBOD support\t: %s\n",
4533 instance->secure_jbod_support ? "Yes" : "No");
6d40afbc
SS
4534 break;
4535
4536 case DCMD_TIMEOUT:
4537 switch (dcmd_timeout_ocr_possible(instance)) {
4538 case INITIATE_OCR:
4539 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4540 megasas_reset_fusion(instance->host,
4541 MFI_IO_TIMEOUT_OCR);
4542 break;
4543 case KILL_ADAPTER:
4544 megaraid_sas_kill_hba(instance);
4545 break;
4546 case IGNORE_TIMEOUT:
4547 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4548 __func__, __LINE__);
4549 break;
4550 }
4551 case DCMD_FAILED:
4552 megaraid_sas_kill_hba(instance);
4553 break;
4554
d009b576 4555 }
c4a3e0a5
BS
4556
4557 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
4558 ci, ci_h);
4559
4026e9aa 4560 megasas_return_cmd(instance, cmd);
6d40afbc
SS
4561
4562
c4a3e0a5
BS
4563 return ret;
4564}
4565
fc62b3fc
SS
4566/*
4567 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4568 * to firmware
4569 *
4570 * @instance: Adapter soft state
4571 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4572 MR_CRASH_BUF_TURN_OFF = 0
4573 MR_CRASH_BUF_TURN_ON = 1
4574 * @return 0 on success non-zero on failure.
4575 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4576 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4577 * that driver supports crash dump feature. This DCMD will be sent only if
4578 * crash dump feature is supported by the FW.
4579 *
4580 */
4581int megasas_set_crash_dump_params(struct megasas_instance *instance,
4582 u8 crash_buf_state)
4583{
4584 int ret = 0;
4585 struct megasas_cmd *cmd;
4586 struct megasas_dcmd_frame *dcmd;
4587
4588 cmd = megasas_get_cmd(instance);
4589
4590 if (!cmd) {
4591 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4592 return -ENOMEM;
4593 }
4594
4595
4596 dcmd = &cmd->frame->dcmd;
4597
4598 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4599 dcmd->mbox.b[0] = crash_buf_state;
4600 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4601 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc
SS
4602 dcmd->sge_count = 1;
4603 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
4604 dcmd->timeout = 0;
4605 dcmd->pad_0 = 0;
4606 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4607 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
4608 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h);
4609 dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4610
90dc9d98 4611 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4612 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
fc62b3fc 4613 else
90dc9d98
SS
4614 ret = megasas_issue_polled(instance, cmd);
4615
6d40afbc
SS
4616 if (ret == DCMD_TIMEOUT) {
4617 switch (dcmd_timeout_ocr_possible(instance)) {
4618 case INITIATE_OCR:
4619 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4620 megasas_reset_fusion(instance->host,
4621 MFI_IO_TIMEOUT_OCR);
4622 break;
4623 case KILL_ADAPTER:
4624 megaraid_sas_kill_hba(instance);
4625 break;
4626 case IGNORE_TIMEOUT:
4627 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4628 __func__, __LINE__);
4629 break;
4630 }
4631 } else
4632 megasas_return_cmd(instance, cmd);
4633
fc62b3fc
SS
4634 return ret;
4635}
4636
31ea7088 4637/**
4638 * megasas_issue_init_mfi - Initializes the FW
4639 * @instance: Adapter soft state
4640 *
4641 * Issues the INIT MFI cmd
4642 */
4643static int
4644megasas_issue_init_mfi(struct megasas_instance *instance)
4645{
9ab9ed38 4646 __le32 context;
31ea7088 4647 struct megasas_cmd *cmd;
31ea7088 4648 struct megasas_init_frame *init_frame;
4649 struct megasas_init_queue_info *initq_info;
4650 dma_addr_t init_frame_h;
4651 dma_addr_t initq_info_h;
4652
4653 /*
4654 * Prepare a init frame. Note the init frame points to queue info
4655 * structure. Each frame has SGL allocated after first 64 bytes. For
4656 * this frame - since we don't need any SGL - we use SGL's space as
4657 * queue info structure
4658 *
4659 * We will not get a NULL command below. We just created the pool.
4660 */
4661 cmd = megasas_get_cmd(instance);
4662
4663 init_frame = (struct megasas_init_frame *)cmd->frame;
4664 initq_info = (struct megasas_init_queue_info *)
4665 ((unsigned long)init_frame + 64);
4666
4667 init_frame_h = cmd->frame_phys_addr;
4668 initq_info_h = init_frame_h + 64;
4669
4670 context = init_frame->context;
4671 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4672 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4673 init_frame->context = context;
4674
94cd65dd
SS
4675 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4676 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4677
94cd65dd
SS
4678 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4679 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4680
4681 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4682 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS
4683 init_frame->queue_info_new_phys_addr_lo =
4684 cpu_to_le32(lower_32_bits(initq_info_h));
4685 init_frame->queue_info_new_phys_addr_hi =
4686 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4687
94cd65dd 4688 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4689
4690 /*
4691 * disable the intr before firing the init frame to FW
4692 */
d46a3ad6 4693 instance->instancet->disable_intr(instance);
31ea7088 4694
4695 /*
4696 * Issue the init frame in polled mode
4697 */
4698
4699 if (megasas_issue_polled(instance, cmd)) {
1be18254 4700 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4701 megasas_return_cmd(instance, cmd);
4702 goto fail_fw_init;
4703 }
4704
4705 megasas_return_cmd(instance, cmd);
4706
4707 return 0;
4708
4709fail_fw_init:
4710 return -EINVAL;
4711}
4712
cd50ba8e 4713static u32
4714megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4715{
cd50ba8e 4716 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS
4717 u32 context_sz;
4718 u32 reply_q_sz;
c4a3e0a5
BS
4719
4720 reg_set = instance->reg_set;
4721
c4a3e0a5
BS
4722 /*
4723 * Get various operational parameters from status register
4724 */
1341c939 4725 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP
4726 /*
4727 * Reduce the max supported cmds by 1. This is to ensure that the
4728 * reply_q_sz (1 more than the max cmd that driver may send)
4729 * does not exceed max cmds that the FW can support
4730 */
4731 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4732 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4733 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4734 0x10;
f26ac3a1
SS
4735 /*
4736 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4737 * are reserved for IOCTL + driver's internal DCMDs.
4738 */
4739 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4740 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4741 instance->max_scsi_cmds = (instance->max_fw_cmds -
4742 MEGASAS_SKINNY_INT_CMDS);
4743 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4744 } else {
4745 instance->max_scsi_cmds = (instance->max_fw_cmds -
4746 MEGASAS_INT_CMDS);
4747 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4748 }
4749
308ec459 4750 instance->cur_can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS
4751 /*
4752 * Create a pool of commands
4753 */
4754 if (megasas_alloc_cmds(instance))
4755 goto fail_alloc_cmds;
4756
4757 /*
4758 * Allocate memory for reply queue. Length of reply queue should
4759 * be _one_ more than the maximum commands handled by the firmware.
4760 *
4761 * Note: When FW completes commands, it places corresponding contex
4762 * values in this circular reply queue. This circular queue is a fairly
4763 * typical producer-consumer queue. FW is the producer (of completed
4764 * commands) and the driver is the consumer.
4765 */
4766 context_sz = sizeof(u32);
4767 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4768
4769 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4770 reply_q_sz,
4771 &instance->reply_queue_h);
4772
4773 if (!instance->reply_queue) {
1be18254 4774 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS
4775 goto fail_reply_queue;
4776 }
4777
31ea7088 4778 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4779 goto fail_fw_init;
c4a3e0a5 4780
d009b576 4781 if (megasas_get_ctrl_info(instance)) {
51087a86
SS
4782 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4783 "Fail from %s %d\n", instance->unique_id,
4784 __func__, __LINE__);
4785 goto fail_fw_init;
4786 }
4787
39a98554 4788 instance->fw_support_ieee = 0;
4789 instance->fw_support_ieee =
4790 (instance->instancet->read_fw_status_reg(reg_set) &
4791 0x04000000);
4792
1be18254 4793 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4794 instance->fw_support_ieee);
4795
4796 if (instance->fw_support_ieee)
4797 instance->flag_ieee = 1;
4798
cd50ba8e 4799 return 0;
4800
4801fail_fw_init:
4802
4803 pci_free_consistent(instance->pdev, reply_q_sz,
4804 instance->reply_queue, instance->reply_queue_h);
4805fail_reply_queue:
4806 megasas_free_cmds(instance);
4807
4808fail_alloc_cmds:
cd50ba8e 4809 return 1;
4810}
4811
d3557fc8
SS
4812/*
4813 * megasas_setup_irqs_msix - register legacy interrupts.
4814 * @instance: Adapter soft state
4815 *
4816 * Do not enable interrupt, only setup ISRs.
4817 *
4818 * Return 0 on success.
4819 */
4820static int
4821megasas_setup_irqs_ioapic(struct megasas_instance *instance)
4822{
4823 struct pci_dev *pdev;
4824
4825 pdev = instance->pdev;
4826 instance->irq_context[0].instance = instance;
4827 instance->irq_context[0].MSIxIndex = 0;
4828 if (request_irq(pdev->irq, instance->instancet->service_isr,
4829 IRQF_SHARED, "megasas", &instance->irq_context[0])) {
4830 dev_err(&instance->pdev->dev,
4831 "Failed to register IRQ from %s %d\n",
4832 __func__, __LINE__);
4833 return -1;
4834 }
4835 return 0;
4836}
4837
4838/**
4839 * megasas_setup_irqs_msix - register MSI-x interrupts.
4840 * @instance: Adapter soft state
4841 * @is_probe: Driver probe check
4842 *
4843 * Do not enable interrupt, only setup ISRs.
4844 *
4845 * Return 0 on success.
4846 */
4847static int
4848megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
4849{
4850 int i, j, cpu;
4851 struct pci_dev *pdev;
4852
4853 pdev = instance->pdev;
4854
4855 /* Try MSI-x */
4856 cpu = cpumask_first(cpu_online_mask);
4857 for (i = 0; i < instance->msix_vectors; i++) {
4858 instance->irq_context[i].instance = instance;
4859 instance->irq_context[i].MSIxIndex = i;
4860 if (request_irq(instance->msixentry[i].vector,
4861 instance->instancet->service_isr, 0, "megasas",
4862 &instance->irq_context[i])) {
4863 dev_err(&instance->pdev->dev,
4864 "Failed to register IRQ for vector %d.\n", i);
4865 for (j = 0; j < i; j++) {
4866 if (smp_affinity_enable)
4867 irq_set_affinity_hint(
4868 instance->msixentry[j].vector, NULL);
4869 free_irq(instance->msixentry[j].vector,
4870 &instance->irq_context[j]);
4871 }
4872 /* Retry irq register for IO_APIC*/
4873 instance->msix_vectors = 0;
4874 if (is_probe)
4875 return megasas_setup_irqs_ioapic(instance);
4876 else
4877 return -1;
4878 }
4879 if (smp_affinity_enable) {
4880 if (irq_set_affinity_hint(instance->msixentry[i].vector,
4881 get_cpu_mask(cpu)))
4882 dev_err(&instance->pdev->dev,
4883 "Failed to set affinity hint"
4884 " for cpu %d\n", cpu);
4885 cpu = cpumask_next(cpu, cpu_online_mask);
4886 }
4887 }
4888 return 0;
4889}
4890
4891/*
4892 * megasas_destroy_irqs- unregister interrupts.
4893 * @instance: Adapter soft state
4894 * return: void
4895 */
4896static void
4897megasas_destroy_irqs(struct megasas_instance *instance) {
4898
4899 int i;
4900
4901 if (instance->msix_vectors)
4902 for (i = 0; i < instance->msix_vectors; i++) {
4903 if (smp_affinity_enable)
4904 irq_set_affinity_hint(
4905 instance->msixentry[i].vector, NULL);
4906 free_irq(instance->msixentry[i].vector,
4907 &instance->irq_context[i]);
4908 }
4909 else
4910 free_irq(instance->pdev->irq, &instance->irq_context[0]);
4911}
4912
3761cb4c 4913/**
4914 * megasas_setup_jbod_map - setup jbod map for FP seq_number.
4915 * @instance: Adapter soft state
4916 * @is_probe: Driver probe check
4917 *
4918 * Return 0 on success.
4919 */
4920void
4921megasas_setup_jbod_map(struct megasas_instance *instance)
4922{
4923 int i;
4924 struct fusion_context *fusion = instance->ctrl_context;
4925 u32 pd_seq_map_sz;
4926
4927 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
4928 (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1));
4929
4930 if (reset_devices || !fusion ||
4931 !instance->ctrl_info->adapterOperations3.useSeqNumJbodFP) {
4932 dev_info(&instance->pdev->dev,
4933 "Jbod map is not supported %s %d\n",
4934 __func__, __LINE__);
4935 instance->use_seqnum_jbod_fp = false;
4936 return;
4937 }
4938
4939 if (fusion->pd_seq_sync[0])
4940 goto skip_alloc;
4941
4942 for (i = 0; i < JBOD_MAPS_COUNT; i++) {
4943 fusion->pd_seq_sync[i] = dma_alloc_coherent
4944 (&instance->pdev->dev, pd_seq_map_sz,
4945 &fusion->pd_seq_phys[i], GFP_KERNEL);
4946 if (!fusion->pd_seq_sync[i]) {
4947 dev_err(&instance->pdev->dev,
4948 "Failed to allocate memory from %s %d\n",
4949 __func__, __LINE__);
4950 if (i == 1) {
4951 dma_free_coherent(&instance->pdev->dev,
4952 pd_seq_map_sz, fusion->pd_seq_sync[0],
4953 fusion->pd_seq_phys[0]);
4954 fusion->pd_seq_sync[0] = NULL;
4955 }
4956 instance->use_seqnum_jbod_fp = false;
4957 return;
4958 }
4959 }
4960
4961skip_alloc:
4962 if (!megasas_sync_pd_seq_num(instance, false) &&
4963 !megasas_sync_pd_seq_num(instance, true))
4964 instance->use_seqnum_jbod_fp = true;
4965 else
4966 instance->use_seqnum_jbod_fp = false;
4967}
4968
cd50ba8e 4969/**
4970 * megasas_init_fw - Initializes the FW
4971 * @instance: Adapter soft state
4972 *
4973 * This is the main function for initializing firmware
4974 */
4975
4976static int megasas_init_fw(struct megasas_instance *instance)
4977{
4978 u32 max_sectors_1;
4979 u32 max_sectors_2;
d46a3ad6 4980 u32 tmp_sectors, msix_enable, scratch_pad_2;
11f8a7b3 4981 resource_size_t base_addr;
cd50ba8e 4982 struct megasas_register_set __iomem *reg_set;
51087a86 4983 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 4984 unsigned long bar_list;
d46a3ad6 4985 int i, loop, fw_msix_count = 0;
229fe47c 4986 struct IOV_111 *iovPtr;
5a8cb85b 4987 struct fusion_context *fusion;
4988
4989 fusion = instance->ctrl_context;
cd50ba8e 4990
4991 /* Find first memory bar */
4992 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
4993 instance->bar = find_first_bit(&bar_list, sizeof(unsigned long));
cd50ba8e 4994 if (pci_request_selected_regions(instance->pdev, instance->bar,
4995 "megasas: LSI")) {
1be18254 4996 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e 4997 return -EBUSY;
4998 }
4999
11f8a7b3
BC
5000 base_addr = pci_resource_start(instance->pdev, instance->bar);
5001 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e 5002
5003 if (!instance->reg_set) {
1be18254 5004 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e 5005 goto fail_ioremap;
5006 }
5007
5008 reg_set = instance->reg_set;
5009
5010 switch (instance->pdev->device) {
9c915a8c 5011 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5012 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5013 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5014 case PCI_DEVICE_ID_LSI_FURY:
90c204bc 5015 case PCI_DEVICE_ID_LSI_INTRUDER:
5016 case PCI_DEVICE_ID_LSI_INTRUDER_24:
7364d34b 5017 case PCI_DEVICE_ID_LSI_CUTLASS_52:
5018 case PCI_DEVICE_ID_LSI_CUTLASS_53:
9c915a8c 5019 instance->instancet = &megasas_instance_template_fusion;
5020 break;
cd50ba8e 5021 case PCI_DEVICE_ID_LSI_SAS1078R:
5022 case PCI_DEVICE_ID_LSI_SAS1078DE:
5023 instance->instancet = &megasas_instance_template_ppc;
5024 break;
5025 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
5026 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
5027 instance->instancet = &megasas_instance_template_gen2;
5028 break;
5029 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
5030 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
5031 instance->instancet = &megasas_instance_template_skinny;
5032 break;
5033 case PCI_DEVICE_ID_LSI_SAS1064R:
5034 case PCI_DEVICE_ID_DELL_PERC5:
5035 default:
5036 instance->instancet = &megasas_instance_template_xscale;
aed335ee 5037 instance->allow_fw_scan = 1;
cd50ba8e 5038 break;
5039 }
5040
6431f5d7
SS
5041 if (megasas_transition_to_ready(instance, 0)) {
5042 atomic_set(&instance->fw_reset_no_pci_access, 1);
5043 instance->instancet->adp_reset
5044 (instance, instance->reg_set);
5045 atomic_set(&instance->fw_reset_no_pci_access, 0);
5046 dev_info(&instance->pdev->dev,
1be18254 5047 "FW restarted successfully from %s!\n",
6431f5d7
SS
5048 __func__);
5049
5050 /*waitting for about 30 second before retry*/
5051 ssleep(30);
5052
5053 if (megasas_transition_to_ready(instance, 0))
5054 goto fail_ready_state;
5055 }
cd50ba8e 5056
d46a3ad6
SS
5057 /*
5058 * MSI-X host index 0 is common for all adapter.
5059 * It is used for all MPT based Adapters.
5060 */
5061 instance->reply_post_host_index_addr[0] =
8a232bb3 5062 (u32 __iomem *)((u8 __iomem *)instance->reg_set +
d46a3ad6
SS
5063 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
5064
3f1abce4 5065 /* Check if MSI-X is supported while in ready state */
5066 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
5067 0x4000000) >> 0x1a;
c8e858fe 5068 if (msix_enable && !msix_disable) {
d46a3ad6
SS
5069 scratch_pad_2 = readl
5070 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 5071 /* Check max MSI-X vectors */
5a8cb85b 5072 if (fusion) {
5073 if (fusion->adapter_type == THUNDERBOLT_SERIES) { /* Thunderbolt Series*/
5074 instance->msix_vectors = (scratch_pad_2
5075 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
5076 fw_msix_count = instance->msix_vectors;
5077 } else { /* Invader series supports more than 8 MSI-x vectors*/
5078 instance->msix_vectors = ((scratch_pad_2
5079 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
5080 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
179ac142
SS
5081 if (rdpq_enable)
5082 instance->is_rdpq = (scratch_pad_2 & MR_RDPQ_MODE_OFFSET) ?
5083 1 : 0;
5a8cb85b 5084 fw_msix_count = instance->msix_vectors;
5085 /* Save 1-15 reply post index address to local memory
5086 * Index 0 is already saved from reg offset
5087 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
5088 */
5089 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
5090 instance->reply_post_host_index_addr[loop] =
5091 (u32 __iomem *)
5092 ((u8 __iomem *)instance->reg_set +
5093 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
5094 + (loop * 0x10));
5095 }
d46a3ad6
SS
5096 }
5097 if (msix_vectors)
5098 instance->msix_vectors = min(msix_vectors,
5099 instance->msix_vectors);
5a8cb85b 5100 } else /* MFI adapters */
c8e858fe 5101 instance->msix_vectors = 1;
5102 /* Don't bother allocating more MSI-X vectors than cpus */
5103 instance->msix_vectors = min(instance->msix_vectors,
5104 (unsigned int)num_online_cpus());
5105 for (i = 0; i < instance->msix_vectors; i++)
5106 instance->msixentry[i].entry = i;
8ae80ed1
AG
5107 i = pci_enable_msix_range(instance->pdev, instance->msixentry,
5108 1, instance->msix_vectors);
c12de882 5109 if (i > 0)
8ae80ed1
AG
5110 instance->msix_vectors = i;
5111 else
c8e858fe 5112 instance->msix_vectors = 0;
5113 }
3f1abce4 5114
258c3af2
TH
5115 dev_info(&instance->pdev->dev,
5116 "firmware supports msix\t: (%d)", fw_msix_count);
5117 dev_info(&instance->pdev->dev,
5118 "current msix/online cpus\t: (%d/%d)\n",
5119 instance->msix_vectors, (unsigned int)num_online_cpus());
179ac142
SS
5120 dev_info(&instance->pdev->dev,
5121 "RDPQ mode\t: (%s)\n", instance->is_rdpq ? "enabled" : "disabled");
d3557fc8 5122
91626c27 5123 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5124 (unsigned long)instance);
5125
258c3af2
TH
5126 if (instance->msix_vectors ?
5127 megasas_setup_irqs_msix(instance, 1) :
5128 megasas_setup_irqs_ioapic(instance))
5129 goto fail_setup_irqs;
3f1abce4 5130
51087a86
SS
5131 instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info),
5132 GFP_KERNEL);
5133 if (instance->ctrl_info == NULL)
5134 goto fail_init_adapter;
5135
5136 /*
5137 * Below are default value for legacy Firmware.
5138 * non-fusion based controllers
5139 */
5140 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
5141 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e 5142 /* Get operational params, sge flags, send init cmd to controller */
5143 if (instance->instancet->init_adapter(instance))
eb1b1237 5144 goto fail_init_adapter;
cd50ba8e 5145
258c3af2 5146
d3557fc8 5147 instance->instancet->enable_intr(instance);
cd50ba8e 5148
1be18254 5149 dev_err(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 5150
3761cb4c 5151 megasas_setup_jbod_map(instance);
5152
39a98554 5153 /** for passthrough
da0dc9fb
BH
5154 * the following function will get the PD LIST.
5155 */
5156 memset(instance->pd_list, 0,
81e403ce 5157 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 5158 if (megasas_get_pd_list(instance) < 0) {
1be18254 5159 dev_err(&instance->pdev->dev, "failed to get PD list\n");
d3557fc8 5160 goto fail_get_pd_list;
58968fc8 5161 }
81e403ce 5162
bdc6fb8d 5163 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
21c9e160 5164 if (megasas_ld_list_query(instance,
5165 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
5166 megasas_get_ld_list(instance);
bdc6fb8d 5167
c4a3e0a5
BS
5168 /*
5169 * Compute the max allowed sectors per IO: The controller info has two
5170 * limits on max sectors. Driver should use the minimum of these two.
5171 *
5172 * 1 << stripe_sz_ops.min = max sectors per strip
5173 *
5174 * Note that older firmwares ( < FW ver 30) didn't report information
5175 * to calculate max_sectors_1. So the number ended up as zero always.
5176 */
14faea9f 5177 tmp_sectors = 0;
51087a86 5178 ctrl_info = instance->ctrl_info;
c4a3e0a5 5179
51087a86
SS
5180 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
5181 le16_to_cpu(ctrl_info->max_strips_per_io);
5182 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 5183
da0dc9fb 5184 tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2);
bc93d425 5185
8f67c8c5
SS
5186 instance->peerIsPresent = ctrl_info->cluster.peerIsPresent;
5187 instance->passive = ctrl_info->cluster.passive;
5188 memcpy(instance->clusterId, ctrl_info->clusterId, sizeof(instance->clusterId));
51087a86
SS
5189 instance->UnevenSpanSupport =
5190 ctrl_info->adapterOperations2.supportUnevenSpans;
5191 if (instance->UnevenSpanSupport) {
5192 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS
5193 if (MR_ValidateMapInfo(instance))
5194 fusion->fast_path_io = 1;
5195 else
5196 fusion->fast_path_io = 0;
fc62b3fc 5197
51087a86
SS
5198 }
5199 if (ctrl_info->host_interface.SRIOV) {
92bb6505 5200 instance->requestorId = ctrl_info->iov.requestorId;
5201 if (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) {
5202 if (!ctrl_info->adapterOperations2.activePassive)
5203 instance->PlasmaFW111 = 1;
5204
5205 dev_info(&instance->pdev->dev, "SR-IOV: firmware type: %s\n",
5206 instance->PlasmaFW111 ? "1.11" : "new");
5207
5208 if (instance->PlasmaFW111) {
5209 iovPtr = (struct IOV_111 *)
5210 ((unsigned char *)ctrl_info + IOV_111_OFFSET);
5211 instance->requestorId = iovPtr->requestorId;
5212 }
fc62b3fc 5213 }
92bb6505 5214 dev_info(&instance->pdev->dev, "SRIOV: VF requestorId %d\n",
5215 instance->requestorId);
51087a86
SS
5216 }
5217
51087a86
SS
5218 instance->crash_dump_fw_support =
5219 ctrl_info->adapterOperations3.supportCrashDump;
5220 instance->crash_dump_drv_support =
5221 (instance->crash_dump_fw_support &&
5222 instance->crash_dump_buf);
d88da09a 5223 if (instance->crash_dump_drv_support)
51087a86
SS
5224 megasas_set_crash_dump_params(instance,
5225 MR_CRASH_BUF_TURN_OFF);
5226
d88da09a 5227 else {
51087a86
SS
5228 if (instance->crash_dump_buf)
5229 pci_free_consistent(instance->pdev,
5230 CRASH_DMA_BUF_SIZE,
5231 instance->crash_dump_buf,
5232 instance->crash_dump_h);
5233 instance->crash_dump_buf = NULL;
14faea9f 5234 }
7497cde8 5235
d88da09a
SS
5236
5237 dev_info(&instance->pdev->dev,
5238 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
5239 le16_to_cpu(ctrl_info->pci.vendor_id),
5240 le16_to_cpu(ctrl_info->pci.device_id),
5241 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
5242 le16_to_cpu(ctrl_info->pci.sub_device_id));
5243 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
5244 instance->UnevenSpanSupport ? "yes" : "no");
d88da09a
SS
5245 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
5246 instance->crash_dump_drv_support ? "yes" : "no");
3761cb4c 5247 dev_info(&instance->pdev->dev, "jbod sync map : %s\n",
5248 instance->use_seqnum_jbod_fp ? "yes" : "no");
d88da09a
SS
5249
5250
14faea9f 5251 instance->max_sectors_per_req = instance->max_num_sge *
357ae967 5252 SGE_BUFFER_SIZE / 512;
14faea9f 5253 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
5254 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 5255
ae09a6c1
SS
5256 /* Check for valid throttlequeuedepth module parameter */
5257 if (throttlequeuedepth &&
5258 throttlequeuedepth <= instance->max_scsi_cmds)
5259 instance->throttlequeuedepth = throttlequeuedepth;
5260 else
5261 instance->throttlequeuedepth =
5262 MEGASAS_THROTTLE_QUEUE_DEPTH;
5263
e3d178ca
SS
5264 if (resetwaittime > MEGASAS_RESET_WAIT_TIME)
5265 resetwaittime = MEGASAS_RESET_WAIT_TIME;
5266
5267 if ((scmd_timeout < 10) || (scmd_timeout > MEGASAS_DEFAULT_CMD_TIMEOUT))
5268 scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
ad84db2e 5269
229fe47c 5270 /* Launch SR-IOV heartbeat timer */
5271 if (instance->requestorId) {
5272 if (!megasas_sriov_start_heartbeat(instance, 1))
5273 megasas_start_timer(instance,
5274 &instance->sriov_heartbeat_timer,
5275 megasas_sriov_heartbeat_handler,
5276 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5277 else
5278 instance->skip_heartbeat_timer_del = 1;
5279 }
5280
c4a3e0a5
BS
5281 return 0;
5282
d3557fc8
SS
5283fail_get_pd_list:
5284 instance->instancet->disable_intr(instance);
eb1b1237 5285fail_init_adapter:
d3557fc8
SS
5286 megasas_destroy_irqs(instance);
5287fail_setup_irqs:
5288 if (instance->msix_vectors)
5289 pci_disable_msix(instance->pdev);
5290 instance->msix_vectors = 0;
cd50ba8e 5291fail_ready_state:
51087a86
SS
5292 kfree(instance->ctrl_info);
5293 instance->ctrl_info = NULL;
c4a3e0a5
BS
5294 iounmap(instance->reg_set);
5295
5296 fail_ioremap:
b6d5d880 5297 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS
5298
5299 return -EINVAL;
5300}
5301
5302/**
5303 * megasas_release_mfi - Reverses the FW initialization
4b63b286 5304 * @instance: Adapter soft state
c4a3e0a5
BS
5305 */
5306static void megasas_release_mfi(struct megasas_instance *instance)
5307{
9c915a8c 5308 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 5309
9c915a8c 5310 if (instance->reply_queue)
5311 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS
5312 instance->reply_queue, instance->reply_queue_h);
5313
5314 megasas_free_cmds(instance);
5315
5316 iounmap(instance->reg_set);
5317
b6d5d880 5318 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS
5319}
5320
5321/**
5322 * megasas_get_seq_num - Gets latest event sequence numbers
5323 * @instance: Adapter soft state
5324 * @eli: FW event log sequence numbers information
5325 *
5326 * FW maintains a log of all events in a non-volatile area. Upper layers would
5327 * usually find out the latest sequence number of the events, the seq number at
5328 * the boot etc. They would "read" all the events below the latest seq number
5329 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
5330 * number), they would subsribe to AEN (asynchronous event notification) and
5331 * wait for the events to happen.
5332 */
5333static int
5334megasas_get_seq_num(struct megasas_instance *instance,
5335 struct megasas_evt_log_info *eli)
5336{
5337 struct megasas_cmd *cmd;
5338 struct megasas_dcmd_frame *dcmd;
5339 struct megasas_evt_log_info *el_info;
5340 dma_addr_t el_info_h = 0;
5341
5342 cmd = megasas_get_cmd(instance);
5343
5344 if (!cmd) {
5345 return -ENOMEM;
5346 }
5347
5348 dcmd = &cmd->frame->dcmd;
5349 el_info = pci_alloc_consistent(instance->pdev,
5350 sizeof(struct megasas_evt_log_info),
5351 &el_info_h);
5352
5353 if (!el_info) {
5354 megasas_return_cmd(instance, cmd);
5355 return -ENOMEM;
5356 }
5357
5358 memset(el_info, 0, sizeof(*el_info));
5359 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5360
5361 dcmd->cmd = MFI_CMD_DCMD;
5362 dcmd->cmd_status = 0x0;
5363 dcmd->sge_count = 1;
94cd65dd 5364 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5365 dcmd->timeout = 0;
780a3762 5366 dcmd->pad_0 = 0;
94cd65dd
SS
5367 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
5368 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
5369 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h);
5370 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info));
c4a3e0a5 5371
6d40afbc
SS
5372 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS) ==
5373 DCMD_SUCCESS) {
cfbe7554
SS
5374 /*
5375 * Copy the data back into callers buffer
5376 */
48100b0e
CH
5377 eli->newest_seq_num = el_info->newest_seq_num;
5378 eli->oldest_seq_num = el_info->oldest_seq_num;
5379 eli->clear_seq_num = el_info->clear_seq_num;
5380 eli->shutdown_seq_num = el_info->shutdown_seq_num;
5381 eli->boot_seq_num = el_info->boot_seq_num;
6d40afbc
SS
5382 } else
5383 dev_err(&instance->pdev->dev, "DCMD failed "
5384 "from %s\n", __func__);
c4a3e0a5
BS
5385
5386 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
5387 el_info, el_info_h);
5388
4026e9aa 5389 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS
5390
5391 return 0;
5392}
5393
5394/**
5395 * megasas_register_aen - Registers for asynchronous event notification
5396 * @instance: Adapter soft state
5397 * @seq_num: The starting sequence number
5398 * @class_locale: Class of the event
5399 *
5400 * This function subscribes for AEN for events beyond the @seq_num. It requests
5401 * to be notified if and only if the event is of type @class_locale
5402 */
5403static int
5404megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
5405 u32 class_locale_word)
5406{
5407 int ret_val;
5408 struct megasas_cmd *cmd;
5409 struct megasas_dcmd_frame *dcmd;
5410 union megasas_evt_class_locale curr_aen;
5411 union megasas_evt_class_locale prev_aen;
5412
5413 /*
5414 * If there an AEN pending already (aen_cmd), check if the
5415 * class_locale of that pending AEN is inclusive of the new
5416 * AEN request we currently have. If it is, then we don't have
5417 * to do anything. In other words, whichever events the current
5418 * AEN request is subscribing to, have already been subscribed
5419 * to.
5420 *
5421 * If the old_cmd is _not_ inclusive, then we have to abort
5422 * that command, form a class_locale that is superset of both
5423 * old and current and re-issue to the FW
5424 */
5425
5426 curr_aen.word = class_locale_word;
5427
5428 if (instance->aen_cmd) {
5429
a9555534
CH
5430 prev_aen.word =
5431 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5
BS
5432
5433 /*
5434 * A class whose enum value is smaller is inclusive of all
5435 * higher values. If a PROGRESS (= -1) was previously
5436 * registered, then a new registration requests for higher
5437 * classes need not be sent to FW. They are automatically
5438 * included.
5439 *
5440 * Locale numbers don't have such hierarchy. They are bitmap
5441 * values
5442 */
5443 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 5444 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS
5445 curr_aen.members.locale)) {
5446 /*
5447 * Previously issued event registration includes
5448 * current request. Nothing to do.
5449 */
5450 return 0;
5451 } else {
3993a862 5452 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS
5453
5454 if (prev_aen.members.class < curr_aen.members.class)
5455 curr_aen.members.class = prev_aen.members.class;
5456
5457 instance->aen_cmd->abort_aen = 1;
5458 ret_val = megasas_issue_blocked_abort_cmd(instance,
5459 instance->
cfbe7554 5460 aen_cmd, 30);
c4a3e0a5
BS
5461
5462 if (ret_val) {
1be18254 5463 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS
5464 "previous AEN command\n");
5465 return ret_val;
5466 }
5467 }
5468 }
5469
5470 cmd = megasas_get_cmd(instance);
5471
5472 if (!cmd)
5473 return -ENOMEM;
5474
5475 dcmd = &cmd->frame->dcmd;
5476
5477 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
5478
5479 /*
5480 * Prepare DCMD for aen registration
5481 */
5482 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5483
5484 dcmd->cmd = MFI_CMD_DCMD;
5485 dcmd->cmd_status = 0x0;
5486 dcmd->sge_count = 1;
94cd65dd 5487 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5488 dcmd->timeout = 0;
780a3762 5489 dcmd->pad_0 = 0;
94cd65dd
SS
5490 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
5491 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
5492 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 5493 instance->last_seq_num = seq_num;
94cd65dd
SS
5494 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
5495 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h);
5496 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail));
c4a3e0a5 5497
f4c9a131
YB
5498 if (instance->aen_cmd != NULL) {
5499 megasas_return_cmd(instance, cmd);
5500 return 0;
5501 }
5502
c4a3e0a5
BS
5503 /*
5504 * Store reference to the cmd used to register for AEN. When an
5505 * application wants us to register for AEN, we have to abort this
5506 * cmd and re-register with a new EVENT LOCALE supplied by that app
5507 */
5508 instance->aen_cmd = cmd;
5509
5510 /*
5511 * Issue the aen registration frame
5512 */
9c915a8c 5513 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS
5514
5515 return 0;
5516}
5517
5518/**
5519 * megasas_start_aen - Subscribes to AEN during driver load time
5520 * @instance: Adapter soft state
5521 */
5522static int megasas_start_aen(struct megasas_instance *instance)
5523{
5524 struct megasas_evt_log_info eli;
5525 union megasas_evt_class_locale class_locale;
5526
5527 /*
5528 * Get the latest sequence number from FW
5529 */
5530 memset(&eli, 0, sizeof(eli));
5531
5532 if (megasas_get_seq_num(instance, &eli))
5533 return -1;
5534
5535 /*
5536 * Register AEN with FW for latest sequence number plus 1
5537 */
5538 class_locale.members.reserved = 0;
5539 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5540 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5541
94cd65dd 5542 return megasas_register_aen(instance,
48100b0e 5543 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5544 class_locale.word);
c4a3e0a5
BS
5545}
5546
5547/**
5548 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5549 * @instance: Adapter soft state
5550 */
5551static int megasas_io_attach(struct megasas_instance *instance)
5552{
5553 struct Scsi_Host *host = instance->host;
5554
5555 /*
5556 * Export parameters required by SCSI mid-layer
5557 */
5558 host->irq = instance->pdev->irq;
5559 host->unique_id = instance->unique_id;
ae09a6c1 5560 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS
5561 host->this_id = instance->init_id;
5562 host->sg_tablesize = instance->max_num_sge;
42a8d2b3 5563
5564 if (instance->fw_support_ieee)
5565 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5566
1fd10685
YB
5567 /*
5568 * Check if the module parameter value for max_sectors can be used
5569 */
5570 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5571 instance->max_sectors_per_req = max_sectors;
5572 else {
5573 if (max_sectors) {
5574 if (((instance->pdev->device ==
5575 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5576 (instance->pdev->device ==
5577 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5578 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5579 instance->max_sectors_per_req = max_sectors;
5580 } else {
1be18254 5581 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB
5582 "and <= %d (or < 1MB for GEN2 controller)\n",
5583 instance->max_sectors_per_req);
5584 }
5585 }
5586 }
5587
c4a3e0a5 5588 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5589 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS
5590 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5591 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5592 host->max_lun = MEGASAS_MAX_LUN;
122da302 5593 host->max_cmd_len = 16;
c4a3e0a5 5594
9c915a8c 5595 /* Fusion only supports host reset */
5a8cb85b 5596 if (instance->ctrl_context) {
9c915a8c 5597 host->hostt->eh_device_reset_handler = NULL;
5598 host->hostt->eh_bus_reset_handler = NULL;
18365b13
SS
5599 host->hostt->eh_target_reset_handler = megasas_reset_target_fusion;
5600 host->hostt->eh_abort_handler = megasas_task_abort_fusion;
9c915a8c 5601 }
5602
c4a3e0a5
BS
5603 /*
5604 * Notify the mid-layer about the new controller
5605 */
5606 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS
5607 dev_err(&instance->pdev->dev,
5608 "Failed to add host from %s %d\n",
5609 __func__, __LINE__);
c4a3e0a5
BS
5610 return -ENODEV;
5611 }
5612
c4a3e0a5
BS
5613 return 0;
5614}
5615
31ea7088 5616static int
5617megasas_set_dma_mask(struct pci_dev *pdev)
5618{
5619 /*
da0dc9fb 5620 * All our controllers are capable of performing 64-bit DMA
31ea7088 5621 */
5622 if (IS_DMA64) {
6a35528a 5623 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
31ea7088 5624
284901a9 5625 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5626 goto fail_set_dma_mask;
5627 }
5628 } else {
284901a9 5629 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5630 goto fail_set_dma_mask;
5631 }
46de63e2
SS
5632 /*
5633 * Ensure that all data structures are allocated in 32-bit
5634 * memory.
5635 */
5636 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
5637 /* Try 32bit DMA mask and 32 bit Consistent dma mask */
5638 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
5639 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
5640 dev_info(&pdev->dev, "set 32bit DMA mask"
5641 "and 32 bit consistent mask\n");
5642 else
5643 goto fail_set_dma_mask;
5644 }
94cd65dd 5645
31ea7088 5646 return 0;
5647
5648fail_set_dma_mask:
5649 return 1;
5650}
5651
c4a3e0a5
BS
5652/**
5653 * megasas_probe_one - PCI hotplug entry point
5654 * @pdev: PCI device structure
0d49016b 5655 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 5656 */
6f039790
GKH
5657static int megasas_probe_one(struct pci_dev *pdev,
5658 const struct pci_device_id *id)
c4a3e0a5 5659{
d3557fc8 5660 int rval, pos;
c4a3e0a5
BS
5661 struct Scsi_Host *host;
5662 struct megasas_instance *instance;
66192dfe 5663 u16 control = 0;
51087a86 5664 struct fusion_context *fusion = NULL;
66192dfe 5665
5666 /* Reset MSI-X in the kdump kernel */
5667 if (reset_devices) {
5668 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
5669 if (pos) {
99369065 5670 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe 5671 &control);
5672 if (control & PCI_MSIX_FLAGS_ENABLE) {
5673 dev_info(&pdev->dev, "resetting MSI-X\n");
5674 pci_write_config_word(pdev,
99369065 5675 pos + PCI_MSIX_FLAGS,
66192dfe 5676 control &
5677 ~PCI_MSIX_FLAGS_ENABLE);
5678 }
5679 }
5680 }
c4a3e0a5 5681
c4a3e0a5
BS
5682 /*
5683 * PCI prepping: enable device set bus mastering and dma mask
5684 */
aeab3fd7 5685 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS
5686
5687 if (rval) {
5688 return rval;
5689 }
5690
5691 pci_set_master(pdev);
5692
31ea7088 5693 if (megasas_set_dma_mask(pdev))
5694 goto fail_set_dma_mask;
c4a3e0a5
BS
5695
5696 host = scsi_host_alloc(&megasas_template,
5697 sizeof(struct megasas_instance));
5698
5699 if (!host) {
1be18254 5700 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS
5701 goto fail_alloc_instance;
5702 }
5703
5704 instance = (struct megasas_instance *)host->hostdata;
5705 memset(instance, 0, sizeof(*instance));
da0dc9fb 5706 atomic_set(&instance->fw_reset_no_pci_access, 0);
9c915a8c 5707 instance->pdev = pdev;
c4a3e0a5 5708
9c915a8c 5709 switch (instance->pdev->device) {
5710 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5711 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5712 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5713 case PCI_DEVICE_ID_LSI_FURY:
90c204bc 5714 case PCI_DEVICE_ID_LSI_INTRUDER:
5715 case PCI_DEVICE_ID_LSI_INTRUDER_24:
7364d34b 5716 case PCI_DEVICE_ID_LSI_CUTLASS_52:
5717 case PCI_DEVICE_ID_LSI_CUTLASS_53:
9c915a8c 5718 {
51087a86
SS
5719 instance->ctrl_context_pages =
5720 get_order(sizeof(struct fusion_context));
5721 instance->ctrl_context = (void *)__get_free_pages(GFP_KERNEL,
5722 instance->ctrl_context_pages);
9c915a8c 5723 if (!instance->ctrl_context) {
1be18254 5724 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate "
9c915a8c 5725 "memory for Fusion context info\n");
5726 goto fail_alloc_dma_buf;
5727 }
5728 fusion = instance->ctrl_context;
d009b576
SS
5729 memset(fusion, 0,
5730 ((1 << PAGE_SHIFT) << instance->ctrl_context_pages));
5a8cb85b 5731 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
5732 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA))
5733 fusion->adapter_type = THUNDERBOLT_SERIES;
5734 else
5735 fusion->adapter_type = INVADER_SERIES;
9c915a8c 5736 }
5737 break;
5738 default: /* For all other supported controllers */
5739
5740 instance->producer =
5741 pci_alloc_consistent(pdev, sizeof(u32),
5742 &instance->producer_h);
5743 instance->consumer =
5744 pci_alloc_consistent(pdev, sizeof(u32),
5745 &instance->consumer_h);
5746
5747 if (!instance->producer || !instance->consumer) {
1be18254 5748 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate"
9c915a8c 5749 "memory for producer, consumer\n");
5750 goto fail_alloc_dma_buf;
5751 }
c4a3e0a5 5752
9c915a8c 5753 *instance->producer = 0;
5754 *instance->consumer = 0;
5755 break;
c4a3e0a5
BS
5756 }
5757
5765c5b8
SS
5758 instance->system_info_buf = pci_zalloc_consistent(pdev,
5759 sizeof(struct MR_DRV_SYSTEM_INFO),
5760 &instance->system_info_h);
5761
5762 if (!instance->system_info_buf)
5763 dev_info(&instance->pdev->dev, "Can't allocate system info buffer\n");
5764
fc62b3fc
SS
5765 /* Crash dump feature related initialisation*/
5766 instance->drv_buf_index = 0;
5767 instance->drv_buf_alloc = 0;
5768 instance->crash_dump_fw_support = 0;
5769 instance->crash_dump_app_support = 0;
5770 instance->fw_crash_state = UNAVAILABLE;
5771 spin_lock_init(&instance->crashdump_lock);
5772 instance->crash_dump_buf = NULL;
5773
5774 if (!reset_devices)
5775 instance->crash_dump_buf = pci_alloc_consistent(pdev,
5776 CRASH_DMA_BUF_SIZE,
5777 &instance->crash_dump_h);
5778 if (!instance->crash_dump_buf)
1be18254 5779 dev_err(&pdev->dev, "Can't allocate Firmware "
fc62b3fc
SS
5780 "crash dump DMA buffer\n");
5781
c3518837 5782 megasas_poll_wait_aen = 0;
f4c9a131 5783 instance->flag_ieee = 0;
7e8a75f4 5784 instance->ev = NULL;
39a98554 5785 instance->issuepend_done = 1;
8a01a41d 5786 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
404a8a1a 5787 instance->is_imr = 0;
c4a3e0a5
BS
5788
5789 instance->evt_detail = pci_alloc_consistent(pdev,
5790 sizeof(struct
5791 megasas_evt_detail),
5792 &instance->evt_detail_h);
5793
5794 if (!instance->evt_detail) {
1be18254 5795 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate memory for "
c4a3e0a5
BS
5796 "event detail structure\n");
5797 goto fail_alloc_dma_buf;
5798 }
5799
2216c305
SS
5800 instance->pd_info = pci_alloc_consistent(pdev,
5801 sizeof(struct MR_PD_INFO), &instance->pd_info_h);
5802
5803 if (!instance->pd_info)
5804 dev_err(&instance->pdev->dev, "Failed to alloc mem for pd_info\n");
5805
c4a3e0a5
BS
5806 /*
5807 * Initialize locks and queues
5808 */
5809 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 5810 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 5811
e4a082c7
SP
5812 atomic_set(&instance->fw_outstanding,0);
5813
c4a3e0a5
BS
5814 init_waitqueue_head(&instance->int_cmd_wait_q);
5815 init_waitqueue_head(&instance->abort_cmd_wait_q);
5816
90dc9d98 5817 spin_lock_init(&instance->mfi_pool_lock);
39a98554 5818 spin_lock_init(&instance->hba_lock);
7343eb65 5819 spin_lock_init(&instance->completion_lock);
c4a3e0a5 5820
9c915a8c 5821 mutex_init(&instance->reset_mutex);
2216c305 5822 mutex_init(&instance->hba_mutex);
c4a3e0a5
BS
5823
5824 /*
5825 * Initialize PCI related and misc parameters
5826 */
c4a3e0a5
BS
5827 instance->host = host;
5828 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
5829 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
51087a86 5830 instance->ctrl_info = NULL;
c4a3e0a5 5831
ae09a6c1 5832
7bebf5c7 5833 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
ae09a6c1 5834 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 5835 instance->flag_ieee = 1;
7bebf5c7 5836
658dcedb 5837 megasas_dbg_lvl = 0;
05e9ebbe 5838 instance->flag = 0;
0c79e681 5839 instance->unload = 1;
05e9ebbe 5840 instance->last_time = 0;
39a98554 5841 instance->disableOnlineCtrlReset = 1;
bc93d425 5842 instance->UnevenSpanSupport = 0;
39a98554 5843
5a8cb85b 5844 if (instance->ctrl_context) {
9c915a8c 5845 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc
SS
5846 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
5847 } else
9c915a8c 5848 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
658dcedb 5849
0a77066a 5850 /*
5851 * Initialize MFI Firmware
5852 */
5853 if (megasas_init_fw(instance))
5854 goto fail_init_mfi;
5855
229fe47c 5856 if (instance->requestorId) {
5857 if (instance->PlasmaFW111) {
5858 instance->vf_affiliation_111 =
5859 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
5860 &instance->vf_affiliation_111_h);
5861 if (!instance->vf_affiliation_111)
1be18254 5862 dev_warn(&pdev->dev, "Can't allocate "
229fe47c 5863 "memory for VF affiliation buffer\n");
5864 } else {
5865 instance->vf_affiliation =
5866 pci_alloc_consistent(pdev,
5867 (MAX_LOGICAL_DRIVES + 1) *
5868 sizeof(struct MR_LD_VF_AFFILIATION),
5869 &instance->vf_affiliation_h);
5870 if (!instance->vf_affiliation)
1be18254 5871 dev_warn(&pdev->dev, "Can't allocate "
229fe47c 5872 "memory for VF affiliation buffer\n");
5873 }
5874 }
5875
c4a3e0a5
BS
5876 /*
5877 * Store instance in PCI softstate
5878 */
5879 pci_set_drvdata(pdev, instance);
5880
5881 /*
5882 * Add this controller to megasas_mgmt_info structure so that it
5883 * can be exported to management applications
5884 */
5885 megasas_mgmt_info.count++;
5886 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
5887 megasas_mgmt_info.max_index++;
5888
541f90b7 5889 /*
5890 * Register with SCSI mid-layer
5891 */
5892 if (megasas_io_attach(instance))
5893 goto fail_io_attach;
5894
5895 instance->unload = 0;
aa00832b
SS
5896 /*
5897 * Trigger SCSI to scan our drives
5898 */
5899 scsi_scan_host(host);
541f90b7 5900
c4a3e0a5
BS
5901 /*
5902 * Initiate AEN (Asynchronous Event Notification)
5903 */
5904 if (megasas_start_aen(instance)) {
1be18254 5905 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS
5906 goto fail_start_aen;
5907 }
5908
9ea81f81
AR
5909 /* Get current SR-IOV LD/VF affiliation */
5910 if (instance->requestorId)
5911 megasas_get_ld_vf_affiliation(instance, 1);
5912
c4a3e0a5
BS
5913 return 0;
5914
da0dc9fb
BH
5915fail_start_aen:
5916fail_io_attach:
c4a3e0a5
BS
5917 megasas_mgmt_info.count--;
5918 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
5919 megasas_mgmt_info.max_index--;
5920
d46a3ad6 5921 instance->instancet->disable_intr(instance);
d3557fc8
SS
5922 megasas_destroy_irqs(instance);
5923
5a8cb85b 5924 if (instance->ctrl_context)
eb1b1237 5925 megasas_release_fusion(instance);
5926 else
5927 megasas_release_mfi(instance);
c8e858fe 5928 if (instance->msix_vectors)
0a77066a 5929 pci_disable_msix(instance->pdev);
d3557fc8 5930fail_init_mfi:
da0dc9fb 5931fail_alloc_dma_buf:
c4a3e0a5
BS
5932 if (instance->evt_detail)
5933 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5934 instance->evt_detail,
5935 instance->evt_detail_h);
5936
2216c305
SS
5937 if (instance->pd_info)
5938 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
5939 instance->pd_info,
5940 instance->pd_info_h);
eb1b1237 5941 if (instance->producer)
c4a3e0a5
BS
5942 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5943 instance->producer_h);
5944 if (instance->consumer)
5945 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5946 instance->consumer_h);
5947 scsi_host_put(host);
5948
da0dc9fb
BH
5949fail_alloc_instance:
5950fail_set_dma_mask:
c4a3e0a5
BS
5951 pci_disable_device(pdev);
5952
5953 return -ENODEV;
5954}
5955
5956/**
5957 * megasas_flush_cache - Requests FW to flush all its caches
5958 * @instance: Adapter soft state
5959 */
5960static void megasas_flush_cache(struct megasas_instance *instance)
5961{
5962 struct megasas_cmd *cmd;
5963 struct megasas_dcmd_frame *dcmd;
5964
8a01a41d 5965 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 5966 return;
5967
c4a3e0a5
BS
5968 cmd = megasas_get_cmd(instance);
5969
5970 if (!cmd)
5971 return;
5972
5973 dcmd = &cmd->frame->dcmd;
5974
5975 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5976
5977 dcmd->cmd = MFI_CMD_DCMD;
5978 dcmd->cmd_status = 0x0;
5979 dcmd->sge_count = 0;
94cd65dd 5980 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5981 dcmd->timeout = 0;
780a3762 5982 dcmd->pad_0 = 0;
c4a3e0a5 5983 dcmd->data_xfer_len = 0;
94cd65dd 5984 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS
5985 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
5986
6d40afbc
SS
5987 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
5988 != DCMD_SUCCESS) {
5989 dev_err(&instance->pdev->dev,
5990 "return from %s %d\n", __func__, __LINE__);
5991 return;
5992 }
c4a3e0a5 5993
4026e9aa 5994 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS
5995}
5996
5997/**
5998 * megasas_shutdown_controller - Instructs FW to shutdown the controller
5999 * @instance: Adapter soft state
31ea7088 6000 * @opcode: Shutdown/Hibernate
c4a3e0a5 6001 */
31ea7088 6002static void megasas_shutdown_controller(struct megasas_instance *instance,
6003 u32 opcode)
c4a3e0a5
BS
6004{
6005 struct megasas_cmd *cmd;
6006 struct megasas_dcmd_frame *dcmd;
6007
8a01a41d 6008 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6009 return;
6010
c4a3e0a5
BS
6011 cmd = megasas_get_cmd(instance);
6012
6013 if (!cmd)
6014 return;
6015
6016 if (instance->aen_cmd)
cfbe7554 6017 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6018 instance->aen_cmd, MFI_IO_TIMEOUT_SECS);
9c915a8c 6019 if (instance->map_update_cmd)
6020 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6021 instance->map_update_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6022 if (instance->jbod_seq_cmd)
6023 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6024 instance->jbod_seq_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6025
c4a3e0a5
BS
6026 dcmd = &cmd->frame->dcmd;
6027
6028 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6029
6030 dcmd->cmd = MFI_CMD_DCMD;
6031 dcmd->cmd_status = 0x0;
6032 dcmd->sge_count = 0;
94cd65dd 6033 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6034 dcmd->timeout = 0;
780a3762 6035 dcmd->pad_0 = 0;
c4a3e0a5 6036 dcmd->data_xfer_len = 0;
94cd65dd 6037 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 6038
6d40afbc
SS
6039 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6040 != DCMD_SUCCESS) {
6041 dev_err(&instance->pdev->dev,
6042 "return from %s %d\n", __func__, __LINE__);
6043 return;
6044 }
c4a3e0a5 6045
4026e9aa 6046 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS
6047}
6048
33139b21 6049#ifdef CONFIG_PM
31ea7088 6050/**
ad84db2e 6051 * megasas_suspend - driver suspend entry point
6052 * @pdev: PCI device structure
31ea7088 6053 * @state: PCI power state to suspend routine
6054 */
33139b21 6055static int
31ea7088 6056megasas_suspend(struct pci_dev *pdev, pm_message_t state)
6057{
6058 struct Scsi_Host *host;
6059 struct megasas_instance *instance;
6060
6061 instance = pci_get_drvdata(pdev);
6062 host = instance->host;
0c79e681 6063 instance->unload = 1;
31ea7088 6064
229fe47c 6065 /* Shutdown SR-IOV heartbeat timer */
6066 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6067 del_timer_sync(&instance->sriov_heartbeat_timer);
6068
31ea7088 6069 megasas_flush_cache(instance);
6070 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB
6071
6072 /* cancel the delayed work if this work still in queue */
6073 if (instance->ev != NULL) {
6074 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6075 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB
6076 instance->ev = NULL;
6077 }
6078
31ea7088 6079 tasklet_kill(&instance->isr_tasklet);
6080
6081 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 6082 instance->instancet->disable_intr(instance);
c8e858fe 6083
d3557fc8
SS
6084 megasas_destroy_irqs(instance);
6085
c8e858fe 6086 if (instance->msix_vectors)
80d9da98 6087 pci_disable_msix(instance->pdev);
31ea7088 6088
6089 pci_save_state(pdev);
6090 pci_disable_device(pdev);
6091
6092 pci_set_power_state(pdev, pci_choose_state(pdev, state));
6093
6094 return 0;
6095}
6096
6097/**
6098 * megasas_resume- driver resume entry point
6099 * @pdev: PCI device structure
6100 */
33139b21 6101static int
31ea7088 6102megasas_resume(struct pci_dev *pdev)
6103{
d3557fc8 6104 int rval;
31ea7088 6105 struct Scsi_Host *host;
6106 struct megasas_instance *instance;
6107
6108 instance = pci_get_drvdata(pdev);
6109 host = instance->host;
6110 pci_set_power_state(pdev, PCI_D0);
6111 pci_enable_wake(pdev, PCI_D0, 0);
6112 pci_restore_state(pdev);
6113
6114 /*
6115 * PCI prepping: enable device set bus mastering and dma mask
6116 */
aeab3fd7 6117 rval = pci_enable_device_mem(pdev);
31ea7088 6118
6119 if (rval) {
1be18254 6120 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 6121 return rval;
6122 }
6123
6124 pci_set_master(pdev);
6125
6126 if (megasas_set_dma_mask(pdev))
6127 goto fail_set_dma_mask;
6128
6129 /*
6130 * Initialize MFI Firmware
6131 */
6132
31ea7088 6133 atomic_set(&instance->fw_outstanding, 0);
6134
6135 /*
6136 * We expect the FW state to be READY
6137 */
058a8fac 6138 if (megasas_transition_to_ready(instance, 0))
31ea7088 6139 goto fail_ready_state;
6140
3f1abce4 6141 /* Now re-enable MSI-X */
dd088128 6142 if (instance->msix_vectors &&
8ae80ed1
AG
6143 pci_enable_msix_exact(instance->pdev, instance->msixentry,
6144 instance->msix_vectors))
dd088128 6145 goto fail_reenable_msix;
3f1abce4 6146
5a8cb85b 6147 if (instance->ctrl_context) {
9c915a8c 6148 megasas_reset_reply_desc(instance);
6149 if (megasas_ioc_init_fusion(instance)) {
6150 megasas_free_cmds(instance);
6151 megasas_free_cmds_fusion(instance);
6152 goto fail_init_mfi;
6153 }
6154 if (!megasas_get_map_info(instance))
6155 megasas_sync_map_info(instance);
5a8cb85b 6156 } else {
9c915a8c 6157 *instance->producer = 0;
6158 *instance->consumer = 0;
6159 if (megasas_issue_init_mfi(instance))
6160 goto fail_init_mfi;
9c915a8c 6161 }
31ea7088 6162
9c915a8c 6163 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
6164 (unsigned long)instance);
31ea7088 6165
d3557fc8
SS
6166 if (instance->msix_vectors ?
6167 megasas_setup_irqs_msix(instance, 0) :
6168 megasas_setup_irqs_ioapic(instance))
6169 goto fail_init_mfi;
31ea7088 6170
229fe47c 6171 /* Re-launch SR-IOV heartbeat timer */
6172 if (instance->requestorId) {
6173 if (!megasas_sriov_start_heartbeat(instance, 0))
6174 megasas_start_timer(instance,
6175 &instance->sriov_heartbeat_timer,
6176 megasas_sriov_heartbeat_handler,
6177 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5765c5b8 6178 else {
229fe47c 6179 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS
6180 goto fail_init_mfi;
6181 }
229fe47c 6182 }
6183
d46a3ad6 6184 instance->instancet->enable_intr(instance);
3761cb4c 6185 megasas_setup_jbod_map(instance);
0c79e681
YB
6186 instance->unload = 0;
6187
541f90b7 6188 /*
6189 * Initiate AEN (Asynchronous Event Notification)
6190 */
6191 if (megasas_start_aen(instance))
1be18254 6192 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 6193
31ea7088 6194 return 0;
6195
31ea7088 6196fail_init_mfi:
6197 if (instance->evt_detail)
6198 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6199 instance->evt_detail,
6200 instance->evt_detail_h);
6201
2216c305
SS
6202 if (instance->pd_info)
6203 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6204 instance->pd_info,
6205 instance->pd_info_h);
31ea7088 6206 if (instance->producer)
6207 pci_free_consistent(pdev, sizeof(u32), instance->producer,
6208 instance->producer_h);
6209 if (instance->consumer)
6210 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
6211 instance->consumer_h);
6212 scsi_host_put(host);
6213
6214fail_set_dma_mask:
6215fail_ready_state:
dd088128 6216fail_reenable_msix:
31ea7088 6217
6218 pci_disable_device(pdev);
6219
6220 return -ENODEV;
6221}
33139b21
JS
6222#else
6223#define megasas_suspend NULL
6224#define megasas_resume NULL
6225#endif
31ea7088 6226
c4a3e0a5
BS
6227/**
6228 * megasas_detach_one - PCI hot"un"plug entry point
6229 * @pdev: PCI device structure
6230 */
6f039790 6231static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS
6232{
6233 int i;
6234 struct Scsi_Host *host;
6235 struct megasas_instance *instance;
9c915a8c 6236 struct fusion_context *fusion;
3761cb4c 6237 u32 pd_seq_map_sz;
c4a3e0a5
BS
6238
6239 instance = pci_get_drvdata(pdev);
c3518837 6240 instance->unload = 1;
c4a3e0a5 6241 host = instance->host;
9c915a8c 6242 fusion = instance->ctrl_context;
c4a3e0a5 6243
229fe47c 6244 /* Shutdown SR-IOV heartbeat timer */
6245 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6246 del_timer_sync(&instance->sriov_heartbeat_timer);
6247
fc62b3fc
SS
6248 if (instance->fw_crash_state != UNAVAILABLE)
6249 megasas_free_host_crash_buffer(instance);
c4a3e0a5
BS
6250 scsi_remove_host(instance->host);
6251 megasas_flush_cache(instance);
31ea7088 6252 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4
YB
6253
6254 /* cancel the delayed work if this work still in queue*/
6255 if (instance->ev != NULL) {
6256 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6257 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB
6258 instance->ev = NULL;
6259 }
6260
cfbe7554
SS
6261 /* cancel all wait events */
6262 wake_up_all(&instance->int_cmd_wait_q);
6263
5d018ad0 6264 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS
6265
6266 /*
6267 * Take the instance off the instance array. Note that we will not
6268 * decrement the max_index. We let this array be sparse array
6269 */
6270 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6271 if (megasas_mgmt_info.instance[i] == instance) {
6272 megasas_mgmt_info.count--;
6273 megasas_mgmt_info.instance[i] = NULL;
6274
6275 break;
6276 }
6277 }
6278
d46a3ad6 6279 instance->instancet->disable_intr(instance);
c4a3e0a5 6280
d3557fc8
SS
6281 megasas_destroy_irqs(instance);
6282
c8e858fe 6283 if (instance->msix_vectors)
80d9da98 6284 pci_disable_msix(instance->pdev);
c4a3e0a5 6285
5a8cb85b 6286 if (instance->ctrl_context) {
9c915a8c 6287 megasas_release_fusion(instance);
3761cb4c 6288 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
6289 (sizeof(struct MR_PD_CFG_SEQ) *
6290 (MAX_PHYSICAL_DEVICES - 1));
51087a86 6291 for (i = 0; i < 2 ; i++) {
9c915a8c 6292 if (fusion->ld_map[i])
6293 dma_free_coherent(&instance->pdev->dev,
51087a86 6294 fusion->max_map_sz,
9c915a8c 6295 fusion->ld_map[i],
51087a86
SS
6296 fusion->ld_map_phys[i]);
6297 if (fusion->ld_drv_map[i])
6298 free_pages((ulong)fusion->ld_drv_map[i],
6299 fusion->drv_map_pages);
546e559c
ML
6300 if (fusion->pd_seq_sync[i])
6301 dma_free_coherent(&instance->pdev->dev,
6302 pd_seq_map_sz,
6303 fusion->pd_seq_sync[i],
6304 fusion->pd_seq_phys[i]);
51087a86
SS
6305 }
6306 free_pages((ulong)instance->ctrl_context,
6307 instance->ctrl_context_pages);
5a8cb85b 6308 } else {
9c915a8c 6309 megasas_release_mfi(instance);
9c915a8c 6310 pci_free_consistent(pdev, sizeof(u32),
6311 instance->producer,
6312 instance->producer_h);
6313 pci_free_consistent(pdev, sizeof(u32),
6314 instance->consumer,
6315 instance->consumer_h);
9c915a8c 6316 }
c4a3e0a5 6317
51087a86
SS
6318 kfree(instance->ctrl_info);
6319
105900d5
SS
6320 if (instance->evt_detail)
6321 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6322 instance->evt_detail, instance->evt_detail_h);
229fe47c 6323
2216c305
SS
6324 if (instance->pd_info)
6325 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6326 instance->pd_info,
6327 instance->pd_info_h);
229fe47c 6328 if (instance->vf_affiliation)
6329 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
6330 sizeof(struct MR_LD_VF_AFFILIATION),
6331 instance->vf_affiliation,
6332 instance->vf_affiliation_h);
6333
6334 if (instance->vf_affiliation_111)
6335 pci_free_consistent(pdev,
6336 sizeof(struct MR_LD_VF_AFFILIATION_111),
6337 instance->vf_affiliation_111,
6338 instance->vf_affiliation_111_h);
6339
6340 if (instance->hb_host_mem)
6341 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
6342 instance->hb_host_mem,
6343 instance->hb_host_mem_h);
6344
fc62b3fc
SS
6345 if (instance->crash_dump_buf)
6346 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
6347 instance->crash_dump_buf, instance->crash_dump_h);
6348
5765c5b8
SS
6349 if (instance->system_info_buf)
6350 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
6351 instance->system_info_buf, instance->system_info_h);
6352
c4a3e0a5
BS
6353 scsi_host_put(host);
6354
c4a3e0a5 6355 pci_disable_device(pdev);
c4a3e0a5
BS
6356}
6357
6358/**
6359 * megasas_shutdown - Shutdown entry point
6360 * @device: Generic device structure
6361 */
6362static void megasas_shutdown(struct pci_dev *pdev)
6363{
6364 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 6365
0c79e681 6366 instance->unload = 1;
c4a3e0a5 6367 megasas_flush_cache(instance);
530e6fc1 6368 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
d46a3ad6 6369 instance->instancet->disable_intr(instance);
d3557fc8
SS
6370 megasas_destroy_irqs(instance);
6371
c8e858fe 6372 if (instance->msix_vectors)
46fd256e 6373 pci_disable_msix(instance->pdev);
c4a3e0a5
BS
6374}
6375
6376/**
6377 * megasas_mgmt_open - char node "open" entry point
6378 */
6379static int megasas_mgmt_open(struct inode *inode, struct file *filep)
6380{
6381 /*
6382 * Allow only those users with admin rights
6383 */
6384 if (!capable(CAP_SYS_ADMIN))
6385 return -EACCES;
6386
6387 return 0;
6388}
6389
c4a3e0a5
BS
6390/**
6391 * megasas_mgmt_fasync - Async notifier registration from applications
6392 *
6393 * This function adds the calling process to a driver global queue. When an
6394 * event occurs, SIGIO will be sent to all processes in this queue.
6395 */
6396static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
6397{
6398 int rc;
6399
0b950672 6400 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS
6401
6402 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
6403
0b950672 6404 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS
6405
6406 if (rc >= 0) {
6407 /* For sanity check when we get ioctl */
6408 filep->private_data = filep;
6409 return 0;
6410 }
6411
6412 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
6413
6414 return rc;
6415}
6416
c3518837
YB
6417/**
6418 * megasas_mgmt_poll - char node "poll" entry point
6419 * */
6420static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
6421{
6422 unsigned int mask;
6423 unsigned long flags;
da0dc9fb 6424
c3518837
YB
6425 poll_wait(file, &megasas_poll_wait, wait);
6426 spin_lock_irqsave(&poll_aen_lock, flags);
6427 if (megasas_poll_wait_aen)
da0dc9fb 6428 mask = (POLLIN | POLLRDNORM);
c3518837
YB
6429 else
6430 mask = 0;
51087a86 6431 megasas_poll_wait_aen = 0;
c3518837
YB
6432 spin_unlock_irqrestore(&poll_aen_lock, flags);
6433 return mask;
6434}
6435
fc62b3fc
SS
6436/*
6437 * megasas_set_crash_dump_params_ioctl:
6438 * Send CRASH_DUMP_MODE DCMD to all controllers
6439 * @cmd: MFI command frame
6440 */
6441
da0dc9fb 6442static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd)
fc62b3fc
SS
6443{
6444 struct megasas_instance *local_instance;
6445 int i, error = 0;
6446 int crash_support;
6447
6448 crash_support = cmd->frame->dcmd.mbox.w[0];
6449
6450 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6451 local_instance = megasas_mgmt_info.instance[i];
6452 if (local_instance && local_instance->crash_dump_drv_support) {
8a01a41d 6453 if ((atomic_read(&local_instance->adprecovery) ==
fc62b3fc
SS
6454 MEGASAS_HBA_OPERATIONAL) &&
6455 !megasas_set_crash_dump_params(local_instance,
6456 crash_support)) {
6457 local_instance->crash_dump_app_support =
6458 crash_support;
6459 dev_info(&local_instance->pdev->dev,
6460 "Application firmware crash "
6461 "dump mode set success\n");
6462 error = 0;
6463 } else {
6464 dev_info(&local_instance->pdev->dev,
6465 "Application firmware crash "
6466 "dump mode set failed\n");
6467 error = -1;
6468 }
6469 }
6470 }
6471 return error;
6472}
6473
c4a3e0a5
BS
6474/**
6475 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
6476 * @instance: Adapter soft state
6477 * @argp: User's ioctl packet
6478 */
6479static int
6480megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
6481 struct megasas_iocpacket __user * user_ioc,
6482 struct megasas_iocpacket *ioc)
6483{
6484 struct megasas_sge32 *kern_sge32;
6485 struct megasas_cmd *cmd;
6486 void *kbuff_arr[MAX_IOCTL_SGE];
6487 dma_addr_t buf_handle = 0;
6488 int error = 0, i;
6489 void *sense = NULL;
6490 dma_addr_t sense_handle;
7b2519af 6491 unsigned long *sense_ptr;
c4a3e0a5
BS
6492
6493 memset(kbuff_arr, 0, sizeof(kbuff_arr));
6494
6495 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 6496 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS
6497 ioc->sge_count, MAX_IOCTL_SGE);
6498 return -EINVAL;
6499 }
6500
6501 cmd = megasas_get_cmd(instance);
6502 if (!cmd) {
1be18254 6503 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS
6504 return -ENOMEM;
6505 }
6506
6507 /*
6508 * User's IOCTL packet has 2 frames (maximum). Copy those two
6509 * frames into our cmd's frames. cmd->frame's context will get
6510 * overwritten when we copy from user's frames. So set that value
6511 * alone separately
6512 */
6513 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 6514 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 6515 cmd->frame->hdr.pad_0 = 0;
94cd65dd
SS
6516 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE |
6517 MFI_FRAME_SGL64 |
6518 MFI_FRAME_SENSE64));
c4a3e0a5 6519
fc62b3fc
SS
6520 if (cmd->frame->dcmd.opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
6521 error = megasas_set_crash_dump_params_ioctl(cmd);
6522 megasas_return_cmd(instance, cmd);
6523 return error;
6524 }
6525
c4a3e0a5
BS
6526 /*
6527 * The management interface between applications and the fw uses
6528 * MFI frames. E.g, RAID configuration changes, LD property changes
6529 * etc are accomplishes through different kinds of MFI frames. The
6530 * driver needs to care only about substituting user buffers with
6531 * kernel buffers in SGLs. The location of SGL is embedded in the
6532 * struct iocpacket itself.
6533 */
6534 kern_sge32 = (struct megasas_sge32 *)
6535 ((unsigned long)cmd->frame + ioc->sgl_off);
6536
6537 /*
6538 * For each user buffer, create a mirror buffer and copy in
6539 */
6540 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM
6541 if (!ioc->sgl[i].iov_len)
6542 continue;
6543
9f35fa8a 6544 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 6545 ioc->sgl[i].iov_len,
9f35fa8a 6546 &buf_handle, GFP_KERNEL);
c4a3e0a5 6547 if (!kbuff_arr[i]) {
1be18254
BH
6548 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
6549 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS
6550 error = -ENOMEM;
6551 goto out;
6552 }
6553
6554 /*
6555 * We don't change the dma_coherent_mask, so
6556 * pci_alloc_consistent only returns 32bit addresses
6557 */
94cd65dd
SS
6558 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
6559 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
c4a3e0a5
BS
6560
6561 /*
6562 * We created a kernel buffer corresponding to the
6563 * user buffer. Now copy in from the user buffer
6564 */
6565 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
6566 (u32) (ioc->sgl[i].iov_len))) {
6567 error = -EFAULT;
6568 goto out;
6569 }
6570 }
6571
6572 if (ioc->sense_len) {
9f35fa8a
SP
6573 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
6574 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS
6575 if (!sense) {
6576 error = -ENOMEM;
6577 goto out;
6578 }
6579
6580 sense_ptr =
7b2519af 6581 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
94cd65dd 6582 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS
6583 }
6584
6585 /*
6586 * Set the sync_cmd flag so that the ISR knows not to complete this
6587 * cmd to the SCSI mid-layer
6588 */
6589 cmd->sync_cmd = 1;
6d40afbc
SS
6590 if (megasas_issue_blocked_cmd(instance, cmd, 0) == DCMD_NOT_FIRED) {
6591 cmd->sync_cmd = 0;
6592 dev_err(&instance->pdev->dev,
6593 "return -EBUSY from %s %d opcode 0x%x cmd->cmd_status_drv 0x%x\n",
6594 __func__, __LINE__, cmd->frame->dcmd.opcode,
6595 cmd->cmd_status_drv);
6596 return -EBUSY;
6597 }
6598
c4a3e0a5
BS
6599 cmd->sync_cmd = 0;
6600
aa00832b
SS
6601 if (instance->unload == 1) {
6602 dev_info(&instance->pdev->dev, "Driver unload is in progress "
6603 "don't submit data to application\n");
6604 goto out;
6605 }
c4a3e0a5
BS
6606 /*
6607 * copy out the kernel buffers to user buffers
6608 */
6609 for (i = 0; i < ioc->sge_count; i++) {
6610 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
6611 ioc->sgl[i].iov_len)) {
6612 error = -EFAULT;
6613 goto out;
6614 }
6615 }
6616
6617 /*
6618 * copy out the sense
6619 */
6620 if (ioc->sense_len) {
6621 /*
b70a41e0 6622 * sense_ptr points to the location that has the user
c4a3e0a5
BS
6623 * sense buffer address
6624 */
7b2519af
YB
6625 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
6626 ioc->sense_off);
c4a3e0a5 6627
b70a41e0 6628 if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)),
6629 sense, ioc->sense_len)) {
1be18254 6630 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 6631 "sense data\n");
c4a3e0a5
BS
6632 error = -EFAULT;
6633 goto out;
6634 }
6635 }
6636
6637 /*
6638 * copy the status codes returned by the fw
6639 */
6640 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
6641 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 6642 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS
6643 error = -EFAULT;
6644 }
6645
da0dc9fb 6646out:
c4a3e0a5 6647 if (sense) {
9f35fa8a 6648 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS
6649 sense, sense_handle);
6650 }
6651
7a6a731b
BM
6652 for (i = 0; i < ioc->sge_count; i++) {
6653 if (kbuff_arr[i])
6654 dma_free_coherent(&instance->pdev->dev,
94cd65dd 6655 le32_to_cpu(kern_sge32[i].length),
7a6a731b 6656 kbuff_arr[i],
94cd65dd 6657 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 6658 kbuff_arr[i] = NULL;
c4a3e0a5
BS
6659 }
6660
4026e9aa 6661 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS
6662 return error;
6663}
6664
c4a3e0a5
BS
6665static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
6666{
6667 struct megasas_iocpacket __user *user_ioc =
6668 (struct megasas_iocpacket __user *)arg;
6669 struct megasas_iocpacket *ioc;
6670 struct megasas_instance *instance;
6671 int error;
39a98554 6672 int i;
6673 unsigned long flags;
6674 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
6675
6676 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6677 if (!ioc)
6678 return -ENOMEM;
6679
6680 if (copy_from_user(ioc, user_ioc, sizeof(*ioc))) {
6681 error = -EFAULT;
6682 goto out_kfree_ioc;
6683 }
6684
6685 instance = megasas_lookup_instance(ioc->host_no);
6686 if (!instance) {
6687 error = -ENODEV;
6688 goto out_kfree_ioc;
6689 }
6690
229fe47c 6691 /* Adjust ioctl wait time for VF mode */
6692 if (instance->requestorId)
6693 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6694
6695 /* Block ioctls in VF mode */
6696 if (instance->requestorId && !allow_vf_ioctls) {
6697 error = -ENODEV;
6698 goto out_kfree_ioc;
6699 }
6700
8a01a41d 6701 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 6702 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB
6703 error = -ENODEV;
6704 goto out_kfree_ioc;
6705 }
6706
6707 if (instance->unload == 1) {
6708 error = -ENODEV;
6709 goto out_kfree_ioc;
6710 }
6711
c4a3e0a5
BS
6712 if (down_interruptible(&instance->ioctl_sem)) {
6713 error = -ERESTARTSYS;
6714 goto out_kfree_ioc;
6715 }
39a98554 6716
6717 for (i = 0; i < wait_time; i++) {
6718
6719 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 6720 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 6721 spin_unlock_irqrestore(&instance->hba_lock, flags);
6722 break;
6723 }
6724 spin_unlock_irqrestore(&instance->hba_lock, flags);
6725
6726 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6727 dev_notice(&instance->pdev->dev, "waiting"
39a98554 6728 "for controller reset to finish\n");
6729 }
6730
6731 msleep(1000);
6732 }
6733
6734 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 6735 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 6736 spin_unlock_irqrestore(&instance->hba_lock, flags);
6737
1be18254 6738 dev_err(&instance->pdev->dev, "timed out while"
39a98554 6739 "waiting for HBA to recover\n");
6740 error = -ENODEV;
c64e483e 6741 goto out_up;
39a98554 6742 }
6743 spin_unlock_irqrestore(&instance->hba_lock, flags);
6744
c4a3e0a5 6745 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
da0dc9fb 6746out_up:
c4a3e0a5
BS
6747 up(&instance->ioctl_sem);
6748
da0dc9fb 6749out_kfree_ioc:
c4a3e0a5
BS
6750 kfree(ioc);
6751 return error;
6752}
6753
6754static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
6755{
6756 struct megasas_instance *instance;
6757 struct megasas_aen aen;
6758 int error;
39a98554 6759 int i;
6760 unsigned long flags;
6761 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
6762
6763 if (file->private_data != file) {
6764 printk(KERN_DEBUG "megasas: fasync_helper was not "
6765 "called first\n");
6766 return -EINVAL;
6767 }
6768
6769 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
6770 return -EFAULT;
6771
6772 instance = megasas_lookup_instance(aen.host_no);
6773
6774 if (!instance)
6775 return -ENODEV;
6776
8a01a41d 6777 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
39a98554 6778 return -ENODEV;
0c79e681
YB
6779 }
6780
6781 if (instance->unload == 1) {
6782 return -ENODEV;
6783 }
6784
39a98554 6785 for (i = 0; i < wait_time; i++) {
6786
6787 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 6788 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 6789 spin_unlock_irqrestore(&instance->hba_lock,
6790 flags);
6791 break;
6792 }
6793
6794 spin_unlock_irqrestore(&instance->hba_lock, flags);
6795
6796 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6797 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 6798 "controller reset to finish\n");
6799 }
6800
6801 msleep(1000);
6802 }
6803
6804 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 6805 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 6806 spin_unlock_irqrestore(&instance->hba_lock, flags);
1be18254
BH
6807 dev_err(&instance->pdev->dev, "timed out while waiting"
6808 "for HBA to recover\n");
39a98554 6809 return -ENODEV;
6810 }
6811 spin_unlock_irqrestore(&instance->hba_lock, flags);
6812
11c71cb4 6813 mutex_lock(&instance->reset_mutex);
c4a3e0a5
BS
6814 error = megasas_register_aen(instance, aen.seq_num,
6815 aen.class_locale_word);
11c71cb4 6816 mutex_unlock(&instance->reset_mutex);
c4a3e0a5
BS
6817 return error;
6818}
6819
6820/**
6821 * megasas_mgmt_ioctl - char node ioctl entry point
6822 */
6823static long
6824megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
6825{
6826 switch (cmd) {
6827 case MEGASAS_IOC_FIRMWARE:
6828 return megasas_mgmt_ioctl_fw(file, arg);
6829
6830 case MEGASAS_IOC_GET_AEN:
6831 return megasas_mgmt_ioctl_aen(file, arg);
6832 }
6833
6834 return -ENOTTY;
6835}
6836
6837#ifdef CONFIG_COMPAT
6838static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
6839{
6840 struct compat_megasas_iocpacket __user *cioc =
6841 (struct compat_megasas_iocpacket __user *)arg;
6842 struct megasas_iocpacket __user *ioc =
6843 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
6844 int i;
6845 int error = 0;
b3dc1a21 6846 compat_uptr_t ptr;
323c4a02 6847 u32 local_sense_off;
6848 u32 local_sense_len;
ea1c928b 6849 u32 user_sense_off;
c4a3e0a5 6850
83aabc1b
JG
6851 if (clear_user(ioc, sizeof(*ioc)))
6852 return -EFAULT;
c4a3e0a5
BS
6853
6854 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
6855 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
6856 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
6857 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
6858 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
6859 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
6860 return -EFAULT;
6861
b3dc1a21
TH
6862 /*
6863 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
6864 * sense_len is not null, so prepare the 64bit value under
6865 * the same condition.
6866 */
ea1c928b
SS
6867 if (get_user(local_sense_off, &ioc->sense_off) ||
6868 get_user(local_sense_len, &ioc->sense_len) ||
6869 get_user(user_sense_off, &cioc->sense_off))
323c4a02 6870 return -EFAULT;
6871
323c4a02 6872 if (local_sense_len) {
b3dc1a21 6873 void __user **sense_ioc_ptr =
ea1c928b 6874 (void __user **)((u8 *)((unsigned long)&ioc->frame.raw) + local_sense_off);
b3dc1a21 6875 compat_uptr_t *sense_cioc_ptr =
ea1c928b 6876 (compat_uptr_t *)(((unsigned long)&cioc->frame.raw) + user_sense_off);
b3dc1a21
TH
6877 if (get_user(ptr, sense_cioc_ptr) ||
6878 put_user(compat_ptr(ptr), sense_ioc_ptr))
6879 return -EFAULT;
6880 }
c4a3e0a5 6881
b3dc1a21 6882 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS
6883 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
6884 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
6885 copy_in_user(&ioc->sgl[i].iov_len,
6886 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
6887 return -EFAULT;
6888 }
6889
6890 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
6891
6892 if (copy_in_user(&cioc->frame.hdr.cmd_status,
6893 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
6894 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
6895 return -EFAULT;
6896 }
6897 return error;
6898}
6899
6900static long
6901megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
6902 unsigned long arg)
6903{
6904 switch (cmd) {
cb59aa6a
SP
6905 case MEGASAS_IOC_FIRMWARE32:
6906 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS
6907 case MEGASAS_IOC_GET_AEN:
6908 return megasas_mgmt_ioctl_aen(file, arg);
6909 }
6910
6911 return -ENOTTY;
6912}
6913#endif
6914
6915/*
6916 * File operations structure for management interface
6917 */
00977a59 6918static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS
6919 .owner = THIS_MODULE,
6920 .open = megasas_mgmt_open,
c4a3e0a5
BS
6921 .fasync = megasas_mgmt_fasync,
6922 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 6923 .poll = megasas_mgmt_poll,
c4a3e0a5
BS
6924#ifdef CONFIG_COMPAT
6925 .compat_ioctl = megasas_mgmt_compat_ioctl,
6926#endif
6038f373 6927 .llseek = noop_llseek,
c4a3e0a5
BS
6928};
6929
6930/*
6931 * PCI hotplug support registration structure
6932 */
6933static struct pci_driver megasas_pci_driver = {
6934
6935 .name = "megaraid_sas",
6936 .id_table = megasas_pci_table,
6937 .probe = megasas_probe_one,
6f039790 6938 .remove = megasas_detach_one,
31ea7088 6939 .suspend = megasas_suspend,
6940 .resume = megasas_resume,
c4a3e0a5
BS
6941 .shutdown = megasas_shutdown,
6942};
6943
6944/*
6945 * Sysfs driver attributes
6946 */
6947static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf)
6948{
6949 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
6950 MEGASAS_VERSION);
6951}
6952
6953static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL);
6954
09fced19
SS
6955static ssize_t
6956megasas_sysfs_show_release_date(struct device_driver *dd, char *buf)
6957{
6958 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
6959 MEGASAS_RELDATE);
6960}
6961
6962static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date, NULL);
6963
72c4fd36
YB
6964static ssize_t
6965megasas_sysfs_show_support_poll_for_event(struct device_driver *dd, char *buf)
6966{
6967 return sprintf(buf, "%u\n", support_poll_for_event);
6968}
6969
6970static DRIVER_ATTR(support_poll_for_event, S_IRUGO,
6971 megasas_sysfs_show_support_poll_for_event, NULL);
6972
837f5fe8
YB
6973 static ssize_t
6974megasas_sysfs_show_support_device_change(struct device_driver *dd, char *buf)
6975{
6976 return sprintf(buf, "%u\n", support_device_change);
6977}
6978
6979static DRIVER_ATTR(support_device_change, S_IRUGO,
6980 megasas_sysfs_show_support_device_change, NULL);
6981
658dcedb
SP
6982static ssize_t
6983megasas_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf)
6984{
ad84db2e 6985 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP
6986}
6987
6988static ssize_t
6989megasas_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count)
6990{
6991 int retval = count;
da0dc9fb
BH
6992
6993 if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) {
658dcedb
SP
6994 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
6995 retval = -EINVAL;
6996 }
6997 return retval;
6998}
6999
66dca9b8 7000static DRIVER_ATTR(dbg_lvl, S_IRUGO|S_IWUSR, megasas_sysfs_show_dbg_lvl,
ad84db2e 7001 megasas_sysfs_set_dbg_lvl);
7002
7e8a75f4
YB
7003static void
7004megasas_aen_polling(struct work_struct *work)
7005{
7006 struct megasas_aen_event *ev =
c1d390d8 7007 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB
7008 struct megasas_instance *instance = ev->instance;
7009 union megasas_evt_class_locale class_locale;
7010 struct Scsi_Host *host;
7011 struct scsi_device *sdev1;
7012 u16 pd_index = 0;
c9786842 7013 u16 ld_index = 0;
7e8a75f4 7014 int i, j, doscan = 0;
229fe47c 7015 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4 7016 int error;
6d40afbc 7017 u8 dcmd_ret = DCMD_SUCCESS;
7e8a75f4
YB
7018
7019 if (!instance) {
7020 printk(KERN_ERR "invalid instance!\n");
7021 kfree(ev);
7022 return;
7023 }
229fe47c 7024
7025 /* Adjust event workqueue thread wait time for VF mode */
7026 if (instance->requestorId)
7027 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7028
7029 /* Don't run the event workqueue thread if OCR is running */
11c71cb4 7030 mutex_lock(&instance->reset_mutex);
229fe47c 7031
7e8a75f4
YB
7032 instance->ev = NULL;
7033 host = instance->host;
7034 if (instance->evt_detail) {
714f5177 7035 megasas_decode_evt(instance);
7e8a75f4 7036
94cd65dd 7037 switch (le32_to_cpu(instance->evt_detail->code)) {
c9786842 7038
11c71cb4 7039 case MR_EVT_PD_INSERTED:
7e8a75f4 7040 case MR_EVT_PD_REMOVED:
11c71cb4 7041 dcmd_ret = megasas_get_pd_list(instance);
6d40afbc 7042 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4 7043 doscan = SCAN_PD_CHANNEL;
c9786842
YB
7044 break;
7045
7046 case MR_EVT_LD_OFFLINE:
4c598b23 7047 case MR_EVT_CFG_CLEARED:
c9786842 7048 case MR_EVT_LD_DELETED:
c9786842 7049 case MR_EVT_LD_CREATED:
229fe47c 7050 if (!instance->requestorId ||
11c71cb4
SS
7051 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7052 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7053
6d40afbc 7054 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS
7055 doscan = SCAN_VD_CHANNEL;
7056
c9786842 7057 break;
11c71cb4 7058
7e8a75f4 7059 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 7060 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 7061 case MR_EVT_LD_STATE_CHANGE:
11c71cb4
SS
7062 dcmd_ret = megasas_get_pd_list(instance);
7063
6d40afbc 7064 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS
7065 break;
7066
7067 if (!instance->requestorId ||
7068 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7069 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7070
6d40afbc 7071 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS
7072 break;
7073
7074 doscan = SCAN_VD_CHANNEL | SCAN_PD_CHANNEL;
7075 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
7076 instance->host->host_no);
7e8a75f4 7077 break;
11c71cb4 7078
c4bd2654 7079 case MR_EVT_CTRL_PROP_CHANGED:
11c71cb4
SS
7080 dcmd_ret = megasas_get_ctrl_info(instance);
7081 break;
7e8a75f4
YB
7082 default:
7083 doscan = 0;
7084 break;
7085 }
7086 } else {
1be18254 7087 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
11c71cb4 7088 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB
7089 kfree(ev);
7090 return;
7091 }
7092
11c71cb4
SS
7093 mutex_unlock(&instance->reset_mutex);
7094
7095 if (doscan & SCAN_PD_CHANNEL) {
7096 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
7097 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7098 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
7099 sdev1 = scsi_device_lookup(host, i, j, 0);
7100 if (instance->pd_list[pd_index].driveState ==
7101 MR_PD_STATE_SYSTEM) {
7102 if (!sdev1)
7103 scsi_add_device(host, i, j, 0);
7104 else
7105 scsi_device_put(sdev1);
7106 } else {
7107 if (sdev1) {
7108 scsi_remove_device(sdev1);
7109 scsi_device_put(sdev1);
7e8a75f4
YB
7110 }
7111 }
7112 }
7113 }
11c71cb4 7114 }
c9786842 7115
11c71cb4
SS
7116 if (doscan & SCAN_VD_CHANNEL) {
7117 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
7118 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7119 ld_index = (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
7120 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7121 if (instance->ld_ids[ld_index] != 0xff) {
7122 if (!sdev1)
7123 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7124 else
7125 scsi_device_put(sdev1);
7126 } else {
7127 if (sdev1) {
7128 scsi_remove_device(sdev1);
7129 scsi_device_put(sdev1);
c9786842
YB
7130 }
7131 }
7132 }
7133 }
7e8a75f4
YB
7134 }
7135
6d40afbc 7136 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS
7137 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7138 else
7139 seq_num = instance->last_seq_num;
7e8a75f4
YB
7140
7141 /* Register AEN with FW for latest sequence number plus 1 */
7142 class_locale.members.reserved = 0;
7143 class_locale.members.locale = MR_EVT_LOCALE_ALL;
7144 class_locale.members.class = MR_EVT_CLASS_DEBUG;
11c71cb4
SS
7145
7146 if (instance->aen_cmd != NULL) {
7147 kfree(ev);
7148 return;
7149 }
7150
7151 mutex_lock(&instance->reset_mutex);
7e8a75f4
YB
7152 error = megasas_register_aen(instance, seq_num,
7153 class_locale.word);
7e8a75f4 7154 if (error)
11c71cb4
SS
7155 dev_err(&instance->pdev->dev,
7156 "register aen failed error %x\n", error);
7e8a75f4 7157
11c71cb4 7158 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB
7159 kfree(ev);
7160}
7161
c4a3e0a5
BS
7162/**
7163 * megasas_init - Driver load entry point
7164 */
7165static int __init megasas_init(void)
7166{
7167 int rval;
7168
7169 /*
7170 * Announce driver version and other information
7171 */
d98a6deb 7172 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 7173
bd8d6dd4
KD
7174 spin_lock_init(&poll_aen_lock);
7175
72c4fd36 7176 support_poll_for_event = 2;
837f5fe8 7177 support_device_change = 1;
72c4fd36 7178
c4a3e0a5
BS
7179 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
7180
7181 /*
7182 * Register character device node
7183 */
7184 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
7185
7186 if (rval < 0) {
7187 printk(KERN_DEBUG "megasas: failed to open device node\n");
7188 return rval;
7189 }
7190
7191 megasas_mgmt_majorno = rval;
7192
7193 /*
7194 * Register ourselves as PCI hotplug module
7195 */
4041b9cd 7196 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS
7197
7198 if (rval) {
6774def6 7199 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG
7200 goto err_pcidrv;
7201 }
7202
7203 rval = driver_create_file(&megasas_pci_driver.driver,
7204 &driver_attr_version);
7205 if (rval)
7206 goto err_dcf_attr_ver;
72c4fd36 7207
09fced19
SS
7208 rval = driver_create_file(&megasas_pci_driver.driver,
7209 &driver_attr_release_date);
7210 if (rval)
7211 goto err_dcf_rel_date;
7212
72c4fd36
YB
7213 rval = driver_create_file(&megasas_pci_driver.driver,
7214 &driver_attr_support_poll_for_event);
7215 if (rval)
7216 goto err_dcf_support_poll_for_event;
7217
83aabc1b
JG
7218 rval = driver_create_file(&megasas_pci_driver.driver,
7219 &driver_attr_dbg_lvl);
7220 if (rval)
7221 goto err_dcf_dbg_lvl;
837f5fe8
YB
7222 rval = driver_create_file(&megasas_pci_driver.driver,
7223 &driver_attr_support_device_change);
7224 if (rval)
7225 goto err_dcf_support_device_change;
7226
c4a3e0a5 7227 return rval;
ad84db2e 7228
837f5fe8 7229err_dcf_support_device_change:
ad84db2e 7230 driver_remove_file(&megasas_pci_driver.driver,
7231 &driver_attr_dbg_lvl);
83aabc1b 7232err_dcf_dbg_lvl:
72c4fd36
YB
7233 driver_remove_file(&megasas_pci_driver.driver,
7234 &driver_attr_support_poll_for_event);
72c4fd36 7235err_dcf_support_poll_for_event:
09fced19
SS
7236 driver_remove_file(&megasas_pci_driver.driver,
7237 &driver_attr_release_date);
7238err_dcf_rel_date:
83aabc1b
JG
7239 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
7240err_dcf_attr_ver:
7241 pci_unregister_driver(&megasas_pci_driver);
7242err_pcidrv:
7243 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 7244 return rval;
c4a3e0a5
BS
7245}
7246
7247/**
7248 * megasas_exit - Driver unload entry point
7249 */
7250static void __exit megasas_exit(void)
7251{
658dcedb
SP
7252 driver_remove_file(&megasas_pci_driver.driver,
7253 &driver_attr_dbg_lvl);
837f5fe8
YB
7254 driver_remove_file(&megasas_pci_driver.driver,
7255 &driver_attr_support_poll_for_event);
7256 driver_remove_file(&megasas_pci_driver.driver,
7257 &driver_attr_support_device_change);
09fced19
SS
7258 driver_remove_file(&megasas_pci_driver.driver,
7259 &driver_attr_release_date);
83aabc1b 7260 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS
7261
7262 pci_unregister_driver(&megasas_pci_driver);
7263 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
7264}
7265
7266module_init(megasas_init);
7267module_exit(megasas_exit);
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