Commit | Line | Data |
---|---|---|
b5762948 | 1 | /* |
20b09c29 AY |
2 | * Marvell 88SE64xx/88SE94xx main function |
3 | * | |
4 | * Copyright 2007 Red Hat, Inc. | |
5 | * Copyright 2008 Marvell. <kewei@marvell.com> | |
6 | * | |
7 | * This file is licensed under GPLv2. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; version 2 of the | |
12 | * License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | |
22 | * USA | |
23 | */ | |
b5762948 | 24 | |
dd4969a8 | 25 | #include "mv_sas.h" |
b5762948 | 26 | |
dd4969a8 JG |
27 | static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag) |
28 | { | |
29 | if (task->lldd_task) { | |
30 | struct mvs_slot_info *slot; | |
31 | slot = (struct mvs_slot_info *) task->lldd_task; | |
20b09c29 | 32 | *tag = slot->slot_tag; |
dd4969a8 JG |
33 | return 1; |
34 | } | |
35 | return 0; | |
36 | } | |
8f261aaf | 37 | |
20b09c29 | 38 | void mvs_tag_clear(struct mvs_info *mvi, u32 tag) |
dd4969a8 JG |
39 | { |
40 | void *bitmap = (void *) &mvi->tags; | |
41 | clear_bit(tag, bitmap); | |
42 | } | |
8f261aaf | 43 | |
20b09c29 | 44 | void mvs_tag_free(struct mvs_info *mvi, u32 tag) |
dd4969a8 JG |
45 | { |
46 | mvs_tag_clear(mvi, tag); | |
47 | } | |
8f261aaf | 48 | |
20b09c29 | 49 | void mvs_tag_set(struct mvs_info *mvi, unsigned int tag) |
dd4969a8 JG |
50 | { |
51 | void *bitmap = (void *) &mvi->tags; | |
52 | set_bit(tag, bitmap); | |
53 | } | |
8f261aaf | 54 | |
20b09c29 | 55 | inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out) |
dd4969a8 JG |
56 | { |
57 | unsigned int index, tag; | |
58 | void *bitmap = (void *) &mvi->tags; | |
b5762948 | 59 | |
20b09c29 | 60 | index = find_first_zero_bit(bitmap, mvi->tags_num); |
dd4969a8 | 61 | tag = index; |
20b09c29 | 62 | if (tag >= mvi->tags_num) |
dd4969a8 JG |
63 | return -SAS_QUEUE_FULL; |
64 | mvs_tag_set(mvi, tag); | |
65 | *tag_out = tag; | |
66 | return 0; | |
67 | } | |
b5762948 | 68 | |
dd4969a8 JG |
69 | void mvs_tag_init(struct mvs_info *mvi) |
70 | { | |
71 | int i; | |
20b09c29 | 72 | for (i = 0; i < mvi->tags_num; ++i) |
dd4969a8 JG |
73 | mvs_tag_clear(mvi, i); |
74 | } | |
b5762948 | 75 | |
20b09c29 | 76 | void mvs_hexdump(u32 size, u8 *data, u32 baseaddr) |
8f261aaf KW |
77 | { |
78 | u32 i; | |
79 | u32 run; | |
80 | u32 offset; | |
81 | ||
82 | offset = 0; | |
83 | while (size) { | |
20b09c29 | 84 | printk(KERN_DEBUG"%08X : ", baseaddr + offset); |
8f261aaf KW |
85 | if (size >= 16) |
86 | run = 16; | |
87 | else | |
88 | run = size; | |
89 | size -= run; | |
90 | for (i = 0; i < 16; i++) { | |
91 | if (i < run) | |
20b09c29 | 92 | printk(KERN_DEBUG"%02X ", (u32)data[i]); |
8f261aaf | 93 | else |
20b09c29 | 94 | printk(KERN_DEBUG" "); |
8f261aaf | 95 | } |
20b09c29 | 96 | printk(KERN_DEBUG": "); |
8f261aaf | 97 | for (i = 0; i < run; i++) |
20b09c29 AY |
98 | printk(KERN_DEBUG"%c", |
99 | isalnum(data[i]) ? data[i] : '.'); | |
100 | printk(KERN_DEBUG"\n"); | |
8f261aaf KW |
101 | data = &data[16]; |
102 | offset += run; | |
103 | } | |
20b09c29 | 104 | printk(KERN_DEBUG"\n"); |
8f261aaf KW |
105 | } |
106 | ||
20b09c29 | 107 | #if (_MV_DUMP > 1) |
8f261aaf KW |
108 | static void mvs_hba_sb_dump(struct mvs_info *mvi, u32 tag, |
109 | enum sas_protocol proto) | |
110 | { | |
8f261aaf | 111 | u32 offset; |
8f261aaf KW |
112 | struct mvs_slot_info *slot = &mvi->slot_info[tag]; |
113 | ||
114 | offset = slot->cmd_size + MVS_OAF_SZ + | |
20b09c29 AY |
115 | MVS_CHIP_DISP->prd_size() * slot->n_elem; |
116 | dev_printk(KERN_DEBUG, mvi->dev, "+---->Status buffer[%d] :\n", | |
8f261aaf KW |
117 | tag); |
118 | mvs_hexdump(32, (u8 *) slot->response, | |
119 | (u32) slot->buf_dma + offset); | |
8f261aaf | 120 | } |
ee1f1c2e | 121 | #endif |
8f261aaf KW |
122 | |
123 | static void mvs_hba_memory_dump(struct mvs_info *mvi, u32 tag, | |
124 | enum sas_protocol proto) | |
125 | { | |
20b09c29 | 126 | #if (_MV_DUMP > 1) |
ee1f1c2e | 127 | u32 sz, w_ptr; |
8f261aaf | 128 | u64 addr; |
8f261aaf KW |
129 | struct mvs_slot_info *slot = &mvi->slot_info[tag]; |
130 | ||
131 | /*Delivery Queue */ | |
20b09c29 | 132 | sz = MVS_CHIP_SLOT_SZ; |
ee1f1c2e | 133 | w_ptr = slot->tx; |
20b09c29 AY |
134 | addr = mvi->tx_dma; |
135 | dev_printk(KERN_DEBUG, mvi->dev, | |
ee1f1c2e | 136 | "Delivery Queue Size=%04d , WRT_PTR=%04X\n", sz, w_ptr); |
20b09c29 | 137 | dev_printk(KERN_DEBUG, mvi->dev, |
8f261aaf KW |
138 | "Delivery Queue Base Address=0x%llX (PA)" |
139 | "(tx_dma=0x%llX), Entry=%04d\n", | |
20b09c29 | 140 | addr, (unsigned long long)mvi->tx_dma, w_ptr); |
8f261aaf KW |
141 | mvs_hexdump(sizeof(u32), (u8 *)(&mvi->tx[mvi->tx_prod]), |
142 | (u32) mvi->tx_dma + sizeof(u32) * w_ptr); | |
143 | /*Command List */ | |
ee1f1c2e | 144 | addr = mvi->slot_dma; |
20b09c29 | 145 | dev_printk(KERN_DEBUG, mvi->dev, |
8f261aaf KW |
146 | "Command List Base Address=0x%llX (PA)" |
147 | "(slot_dma=0x%llX), Header=%03d\n", | |
20b09c29 AY |
148 | addr, (unsigned long long)slot->buf_dma, tag); |
149 | dev_printk(KERN_DEBUG, mvi->dev, "Command Header[%03d]:\n", tag); | |
8f261aaf KW |
150 | /*mvs_cmd_hdr */ |
151 | mvs_hexdump(sizeof(struct mvs_cmd_hdr), (u8 *)(&mvi->slot[tag]), | |
152 | (u32) mvi->slot_dma + tag * sizeof(struct mvs_cmd_hdr)); | |
153 | /*1.command table area */ | |
20b09c29 | 154 | dev_printk(KERN_DEBUG, mvi->dev, "+---->Command Table :\n"); |
8f261aaf KW |
155 | mvs_hexdump(slot->cmd_size, (u8 *) slot->buf, (u32) slot->buf_dma); |
156 | /*2.open address frame area */ | |
20b09c29 | 157 | dev_printk(KERN_DEBUG, mvi->dev, "+---->Open Address Frame :\n"); |
8f261aaf KW |
158 | mvs_hexdump(MVS_OAF_SZ, (u8 *) slot->buf + slot->cmd_size, |
159 | (u32) slot->buf_dma + slot->cmd_size); | |
160 | /*3.status buffer */ | |
161 | mvs_hba_sb_dump(mvi, tag, proto); | |
162 | /*4.PRD table */ | |
20b09c29 AY |
163 | dev_printk(KERN_DEBUG, mvi->dev, "+---->PRD table :\n"); |
164 | mvs_hexdump(MVS_CHIP_DISP->prd_size() * slot->n_elem, | |
8f261aaf KW |
165 | (u8 *) slot->buf + slot->cmd_size + MVS_OAF_SZ, |
166 | (u32) slot->buf_dma + slot->cmd_size + MVS_OAF_SZ); | |
167 | #endif | |
168 | } | |
169 | ||
170 | static void mvs_hba_cq_dump(struct mvs_info *mvi) | |
171 | { | |
ee1f1c2e | 172 | #if (_MV_DUMP > 2) |
8f261aaf KW |
173 | u64 addr; |
174 | void __iomem *regs = mvi->regs; | |
8f261aaf KW |
175 | u32 entry = mvi->rx_cons + 1; |
176 | u32 rx_desc = le32_to_cpu(mvi->rx[entry]); | |
177 | ||
178 | /*Completion Queue */ | |
179 | addr = mr32(RX_HI) << 16 << 16 | mr32(RX_LO); | |
20b09c29 | 180 | dev_printk(KERN_DEBUG, mvi->dev, "Completion Task = 0x%p\n", |
ee1f1c2e | 181 | mvi->slot_info[rx_desc & RXQ_SLOT_MASK].task); |
20b09c29 | 182 | dev_printk(KERN_DEBUG, mvi->dev, |
8f261aaf KW |
183 | "Completion List Base Address=0x%llX (PA), " |
184 | "CQ_Entry=%04d, CQ_WP=0x%08X\n", | |
185 | addr, entry - 1, mvi->rx[0]); | |
186 | mvs_hexdump(sizeof(u32), (u8 *)(&rx_desc), | |
187 | mvi->rx_dma + sizeof(u32) * entry); | |
188 | #endif | |
189 | } | |
190 | ||
20b09c29 | 191 | void mvs_get_sas_addr(void *buf, u32 buflen) |
8f261aaf | 192 | { |
20b09c29 AY |
193 | /*memcpy(buf, "\x50\x05\x04\x30\x11\xab\x64\x40", 8);*/ |
194 | } | |
8f261aaf | 195 | |
20b09c29 AY |
196 | struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev) |
197 | { | |
198 | unsigned long i = 0, j = 0, hi = 0; | |
199 | struct sas_ha_struct *sha = dev->port->ha; | |
200 | struct mvs_info *mvi = NULL; | |
201 | struct asd_sas_phy *phy; | |
202 | ||
203 | while (sha->sas_port[i]) { | |
204 | if (sha->sas_port[i] == dev->port) { | |
205 | phy = container_of(sha->sas_port[i]->phy_list.next, | |
206 | struct asd_sas_phy, port_phy_el); | |
207 | j = 0; | |
208 | while (sha->sas_phy[j]) { | |
209 | if (sha->sas_phy[j] == phy) | |
210 | break; | |
211 | j++; | |
212 | } | |
213 | break; | |
214 | } | |
215 | i++; | |
216 | } | |
217 | hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; | |
218 | mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; | |
8f261aaf | 219 | |
20b09c29 | 220 | return mvi; |
8f261aaf | 221 | |
20b09c29 | 222 | } |
8f261aaf | 223 | |
20b09c29 AY |
224 | /* FIXME */ |
225 | int mvs_find_dev_phyno(struct domain_device *dev, int *phyno) | |
226 | { | |
227 | unsigned long i = 0, j = 0, n = 0, num = 0; | |
228 | struct mvs_info *mvi = mvs_find_dev_mvi(dev); | |
229 | struct sas_ha_struct *sha = dev->port->ha; | |
230 | ||
231 | while (sha->sas_port[i]) { | |
232 | if (sha->sas_port[i] == dev->port) { | |
233 | struct asd_sas_phy *phy; | |
234 | list_for_each_entry(phy, | |
235 | &sha->sas_port[i]->phy_list, port_phy_el) { | |
236 | j = 0; | |
237 | while (sha->sas_phy[j]) { | |
238 | if (sha->sas_phy[j] == phy) | |
239 | break; | |
240 | j++; | |
241 | } | |
242 | phyno[n] = (j >= mvi->chip->n_phy) ? | |
243 | (j - mvi->chip->n_phy) : j; | |
244 | num++; | |
245 | n++; | |
dd4969a8 | 246 | } |
dd4969a8 JG |
247 | break; |
248 | } | |
20b09c29 AY |
249 | i++; |
250 | } | |
251 | return num; | |
252 | } | |
253 | ||
254 | static inline void mvs_free_reg_set(struct mvs_info *mvi, | |
255 | struct mvs_device *dev) | |
256 | { | |
257 | if (!dev) { | |
258 | mv_printk("device has been free.\n"); | |
259 | return; | |
260 | } | |
261 | if (dev->runing_req != 0) | |
262 | return; | |
263 | if (dev->taskfileset == MVS_ID_NOT_MAPPED) | |
264 | return; | |
265 | MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset); | |
266 | } | |
267 | ||
268 | static inline u8 mvs_assign_reg_set(struct mvs_info *mvi, | |
269 | struct mvs_device *dev) | |
270 | { | |
271 | if (dev->taskfileset != MVS_ID_NOT_MAPPED) | |
272 | return 0; | |
273 | return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset); | |
274 | } | |
275 | ||
276 | void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard) | |
277 | { | |
278 | u32 no; | |
279 | for_each_phy(phy_mask, phy_mask, no) { | |
280 | if (!(phy_mask & 1)) | |
281 | continue; | |
282 | MVS_CHIP_DISP->phy_reset(mvi, no, hard); | |
283 | } | |
284 | } | |
285 | ||
286 | /* FIXME: locking? */ | |
287 | int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, | |
288 | void *funcdata) | |
289 | { | |
290 | int rc = 0, phy_id = sas_phy->id; | |
291 | u32 tmp, i = 0, hi; | |
292 | struct sas_ha_struct *sha = sas_phy->ha; | |
293 | struct mvs_info *mvi = NULL; | |
294 | ||
295 | while (sha->sas_phy[i]) { | |
296 | if (sha->sas_phy[i] == sas_phy) | |
297 | break; | |
298 | i++; | |
299 | } | |
300 | hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; | |
301 | mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; | |
302 | ||
303 | switch (func) { | |
304 | case PHY_FUNC_SET_LINK_RATE: | |
305 | MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata); | |
306 | break; | |
8f261aaf | 307 | |
dd4969a8 | 308 | case PHY_FUNC_HARD_RESET: |
20b09c29 | 309 | tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id); |
dd4969a8 JG |
310 | if (tmp & PHY_RST_HARD) |
311 | break; | |
20b09c29 | 312 | MVS_CHIP_DISP->phy_reset(mvi, phy_id, 1); |
dd4969a8 | 313 | break; |
b5762948 | 314 | |
dd4969a8 | 315 | case PHY_FUNC_LINK_RESET: |
20b09c29 AY |
316 | MVS_CHIP_DISP->phy_enable(mvi, phy_id); |
317 | MVS_CHIP_DISP->phy_reset(mvi, phy_id, 0); | |
dd4969a8 | 318 | break; |
b5762948 | 319 | |
dd4969a8 | 320 | case PHY_FUNC_DISABLE: |
20b09c29 AY |
321 | MVS_CHIP_DISP->phy_disable(mvi, phy_id); |
322 | break; | |
dd4969a8 JG |
323 | case PHY_FUNC_RELEASE_SPINUP_HOLD: |
324 | default: | |
325 | rc = -EOPNOTSUPP; | |
b5762948 | 326 | } |
20b09c29 | 327 | msleep(200); |
b5762948 JG |
328 | return rc; |
329 | } | |
330 | ||
20b09c29 AY |
331 | void __devinit mvs_set_sas_addr(struct mvs_info *mvi, int port_id, |
332 | u32 off_lo, u32 off_hi, u64 sas_addr) | |
333 | { | |
334 | u32 lo = (u32)sas_addr; | |
335 | u32 hi = (u32)(sas_addr>>32); | |
336 | ||
337 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo); | |
338 | MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo); | |
339 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi); | |
340 | MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi); | |
341 | } | |
342 | ||
dd4969a8 | 343 | static void mvs_bytes_dmaed(struct mvs_info *mvi, int i) |
ee1f1c2e | 344 | { |
dd4969a8 | 345 | struct mvs_phy *phy = &mvi->phy[i]; |
20b09c29 AY |
346 | struct asd_sas_phy *sas_phy = &phy->sas_phy; |
347 | struct sas_ha_struct *sas_ha; | |
dd4969a8 JG |
348 | if (!phy->phy_attached) |
349 | return; | |
350 | ||
20b09c29 AY |
351 | if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK) |
352 | && phy->phy_type & PORT_TYPE_SAS) { | |
353 | return; | |
354 | } | |
355 | ||
356 | sas_ha = mvi->sas; | |
357 | sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE); | |
358 | ||
dd4969a8 JG |
359 | if (sas_phy->phy) { |
360 | struct sas_phy *sphy = sas_phy->phy; | |
361 | ||
362 | sphy->negotiated_linkrate = sas_phy->linkrate; | |
363 | sphy->minimum_linkrate = phy->minimum_linkrate; | |
364 | sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; | |
365 | sphy->maximum_linkrate = phy->maximum_linkrate; | |
20b09c29 | 366 | sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate(); |
ee1f1c2e | 367 | } |
ee1f1c2e | 368 | |
dd4969a8 JG |
369 | if (phy->phy_type & PORT_TYPE_SAS) { |
370 | struct sas_identify_frame *id; | |
b5762948 | 371 | |
dd4969a8 JG |
372 | id = (struct sas_identify_frame *)phy->frame_rcvd; |
373 | id->dev_type = phy->identify.device_type; | |
374 | id->initiator_bits = SAS_PROTOCOL_ALL; | |
375 | id->target_bits = phy->identify.target_port_protocols; | |
376 | } else if (phy->phy_type & PORT_TYPE_SATA) { | |
20b09c29 | 377 | /*Nothing*/ |
dd4969a8 | 378 | } |
20b09c29 AY |
379 | mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy); |
380 | ||
381 | sas_phy->frame_rcvd_size = phy->frame_rcvd_size; | |
382 | ||
383 | mvi->sas->notify_port_event(sas_phy, | |
dd4969a8 | 384 | PORTE_BYTES_DMAED); |
ee1f1c2e KW |
385 | } |
386 | ||
20b09c29 AY |
387 | int mvs_slave_alloc(struct scsi_device *scsi_dev) |
388 | { | |
389 | struct domain_device *dev = sdev_to_domain_dev(scsi_dev); | |
390 | if (dev_is_sata(dev)) { | |
391 | /* We don't need to rescan targets | |
392 | * if REPORT_LUNS request is failed | |
393 | */ | |
394 | if (scsi_dev->lun > 0) | |
395 | return -ENXIO; | |
396 | scsi_dev->tagged_supported = 1; | |
397 | } | |
398 | ||
399 | return sas_slave_alloc(scsi_dev); | |
400 | } | |
401 | ||
dd4969a8 | 402 | int mvs_slave_configure(struct scsi_device *sdev) |
ee1f1c2e | 403 | { |
dd4969a8 JG |
404 | struct domain_device *dev = sdev_to_domain_dev(sdev); |
405 | int ret = sas_slave_configure(sdev); | |
b5762948 | 406 | |
dd4969a8 JG |
407 | if (ret) |
408 | return ret; | |
dd4969a8 | 409 | if (dev_is_sata(dev)) { |
20b09c29 AY |
410 | /* may set PIO mode */ |
411 | #if MV_DISABLE_NCQ | |
412 | struct ata_port *ap = dev->sata_dev.ap; | |
413 | struct ata_device *adev = ap->link.device; | |
414 | adev->flags |= ATA_DFLAG_NCQ_OFF; | |
dd4969a8 | 415 | scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, 1); |
20b09c29 | 416 | #endif |
dd4969a8 | 417 | } |
ee1f1c2e | 418 | return 0; |
b5762948 JG |
419 | } |
420 | ||
dd4969a8 | 421 | void mvs_scan_start(struct Scsi_Host *shost) |
b5762948 | 422 | { |
20b09c29 AY |
423 | int i, j; |
424 | unsigned short core_nr; | |
425 | struct mvs_info *mvi; | |
426 | struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); | |
427 | ||
428 | core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; | |
dd4969a8 | 429 | |
20b09c29 AY |
430 | for (j = 0; j < core_nr; j++) { |
431 | mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j]; | |
432 | for (i = 0; i < mvi->chip->n_phy; ++i) | |
433 | mvs_bytes_dmaed(mvi, i); | |
dd4969a8 | 434 | } |
b5762948 JG |
435 | } |
436 | ||
dd4969a8 | 437 | int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time) |
b5762948 | 438 | { |
dd4969a8 JG |
439 | /* give the phy enabling interrupt event time to come in (1s |
440 | * is empirically about all it takes) */ | |
441 | if (time < HZ) | |
442 | return 0; | |
443 | /* Wait for discovery to finish */ | |
444 | scsi_flush_work(shost); | |
445 | return 1; | |
b5762948 JG |
446 | } |
447 | ||
dd4969a8 JG |
448 | static int mvs_task_prep_smp(struct mvs_info *mvi, |
449 | struct mvs_task_exec_info *tei) | |
b5762948 | 450 | { |
dd4969a8 JG |
451 | int elem, rc, i; |
452 | struct sas_task *task = tei->task; | |
453 | struct mvs_cmd_hdr *hdr = tei->hdr; | |
20b09c29 AY |
454 | struct domain_device *dev = task->dev; |
455 | struct asd_sas_port *sas_port = dev->port; | |
dd4969a8 JG |
456 | struct scatterlist *sg_req, *sg_resp; |
457 | u32 req_len, resp_len, tag = tei->tag; | |
458 | void *buf_tmp; | |
459 | u8 *buf_oaf; | |
460 | dma_addr_t buf_tmp_dma; | |
20b09c29 | 461 | void *buf_prd; |
dd4969a8 | 462 | struct mvs_slot_info *slot = &mvi->slot_info[tag]; |
dd4969a8 JG |
463 | u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); |
464 | #if _MV_DUMP | |
465 | u8 *buf_cmd; | |
466 | void *from; | |
467 | #endif | |
468 | /* | |
469 | * DMA-map SMP request, response buffers | |
470 | */ | |
471 | sg_req = &task->smp_task.smp_req; | |
20b09c29 | 472 | elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE); |
dd4969a8 JG |
473 | if (!elem) |
474 | return -ENOMEM; | |
475 | req_len = sg_dma_len(sg_req); | |
b5762948 | 476 | |
dd4969a8 | 477 | sg_resp = &task->smp_task.smp_resp; |
20b09c29 | 478 | elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE); |
dd4969a8 JG |
479 | if (!elem) { |
480 | rc = -ENOMEM; | |
481 | goto err_out; | |
482 | } | |
20b09c29 | 483 | resp_len = SB_RFB_MAX; |
b5762948 | 484 | |
dd4969a8 JG |
485 | /* must be in dwords */ |
486 | if ((req_len & 0x3) || (resp_len & 0x3)) { | |
487 | rc = -EINVAL; | |
488 | goto err_out_2; | |
b5762948 JG |
489 | } |
490 | ||
dd4969a8 JG |
491 | /* |
492 | * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs | |
493 | */ | |
b5762948 | 494 | |
20b09c29 | 495 | /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */ |
dd4969a8 JG |
496 | buf_tmp = slot->buf; |
497 | buf_tmp_dma = slot->buf_dma; | |
b5762948 | 498 | |
dd4969a8 JG |
499 | #if _MV_DUMP |
500 | buf_cmd = buf_tmp; | |
501 | hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); | |
502 | buf_tmp += req_len; | |
503 | buf_tmp_dma += req_len; | |
504 | slot->cmd_size = req_len; | |
505 | #else | |
506 | hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req)); | |
507 | #endif | |
b5762948 | 508 | |
dd4969a8 JG |
509 | /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ |
510 | buf_oaf = buf_tmp; | |
511 | hdr->open_frame = cpu_to_le64(buf_tmp_dma); | |
b5762948 | 512 | |
dd4969a8 JG |
513 | buf_tmp += MVS_OAF_SZ; |
514 | buf_tmp_dma += MVS_OAF_SZ; | |
b5762948 | 515 | |
20b09c29 | 516 | /* region 3: PRD table *********************************** */ |
dd4969a8 JG |
517 | buf_prd = buf_tmp; |
518 | if (tei->n_elem) | |
519 | hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); | |
520 | else | |
521 | hdr->prd_tbl = 0; | |
b5762948 | 522 | |
20b09c29 | 523 | i = MVS_CHIP_DISP->prd_size() * tei->n_elem; |
dd4969a8 JG |
524 | buf_tmp += i; |
525 | buf_tmp_dma += i; | |
b5762948 | 526 | |
dd4969a8 JG |
527 | /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ |
528 | slot->response = buf_tmp; | |
529 | hdr->status_buf = cpu_to_le64(buf_tmp_dma); | |
20b09c29 AY |
530 | if (mvi->flags & MVF_FLAG_SOC) |
531 | hdr->reserved[0] = 0; | |
b5762948 | 532 | |
dd4969a8 JG |
533 | /* |
534 | * Fill in TX ring and command slot header | |
535 | */ | |
536 | slot->tx = mvi->tx_prod; | |
537 | mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) | | |
538 | TXQ_MODE_I | tag | | |
539 | (sas_port->phy_mask << TXQ_PHY_SHIFT)); | |
b5762948 | 540 | |
dd4969a8 JG |
541 | hdr->flags |= flags; |
542 | hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4)); | |
543 | hdr->tags = cpu_to_le32(tag); | |
544 | hdr->data_len = 0; | |
b5762948 | 545 | |
dd4969a8 | 546 | /* generate open address frame hdr (first 12 bytes) */ |
20b09c29 AY |
547 | /* initiator, SMP, ftype 1h */ |
548 | buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01; | |
549 | buf_oaf[1] = dev->linkrate & 0xf; | |
dd4969a8 | 550 | *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */ |
20b09c29 | 551 | memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); |
dd4969a8 JG |
552 | |
553 | /* fill in PRD (scatter/gather) table, if any */ | |
20b09c29 | 554 | MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); |
b5762948 | 555 | |
dd4969a8 JG |
556 | #if _MV_DUMP |
557 | /* copy cmd table */ | |
558 | from = kmap_atomic(sg_page(sg_req), KM_IRQ0); | |
559 | memcpy(buf_cmd, from + sg_req->offset, req_len); | |
560 | kunmap_atomic(from, KM_IRQ0); | |
561 | #endif | |
b5762948 JG |
562 | return 0; |
563 | ||
dd4969a8 | 564 | err_out_2: |
20b09c29 | 565 | dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1, |
dd4969a8 | 566 | PCI_DMA_FROMDEVICE); |
b5762948 | 567 | err_out: |
20b09c29 | 568 | dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1, |
dd4969a8 | 569 | PCI_DMA_TODEVICE); |
8f261aaf | 570 | return rc; |
8f261aaf KW |
571 | } |
572 | ||
dd4969a8 | 573 | static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag) |
8f261aaf | 574 | { |
dd4969a8 | 575 | struct ata_queued_cmd *qc = task->uldd_task; |
8f261aaf | 576 | |
dd4969a8 JG |
577 | if (qc) { |
578 | if (qc->tf.command == ATA_CMD_FPDMA_WRITE || | |
579 | qc->tf.command == ATA_CMD_FPDMA_READ) { | |
580 | *tag = qc->tag; | |
581 | return 1; | |
582 | } | |
8f261aaf | 583 | } |
8f261aaf | 584 | |
dd4969a8 | 585 | return 0; |
8f261aaf KW |
586 | } |
587 | ||
dd4969a8 JG |
588 | static int mvs_task_prep_ata(struct mvs_info *mvi, |
589 | struct mvs_task_exec_info *tei) | |
b5762948 JG |
590 | { |
591 | struct sas_task *task = tei->task; | |
592 | struct domain_device *dev = task->dev; | |
20b09c29 AY |
593 | struct mvs_device *mvi_dev = |
594 | (struct mvs_device *)dev->lldd_dev; | |
b5762948 JG |
595 | struct mvs_cmd_hdr *hdr = tei->hdr; |
596 | struct asd_sas_port *sas_port = dev->port; | |
8f261aaf | 597 | struct mvs_slot_info *slot; |
20b09c29 AY |
598 | void *buf_prd; |
599 | u32 tag = tei->tag, hdr_tag; | |
600 | u32 flags, del_q; | |
b5762948 JG |
601 | void *buf_tmp; |
602 | u8 *buf_cmd, *buf_oaf; | |
603 | dma_addr_t buf_tmp_dma; | |
8f261aaf KW |
604 | u32 i, req_len, resp_len; |
605 | const u32 max_resp_len = SB_RFB_MAX; | |
606 | ||
20b09c29 AY |
607 | if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) { |
608 | mv_dprintk("Have not enough regiset for dev %d.\n", | |
609 | mvi_dev->device_id); | |
8f261aaf | 610 | return -EBUSY; |
20b09c29 | 611 | } |
8f261aaf KW |
612 | slot = &mvi->slot_info[tag]; |
613 | slot->tx = mvi->tx_prod; | |
20b09c29 AY |
614 | del_q = TXQ_MODE_I | tag | |
615 | (TXQ_CMD_STP << TXQ_CMD_SHIFT) | | |
616 | (sas_port->phy_mask << TXQ_PHY_SHIFT) | | |
617 | (mvi_dev->taskfileset << TXQ_SRS_SHIFT); | |
618 | mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q); | |
619 | ||
620 | #ifndef DISABLE_HOTPLUG_DMA_FIX | |
621 | if (task->data_dir == DMA_FROM_DEVICE) | |
622 | flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT); | |
623 | else | |
624 | flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); | |
625 | #else | |
626 | flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); | |
627 | #endif | |
b5762948 JG |
628 | if (task->ata_task.use_ncq) |
629 | flags |= MCH_FPDMA; | |
8f261aaf KW |
630 | if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) { |
631 | if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI) | |
632 | flags |= MCH_ATAPI; | |
633 | } | |
634 | ||
b5762948 JG |
635 | /* FIXME: fill in port multiplier number */ |
636 | ||
637 | hdr->flags = cpu_to_le32(flags); | |
8f261aaf KW |
638 | |
639 | /* FIXME: the low order order 5 bits for the TAG if enable NCQ */ | |
20b09c29 AY |
640 | if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag)) |
641 | task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); | |
4e52fc0a | 642 | else |
20b09c29 AY |
643 | hdr_tag = tag; |
644 | ||
645 | hdr->tags = cpu_to_le32(hdr_tag); | |
646 | ||
b5762948 JG |
647 | hdr->data_len = cpu_to_le32(task->total_xfer_len); |
648 | ||
649 | /* | |
650 | * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs | |
651 | */ | |
b5762948 | 652 | |
8f261aaf KW |
653 | /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */ |
654 | buf_cmd = buf_tmp = slot->buf; | |
b5762948 JG |
655 | buf_tmp_dma = slot->buf_dma; |
656 | ||
657 | hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); | |
658 | ||
659 | buf_tmp += MVS_ATA_CMD_SZ; | |
660 | buf_tmp_dma += MVS_ATA_CMD_SZ; | |
8f261aaf KW |
661 | #if _MV_DUMP |
662 | slot->cmd_size = MVS_ATA_CMD_SZ; | |
663 | #endif | |
b5762948 | 664 | |
8f261aaf | 665 | /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ |
b5762948 JG |
666 | /* used for STP. unused for SATA? */ |
667 | buf_oaf = buf_tmp; | |
668 | hdr->open_frame = cpu_to_le64(buf_tmp_dma); | |
669 | ||
670 | buf_tmp += MVS_OAF_SZ; | |
671 | buf_tmp_dma += MVS_OAF_SZ; | |
672 | ||
8f261aaf | 673 | /* region 3: PRD table ********************************************* */ |
b5762948 | 674 | buf_prd = buf_tmp; |
20b09c29 | 675 | |
8f261aaf KW |
676 | if (tei->n_elem) |
677 | hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); | |
678 | else | |
679 | hdr->prd_tbl = 0; | |
20b09c29 | 680 | i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count(); |
b5762948 | 681 | |
b5762948 JG |
682 | buf_tmp += i; |
683 | buf_tmp_dma += i; | |
684 | ||
8f261aaf | 685 | /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ |
b5762948 JG |
686 | /* FIXME: probably unused, for SATA. kept here just in case |
687 | * we get a STP/SATA error information record | |
688 | */ | |
689 | slot->response = buf_tmp; | |
690 | hdr->status_buf = cpu_to_le64(buf_tmp_dma); | |
20b09c29 AY |
691 | if (mvi->flags & MVF_FLAG_SOC) |
692 | hdr->reserved[0] = 0; | |
b5762948 | 693 | |
8f261aaf | 694 | req_len = sizeof(struct host_to_dev_fis); |
b5762948 | 695 | resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ - |
8f261aaf | 696 | sizeof(struct mvs_err_info) - i; |
b5762948 JG |
697 | |
698 | /* request, response lengths */ | |
8f261aaf | 699 | resp_len = min(resp_len, max_resp_len); |
b5762948 JG |
700 | hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); |
701 | ||
20b09c29 AY |
702 | if (likely(!task->ata_task.device_control_reg_update)) |
703 | task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */ | |
b5762948 | 704 | /* fill in command FIS and ATAPI CDB */ |
8f261aaf KW |
705 | memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis)); |
706 | if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) | |
707 | memcpy(buf_cmd + STP_ATAPI_CMD, | |
708 | task->ata_task.atapi_packet, 16); | |
709 | ||
710 | /* generate open address frame hdr (first 12 bytes) */ | |
20b09c29 AY |
711 | /* initiator, STP, ftype 1h */ |
712 | buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1; | |
713 | buf_oaf[1] = dev->linkrate & 0xf; | |
714 | *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); | |
715 | memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); | |
b5762948 JG |
716 | |
717 | /* fill in PRD (scatter/gather) table, if any */ | |
20b09c29 AY |
718 | MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); |
719 | #ifndef DISABLE_HOTPLUG_DMA_FIX | |
720 | if (task->data_dir == DMA_FROM_DEVICE) | |
721 | MVS_CHIP_DISP->dma_fix(mvi->bulk_buffer_dma, | |
722 | TRASH_BUCKET_SIZE, tei->n_elem, buf_prd); | |
723 | #endif | |
b5762948 JG |
724 | return 0; |
725 | } | |
726 | ||
727 | static int mvs_task_prep_ssp(struct mvs_info *mvi, | |
20b09c29 AY |
728 | struct mvs_task_exec_info *tei, int is_tmf, |
729 | struct mvs_tmf_task *tmf) | |
b5762948 JG |
730 | { |
731 | struct sas_task *task = tei->task; | |
b5762948 | 732 | struct mvs_cmd_hdr *hdr = tei->hdr; |
8f261aaf | 733 | struct mvs_port *port = tei->port; |
20b09c29 AY |
734 | struct domain_device *dev = task->dev; |
735 | struct mvs_device *mvi_dev = | |
736 | (struct mvs_device *)dev->lldd_dev; | |
737 | struct asd_sas_port *sas_port = dev->port; | |
b5762948 | 738 | struct mvs_slot_info *slot; |
20b09c29 | 739 | void *buf_prd; |
b5762948 JG |
740 | struct ssp_frame_hdr *ssp_hdr; |
741 | void *buf_tmp; | |
742 | u8 *buf_cmd, *buf_oaf, fburst = 0; | |
743 | dma_addr_t buf_tmp_dma; | |
744 | u32 flags; | |
8f261aaf KW |
745 | u32 resp_len, req_len, i, tag = tei->tag; |
746 | const u32 max_resp_len = SB_RFB_MAX; | |
20b09c29 | 747 | u32 phy_mask; |
b5762948 JG |
748 | |
749 | slot = &mvi->slot_info[tag]; | |
750 | ||
20b09c29 AY |
751 | phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap : |
752 | sas_port->phy_mask) & TXQ_PHY_MASK; | |
753 | ||
8f261aaf KW |
754 | slot->tx = mvi->tx_prod; |
755 | mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag | | |
756 | (TXQ_CMD_SSP << TXQ_CMD_SHIFT) | | |
4e52fc0a | 757 | (phy_mask << TXQ_PHY_SHIFT)); |
b5762948 JG |
758 | |
759 | flags = MCH_RETRY; | |
760 | if (task->ssp_task.enable_first_burst) { | |
761 | flags |= MCH_FBURST; | |
762 | fburst = (1 << 7); | |
763 | } | |
2b288133 AY |
764 | if (is_tmf) |
765 | flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT); | |
766 | else | |
767 | flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT); | |
768 | hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT)); | |
b5762948 JG |
769 | hdr->tags = cpu_to_le32(tag); |
770 | hdr->data_len = cpu_to_le32(task->total_xfer_len); | |
771 | ||
772 | /* | |
773 | * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs | |
774 | */ | |
b5762948 | 775 | |
8f261aaf KW |
776 | /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */ |
777 | buf_cmd = buf_tmp = slot->buf; | |
b5762948 JG |
778 | buf_tmp_dma = slot->buf_dma; |
779 | ||
780 | hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); | |
781 | ||
782 | buf_tmp += MVS_SSP_CMD_SZ; | |
783 | buf_tmp_dma += MVS_SSP_CMD_SZ; | |
8f261aaf KW |
784 | #if _MV_DUMP |
785 | slot->cmd_size = MVS_SSP_CMD_SZ; | |
786 | #endif | |
b5762948 | 787 | |
8f261aaf | 788 | /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ |
b5762948 JG |
789 | buf_oaf = buf_tmp; |
790 | hdr->open_frame = cpu_to_le64(buf_tmp_dma); | |
791 | ||
792 | buf_tmp += MVS_OAF_SZ; | |
793 | buf_tmp_dma += MVS_OAF_SZ; | |
794 | ||
8f261aaf | 795 | /* region 3: PRD table ********************************************* */ |
b5762948 | 796 | buf_prd = buf_tmp; |
8f261aaf KW |
797 | if (tei->n_elem) |
798 | hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); | |
799 | else | |
800 | hdr->prd_tbl = 0; | |
b5762948 | 801 | |
20b09c29 | 802 | i = MVS_CHIP_DISP->prd_size() * tei->n_elem; |
b5762948 JG |
803 | buf_tmp += i; |
804 | buf_tmp_dma += i; | |
805 | ||
8f261aaf | 806 | /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ |
b5762948 JG |
807 | slot->response = buf_tmp; |
808 | hdr->status_buf = cpu_to_le64(buf_tmp_dma); | |
20b09c29 AY |
809 | if (mvi->flags & MVF_FLAG_SOC) |
810 | hdr->reserved[0] = 0; | |
b5762948 | 811 | |
b5762948 | 812 | resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ - |
8f261aaf KW |
813 | sizeof(struct mvs_err_info) - i; |
814 | resp_len = min(resp_len, max_resp_len); | |
815 | ||
816 | req_len = sizeof(struct ssp_frame_hdr) + 28; | |
b5762948 JG |
817 | |
818 | /* request, response lengths */ | |
819 | hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); | |
820 | ||
821 | /* generate open address frame hdr (first 12 bytes) */ | |
20b09c29 AY |
822 | /* initiator, SSP, ftype 1h */ |
823 | buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1; | |
824 | buf_oaf[1] = dev->linkrate & 0xf; | |
825 | *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); | |
826 | memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); | |
b5762948 | 827 | |
8f261aaf KW |
828 | /* fill in SSP frame header (Command Table.SSP frame header) */ |
829 | ssp_hdr = (struct ssp_frame_hdr *)buf_cmd; | |
20b09c29 AY |
830 | |
831 | if (is_tmf) | |
832 | ssp_hdr->frame_type = SSP_TASK; | |
833 | else | |
834 | ssp_hdr->frame_type = SSP_COMMAND; | |
835 | ||
836 | memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr, | |
b5762948 JG |
837 | HASHED_SAS_ADDR_SIZE); |
838 | memcpy(ssp_hdr->hashed_src_addr, | |
20b09c29 | 839 | dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE); |
b5762948 JG |
840 | ssp_hdr->tag = cpu_to_be16(tag); |
841 | ||
20b09c29 | 842 | /* fill in IU for TASK and Command Frame */ |
b5762948 JG |
843 | buf_cmd += sizeof(*ssp_hdr); |
844 | memcpy(buf_cmd, &task->ssp_task.LUN, 8); | |
b5762948 | 845 | |
20b09c29 AY |
846 | if (ssp_hdr->frame_type != SSP_TASK) { |
847 | buf_cmd[9] = fburst | task->ssp_task.task_attr | | |
848 | (task->ssp_task.task_prio << 3); | |
849 | memcpy(buf_cmd + 12, &task->ssp_task.cdb, 16); | |
850 | } else{ | |
851 | buf_cmd[10] = tmf->tmf; | |
852 | switch (tmf->tmf) { | |
853 | case TMF_ABORT_TASK: | |
854 | case TMF_QUERY_TASK: | |
855 | buf_cmd[12] = | |
856 | (tmf->tag_of_task_to_be_managed >> 8) & 0xff; | |
857 | buf_cmd[13] = | |
858 | tmf->tag_of_task_to_be_managed & 0xff; | |
859 | break; | |
860 | default: | |
861 | break; | |
862 | } | |
b5762948 | 863 | } |
20b09c29 AY |
864 | /* fill in PRD (scatter/gather) table, if any */ |
865 | MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); | |
b5762948 JG |
866 | return 0; |
867 | } | |
868 | ||
20b09c29 AY |
869 | #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == NO_DEVICE))) |
870 | static int mvs_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags, | |
0b84b709 AY |
871 | struct completion *completion,int is_tmf, |
872 | struct mvs_tmf_task *tmf) | |
b5762948 | 873 | { |
8f261aaf | 874 | struct domain_device *dev = task->dev; |
20b09c29 AY |
875 | struct mvs_info *mvi; |
876 | struct mvs_device *mvi_dev; | |
b5762948 | 877 | struct mvs_task_exec_info tei; |
8f261aaf | 878 | struct sas_task *t = task; |
4e52fc0a | 879 | struct mvs_slot_info *slot; |
8f261aaf | 880 | u32 tag = 0xdeadbeef, rc, n_elem = 0; |
8f261aaf | 881 | u32 n = num, pass = 0; |
20b09c29 | 882 | unsigned long flags = 0; |
b5762948 | 883 | |
20b09c29 AY |
884 | if (!dev->port) { |
885 | struct task_status_struct *tsm = &t->task_status; | |
886 | ||
887 | tsm->resp = SAS_TASK_UNDELIVERED; | |
888 | tsm->stat = SAS_PHY_DOWN; | |
889 | t->task_done(t); | |
890 | return 0; | |
891 | } | |
892 | ||
893 | mvi = mvs_find_dev_mvi(task->dev); | |
894 | ||
0b84b709 | 895 | spin_lock_irqsave(&mvi->lock, flags); |
8f261aaf | 896 | do { |
4e52fc0a | 897 | dev = t->dev; |
20b09c29 AY |
898 | mvi_dev = (struct mvs_device *)dev->lldd_dev; |
899 | if (DEV_IS_GONE(mvi_dev)) { | |
900 | if (mvi_dev) | |
901 | mv_dprintk("device %d not ready.\n", | |
902 | mvi_dev->device_id); | |
903 | else | |
904 | mv_dprintk("device %016llx not ready.\n", | |
905 | SAS_ADDR(dev->sas_addr)); | |
906 | ||
907 | rc = SAS_PHY_DOWN; | |
908 | goto out_done; | |
909 | } | |
910 | ||
911 | if (dev->port->id >= mvi->chip->n_phy) | |
912 | tei.port = &mvi->port[dev->port->id - mvi->chip->n_phy]; | |
913 | else | |
914 | tei.port = &mvi->port[dev->port->id]; | |
b5762948 | 915 | |
dd4969a8 JG |
916 | if (!tei.port->port_attached) { |
917 | if (sas_protocol_ata(t->task_proto)) { | |
20b09c29 AY |
918 | mv_dprintk("port %d does not" |
919 | "attached device.\n", dev->port->id); | |
dd4969a8 JG |
920 | rc = SAS_PHY_DOWN; |
921 | goto out_done; | |
922 | } else { | |
923 | struct task_status_struct *ts = &t->task_status; | |
924 | ts->resp = SAS_TASK_UNDELIVERED; | |
925 | ts->stat = SAS_PHY_DOWN; | |
926 | t->task_done(t); | |
927 | if (n > 1) | |
928 | t = list_entry(t->list.next, | |
929 | struct sas_task, list); | |
930 | continue; | |
931 | } | |
932 | } | |
933 | ||
934 | if (!sas_protocol_ata(t->task_proto)) { | |
935 | if (t->num_scatter) { | |
20b09c29 AY |
936 | n_elem = dma_map_sg(mvi->dev, |
937 | t->scatter, | |
dd4969a8 JG |
938 | t->num_scatter, |
939 | t->data_dir); | |
940 | if (!n_elem) { | |
941 | rc = -ENOMEM; | |
942 | goto err_out; | |
943 | } | |
944 | } | |
945 | } else { | |
946 | n_elem = t->num_scatter; | |
947 | } | |
948 | ||
949 | rc = mvs_tag_alloc(mvi, &tag); | |
950 | if (rc) | |
951 | goto err_out; | |
952 | ||
953 | slot = &mvi->slot_info[tag]; | |
20b09c29 AY |
954 | |
955 | ||
dd4969a8 JG |
956 | t->lldd_task = NULL; |
957 | slot->n_elem = n_elem; | |
20b09c29 | 958 | slot->slot_tag = tag; |
dd4969a8 | 959 | memset(slot->buf, 0, MVS_SLOT_BUF_SZ); |
20b09c29 | 960 | |
dd4969a8 JG |
961 | tei.task = t; |
962 | tei.hdr = &mvi->slot[tag]; | |
963 | tei.tag = tag; | |
964 | tei.n_elem = n_elem; | |
dd4969a8 JG |
965 | switch (t->task_proto) { |
966 | case SAS_PROTOCOL_SMP: | |
967 | rc = mvs_task_prep_smp(mvi, &tei); | |
968 | break; | |
969 | case SAS_PROTOCOL_SSP: | |
20b09c29 | 970 | rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf); |
dd4969a8 JG |
971 | break; |
972 | case SAS_PROTOCOL_SATA: | |
973 | case SAS_PROTOCOL_STP: | |
974 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: | |
975 | rc = mvs_task_prep_ata(mvi, &tei); | |
976 | break; | |
977 | default: | |
20b09c29 | 978 | dev_printk(KERN_ERR, mvi->dev, |
dd4969a8 JG |
979 | "unknown sas_task proto: 0x%x\n", |
980 | t->task_proto); | |
981 | rc = -EINVAL; | |
982 | break; | |
983 | } | |
984 | ||
20b09c29 AY |
985 | if (rc) { |
986 | mv_dprintk("rc is %x\n", rc); | |
dd4969a8 | 987 | goto err_out_tag; |
20b09c29 | 988 | } |
dd4969a8 JG |
989 | slot->task = t; |
990 | slot->port = tei.port; | |
991 | t->lldd_task = (void *) slot; | |
20b09c29 | 992 | list_add_tail(&slot->entry, &tei.port->list); |
dd4969a8 | 993 | /* TODO: select normal or high priority */ |
dd4969a8 JG |
994 | spin_lock(&t->task_state_lock); |
995 | t->task_state_flags |= SAS_TASK_AT_INITIATOR; | |
996 | spin_unlock(&t->task_state_lock); | |
997 | ||
998 | mvs_hba_memory_dump(mvi, tag, t->task_proto); | |
20b09c29 | 999 | mvi_dev->runing_req++; |
dd4969a8 JG |
1000 | ++pass; |
1001 | mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1); | |
1002 | if (n > 1) | |
1003 | t = list_entry(t->list.next, struct sas_task, list); | |
1004 | } while (--n); | |
dd4969a8 JG |
1005 | rc = 0; |
1006 | goto out_done; | |
1007 | ||
1008 | err_out_tag: | |
1009 | mvs_tag_free(mvi, tag); | |
1010 | err_out: | |
20b09c29 AY |
1011 | |
1012 | dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc); | |
dd4969a8 JG |
1013 | if (!sas_protocol_ata(t->task_proto)) |
1014 | if (n_elem) | |
20b09c29 | 1015 | dma_unmap_sg(mvi->dev, t->scatter, n_elem, |
dd4969a8 JG |
1016 | t->data_dir); |
1017 | out_done: | |
20b09c29 AY |
1018 | if (likely(pass)) { |
1019 | MVS_CHIP_DISP->start_delivery(mvi, | |
1020 | (mvi->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1)); | |
1021 | } | |
0b84b709 | 1022 | spin_unlock_irqrestore(&mvi->lock, flags); |
dd4969a8 JG |
1023 | return rc; |
1024 | } | |
1025 | ||
20b09c29 AY |
1026 | int mvs_queue_command(struct sas_task *task, const int num, |
1027 | gfp_t gfp_flags) | |
1028 | { | |
0b84b709 | 1029 | return mvs_task_exec(task, num, gfp_flags, NULL, 0, NULL); |
20b09c29 AY |
1030 | } |
1031 | ||
dd4969a8 JG |
1032 | static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc) |
1033 | { | |
1034 | u32 slot_idx = rx_desc & RXQ_SLOT_MASK; | |
1035 | mvs_tag_clear(mvi, slot_idx); | |
1036 | } | |
1037 | ||
1038 | static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task, | |
1039 | struct mvs_slot_info *slot, u32 slot_idx) | |
1040 | { | |
20b09c29 AY |
1041 | if (!slot->task) |
1042 | return; | |
dd4969a8 JG |
1043 | if (!sas_protocol_ata(task->task_proto)) |
1044 | if (slot->n_elem) | |
20b09c29 | 1045 | dma_unmap_sg(mvi->dev, task->scatter, |
dd4969a8 JG |
1046 | slot->n_elem, task->data_dir); |
1047 | ||
1048 | switch (task->task_proto) { | |
1049 | case SAS_PROTOCOL_SMP: | |
20b09c29 | 1050 | dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1, |
dd4969a8 | 1051 | PCI_DMA_FROMDEVICE); |
20b09c29 | 1052 | dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1, |
dd4969a8 JG |
1053 | PCI_DMA_TODEVICE); |
1054 | break; | |
1055 | ||
1056 | case SAS_PROTOCOL_SATA: | |
1057 | case SAS_PROTOCOL_STP: | |
1058 | case SAS_PROTOCOL_SSP: | |
1059 | default: | |
1060 | /* do nothing */ | |
1061 | break; | |
1062 | } | |
20b09c29 | 1063 | list_del_init(&slot->entry); |
dd4969a8 JG |
1064 | task->lldd_task = NULL; |
1065 | slot->task = NULL; | |
1066 | slot->port = NULL; | |
20b09c29 AY |
1067 | slot->slot_tag = 0xFFFFFFFF; |
1068 | mvs_slot_free(mvi, slot_idx); | |
dd4969a8 JG |
1069 | } |
1070 | ||
1071 | static void mvs_update_wideport(struct mvs_info *mvi, int i) | |
1072 | { | |
1073 | struct mvs_phy *phy = &mvi->phy[i]; | |
1074 | struct mvs_port *port = phy->port; | |
1075 | int j, no; | |
1076 | ||
20b09c29 AY |
1077 | for_each_phy(port->wide_port_phymap, j, no) { |
1078 | if (j & 1) { | |
1079 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, | |
1080 | PHYR_WIDE_PORT); | |
1081 | MVS_CHIP_DISP->write_port_cfg_data(mvi, no, | |
dd4969a8 JG |
1082 | port->wide_port_phymap); |
1083 | } else { | |
20b09c29 AY |
1084 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, |
1085 | PHYR_WIDE_PORT); | |
1086 | MVS_CHIP_DISP->write_port_cfg_data(mvi, no, | |
1087 | 0); | |
dd4969a8 | 1088 | } |
20b09c29 | 1089 | } |
dd4969a8 JG |
1090 | } |
1091 | ||
1092 | static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i) | |
1093 | { | |
1094 | u32 tmp; | |
1095 | struct mvs_phy *phy = &mvi->phy[i]; | |
20b09c29 | 1096 | struct mvs_port *port = phy->port; |
dd4969a8 | 1097 | |
20b09c29 | 1098 | tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i); |
dd4969a8 JG |
1099 | if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) { |
1100 | if (!port) | |
1101 | phy->phy_attached = 1; | |
1102 | return tmp; | |
1103 | } | |
1104 | ||
1105 | if (port) { | |
1106 | if (phy->phy_type & PORT_TYPE_SAS) { | |
1107 | port->wide_port_phymap &= ~(1U << i); | |
1108 | if (!port->wide_port_phymap) | |
1109 | port->port_attached = 0; | |
1110 | mvs_update_wideport(mvi, i); | |
1111 | } else if (phy->phy_type & PORT_TYPE_SATA) | |
1112 | port->port_attached = 0; | |
dd4969a8 JG |
1113 | phy->port = NULL; |
1114 | phy->phy_attached = 0; | |
1115 | phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA); | |
1116 | } | |
1117 | return 0; | |
1118 | } | |
1119 | ||
1120 | static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf) | |
1121 | { | |
1122 | u32 *s = (u32 *) buf; | |
1123 | ||
1124 | if (!s) | |
1125 | return NULL; | |
1126 | ||
20b09c29 AY |
1127 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3); |
1128 | s[3] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i); | |
dd4969a8 | 1129 | |
20b09c29 AY |
1130 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2); |
1131 | s[2] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i); | |
dd4969a8 | 1132 | |
20b09c29 AY |
1133 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1); |
1134 | s[1] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i); | |
dd4969a8 | 1135 | |
20b09c29 AY |
1136 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0); |
1137 | s[0] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i); | |
1138 | ||
1139 | /* Workaround: take some ATAPI devices for ATA */ | |
1140 | if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01)) | |
1141 | s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10); | |
dd4969a8 JG |
1142 | |
1143 | return (void *)s; | |
1144 | } | |
1145 | ||
1146 | static u32 mvs_is_sig_fis_received(u32 irq_status) | |
1147 | { | |
1148 | return irq_status & PHYEV_SIG_FIS; | |
1149 | } | |
1150 | ||
20b09c29 | 1151 | void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st) |
dd4969a8 JG |
1152 | { |
1153 | struct mvs_phy *phy = &mvi->phy[i]; | |
20b09c29 | 1154 | struct sas_identify_frame *id; |
b5762948 | 1155 | |
20b09c29 | 1156 | id = (struct sas_identify_frame *)phy->frame_rcvd; |
b5762948 | 1157 | |
dd4969a8 | 1158 | if (get_st) { |
20b09c29 | 1159 | phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i); |
dd4969a8 JG |
1160 | phy->phy_status = mvs_is_phy_ready(mvi, i); |
1161 | } | |
8f261aaf | 1162 | |
dd4969a8 | 1163 | if (phy->phy_status) { |
20b09c29 AY |
1164 | int oob_done = 0; |
1165 | struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy; | |
b5762948 | 1166 | |
20b09c29 AY |
1167 | oob_done = MVS_CHIP_DISP->oob_done(mvi, i); |
1168 | ||
1169 | MVS_CHIP_DISP->fix_phy_info(mvi, i, id); | |
1170 | if (phy->phy_type & PORT_TYPE_SATA) { | |
1171 | phy->identify.target_port_protocols = SAS_PROTOCOL_STP; | |
1172 | if (mvs_is_sig_fis_received(phy->irq_status)) { | |
1173 | phy->phy_attached = 1; | |
1174 | phy->att_dev_sas_addr = | |
1175 | i + mvi->id * mvi->chip->n_phy; | |
1176 | if (oob_done) | |
1177 | sas_phy->oob_mode = SATA_OOB_MODE; | |
1178 | phy->frame_rcvd_size = | |
1179 | sizeof(struct dev_to_host_fis); | |
1180 | mvs_get_d2h_reg(mvi, i, (void *)id); | |
1181 | } else { | |
1182 | u32 tmp; | |
1183 | dev_printk(KERN_DEBUG, mvi->dev, | |
1184 | "Phy%d : No sig fis\n", i); | |
1185 | tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i); | |
1186 | MVS_CHIP_DISP->write_port_irq_mask(mvi, i, | |
1187 | tmp | PHYEV_SIG_FIS); | |
1188 | phy->phy_attached = 0; | |
1189 | phy->phy_type &= ~PORT_TYPE_SATA; | |
1190 | MVS_CHIP_DISP->phy_reset(mvi, i, 0); | |
1191 | goto out_done; | |
1192 | } | |
1193 | } else if (phy->phy_type & PORT_TYPE_SAS | |
1194 | || phy->att_dev_info & PORT_SSP_INIT_MASK) { | |
1195 | phy->phy_attached = 1; | |
dd4969a8 | 1196 | phy->identify.device_type = |
20b09c29 | 1197 | phy->att_dev_info & PORT_DEV_TYPE_MASK; |
b5762948 | 1198 | |
dd4969a8 JG |
1199 | if (phy->identify.device_type == SAS_END_DEV) |
1200 | phy->identify.target_port_protocols = | |
1201 | SAS_PROTOCOL_SSP; | |
1202 | else if (phy->identify.device_type != NO_DEVICE) | |
1203 | phy->identify.target_port_protocols = | |
1204 | SAS_PROTOCOL_SMP; | |
20b09c29 | 1205 | if (oob_done) |
dd4969a8 JG |
1206 | sas_phy->oob_mode = SAS_OOB_MODE; |
1207 | phy->frame_rcvd_size = | |
1208 | sizeof(struct sas_identify_frame); | |
dd4969a8 | 1209 | } |
20b09c29 AY |
1210 | memcpy(sas_phy->attached_sas_addr, |
1211 | &phy->att_dev_sas_addr, SAS_ADDR_SIZE); | |
b5762948 | 1212 | |
20b09c29 AY |
1213 | if (MVS_CHIP_DISP->phy_work_around) |
1214 | MVS_CHIP_DISP->phy_work_around(mvi, i); | |
dd4969a8 | 1215 | } |
20b09c29 AY |
1216 | mv_dprintk("port %d attach dev info is %x\n", |
1217 | i + mvi->id * mvi->chip->n_phy, phy->att_dev_info); | |
1218 | mv_dprintk("port %d attach sas addr is %llx\n", | |
1219 | i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr); | |
4e52fc0a | 1220 | out_done: |
dd4969a8 | 1221 | if (get_st) |
20b09c29 | 1222 | MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status); |
b5762948 JG |
1223 | } |
1224 | ||
20b09c29 | 1225 | static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock) |
8f261aaf | 1226 | { |
dd4969a8 | 1227 | struct sas_ha_struct *sas_ha = sas_phy->ha; |
20b09c29 | 1228 | struct mvs_info *mvi = NULL; int i = 0, hi; |
dd4969a8 | 1229 | struct mvs_phy *phy = sas_phy->lldd_phy; |
20b09c29 AY |
1230 | struct asd_sas_port *sas_port = sas_phy->port; |
1231 | struct mvs_port *port; | |
1232 | unsigned long flags = 0; | |
1233 | if (!sas_port) | |
1234 | return; | |
8f261aaf | 1235 | |
20b09c29 AY |
1236 | while (sas_ha->sas_phy[i]) { |
1237 | if (sas_ha->sas_phy[i] == sas_phy) | |
1238 | break; | |
1239 | i++; | |
1240 | } | |
1241 | hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy; | |
1242 | mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi]; | |
1243 | if (sas_port->id >= mvi->chip->n_phy) | |
1244 | port = &mvi->port[sas_port->id - mvi->chip->n_phy]; | |
1245 | else | |
1246 | port = &mvi->port[sas_port->id]; | |
1247 | if (lock) | |
1248 | spin_lock_irqsave(&mvi->lock, flags); | |
dd4969a8 JG |
1249 | port->port_attached = 1; |
1250 | phy->port = port; | |
dd4969a8 JG |
1251 | if (phy->phy_type & PORT_TYPE_SAS) { |
1252 | port->wide_port_phymap = sas_port->phy_mask; | |
20b09c29 | 1253 | mv_printk("set wide port phy map %x\n", sas_port->phy_mask); |
dd4969a8 | 1254 | mvs_update_wideport(mvi, sas_phy->id); |
8f261aaf | 1255 | } |
20b09c29 AY |
1256 | if (lock) |
1257 | spin_unlock_irqrestore(&mvi->lock, flags); | |
dd4969a8 JG |
1258 | } |
1259 | ||
20b09c29 | 1260 | static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock) |
dd4969a8 | 1261 | { |
20b09c29 | 1262 | /*Nothing*/ |
dd4969a8 JG |
1263 | } |
1264 | ||
dd4969a8 | 1265 | |
20b09c29 AY |
1266 | void mvs_port_formed(struct asd_sas_phy *sas_phy) |
1267 | { | |
1268 | mvs_port_notify_formed(sas_phy, 1); | |
dd4969a8 JG |
1269 | } |
1270 | ||
20b09c29 | 1271 | void mvs_port_deformed(struct asd_sas_phy *sas_phy) |
dd4969a8 | 1272 | { |
20b09c29 AY |
1273 | mvs_port_notify_deformed(sas_phy, 1); |
1274 | } | |
8f261aaf | 1275 | |
20b09c29 AY |
1276 | struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi) |
1277 | { | |
1278 | u32 dev; | |
1279 | for (dev = 0; dev < MVS_MAX_DEVICES; dev++) { | |
1280 | if (mvi->devices[dev].dev_type == NO_DEVICE) { | |
1281 | mvi->devices[dev].device_id = dev; | |
1282 | return &mvi->devices[dev]; | |
1283 | } | |
8f261aaf | 1284 | } |
8121ed42 | 1285 | |
20b09c29 AY |
1286 | if (dev == MVS_MAX_DEVICES) |
1287 | mv_printk("max support %d devices, ignore ..\n", | |
1288 | MVS_MAX_DEVICES); | |
1289 | ||
1290 | return NULL; | |
8f261aaf KW |
1291 | } |
1292 | ||
20b09c29 | 1293 | void mvs_free_dev(struct mvs_device *mvi_dev) |
b5762948 | 1294 | { |
20b09c29 AY |
1295 | u32 id = mvi_dev->device_id; |
1296 | memset(mvi_dev, 0, sizeof(*mvi_dev)); | |
1297 | mvi_dev->device_id = id; | |
1298 | mvi_dev->dev_type = NO_DEVICE; | |
1299 | mvi_dev->dev_status = MVS_DEV_NORMAL; | |
1300 | mvi_dev->taskfileset = MVS_ID_NOT_MAPPED; | |
1301 | } | |
b5762948 | 1302 | |
20b09c29 AY |
1303 | int mvs_dev_found_notify(struct domain_device *dev, int lock) |
1304 | { | |
1305 | unsigned long flags = 0; | |
1306 | int res = 0; | |
1307 | struct mvs_info *mvi = NULL; | |
1308 | struct domain_device *parent_dev = dev->parent; | |
1309 | struct mvs_device *mvi_device; | |
b5762948 | 1310 | |
20b09c29 | 1311 | mvi = mvs_find_dev_mvi(dev); |
b5762948 | 1312 | |
20b09c29 AY |
1313 | if (lock) |
1314 | spin_lock_irqsave(&mvi->lock, flags); | |
1315 | ||
1316 | mvi_device = mvs_alloc_dev(mvi); | |
1317 | if (!mvi_device) { | |
1318 | res = -1; | |
1319 | goto found_out; | |
b5762948 | 1320 | } |
20b09c29 AY |
1321 | dev->lldd_dev = (void *)mvi_device; |
1322 | mvi_device->dev_type = dev->dev_type; | |
1323 | ||
1324 | if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) { | |
1325 | int phy_id; | |
1326 | u8 phy_num = parent_dev->ex_dev.num_phys; | |
1327 | struct ex_phy *phy; | |
1328 | for (phy_id = 0; phy_id < phy_num; phy_id++) { | |
1329 | phy = &parent_dev->ex_dev.ex_phy[phy_id]; | |
1330 | if (SAS_ADDR(phy->attached_sas_addr) == | |
1331 | SAS_ADDR(dev->sas_addr)) { | |
1332 | mvi_device->attached_phy = phy_id; | |
1333 | break; | |
1334 | } | |
1335 | } | |
b5762948 | 1336 | |
20b09c29 AY |
1337 | if (phy_id == phy_num) { |
1338 | mv_printk("Error: no attached dev:%016llx" | |
1339 | "at ex:%016llx.\n", | |
1340 | SAS_ADDR(dev->sas_addr), | |
1341 | SAS_ADDR(parent_dev->sas_addr)); | |
1342 | res = -1; | |
1343 | } | |
dd4969a8 | 1344 | } |
b5762948 | 1345 | |
20b09c29 AY |
1346 | found_out: |
1347 | if (lock) | |
1348 | spin_unlock_irqrestore(&mvi->lock, flags); | |
1349 | return res; | |
1350 | } | |
b5762948 | 1351 | |
20b09c29 AY |
1352 | int mvs_dev_found(struct domain_device *dev) |
1353 | { | |
1354 | return mvs_dev_found_notify(dev, 1); | |
1355 | } | |
b5762948 | 1356 | |
20b09c29 AY |
1357 | void mvs_dev_gone_notify(struct domain_device *dev, int lock) |
1358 | { | |
1359 | unsigned long flags = 0; | |
1360 | struct mvs_info *mvi; | |
1361 | struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; | |
dd4969a8 | 1362 | |
20b09c29 | 1363 | mvi = mvs_find_dev_mvi(dev); |
b5762948 | 1364 | |
20b09c29 AY |
1365 | if (lock) |
1366 | spin_lock_irqsave(&mvi->lock, flags); | |
b5762948 | 1367 | |
20b09c29 AY |
1368 | if (mvi_dev) { |
1369 | mv_dprintk("found dev[%d:%x] is gone.\n", | |
1370 | mvi_dev->device_id, mvi_dev->dev_type); | |
1371 | mvs_free_reg_set(mvi, mvi_dev); | |
1372 | mvs_free_dev(mvi_dev); | |
1373 | } else { | |
1374 | mv_dprintk("found dev has gone.\n"); | |
b5762948 | 1375 | } |
20b09c29 | 1376 | dev->lldd_dev = NULL; |
b5762948 | 1377 | |
20b09c29 AY |
1378 | if (lock) |
1379 | spin_unlock_irqrestore(&mvi->lock, flags); | |
b5762948 JG |
1380 | } |
1381 | ||
b5762948 | 1382 | |
20b09c29 AY |
1383 | void mvs_dev_gone(struct domain_device *dev) |
1384 | { | |
1385 | mvs_dev_gone_notify(dev, 1); | |
1386 | } | |
b5762948 | 1387 | |
20b09c29 AY |
1388 | static struct sas_task *mvs_alloc_task(void) |
1389 | { | |
1390 | struct sas_task *task = kzalloc(sizeof(struct sas_task), GFP_KERNEL); | |
1391 | ||
1392 | if (task) { | |
1393 | INIT_LIST_HEAD(&task->list); | |
1394 | spin_lock_init(&task->task_state_lock); | |
1395 | task->task_state_flags = SAS_TASK_STATE_PENDING; | |
1396 | init_timer(&task->timer); | |
1397 | init_completion(&task->completion); | |
b5762948 | 1398 | } |
20b09c29 | 1399 | return task; |
dd4969a8 | 1400 | } |
b5762948 | 1401 | |
20b09c29 | 1402 | static void mvs_free_task(struct sas_task *task) |
dd4969a8 | 1403 | { |
20b09c29 AY |
1404 | if (task) { |
1405 | BUG_ON(!list_empty(&task->list)); | |
1406 | kfree(task); | |
b5762948 | 1407 | } |
20b09c29 | 1408 | } |
b5762948 | 1409 | |
20b09c29 AY |
1410 | static void mvs_task_done(struct sas_task *task) |
1411 | { | |
1412 | if (!del_timer(&task->timer)) | |
1413 | return; | |
1414 | complete(&task->completion); | |
b5762948 | 1415 | } |
b5762948 | 1416 | |
20b09c29 | 1417 | static void mvs_tmf_timedout(unsigned long data) |
b5762948 | 1418 | { |
20b09c29 | 1419 | struct sas_task *task = (struct sas_task *)data; |
8f261aaf | 1420 | |
20b09c29 AY |
1421 | task->task_state_flags |= SAS_TASK_STATE_ABORTED; |
1422 | complete(&task->completion); | |
1423 | } | |
8f261aaf | 1424 | |
20b09c29 AY |
1425 | /* XXX */ |
1426 | #define MVS_TASK_TIMEOUT 20 | |
1427 | static int mvs_exec_internal_tmf_task(struct domain_device *dev, | |
1428 | void *parameter, u32 para_len, struct mvs_tmf_task *tmf) | |
1429 | { | |
1430 | int res, retry; | |
1431 | struct sas_task *task = NULL; | |
8f261aaf | 1432 | |
20b09c29 AY |
1433 | for (retry = 0; retry < 3; retry++) { |
1434 | task = mvs_alloc_task(); | |
1435 | if (!task) | |
1436 | return -ENOMEM; | |
8f261aaf | 1437 | |
20b09c29 AY |
1438 | task->dev = dev; |
1439 | task->task_proto = dev->tproto; | |
8f261aaf | 1440 | |
20b09c29 AY |
1441 | memcpy(&task->ssp_task, parameter, para_len); |
1442 | task->task_done = mvs_task_done; | |
8f261aaf | 1443 | |
20b09c29 AY |
1444 | task->timer.data = (unsigned long) task; |
1445 | task->timer.function = mvs_tmf_timedout; | |
1446 | task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ; | |
1447 | add_timer(&task->timer); | |
8f261aaf | 1448 | |
0b84b709 | 1449 | res = mvs_task_exec(task, 1, GFP_KERNEL, NULL, 1, tmf); |
8f261aaf | 1450 | |
20b09c29 AY |
1451 | if (res) { |
1452 | del_timer(&task->timer); | |
1453 | mv_printk("executing internel task failed:%d\n", res); | |
1454 | goto ex_err; | |
1455 | } | |
8f261aaf | 1456 | |
20b09c29 AY |
1457 | wait_for_completion(&task->completion); |
1458 | res = -TMF_RESP_FUNC_FAILED; | |
1459 | /* Even TMF timed out, return direct. */ | |
1460 | if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) { | |
1461 | if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) { | |
1462 | mv_printk("TMF task[%x] timeout.\n", tmf->tmf); | |
1463 | goto ex_err; | |
1464 | } | |
1465 | } | |
8f261aaf | 1466 | |
20b09c29 AY |
1467 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
1468 | task->task_status.stat == SAM_GOOD) { | |
1469 | res = TMF_RESP_FUNC_COMPLETE; | |
1470 | break; | |
1471 | } | |
b5762948 | 1472 | |
20b09c29 AY |
1473 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
1474 | task->task_status.stat == SAS_DATA_UNDERRUN) { | |
1475 | /* no error, but return the number of bytes of | |
1476 | * underrun */ | |
1477 | res = task->task_status.residual; | |
1478 | break; | |
1479 | } | |
b5762948 | 1480 | |
20b09c29 AY |
1481 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
1482 | task->task_status.stat == SAS_DATA_OVERRUN) { | |
1483 | mv_dprintk("blocked task error.\n"); | |
1484 | res = -EMSGSIZE; | |
1485 | break; | |
1486 | } else { | |
1487 | mv_dprintk(" task to dev %016llx response: 0x%x " | |
1488 | "status 0x%x\n", | |
1489 | SAS_ADDR(dev->sas_addr), | |
1490 | task->task_status.resp, | |
1491 | task->task_status.stat); | |
1492 | mvs_free_task(task); | |
1493 | task = NULL; | |
b5762948 | 1494 | |
dd4969a8 | 1495 | } |
dd4969a8 | 1496 | } |
20b09c29 AY |
1497 | ex_err: |
1498 | BUG_ON(retry == 3 && task != NULL); | |
1499 | if (task != NULL) | |
1500 | mvs_free_task(task); | |
1501 | return res; | |
dd4969a8 | 1502 | } |
b5762948 | 1503 | |
20b09c29 AY |
1504 | static int mvs_debug_issue_ssp_tmf(struct domain_device *dev, |
1505 | u8 *lun, struct mvs_tmf_task *tmf) | |
dd4969a8 | 1506 | { |
20b09c29 AY |
1507 | struct sas_ssp_task ssp_task; |
1508 | DECLARE_COMPLETION_ONSTACK(completion); | |
1509 | if (!(dev->tproto & SAS_PROTOCOL_SSP)) | |
1510 | return TMF_RESP_FUNC_ESUPP; | |
b5762948 | 1511 | |
20b09c29 | 1512 | strncpy((u8 *)&ssp_task.LUN, lun, 8); |
b5762948 | 1513 | |
20b09c29 AY |
1514 | return mvs_exec_internal_tmf_task(dev, &ssp_task, |
1515 | sizeof(ssp_task), tmf); | |
1516 | } | |
8f261aaf | 1517 | |
8f261aaf | 1518 | |
20b09c29 AY |
1519 | /* Standard mandates link reset for ATA (type 0) |
1520 | and hard reset for SSP (type 1) , only for RECOVERY */ | |
1521 | static int mvs_debug_I_T_nexus_reset(struct domain_device *dev) | |
1522 | { | |
1523 | int rc; | |
1524 | struct sas_phy *phy = sas_find_local_phy(dev); | |
1525 | int reset_type = (dev->dev_type == SATA_DEV || | |
1526 | (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1; | |
1527 | rc = sas_phy_reset(phy, reset_type); | |
1528 | msleep(2000); | |
1529 | return rc; | |
1530 | } | |
8f261aaf | 1531 | |
20b09c29 AY |
1532 | /* mandatory SAM-3 */ |
1533 | int mvs_lu_reset(struct domain_device *dev, u8 *lun) | |
1534 | { | |
1535 | unsigned long flags; | |
1536 | int i, phyno[WIDE_PORT_MAX_PHY], num , rc = TMF_RESP_FUNC_FAILED; | |
1537 | struct mvs_tmf_task tmf_task; | |
1538 | struct mvs_info *mvi = mvs_find_dev_mvi(dev); | |
1539 | struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev; | |
1540 | ||
1541 | tmf_task.tmf = TMF_LU_RESET; | |
1542 | mvi_dev->dev_status = MVS_DEV_EH; | |
1543 | rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); | |
1544 | if (rc == TMF_RESP_FUNC_COMPLETE) { | |
1545 | num = mvs_find_dev_phyno(dev, phyno); | |
1546 | spin_lock_irqsave(&mvi->lock, flags); | |
1547 | for (i = 0; i < num; i++) | |
1548 | mvs_release_task(mvi, phyno[i], dev); | |
1549 | spin_unlock_irqrestore(&mvi->lock, flags); | |
dd4969a8 | 1550 | } |
20b09c29 AY |
1551 | /* If failed, fall-through I_T_Nexus reset */ |
1552 | mv_printk("%s for device[%x]:rc= %d\n", __func__, | |
1553 | mvi_dev->device_id, rc); | |
1554 | return rc; | |
1555 | } | |
8f261aaf | 1556 | |
20b09c29 AY |
1557 | int mvs_I_T_nexus_reset(struct domain_device *dev) |
1558 | { | |
1559 | unsigned long flags; | |
1560 | int i, phyno[WIDE_PORT_MAX_PHY], num , rc = TMF_RESP_FUNC_FAILED; | |
1561 | struct mvs_info *mvi = mvs_find_dev_mvi(dev); | |
1562 | struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; | |
1563 | ||
1564 | if (mvi_dev->dev_status != MVS_DEV_EH) | |
1565 | return TMF_RESP_FUNC_COMPLETE; | |
1566 | rc = mvs_debug_I_T_nexus_reset(dev); | |
1567 | mv_printk("%s for device[%x]:rc= %d\n", | |
1568 | __func__, mvi_dev->device_id, rc); | |
1569 | ||
1570 | /* housekeeper */ | |
1571 | num = mvs_find_dev_phyno(dev, phyno); | |
1572 | spin_lock_irqsave(&mvi->lock, flags); | |
1573 | for (i = 0; i < num; i++) | |
1574 | mvs_release_task(mvi, phyno[i], dev); | |
1575 | spin_unlock_irqrestore(&mvi->lock, flags); | |
1576 | ||
1577 | return rc; | |
1578 | } | |
1579 | /* optional SAM-3 */ | |
1580 | int mvs_query_task(struct sas_task *task) | |
1581 | { | |
1582 | u32 tag; | |
1583 | struct scsi_lun lun; | |
1584 | struct mvs_tmf_task tmf_task; | |
1585 | int rc = TMF_RESP_FUNC_FAILED; | |
1586 | ||
1587 | if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { | |
1588 | struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task; | |
1589 | struct domain_device *dev = task->dev; | |
1590 | struct mvs_info *mvi = mvs_find_dev_mvi(dev); | |
1591 | ||
1592 | int_to_scsilun(cmnd->device->lun, &lun); | |
1593 | rc = mvs_find_tag(mvi, task, &tag); | |
1594 | if (rc == 0) { | |
1595 | rc = TMF_RESP_FUNC_FAILED; | |
dd4969a8 | 1596 | return rc; |
20b09c29 | 1597 | } |
8f261aaf | 1598 | |
20b09c29 AY |
1599 | tmf_task.tmf = TMF_QUERY_TASK; |
1600 | tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag); | |
8f261aaf | 1601 | |
20b09c29 AY |
1602 | rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task); |
1603 | switch (rc) { | |
1604 | /* The task is still in Lun, release it then */ | |
1605 | case TMF_RESP_FUNC_SUCC: | |
1606 | /* The task is not in Lun or failed, reset the phy */ | |
1607 | case TMF_RESP_FUNC_FAILED: | |
1608 | case TMF_RESP_FUNC_COMPLETE: | |
1609 | break; | |
1610 | } | |
dd4969a8 | 1611 | } |
20b09c29 AY |
1612 | mv_printk("%s:rc= %d\n", __func__, rc); |
1613 | return rc; | |
8f261aaf KW |
1614 | } |
1615 | ||
20b09c29 AY |
1616 | /* mandatory SAM-3, still need free task/slot info */ |
1617 | int mvs_abort_task(struct sas_task *task) | |
8f261aaf | 1618 | { |
20b09c29 AY |
1619 | struct scsi_lun lun; |
1620 | struct mvs_tmf_task tmf_task; | |
1621 | struct domain_device *dev = task->dev; | |
1622 | struct mvs_info *mvi = mvs_find_dev_mvi(dev); | |
1623 | int rc = TMF_RESP_FUNC_FAILED; | |
1624 | unsigned long flags; | |
1625 | u32 tag; | |
1626 | if (mvi->exp_req) | |
1627 | mvi->exp_req--; | |
1628 | spin_lock_irqsave(&task->task_state_lock, flags); | |
1629 | if (task->task_state_flags & SAS_TASK_STATE_DONE) { | |
1630 | spin_unlock_irqrestore(&task->task_state_lock, flags); | |
1631 | rc = TMF_RESP_FUNC_COMPLETE; | |
1632 | goto out; | |
dd4969a8 | 1633 | } |
20b09c29 AY |
1634 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
1635 | if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { | |
1636 | struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task; | |
1637 | ||
1638 | int_to_scsilun(cmnd->device->lun, &lun); | |
1639 | rc = mvs_find_tag(mvi, task, &tag); | |
1640 | if (rc == 0) { | |
1641 | mv_printk("No such tag in %s\n", __func__); | |
1642 | rc = TMF_RESP_FUNC_FAILED; | |
1643 | return rc; | |
1644 | } | |
8f261aaf | 1645 | |
20b09c29 AY |
1646 | tmf_task.tmf = TMF_ABORT_TASK; |
1647 | tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag); | |
8f261aaf | 1648 | |
20b09c29 | 1649 | rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task); |
8f261aaf | 1650 | |
20b09c29 AY |
1651 | /* if successful, clear the task and callback forwards.*/ |
1652 | if (rc == TMF_RESP_FUNC_COMPLETE) { | |
1653 | u32 slot_no; | |
1654 | struct mvs_slot_info *slot; | |
1655 | struct mvs_info *mvi = mvs_find_dev_mvi(dev); | |
8f261aaf | 1656 | |
20b09c29 AY |
1657 | if (task->lldd_task) { |
1658 | slot = (struct mvs_slot_info *)task->lldd_task; | |
1659 | slot_no = (u32) (slot - mvi->slot_info); | |
1660 | mvs_slot_complete(mvi, slot_no, 1); | |
1661 | } | |
1662 | } | |
1663 | } else if (task->task_proto & SAS_PROTOCOL_SATA || | |
1664 | task->task_proto & SAS_PROTOCOL_STP) { | |
1665 | /* to do free register_set */ | |
1666 | } else { | |
1667 | /* SMP */ | |
8f261aaf | 1668 | |
20b09c29 AY |
1669 | } |
1670 | out: | |
1671 | if (rc != TMF_RESP_FUNC_COMPLETE) | |
1672 | mv_printk("%s:rc= %d\n", __func__, rc); | |
dd4969a8 | 1673 | return rc; |
8f261aaf KW |
1674 | } |
1675 | ||
20b09c29 | 1676 | int mvs_abort_task_set(struct domain_device *dev, u8 *lun) |
8f261aaf | 1677 | { |
20b09c29 AY |
1678 | int rc = TMF_RESP_FUNC_FAILED; |
1679 | struct mvs_tmf_task tmf_task; | |
8f261aaf | 1680 | |
20b09c29 AY |
1681 | tmf_task.tmf = TMF_ABORT_TASK_SET; |
1682 | rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); | |
dd4969a8 | 1683 | |
20b09c29 | 1684 | return rc; |
8f261aaf KW |
1685 | } |
1686 | ||
20b09c29 | 1687 | int mvs_clear_aca(struct domain_device *dev, u8 *lun) |
8f261aaf | 1688 | { |
20b09c29 AY |
1689 | int rc = TMF_RESP_FUNC_FAILED; |
1690 | struct mvs_tmf_task tmf_task; | |
8f261aaf | 1691 | |
20b09c29 AY |
1692 | tmf_task.tmf = TMF_CLEAR_ACA; |
1693 | rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); | |
8f261aaf | 1694 | |
20b09c29 AY |
1695 | return rc; |
1696 | } | |
8f261aaf | 1697 | |
20b09c29 AY |
1698 | int mvs_clear_task_set(struct domain_device *dev, u8 *lun) |
1699 | { | |
1700 | int rc = TMF_RESP_FUNC_FAILED; | |
1701 | struct mvs_tmf_task tmf_task; | |
8f261aaf | 1702 | |
20b09c29 AY |
1703 | tmf_task.tmf = TMF_CLEAR_TASK_SET; |
1704 | rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); | |
8f261aaf | 1705 | |
20b09c29 | 1706 | return rc; |
dd4969a8 | 1707 | } |
8f261aaf | 1708 | |
20b09c29 AY |
1709 | static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task, |
1710 | u32 slot_idx, int err) | |
dd4969a8 | 1711 | { |
20b09c29 AY |
1712 | struct mvs_device *mvi_dev = (struct mvs_device *)task->dev->lldd_dev; |
1713 | struct task_status_struct *tstat = &task->task_status; | |
1714 | struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf; | |
1715 | int stat = SAM_GOOD; | |
e9ff91b6 | 1716 | |
8f261aaf | 1717 | |
20b09c29 AY |
1718 | resp->frame_len = sizeof(struct dev_to_host_fis); |
1719 | memcpy(&resp->ending_fis[0], | |
1720 | SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset), | |
1721 | sizeof(struct dev_to_host_fis)); | |
1722 | tstat->buf_valid_size = sizeof(*resp); | |
1723 | if (unlikely(err)) | |
1724 | stat = SAS_PROTO_RESPONSE; | |
1725 | return stat; | |
8f261aaf KW |
1726 | } |
1727 | ||
20b09c29 AY |
1728 | static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task, |
1729 | u32 slot_idx) | |
8f261aaf | 1730 | { |
20b09c29 AY |
1731 | struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; |
1732 | int stat; | |
1733 | u32 err_dw0 = le32_to_cpu(*(u32 *) (slot->response)); | |
1734 | u32 tfs = 0; | |
1735 | enum mvs_port_type type = PORT_TYPE_SAS; | |
8f261aaf | 1736 | |
20b09c29 AY |
1737 | if (err_dw0 & CMD_ISS_STPD) |
1738 | MVS_CHIP_DISP->issue_stop(mvi, type, tfs); | |
1739 | ||
1740 | MVS_CHIP_DISP->command_active(mvi, slot_idx); | |
b5762948 | 1741 | |
20b09c29 | 1742 | stat = SAM_CHECK_COND; |
dd4969a8 | 1743 | switch (task->task_proto) { |
dd4969a8 | 1744 | case SAS_PROTOCOL_SSP: |
20b09c29 AY |
1745 | stat = SAS_ABORTED_TASK; |
1746 | break; | |
1747 | case SAS_PROTOCOL_SMP: | |
1748 | stat = SAM_CHECK_COND; | |
dd4969a8 | 1749 | break; |
20b09c29 | 1750 | |
dd4969a8 JG |
1751 | case SAS_PROTOCOL_SATA: |
1752 | case SAS_PROTOCOL_STP: | |
20b09c29 AY |
1753 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: |
1754 | { | |
1755 | if (err_dw0 == 0x80400002) | |
1756 | mv_printk("find reserved error, why?\n"); | |
1757 | ||
1758 | task->ata_task.use_ncq = 0; | |
1759 | stat = SAS_PROTO_RESPONSE; | |
1760 | mvs_sata_done(mvi, task, slot_idx, 1); | |
1761 | ||
dd4969a8 | 1762 | } |
20b09c29 | 1763 | break; |
dd4969a8 JG |
1764 | default: |
1765 | break; | |
1766 | } | |
1767 | ||
20b09c29 | 1768 | return stat; |
e9ff91b6 KW |
1769 | } |
1770 | ||
20b09c29 | 1771 | int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags) |
b5762948 | 1772 | { |
20b09c29 AY |
1773 | u32 slot_idx = rx_desc & RXQ_SLOT_MASK; |
1774 | struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; | |
1775 | struct sas_task *task = slot->task; | |
1776 | struct mvs_device *mvi_dev = NULL; | |
1777 | struct task_status_struct *tstat; | |
1778 | ||
1779 | bool aborted; | |
1780 | void *to; | |
1781 | enum exec_status sts; | |
1782 | ||
1783 | if (mvi->exp_req) | |
1784 | mvi->exp_req--; | |
1785 | if (unlikely(!task || !task->lldd_task)) | |
1786 | return -1; | |
1787 | ||
1788 | tstat = &task->task_status; | |
1789 | mvi_dev = (struct mvs_device *)task->dev->lldd_dev; | |
b5762948 | 1790 | |
20b09c29 AY |
1791 | mvs_hba_cq_dump(mvi); |
1792 | ||
1793 | spin_lock(&task->task_state_lock); | |
1794 | task->task_state_flags &= | |
1795 | ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR); | |
1796 | task->task_state_flags |= SAS_TASK_STATE_DONE; | |
1797 | /* race condition*/ | |
1798 | aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED; | |
1799 | spin_unlock(&task->task_state_lock); | |
1800 | ||
1801 | memset(tstat, 0, sizeof(*tstat)); | |
1802 | tstat->resp = SAS_TASK_COMPLETE; | |
1803 | ||
1804 | if (unlikely(aborted)) { | |
1805 | tstat->stat = SAS_ABORTED_TASK; | |
1806 | if (mvi_dev) | |
1807 | mvi_dev->runing_req--; | |
1808 | if (sas_protocol_ata(task->task_proto)) | |
1809 | mvs_free_reg_set(mvi, mvi_dev); | |
1810 | ||
1811 | mvs_slot_task_free(mvi, task, slot, slot_idx); | |
1812 | return -1; | |
b5762948 JG |
1813 | } |
1814 | ||
20b09c29 AY |
1815 | if (unlikely(!mvi_dev || !slot->port->port_attached || flags)) { |
1816 | mv_dprintk("port has not device.\n"); | |
1817 | tstat->stat = SAS_PHY_DOWN; | |
1818 | goto out; | |
1819 | } | |
b5762948 | 1820 | |
20b09c29 AY |
1821 | /* |
1822 | if (unlikely((rx_desc & RXQ_ERR) || (*(u64 *) slot->response))) { | |
1823 | mv_dprintk("Find device[%016llx] RXQ_ERR %X, | |
1824 | err info:%016llx\n", | |
1825 | SAS_ADDR(task->dev->sas_addr), | |
1826 | rx_desc, (u64)(*(u64 *) slot->response)); | |
b5762948 | 1827 | } |
20b09c29 AY |
1828 | */ |
1829 | ||
1830 | /* error info record present */ | |
1831 | if (unlikely((rx_desc & RXQ_ERR) && (*(u64 *) slot->response))) { | |
1832 | tstat->stat = mvs_slot_err(mvi, task, slot_idx); | |
1833 | goto out; | |
b5762948 JG |
1834 | } |
1835 | ||
20b09c29 AY |
1836 | switch (task->task_proto) { |
1837 | case SAS_PROTOCOL_SSP: | |
1838 | /* hw says status == 0, datapres == 0 */ | |
1839 | if (rx_desc & RXQ_GOOD) { | |
1840 | tstat->stat = SAM_GOOD; | |
1841 | tstat->resp = SAS_TASK_COMPLETE; | |
1842 | } | |
1843 | /* response frame present */ | |
1844 | else if (rx_desc & RXQ_RSP) { | |
1845 | struct ssp_response_iu *iu = slot->response + | |
1846 | sizeof(struct mvs_err_info); | |
1847 | sas_ssp_task_response(mvi->dev, task, iu); | |
1848 | } else | |
1849 | tstat->stat = SAM_CHECK_COND; | |
1850 | break; | |
b5762948 | 1851 | |
20b09c29 AY |
1852 | case SAS_PROTOCOL_SMP: { |
1853 | struct scatterlist *sg_resp = &task->smp_task.smp_resp; | |
1854 | tstat->stat = SAM_GOOD; | |
1855 | to = kmap_atomic(sg_page(sg_resp), KM_IRQ0); | |
1856 | memcpy(to + sg_resp->offset, | |
1857 | slot->response + sizeof(struct mvs_err_info), | |
1858 | sg_dma_len(sg_resp)); | |
1859 | kunmap_atomic(to, KM_IRQ0); | |
1860 | break; | |
1861 | } | |
8f261aaf | 1862 | |
20b09c29 AY |
1863 | case SAS_PROTOCOL_SATA: |
1864 | case SAS_PROTOCOL_STP: | |
1865 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: { | |
1866 | tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0); | |
1867 | break; | |
1868 | } | |
b5762948 | 1869 | |
20b09c29 AY |
1870 | default: |
1871 | tstat->stat = SAM_CHECK_COND; | |
1872 | break; | |
1873 | } | |
b5762948 | 1874 | |
20b09c29 AY |
1875 | out: |
1876 | if (mvi_dev) | |
1877 | mvi_dev->runing_req--; | |
1878 | if (sas_protocol_ata(task->task_proto)) | |
1879 | mvs_free_reg_set(mvi, mvi_dev); | |
b5762948 | 1880 | |
20b09c29 AY |
1881 | mvs_slot_task_free(mvi, task, slot, slot_idx); |
1882 | sts = tstat->stat; | |
8f261aaf | 1883 | |
20b09c29 AY |
1884 | spin_unlock(&mvi->lock); |
1885 | if (task->task_done) | |
1886 | task->task_done(task); | |
1887 | else | |
1888 | mv_dprintk("why has not task_done.\n"); | |
1889 | spin_lock(&mvi->lock); | |
b5762948 | 1890 | |
20b09c29 AY |
1891 | return sts; |
1892 | } | |
b5762948 | 1893 | |
20b09c29 AY |
1894 | void mvs_release_task(struct mvs_info *mvi, |
1895 | int phy_no, struct domain_device *dev) | |
1896 | { | |
1897 | int i = 0; u32 slot_idx; | |
1898 | struct mvs_phy *phy; | |
1899 | struct mvs_port *port; | |
1900 | struct mvs_slot_info *slot, *slot2; | |
b5762948 | 1901 | |
20b09c29 AY |
1902 | phy = &mvi->phy[phy_no]; |
1903 | port = phy->port; | |
1904 | if (!port) | |
1905 | return; | |
b5762948 | 1906 | |
20b09c29 AY |
1907 | list_for_each_entry_safe(slot, slot2, &port->list, entry) { |
1908 | struct sas_task *task; | |
1909 | slot_idx = (u32) (slot - mvi->slot_info); | |
1910 | task = slot->task; | |
b5762948 | 1911 | |
20b09c29 AY |
1912 | if (dev && task->dev != dev) |
1913 | continue; | |
8f261aaf | 1914 | |
20b09c29 AY |
1915 | mv_printk("Release slot [%x] tag[%x], task [%p]:\n", |
1916 | slot_idx, slot->slot_tag, task); | |
b5762948 | 1917 | |
20b09c29 AY |
1918 | if (task->task_proto & SAS_PROTOCOL_SSP) { |
1919 | mv_printk("attached with SSP task CDB["); | |
1920 | for (i = 0; i < 16; i++) | |
1921 | mv_printk(" %02x", task->ssp_task.cdb[i]); | |
1922 | mv_printk(" ]\n"); | |
1923 | } | |
b5762948 | 1924 | |
20b09c29 | 1925 | mvs_slot_complete(mvi, slot_idx, 1); |
b5762948 | 1926 | } |
20b09c29 | 1927 | } |
b5762948 | 1928 | |
20b09c29 AY |
1929 | static void mvs_phy_disconnected(struct mvs_phy *phy) |
1930 | { | |
1931 | phy->phy_attached = 0; | |
1932 | phy->att_dev_info = 0; | |
1933 | phy->att_dev_sas_addr = 0; | |
1934 | } | |
1935 | ||
1936 | static void mvs_work_queue(struct work_struct *work) | |
1937 | { | |
1938 | struct delayed_work *dw = container_of(work, struct delayed_work, work); | |
1939 | struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q); | |
1940 | struct mvs_info *mvi = mwq->mvi; | |
1941 | unsigned long flags; | |
b5762948 | 1942 | |
20b09c29 AY |
1943 | spin_lock_irqsave(&mvi->lock, flags); |
1944 | if (mwq->handler & PHY_PLUG_EVENT) { | |
1945 | u32 phy_no = (unsigned long) mwq->data; | |
1946 | struct sas_ha_struct *sas_ha = mvi->sas; | |
1947 | struct mvs_phy *phy = &mvi->phy[phy_no]; | |
1948 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
1949 | ||
1950 | if (phy->phy_event & PHY_PLUG_OUT) { | |
1951 | u32 tmp; | |
1952 | struct sas_identify_frame *id; | |
1953 | id = (struct sas_identify_frame *)phy->frame_rcvd; | |
1954 | tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no); | |
1955 | phy->phy_event &= ~PHY_PLUG_OUT; | |
1956 | if (!(tmp & PHY_READY_MASK)) { | |
1957 | sas_phy_disconnected(sas_phy); | |
1958 | mvs_phy_disconnected(phy); | |
1959 | sas_ha->notify_phy_event(sas_phy, | |
1960 | PHYE_LOSS_OF_SIGNAL); | |
1961 | mv_dprintk("phy%d Removed Device\n", phy_no); | |
1962 | } else { | |
1963 | MVS_CHIP_DISP->detect_porttype(mvi, phy_no); | |
1964 | mvs_update_phyinfo(mvi, phy_no, 1); | |
1965 | mvs_bytes_dmaed(mvi, phy_no); | |
1966 | mvs_port_notify_formed(sas_phy, 0); | |
1967 | mv_dprintk("phy%d Attached Device\n", phy_no); | |
1968 | } | |
1969 | } | |
1970 | } | |
1971 | list_del(&mwq->entry); | |
1972 | spin_unlock_irqrestore(&mvi->lock, flags); | |
1973 | kfree(mwq); | |
1974 | } | |
8f261aaf | 1975 | |
20b09c29 AY |
1976 | static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler) |
1977 | { | |
1978 | struct mvs_wq *mwq; | |
1979 | int ret = 0; | |
1980 | ||
1981 | mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC); | |
1982 | if (mwq) { | |
1983 | mwq->mvi = mvi; | |
1984 | mwq->data = data; | |
1985 | mwq->handler = handler; | |
1986 | MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq); | |
1987 | list_add_tail(&mwq->entry, &mvi->wq_list); | |
1988 | schedule_delayed_work(&mwq->work_q, HZ * 2); | |
1989 | } else | |
1990 | ret = -ENOMEM; | |
1991 | ||
1992 | return ret; | |
1993 | } | |
b5762948 | 1994 | |
20b09c29 AY |
1995 | static void mvs_sig_time_out(unsigned long tphy) |
1996 | { | |
1997 | struct mvs_phy *phy = (struct mvs_phy *)tphy; | |
1998 | struct mvs_info *mvi = phy->mvi; | |
1999 | u8 phy_no; | |
2000 | ||
2001 | for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) { | |
2002 | if (&mvi->phy[phy_no] == phy) { | |
2003 | mv_dprintk("Get signature time out, reset phy %d\n", | |
2004 | phy_no+mvi->id*mvi->chip->n_phy); | |
2005 | MVS_CHIP_DISP->phy_reset(mvi, phy_no, 1); | |
2006 | } | |
b5762948 | 2007 | } |
20b09c29 | 2008 | } |
b5762948 | 2009 | |
20b09c29 AY |
2010 | static void mvs_sig_remove_timer(struct mvs_phy *phy) |
2011 | { | |
2012 | if (phy->timer.function) | |
2013 | del_timer(&phy->timer); | |
2014 | phy->timer.function = NULL; | |
2015 | } | |
b5762948 | 2016 | |
20b09c29 AY |
2017 | void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events) |
2018 | { | |
2019 | u32 tmp; | |
2020 | struct sas_ha_struct *sas_ha = mvi->sas; | |
2021 | struct mvs_phy *phy = &mvi->phy[phy_no]; | |
2022 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
8f261aaf | 2023 | |
20b09c29 AY |
2024 | phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no); |
2025 | mv_dprintk("port %d ctrl sts=0x%X.\n", phy_no+mvi->id*mvi->chip->n_phy, | |
2026 | MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no)); | |
2027 | mv_dprintk("Port %d irq sts = 0x%X\n", phy_no+mvi->id*mvi->chip->n_phy, | |
2028 | phy->irq_status); | |
8f261aaf | 2029 | |
20b09c29 AY |
2030 | /* |
2031 | * events is port event now , | |
2032 | * we need check the interrupt status which belongs to per port. | |
2033 | */ | |
b5762948 | 2034 | |
20b09c29 AY |
2035 | if (phy->irq_status & PHYEV_DCDR_ERR) |
2036 | mv_dprintk("port %d STP decoding error.\n", | |
2037 | phy_no+mvi->id*mvi->chip->n_phy); | |
2038 | ||
2039 | if (phy->irq_status & PHYEV_POOF) { | |
2040 | if (!(phy->phy_event & PHY_PLUG_OUT)) { | |
2041 | int dev_sata = phy->phy_type & PORT_TYPE_SATA; | |
2042 | int ready; | |
2043 | mvs_release_task(mvi, phy_no, NULL); | |
2044 | phy->phy_event |= PHY_PLUG_OUT; | |
2045 | mvs_handle_event(mvi, | |
2046 | (void *)(unsigned long)phy_no, | |
2047 | PHY_PLUG_EVENT); | |
2048 | ready = mvs_is_phy_ready(mvi, phy_no); | |
2049 | if (!ready) | |
2050 | mv_dprintk("phy%d Unplug Notice\n", | |
2051 | phy_no + | |
2052 | mvi->id * mvi->chip->n_phy); | |
2053 | if (ready || dev_sata) { | |
2054 | if (MVS_CHIP_DISP->stp_reset) | |
2055 | MVS_CHIP_DISP->stp_reset(mvi, | |
2056 | phy_no); | |
2057 | else | |
2058 | MVS_CHIP_DISP->phy_reset(mvi, | |
2059 | phy_no, 0); | |
2060 | return; | |
2061 | } | |
2062 | } | |
2063 | } | |
b5762948 | 2064 | |
20b09c29 AY |
2065 | if (phy->irq_status & PHYEV_COMWAKE) { |
2066 | tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no); | |
2067 | MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no, | |
2068 | tmp | PHYEV_SIG_FIS); | |
2069 | if (phy->timer.function == NULL) { | |
2070 | phy->timer.data = (unsigned long)phy; | |
2071 | phy->timer.function = mvs_sig_time_out; | |
2072 | phy->timer.expires = jiffies + 10*HZ; | |
2073 | add_timer(&phy->timer); | |
2074 | } | |
2075 | } | |
2076 | if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) { | |
2077 | phy->phy_status = mvs_is_phy_ready(mvi, phy_no); | |
2078 | mvs_sig_remove_timer(phy); | |
2079 | mv_dprintk("notify plug in on phy[%d]\n", phy_no); | |
2080 | if (phy->phy_status) { | |
2081 | mdelay(10); | |
2082 | MVS_CHIP_DISP->detect_porttype(mvi, phy_no); | |
2083 | if (phy->phy_type & PORT_TYPE_SATA) { | |
2084 | tmp = MVS_CHIP_DISP->read_port_irq_mask( | |
2085 | mvi, phy_no); | |
2086 | tmp &= ~PHYEV_SIG_FIS; | |
2087 | MVS_CHIP_DISP->write_port_irq_mask(mvi, | |
2088 | phy_no, tmp); | |
2089 | } | |
2090 | mvs_update_phyinfo(mvi, phy_no, 0); | |
2091 | mvs_bytes_dmaed(mvi, phy_no); | |
2092 | /* whether driver is going to handle hot plug */ | |
2093 | if (phy->phy_event & PHY_PLUG_OUT) { | |
2094 | mvs_port_notify_formed(sas_phy, 0); | |
2095 | phy->phy_event &= ~PHY_PLUG_OUT; | |
2096 | } | |
2097 | } else { | |
2098 | mv_dprintk("plugin interrupt but phy%d is gone\n", | |
2099 | phy_no + mvi->id*mvi->chip->n_phy); | |
2100 | } | |
2101 | } else if (phy->irq_status & PHYEV_BROAD_CH) { | |
2102 | mv_dprintk("port %d broadcast change.\n", | |
2103 | phy_no + mvi->id*mvi->chip->n_phy); | |
2104 | /* exception for Samsung disk drive*/ | |
2105 | mdelay(1000); | |
2106 | sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); | |
2107 | } | |
2108 | MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status); | |
b5762948 JG |
2109 | } |
2110 | ||
20b09c29 | 2111 | int mvs_int_rx(struct mvs_info *mvi, bool self_clear) |
b5762948 | 2112 | { |
20b09c29 AY |
2113 | u32 rx_prod_idx, rx_desc; |
2114 | bool attn = false; | |
b5762948 | 2115 | |
20b09c29 AY |
2116 | /* the first dword in the RX ring is special: it contains |
2117 | * a mirror of the hardware's RX producer index, so that | |
2118 | * we don't have to stall the CPU reading that register. | |
2119 | * The actual RX ring is offset by one dword, due to this. | |
2120 | */ | |
2121 | rx_prod_idx = mvi->rx_cons; | |
2122 | mvi->rx_cons = le32_to_cpu(mvi->rx[0]); | |
2123 | if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */ | |
2124 | return 0; | |
b5762948 | 2125 | |
20b09c29 AY |
2126 | /* The CMPL_Q may come late, read from register and try again |
2127 | * note: if coalescing is enabled, | |
2128 | * it will need to read from register every time for sure | |
2129 | */ | |
2130 | if (unlikely(mvi->rx_cons == rx_prod_idx)) | |
2131 | mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK; | |
2132 | ||
2133 | if (mvi->rx_cons == rx_prod_idx) | |
2134 | return 0; | |
2135 | ||
2136 | while (mvi->rx_cons != rx_prod_idx) { | |
2137 | /* increment our internal RX consumer pointer */ | |
2138 | rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1); | |
2139 | rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]); | |
2140 | ||
2141 | if (likely(rx_desc & RXQ_DONE)) | |
2142 | mvs_slot_complete(mvi, rx_desc, 0); | |
2143 | if (rx_desc & RXQ_ATTN) { | |
2144 | attn = true; | |
2145 | } else if (rx_desc & RXQ_ERR) { | |
2146 | if (!(rx_desc & RXQ_DONE)) | |
2147 | mvs_slot_complete(mvi, rx_desc, 0); | |
2148 | } else if (rx_desc & RXQ_SLOT_RESET) { | |
2149 | mvs_slot_free(mvi, rx_desc); | |
2150 | } | |
2151 | } | |
2152 | ||
2153 | if (attn && self_clear) | |
2154 | MVS_CHIP_DISP->int_full(mvi); | |
2155 | return 0; | |
b5762948 JG |
2156 | } |
2157 |