Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Oktagon_esp.c -- Driver for bsc Oktagon | |
3 | * | |
4 | * Written by Carsten Pluntke 1998 | |
5 | * | |
6 | * Based on cyber_esp.c | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | |
10 | #if defined(CONFIG_AMIGA) || defined(CONFIG_APUS) | |
11 | #define USE_BOTTOM_HALF | |
12 | #endif | |
13 | ||
14 | #include <linux/module.h> | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/types.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/blkdev.h> | |
22 | #include <linux/proc_fs.h> | |
23 | #include <linux/stat.h> | |
24 | #include <linux/reboot.h> | |
25 | #include <asm/system.h> | |
26 | #include <asm/ptrace.h> | |
27 | #include <asm/pgtable.h> | |
28 | ||
29 | ||
30 | #include "scsi.h" | |
31 | #include <scsi/scsi_host.h> | |
32 | #include "NCR53C9x.h" | |
33 | ||
34 | #include <linux/zorro.h> | |
35 | #include <asm/irq.h> | |
36 | #include <asm/amigaints.h> | |
37 | #include <asm/amigahw.h> | |
38 | ||
39 | #ifdef USE_BOTTOM_HALF | |
40 | #include <linux/workqueue.h> | |
41 | #include <linux/interrupt.h> | |
42 | #endif | |
43 | ||
44 | /* The controller registers can be found in the Z2 config area at these | |
45 | * offsets: | |
46 | */ | |
47 | #define OKTAGON_ESP_ADDR 0x03000 | |
48 | #define OKTAGON_DMA_ADDR 0x01000 | |
49 | ||
50 | ||
51 | static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count); | |
52 | static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp); | |
53 | static void dma_dump_state(struct NCR_ESP *esp); | |
54 | static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length); | |
55 | static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length); | |
56 | static void dma_ints_off(struct NCR_ESP *esp); | |
57 | static void dma_ints_on(struct NCR_ESP *esp); | |
58 | static int dma_irq_p(struct NCR_ESP *esp); | |
59 | static void dma_led_off(struct NCR_ESP *esp); | |
60 | static void dma_led_on(struct NCR_ESP *esp); | |
61 | static int dma_ports_p(struct NCR_ESP *esp); | |
62 | static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write); | |
63 | ||
64 | static void dma_irq_exit(struct NCR_ESP *esp); | |
65 | static void dma_invalidate(struct NCR_ESP *esp); | |
66 | ||
67 | static void dma_mmu_get_scsi_one(struct NCR_ESP *,Scsi_Cmnd *); | |
68 | static void dma_mmu_get_scsi_sgl(struct NCR_ESP *,Scsi_Cmnd *); | |
69 | static void dma_mmu_release_scsi_one(struct NCR_ESP *,Scsi_Cmnd *); | |
70 | static void dma_mmu_release_scsi_sgl(struct NCR_ESP *,Scsi_Cmnd *); | |
71 | static void dma_advance_sg(Scsi_Cmnd *); | |
72 | static int oktagon_notify_reboot(struct notifier_block *this, unsigned long code, void *x); | |
73 | ||
74 | #ifdef USE_BOTTOM_HALF | |
4927b3f7 | 75 | static void dma_commit(struct work_struct *unused); |
1da177e4 LT |
76 | |
77 | long oktag_to_io(long *paddr, long *addr, long len); | |
78 | long oktag_from_io(long *addr, long *paddr, long len); | |
79 | ||
4927b3f7 | 80 | static DECLARE_WORK(tq_fake_dma, dma_commit); |
1da177e4 LT |
81 | |
82 | #define DMA_MAXTRANSFER 0x8000 | |
83 | ||
84 | #else | |
85 | ||
86 | /* | |
87 | * No bottom half. Use transfer directly from IRQ. Find a narrow path | |
88 | * between too much IRQ overhead and clogging the IRQ for too long. | |
89 | */ | |
90 | ||
91 | #define DMA_MAXTRANSFER 0x1000 | |
92 | ||
93 | #endif | |
94 | ||
95 | static struct notifier_block oktagon_notifier = { | |
96 | oktagon_notify_reboot, | |
97 | NULL, | |
98 | 0 | |
99 | }; | |
100 | ||
101 | static long *paddress; | |
102 | static long *address; | |
103 | static long len; | |
104 | static long dma_on; | |
105 | static int direction; | |
106 | static struct NCR_ESP *current_esp; | |
107 | ||
108 | ||
109 | static volatile unsigned char cmd_buffer[16]; | |
110 | /* This is where all commands are put | |
111 | * before they are trasfered to the ESP chip | |
112 | * via PIO. | |
113 | */ | |
114 | ||
115 | /***************************************************************** Detection */ | |
d0be4a7d | 116 | int oktagon_esp_detect(struct scsi_host_template *tpnt) |
1da177e4 LT |
117 | { |
118 | struct NCR_ESP *esp; | |
119 | struct zorro_dev *z = NULL; | |
120 | unsigned long address; | |
121 | struct ESP_regs *eregs; | |
122 | ||
123 | while ((z = zorro_find_device(ZORRO_PROD_BSC_OKTAGON_2008, z))) { | |
124 | unsigned long board = z->resource.start; | |
125 | if (request_mem_region(board+OKTAGON_ESP_ADDR, | |
126 | sizeof(struct ESP_regs), "NCR53C9x")) { | |
127 | /* | |
128 | * It is a SCSI controller. | |
129 | * Hardwire Host adapter to SCSI ID 7 | |
130 | */ | |
131 | ||
132 | address = (unsigned long)ZTWO_VADDR(board); | |
133 | eregs = (struct ESP_regs *)(address + OKTAGON_ESP_ADDR); | |
134 | ||
135 | /* This line was 5 lines lower */ | |
4df4db5c | 136 | esp = esp_allocate(tpnt, (void *)board + OKTAGON_ESP_ADDR, 0); |
1da177e4 LT |
137 | |
138 | /* we have to shift the registers only one bit for oktagon */ | |
139 | esp->shift = 1; | |
140 | ||
141 | esp_write(eregs->esp_cfg1, (ESP_CONFIG1_PENABLE | 7)); | |
142 | udelay(5); | |
143 | if (esp_read(eregs->esp_cfg1) != (ESP_CONFIG1_PENABLE | 7)) | |
144 | return 0; /* Bail out if address did not hold data */ | |
145 | ||
146 | /* Do command transfer with programmed I/O */ | |
147 | esp->do_pio_cmds = 1; | |
148 | ||
149 | /* Required functions */ | |
150 | esp->dma_bytes_sent = &dma_bytes_sent; | |
151 | esp->dma_can_transfer = &dma_can_transfer; | |
152 | esp->dma_dump_state = &dma_dump_state; | |
153 | esp->dma_init_read = &dma_init_read; | |
154 | esp->dma_init_write = &dma_init_write; | |
155 | esp->dma_ints_off = &dma_ints_off; | |
156 | esp->dma_ints_on = &dma_ints_on; | |
157 | esp->dma_irq_p = &dma_irq_p; | |
158 | esp->dma_ports_p = &dma_ports_p; | |
159 | esp->dma_setup = &dma_setup; | |
160 | ||
161 | /* Optional functions */ | |
162 | esp->dma_barrier = 0; | |
163 | esp->dma_drain = 0; | |
164 | esp->dma_invalidate = &dma_invalidate; | |
165 | esp->dma_irq_entry = 0; | |
166 | esp->dma_irq_exit = &dma_irq_exit; | |
167 | esp->dma_led_on = &dma_led_on; | |
168 | esp->dma_led_off = &dma_led_off; | |
169 | esp->dma_poll = 0; | |
170 | esp->dma_reset = 0; | |
171 | ||
172 | esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one; | |
173 | esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl; | |
174 | esp->dma_mmu_release_scsi_one = &dma_mmu_release_scsi_one; | |
175 | esp->dma_mmu_release_scsi_sgl = &dma_mmu_release_scsi_sgl; | |
176 | esp->dma_advance_sg = &dma_advance_sg; | |
177 | ||
178 | /* SCSI chip speed */ | |
179 | /* Looking at the quartz of the SCSI board... */ | |
180 | esp->cfreq = 25000000; | |
181 | ||
182 | /* The DMA registers on the CyberStorm are mapped | |
183 | * relative to the device (i.e. in the same Zorro | |
184 | * I/O block). | |
185 | */ | |
186 | esp->dregs = (void *)(address + OKTAGON_DMA_ADDR); | |
187 | ||
188 | paddress = (long *) esp->dregs; | |
189 | ||
190 | /* ESP register base */ | |
191 | esp->eregs = eregs; | |
192 | ||
193 | /* Set the command buffer */ | |
194 | esp->esp_command = (volatile unsigned char*) cmd_buffer; | |
195 | ||
196 | /* Yes, the virtual address. See below. */ | |
197 | esp->esp_command_dvma = (__u32) cmd_buffer; | |
198 | ||
199 | esp->irq = IRQ_AMIGA_PORTS; | |
1d6f359a | 200 | request_irq(IRQ_AMIGA_PORTS, esp_intr, IRQF_SHARED, |
1da177e4 LT |
201 | "BSC Oktagon SCSI", esp->ehost); |
202 | ||
203 | /* Figure out our scsi ID on the bus */ | |
204 | esp->scsi_id = 7; | |
205 | ||
206 | /* We don't have a differential SCSI-bus. */ | |
207 | esp->diff = 0; | |
208 | ||
209 | esp_initialize(esp); | |
210 | ||
211 | printk("ESP_Oktagon Driver 1.1" | |
212 | #ifdef USE_BOTTOM_HALF | |
213 | " [BOTTOM_HALF]" | |
214 | #else | |
215 | " [IRQ]" | |
216 | #endif | |
217 | " registered.\n"); | |
218 | printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,esps_in_use); | |
219 | esps_running = esps_in_use; | |
220 | current_esp = esp; | |
221 | register_reboot_notifier(&oktagon_notifier); | |
222 | return esps_in_use; | |
223 | } | |
224 | } | |
225 | return 0; | |
226 | } | |
227 | ||
228 | ||
229 | /* | |
230 | * On certain configurations the SCSI equipment gets confused on reboot, | |
231 | * so we have to reset it then. | |
232 | */ | |
233 | ||
234 | static int | |
235 | oktagon_notify_reboot(struct notifier_block *this, unsigned long code, void *x) | |
236 | { | |
237 | struct NCR_ESP *esp; | |
238 | ||
239 | if((code == SYS_DOWN || code == SYS_HALT) && (esp = current_esp)) | |
240 | { | |
241 | esp_bootup_reset(esp,esp->eregs); | |
242 | udelay(500); /* Settle time. Maybe unnecessary. */ | |
243 | } | |
244 | return NOTIFY_DONE; | |
245 | } | |
246 | ||
247 | ||
248 | ||
249 | #ifdef USE_BOTTOM_HALF | |
250 | ||
251 | ||
252 | /* | |
253 | * The bsc Oktagon controller has no real DMA, so we have to do the 'DMA | |
254 | * transfer' in the interrupt (Yikes!) or use a bottom half to not to clutter | |
255 | * IRQ's for longer-than-good. | |
256 | * | |
257 | * FIXME | |
258 | * BIG PROBLEM: 'len' is usually the buffer length, not the expected length | |
259 | * of the data. So DMA may finish prematurely, further reads lead to | |
260 | * 'machine check' on APUS systems (don't know about m68k systems, AmigaOS | |
261 | * deliberately ignores the bus faults) and a normal copy-loop can't | |
262 | * be exited prematurely just at the right moment by the dma_invalidate IRQ. | |
263 | * So do it the hard way, write an own copier in assembler and | |
264 | * catch the exception. | |
265 | * -- Carsten | |
266 | */ | |
267 | ||
268 | ||
4927b3f7 | 269 | static void dma_commit(struct work_struct *unused) |
1da177e4 LT |
270 | { |
271 | long wait,len2,pos; | |
272 | struct NCR_ESP *esp; | |
273 | ||
274 | ESPDATA(("Transfer: %ld bytes, Address 0x%08lX, Direction: %d\n", | |
275 | len,(long) address,direction)); | |
276 | dma_ints_off(current_esp); | |
277 | ||
278 | pos = 0; | |
279 | wait = 1; | |
280 | if(direction) /* write? (memory to device) */ | |
281 | { | |
282 | while(len > 0) | |
283 | { | |
284 | len2 = oktag_to_io(paddress, address+pos, len); | |
285 | if(!len2) | |
286 | { | |
287 | if(wait > 1000) | |
288 | { | |
289 | printk("Expedited DMA exit (writing) %ld\n",len); | |
290 | break; | |
291 | } | |
292 | mdelay(wait); | |
293 | wait *= 2; | |
294 | } | |
295 | pos += len2; | |
296 | len -= len2*sizeof(long); | |
297 | } | |
298 | } else { | |
299 | while(len > 0) | |
300 | { | |
301 | len2 = oktag_from_io(address+pos, paddress, len); | |
302 | if(!len2) | |
303 | { | |
304 | if(wait > 1000) | |
305 | { | |
306 | printk("Expedited DMA exit (reading) %ld\n",len); | |
307 | break; | |
308 | } | |
309 | mdelay(wait); | |
310 | wait *= 2; | |
311 | } | |
312 | pos += len2; | |
313 | len -= len2*sizeof(long); | |
314 | } | |
315 | } | |
316 | ||
317 | /* to make esp->shift work */ | |
318 | esp=current_esp; | |
319 | ||
320 | #if 0 | |
321 | len2 = (esp_read(current_esp->eregs->esp_tclow) & 0xff) | | |
322 | ((esp_read(current_esp->eregs->esp_tcmed) & 0xff) << 8); | |
323 | ||
324 | /* | |
325 | * Uh uh. If you see this, len and transfer count registers were out of | |
326 | * sync. That means really serious trouble. | |
327 | */ | |
328 | ||
329 | if(len2) | |
330 | printk("Eeeek!! Transfer count still %ld!\n",len2); | |
331 | #endif | |
332 | ||
333 | /* | |
334 | * Normally we just need to exit and wait for the interrupt to come. | |
335 | * But at least one device (my Microtek ScanMaker 630) regularly mis- | |
336 | * calculates the bytes it should send which is really ugly because | |
337 | * it locks up the SCSI bus if not accounted for. | |
338 | */ | |
339 | ||
340 | if(!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR)) | |
341 | { | |
342 | long len = 100; | |
343 | long trash[10]; | |
344 | ||
345 | /* | |
346 | * Interrupt bit was not set. Either the device is just plain lazy | |
347 | * so we give it a 10 ms chance or... | |
348 | */ | |
349 | while(len-- && (!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR))) | |
350 | udelay(100); | |
351 | ||
352 | ||
353 | if(!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR)) | |
354 | { | |
355 | /* | |
356 | * So we think that the transfer count is out of sync. Since we | |
357 | * have all we want we are happy and can ditch the trash. | |
358 | */ | |
359 | ||
360 | len = DMA_MAXTRANSFER; | |
361 | ||
362 | while(len-- && (!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR))) | |
363 | oktag_from_io(trash,paddress,2); | |
364 | ||
365 | if(!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR)) | |
366 | { | |
367 | /* | |
368 | * Things really have gone wrong. If we leave the system in that | |
369 | * state, the SCSI bus is locked forever. I hope that this will | |
370 | * turn the system in a more or less running state. | |
371 | */ | |
372 | printk("Device is bolixed, trying bus reset...\n"); | |
373 | esp_bootup_reset(current_esp,current_esp->eregs); | |
374 | } | |
375 | } | |
376 | } | |
377 | ||
378 | ESPDATA(("Transfer_finale: do_data_finale should come\n")); | |
379 | ||
380 | len = 0; | |
381 | dma_on = 0; | |
382 | dma_ints_on(current_esp); | |
383 | } | |
384 | ||
385 | #endif | |
386 | ||
387 | /************************************************************* DMA Functions */ | |
388 | static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count) | |
389 | { | |
390 | /* Since the CyberStorm DMA is fully dedicated to the ESP chip, | |
391 | * the number of bytes sent (to the ESP chip) equals the number | |
392 | * of bytes in the FIFO - there is no buffering in the DMA controller. | |
393 | * XXXX Do I read this right? It is from host to ESP, right? | |
394 | */ | |
395 | return fifo_count; | |
396 | } | |
397 | ||
398 | static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp) | |
399 | { | |
400 | unsigned long sz = sp->SCp.this_residual; | |
401 | if(sz > DMA_MAXTRANSFER) | |
402 | sz = DMA_MAXTRANSFER; | |
403 | return sz; | |
404 | } | |
405 | ||
406 | static void dma_dump_state(struct NCR_ESP *esp) | |
407 | { | |
408 | } | |
409 | ||
410 | /* | |
411 | * What the f$@& is this? | |
412 | * | |
413 | * Some SCSI devices (like my Microtek ScanMaker 630 scanner) want to transfer | |
414 | * more data than requested. How much? Dunno. So ditch the bogus data into | |
415 | * the sink, hoping the device will advance to the next phase sooner or later. | |
416 | * | |
417 | * -- Carsten | |
418 | */ | |
419 | ||
420 | static long oktag_eva_buffer[16]; /* The data sink */ | |
421 | ||
422 | static void oktag_check_dma(void) | |
423 | { | |
424 | struct NCR_ESP *esp; | |
425 | ||
426 | esp=current_esp; | |
427 | if(!len) | |
428 | { | |
429 | address = oktag_eva_buffer; | |
430 | len = 2; | |
431 | /* esp_do_data sets them to zero like len */ | |
432 | esp_write(current_esp->eregs->esp_tclow,2); | |
433 | esp_write(current_esp->eregs->esp_tcmed,0); | |
434 | } | |
435 | } | |
436 | ||
437 | static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length) | |
438 | { | |
439 | /* Zorro is noncached, everything else done using processor. */ | |
440 | /* cache_clear(addr, length); */ | |
441 | ||
442 | if(dma_on) | |
443 | panic("dma_init_read while dma process is initialized/running!\n"); | |
444 | direction = 0; | |
445 | address = (long *) vaddress; | |
446 | current_esp = esp; | |
447 | len = length; | |
448 | oktag_check_dma(); | |
449 | dma_on = 1; | |
450 | } | |
451 | ||
452 | static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length) | |
453 | { | |
454 | /* cache_push(addr, length); */ | |
455 | ||
456 | if(dma_on) | |
457 | panic("dma_init_write while dma process is initialized/running!\n"); | |
458 | direction = 1; | |
459 | address = (long *) vaddress; | |
460 | current_esp = esp; | |
461 | len = length; | |
462 | oktag_check_dma(); | |
463 | dma_on = 1; | |
464 | } | |
465 | ||
466 | static void dma_ints_off(struct NCR_ESP *esp) | |
467 | { | |
468 | disable_irq(esp->irq); | |
469 | } | |
470 | ||
471 | static void dma_ints_on(struct NCR_ESP *esp) | |
472 | { | |
473 | enable_irq(esp->irq); | |
474 | } | |
475 | ||
476 | static int dma_irq_p(struct NCR_ESP *esp) | |
477 | { | |
478 | /* It's important to check the DMA IRQ bit in the correct way! */ | |
479 | return (esp_read(esp->eregs->esp_status) & ESP_STAT_INTR); | |
480 | } | |
481 | ||
482 | static void dma_led_off(struct NCR_ESP *esp) | |
483 | { | |
484 | } | |
485 | ||
486 | static void dma_led_on(struct NCR_ESP *esp) | |
487 | { | |
488 | } | |
489 | ||
490 | static int dma_ports_p(struct NCR_ESP *esp) | |
491 | { | |
b4290a23 | 492 | return ((amiga_custom.intenar) & IF_PORTS); |
1da177e4 LT |
493 | } |
494 | ||
495 | static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write) | |
496 | { | |
497 | /* On the Sparc, DMA_ST_WRITE means "move data from device to memory" | |
498 | * so when (write) is true, it actually means READ! | |
499 | */ | |
500 | if(write){ | |
501 | dma_init_read(esp, addr, count); | |
502 | } else { | |
503 | dma_init_write(esp, addr, count); | |
504 | } | |
505 | } | |
506 | ||
507 | /* | |
508 | * IRQ entry when DMA transfer is ready to be started | |
509 | */ | |
510 | ||
511 | static void dma_irq_exit(struct NCR_ESP *esp) | |
512 | { | |
513 | #ifdef USE_BOTTOM_HALF | |
514 | if(dma_on) | |
515 | { | |
516 | schedule_work(&tq_fake_dma); | |
517 | } | |
518 | #else | |
519 | while(len && !dma_irq_p(esp)) | |
520 | { | |
521 | if(direction) | |
522 | *paddress = *address++; | |
523 | else | |
524 | *address++ = *paddress; | |
525 | len -= (sizeof(long)); | |
526 | } | |
527 | len = 0; | |
528 | dma_on = 0; | |
529 | #endif | |
530 | } | |
531 | ||
532 | /* | |
533 | * IRQ entry when DMA has just finished | |
534 | */ | |
535 | ||
536 | static void dma_invalidate(struct NCR_ESP *esp) | |
537 | { | |
538 | } | |
539 | ||
540 | /* | |
541 | * Since the processor does the data transfer we have to use the custom | |
542 | * mmu interface to pass the virtual address, not the physical. | |
543 | */ | |
544 | ||
545 | void dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd *sp) | |
546 | { | |
547 | sp->SCp.ptr = | |
548 | sp->request_buffer; | |
549 | } | |
550 | ||
551 | void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd *sp) | |
552 | { | |
45711f1a | 553 | sp->SCp.ptr = sg_virt(sp->SCp.buffer); |
1da177e4 LT |
554 | } |
555 | ||
556 | void dma_mmu_release_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd *sp) | |
557 | { | |
558 | } | |
559 | ||
560 | void dma_mmu_release_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd *sp) | |
561 | { | |
562 | } | |
563 | ||
564 | void dma_advance_sg(Scsi_Cmnd *sp) | |
565 | { | |
45711f1a | 566 | sp->SCp.ptr = sg_virt(sp->SCp.buffer); |
1da177e4 LT |
567 | } |
568 | ||
569 | ||
570 | #define HOSTS_C | |
571 | ||
572 | int oktagon_esp_release(struct Scsi_Host *instance) | |
573 | { | |
574 | #ifdef MODULE | |
575 | unsigned long address = (unsigned long)((struct NCR_ESP *)instance->hostdata)->edev; | |
576 | esp_release(); | |
577 | release_mem_region(address, sizeof(struct ESP_regs)); | |
578 | free_irq(IRQ_AMIGA_PORTS, esp_intr); | |
579 | unregister_reboot_notifier(&oktagon_notifier); | |
580 | #endif | |
581 | return 1; | |
582 | } | |
583 | ||
584 | ||
d0be4a7d | 585 | static struct scsi_host_template driver_template = { |
1da177e4 LT |
586 | .proc_name = "esp-oktagon", |
587 | .proc_info = &esp_proc_info, | |
588 | .name = "BSC Oktagon SCSI", | |
589 | .detect = oktagon_esp_detect, | |
590 | .slave_alloc = esp_slave_alloc, | |
591 | .slave_destroy = esp_slave_destroy, | |
592 | .release = oktagon_esp_release, | |
593 | .queuecommand = esp_queue, | |
594 | .eh_abort_handler = esp_abort, | |
595 | .eh_bus_reset_handler = esp_reset, | |
596 | .can_queue = 7, | |
597 | .this_id = 7, | |
598 | .sg_tablesize = SG_ALL, | |
599 | .cmd_per_lun = 1, | |
600 | .use_clustering = ENABLE_CLUSTERING | |
601 | }; | |
602 | ||
603 | ||
604 | #include "scsi_module.c" | |
605 | ||
606 | MODULE_LICENSE("GPL"); |