[deliverable/linux.git] / drivers / scsi / pm8001 / pm8001_defs.h

/*
 * PMC-Sierra 8001/8081/8088/8089 SAS/SATA based host adapters driver
 *
 * Copyright (c) 2008-2009 USI Co., Ltd.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions, and the following disclaimer,
 *    without modification.
 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
 *    substantially similar to the "NO WARRANTY" disclaimer below
 *    ("Disclaimer") and any redistribution must be conditioned upon
 *    including a substantially similar Disclaimer requirement for further
 *    binary redistribution.
 * 3. Neither the names of the above-listed copyright holders nor the names
 *    of any contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * Alternatively, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") version 2 as published by the Free
 * Software Foundation.
 *
 * NO WARRANTY
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGES.
 *
 */

#ifndef _PM8001_DEFS_H_
#define _PM8001_DEFS_H_

enum chip_flavors {
	chip_8001,
	chip_8008,
	chip_8009,
	chip_8018,
	chip_8019,
	chip_8074,
	chip_8076,
	chip_8077,
	chip_8006,
	chip_8070,
	chip_8072
};

enum phy_speed {
	PHY_SPEED_15 = 0x01,
	PHY_SPEED_30 = 0x02,
	PHY_SPEED_60 = 0x04,
	PHY_SPEED_120 = 0x08,
};

enum data_direction {
	DATA_DIR_NONE = 0x0,	/* NO TRANSFER */
	DATA_DIR_IN = 0x01,	/* INBOUND */
	DATA_DIR_OUT = 0x02,	/* OUTBOUND */
	DATA_DIR_BYRECIPIENT = 0x04, /* UNSPECIFIED */
};

enum port_type {
	PORT_TYPE_SAS = (1L << 1),
	PORT_TYPE_SATA = (1L << 0),
};

/* driver compile-time configuration */
#define	PM8001_MAX_CCB		 512	/* max ccbs supported */
#define PM8001_MPI_QUEUE         1024   /* maximum mpi queue entries */
#define	PM8001_MAX_INB_NUM	 1
#define	PM8001_MAX_OUTB_NUM	 1
#define	PM8001_MAX_SPCV_INB_NUM		1
#define	PM8001_MAX_SPCV_OUTB_NUM	4
#define	PM8001_CAN_QUEUE	 508	/* SCSI Queue depth */

/* Inbound/Outbound queue size */
#define IOMB_SIZE_SPC		64
#define IOMB_SIZE_SPCV		128

/* unchangeable hardware details */
#define	PM8001_MAX_PHYS		 16	/* max. possible phys */
#define	PM8001_MAX_PORTS	 16	/* max. possible ports */
#define	PM8001_MAX_DEVICES	 2048	/* max supported device */
#define	PM8001_MAX_MSIX_VEC	 64	/* max msi-x int for spcv/ve */

#define USI_MAX_MEMCNT_BASE	5
#define IB			(USI_MAX_MEMCNT_BASE + 1)
#define CI			(IB + PM8001_MAX_SPCV_INB_NUM)
#define OB			(CI + PM8001_MAX_SPCV_INB_NUM)
#define PI			(OB + PM8001_MAX_SPCV_OUTB_NUM)
#define USI_MAX_MEMCNT		(PI + PM8001_MAX_SPCV_OUTB_NUM)
#define PM8001_MAX_DMA_SG	SG_ALL
enum memory_region_num {
	AAP1 = 0x0, /* application acceleration processor */
	IOP,	    /* IO processor */
	NVMD,	    /* NVM device */
	DEV_MEM,    /* memory for devices */
	CCB_MEM,    /* memory for command control block */
	FW_FLASH,    /* memory for fw flash update */
	FORENSIC_MEM  /* memory for fw forensic data */
};
#define	PM8001_EVENT_LOG_SIZE	 (128 * 1024)

/*error code*/
enum mpi_err {
	MPI_IO_STATUS_SUCCESS = 0x0,
	MPI_IO_STATUS_BUSY = 0x01,
	MPI_IO_STATUS_FAIL = 0x02,
};

/**
 * Phy Control constants
 */
enum phy_control_type {
	PHY_LINK_RESET = 0x01,
	PHY_HARD_RESET = 0x02,
	PHY_NOTIFY_ENABLE_SPINUP = 0x10,
};

enum pm8001_hba_info_flags {
	PM8001F_INIT_TIME	= (1U << 0),
	PM8001F_RUN_TIME	= (1U << 1),
};

#endif
Commit	Line	Data
dbf9bfe6	1	/*
e5742101	2	* PMC-Sierra 8001/8081/8088/8089 SAS/SATA based host adapters driver
dbf9bfe6	3	*
	4	* Copyright (c) 2008-2009 USI Co., Ltd.
	5	* All rights reserved.
	6	*
	7	* Redistribution and use in source and binary forms, with or without
	8	* modification, are permitted provided that the following conditions
	9	* are met:
	10	* 1. Redistributions of source code must retain the above copyright
	11	* notice, this list of conditions, and the following disclaimer,
	12	* without modification.
	13	* 2. Redistributions in binary form must reproduce at minimum a disclaimer
	14	* substantially similar to the "NO WARRANTY" disclaimer below
	15	* ("Disclaimer") and any redistribution must be conditioned upon
	16	* including a substantially similar Disclaimer requirement for further
	17	* binary redistribution.
	18	* 3. Neither the names of the above-listed copyright holders nor the names
	19	* of any contributors may be used to endorse or promote products derived
	20	* from this software without specific prior written permission.
	21	*
	22	* Alternatively, this software may be distributed under the terms of the
	23	* GNU General Public License ("GPL") version 2 as published by the Free
	24	* Software Foundation.
	25	*
	26	* NO WARRANTY
	27	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	28	* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	29	* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
	30	* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	31	* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	32	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
	33	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
	34	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
	35	* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
	36	* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
	37	* POSSIBILITY OF SUCH DAMAGES.
	38	*
	39	*/
	40
	41	#ifndef _PM8001_DEFS_H_
	42	#define _PM8001_DEFS_H_
	43
	44	enum chip_flavors {
	45	chip_8001,
e5742101 S	46	chip_8008,
	47	chip_8009,
	48	chip_8018,
a9a923e5 AKS	49	chip_8019,
	50	chip_8074,
	51	chip_8076,
d8571b1e ST	52	chip_8077,
d8571b1e ST	53	chip_8006,
db9d4034 BR	54	chip_8070,
db9d4034 BR	55	chip_8072
dbf9bfe6	56	};
e590adfd	57
dbf9bfe6	58	enum phy_speed {
	59	PHY_SPEED_15 = 0x01,
	60	PHY_SPEED_30 = 0x02,
	61	PHY_SPEED_60 = 0x04,
b093d590	62	PHY_SPEED_120 = 0x08,
dbf9bfe6	63	};
	64
	65	enum data_direction {
	66	DATA_DIR_NONE = 0x0, /* NO TRANSFER */
	67	DATA_DIR_IN = 0x01, /* INBOUND */
	68	DATA_DIR_OUT = 0x02, /* OUTBOUND */
	69	DATA_DIR_BYRECIPIENT = 0x04, /* UNSPECIFIED */
	70	};
	71
	72	enum port_type {
	73	PORT_TYPE_SAS = (1L << 1),
	74	PORT_TYPE_SATA = (1L << 0),
	75	};
	76
	77	/* driver compile-time configuration */
	78	#define PM8001_MAX_CCB 512 /* max ccbs supported */
99c72ebc	79	#define PM8001_MPI_QUEUE 1024 /* maximum mpi queue entries */
dbf9bfe6	80	#define PM8001_MAX_INB_NUM 1
dbf9bfe6	81	#define PM8001_MAX_OUTB_NUM 1
e5742101 S	82	#define PM8001_MAX_SPCV_INB_NUM 1
e5742101 S	83	#define PM8001_MAX_SPCV_OUTB_NUM 4
99c72ebc	84	#define PM8001_CAN_QUEUE 508 /* SCSI Queue depth */
dbf9bfe6	85
e5742101 S	86	/* Inbound/Outbound queue size */
	87	#define IOMB_SIZE_SPC 64
	88	#define IOMB_SIZE_SPCV 128
	89
dbf9bfe6	90	/* unchangeable hardware details */
e5742101 S	91	#define PM8001_MAX_PHYS 16 /* max. possible phys */
	92	#define PM8001_MAX_PORTS 16 /* max. possible ports */
	93	#define PM8001_MAX_DEVICES 2048 /* max supported device */
	94	#define PM8001_MAX_MSIX_VEC 64 /* max msi-x int for spcv/ve */
dbf9bfe6	95
1c75a679	96	#define USI_MAX_MEMCNT_BASE 5
e590adfd S	97	#define IB (USI_MAX_MEMCNT_BASE + 1)
	98	#define CI (IB + PM8001_MAX_SPCV_INB_NUM)
	99	#define OB (CI + PM8001_MAX_SPCV_INB_NUM)
	100	#define PI (OB + PM8001_MAX_SPCV_OUTB_NUM)
	101	#define USI_MAX_MEMCNT (PI + PM8001_MAX_SPCV_OUTB_NUM)
	102	#define PM8001_MAX_DMA_SG SG_ALL
dbf9bfe6	103	enum memory_region_num {
	104	AAP1 = 0x0, /* application acceleration processor */
	105	IOP, /* IO processor */
dbf9bfe6	106	NVMD, /* NVM device */
	107	DEV_MEM, /* memory for devices */
	108	CCB_MEM, /* memory for command control block */
d078b511 AKS	109	FW_FLASH, /* memory for fw flash update */
d078b511 AKS	110	FORENSIC_MEM /* memory for fw forensic data */
dbf9bfe6	111	};
	112	#define PM8001_EVENT_LOG_SIZE (128 * 1024)
	113
	114	/error code/
	115	enum mpi_err {
	116	MPI_IO_STATUS_SUCCESS = 0x0,
	117	MPI_IO_STATUS_BUSY = 0x01,
	118	MPI_IO_STATUS_FAIL = 0x02,
	119	};
	120
	121	/**
	122	* Phy Control constants
	123	*/
	124	enum phy_control_type {
	125	PHY_LINK_RESET = 0x01,
	126	PHY_HARD_RESET = 0x02,
	127	PHY_NOTIFY_ENABLE_SPINUP = 0x10,
	128	};
	129
	130	enum pm8001_hba_info_flags {
	131	PM8001F_INIT_TIME = (1U << 0),
	132	PM8001F_RUN_TIME = (1U << 1),
	133	};
	134
	135	#endif