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[SCSI] qla2xxx: Corrections to log messages.
[deliverable/linux.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
07e264b7 3 * Copyright (c) 2003-2011 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
1da177e4
LT		 20/*
21* QLogic ISP2x00 Hardware Support Function Prototypes.
22*/
1da177e4 23static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 24static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 25static int qla2x00_init_rings(scsi_qla_host_t *);
26static int qla2x00_fw_ready(scsi_qla_host_t *);
27static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_configure_loop(scsi_qla_host_t *);
29static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_fabric(scsi_qla_host_t *);
31static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
1da177e4
LT		 32static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
33 uint16_t *);
1da177e4
LT		 34
35static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 36
4d4df193
HK		 37static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
38static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 39static int qla25xx_init_queues(struct qla_hw_data *);
4d4df193 40
ac280b67
AV		 41/* SRB Extensions ---------------------------------------------------------- */
42
9ba56b95
GM		 43void
44qla2x00_sp_timeout(unsigned long __data)
ac280b67
AV		 45{
46 srb_t *sp = (srb_t *)__data;
4916392b 47 struct srb_iocb *iocb;
ac280b67
AV		 48 fc_port_t *fcport = sp->fcport;
49 struct qla_hw_data *ha = fcport->vha->hw;
50 struct req_que *req;
51 unsigned long flags;
52
53 spin_lock_irqsave(&ha->hardware_lock, flags);
54 req = ha->req_q_map[0];
55 req->outstanding_cmds[sp->handle] = NULL;
9ba56b95 56 iocb = &sp->u.iocb_cmd;
4916392b 57 iocb->timeout(sp);
9ba56b95 58 sp->free(fcport->vha, sp);
6ac52608 59 spin_unlock_irqrestore(&ha->hardware_lock, flags);
ac280b67
AV		 60}
61
9ba56b95
GM		 62void
63qla2x00_sp_free(void *data, void *ptr)
ac280b67 64{
9ba56b95
GM		 65 srb_t *sp = (srb_t *)ptr;
66 struct srb_iocb *iocb = &sp->u.iocb_cmd;
67 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
ac280b67 68
4d97cc53 69 del_timer(&iocb->timer);
9ba56b95 70 mempool_free(sp, vha->hw->srb_mempool);
feafb7b1
AE		 71
72 QLA_VHA_MARK_NOT_BUSY(vha);
ac280b67
AV		 73}
74
ac280b67
AV		 75/* Asynchronous Login/Logout Routines -------------------------------------- */
76
5b91490e
AV		 77static inline unsigned long
78qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79{
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (!IS_FWI2_CAPABLE(ha)) {
86 /*
87 * Except for earlier ISPs where the timeout is seeded from the
88 * initialization control block.
89 */
90 tmo = ha->login_timeout;
91 }
92 return tmo;
93}
ac280b67
AV		 94
95static void
9ba56b95 96qla2x00_async_iocb_timeout(void *data)
ac280b67 97{
9ba56b95 98 srb_t *sp = (srb_t *)data;
ac280b67 99 fc_port_t *fcport = sp->fcport;
ac280b67 100
7c3df132 101 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
cfb0919c 102 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
9ba56b95 103 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
7c3df132 104 fcport->d_id.b.al_pa);
ac280b67 105
5ff1d584 106 fcport->flags &= ~FCF_ASYNC_SENT;
9ba56b95
GM		 107 if (sp->type == SRB_LOGIN_CMD) {
108 struct srb_iocb *lio = &sp->u.iocb_cmd;
ac280b67 109 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
6ac52608
AV		 110 /* Retry as needed. */
111 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
112 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
113 QLA_LOGIO_LOGIN_RETRIED : 0;
114 qla2x00_post_async_login_done_work(fcport->vha, fcport,
115 lio->u.logio.data);
116 }
ac280b67
AV		 117}
118
99b0bec7 119static void
9ba56b95 120qla2x00_async_login_sp_done(void *data, void *ptr, int res)
99b0bec7 121{
9ba56b95
GM		 122 srb_t *sp = (srb_t *)ptr;
123 struct srb_iocb *lio = &sp->u.iocb_cmd;
124 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
125
126 if (!test_bit(UNLOADING, &vha->dpc_flags))
127 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
128 lio->u.logio.data);
129 sp->free(sp->fcport->vha, sp);
99b0bec7
AV		 130}
131
ac280b67
AV		 132int
133qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
134 uint16_t *data)
135{
ac280b67 136 srb_t *sp;
4916392b 137 struct srb_iocb *lio;
ac280b67
AV		 138 int rval;
139
140 rval = QLA_FUNCTION_FAILED;
9ba56b95 141 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 142 if (!sp)
143 goto done;
144
9ba56b95
GM		 145 sp->type = SRB_LOGIN_CMD;
146 sp->name = "login";
147 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
148
149 lio = &sp->u.iocb_cmd;
3822263e 150 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 151 sp->done = qla2x00_async_login_sp_done;
4916392b 152 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
ac280b67 153 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 154 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
ac280b67
AV		 155 rval = qla2x00_start_sp(sp);
156 if (rval != QLA_SUCCESS)
157 goto done_free_sp;
158
7c3df132 159 ql_dbg(ql_dbg_disc, vha, 0x2072,
cfb0919c
CD		 160 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
161 "retries=%d.\n", sp->handle, fcport->loop_id,
162 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
163 fcport->login_retry);
ac280b67
AV		 164 return rval;
165
166done_free_sp:
9ba56b95 167 sp->free(fcport->vha, sp);
ac280b67
AV		 168done:
169 return rval;
170}
171
99b0bec7 172static void
9ba56b95 173qla2x00_async_logout_sp_done(void *data, void *ptr, int res)
99b0bec7 174{
9ba56b95
GM		 175 srb_t *sp = (srb_t *)ptr;
176 struct srb_iocb *lio = &sp->u.iocb_cmd;
177 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
178
179 if (!test_bit(UNLOADING, &vha->dpc_flags))
180 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
181 lio->u.logio.data);
182 sp->free(sp->fcport->vha, sp);
99b0bec7
AV		 183}
184
ac280b67
AV		 185int
186qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
187{
ac280b67 188 srb_t *sp;
4916392b 189 struct srb_iocb *lio;
ac280b67
AV		 190 int rval;
191
192 rval = QLA_FUNCTION_FAILED;
9ba56b95 193 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 194 if (!sp)
195 goto done;
196
9ba56b95
GM		 197 sp->type = SRB_LOGOUT_CMD;
198 sp->name = "logout";
199 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
200
201 lio = &sp->u.iocb_cmd;
3822263e 202 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 203 sp->done = qla2x00_async_logout_sp_done;
ac280b67
AV		 204 rval = qla2x00_start_sp(sp);
205 if (rval != QLA_SUCCESS)
206 goto done_free_sp;
207
7c3df132 208 ql_dbg(ql_dbg_disc, vha, 0x2070,
cfb0919c
CD		 209 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
210 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
211 fcport->d_id.b.area, fcport->d_id.b.al_pa);
ac280b67
AV		 212 return rval;
213
214done_free_sp:
9ba56b95 215 sp->free(fcport->vha, sp);
ac280b67
AV		 216done:
217 return rval;
218}
219
5ff1d584 220static void
9ba56b95 221qla2x00_async_adisc_sp_done(void *data, void *ptr, int res)
5ff1d584 222{
9ba56b95
GM		 223 srb_t *sp = (srb_t *)ptr;
224 struct srb_iocb *lio = &sp->u.iocb_cmd;
225 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
226
227 if (!test_bit(UNLOADING, &vha->dpc_flags))
228 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
229 lio->u.logio.data);
230 sp->free(sp->fcport->vha, sp);
5ff1d584
AV		 231}
232
233int
234qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
235 uint16_t *data)
236{
5ff1d584 237 srb_t *sp;
4916392b 238 struct srb_iocb *lio;
5ff1d584
AV		 239 int rval;
240
241 rval = QLA_FUNCTION_FAILED;
9ba56b95 242 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
5ff1d584
AV		 243 if (!sp)
244 goto done;
245
9ba56b95
GM		 246 sp->type = SRB_ADISC_CMD;
247 sp->name = "adisc";
248 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
249
250 lio = &sp->u.iocb_cmd;
3822263e 251 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 252 sp->done = qla2x00_async_adisc_sp_done;
5ff1d584 253 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 254 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584
AV		 255 rval = qla2x00_start_sp(sp);
256 if (rval != QLA_SUCCESS)
257 goto done_free_sp;
258
7c3df132 259 ql_dbg(ql_dbg_disc, vha, 0x206f,
cfb0919c
CD		 260 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
261 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
262 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5ff1d584
AV		 263 return rval;
264
265done_free_sp:
9ba56b95 266 sp->free(fcport->vha, sp);
5ff1d584
AV		 267done:
268 return rval;
269}
270
3822263e 271static void
9ba56b95 272qla2x00_async_tm_cmd_done(void *data, void *ptr, int res)
3822263e 273{
9ba56b95
GM		 274 srb_t *sp = (srb_t *)ptr;
275 struct srb_iocb *iocb = &sp->u.iocb_cmd;
276 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
277 uint32_t flags;
278 uint16_t lun;
279 int rval;
3822263e 280
9ba56b95
GM		 281 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
282 flags = iocb->u.tmf.flags;
283 lun = (uint16_t)iocb->u.tmf.lun;
284
285 /* Issue Marker IOCB */
286 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
287 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
288 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
289
290 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
291 ql_dbg(ql_dbg_taskm, vha, 0x8030,
292 "TM IOCB failed (%x).\n", rval);
293 }
294 }
295 sp->free(sp->fcport->vha, sp);
3822263e
MI		 296}
297
298int
9ba56b95 299qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun,
3822263e
MI		 300 uint32_t tag)
301{
302 struct scsi_qla_host *vha = fcport->vha;
3822263e 303 srb_t *sp;
3822263e
MI		 304 struct srb_iocb *tcf;
305 int rval;
306
307 rval = QLA_FUNCTION_FAILED;
9ba56b95 308 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
3822263e
MI		 309 if (!sp)
310 goto done;
311
9ba56b95
GM		 312 sp->type = SRB_TM_CMD;
313 sp->name = "tmf";
314 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
315
316 tcf = &sp->u.iocb_cmd;
317 tcf->u.tmf.flags = tm_flags;
3822263e
MI		 318 tcf->u.tmf.lun = lun;
319 tcf->u.tmf.data = tag;
320 tcf->timeout = qla2x00_async_iocb_timeout;
9ba56b95 321 sp->done = qla2x00_async_tm_cmd_done;
3822263e
MI		 322
323 rval = qla2x00_start_sp(sp);
324 if (rval != QLA_SUCCESS)
325 goto done_free_sp;
326
7c3df132 327 ql_dbg(ql_dbg_taskm, vha, 0x802f,
cfb0919c
CD		 328 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
329 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
330 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3822263e
MI		 331 return rval;
332
333done_free_sp:
9ba56b95 334 sp->free(fcport->vha, sp);
3822263e
MI		 335done:
336 return rval;
337}
338
4916392b 339void
ac280b67
AV		 340qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
341 uint16_t *data)
342{
343 int rval;
ac280b67
AV		 344
345 switch (data[0]) {
346 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 347 /*
348 * Driver must validate login state - If PRLI not complete,
349 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
350 * requests.
351 */
352 rval = qla2x00_get_port_database(vha, fcport, 0);
0eba25df
AE		 353 if (rval == QLA_NOT_LOGGED_IN) {
354 fcport->flags &= ~FCF_ASYNC_SENT;
355 fcport->flags |= FCF_LOGIN_NEEDED;
356 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
357 break;
358 }
359
a4f92a32
AV		 360 if (rval != QLA_SUCCESS) {
361 qla2x00_post_async_logout_work(vha, fcport, NULL);
362 qla2x00_post_async_login_work(vha, fcport, NULL);
363 break;
364 }
99b0bec7 365 if (fcport->flags & FCF_FCP2_DEVICE) {
5ff1d584
AV		 366 qla2x00_post_async_adisc_work(vha, fcport, data);
367 break;
99b0bec7
AV		 368 }
369 qla2x00_update_fcport(vha, fcport);
ac280b67
AV		 370 break;
371 case MBS_COMMAND_ERROR:
5ff1d584 372 fcport->flags &= ~FCF_ASYNC_SENT;
ac280b67
AV		 373 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
374 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
375 else
80d79440 376 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 377 break;
378 case MBS_PORT_ID_USED:
379 fcport->loop_id = data[1];
6ac52608 380 qla2x00_post_async_logout_work(vha, fcport, NULL);
ac280b67
AV		 381 qla2x00_post_async_login_work(vha, fcport, NULL);
382 break;
383 case MBS_LOOP_ID_USED:
384 fcport->loop_id++;
385 rval = qla2x00_find_new_loop_id(vha, fcport);
386 if (rval != QLA_SUCCESS) {
5ff1d584 387 fcport->flags &= ~FCF_ASYNC_SENT;
80d79440 388 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 389 break;
390 }
391 qla2x00_post_async_login_work(vha, fcport, NULL);
392 break;
393 }
4916392b 394 return;
ac280b67
AV		 395}
396
4916392b 397void
ac280b67
AV		 398qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
399 uint16_t *data)
400{
401 qla2x00_mark_device_lost(vha, fcport, 1, 0);
4916392b 402 return;
ac280b67
AV		 403}
404
4916392b 405void
5ff1d584
AV		 406qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
407 uint16_t *data)
408{
409 if (data[0] == MBS_COMMAND_COMPLETE) {
410 qla2x00_update_fcport(vha, fcport);
411
4916392b 412 return;
5ff1d584
AV		 413 }
414
415 /* Retry login. */
416 fcport->flags &= ~FCF_ASYNC_SENT;
417 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
418 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
419 else
80d79440 420 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5ff1d584 421
4916392b 422 return;
5ff1d584
AV		 423}
424
1da177e4
LT		 425/****************************************************************************/
426/* QLogic ISP2x00 Hardware Support Functions. */
427/****************************************************************************/
428
429/*
430* qla2x00_initialize_adapter
431* Initialize board.
432*
433* Input:
434* ha = adapter block pointer.
435*
436* Returns:
437* 0 = success
438*/
439int
e315cd28 440qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 441{
442 int rval;
e315cd28 443 struct qla_hw_data *ha = vha->hw;
73208dfd 444 struct req_que *req = ha->req_q_map[0];
2533cf67 445
1da177e4 446 /* Clear adapter flags. */
e315cd28 447 vha->flags.online = 0;
2533cf67 448 ha->flags.chip_reset_done = 0;
e315cd28 449 vha->flags.reset_active = 0;
85880801
AV		 450 ha->flags.pci_channel_io_perm_failure = 0;
451 ha->flags.eeh_busy = 0;
794a5691 452 ha->flags.thermal_supported = 1;
e315cd28
AC		 453 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
454 atomic_set(&vha->loop_state, LOOP_DOWN);
455 vha->device_flags = DFLG_NO_CABLE;
456 vha->dpc_flags = 0;
457 vha->flags.management_server_logged_in = 0;
458 vha->marker_needed = 0;
1da177e4
LT		 459 ha->isp_abort_cnt = 0;
460 ha->beacon_blink_led = 0;
461
73208dfd
AC		 462 set_bit(0, ha->req_qid_map);
463 set_bit(0, ha->rsp_qid_map);
464
cfb0919c 465 ql_dbg(ql_dbg_init, vha, 0x0040,
7c3df132 466 "Configuring PCI space...\n");
e315cd28 467 rval = ha->isp_ops->pci_config(vha);
1da177e4 468 if (rval) {
7c3df132
SK		 469 ql_log(ql_log_warn, vha, 0x0044,
470 "Unable to configure PCI space.\n");
1da177e4
LT		 471 return (rval);
472 }
473
e315cd28 474 ha->isp_ops->reset_chip(vha);
1da177e4 475
e315cd28 476 rval = qla2xxx_get_flash_info(vha);
c00d8994 477 if (rval) {
7c3df132
SK		 478 ql_log(ql_log_fatal, vha, 0x004f,
479 "Unable to validate FLASH data.\n");
c00d8994
AV		 480 return (rval);
481 }
482
73208dfd 483 ha->isp_ops->get_flash_version(vha, req->ring);
cfb0919c 484 ql_dbg(ql_dbg_init, vha, 0x0061,
7c3df132 485 "Configure NVRAM parameters...\n");
0107109e 486
e315cd28 487 ha->isp_ops->nvram_config(vha);
1da177e4 488
d4c760c2
AV		 489 if (ha->flags.disable_serdes) {
490 /* Mask HBA via NVRAM settings? */
7c3df132
SK		 491 ql_log(ql_log_info, vha, 0x0077,
492 "Masking HBA WWPN "
d4c760c2 493 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
e315cd28
AC		 494 vha->port_name[0], vha->port_name[1],
495 vha->port_name[2], vha->port_name[3],
496 vha->port_name[4], vha->port_name[5],
497 vha->port_name[6], vha->port_name[7]);
d4c760c2
AV		 498 return QLA_FUNCTION_FAILED;
499 }
500
cfb0919c 501 ql_dbg(ql_dbg_init, vha, 0x0078,
7c3df132 502 "Verifying loaded RISC code...\n");
1da177e4 503
e315cd28
AC		 504 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
505 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 506 if (rval)
507 return (rval);
e315cd28 508 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 509 if (rval)
510 return (rval);
1da177e4 511 }
a9083016 512
4d4df193 513 if (IS_QLA84XX(ha)) {
e315cd28 514 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 515 if (!ha->cs84xx) {
7c3df132 516 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 517 "Unable to configure ISP84XX.\n");
518 return QLA_FUNCTION_FAILED;
519 }
520 }
e315cd28 521 rval = qla2x00_init_rings(vha);
2533cf67 522 ha->flags.chip_reset_done = 1;
1da177e4 523
9a069e19 524 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 525 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 526 rval = qla84xx_init_chip(vha);
527 if (rval != QLA_SUCCESS) {
7c3df132
SK		 528 ql_log(ql_log_warn, vha, 0x00d4,
529 "Unable to initialize ISP84XX.\n");
9a069e19
GM		 530 qla84xx_put_chip(vha);
531 }
532 }
533
2f0f3f4f
MI		 534 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
535 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 536
1da177e4
LT		 537 return (rval);
538}
539
540/**
abbd8870 541 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
1da177e4
LT		 542 * @ha: HA context
543 *
544 * Returns 0 on success.
545 */
abbd8870 546int
e315cd28 547qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 548{
a157b101 549 uint16_t w;
abbd8870 550 unsigned long flags;
e315cd28 551 struct qla_hw_data *ha = vha->hw;
3d71644c 552 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 553
1da177e4 554 pci_set_master(ha->pdev);
af6177d8 555 pci_try_set_mwi(ha->pdev);
1da177e4 556
1da177e4 557 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 558 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 559 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
560
737faece 561 pci_disable_rom(ha->pdev);
1da177e4
LT		 562
563 /* Get PCI bus information. */
564 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 565 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 566 spin_unlock_irqrestore(&ha->hardware_lock, flags);
567
abbd8870
AV		 568 return QLA_SUCCESS;
569}
1da177e4 570
abbd8870
AV		 571/**
572 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
573 * @ha: HA context
574 *
575 * Returns 0 on success.
576 */
577int
e315cd28 578qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 579{
a157b101 580 uint16_t w;
abbd8870
AV		 581 unsigned long flags = 0;
582 uint32_t cnt;
e315cd28 583 struct qla_hw_data *ha = vha->hw;
3d71644c 584 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 585
abbd8870 586 pci_set_master(ha->pdev);
af6177d8 587 pci_try_set_mwi(ha->pdev);
1da177e4 588
abbd8870 589 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 590 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 591
abbd8870
AV		 592 if (IS_QLA2322(ha) || IS_QLA6322(ha))
593 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 594 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 595
abbd8870
AV		 596 /*
597 * If this is a 2300 card and not 2312, reset the
598 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
599 * the 2310 also reports itself as a 2300 so we need to get the
600 * fb revision level -- a 6 indicates it really is a 2300 and
601 * not a 2310.
602 */
603 if (IS_QLA2300(ha)) {
604 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 605
abbd8870 606 /* Pause RISC. */
3d71644c 607 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 608 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 609 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 610 break;
1da177e4 611
abbd8870
AV		 612 udelay(10);
613 }
1da177e4 614
abbd8870 615 /* Select FPM registers. */
3d71644c
AV		 616 WRT_REG_WORD(&reg->ctrl_status, 0x20);
617 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 618
619 /* Get the fb rev level */
3d71644c 620 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 621
622 if (ha->fb_rev == FPM_2300)
a157b101 623 pci_clear_mwi(ha->pdev);
abbd8870
AV		 624
625 /* Deselect FPM registers. */
3d71644c
AV		 626 WRT_REG_WORD(&reg->ctrl_status, 0x0);
627 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 628
629 /* Release RISC module. */
3d71644c 630 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 631 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 632 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 633 break;
634
635 udelay(10);
1da177e4 636 }
1da177e4 637
abbd8870
AV		 638 spin_unlock_irqrestore(&ha->hardware_lock, flags);
639 }
1da177e4 640
abbd8870
AV		 641 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
642
737faece 643 pci_disable_rom(ha->pdev);
1da177e4 644
abbd8870
AV		 645 /* Get PCI bus information. */
646 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 647 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 648 spin_unlock_irqrestore(&ha->hardware_lock, flags);
649
650 return QLA_SUCCESS;
1da177e4
LT		 651}
652
0107109e
AV		 653/**
654 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
655 * @ha: HA context
656 *
657 * Returns 0 on success.
658 */
659int
e315cd28 660qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 661{
a157b101 662 uint16_t w;
0107109e 663 unsigned long flags = 0;
e315cd28 664 struct qla_hw_data *ha = vha->hw;
0107109e 665 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 666
667 pci_set_master(ha->pdev);
af6177d8 668 pci_try_set_mwi(ha->pdev);
0107109e
AV		 669
670 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 671 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 672 w &= ~PCI_COMMAND_INTX_DISABLE;
673 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
674
675 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
676
677 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 678 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
679 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 680
681 /* PCIe -- adjust Maximum Read Request Size (2048). */
f85ec187
AV		 682 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
683 pcie_set_readrq(ha->pdev, 2048);
0107109e 684
737faece 685 pci_disable_rom(ha->pdev);
0107109e 686
44c10138 687 ha->chip_revision = ha->pdev->revision;
a8488abe 688
0107109e
AV		 689 /* Get PCI bus information. */
690 spin_lock_irqsave(&ha->hardware_lock, flags);
691 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
692 spin_unlock_irqrestore(&ha->hardware_lock, flags);
693
694 return QLA_SUCCESS;
695}
696
c3a2f0df
AV		 697/**
698 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
699 * @ha: HA context
700 *
701 * Returns 0 on success.
702 */
703int
e315cd28 704qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 705{
706 uint16_t w;
e315cd28 707 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 708
709 pci_set_master(ha->pdev);
710 pci_try_set_mwi(ha->pdev);
711
712 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
713 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
714 w &= ~PCI_COMMAND_INTX_DISABLE;
715 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
716
717 /* PCIe -- adjust Maximum Read Request Size (2048). */
718 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
719 pcie_set_readrq(ha->pdev, 2048);
720
737faece 721 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 722
723 ha->chip_revision = ha->pdev->revision;
724
725 return QLA_SUCCESS;
726}
727
1da177e4
LT		 728/**
729 * qla2x00_isp_firmware() - Choose firmware image.
730 * @ha: HA context
731 *
732 * Returns 0 on success.
733 */
734static int
e315cd28 735qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 736{
737 int rval;
42e421b1
AV		 738 uint16_t loop_id, topo, sw_cap;
739 uint8_t domain, area, al_pa;
e315cd28 740 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 741
742 /* Assume loading risc code */
fa2a1ce5 743 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 744
745 if (ha->flags.disable_risc_code_load) {
7c3df132 746 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 747
748 /* Verify checksum of loaded RISC code. */
e315cd28 749 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 750 if (rval == QLA_SUCCESS) {
751 /* And, verify we are not in ROM code. */
e315cd28 752 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 753 &area, &domain, &topo, &sw_cap);
754 }
1da177e4
LT		 755 }
756
7c3df132
SK		 757 if (rval)
758 ql_dbg(ql_dbg_init, vha, 0x007a,
759 "**** Load RISC code ****.\n");
1da177e4
LT		 760
761 return (rval);
762}
763
764/**
765 * qla2x00_reset_chip() - Reset ISP chip.
766 * @ha: HA context
767 *
768 * Returns 0 on success.
769 */
abbd8870 770void
e315cd28 771qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 772{
773 unsigned long flags = 0;
e315cd28 774 struct qla_hw_data *ha = vha->hw;
3d71644c 775 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 776 uint32_t cnt;
1da177e4
LT		 777 uint16_t cmd;
778
85880801
AV		 779 if (unlikely(pci_channel_offline(ha->pdev)))
780 return;
781
fd34f556 782 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 783
784 spin_lock_irqsave(&ha->hardware_lock, flags);
785
786 /* Turn off master enable */
787 cmd = 0;
788 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
789 cmd &= ~PCI_COMMAND_MASTER;
790 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
791
792 if (!IS_QLA2100(ha)) {
793 /* Pause RISC. */
794 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
795 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
796 for (cnt = 0; cnt < 30000; cnt++) {
797 if ((RD_REG_WORD(&reg->hccr) &
798 HCCR_RISC_PAUSE) != 0)
799 break;
800 udelay(100);
801 }
802 } else {
803 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
804 udelay(10);
805 }
806
807 /* Select FPM registers. */
808 WRT_REG_WORD(&reg->ctrl_status, 0x20);
809 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
810
811 /* FPM Soft Reset. */
812 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
813 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
814
815 /* Toggle Fpm Reset. */
816 if (!IS_QLA2200(ha)) {
817 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
818 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
819 }
820
821 /* Select frame buffer registers. */
822 WRT_REG_WORD(&reg->ctrl_status, 0x10);
823 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
824
825 /* Reset frame buffer FIFOs. */
826 if (IS_QLA2200(ha)) {
827 WRT_FB_CMD_REG(ha, reg, 0xa000);
828 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
829 } else {
830 WRT_FB_CMD_REG(ha, reg, 0x00fc);
831
832 /* Read back fb_cmd until zero or 3 seconds max */
833 for (cnt = 0; cnt < 3000; cnt++) {
834 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
835 break;
836 udelay(100);
837 }
838 }
839
840 /* Select RISC module registers. */
841 WRT_REG_WORD(&reg->ctrl_status, 0);
842 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
843
844 /* Reset RISC processor. */
845 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
846 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
847
848 /* Release RISC processor. */
849 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
850 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
851 }
852
853 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
854 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
855
856 /* Reset ISP chip. */
857 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
858
859 /* Wait for RISC to recover from reset. */
860 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
861 /*
862 * It is necessary to for a delay here since the card doesn't
863 * respond to PCI reads during a reset. On some architectures
864 * this will result in an MCA.
865 */
866 udelay(20);
867 for (cnt = 30000; cnt; cnt--) {
868 if ((RD_REG_WORD(&reg->ctrl_status) &
869 CSR_ISP_SOFT_RESET) == 0)
870 break;
871 udelay(100);
872 }
873 } else
874 udelay(10);
875
876 /* Reset RISC processor. */
877 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
878
879 WRT_REG_WORD(&reg->semaphore, 0);
880
881 /* Release RISC processor. */
882 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
883 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
884
885 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
886 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 887 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 888 break;
1da177e4
LT		 889
890 udelay(100);
891 }
892 } else
893 udelay(100);
894
895 /* Turn on master enable */
896 cmd |= PCI_COMMAND_MASTER;
897 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
898
899 /* Disable RISC pause on FPM parity error. */
900 if (!IS_QLA2100(ha)) {
901 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
902 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
903 }
904
905 spin_unlock_irqrestore(&ha->hardware_lock, flags);
906}
907
b1d46989
MI		 908/**
909 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
910 *
911 * Returns 0 on success.
912 */
913int
914qla81xx_reset_mpi(scsi_qla_host_t *vha)
915{
916 uint16_t mb[4] = {0x1010, 0, 1, 0};
917
6246b8a1
GM		 918 if (!IS_QLA81XX(vha->hw))
919 return QLA_SUCCESS;
920
b1d46989
MI		 921 return qla81xx_write_mpi_register(vha, mb);
922}
923
0107109e 924/**
88c26663 925 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
0107109e
AV		 926 * @ha: HA context
927 *
928 * Returns 0 on success.
929 */
88c26663 930static inline void
e315cd28 931qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 932{
933 unsigned long flags = 0;
e315cd28 934 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 935 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
936 uint32_t cnt, d2;
335a1cc9 937 uint16_t wd;
b1d46989 938 static int abts_cnt; /* ISP abort retry counts */
0107109e 939
0107109e
AV		 940 spin_lock_irqsave(&ha->hardware_lock, flags);
941
942 /* Reset RISC. */
943 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
944 for (cnt = 0; cnt < 30000; cnt++) {
945 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
946 break;
947
948 udelay(10);
949 }
950
951 WRT_REG_DWORD(&reg->ctrl_status,
952 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 953 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 954
335a1cc9 955 udelay(100);
88c26663 956 /* Wait for firmware to complete NVRAM accesses. */
88c26663
AV		 957 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
958 for (cnt = 10000 ; cnt && d2; cnt--) {
959 udelay(5);
960 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
961 barrier();
962 }
963
335a1cc9 964 /* Wait for soft-reset to complete. */
0107109e
AV		 965 d2 = RD_REG_DWORD(&reg->ctrl_status);
966 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
967 udelay(5);
968 d2 = RD_REG_DWORD(&reg->ctrl_status);
969 barrier();
970 }
971
b1d46989
MI		 972 /* If required, do an MPI FW reset now */
973 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
974 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
975 if (++abts_cnt < 5) {
976 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
977 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
978 } else {
979 /*
980 * We exhausted the ISP abort retries. We have to
981 * set the board offline.
982 */
983 abts_cnt = 0;
984 vha->flags.online = 0;
985 }
986 }
987 }
988
0107109e
AV		 989 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
990 RD_REG_DWORD(&reg->hccr);
991
992 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
993 RD_REG_DWORD(&reg->hccr);
994
995 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
996 RD_REG_DWORD(&reg->hccr);
997
998 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
999 for (cnt = 6000000 ; cnt && d2; cnt--) {
1000 udelay(5);
1001 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1002 barrier();
1003 }
1004
1005 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6
AV		 1006
1007 if (IS_NOPOLLING_TYPE(ha))
1008 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 1009}
1010
88c26663
AV		 1011/**
1012 * qla24xx_reset_chip() - Reset ISP24xx chip.
1013 * @ha: HA context
1014 *
1015 * Returns 0 on success.
1016 */
1017void
e315cd28 1018qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 1019{
e315cd28 1020 struct qla_hw_data *ha = vha->hw;
85880801
AV		 1021
1022 if (pci_channel_offline(ha->pdev) &&
1023 ha->flags.pci_channel_io_perm_failure) {
1024 return;
1025 }
1026
fd34f556 1027 ha->isp_ops->disable_intrs(ha);
88c26663
AV		 1028
1029 /* Perform RISC reset. */
e315cd28 1030 qla24xx_reset_risc(vha);
88c26663
AV		 1031}
1032
1da177e4
LT		 1033/**
1034 * qla2x00_chip_diag() - Test chip for proper operation.
1035 * @ha: HA context
1036 *
1037 * Returns 0 on success.
1038 */
abbd8870 1039int
e315cd28 1040qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 1041{
1042 int rval;
e315cd28 1043 struct qla_hw_data *ha = vha->hw;
3d71644c 1044 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 1045 unsigned long flags = 0;
1046 uint16_t data;
1047 uint32_t cnt;
1048 uint16_t mb[5];
73208dfd 1049 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 1050
1051 /* Assume a failed state */
1052 rval = QLA_FUNCTION_FAILED;
1053
7c3df132
SK		 1054 ql_dbg(ql_dbg_init, vha, 0x007b,
1055 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1da177e4
LT		 1056
1057 spin_lock_irqsave(&ha->hardware_lock, flags);
1058
1059 /* Reset ISP chip. */
1060 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1061
1062 /*
1063 * We need to have a delay here since the card will not respond while
1064 * in reset causing an MCA on some architectures.
1065 */
1066 udelay(20);
1067 data = qla2x00_debounce_register(&reg->ctrl_status);
1068 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1069 udelay(5);
1070 data = RD_REG_WORD(&reg->ctrl_status);
1071 barrier();
1072 }
1073
1074 if (!cnt)
1075 goto chip_diag_failed;
1076
7c3df132
SK		 1077 ql_dbg(ql_dbg_init, vha, 0x007c,
1078 "Reset register cleared by chip reset.\n");
1da177e4
LT		 1079
1080 /* Reset RISC processor. */
1081 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1082 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1083
1084 /* Workaround for QLA2312 PCI parity error */
1085 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1086 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1087 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1088 udelay(5);
1089 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 1090 barrier();
1da177e4
LT		 1091 }
1092 } else
1093 udelay(10);
1094
1095 if (!cnt)
1096 goto chip_diag_failed;
1097
1098 /* Check product ID of chip */
7c3df132 1099 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1da177e4
LT		 1100
1101 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1102 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1103 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1104 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1105 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1106 mb[3] != PROD_ID_3) {
7c3df132
SK		 1107 ql_log(ql_log_warn, vha, 0x0062,
1108 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1109 mb[1], mb[2], mb[3]);
1da177e4
LT		 1110
1111 goto chip_diag_failed;
1112 }
1113 ha->product_id[0] = mb[1];
1114 ha->product_id[1] = mb[2];
1115 ha->product_id[2] = mb[3];
1116 ha->product_id[3] = mb[4];
1117
1118 /* Adjust fw RISC transfer size */
73208dfd 1119 if (req->length > 1024)
1da177e4
LT		 1120 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1121 else
1122 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 1123 req->length;
1da177e4
LT		 1124
1125 if (IS_QLA2200(ha) &&
1126 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1127 /* Limit firmware transfer size with a 2200A */
7c3df132 1128 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 1129
ea5b6382 1130 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 1131 ha->fw_transfer_size = 128;
1132 }
1133
1134 /* Wrap Incoming Mailboxes Test. */
1135 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1136
7c3df132 1137 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 1138 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 1139 if (rval)
1140 ql_log(ql_log_warn, vha, 0x0080,
1141 "Failed mailbox send register test.\n");
1142 else
1da177e4
LT		 1143 /* Flag a successful rval */
1144 rval = QLA_SUCCESS;
1da177e4
LT		 1145 spin_lock_irqsave(&ha->hardware_lock, flags);
1146
1147chip_diag_failed:
1148 if (rval)
7c3df132
SK		 1149 ql_log(ql_log_info, vha, 0x0081,
1150 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 1151
1152 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1153
1154 return (rval);
1155}
1156
0107109e
AV		 1157/**
1158 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1159 * @ha: HA context
1160 *
1161 * Returns 0 on success.
1162 */
1163int
e315cd28 1164qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 1165{
1166 int rval;
e315cd28 1167 struct qla_hw_data *ha = vha->hw;
73208dfd 1168 struct req_que *req = ha->req_q_map[0];
0107109e 1169
a9083016
GM		 1170 if (IS_QLA82XX(ha))
1171 return QLA_SUCCESS;
1172
73208dfd 1173 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 1174
e315cd28 1175 rval = qla2x00_mbx_reg_test(vha);
0107109e 1176 if (rval) {
7c3df132
SK		 1177 ql_log(ql_log_warn, vha, 0x0082,
1178 "Failed mailbox send register test.\n");
0107109e
AV		 1179 } else {
1180 /* Flag a successful rval */
1181 rval = QLA_SUCCESS;
1182 }
1183
1184 return rval;
1185}
1186
a7a167bf 1187void
e315cd28 1188qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
0107109e 1189{
a7a167bf
AV		 1190 int rval;
1191 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
73208dfd 1192 eft_size, fce_size, mq_size;
df613b96
AV		 1193 dma_addr_t tc_dma;
1194 void *tc;
e315cd28 1195 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1196 struct req_que *req = ha->req_q_map[0];
1197 struct rsp_que *rsp = ha->rsp_q_map[0];
a7a167bf
AV		 1198
1199 if (ha->fw_dump) {
7c3df132
SK		 1200 ql_dbg(ql_dbg_init, vha, 0x00bd,
1201 "Firmware dump already allocated.\n");
a7a167bf
AV		 1202 return;
1203 }
d4e3e04d 1204
0107109e 1205 ha->fw_dumped = 0;
73208dfd 1206 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
d4e3e04d 1207 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
a7a167bf 1208 fixed_size = sizeof(struct qla2100_fw_dump);
d4e3e04d 1209 } else if (IS_QLA23XX(ha)) {
a7a167bf
AV		 1210 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1211 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1212 sizeof(uint16_t);
e428924c 1213 } else if (IS_FWI2_CAPABLE(ha)) {
6246b8a1
GM		 1214 if (IS_QLA83XX(ha))
1215 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1216 else if (IS_QLA81XX(ha))
3a03eb79
AV		 1217 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1218 else if (IS_QLA25XX(ha))
1219 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1220 else
1221 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
a7a167bf
AV		 1222 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1223 sizeof(uint32_t);
050c9bb1 1224 if (ha->mqenable) {
6246b8a1
GM		 1225 if (!IS_QLA83XX(ha))
1226 mq_size = sizeof(struct qla2xxx_mq_chain);
050c9bb1
GM		 1227 /*
1228 * Allocate maximum buffer size for all queues.
1229 * Resizing must be done at end-of-dump processing.
1230 */
1231 mq_size += ha->max_req_queues *
1232 (req->length * sizeof(request_t));
1233 mq_size += ha->max_rsp_queues *
1234 (rsp->length * sizeof(response_t));
1235 }
df613b96 1236 /* Allocate memory for Fibre Channel Event Buffer. */
6246b8a1 1237 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
436a7b11 1238 goto try_eft;
df613b96
AV		 1239
1240 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1241 GFP_KERNEL);
1242 if (!tc) {
7c3df132
SK		 1243 ql_log(ql_log_warn, vha, 0x00be,
1244 "Unable to allocate (%d KB) for FCE.\n",
1245 FCE_SIZE / 1024);
17d98630 1246 goto try_eft;
df613b96
AV		 1247 }
1248
1249 memset(tc, 0, FCE_SIZE);
e315cd28 1250 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 1251 ha->fce_mb, &ha->fce_bufs);
1252 if (rval) {
7c3df132
SK		 1253 ql_log(ql_log_warn, vha, 0x00bf,
1254 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 1255 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1256 tc_dma);
1257 ha->flags.fce_enabled = 0;
17d98630 1258 goto try_eft;
df613b96 1259 }
cfb0919c 1260 ql_dbg(ql_dbg_init, vha, 0x00c0,
7c3df132 1261 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 1262
7d9dade3 1263 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
df613b96
AV		 1264 ha->flags.fce_enabled = 1;
1265 ha->fce_dma = tc_dma;
1266 ha->fce = tc;
436a7b11
AV		 1267try_eft:
1268 /* Allocate memory for Extended Trace Buffer. */
1269 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1270 GFP_KERNEL);
1271 if (!tc) {
7c3df132
SK		 1272 ql_log(ql_log_warn, vha, 0x00c1,
1273 "Unable to allocate (%d KB) for EFT.\n",
1274 EFT_SIZE / 1024);
436a7b11
AV		 1275 goto cont_alloc;
1276 }
1277
1278 memset(tc, 0, EFT_SIZE);
e315cd28 1279 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 1280 if (rval) {
7c3df132
SK		 1281 ql_log(ql_log_warn, vha, 0x00c2,
1282 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 1283 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1284 tc_dma);
1285 goto cont_alloc;
1286 }
cfb0919c 1287 ql_dbg(ql_dbg_init, vha, 0x00c3,
7c3df132 1288 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11
AV		 1289
1290 eft_size = EFT_SIZE;
1291 ha->eft_dma = tc_dma;
1292 ha->eft = tc;
d4e3e04d 1293 }
a7a167bf 1294cont_alloc:
73208dfd
AC		 1295 req_q_size = req->length * sizeof(request_t);
1296 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf
AV		 1297
1298 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 1299 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 1300 ha->chain_offset = dump_size;
1301 dump_size += mq_size + fce_size;
d4e3e04d
AV		 1302
1303 ha->fw_dump = vmalloc(dump_size);
a7a167bf 1304 if (!ha->fw_dump) {
7c3df132
SK		 1305 ql_log(ql_log_warn, vha, 0x00c4,
1306 "Unable to allocate (%d KB) for firmware dump.\n",
1307 dump_size / 1024);
a7a167bf 1308
e30d1756
MI		 1309 if (ha->fce) {
1310 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1311 ha->fce_dma);
1312 ha->fce = NULL;
1313 ha->fce_dma = 0;
1314 }
1315
a7a167bf
AV		 1316 if (ha->eft) {
1317 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1318 ha->eft_dma);
1319 ha->eft = NULL;
1320 ha->eft_dma = 0;
1321 }
1322 return;
1323 }
cfb0919c 1324 ql_dbg(ql_dbg_init, vha, 0x00c5,
7c3df132 1325 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
a7a167bf
AV		 1326
1327 ha->fw_dump_len = dump_size;
1328 ha->fw_dump->signature[0] = 'Q';
1329 ha->fw_dump->signature[1] = 'L';
1330 ha->fw_dump->signature[2] = 'G';
1331 ha->fw_dump->signature[3] = 'C';
1332 ha->fw_dump->version = __constant_htonl(1);
1333
1334 ha->fw_dump->fixed_size = htonl(fixed_size);
1335 ha->fw_dump->mem_size = htonl(mem_size);
1336 ha->fw_dump->req_q_size = htonl(req_q_size);
1337 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1338
1339 ha->fw_dump->eft_size = htonl(eft_size);
1340 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1341 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1342
1343 ha->fw_dump->header_size =
1344 htonl(offsetof(struct qla2xxx_fw_dump, isp));
0107109e
AV		 1345}
1346
18e7555a
AV		 1347static int
1348qla81xx_mpi_sync(scsi_qla_host_t *vha)
1349{
1350#define MPS_MASK 0xe0
1351 int rval;
1352 uint16_t dc;
1353 uint32_t dw;
18e7555a
AV		 1354
1355 if (!IS_QLA81XX(vha->hw))
1356 return QLA_SUCCESS;
1357
1358 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1359 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1360 ql_log(ql_log_warn, vha, 0x0105,
1361 "Unable to acquire semaphore.\n");
18e7555a
AV		 1362 goto done;
1363 }
1364
1365 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1366 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1367 if (rval != QLA_SUCCESS) {
7c3df132 1368 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 1369 goto done_release;
1370 }
1371
1372 dc &= MPS_MASK;
1373 if (dc == (dw & MPS_MASK))
1374 goto done_release;
1375
1376 dw &= ~MPS_MASK;
1377 dw |= dc;
1378 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1379 if (rval != QLA_SUCCESS) {
7c3df132 1380 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 1381 }
1382
1383done_release:
1384 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1385 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1386 ql_log(ql_log_warn, vha, 0x006d,
1387 "Unable to release semaphore.\n");
18e7555a
AV		 1388 }
1389
1390done:
1391 return rval;
1392}
1393
1da177e4
LT		 1394/**
1395 * qla2x00_setup_chip() - Load and start RISC firmware.
1396 * @ha: HA context
1397 *
1398 * Returns 0 on success.
1399 */
1400static int
e315cd28 1401qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 1402{
0107109e
AV		 1403 int rval;
1404 uint32_t srisc_address = 0;
e315cd28 1405 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 1406 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1407 unsigned long flags;
dda772e8 1408 uint16_t fw_major_version;
3db0652e 1409
a9083016
GM		 1410 if (IS_QLA82XX(ha)) {
1411 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 1412 if (rval == QLA_SUCCESS) {
1413 qla2x00_stop_firmware(vha);
a9083016 1414 goto enable_82xx_npiv;
14e303d9 1415 } else
b963752f 1416 goto failed;
a9083016
GM		 1417 }
1418
3db0652e
AV		 1419 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1420 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1421 spin_lock_irqsave(&ha->hardware_lock, flags);
1422 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1423 RD_REG_WORD(&reg->hccr);
1424 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1425 }
1da177e4 1426
18e7555a
AV		 1427 qla81xx_mpi_sync(vha);
1428
1da177e4 1429 /* Load firmware sequences */
e315cd28 1430 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 1431 if (rval == QLA_SUCCESS) {
7c3df132
SK		 1432 ql_dbg(ql_dbg_init, vha, 0x00c9,
1433 "Verifying Checksum of loaded RISC code.\n");
1da177e4 1434
e315cd28 1435 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 1436 if (rval == QLA_SUCCESS) {
1437 /* Start firmware execution. */
7c3df132
SK		 1438 ql_dbg(ql_dbg_init, vha, 0x00ca,
1439 "Starting firmware.\n");
1da177e4 1440
e315cd28 1441 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 1442 /* Retrieve firmware information. */
dda772e8 1443 if (rval == QLA_SUCCESS) {
a9083016 1444enable_82xx_npiv:
dda772e8 1445 fw_major_version = ha->fw_major_version;
3173167f
GM		 1446 if (IS_QLA82XX(ha))
1447 qla82xx_check_md_needed(vha);
6246b8a1
GM		 1448 else
1449 rval = qla2x00_get_fw_version(vha);
ca9e9c3e
AV		 1450 if (rval != QLA_SUCCESS)
1451 goto failed;
2c3dfe3f 1452 ha->flags.npiv_supported = 0;
e315cd28 1453 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 1454 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 1455 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 1456 if ((!ha->max_npiv_vports) ||
1457 ((ha->max_npiv_vports + 1) %
eb66dc60 1458 MIN_MULTI_ID_FABRIC))
4d0ea247 1459 ha->max_npiv_vports =
eb66dc60 1460 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 1461 }
24a08138
AV		 1462 qla2x00_get_resource_cnts(vha, NULL,
1463 &ha->fw_xcb_count, NULL, NULL,
f3a0a77e 1464 &ha->max_npiv_vports, NULL);
d743de66 1465
be5ea3cf
SK		 1466 if (!fw_major_version && ql2xallocfwdump
1467 && !IS_QLA82XX(ha))
08de2844 1468 qla2x00_alloc_fw_dump(vha);
1da177e4
LT		 1469 }
1470 } else {
7c3df132
SK		 1471 ql_log(ql_log_fatal, vha, 0x00cd,
1472 "ISP Firmware failed checksum.\n");
1473 goto failed;
1da177e4
LT		 1474 }
1475 }
1476
3db0652e
AV		 1477 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1478 /* Enable proper parity. */
1479 spin_lock_irqsave(&ha->hardware_lock, flags);
1480 if (IS_QLA2300(ha))
1481 /* SRAM parity */
1482 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1483 else
1484 /* SRAM, Instruction RAM and GP RAM parity */
1485 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1486 RD_REG_WORD(&reg->hccr);
1487 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1488 }
1489
6246b8a1
GM		 1490 if (IS_QLA83XX(ha))
1491 goto skip_fac_check;
1492
1d2874de
JC		 1493 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1494 uint32_t size;
1495
1496 rval = qla81xx_fac_get_sector_size(vha, &size);
1497 if (rval == QLA_SUCCESS) {
1498 ha->flags.fac_supported = 1;
1499 ha->fdt_block_size = size << 2;
1500 } else {
7c3df132 1501 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 1502 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1503 ha->fw_major_version, ha->fw_minor_version,
1504 ha->fw_subminor_version);
6246b8a1
GM		 1505skip_fac_check:
1506 if (IS_QLA83XX(ha)) {
1507 ha->flags.fac_supported = 0;
1508 rval = QLA_SUCCESS;
1509 }
1d2874de
JC		 1510 }
1511 }
ca9e9c3e 1512failed:
1da177e4 1513 if (rval) {
7c3df132
SK		 1514 ql_log(ql_log_fatal, vha, 0x00cf,
1515 "Setup chip ****FAILED****.\n");
1da177e4
LT		 1516 }
1517
1518 return (rval);
1519}
1520
1521/**
1522 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1523 * @ha: HA context
1524 *
1525 * Beginning of request ring has initialization control block already built
1526 * by nvram config routine.
1527 *
1528 * Returns 0 on success.
1529 */
73208dfd
AC		 1530void
1531qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 1532{
1533 uint16_t cnt;
1534 response_t *pkt;
1535
2afa19a9
AC		 1536 rsp->ring_ptr = rsp->ring;
1537 rsp->ring_index = 0;
1538 rsp->status_srb = NULL;
e315cd28
AC		 1539 pkt = rsp->ring_ptr;
1540 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 1541 pkt->signature = RESPONSE_PROCESSED;
1542 pkt++;
1543 }
1da177e4
LT		 1544}
1545
1546/**
1547 * qla2x00_update_fw_options() - Read and process firmware options.
1548 * @ha: HA context
1549 *
1550 * Returns 0 on success.
1551 */
abbd8870 1552void
e315cd28 1553qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 1554{
1555 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 1556 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1557
1558 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 1559 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 1560
1561 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1562 return;
1563
1564 /* Serial Link options. */
7c3df132
SK		 1565 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1566 "Serial link options.\n");
1567 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1568 (uint8_t *)&ha->fw_seriallink_options,
1569 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 1570
1571 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1572 if (ha->fw_seriallink_options[3] & BIT_2) {
1573 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1574
1575 /* 1G settings */
1576 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1577 emphasis = (ha->fw_seriallink_options[2] &
1578 (BIT_4 | BIT_3)) >> 3;
1579 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 1580 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1581 rx_sens = (ha->fw_seriallink_options[0] &
1582 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1583 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1584 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1585 if (rx_sens == 0x0)
1586 rx_sens = 0x3;
1587 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1588 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1589 ha->fw_options[10] |= BIT_5 |
1590 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1591 (tx_sens & (BIT_1 | BIT_0));
1592
1593 /* 2G settings */
1594 swing = (ha->fw_seriallink_options[2] &
1595 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1596 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1597 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 1598 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1599 rx_sens = (ha->fw_seriallink_options[1] &
1600 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1601 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1602 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1603 if (rx_sens == 0x0)
1604 rx_sens = 0x3;
1605 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1606 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1607 ha->fw_options[11] |= BIT_5 |
1608 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1609 (tx_sens & (BIT_1 | BIT_0));
1610 }
1611
1612 /* FCP2 options. */
1613 /* Return command IOCBs without waiting for an ABTS to complete. */
1614 ha->fw_options[3] |= BIT_13;
1615
1616 /* LED scheme. */
1617 if (ha->flags.enable_led_scheme)
1618 ha->fw_options[2] |= BIT_12;
1619
48c02fde 1620 /* Detect ISP6312. */
1621 if (IS_QLA6312(ha))
1622 ha->fw_options[2] |= BIT_13;
1623
1da177e4 1624 /* Update firmware options. */
e315cd28 1625 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 1626}
1627
0107109e 1628void
e315cd28 1629qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 1630{
1631 int rval;
e315cd28 1632 struct qla_hw_data *ha = vha->hw;
0107109e 1633
a9083016
GM		 1634 if (IS_QLA82XX(ha))
1635 return;
1636
0107109e 1637 /* Update Serial Link options. */
f94097ed 1638 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 1639 return;
1640
e315cd28 1641 rval = qla2x00_set_serdes_params(vha,
f94097ed 1642 le16_to_cpu(ha->fw_seriallink_options24[1]),
1643 le16_to_cpu(ha->fw_seriallink_options24[2]),
1644 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 1645 if (rval != QLA_SUCCESS) {
7c3df132 1646 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 1647 "Unable to update Serial Link options (%x).\n", rval);
1648 }
1649}
1650
abbd8870 1651void
e315cd28 1652qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 1653{
e315cd28 1654 struct qla_hw_data *ha = vha->hw;
3d71644c 1655 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 1656 struct req_que *req = ha->req_q_map[0];
1657 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 1658
1659 /* Setup ring parameters in initialization control block. */
1660 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1661 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1662 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1663 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1664 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1665 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1666 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1667 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 1668
1669 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1670 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1671 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1672 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1673 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1674}
1675
0107109e 1676void
e315cd28 1677qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 1678{
e315cd28 1679 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1680 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1681 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1682 struct qla_msix_entry *msix;
0107109e 1683 struct init_cb_24xx *icb;
73208dfd
AC		 1684 uint16_t rid = 0;
1685 struct req_que *req = ha->req_q_map[0];
1686 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 1687
6246b8a1 1688 /* Setup ring parameters in initialization control block. */
0107109e
AV		 1689 icb = (struct init_cb_24xx *)ha->init_cb;
1690 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1691 icb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1692 icb->request_q_length = cpu_to_le16(req->length);
1693 icb->response_q_length = cpu_to_le16(rsp->length);
1694 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1695 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1696 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1697 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 1698
6246b8a1 1699 if (ha->mqenable || IS_QLA83XX(ha)) {
73208dfd
AC		 1700 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1701 icb->rid = __constant_cpu_to_le16(rid);
1702 if (ha->flags.msix_enabled) {
1703 msix = &ha->msix_entries[1];
7c3df132
SK		 1704 ql_dbg(ql_dbg_init, vha, 0x00fd,
1705 "Registering vector 0x%x for base que.\n",
1706 msix->entry);
73208dfd
AC		 1707 icb->msix = cpu_to_le16(msix->entry);
1708 }
1709 /* Use alternate PCI bus number */
1710 if (MSB(rid))
1711 icb->firmware_options_2 |=
1712 __constant_cpu_to_le32(BIT_19);
1713 /* Use alternate PCI devfn */
1714 if (LSB(rid))
1715 icb->firmware_options_2 |=
1716 __constant_cpu_to_le32(BIT_18);
1717
3155754a 1718 /* Use Disable MSIX Handshake mode for capable adapters */
6246b8a1
GM		 1719 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
1720 (ha->flags.msix_enabled)) {
3155754a
AC		 1721 icb->firmware_options_2 &=
1722 __constant_cpu_to_le32(~BIT_22);
1723 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 1724 ql_dbg(ql_dbg_init, vha, 0x00fe,
1725 "MSIX Handshake Disable Mode turned on.\n");
3155754a
AC		 1726 } else {
1727 icb->firmware_options_2 |=
1728 __constant_cpu_to_le32(BIT_22);
1729 }
73208dfd 1730 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
73208dfd
AC		 1731
1732 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1733 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1734 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1735 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1736 } else {
1737 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1738 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1739 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1740 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1741 }
1742 /* PCI posting */
1743 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 1744}
1745
1da177e4
LT		 1746/**
1747 * qla2x00_init_rings() - Initializes firmware.
1748 * @ha: HA context
1749 *
1750 * Beginning of request ring has initialization control block already built
1751 * by nvram config routine.
1752 *
1753 * Returns 0 on success.
1754 */
1755static int
e315cd28 1756qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 1757{
1758 int rval;
1759 unsigned long flags = 0;
29bdccbe 1760 int cnt, que;
e315cd28 1761 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 1762 struct req_que *req;
1763 struct rsp_que *rsp;
2c3dfe3f
SJ		 1764 struct mid_init_cb_24xx *mid_init_cb =
1765 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 1766
1767 spin_lock_irqsave(&ha->hardware_lock, flags);
1768
1769 /* Clear outstanding commands array. */
2afa19a9 1770 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe
AC		 1771 req = ha->req_q_map[que];
1772 if (!req)
1773 continue;
2afa19a9 1774 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
29bdccbe 1775 req->outstanding_cmds[cnt] = NULL;
1da177e4 1776
2afa19a9 1777 req->current_outstanding_cmd = 1;
1da177e4 1778
29bdccbe
AC		 1779 /* Initialize firmware. */
1780 req->ring_ptr = req->ring;
1781 req->ring_index = 0;
1782 req->cnt = req->length;
1783 }
1da177e4 1784
2afa19a9 1785 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe
AC		 1786 rsp = ha->rsp_q_map[que];
1787 if (!rsp)
1788 continue;
29bdccbe
AC		 1789 /* Initialize response queue entries */
1790 qla2x00_init_response_q_entries(rsp);
1791 }
1da177e4 1792
542bce1f 1793 spin_lock(&ha->vport_slock);
feafb7b1 1794
542bce1f 1795 spin_unlock(&ha->vport_slock);
feafb7b1 1796
e315cd28 1797 ha->isp_ops->config_rings(vha);
1da177e4
LT		 1798
1799 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1800
1801 /* Update any ISP specific firmware options before initialization. */
e315cd28 1802 ha->isp_ops->update_fw_options(vha);
1da177e4 1803
7c3df132 1804 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2c3dfe3f 1805
605aa2bc
LC		 1806 if (ha->flags.npiv_supported) {
1807 if (ha->operating_mode == LOOP)
1808 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 1809 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 1810 }
1811
24a08138
AV		 1812 if (IS_FWI2_CAPABLE(ha)) {
1813 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
1814 mid_init_cb->init_cb.execution_throttle =
1815 cpu_to_le16(ha->fw_xcb_count);
1816 }
2c3dfe3f 1817
e315cd28 1818 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
1da177e4 1819 if (rval) {
7c3df132
SK		 1820 ql_log(ql_log_fatal, vha, 0x00d2,
1821 "Init Firmware **** FAILED ****.\n");
1da177e4 1822 } else {
7c3df132
SK		 1823 ql_dbg(ql_dbg_init, vha, 0x00d3,
1824 "Init Firmware -- success.\n");
1da177e4
LT		 1825 }
1826
1827 return (rval);
1828}
1829
1830/**
1831 * qla2x00_fw_ready() - Waits for firmware ready.
1832 * @ha: HA context
1833 *
1834 * Returns 0 on success.
1835 */
1836static int
e315cd28 1837qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 1838{
1839 int rval;
4d4df193 1840 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 1841 uint16_t min_wait; /* Minimum wait time if loop is down */
1842 uint16_t wait_time; /* Wait time if loop is coming ready */
656e8912 1843 uint16_t state[5];
e315cd28 1844 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1845
1846 rval = QLA_SUCCESS;
1847
1848 /* 20 seconds for loop down. */
fa2a1ce5 1849 min_wait = 20;
1da177e4
LT		 1850
1851 /*
1852 * Firmware should take at most one RATOV to login, plus 5 seconds for
1853 * our own processing.
1854 */
1855 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
1856 wait_time = min_wait;
1857 }
1858
1859 /* Min wait time if loop down */
1860 mtime = jiffies + (min_wait * HZ);
1861
1862 /* wait time before firmware ready */
1863 wtime = jiffies + (wait_time * HZ);
1864
1865 /* Wait for ISP to finish LIP */
e315cd28 1866 if (!vha->flags.init_done)
7c3df132
SK		 1867 ql_log(ql_log_info, vha, 0x801e,
1868 "Waiting for LIP to complete.\n");
1da177e4
LT		 1869
1870 do {
e315cd28 1871 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 1872 if (rval == QLA_SUCCESS) {
4d4df193 1873 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 1874 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 1875 }
4d4df193 1876 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 1877 ql_dbg(ql_dbg_taskm, vha, 0x801f,
1878 "fw_state=%x 84xx=%x.\n", state[0],
1879 state[2]);
4d4df193
HK		 1880 if ((state[2] & FSTATE_LOGGED_IN) &&
1881 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 1882 ql_dbg(ql_dbg_taskm, vha, 0x8028,
1883 "Sending verify iocb.\n");
4d4df193
HK		 1884
1885 cs84xx_time = jiffies;
e315cd28 1886 rval = qla84xx_init_chip(vha);
7c3df132
SK		 1887 if (rval != QLA_SUCCESS) {
1888 ql_log(ql_log_warn,
cfb0919c 1889 vha, 0x8007,
7c3df132 1890 "Init chip failed.\n");
4d4df193 1891 break;
7c3df132 1892 }
4d4df193
HK		 1893
1894 /* Add time taken to initialize. */
1895 cs84xx_time = jiffies - cs84xx_time;
1896 wtime += cs84xx_time;
1897 mtime += cs84xx_time;
cfb0919c 1898 ql_dbg(ql_dbg_taskm, vha, 0x8008,
7c3df132
SK		 1899 "Increasing wait time by %ld. "
1900 "New time %ld.\n", cs84xx_time,
1901 wtime);
4d4df193
HK		 1902 }
1903 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 1904 ql_dbg(ql_dbg_taskm, vha, 0x8037,
1905 "F/W Ready - OK.\n");
1da177e4 1906
e315cd28 1907 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 1908 &ha->login_timeout, &ha->r_a_tov);
1909
1910 rval = QLA_SUCCESS;
1911 break;
1912 }
1913
1914 rval = QLA_FUNCTION_FAILED;
1915
e315cd28 1916 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 1917 state[0] != FSTATE_READY) {
1da177e4 1918 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 1919 * other than Wait for Login.
1920 */
1da177e4 1921 if (time_after_eq(jiffies, mtime)) {
7c3df132 1922 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 1923 "Cable is unplugged...\n");
1924
e315cd28 1925 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 1926 break;
1927 }
1928 }
1929 } else {
1930 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 1931 if (time_after_eq(jiffies, mtime) ||
7190575f 1932 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 1933 break;
1934 }
1935
1936 if (time_after_eq(jiffies, wtime))
1937 break;
1938
1939 /* Delay for a while */
1940 msleep(500);
1da177e4
LT		 1941 } while (1);
1942
7c3df132
SK		 1943 ql_dbg(ql_dbg_taskm, vha, 0x803a,
1944 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
1945 state[1], state[2], state[3], state[4], jiffies);
1da177e4 1946
cfb0919c 1947 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
7c3df132
SK		 1948 ql_log(ql_log_warn, vha, 0x803b,
1949 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 1950 }
1951
1952 return (rval);
1953}
1954
1955/*
1956* qla2x00_configure_hba
1957* Setup adapter context.
1958*
1959* Input:
1960* ha = adapter state pointer.
1961*
1962* Returns:
1963* 0 = success
1964*
1965* Context:
1966* Kernel context.
1967*/
1968static int
e315cd28 1969qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 1970{
1971 int rval;
1972 uint16_t loop_id;
1973 uint16_t topo;
2c3dfe3f 1974 uint16_t sw_cap;
1da177e4
LT		 1975 uint8_t al_pa;
1976 uint8_t area;
1977 uint8_t domain;
1978 char connect_type[22];
e315cd28 1979 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1980
1981 /* Get host addresses. */
e315cd28 1982 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 1983 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 1984 if (rval != QLA_SUCCESS) {
e315cd28 1985 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
6246b8a1 1986 IS_CNA_CAPABLE(ha) ||
33135aa2 1987 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 1988 ql_dbg(ql_dbg_disc, vha, 0x2008,
1989 "Loop is in a transition state.\n");
33135aa2 1990 } else {
7c3df132
SK		 1991 ql_log(ql_log_warn, vha, 0x2009,
1992 "Unable to get host loop ID.\n");
e315cd28 1993 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 1994 }
1da177e4
LT		 1995 return (rval);
1996 }
1997
1998 if (topo == 4) {
7c3df132
SK		 1999 ql_log(ql_log_info, vha, 0x200a,
2000 "Cannot get topology - retrying.\n");
1da177e4
LT		 2001 return (QLA_FUNCTION_FAILED);
2002 }
2003
e315cd28 2004 vha->loop_id = loop_id;
1da177e4
LT		 2005
2006 /* initialize */
2007 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2008 ha->operating_mode = LOOP;
2c3dfe3f 2009 ha->switch_cap = 0;
1da177e4
LT		 2010
2011 switch (topo) {
2012 case 0:
7c3df132 2013 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 2014 ha->current_topology = ISP_CFG_NL;
2015 strcpy(connect_type, "(Loop)");
2016 break;
2017
2018 case 1:
7c3df132 2019 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 2020 ha->switch_cap = sw_cap;
1da177e4
LT		 2021 ha->current_topology = ISP_CFG_FL;
2022 strcpy(connect_type, "(FL_Port)");
2023 break;
2024
2025 case 2:
7c3df132 2026 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 2027 ha->operating_mode = P2P;
2028 ha->current_topology = ISP_CFG_N;
2029 strcpy(connect_type, "(N_Port-to-N_Port)");
2030 break;
2031
2032 case 3:
7c3df132 2033 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 2034 ha->switch_cap = sw_cap;
1da177e4
LT		 2035 ha->operating_mode = P2P;
2036 ha->current_topology = ISP_CFG_F;
2037 strcpy(connect_type, "(F_Port)");
2038 break;
2039
2040 default:
7c3df132
SK		 2041 ql_dbg(ql_dbg_disc, vha, 0x200f,
2042 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 2043 ha->current_topology = ISP_CFG_NL;
2044 strcpy(connect_type, "(Loop)");
2045 break;
2046 }
2047
2048 /* Save Host port and loop ID. */
2049 /* byte order - Big Endian */
e315cd28
AC		 2050 vha->d_id.b.domain = domain;
2051 vha->d_id.b.area = area;
2052 vha->d_id.b.al_pa = al_pa;
1da177e4 2053
e315cd28 2054 if (!vha->flags.init_done)
7c3df132
SK		 2055 ql_log(ql_log_info, vha, 0x2010,
2056 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 2057 connect_type, vha->loop_id);
1da177e4
LT		 2058
2059 if (rval) {
7c3df132
SK		 2060 ql_log(ql_log_warn, vha, 0x2011,
2061 "%s FAILED\n", __func__);
1da177e4 2062 } else {
7c3df132
SK		 2063 ql_dbg(ql_dbg_disc, vha, 0x2012,
2064 "%s success\n", __func__);
1da177e4
LT		 2065 }
2066
2067 return(rval);
2068}
2069
a9083016 2070inline void
e315cd28
AC		 2071qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2072 char *def)
9bb9fcf2
AV		 2073{
2074 char *st, *en;
2075 uint16_t index;
e315cd28 2076 struct qla_hw_data *ha = vha->hw;
ab671149 2077 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
6246b8a1 2078 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
9bb9fcf2
AV		 2079
2080 if (memcmp(model, BINZERO, len) != 0) {
2081 strncpy(ha->model_number, model, len);
2082 st = en = ha->model_number;
2083 en += len - 1;
2084 while (en > st) {
2085 if (*en != 0x20 && *en != 0x00)
2086 break;
2087 *en-- = '\0';
2088 }
2089
2090 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2091 if (use_tbl &&
2092 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 2093 index < QLA_MODEL_NAMES)
1ee27146
JC		 2094 strncpy(ha->model_desc,
2095 qla2x00_model_name[index * 2 + 1],
2096 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2097 } else {
2098 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2099 if (use_tbl &&
2100 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 2101 index < QLA_MODEL_NAMES) {
2102 strcpy(ha->model_number,
2103 qla2x00_model_name[index * 2]);
1ee27146
JC		 2104 strncpy(ha->model_desc,
2105 qla2x00_model_name[index * 2 + 1],
2106 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2107 } else {
2108 strcpy(ha->model_number, def);
2109 }
2110 }
1ee27146 2111 if (IS_FWI2_CAPABLE(ha))
e315cd28 2112 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 2113 sizeof(ha->model_desc));
9bb9fcf2
AV		 2114}
2115
4e08df3f
DM		 2116/* On sparc systems, obtain port and node WWN from firmware
2117 * properties.
2118 */
e315cd28 2119static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 2120{
2121#ifdef CONFIG_SPARC
e315cd28 2122 struct qla_hw_data *ha = vha->hw;
4e08df3f 2123 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 2124 struct device_node *dp = pci_device_to_OF_node(pdev);
2125 const u8 *val;
4e08df3f
DM		 2126 int len;
2127
2128 val = of_get_property(dp, "port-wwn", &len);
2129 if (val && len >= WWN_SIZE)
2130 memcpy(nv->port_name, val, WWN_SIZE);
2131
2132 val = of_get_property(dp, "node-wwn", &len);
2133 if (val && len >= WWN_SIZE)
2134 memcpy(nv->node_name, val, WWN_SIZE);
2135#endif
2136}
2137
1da177e4
LT		 2138/*
2139* NVRAM configuration for ISP 2xxx
2140*
2141* Input:
2142* ha = adapter block pointer.
2143*
2144* Output:
2145* initialization control block in response_ring
2146* host adapters parameters in host adapter block
2147*
2148* Returns:
2149* 0 = success.
2150*/
abbd8870 2151int
e315cd28 2152qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 2153{
4e08df3f 2154 int rval;
0107109e
AV		 2155 uint8_t chksum = 0;
2156 uint16_t cnt;
2157 uint8_t *dptr1, *dptr2;
e315cd28 2158 struct qla_hw_data *ha = vha->hw;
0107109e 2159 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 2160 nvram_t *nv = ha->nvram;
2161 uint8_t *ptr = ha->nvram;
3d71644c 2162 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2163
4e08df3f
DM		 2164 rval = QLA_SUCCESS;
2165
1da177e4 2166 /* Determine NVRAM starting address. */
0107109e 2167 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 2168 ha->nvram_base = 0;
2169 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2170 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2171 ha->nvram_base = 0x80;
2172
2173 /* Get NVRAM data and calculate checksum. */
e315cd28 2174 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 2175 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2176 chksum += *ptr++;
1da177e4 2177
7c3df132
SK		 2178 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2179 "Contents of NVRAM.\n");
2180 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2181 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 2182
2183 /* Bad NVRAM data, set defaults parameters. */
2184 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2185 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2186 /* Reset NVRAM data. */
7c3df132 2187 ql_log(ql_log_warn, vha, 0x0064,
9e336520 2188 "Inconsistent NVRAM "
7c3df132
SK		 2189 "detected: checksum=0x%x id=%c version=0x%x.\n",
2190 chksum, nv->id[0], nv->nvram_version);
2191 ql_log(ql_log_warn, vha, 0x0065,
2192 "Falling back to "
2193 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 2194
2195 /*
2196 * Set default initialization control block.
2197 */
2198 memset(nv, 0, ha->nvram_size);
2199 nv->parameter_block_version = ICB_VERSION;
2200
2201 if (IS_QLA23XX(ha)) {
2202 nv->firmware_options[0] = BIT_2 | BIT_1;
2203 nv->firmware_options[1] = BIT_7 | BIT_5;
2204 nv->add_firmware_options[0] = BIT_5;
2205 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2206 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2207 nv->special_options[1] = BIT_7;
2208 } else if (IS_QLA2200(ha)) {
2209 nv->firmware_options[0] = BIT_2 | BIT_1;
2210 nv->firmware_options[1] = BIT_7 | BIT_5;
2211 nv->add_firmware_options[0] = BIT_5;
2212 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2213 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2214 } else if (IS_QLA2100(ha)) {
2215 nv->firmware_options[0] = BIT_3 | BIT_1;
2216 nv->firmware_options[1] = BIT_5;
2217 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2218 }
2219
2220 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2221 nv->execution_throttle = __constant_cpu_to_le16(16);
2222 nv->retry_count = 8;
2223 nv->retry_delay = 1;
2224
2225 nv->port_name[0] = 33;
2226 nv->port_name[3] = 224;
2227 nv->port_name[4] = 139;
2228
e315cd28 2229 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 2230
2231 nv->login_timeout = 4;
2232
2233 /*
2234 * Set default host adapter parameters
2235 */
2236 nv->host_p[1] = BIT_2;
2237 nv->reset_delay = 5;
2238 nv->port_down_retry_count = 8;
2239 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2240 nv->link_down_timeout = 60;
2241
2242 rval = 1;
1da177e4
LT		 2243 }
2244
2245#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2246 /*
2247 * The SN2 does not provide BIOS emulation which means you can't change
2248 * potentially bogus BIOS settings. Force the use of default settings
2249 * for link rate and frame size. Hope that the rest of the settings
2250 * are valid.
2251 */
2252 if (ia64_platform_is("sn2")) {
2253 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2254 if (IS_QLA23XX(ha))
2255 nv->special_options[1] = BIT_7;
2256 }
2257#endif
2258
2259 /* Reset Initialization control block */
0107109e 2260 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 2261
2262 /*
2263 * Setup driver NVRAM options.
2264 */
2265 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2266 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2267 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2268 nv->firmware_options[1] &= ~BIT_4;
2269
2270 if (IS_QLA23XX(ha)) {
2271 nv->firmware_options[0] |= BIT_2;
2272 nv->firmware_options[0] &= ~BIT_3;
5ff1d584 2273 nv->firmware_options[0] &= ~BIT_6;
0107109e 2274 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 2275
2276 if (IS_QLA2300(ha)) {
2277 if (ha->fb_rev == FPM_2310) {
2278 strcpy(ha->model_number, "QLA2310");
2279 } else {
2280 strcpy(ha->model_number, "QLA2300");
2281 }
2282 } else {
e315cd28 2283 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 2284 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 2285 }
2286 } else if (IS_QLA2200(ha)) {
2287 nv->firmware_options[0] |= BIT_2;
2288 /*
2289 * 'Point-to-point preferred, else loop' is not a safe
2290 * connection mode setting.
2291 */
2292 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2293 (BIT_5 | BIT_4)) {
2294 /* Force 'loop preferred, else point-to-point'. */
2295 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2296 nv->add_firmware_options[0] |= BIT_5;
2297 }
2298 strcpy(ha->model_number, "QLA22xx");
2299 } else /*if (IS_QLA2100(ha))*/ {
2300 strcpy(ha->model_number, "QLA2100");
2301 }
2302
2303 /*
2304 * Copy over NVRAM RISC parameter block to initialization control block.
2305 */
2306 dptr1 = (uint8_t *)icb;
2307 dptr2 = (uint8_t *)&nv->parameter_block_version;
2308 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2309 while (cnt--)
2310 *dptr1++ = *dptr2++;
2311
2312 /* Copy 2nd half. */
2313 dptr1 = (uint8_t *)icb->add_firmware_options;
2314 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2315 while (cnt--)
2316 *dptr1++ = *dptr2++;
2317
5341e868
AV		 2318 /* Use alternate WWN? */
2319 if (nv->host_p[1] & BIT_7) {
2320 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2321 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2322 }
2323
1da177e4
LT		 2324 /* Prepare nodename */
2325 if ((icb->firmware_options[1] & BIT_6) == 0) {
2326 /*
2327 * Firmware will apply the following mask if the nodename was
2328 * not provided.
2329 */
2330 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2331 icb->node_name[0] &= 0xF0;
2332 }
2333
2334 /*
2335 * Set host adapter parameters.
2336 */
3ce8866c
SK		 2337
2338 /*
2339 * BIT_7 in the host-parameters section allows for modification to
2340 * internal driver logging.
2341 */
0181944f 2342 if (nv->host_p[0] & BIT_7)
cfb0919c 2343 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
1da177e4
LT		 2344 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2345 /* Always load RISC code on non ISP2[12]00 chips. */
2346 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2347 ha->flags.disable_risc_code_load = 0;
2348 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2349 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2350 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 2351 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 2352 ha->flags.disable_serdes = 0;
1da177e4
LT		 2353
2354 ha->operating_mode =
2355 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2356
2357 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2358 sizeof(ha->fw_seriallink_options));
2359
2360 /* save HBA serial number */
2361 ha->serial0 = icb->port_name[5];
2362 ha->serial1 = icb->port_name[6];
2363 ha->serial2 = icb->port_name[7];
e315cd28
AC		 2364 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2365 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4
LT		 2366
2367 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2368
2369 ha->retry_count = nv->retry_count;
2370
2371 /* Set minimum login_timeout to 4 seconds. */
5b91490e 2372 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 2373 nv->login_timeout = ql2xlogintimeout;
2374 if (nv->login_timeout < 4)
2375 nv->login_timeout = 4;
2376 ha->login_timeout = nv->login_timeout;
2377 icb->login_timeout = nv->login_timeout;
2378
00a537b8
AV		 2379 /* Set minimum RATOV to 100 tenths of a second. */
2380 ha->r_a_tov = 100;
1da177e4 2381
1da177e4
LT		 2382 ha->loop_reset_delay = nv->reset_delay;
2383
1da177e4
LT		 2384 /* Link Down Timeout = 0:
2385 *
2386 * When Port Down timer expires we will start returning
2387 * I/O's to OS with "DID_NO_CONNECT".
2388 *
2389 * Link Down Timeout != 0:
2390 *
2391 * The driver waits for the link to come up after link down
2392 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 2393 */
1da177e4
LT		 2394 if (nv->link_down_timeout == 0) {
2395 ha->loop_down_abort_time =
354d6b21 2396 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 2397 } else {
2398 ha->link_down_timeout = nv->link_down_timeout;
2399 ha->loop_down_abort_time =
2400 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 2401 }
1da177e4 2402
1da177e4
LT		 2403 /*
2404 * Need enough time to try and get the port back.
2405 */
2406 ha->port_down_retry_count = nv->port_down_retry_count;
2407 if (qlport_down_retry)
2408 ha->port_down_retry_count = qlport_down_retry;
2409 /* Set login_retry_count */
2410 ha->login_retry_count = nv->retry_count;
2411 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2412 ha->port_down_retry_count > 3)
2413 ha->login_retry_count = ha->port_down_retry_count;
2414 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2415 ha->login_retry_count = ha->port_down_retry_count;
2416 if (ql2xloginretrycount)
2417 ha->login_retry_count = ql2xloginretrycount;
2418
1da177e4
LT		 2419 icb->lun_enables = __constant_cpu_to_le16(0);
2420 icb->command_resource_count = 0;
2421 icb->immediate_notify_resource_count = 0;
2422 icb->timeout = __constant_cpu_to_le16(0);
2423
2424 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2425 /* Enable RIO */
2426 icb->firmware_options[0] &= ~BIT_3;
2427 icb->add_firmware_options[0] &=
2428 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2429 icb->add_firmware_options[0] |= BIT_2;
2430 icb->response_accumulation_timer = 3;
2431 icb->interrupt_delay_timer = 5;
2432
e315cd28 2433 vha->flags.process_response_queue = 1;
1da177e4 2434 } else {
4fdfefe5 2435 /* Enable ZIO. */
e315cd28 2436 if (!vha->flags.init_done) {
4fdfefe5
AV		 2437 ha->zio_mode = icb->add_firmware_options[0] &
2438 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2439 ha->zio_timer = icb->interrupt_delay_timer ?
2440 icb->interrupt_delay_timer: 2;
2441 }
1da177e4
LT		 2442 icb->add_firmware_options[0] &=
2443 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 2444 vha->flags.process_response_queue = 0;
4fdfefe5 2445 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 2446 ha->zio_mode = QLA_ZIO_MODE_6;
2447
7c3df132 2448 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 2449 "ZIO mode %d enabled; timer delay (%d us).\n",
2450 ha->zio_mode, ha->zio_timer * 100);
1da177e4 2451
4fdfefe5
AV		 2452 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2453 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 2454 vha->flags.process_response_queue = 1;
1da177e4
LT		 2455 }
2456 }
2457
4e08df3f 2458 if (rval) {
7c3df132
SK		 2459 ql_log(ql_log_warn, vha, 0x0069,
2460 "NVRAM configuration failed.\n");
4e08df3f
DM		 2461 }
2462 return (rval);
1da177e4
LT		 2463}
2464
19a7b4ae
JSEC		 2465static void
2466qla2x00_rport_del(void *data)
2467{
2468 fc_port_t *fcport = data;
d97994dc 2469 struct fc_rport *rport;
044d78e1 2470 unsigned long flags;
d97994dc 2471
044d78e1 2472 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 2473 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 2474 fcport->drport = NULL;
044d78e1 2475 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 2476 if (rport)
2477 fc_remote_port_delete(rport);
19a7b4ae
JSEC		 2478}
2479
1da177e4
LT		 2480/**
2481 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2482 * @ha: HA context
2483 * @flags: allocation flags
2484 *
2485 * Returns a pointer to the allocated fcport, or NULL, if none available.
2486 */
9a069e19 2487fc_port_t *
e315cd28 2488qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 2489{
2490 fc_port_t *fcport;
2491
bbfbbbc1
MK		 2492 fcport = kzalloc(sizeof(fc_port_t), flags);
2493 if (!fcport)
2494 return NULL;
1da177e4
LT		 2495
2496 /* Setup fcport template structure. */
e315cd28 2497 fcport->vha = vha;
1da177e4
LT		 2498 fcport->port_type = FCT_UNKNOWN;
2499 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 2500 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 2501 fcport->supported_classes = FC_COS_UNSPECIFIED;
c0822b63 2502 fcport->scan_state = QLA_FCPORT_SCAN_NONE;
1da177e4 2503
bbfbbbc1 2504 return fcport;
1da177e4
LT		 2505}
2506
2507/*
2508 * qla2x00_configure_loop
2509 * Updates Fibre Channel Device Database with what is actually on loop.
2510 *
2511 * Input:
2512 * ha = adapter block pointer.
2513 *
2514 * Returns:
2515 * 0 = success.
2516 * 1 = error.
2517 * 2 = database was full and device was not configured.
2518 */
2519static int
e315cd28 2520qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2521{
2522 int rval;
2523 unsigned long flags, save_flags;
e315cd28 2524 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2525 rval = QLA_SUCCESS;
2526
2527 /* Get Initiator ID */
e315cd28
AC		 2528 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2529 rval = qla2x00_configure_hba(vha);
1da177e4 2530 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2531 ql_dbg(ql_dbg_disc, vha, 0x2013,
2532 "Unable to configure HBA.\n");
1da177e4
LT		 2533 return (rval);
2534 }
2535 }
2536
e315cd28 2537 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 2538 ql_dbg(ql_dbg_disc, vha, 0x2014,
2539 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 2540
2541 /*
2542 * If we have both an RSCN and PORT UPDATE pending then handle them
2543 * both at the same time.
2544 */
e315cd28
AC		 2545 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2546 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 2547
3064ff39
MH		 2548 qla2x00_get_data_rate(vha);
2549
1da177e4
LT		 2550 /* Determine what we need to do */
2551 if (ha->current_topology == ISP_CFG_FL &&
2552 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2553
1da177e4
LT		 2554 set_bit(RSCN_UPDATE, &flags);
2555
2556 } else if (ha->current_topology == ISP_CFG_F &&
2557 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2558
1da177e4
LT		 2559 set_bit(RSCN_UPDATE, &flags);
2560 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 2561
2562 } else if (ha->current_topology == ISP_CFG_N) {
2563 clear_bit(RSCN_UPDATE, &flags);
1da177e4 2564
e315cd28 2565 } else if (!vha->flags.online ||
1da177e4
LT		 2566 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2567
1da177e4
LT		 2568 set_bit(RSCN_UPDATE, &flags);
2569 set_bit(LOCAL_LOOP_UPDATE, &flags);
2570 }
2571
2572 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 2573 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2574 ql_dbg(ql_dbg_disc, vha, 0x2015,
2575 "Loop resync needed, failing.\n");
1da177e4 2576 rval = QLA_FUNCTION_FAILED;
642ef983 2577 } else
e315cd28 2578 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 2579 }
2580
2581 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132
SK		 2582 if (LOOP_TRANSITION(vha)) {
2583 ql_dbg(ql_dbg_disc, vha, 0x201e,
2584 "Needs RSCN update and loop transition.\n");
1da177e4 2585 rval = QLA_FUNCTION_FAILED;
7c3df132 2586 }
e315cd28
AC		 2587 else
2588 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 2589 }
2590
2591 if (rval == QLA_SUCCESS) {
e315cd28
AC		 2592 if (atomic_read(&vha->loop_down_timer) ||
2593 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 2594 rval = QLA_FUNCTION_FAILED;
2595 } else {
e315cd28 2596 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 2597 ql_dbg(ql_dbg_disc, vha, 0x2069,
2598 "LOOP READY.\n");
1da177e4
LT		 2599 }
2600 }
2601
2602 if (rval) {
7c3df132
SK		 2603 ql_dbg(ql_dbg_disc, vha, 0x206a,
2604 "%s *** FAILED ***.\n", __func__);
1da177e4 2605 } else {
7c3df132
SK		 2606 ql_dbg(ql_dbg_disc, vha, 0x206b,
2607 "%s: exiting normally.\n", __func__);
1da177e4
LT		 2608 }
2609
cc3ef7bc 2610 /* Restore state if a resync event occurred during processing */
e315cd28 2611 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 2612 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 2613 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 2614 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 2615 set_bit(RSCN_UPDATE, &vha->dpc_flags);
f4658b6c 2616 }
1da177e4
LT		 2617 }
2618
2619 return (rval);
2620}
2621
2622
2623
2624/*
2625 * qla2x00_configure_local_loop
2626 * Updates Fibre Channel Device Database with local loop devices.
2627 *
2628 * Input:
2629 * ha = adapter block pointer.
2630 *
2631 * Returns:
2632 * 0 = success.
2633 */
2634static int
e315cd28 2635qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2636{
2637 int rval, rval2;
2638 int found_devs;
2639 int found;
2640 fc_port_t *fcport, *new_fcport;
2641
2642 uint16_t index;
2643 uint16_t entries;
2644 char *id_iter;
2645 uint16_t loop_id;
2646 uint8_t domain, area, al_pa;
e315cd28 2647 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2648
2649 found_devs = 0;
2650 new_fcport = NULL;
642ef983 2651 entries = MAX_FIBRE_DEVICES_LOOP;
1da177e4 2652
7c3df132
SK		 2653 ql_dbg(ql_dbg_disc, vha, 0x2016,
2654 "Getting FCAL position map.\n");
2655 if (ql2xextended_error_logging & ql_dbg_disc)
2656 qla2x00_get_fcal_position_map(vha, NULL);
1da177e4
LT		 2657
2658 /* Get list of logged in devices. */
642ef983 2659 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
e315cd28 2660 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 2661 &entries);
2662 if (rval != QLA_SUCCESS)
2663 goto cleanup_allocation;
2664
7c3df132
SK		 2665 ql_dbg(ql_dbg_disc, vha, 0x2017,
2666 "Entries in ID list (%d).\n", entries);
2667 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2668 (uint8_t *)ha->gid_list,
2669 entries * sizeof(struct gid_list_info));
1da177e4
LT		 2670
2671 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 2672 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2673 if (new_fcport == NULL) {
7c3df132
SK		 2674 ql_log(ql_log_warn, vha, 0x2018,
2675 "Memory allocation failed for fcport.\n");
1da177e4
LT		 2676 rval = QLA_MEMORY_ALLOC_FAILED;
2677 goto cleanup_allocation;
2678 }
2679 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2680
2681 /*
2682 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2683 */
e315cd28 2684 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2685 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2686 fcport->port_type != FCT_BROADCAST &&
2687 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2688
7c3df132
SK		 2689 ql_dbg(ql_dbg_disc, vha, 0x2019,
2690 "Marking port lost loop_id=0x%04x.\n",
2691 fcport->loop_id);
1da177e4 2692
ec426e10 2693 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1da177e4
LT		 2694 }
2695 }
2696
2697 /* Add devices to port list. */
2698 id_iter = (char *)ha->gid_list;
2699 for (index = 0; index < entries; index++) {
2700 domain = ((struct gid_list_info *)id_iter)->domain;
2701 area = ((struct gid_list_info *)id_iter)->area;
2702 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 2703 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 2704 loop_id = (uint16_t)
2705 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 2706 else
1da177e4
LT		 2707 loop_id = le16_to_cpu(
2708 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 2709 id_iter += ha->gid_list_info_size;
1da177e4
LT		 2710
2711 /* Bypass reserved domain fields. */
2712 if ((domain & 0xf0) == 0xf0)
2713 continue;
2714
2715 /* Bypass if not same domain and area of adapter. */
f7d289f6 2716 if (area && domain &&
e315cd28 2717 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
1da177e4
LT		 2718 continue;
2719
2720 /* Bypass invalid local loop ID. */
2721 if (loop_id > LAST_LOCAL_LOOP_ID)
2722 continue;
2723
2724 /* Fill in member data. */
2725 new_fcport->d_id.b.domain = domain;
2726 new_fcport->d_id.b.area = area;
2727 new_fcport->d_id.b.al_pa = al_pa;
2728 new_fcport->loop_id = loop_id;
e315cd28 2729 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 2730 if (rval2 != QLA_SUCCESS) {
7c3df132
SK		 2731 ql_dbg(ql_dbg_disc, vha, 0x201a,
2732 "Failed to retrieve fcport information "
2733 "-- get_port_database=%x, loop_id=0x%04x.\n",
2734 rval2, new_fcport->loop_id);
2735 ql_dbg(ql_dbg_disc, vha, 0x201b,
2736 "Scheduling resync.\n");
e315cd28 2737 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2738 continue;
2739 }
2740
2741 /* Check for matching device in port list. */
2742 found = 0;
2743 fcport = NULL;
e315cd28 2744 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2745 if (memcmp(new_fcport->port_name, fcport->port_name,
2746 WWN_SIZE))
2747 continue;
2748
ddb9b126 2749 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 2750 fcport->loop_id = new_fcport->loop_id;
2751 fcport->port_type = new_fcport->port_type;
2752 fcport->d_id.b24 = new_fcport->d_id.b24;
2753 memcpy(fcport->node_name, new_fcport->node_name,
2754 WWN_SIZE);
2755
2756 found++;
2757 break;
2758 }
2759
2760 if (!found) {
2761 /* New device, add to fcports list. */
e315cd28 2762 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 2763
2764 /* Allocate a new replacement fcport. */
2765 fcport = new_fcport;
e315cd28 2766 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2767 if (new_fcport == NULL) {
7c3df132
SK		 2768 ql_log(ql_log_warn, vha, 0x201c,
2769 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 2770 rval = QLA_MEMORY_ALLOC_FAILED;
2771 goto cleanup_allocation;
2772 }
2773 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2774 }
2775
d8b45213 2776 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 2777 fcport->fp_speed = ha->link_data_rate;
d8b45213 2778
e315cd28 2779 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 2780
2781 found_devs++;
2782 }
2783
2784cleanup_allocation:
c9475cb0 2785 kfree(new_fcport);
1da177e4
LT		 2786
2787 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2788 ql_dbg(ql_dbg_disc, vha, 0x201d,
2789 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 2790 }
2791
1da177e4
LT		 2792 return (rval);
2793}
2794
d8b45213 2795static void
e315cd28 2796qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213
AV		 2797{
2798#define LS_UNKNOWN 2
9f8fddee
AV		 2799 static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
2800 char *link_speed;
d8b45213 2801 int rval;
1bb39548 2802 uint16_t mb[4];
e315cd28 2803 struct qla_hw_data *ha = vha->hw;
d8b45213 2804
c76f2c01 2805 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 2806 return;
2807
c9afb9a2
GM		 2808 if (atomic_read(&fcport->state) != FCS_ONLINE)
2809 return;
2810
39bd9622
AV		 2811 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
2812 fcport->fp_speed > ha->link_data_rate)
d8b45213
AV		 2813 return;
2814
e315cd28 2815 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 2816 mb);
d8b45213 2817 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2818 ql_dbg(ql_dbg_disc, vha, 0x2004,
2819 "Unable to adjust iIDMA "
2820 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x "
2821 "%04x.\n", fcport->port_name[0], fcport->port_name[1],
d8b45213
AV		 2822 fcport->port_name[2], fcport->port_name[3],
2823 fcport->port_name[4], fcport->port_name[5],
2824 fcport->port_name[6], fcport->port_name[7], rval,
7c3df132 2825 fcport->fp_speed, mb[0], mb[1]);
d8b45213 2826 } else {
9f8fddee
AV		 2827 link_speed = link_speeds[LS_UNKNOWN];
2828 if (fcport->fp_speed < 5)
2829 link_speed = link_speeds[fcport->fp_speed];
2830 else if (fcport->fp_speed == 0x13)
2831 link_speed = link_speeds[5];
7c3df132
SK		 2832 ql_dbg(ql_dbg_disc, vha, 0x2005,
2833 "iIDMA adjusted to %s GB/s "
2834 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed,
2835 fcport->port_name[0], fcport->port_name[1],
2836 fcport->port_name[2], fcport->port_name[3],
2837 fcport->port_name[4], fcport->port_name[5],
2838 fcport->port_name[6], fcport->port_name[7]);
d8b45213
AV		 2839 }
2840}
2841
23be331d 2842static void
e315cd28 2843qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118 2844{
2845 struct fc_rport_identifiers rport_ids;
bdf79621 2846 struct fc_rport *rport;
044d78e1 2847 unsigned long flags;
8482e118 2848
ac280b67 2849 qla2x00_rport_del(fcport);
8482e118 2850
f8b02a85
AV		 2851 rport_ids.node_name = wwn_to_u64(fcport->node_name);
2852 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118 2853 rport_ids.port_id = fcport->d_id.b.domain << 16 |
2854 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 2855 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 2856 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 2857 if (!rport) {
7c3df132
SK		 2858 ql_log(ql_log_warn, vha, 0x2006,
2859 "Unable to allocate fc remote port.\n");
77d74143
AV		 2860 return;
2861 }
044d78e1 2862 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 2863 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 2864 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 2865
ad3e0eda 2866 rport->supported_classes = fcport->supported_classes;
77d74143 2867
8482e118 2868 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
2869 if (fcport->port_type == FCT_INITIATOR)
2870 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
2871 if (fcport->port_type == FCT_TARGET)
2872 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
77d74143 2873 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 2874}
2875
23be331d
AB		 2876/*
2877 * qla2x00_update_fcport
2878 * Updates device on list.
2879 *
2880 * Input:
2881 * ha = adapter block pointer.
2882 * fcport = port structure pointer.
2883 *
2884 * Return:
2885 * 0 - Success
2886 * BIT_0 - error
2887 *
2888 * Context:
2889 * Kernel context.
2890 */
2891void
e315cd28 2892qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 2893{
e315cd28 2894 fcport->vha = vha;
23be331d 2895 fcport->login_retry = 0;
5ff1d584 2896 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
23be331d 2897
e315cd28 2898 qla2x00_iidma_fcport(vha, fcport);
21090cbe 2899 qla24xx_update_fcport_fcp_prio(vha, fcport);
e315cd28 2900 qla2x00_reg_remote_port(vha, fcport);
ec426e10 2901 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
23be331d
AB		 2902}
2903
1da177e4
LT		 2904/*
2905 * qla2x00_configure_fabric
2906 * Setup SNS devices with loop ID's.
2907 *
2908 * Input:
2909 * ha = adapter block pointer.
2910 *
2911 * Returns:
2912 * 0 = success.
2913 * BIT_0 = error
2914 */
2915static int
e315cd28 2916qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4 2917{
b3b02e6e 2918 int rval;
1da177e4
LT		 2919 fc_port_t *fcport, *fcptemp;
2920 uint16_t next_loopid;
2921 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 2922 uint16_t loop_id;
1da177e4 2923 LIST_HEAD(new_fcports);
e315cd28
AC		 2924 struct qla_hw_data *ha = vha->hw;
2925 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 2926
2927 /* If FL port exists, then SNS is present */
e428924c 2928 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 2929 loop_id = NPH_F_PORT;
2930 else
2931 loop_id = SNS_FL_PORT;
e315cd28 2932 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 2933 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2934 ql_dbg(ql_dbg_disc, vha, 0x201f,
2935 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 2936
e315cd28 2937 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 2938 return (QLA_SUCCESS);
2939 }
e315cd28 2940 vha->device_flags |= SWITCH_FOUND;
1da177e4 2941
1da177e4 2942 do {
cca5335c
AV		 2943 /* FDMI support. */
2944 if (ql2xfdmienable &&
e315cd28
AC		 2945 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
2946 qla2x00_fdmi_register(vha);
cca5335c 2947
1da177e4 2948 /* Ensure we are logged into the SNS. */
e428924c 2949 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 2950 loop_id = NPH_SNS;
2951 else
2952 loop_id = SIMPLE_NAME_SERVER;
0b91d116
CD		 2953 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
2954 0xfc, mb, BIT_1|BIT_0);
2955 if (rval != QLA_SUCCESS) {
2956 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2957 return rval;
2958 }
1da177e4 2959 if (mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 2960 ql_dbg(ql_dbg_disc, vha, 0x2042,
2961 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
2962 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
2963 mb[2], mb[6], mb[7]);
1da177e4
LT		 2964 return (QLA_SUCCESS);
2965 }
2966
e315cd28
AC		 2967 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
2968 if (qla2x00_rft_id(vha)) {
1da177e4 2969 /* EMPTY */
7c3df132
SK		 2970 ql_dbg(ql_dbg_disc, vha, 0x2045,
2971 "Register FC-4 TYPE failed.\n");
1da177e4 2972 }
e315cd28 2973 if (qla2x00_rff_id(vha)) {
1da177e4 2974 /* EMPTY */
7c3df132
SK		 2975 ql_dbg(ql_dbg_disc, vha, 0x2049,
2976 "Register FC-4 Features failed.\n");
1da177e4 2977 }
e315cd28 2978 if (qla2x00_rnn_id(vha)) {
1da177e4 2979 /* EMPTY */
7c3df132
SK		 2980 ql_dbg(ql_dbg_disc, vha, 0x204f,
2981 "Register Node Name failed.\n");
e315cd28 2982 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 2983 /* EMPTY */
7c3df132
SK		 2984 ql_dbg(ql_dbg_disc, vha, 0x2053,
2985 "Register Symobilic Node Name failed.\n");
1da177e4
LT		 2986 }
2987 }
2988
e315cd28 2989 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
1da177e4
LT		 2990 if (rval != QLA_SUCCESS)
2991 break;
2992
2993 /*
2994 * Logout all previous fabric devices marked lost, except
f08b7251 2995 * FCP2 devices.
1da177e4 2996 */
e315cd28
AC		 2997 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2998 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 2999 break;
3000
3001 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3002 continue;
3003
c0822b63 3004 if (fcport->scan_state != QLA_FCPORT_SCAN_FOUND &&
b3b02e6e 3005 atomic_read(&fcport->state) == FCS_ONLINE) {
e315cd28 3006 qla2x00_mark_device_lost(vha, fcport,
d97994dc 3007 ql2xplogiabsentdevice, 0);
1da177e4 3008 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3009 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
1da177e4
LT		 3010 fcport->port_type != FCT_INITIATOR &&
3011 fcport->port_type != FCT_BROADCAST) {
e315cd28 3012 ha->isp_ops->fabric_logout(vha,
1c7c6357
AV		 3013 fcport->loop_id,
3014 fcport->d_id.b.domain,
3015 fcport->d_id.b.area,
3016 fcport->d_id.b.al_pa);
1da177e4
LT		 3017 fcport->loop_id = FC_NO_LOOP_ID;
3018 }
c0822b63 3019 continue;
1da177e4 3020 }
c0822b63 3021 fcport->scan_state = QLA_FCPORT_SCAN_NONE;
1da177e4
LT		 3022 }
3023
3024 /* Starting free loop ID. */
e315cd28 3025 next_loopid = ha->min_external_loopid;
1da177e4
LT		 3026
3027 /*
3028 * Scan through our port list and login entries that need to be
3029 * logged in.
3030 */
e315cd28
AC		 3031 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3032 if (atomic_read(&vha->loop_down_timer) ||
3033 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3034 break;
3035
3036 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3037 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3038 continue;
3039
3040 if (fcport->loop_id == FC_NO_LOOP_ID) {
3041 fcport->loop_id = next_loopid;
d4486fd6 3042 rval = qla2x00_find_new_loop_id(
e315cd28 3043 base_vha, fcport);
1da177e4
LT		 3044 if (rval != QLA_SUCCESS) {
3045 /* Ran out of IDs to use */
3046 break;
3047 }
3048 }
1da177e4 3049 /* Login and update database */
e315cd28 3050 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
1da177e4
LT		 3051 }
3052
3053 /* Exit if out of loop IDs. */
3054 if (rval != QLA_SUCCESS) {
3055 break;
3056 }
3057
3058 /*
3059 * Login and add the new devices to our port list.
3060 */
3061 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
e315cd28
AC		 3062 if (atomic_read(&vha->loop_down_timer) ||
3063 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3064 break;
3065
3066 /* Find a new loop ID to use. */
3067 fcport->loop_id = next_loopid;
e315cd28 3068 rval = qla2x00_find_new_loop_id(base_vha, fcport);
1da177e4
LT		 3069 if (rval != QLA_SUCCESS) {
3070 /* Ran out of IDs to use */
3071 break;
3072 }
3073
bdf79621 3074 /* Login and update database */
e315cd28
AC		 3075 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3076
e315cd28 3077 list_move_tail(&fcport->list, &vha->vp_fcports);
1da177e4
LT		 3078 }
3079 } while (0);
3080
3081 /* Free all new device structures not processed. */
3082 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3083 list_del(&fcport->list);
3084 kfree(fcport);
3085 }
3086
3087 if (rval) {
7c3df132
SK		 3088 ql_dbg(ql_dbg_disc, vha, 0x2068,
3089 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 3090 }
3091
3092 return (rval);
3093}
3094
1da177e4
LT		 3095/*
3096 * qla2x00_find_all_fabric_devs
3097 *
3098 * Input:
3099 * ha = adapter block pointer.
3100 * dev = database device entry pointer.
3101 *
3102 * Returns:
3103 * 0 = success.
3104 *
3105 * Context:
3106 * Kernel context.
3107 */
3108static int
e315cd28
AC		 3109qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3110 struct list_head *new_fcports)
1da177e4
LT		 3111{
3112 int rval;
3113 uint16_t loop_id;
3114 fc_port_t *fcport, *new_fcport, *fcptemp;
3115 int found;
3116
3117 sw_info_t *swl;
3118 int swl_idx;
3119 int first_dev, last_dev;
1516ef44 3120 port_id_t wrap = {}, nxt_d_id;
e315cd28
AC		 3121 struct qla_hw_data *ha = vha->hw;
3122 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
ee546b6e 3123 struct scsi_qla_host *tvp;
1da177e4
LT		 3124
3125 rval = QLA_SUCCESS;
3126
3127 /* Try GID_PT to get device list, else GAN. */
7a67735b 3128 if (!ha->swl)
642ef983 3129 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
7a67735b
AV		 3130 GFP_KERNEL);
3131 swl = ha->swl;
bbfbbbc1 3132 if (!swl) {
1da177e4 3133 /*EMPTY*/
7c3df132
SK		 3134 ql_dbg(ql_dbg_disc, vha, 0x2054,
3135 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 3136 } else {
642ef983 3137 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
e315cd28 3138 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4 3139 swl = NULL;
e315cd28 3140 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 3141 swl = NULL;
e315cd28 3142 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 3143 swl = NULL;
e5896bd5 3144 } else if (ql2xiidmaenable &&
e315cd28
AC		 3145 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3146 qla2x00_gpsc(vha, swl);
1da177e4 3147 }
e8c72ba5
CD		 3148
3149 /* If other queries succeeded probe for FC-4 type */
3150 if (swl)
3151 qla2x00_gff_id(vha, swl);
1da177e4
LT		 3152 }
3153 swl_idx = 0;
3154
3155 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 3156 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3157 if (new_fcport == NULL) {
7c3df132
SK		 3158 ql_log(ql_log_warn, vha, 0x205e,
3159 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 3160 return (QLA_MEMORY_ALLOC_FAILED);
3161 }
3162 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 3163 /* Set start port ID scan at adapter ID. */
3164 first_dev = 1;
3165 last_dev = 0;
3166
3167 /* Starting free loop ID. */
e315cd28
AC		 3168 loop_id = ha->min_external_loopid;
3169 for (; loop_id <= ha->max_loop_id; loop_id++) {
3170 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 3171 continue;
3172
3a6478df
GM		 3173 if (ha->current_topology == ISP_CFG_FL &&
3174 (atomic_read(&vha->loop_down_timer) ||
3175 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 3176 atomic_set(&vha->loop_down_timer, 0);
3177 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3178 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 3179 break;
bb2d52b2 3180 }
1da177e4
LT		 3181
3182 if (swl != NULL) {
3183 if (last_dev) {
3184 wrap.b24 = new_fcport->d_id.b24;
3185 } else {
3186 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3187 memcpy(new_fcport->node_name,
3188 swl[swl_idx].node_name, WWN_SIZE);
3189 memcpy(new_fcport->port_name,
3190 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 3191 memcpy(new_fcport->fabric_port_name,
3192 swl[swl_idx].fabric_port_name, WWN_SIZE);
3193 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 3194 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4
LT		 3195
3196 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3197 last_dev = 1;
3198 }
3199 swl_idx++;
3200 }
3201 } else {
3202 /* Send GA_NXT to the switch */
e315cd28 3203 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 3204 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3205 ql_log(ql_log_warn, vha, 0x2064,
3206 "SNS scan failed -- assuming "
3207 "zero-entry result.\n");
1da177e4
LT		 3208 list_for_each_entry_safe(fcport, fcptemp,
3209 new_fcports, list) {
3210 list_del(&fcport->list);
3211 kfree(fcport);
3212 }
3213 rval = QLA_SUCCESS;
3214 break;
3215 }
3216 }
3217
3218 /* If wrap on switch device list, exit. */
3219 if (first_dev) {
3220 wrap.b24 = new_fcport->d_id.b24;
3221 first_dev = 0;
3222 } else if (new_fcport->d_id.b24 == wrap.b24) {
7c3df132
SK		 3223 ql_dbg(ql_dbg_disc, vha, 0x2065,
3224 "Device wrap (%02x%02x%02x).\n",
3225 new_fcport->d_id.b.domain,
3226 new_fcport->d_id.b.area,
3227 new_fcport->d_id.b.al_pa);
1da177e4
LT		 3228 break;
3229 }
3230
2c3dfe3f 3231 /* Bypass if same physical adapter. */
e315cd28 3232 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 3233 continue;
3234
2c3dfe3f 3235 /* Bypass virtual ports of the same host. */
e315cd28
AC		 3236 found = 0;
3237 if (ha->num_vhosts) {
feafb7b1
AE		 3238 unsigned long flags;
3239
3240 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3241 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3242 if (new_fcport->d_id.b24 == vp->d_id.b24) {
3243 found = 1;
2c3dfe3f 3244 break;
e315cd28 3245 }
2c3dfe3f 3246 }
feafb7b1
AE		 3247 spin_unlock_irqrestore(&ha->vport_slock, flags);
3248
e315cd28 3249 if (found)
2c3dfe3f
SJ		 3250 continue;
3251 }
3252
f7d289f6
AV		 3253 /* Bypass if same domain and area of adapter. */
3254 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 3255 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 3256 ISP_CFG_FL)
3257 continue;
3258
1da177e4
LT		 3259 /* Bypass reserved domain fields. */
3260 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3261 continue;
3262
e8c72ba5 3263 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 3264 if (ql2xgffidenable &&
3265 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3266 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 3267 continue;
3268
1da177e4
LT		 3269 /* Locate matching device in database. */
3270 found = 0;
e315cd28 3271 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3272 if (memcmp(new_fcport->port_name, fcport->port_name,
3273 WWN_SIZE))
3274 continue;
3275
c0822b63 3276 fcport->scan_state = QLA_FCPORT_SCAN_FOUND;
b3b02e6e 3277
1da177e4
LT		 3278 found++;
3279
d8b45213
AV		 3280 /* Update port state. */
3281 memcpy(fcport->fabric_port_name,
3282 new_fcport->fabric_port_name, WWN_SIZE);
3283 fcport->fp_speed = new_fcport->fp_speed;
3284
1da177e4
LT		 3285 /*
3286 * If address the same and state FCS_ONLINE, nothing
3287 * changed.
3288 */
3289 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3290 atomic_read(&fcport->state) == FCS_ONLINE) {
3291 break;
3292 }
3293
3294 /*
3295 * If device was not a fabric device before.
3296 */
3297 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3298 fcport->d_id.b24 = new_fcport->d_id.b24;
3299 fcport->loop_id = FC_NO_LOOP_ID;
3300 fcport->flags |= (FCF_FABRIC_DEVICE |
3301 FCF_LOGIN_NEEDED);
1da177e4
LT		 3302 break;
3303 }
3304
3305 /*
3306 * Port ID changed or device was marked to be updated;
3307 * Log it out if still logged in and mark it for
3308 * relogin later.
3309 */
3310 fcport->d_id.b24 = new_fcport->d_id.b24;
3311 fcport->flags |= FCF_LOGIN_NEEDED;
3312 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3313 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
0eba25df 3314 (fcport->flags & FCF_ASYNC_SENT) == 0 &&
1da177e4
LT		 3315 fcport->port_type != FCT_INITIATOR &&
3316 fcport->port_type != FCT_BROADCAST) {
e315cd28 3317 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3318 fcport->d_id.b.domain, fcport->d_id.b.area,
3319 fcport->d_id.b.al_pa);
1da177e4
LT		 3320 fcport->loop_id = FC_NO_LOOP_ID;
3321 }
3322
3323 break;
3324 }
3325
3326 if (found)
3327 continue;
1da177e4
LT		 3328 /* If device was not in our fcports list, then add it. */
3329 list_add_tail(&new_fcport->list, new_fcports);
3330
3331 /* Allocate a new replacement fcport. */
3332 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 3333 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3334 if (new_fcport == NULL) {
7c3df132
SK		 3335 ql_log(ql_log_warn, vha, 0x2066,
3336 "Memory allocation failed for fcport.\n");
1da177e4
LT		 3337 return (QLA_MEMORY_ALLOC_FAILED);
3338 }
3339 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3340 new_fcport->d_id.b24 = nxt_d_id.b24;
3341 }
3342
c9475cb0 3343 kfree(new_fcport);
1da177e4 3344
1da177e4
LT		 3345 return (rval);
3346}
3347
3348/*
3349 * qla2x00_find_new_loop_id
3350 * Scan through our port list and find a new usable loop ID.
3351 *
3352 * Input:
3353 * ha: adapter state pointer.
3354 * dev: port structure pointer.
3355 *
3356 * Returns:
3357 * qla2x00 local function return status code.
3358 *
3359 * Context:
3360 * Kernel context.
3361 */
03bcfb57 3362int
e315cd28 3363qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 3364{
3365 int rval;
3366 int found;
3367 fc_port_t *fcport;
3368 uint16_t first_loop_id;
e315cd28
AC		 3369 struct qla_hw_data *ha = vha->hw;
3370 struct scsi_qla_host *vp;
ee546b6e 3371 struct scsi_qla_host *tvp;
feafb7b1 3372 unsigned long flags = 0;
1da177e4
LT		 3373
3374 rval = QLA_SUCCESS;
3375
3376 /* Save starting loop ID. */
3377 first_loop_id = dev->loop_id;
3378
3379 for (;;) {
3380 /* Skip loop ID if already used by adapter. */
e315cd28 3381 if (dev->loop_id == vha->loop_id)
1da177e4 3382 dev->loop_id++;
1da177e4
LT		 3383
3384 /* Skip reserved loop IDs. */
e315cd28 3385 while (qla2x00_is_reserved_id(vha, dev->loop_id))
1da177e4 3386 dev->loop_id++;
1da177e4
LT		 3387
3388 /* Reset loop ID if passed the end. */
e315cd28 3389 if (dev->loop_id > ha->max_loop_id) {
1da177e4
LT		 3390 /* first loop ID. */
3391 dev->loop_id = ha->min_external_loopid;
3392 }
3393
3394 /* Check for loop ID being already in use. */
3395 found = 0;
3396 fcport = NULL;
feafb7b1
AE		 3397
3398 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3399 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3400 list_for_each_entry(fcport, &vp->vp_fcports, list) {
3401 if (fcport->loop_id == dev->loop_id &&
3402 fcport != dev) {
3403 /* ID possibly in use */
3404 found++;
3405 break;
3406 }
1da177e4 3407 }
e315cd28
AC		 3408 if (found)
3409 break;
1da177e4 3410 }
feafb7b1 3411 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4
LT		 3412
3413 /* If not in use then it is free to use. */
3414 if (!found) {
557cf785
AE		 3415 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
3416 "Assigning new loopid=%x, portid=%x.\n",
3417 dev->loop_id, dev->d_id.b24);
1da177e4
LT		 3418 break;
3419 }
3420
3421 /* ID in use. Try next value. */
3422 dev->loop_id++;
3423
3424 /* If wrap around. No free ID to use. */
3425 if (dev->loop_id == first_loop_id) {
3426 dev->loop_id = FC_NO_LOOP_ID;
3427 rval = QLA_FUNCTION_FAILED;
3428 break;
3429 }
3430 }
3431
3432 return (rval);
3433}
3434
1da177e4
LT		 3435/*
3436 * qla2x00_fabric_dev_login
3437 * Login fabric target device and update FC port database.
3438 *
3439 * Input:
3440 * ha: adapter state pointer.
3441 * fcport: port structure list pointer.
3442 * next_loopid: contains value of a new loop ID that can be used
3443 * by the next login attempt.
3444 *
3445 * Returns:
3446 * qla2x00 local function return status code.
3447 *
3448 * Context:
3449 * Kernel context.
3450 */
3451static int
e315cd28 3452qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3453 uint16_t *next_loopid)
3454{
3455 int rval;
3456 int retry;
0107109e 3457 uint8_t opts;
e315cd28 3458 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3459
3460 rval = QLA_SUCCESS;
3461 retry = 0;
3462
ac280b67 3463 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584
AV		 3464 if (fcport->flags & FCF_ASYNC_SENT)
3465 return rval;
3466 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3467 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3468 if (!rval)
3469 return rval;
3470 }
3471
5ff1d584 3472 fcport->flags &= ~FCF_ASYNC_SENT;
e315cd28 3473 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
1da177e4 3474 if (rval == QLA_SUCCESS) {
f08b7251 3475 /* Send an ADISC to FCP2 devices.*/
0107109e 3476 opts = 0;
f08b7251 3477 if (fcport->flags & FCF_FCP2_DEVICE)
0107109e 3478 opts |= BIT_1;
e315cd28 3479 rval = qla2x00_get_port_database(vha, fcport, opts);
1da177e4 3480 if (rval != QLA_SUCCESS) {
e315cd28 3481 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3482 fcport->d_id.b.domain, fcport->d_id.b.area,
3483 fcport->d_id.b.al_pa);
e315cd28 3484 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4 3485 } else {
e315cd28 3486 qla2x00_update_fcport(vha, fcport);
1da177e4 3487 }
0b91d116
CD		 3488 } else {
3489 /* Retry Login. */
3490 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 3491 }
3492
3493 return (rval);
3494}
3495
3496/*
3497 * qla2x00_fabric_login
3498 * Issue fabric login command.
3499 *
3500 * Input:
3501 * ha = adapter block pointer.
3502 * device = pointer to FC device type structure.
3503 *
3504 * Returns:
3505 * 0 - Login successfully
3506 * 1 - Login failed
3507 * 2 - Initiator device
3508 * 3 - Fatal error
3509 */
3510int
e315cd28 3511qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3512 uint16_t *next_loopid)
3513{
3514 int rval;
3515 int retry;
3516 uint16_t tmp_loopid;
3517 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 3518 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3519
3520 retry = 0;
3521 tmp_loopid = 0;
3522
3523 for (;;) {
7c3df132
SK		 3524 ql_dbg(ql_dbg_disc, vha, 0x2000,
3525 "Trying Fabric Login w/loop id 0x%04x for port "
3526 "%02x%02x%02x.\n",
3527 fcport->loop_id, fcport->d_id.b.domain,
3528 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3529
3530 /* Login fcport on switch. */
0b91d116 3531 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 3532 fcport->d_id.b.domain, fcport->d_id.b.area,
3533 fcport->d_id.b.al_pa, mb, BIT_0);
0b91d116
CD		 3534 if (rval != QLA_SUCCESS) {
3535 return rval;
3536 }
1da177e4
LT		 3537 if (mb[0] == MBS_PORT_ID_USED) {
3538 /*
3539 * Device has another loop ID. The firmware team
0107109e
AV		 3540 * recommends the driver perform an implicit login with
3541 * the specified ID again. The ID we just used is save
3542 * here so we return with an ID that can be tried by
3543 * the next login.
1da177e4
LT		 3544 */
3545 retry++;
3546 tmp_loopid = fcport->loop_id;
3547 fcport->loop_id = mb[1];
3548
7c3df132
SK		 3549 ql_dbg(ql_dbg_disc, vha, 0x2001,
3550 "Fabric Login: port in use - next loop "
3551 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 3552 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 3553 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3554
3555 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3556 /*
3557 * Login succeeded.
3558 */
3559 if (retry) {
3560 /* A retry occurred before. */
3561 *next_loopid = tmp_loopid;
3562 } else {
3563 /*
3564 * No retry occurred before. Just increment the
3565 * ID value for next login.
3566 */
3567 *next_loopid = (fcport->loop_id + 1);
3568 }
3569
3570 if (mb[1] & BIT_0) {
3571 fcport->port_type = FCT_INITIATOR;
3572 } else {
3573 fcport->port_type = FCT_TARGET;
3574 if (mb[1] & BIT_1) {
8474f3a0 3575 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 3576 }
3577 }
3578
ad3e0eda
AV		 3579 if (mb[10] & BIT_0)
3580 fcport->supported_classes |= FC_COS_CLASS2;
3581 if (mb[10] & BIT_1)
3582 fcport->supported_classes |= FC_COS_CLASS3;
3583
1da177e4
LT		 3584 rval = QLA_SUCCESS;
3585 break;
3586 } else if (mb[0] == MBS_LOOP_ID_USED) {
3587 /*
3588 * Loop ID already used, try next loop ID.
3589 */
3590 fcport->loop_id++;
e315cd28 3591 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 3592 if (rval != QLA_SUCCESS) {
3593 /* Ran out of loop IDs to use */
3594 break;
3595 }
3596 } else if (mb[0] == MBS_COMMAND_ERROR) {
3597 /*
3598 * Firmware possibly timed out during login. If NO
3599 * retries are left to do then the device is declared
3600 * dead.
3601 */
3602 *next_loopid = fcport->loop_id;
e315cd28 3603 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3604 fcport->d_id.b.domain, fcport->d_id.b.area,
3605 fcport->d_id.b.al_pa);
e315cd28 3606 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 3607
3608 rval = 1;
3609 break;
3610 } else {
3611 /*
3612 * unrecoverable / not handled error
3613 */
7c3df132
SK		 3614 ql_dbg(ql_dbg_disc, vha, 0x2002,
3615 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3616 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3617 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3618 fcport->loop_id, jiffies);
1da177e4
LT		 3619
3620 *next_loopid = fcport->loop_id;
e315cd28 3621 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3622 fcport->d_id.b.domain, fcport->d_id.b.area,
3623 fcport->d_id.b.al_pa);
1da177e4 3624 fcport->loop_id = FC_NO_LOOP_ID;
0eedfcf0 3625 fcport->login_retry = 0;
1da177e4
LT		 3626
3627 rval = 3;
3628 break;
3629 }
3630 }
3631
3632 return (rval);
3633}
3634
3635/*
3636 * qla2x00_local_device_login
3637 * Issue local device login command.
3638 *
3639 * Input:
3640 * ha = adapter block pointer.
3641 * loop_id = loop id of device to login to.
3642 *
3643 * Returns (Where's the #define!!!!):
3644 * 0 - Login successfully
3645 * 1 - Login failed
3646 * 3 - Fatal error
3647 */
3648int
e315cd28 3649qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 3650{
3651 int rval;
3652 uint16_t mb[MAILBOX_REGISTER_COUNT];
3653
3654 memset(mb, 0, sizeof(mb));
e315cd28 3655 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 3656 if (rval == QLA_SUCCESS) {
3657 /* Interrogate mailbox registers for any errors */
3658 if (mb[0] == MBS_COMMAND_ERROR)
3659 rval = 1;
3660 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3661 /* device not in PCB table */
3662 rval = 3;
3663 }
3664
3665 return (rval);
3666}
3667
3668/*
3669 * qla2x00_loop_resync
3670 * Resync with fibre channel devices.
3671 *
3672 * Input:
3673 * ha = adapter block pointer.
3674 *
3675 * Returns:
3676 * 0 = success
3677 */
3678int
e315cd28 3679qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 3680{
73208dfd 3681 int rval = QLA_SUCCESS;
1da177e4 3682 uint32_t wait_time;
67c2e93a
AC		 3683 struct req_que *req;
3684 struct rsp_que *rsp;
3685
7163ea81 3686 if (vha->hw->flags.cpu_affinity_enabled)
67c2e93a
AC		 3687 req = vha->hw->req_q_map[0];
3688 else
3689 req = vha->req;
3690 rsp = req->rsp;
1da177e4 3691
e315cd28
AC		 3692 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3693 if (vha->flags.online) {
3694 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 3695 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3696 wait_time = 256;
3697 do {
0107109e 3698 /* Issue a marker after FW becomes ready. */
73208dfd
AC		 3699 qla2x00_marker(vha, req, rsp, 0, 0,
3700 MK_SYNC_ALL);
e315cd28 3701 vha->marker_needed = 0;
1da177e4
LT		 3702
3703 /* Remap devices on Loop. */
e315cd28 3704 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 3705
e315cd28 3706 qla2x00_configure_loop(vha);
1da177e4 3707 wait_time--;
e315cd28
AC		 3708 } while (!atomic_read(&vha->loop_down_timer) &&
3709 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3710 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3711 &vha->dpc_flags)));
1da177e4 3712 }
1da177e4
LT		 3713 }
3714
e315cd28 3715 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 3716 return (QLA_FUNCTION_FAILED);
1da177e4 3717
e315cd28 3718 if (rval)
7c3df132
SK		 3719 ql_dbg(ql_dbg_disc, vha, 0x206c,
3720 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 3721
3722 return (rval);
3723}
3724
579d12b5
SK		 3725/*
3726* qla2x00_perform_loop_resync
3727* Description: This function will set the appropriate flags and call
3728* qla2x00_loop_resync. If successful loop will be resynced
3729* Arguments : scsi_qla_host_t pointer
3730* returm : Success or Failure
3731*/
3732
3733int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3734{
3735 int32_t rval = 0;
3736
3737 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3738 /*Configure the flags so that resync happens properly*/
3739 atomic_set(&ha->loop_down_timer, 0);
3740 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3741 atomic_set(&ha->loop_state, LOOP_UP);
3742 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3743 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3744 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3745
3746 rval = qla2x00_loop_resync(ha);
3747 } else
3748 atomic_set(&ha->loop_state, LOOP_DEAD);
3749
3750 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3751 }
3752
3753 return rval;
3754}
3755
d97994dc 3756void
67becc00 3757qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc 3758{
3759 fc_port_t *fcport;
feafb7b1
AE		 3760 struct scsi_qla_host *vha;
3761 struct qla_hw_data *ha = base_vha->hw;
3762 unsigned long flags;
d97994dc 3763
feafb7b1 3764 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 3765 /* Go with deferred removal of rport references. */
feafb7b1
AE		 3766 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3767 atomic_inc(&vha->vref_count);
3768 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 3769 if (fcport->drport &&
feafb7b1
AE		 3770 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3771 spin_unlock_irqrestore(&ha->vport_slock, flags);
3772
67becc00 3773 qla2x00_rport_del(fcport);
feafb7b1
AE		 3774
3775 spin_lock_irqsave(&ha->vport_slock, flags);
3776 }
3777 }
3778 atomic_dec(&vha->vref_count);
3779 }
3780 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc 3781}
3782
579d12b5
SK		 3783/*
3784* qla82xx_quiescent_state_cleanup
3785* Description: This function will block the new I/Os
3786* Its not aborting any I/Os as context
3787* is not destroyed during quiescence
3788* Arguments: scsi_qla_host_t
3789* return : void
3790*/
3791void
3792qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
3793{
3794 struct qla_hw_data *ha = vha->hw;
3795 struct scsi_qla_host *vp;
3796
7c3df132
SK		 3797 ql_dbg(ql_dbg_p3p, vha, 0xb002,
3798 "Performing ISP error recovery - ha=%p.\n", ha);
579d12b5
SK		 3799
3800 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
3801 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3802 atomic_set(&vha->loop_state, LOOP_DOWN);
3803 qla2x00_mark_all_devices_lost(vha, 0);
3804 list_for_each_entry(vp, &ha->vp_list, list)
3805 qla2x00_mark_all_devices_lost(vha, 0);
3806 } else {
3807 if (!atomic_read(&vha->loop_down_timer))
3808 atomic_set(&vha->loop_down_timer,
3809 LOOP_DOWN_TIME);
3810 }
3811 /* Wait for pending cmds to complete */
3812 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
3813}
3814
a9083016
GM		 3815void
3816qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
3817{
3818 struct qla_hw_data *ha = vha->hw;
579d12b5 3819 struct scsi_qla_host *vp;
feafb7b1 3820 unsigned long flags;
6aef87be 3821 fc_port_t *fcport;
a9083016 3822
e46ef004
SK		 3823 /* For ISP82XX, driver waits for completion of the commands.
3824 * online flag should be set.
3825 */
3826 if (!IS_QLA82XX(ha))
3827 vha->flags.online = 0;
a9083016
GM		 3828 ha->flags.chip_reset_done = 0;
3829 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2be21fa2 3830 vha->qla_stats.total_isp_aborts++;
a9083016 3831
7c3df132
SK		 3832 ql_log(ql_log_info, vha, 0x00af,
3833 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 3834
e46ef004
SK		 3835 /* For ISP82XX, reset_chip is just disabling interrupts.
3836 * Driver waits for the completion of the commands.
3837 * the interrupts need to be enabled.
3838 */
a9083016
GM		 3839 if (!IS_QLA82XX(ha))
3840 ha->isp_ops->reset_chip(vha);
3841
3842 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
3843 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3844 atomic_set(&vha->loop_state, LOOP_DOWN);
3845 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 3846
3847 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 3848 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 3849 atomic_inc(&vp->vref_count);
3850 spin_unlock_irqrestore(&ha->vport_slock, flags);
3851
a9083016 3852 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 3853
3854 spin_lock_irqsave(&ha->vport_slock, flags);
3855 atomic_dec(&vp->vref_count);
3856 }
3857 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 3858 } else {
3859 if (!atomic_read(&vha->loop_down_timer))
3860 atomic_set(&vha->loop_down_timer,
3861 LOOP_DOWN_TIME);
3862 }
3863
6aef87be
AV		 3864 /* Clear all async request states across all VPs. */
3865 list_for_each_entry(fcport, &vha->vp_fcports, list)
3866 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3867 spin_lock_irqsave(&ha->vport_slock, flags);
3868 list_for_each_entry(vp, &ha->vp_list, list) {
3869 atomic_inc(&vp->vref_count);
3870 spin_unlock_irqrestore(&ha->vport_slock, flags);
3871
3872 list_for_each_entry(fcport, &vp->vp_fcports, list)
3873 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3874
3875 spin_lock_irqsave(&ha->vport_slock, flags);
3876 atomic_dec(&vp->vref_count);
3877 }
3878 spin_unlock_irqrestore(&ha->vport_slock, flags);
3879
bddd2d65
LC		 3880 if (!ha->flags.eeh_busy) {
3881 /* Make sure for ISP 82XX IO DMA is complete */
3882 if (IS_QLA82XX(ha)) {
7190575f 3883 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 3884 ql_log(ql_log_info, vha, 0x00b4,
3885 "Done chip reset cleanup.\n");
a9083016 3886
e46ef004
SK		 3887 /* Done waiting for pending commands.
3888 * Reset the online flag.
3889 */
3890 vha->flags.online = 0;
4d78c973 3891 }
a9083016 3892
bddd2d65
LC		 3893 /* Requeue all commands in outstanding command list. */
3894 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
3895 }
a9083016
GM		 3896}
3897
1da177e4
LT		 3898/*
3899* qla2x00_abort_isp
3900* Resets ISP and aborts all outstanding commands.
3901*
3902* Input:
3903* ha = adapter block pointer.
3904*
3905* Returns:
3906* 0 = success
3907*/
3908int
e315cd28 3909qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 3910{
476e8978 3911 int rval;
1da177e4 3912 uint8_t status = 0;
e315cd28
AC		 3913 struct qla_hw_data *ha = vha->hw;
3914 struct scsi_qla_host *vp;
73208dfd 3915 struct req_que *req = ha->req_q_map[0];
feafb7b1 3916 unsigned long flags;
1da177e4 3917
e315cd28 3918 if (vha->flags.online) {
a9083016 3919 qla2x00_abort_isp_cleanup(vha);
1da177e4 3920
85880801
AV		 3921 if (unlikely(pci_channel_offline(ha->pdev) &&
3922 ha->flags.pci_channel_io_perm_failure)) {
3923 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3924 status = 0;
3925 return status;
3926 }
3927
73208dfd 3928 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 3929
e315cd28 3930 ha->isp_ops->nvram_config(vha);
1da177e4 3931
e315cd28
AC		 3932 if (!qla2x00_restart_isp(vha)) {
3933 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 3934
e315cd28 3935 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 3936 /*
3937 * Issue marker command only when we are going
3938 * to start the I/O .
3939 */
e315cd28 3940 vha->marker_needed = 1;
1da177e4
LT		 3941 }
3942
e315cd28 3943 vha->flags.online = 1;
1da177e4 3944
fd34f556 3945 ha->isp_ops->enable_intrs(ha);
1da177e4 3946
fa2a1ce5 3947 ha->isp_abort_cnt = 0;
e315cd28 3948 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 3949
6246b8a1
GM		 3950 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
3951 qla2x00_get_fw_version(vha);
df613b96
AV		 3952 if (ha->fce) {
3953 ha->flags.fce_enabled = 1;
3954 memset(ha->fce, 0,
3955 fce_calc_size(ha->fce_bufs));
e315cd28 3956 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 3957 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
3958 &ha->fce_bufs);
3959 if (rval) {
7c3df132 3960 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 3961 "Unable to reinitialize FCE "
3962 "(%d).\n", rval);
3963 ha->flags.fce_enabled = 0;
3964 }
3965 }
436a7b11
AV		 3966
3967 if (ha->eft) {
3968 memset(ha->eft, 0, EFT_SIZE);
e315cd28 3969 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 3970 ha->eft_dma, EFT_NUM_BUFFERS);
3971 if (rval) {
7c3df132 3972 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 3973 "Unable to reinitialize EFT "
3974 "(%d).\n", rval);
3975 }
3976 }
1da177e4 3977 } else { /* failed the ISP abort */
e315cd28
AC		 3978 vha->flags.online = 1;
3979 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 3980 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 3981 ql_log(ql_log_fatal, vha, 0x8035,
3982 "ISP error recover failed - "
3983 "board disabled.\n");
fa2a1ce5 3984 /*
1da177e4
LT		 3985 * The next call disables the board
3986 * completely.
3987 */
e315cd28
AC		 3988 ha->isp_ops->reset_adapter(vha);
3989 vha->flags.online = 0;
1da177e4 3990 clear_bit(ISP_ABORT_RETRY,
e315cd28 3991 &vha->dpc_flags);
1da177e4
LT		 3992 status = 0;
3993 } else { /* schedule another ISP abort */
3994 ha->isp_abort_cnt--;
7c3df132
SK		 3995 ql_dbg(ql_dbg_taskm, vha, 0x8020,
3996 "ISP abort - retry remaining %d.\n",
3997 ha->isp_abort_cnt);
1da177e4
LT		 3998 status = 1;
3999 }
4000 } else {
4001 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 4002 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4003 "ISP error recovery - retrying (%d) "
4004 "more times.\n", ha->isp_abort_cnt);
e315cd28 4005 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 4006 status = 1;
4007 }
4008 }
fa2a1ce5 4009
1da177e4
LT		 4010 }
4011
e315cd28 4012 if (!status) {
7c3df132 4013 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
feafb7b1
AE		 4014
4015 spin_lock_irqsave(&ha->vport_slock, flags);
4016 list_for_each_entry(vp, &ha->vp_list, list) {
4017 if (vp->vp_idx) {
4018 atomic_inc(&vp->vref_count);
4019 spin_unlock_irqrestore(&ha->vport_slock, flags);
4020
e315cd28 4021 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 4022
4023 spin_lock_irqsave(&ha->vport_slock, flags);
4024 atomic_dec(&vp->vref_count);
4025 }
e315cd28 4026 }
feafb7b1
AE		 4027 spin_unlock_irqrestore(&ha->vport_slock, flags);
4028
e315cd28 4029 } else {
d8424f68
JP		 4030 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4031 __func__);
1da177e4
LT		 4032 }
4033
4034 return(status);
4035}
4036
4037/*
4038* qla2x00_restart_isp
4039* restarts the ISP after a reset
4040*
4041* Input:
4042* ha = adapter block pointer.
4043*
4044* Returns:
4045* 0 = success
4046*/
4047static int
e315cd28 4048qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 4049{
c6b2fca8 4050 int status = 0;
1da177e4 4051 uint32_t wait_time;
e315cd28 4052 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 4053 struct req_que *req = ha->req_q_map[0];
4054 struct rsp_que *rsp = ha->rsp_q_map[0];
1da177e4
LT		 4055
4056 /* If firmware needs to be loaded */
e315cd28
AC		 4057 if (qla2x00_isp_firmware(vha)) {
4058 vha->flags.online = 0;
4059 status = ha->isp_ops->chip_diag(vha);
4060 if (!status)
4061 status = qla2x00_setup_chip(vha);
1da177e4
LT		 4062 }
4063
e315cd28
AC		 4064 if (!status && !(status = qla2x00_init_rings(vha))) {
4065 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 4066 ha->flags.chip_reset_done = 1;
73208dfd
AC		 4067 /* Initialize the queues in use */
4068 qla25xx_init_queues(ha);
4069
e315cd28
AC		 4070 status = qla2x00_fw_ready(vha);
4071 if (!status) {
7c3df132
SK		 4072 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4073 "Start configure loop status = %d.\n", status);
0107109e
AV		 4074
4075 /* Issue a marker after FW becomes ready. */
73208dfd 4076 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
0107109e 4077
e315cd28 4078 vha->flags.online = 1;
1da177e4
LT		 4079 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4080 wait_time = 256;
4081 do {
e315cd28
AC		 4082 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4083 qla2x00_configure_loop(vha);
1da177e4 4084 wait_time--;
e315cd28
AC		 4085 } while (!atomic_read(&vha->loop_down_timer) &&
4086 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4087 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4088 &vha->dpc_flags)));
1da177e4
LT		 4089 }
4090
4091 /* if no cable then assume it's good */
e315cd28 4092 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4
LT		 4093 status = 0;
4094
7c3df132
SK		 4095 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4096 "Configure loop done, status = 0x%x.\n", status);
1da177e4
LT		 4097 }
4098 return (status);
4099}
4100
73208dfd
AC		 4101static int
4102qla25xx_init_queues(struct qla_hw_data *ha)
4103{
4104 struct rsp_que *rsp = NULL;
4105 struct req_que *req = NULL;
4106 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4107 int ret = -1;
4108 int i;
4109
2afa19a9 4110 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd
AC		 4111 rsp = ha->rsp_q_map[i];
4112 if (rsp) {
4113 rsp->options &= ~BIT_0;
618a7523 4114 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 4115 if (ret != QLA_SUCCESS)
7c3df132
SK		 4116 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4117 "%s Rsp que: %d init failed.\n",
4118 __func__, rsp->id);
73208dfd 4119 else
7c3df132
SK		 4120 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4121 "%s Rsp que: %d inited.\n",
4122 __func__, rsp->id);
73208dfd 4123 }
2afa19a9
AC		 4124 }
4125 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd
AC		 4126 req = ha->req_q_map[i];
4127 if (req) {
29bdccbe 4128 /* Clear outstanding commands array. */
73208dfd 4129 req->options &= ~BIT_0;
618a7523 4130 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 4131 if (ret != QLA_SUCCESS)
7c3df132
SK		 4132 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4133 "%s Req que: %d init failed.\n",
4134 __func__, req->id);
73208dfd 4135 else
7c3df132
SK		 4136 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4137 "%s Req que: %d inited.\n",
4138 __func__, req->id);
73208dfd
AC		 4139 }
4140 }
4141 return ret;
4142}
4143
1da177e4
LT		 4144/*
4145* qla2x00_reset_adapter
4146* Reset adapter.
4147*
4148* Input:
4149* ha = adapter block pointer.
4150*/
abbd8870 4151void
e315cd28 4152qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 4153{
4154 unsigned long flags = 0;
e315cd28 4155 struct qla_hw_data *ha = vha->hw;
3d71644c 4156 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 4157
e315cd28 4158 vha->flags.online = 0;
fd34f556 4159 ha->isp_ops->disable_intrs(ha);
1da177e4 4160
1da177e4
LT		 4161 spin_lock_irqsave(&ha->hardware_lock, flags);
4162 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4163 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4164 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4165 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4166 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4167}
0107109e
AV		 4168
4169void
e315cd28 4170qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 4171{
4172 unsigned long flags = 0;
e315cd28 4173 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 4174 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4175
a9083016
GM		 4176 if (IS_QLA82XX(ha))
4177 return;
4178
e315cd28 4179 vha->flags.online = 0;
fd34f556 4180 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 4181
4182 spin_lock_irqsave(&ha->hardware_lock, flags);
4183 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4184 RD_REG_DWORD(&reg->hccr);
4185 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4186 RD_REG_DWORD(&reg->hccr);
4187 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 4188
4189 if (IS_NOPOLLING_TYPE(ha))
4190 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 4191}
4192
4e08df3f
DM		 4193/* On sparc systems, obtain port and node WWN from firmware
4194 * properties.
4195 */
e315cd28
AC		 4196static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4197 struct nvram_24xx *nv)
4e08df3f
DM		 4198{
4199#ifdef CONFIG_SPARC
e315cd28 4200 struct qla_hw_data *ha = vha->hw;
4e08df3f 4201 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 4202 struct device_node *dp = pci_device_to_OF_node(pdev);
4203 const u8 *val;
4e08df3f
DM		 4204 int len;
4205
4206 val = of_get_property(dp, "port-wwn", &len);
4207 if (val && len >= WWN_SIZE)
4208 memcpy(nv->port_name, val, WWN_SIZE);
4209
4210 val = of_get_property(dp, "node-wwn", &len);
4211 if (val && len >= WWN_SIZE)
4212 memcpy(nv->node_name, val, WWN_SIZE);
4213#endif
4214}
4215
0107109e 4216int
e315cd28 4217qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 4218{
4e08df3f 4219 int rval;
0107109e
AV		 4220 struct init_cb_24xx *icb;
4221 struct nvram_24xx *nv;
4222 uint32_t *dptr;
4223 uint8_t *dptr1, *dptr2;
4224 uint32_t chksum;
4225 uint16_t cnt;
e315cd28 4226 struct qla_hw_data *ha = vha->hw;
0107109e 4227
4e08df3f 4228 rval = QLA_SUCCESS;
0107109e 4229 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 4230 nv = ha->nvram;
0107109e
AV		 4231
4232 /* Determine NVRAM starting address. */
e5b68a61
AC		 4233 if (ha->flags.port0) {
4234 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4235 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4236 } else {
0107109e 4237 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790 4238 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4239 }
e5b68a61
AC		 4240 ha->nvram_size = sizeof(struct nvram_24xx);
4241 ha->vpd_size = FA_NVRAM_VPD_SIZE;
a9083016
GM		 4242 if (IS_QLA82XX(ha))
4243 ha->vpd_size = FA_VPD_SIZE_82XX;
0107109e 4244
281afe19
SJ		 4245 /* Get VPD data into cache */
4246 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 4247 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 4248 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4249
4250 /* Get NVRAM data into cache and calculate checksum. */
0107109e 4251 dptr = (uint32_t *)nv;
e315cd28 4252 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e
AV		 4253 ha->nvram_size);
4254 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4255 chksum += le32_to_cpu(*dptr++);
4256
7c3df132
SK		 4257 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4258 "Contents of NVRAM\n");
4259 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4260 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 4261
4262 /* Bad NVRAM data, set defaults parameters. */
4263 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4264 || nv->id[3] != ' ' ||
4265 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4266 /* Reset NVRAM data. */
7c3df132 4267 ql_log(ql_log_warn, vha, 0x006b,
9e336520 4268 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132
SK		 4269 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4270 ql_log(ql_log_warn, vha, 0x006c,
4271 "Falling back to functioning (yet invalid -- WWPN) "
4272 "defaults.\n");
4e08df3f
DM		 4273
4274 /*
4275 * Set default initialization control block.
4276 */
4277 memset(nv, 0, ha->nvram_size);
4278 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4279 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4280 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4281 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4282 nv->exchange_count = __constant_cpu_to_le16(0);
4283 nv->hard_address = __constant_cpu_to_le16(124);
4284 nv->port_name[0] = 0x21;
e5b68a61 4285 nv->port_name[1] = 0x00 + ha->port_no;
4e08df3f
DM		 4286 nv->port_name[2] = 0x00;
4287 nv->port_name[3] = 0xe0;
4288 nv->port_name[4] = 0x8b;
4289 nv->port_name[5] = 0x1c;
4290 nv->port_name[6] = 0x55;
4291 nv->port_name[7] = 0x86;
4292 nv->node_name[0] = 0x20;
4293 nv->node_name[1] = 0x00;
4294 nv->node_name[2] = 0x00;
4295 nv->node_name[3] = 0xe0;
4296 nv->node_name[4] = 0x8b;
4297 nv->node_name[5] = 0x1c;
4298 nv->node_name[6] = 0x55;
4299 nv->node_name[7] = 0x86;
e315cd28 4300 qla24xx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 4301 nv->login_retry_count = __constant_cpu_to_le16(8);
4302 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4303 nv->login_timeout = __constant_cpu_to_le16(0);
4304 nv->firmware_options_1 =
4305 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4306 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4307 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4308 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4309 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4310 nv->efi_parameters = __constant_cpu_to_le32(0);
4311 nv->reset_delay = 5;
4312 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4313 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4314 nv->link_down_timeout = __constant_cpu_to_le16(30);
4315
4316 rval = 1;
0107109e
AV		 4317 }
4318
4319 /* Reset Initialization control block */
e315cd28 4320 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 4321
4322 /* Copy 1st segment. */
4323 dptr1 = (uint8_t *)icb;
4324 dptr2 = (uint8_t *)&nv->version;
4325 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4326 while (cnt--)
4327 *dptr1++ = *dptr2++;
4328
4329 icb->login_retry_count = nv->login_retry_count;
3ea66e28 4330 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 4331
4332 /* Copy 2nd segment. */
4333 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4334 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4335 cnt = (uint8_t *)&icb->reserved_3 -
4336 (uint8_t *)&icb->interrupt_delay_timer;
4337 while (cnt--)
4338 *dptr1++ = *dptr2++;
4339
4340 /*
4341 * Setup driver NVRAM options.
4342 */
e315cd28 4343 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 4344 "QLA2462");
0107109e 4345
5341e868
AV		 4346 /* Use alternate WWN? */
4347 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4348 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4349 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4350 }
4351
0107109e 4352 /* Prepare nodename */
fd0e7e4d 4353 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 4354 /*
4355 * Firmware will apply the following mask if the nodename was
4356 * not provided.
4357 */
4358 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4359 icb->node_name[0] &= 0xF0;
4360 }
4361
4362 /* Set host adapter parameters. */
4363 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 4364 ha->flags.enable_lip_reset = 0;
4365 ha->flags.enable_lip_full_login =
4366 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4367 ha->flags.enable_target_reset =
4368 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 4369 ha->flags.enable_led_scheme = 0;
d4c760c2 4370 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 4371
fd0e7e4d
AV		 4372 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4373 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 4374
4375 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4376 sizeof(ha->fw_seriallink_options24));
4377
4378 /* save HBA serial number */
4379 ha->serial0 = icb->port_name[5];
4380 ha->serial1 = icb->port_name[6];
4381 ha->serial2 = icb->port_name[7];
e315cd28
AC		 4382 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4383 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 4384
bc8fb3cb 4385 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4386
0107109e
AV		 4387 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4388
4389 /* Set minimum login_timeout to 4 seconds. */
4390 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4391 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4392 if (le16_to_cpu(nv->login_timeout) < 4)
4393 nv->login_timeout = __constant_cpu_to_le16(4);
4394 ha->login_timeout = le16_to_cpu(nv->login_timeout);
c6852c4c 4395 icb->login_timeout = nv->login_timeout;
0107109e 4396
00a537b8
AV		 4397 /* Set minimum RATOV to 100 tenths of a second. */
4398 ha->r_a_tov = 100;
0107109e
AV		 4399
4400 ha->loop_reset_delay = nv->reset_delay;
4401
4402 /* Link Down Timeout = 0:
4403 *
4404 * When Port Down timer expires we will start returning
4405 * I/O's to OS with "DID_NO_CONNECT".
4406 *
4407 * Link Down Timeout != 0:
4408 *
4409 * The driver waits for the link to come up after link down
4410 * before returning I/Os to OS with "DID_NO_CONNECT".
4411 */
4412 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4413 ha->loop_down_abort_time =
4414 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4415 } else {
4416 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4417 ha->loop_down_abort_time =
4418 (LOOP_DOWN_TIME - ha->link_down_timeout);
4419 }
4420
4421 /* Need enough time to try and get the port back. */
4422 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4423 if (qlport_down_retry)
4424 ha->port_down_retry_count = qlport_down_retry;
4425
4426 /* Set login_retry_count */
4427 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
4428 if (ha->port_down_retry_count ==
4429 le16_to_cpu(nv->port_down_retry_count) &&
4430 ha->port_down_retry_count > 3)
4431 ha->login_retry_count = ha->port_down_retry_count;
4432 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4433 ha->login_retry_count = ha->port_down_retry_count;
4434 if (ql2xloginretrycount)
4435 ha->login_retry_count = ql2xloginretrycount;
4436
4fdfefe5 4437 /* Enable ZIO. */
e315cd28 4438 if (!vha->flags.init_done) {
4fdfefe5
AV		 4439 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
4440 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4441 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
4442 le16_to_cpu(icb->interrupt_delay_timer): 2;
4443 }
4444 icb->firmware_options_2 &= __constant_cpu_to_le32(
4445 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
e315cd28 4446 vha->flags.process_response_queue = 0;
4fdfefe5 4447 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 4448 ha->zio_mode = QLA_ZIO_MODE_6;
4449
7c3df132 4450 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 4451 "ZIO mode %d enabled; timer delay (%d us).\n",
4452 ha->zio_mode, ha->zio_timer * 100);
4453
4454 icb->firmware_options_2 |= cpu_to_le32(
4455 (uint32_t)ha->zio_mode);
4456 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
e315cd28 4457 vha->flags.process_response_queue = 1;
4fdfefe5
AV		 4458 }
4459
4e08df3f 4460 if (rval) {
7c3df132
SK		 4461 ql_log(ql_log_warn, vha, 0x0070,
4462 "NVRAM configuration failed.\n");
4e08df3f
DM		 4463 }
4464 return (rval);
0107109e
AV		 4465}
4466
413975a0 4467static int
cbc8eb67
AV		 4468qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
4469 uint32_t faddr)
d1c61909 4470{
73208dfd 4471 int rval = QLA_SUCCESS;
d1c61909 4472 int segments, fragment;
d1c61909
AV		 4473 uint32_t *dcode, dlen;
4474 uint32_t risc_addr;
4475 uint32_t risc_size;
4476 uint32_t i;
e315cd28 4477 struct qla_hw_data *ha = vha->hw;
73208dfd 4478 struct req_que *req = ha->req_q_map[0];
eaac30be 4479
7c3df132 4480 ql_dbg(ql_dbg_init, vha, 0x008b,
cfb0919c 4481 "FW: Loading firmware from flash (%x).\n", faddr);
eaac30be 4482
d1c61909
AV		 4483 rval = QLA_SUCCESS;
4484
4485 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4486 dcode = (uint32_t *)req->ring;
d1c61909
AV		 4487 *srisc_addr = 0;
4488
4489 /* Validate firmware image by checking version. */
e315cd28 4490 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 4491 for (i = 0; i < 4; i++)
4492 dcode[i] = be32_to_cpu(dcode[i]);
4493 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4494 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4495 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4496 dcode[3] == 0)) {
7c3df132
SK		 4497 ql_log(ql_log_fatal, vha, 0x008c,
4498 "Unable to verify the integrity of flash firmware "
4499 "image.\n");
4500 ql_log(ql_log_fatal, vha, 0x008d,
4501 "Firmware data: %08x %08x %08x %08x.\n",
4502 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 4503
4504 return QLA_FUNCTION_FAILED;
4505 }
4506
4507 while (segments && rval == QLA_SUCCESS) {
4508 /* Read segment's load information. */
e315cd28 4509 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 4510
4511 risc_addr = be32_to_cpu(dcode[2]);
4512 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4513 risc_size = be32_to_cpu(dcode[3]);
4514
4515 fragment = 0;
4516 while (risc_size > 0 && rval == QLA_SUCCESS) {
4517 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4518 if (dlen > risc_size)
4519 dlen = risc_size;
4520
7c3df132
SK		 4521 ql_dbg(ql_dbg_init, vha, 0x008e,
4522 "Loading risc segment@ risc addr %x "
4523 "number of dwords 0x%x offset 0x%x.\n",
4524 risc_addr, dlen, faddr);
d1c61909 4525
e315cd28 4526 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 4527 for (i = 0; i < dlen; i++)
4528 dcode[i] = swab32(dcode[i]);
4529
73208dfd 4530 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 4531 dlen);
4532 if (rval) {
7c3df132
SK		 4533 ql_log(ql_log_fatal, vha, 0x008f,
4534 "Failed to load segment %d of firmware.\n",
4535 fragment);
d1c61909
AV		 4536 break;
4537 }
4538
4539 faddr += dlen;
4540 risc_addr += dlen;
4541 risc_size -= dlen;
4542 fragment++;
4543 }
4544
4545 /* Next segment. */
4546 segments--;
4547 }
4548
4549 return rval;
4550}
4551
d1c61909
AV		 4552#define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
4553
0107109e 4554int
e315cd28 4555qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 4556{
4557 int rval;
4558 int i, fragment;
4559 uint16_t *wcode, *fwcode;
4560 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
4561 struct fw_blob *blob;
e315cd28 4562 struct qla_hw_data *ha = vha->hw;
73208dfd 4563 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 4564
4565 /* Load firmware blob. */
e315cd28 4566 blob = qla2x00_request_firmware(vha);
5433383e 4567 if (!blob) {
7c3df132
SK		 4568 ql_log(ql_log_info, vha, 0x0083,
4569 "Fimware image unavailable.\n");
4570 ql_log(ql_log_info, vha, 0x0084,
4571 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 4572 return QLA_FUNCTION_FAILED;
4573 }
4574
4575 rval = QLA_SUCCESS;
4576
73208dfd 4577 wcode = (uint16_t *)req->ring;
5433383e
AV		 4578 *srisc_addr = 0;
4579 fwcode = (uint16_t *)blob->fw->data;
4580 fwclen = 0;
4581
4582 /* Validate firmware image by checking version. */
4583 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132
SK		 4584 ql_log(ql_log_fatal, vha, 0x0085,
4585 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e
AV		 4586 blob->fw->size);
4587 goto fail_fw_integrity;
4588 }
4589 for (i = 0; i < 4; i++)
4590 wcode[i] = be16_to_cpu(fwcode[i + 4]);
4591 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
4592 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
4593 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 4594 ql_log(ql_log_fatal, vha, 0x0086,
4595 "Unable to verify integrity of firmware image.\n");
4596 ql_log(ql_log_fatal, vha, 0x0087,
4597 "Firmware data: %04x %04x %04x %04x.\n",
4598 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 4599 goto fail_fw_integrity;
4600 }
4601
4602 seg = blob->segs;
4603 while (*seg && rval == QLA_SUCCESS) {
4604 risc_addr = *seg;
4605 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
4606 risc_size = be16_to_cpu(fwcode[3]);
4607
4608 /* Validate firmware image size. */
4609 fwclen += risc_size * sizeof(uint16_t);
4610 if (blob->fw->size < fwclen) {
7c3df132 4611 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 4612 "Unable to verify integrity of firmware image "
7c3df132 4613 "(%Zd).\n", blob->fw->size);
5433383e
AV		 4614 goto fail_fw_integrity;
4615 }
4616
4617 fragment = 0;
4618 while (risc_size > 0 && rval == QLA_SUCCESS) {
4619 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
4620 if (wlen > risc_size)
4621 wlen = risc_size;
7c3df132
SK		 4622 ql_dbg(ql_dbg_init, vha, 0x0089,
4623 "Loading risc segment@ risc addr %x number of "
4624 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 4625
4626 for (i = 0; i < wlen; i++)
4627 wcode[i] = swab16(fwcode[i]);
4628
73208dfd 4629 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 4630 wlen);
4631 if (rval) {
7c3df132
SK		 4632 ql_log(ql_log_fatal, vha, 0x008a,
4633 "Failed to load segment %d of firmware.\n",
4634 fragment);
5433383e
AV		 4635 break;
4636 }
4637
4638 fwcode += wlen;
4639 risc_addr += wlen;
4640 risc_size -= wlen;
4641 fragment++;
4642 }
4643
4644 /* Next segment. */
4645 seg++;
4646 }
4647 return rval;
4648
4649fail_fw_integrity:
4650 return QLA_FUNCTION_FAILED;
4651}
4652
eaac30be
AV		 4653static int
4654qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 4655{
4656 int rval;
4657 int segments, fragment;
4658 uint32_t *dcode, dlen;
4659 uint32_t risc_addr;
4660 uint32_t risc_size;
4661 uint32_t i;
5433383e 4662 struct fw_blob *blob;
0107109e 4663 uint32_t *fwcode, fwclen;
e315cd28 4664 struct qla_hw_data *ha = vha->hw;
73208dfd 4665 struct req_que *req = ha->req_q_map[0];
0107109e 4666
5433383e 4667 /* Load firmware blob. */
e315cd28 4668 blob = qla2x00_request_firmware(vha);
5433383e 4669 if (!blob) {
7c3df132
SK		 4670 ql_log(ql_log_warn, vha, 0x0090,
4671 "Fimware image unavailable.\n");
4672 ql_log(ql_log_warn, vha, 0x0091,
4673 "Firmware images can be retrieved from: "
4674 QLA_FW_URL ".\n");
d1c61909 4675
eaac30be 4676 return QLA_FUNCTION_FAILED;
0107109e
AV		 4677 }
4678
cfb0919c
CD		 4679 ql_dbg(ql_dbg_init, vha, 0x0092,
4680 "FW: Loading via request-firmware.\n");
eaac30be 4681
0107109e
AV		 4682 rval = QLA_SUCCESS;
4683
4684 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4685 dcode = (uint32_t *)req->ring;
0107109e 4686 *srisc_addr = 0;
5433383e 4687 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 4688 fwclen = 0;
4689
4690 /* Validate firmware image by checking version. */
5433383e 4691 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132
SK		 4692 ql_log(ql_log_fatal, vha, 0x0093,
4693 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e 4694 blob->fw->size);
0107109e
AV		 4695 goto fail_fw_integrity;
4696 }
4697 for (i = 0; i < 4; i++)
4698 dcode[i] = be32_to_cpu(fwcode[i + 4]);
4699 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4700 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4701 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4702 dcode[3] == 0)) {
7c3df132
SK		 4703 ql_log(ql_log_fatal, vha, 0x0094,
4704 "Unable to verify integrity of firmware image (%Zd).\n",
4705 blob->fw->size);
4706 ql_log(ql_log_fatal, vha, 0x0095,
4707 "Firmware data: %08x %08x %08x %08x.\n",
4708 dcode[0], dcode[1], dcode[2], dcode[3]);
0107109e
AV		 4709 goto fail_fw_integrity;
4710 }
4711
4712 while (segments && rval == QLA_SUCCESS) {
4713 risc_addr = be32_to_cpu(fwcode[2]);
4714 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4715 risc_size = be32_to_cpu(fwcode[3]);
4716
4717 /* Validate firmware image size. */
4718 fwclen += risc_size * sizeof(uint32_t);
5433383e 4719 if (blob->fw->size < fwclen) {
7c3df132 4720 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 4721 "Unable to verify integrity of firmware image "
7c3df132 4722 "(%Zd).\n", blob->fw->size);
5433383e 4723
0107109e
AV		 4724 goto fail_fw_integrity;
4725 }
4726
4727 fragment = 0;
4728 while (risc_size > 0 && rval == QLA_SUCCESS) {
4729 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4730 if (dlen > risc_size)
4731 dlen = risc_size;
4732
7c3df132
SK		 4733 ql_dbg(ql_dbg_init, vha, 0x0097,
4734 "Loading risc segment@ risc addr %x "
4735 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 4736
4737 for (i = 0; i < dlen; i++)
4738 dcode[i] = swab32(fwcode[i]);
4739
73208dfd 4740 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 4741 dlen);
0107109e 4742 if (rval) {
7c3df132
SK		 4743 ql_log(ql_log_fatal, vha, 0x0098,
4744 "Failed to load segment %d of firmware.\n",
4745 fragment);
0107109e
AV		 4746 break;
4747 }
4748
4749 fwcode += dlen;
4750 risc_addr += dlen;
4751 risc_size -= dlen;
4752 fragment++;
4753 }
4754
4755 /* Next segment. */
4756 segments--;
4757 }
0107109e
AV		 4758 return rval;
4759
4760fail_fw_integrity:
0107109e 4761 return QLA_FUNCTION_FAILED;
0107109e 4762}
18c6c127 4763
eaac30be
AV		 4764int
4765qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4766{
4767 int rval;
4768
e337d907
AV		 4769 if (ql2xfwloadbin == 1)
4770 return qla81xx_load_risc(vha, srisc_addr);
4771
eaac30be
AV		 4772 /*
4773 * FW Load priority:
4774 * 1) Firmware via request-firmware interface (.bin file).
4775 * 2) Firmware residing in flash.
4776 */
4777 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4778 if (rval == QLA_SUCCESS)
4779 return rval;
4780
cbc8eb67
AV		 4781 return qla24xx_load_risc_flash(vha, srisc_addr,
4782 vha->hw->flt_region_fw);
eaac30be
AV		 4783}
4784
4785int
4786qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4787{
4788 int rval;
cbc8eb67 4789 struct qla_hw_data *ha = vha->hw;
eaac30be 4790
e337d907 4791 if (ql2xfwloadbin == 2)
cbc8eb67 4792 goto try_blob_fw;
e337d907 4793
eaac30be
AV		 4794 /*
4795 * FW Load priority:
4796 * 1) Firmware residing in flash.
4797 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 4798 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 4799 */
cbc8eb67 4800 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 4801 if (rval == QLA_SUCCESS)
4802 return rval;
4803
cbc8eb67
AV		 4804try_blob_fw:
4805 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4806 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
4807 return rval;
4808
7c3df132
SK		 4809 ql_log(ql_log_info, vha, 0x0099,
4810 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 4811 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
4812 if (rval != QLA_SUCCESS)
4813 return rval;
4814
7c3df132 4815 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67 4816 ha->flags.running_gold_fw = 1;
cbc8eb67 4817 return rval;
eaac30be
AV		 4818}
4819
18c6c127 4820void
e315cd28 4821qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 4822{
4823 int ret, retries;
e315cd28 4824 struct qla_hw_data *ha = vha->hw;
18c6c127 4825
85880801
AV		 4826 if (ha->flags.pci_channel_io_perm_failure)
4827 return;
e428924c 4828 if (!IS_FWI2_CAPABLE(ha))
18c6c127 4829 return;
75edf81d
AV		 4830 if (!ha->fw_major_version)
4831 return;
18c6c127 4832
e315cd28 4833 ret = qla2x00_stop_firmware(vha);
7c7f1f29 4834 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 4835 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 4836 ha->isp_ops->reset_chip(vha);
4837 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 4838 continue;
e315cd28 4839 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 4840 continue;
7c3df132
SK		 4841 ql_log(ql_log_info, vha, 0x8015,
4842 "Attempting retry of stop-firmware command.\n");
e315cd28 4843 ret = qla2x00_stop_firmware(vha);
18c6c127
AV		 4844 }
4845}
2c3dfe3f
SJ		 4846
4847int
e315cd28 4848qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 4849{
4850 int rval = QLA_SUCCESS;
0b91d116 4851 int rval2;
2c3dfe3f 4852 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 4853 struct qla_hw_data *ha = vha->hw;
4854 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 4855 struct req_que *req;
4856 struct rsp_que *rsp;
2c3dfe3f 4857
e315cd28 4858 if (!vha->vp_idx)
2c3dfe3f
SJ		 4859 return -EINVAL;
4860
e315cd28 4861 rval = qla2x00_fw_ready(base_vha);
7163ea81 4862 if (ha->flags.cpu_affinity_enabled)
67c2e93a
AC		 4863 req = ha->req_q_map[0];
4864 else
4865 req = vha->req;
4866 rsp = req->rsp;
4867
2c3dfe3f 4868 if (rval == QLA_SUCCESS) {
e315cd28 4869 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 4870 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 4871 }
4872
e315cd28 4873 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 4874
4875 /* Login to SNS first */
0b91d116
CD		 4876 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
4877 BIT_1);
4878 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
4879 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
4880 ql_dbg(ql_dbg_init, vha, 0x0120,
4881 "Failed SNS login: loop_id=%x, rval2=%d\n",
4882 NPH_SNS, rval2);
4883 else
4884 ql_dbg(ql_dbg_init, vha, 0x0103,
4885 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
4886 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
4887 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 4888 return (QLA_FUNCTION_FAILED);
4889 }
4890
e315cd28
AC		 4891 atomic_set(&vha->loop_down_timer, 0);
4892 atomic_set(&vha->loop_state, LOOP_UP);
4893 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4894 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4895 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 4896
4897 return rval;
4898}
4d4df193
HK		 4899
4900/* 84XX Support **************************************************************/
4901
4902static LIST_HEAD(qla_cs84xx_list);
4903static DEFINE_MUTEX(qla_cs84xx_mutex);
4904
4905static struct qla_chip_state_84xx *
e315cd28 4906qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 4907{
4908 struct qla_chip_state_84xx *cs84xx;
e315cd28 4909 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 4910
4911 mutex_lock(&qla_cs84xx_mutex);
4912
4913 /* Find any shared 84xx chip. */
4914 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
4915 if (cs84xx->bus == ha->pdev->bus) {
4916 kref_get(&cs84xx->kref);
4917 goto done;
4918 }
4919 }
4920
4921 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
4922 if (!cs84xx)
4923 goto done;
4924
4925 kref_init(&cs84xx->kref);
4926 spin_lock_init(&cs84xx->access_lock);
4927 mutex_init(&cs84xx->fw_update_mutex);
4928 cs84xx->bus = ha->pdev->bus;
4929
4930 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
4931done:
4932 mutex_unlock(&qla_cs84xx_mutex);
4933 return cs84xx;
4934}
4935
4936static void
4937__qla84xx_chip_release(struct kref *kref)
4938{
4939 struct qla_chip_state_84xx *cs84xx =
4940 container_of(kref, struct qla_chip_state_84xx, kref);
4941
4942 mutex_lock(&qla_cs84xx_mutex);
4943 list_del(&cs84xx->list);
4944 mutex_unlock(&qla_cs84xx_mutex);
4945 kfree(cs84xx);
4946}
4947
4948void
e315cd28 4949qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 4950{
e315cd28 4951 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 4952 if (ha->cs84xx)
4953 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
4954}
4955
4956static int
e315cd28 4957qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 4958{
4959 int rval;
4960 uint16_t status[2];
e315cd28 4961 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 4962
4963 mutex_lock(&ha->cs84xx->fw_update_mutex);
4964
e315cd28 4965 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 4966
4967 mutex_unlock(&ha->cs84xx->fw_update_mutex);
4968
4969 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
4970 QLA_SUCCESS;
4971}
3a03eb79
AV		 4972
4973/* 81XX Support **************************************************************/
4974
4975int
4976qla81xx_nvram_config(scsi_qla_host_t *vha)
4977{
4978 int rval;
4979 struct init_cb_81xx *icb;
4980 struct nvram_81xx *nv;
4981 uint32_t *dptr;
4982 uint8_t *dptr1, *dptr2;
4983 uint32_t chksum;
4984 uint16_t cnt;
4985 struct qla_hw_data *ha = vha->hw;
4986
4987 rval = QLA_SUCCESS;
4988 icb = (struct init_cb_81xx *)ha->init_cb;
4989 nv = ha->nvram;
4990
4991 /* Determine NVRAM starting address. */
4992 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 4993 ha->vpd_size = FA_NVRAM_VPD_SIZE;
3a03eb79
AV		 4994
4995 /* Get VPD data into cache */
4996 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 4997 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
4998 ha->vpd_size);
3a03eb79
AV		 4999
5000 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 5001 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 5002 ha->nvram_size);
3d79038f 5003 dptr = (uint32_t *)nv;
3a03eb79
AV		 5004 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5005 chksum += le32_to_cpu(*dptr++);
5006
7c3df132
SK		 5007 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
5008 "Contents of NVRAM:\n");
5009 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
5010 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 5011
5012 /* Bad NVRAM data, set defaults parameters. */
5013 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5014 || nv->id[3] != ' ' ||
5015 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5016 /* Reset NVRAM data. */
7c3df132 5017 ql_log(ql_log_info, vha, 0x0073,
9e336520 5018 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132 5019 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 5020 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 5021 ql_log(ql_log_info, vha, 0x0074,
5022 "Falling back to functioning (yet invalid -- WWPN) "
5023 "defaults.\n");
3a03eb79
AV		 5024
5025 /*
5026 * Set default initialization control block.
5027 */
5028 memset(nv, 0, ha->nvram_size);
5029 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5030 nv->version = __constant_cpu_to_le16(ICB_VERSION);
5031 nv->frame_payload_size = __constant_cpu_to_le16(2048);
5032 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5033 nv->exchange_count = __constant_cpu_to_le16(0);
5034 nv->port_name[0] = 0x21;
e5b68a61 5035 nv->port_name[1] = 0x00 + ha->port_no;
3a03eb79
AV		 5036 nv->port_name[2] = 0x00;
5037 nv->port_name[3] = 0xe0;
5038 nv->port_name[4] = 0x8b;
5039 nv->port_name[5] = 0x1c;
5040 nv->port_name[6] = 0x55;
5041 nv->port_name[7] = 0x86;
5042 nv->node_name[0] = 0x20;
5043 nv->node_name[1] = 0x00;
5044 nv->node_name[2] = 0x00;
5045 nv->node_name[3] = 0xe0;
5046 nv->node_name[4] = 0x8b;
5047 nv->node_name[5] = 0x1c;
5048 nv->node_name[6] = 0x55;
5049 nv->node_name[7] = 0x86;
5050 nv->login_retry_count = __constant_cpu_to_le16(8);
5051 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5052 nv->login_timeout = __constant_cpu_to_le16(0);
5053 nv->firmware_options_1 =
5054 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5055 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5056 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5057 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5058 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5059 nv->efi_parameters = __constant_cpu_to_le32(0);
5060 nv->reset_delay = 5;
5061 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5062 nv->port_down_retry_count = __constant_cpu_to_le16(30);
6246b8a1 5063 nv->link_down_timeout = __constant_cpu_to_le16(180);
eeebcc92 5064 nv->enode_mac[0] = 0x00;
6246b8a1
GM		 5065 nv->enode_mac[1] = 0xC0;
5066 nv->enode_mac[2] = 0xDD;
3a03eb79
AV		 5067 nv->enode_mac[3] = 0x04;
5068 nv->enode_mac[4] = 0x05;
e5b68a61 5069 nv->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5070
5071 rval = 1;
5072 }
5073
5074 /* Reset Initialization control block */
773120e4 5075 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 5076
5077 /* Copy 1st segment. */
5078 dptr1 = (uint8_t *)icb;
5079 dptr2 = (uint8_t *)&nv->version;
5080 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5081 while (cnt--)
5082 *dptr1++ = *dptr2++;
5083
5084 icb->login_retry_count = nv->login_retry_count;
5085
5086 /* Copy 2nd segment. */
5087 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5088 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5089 cnt = (uint8_t *)&icb->reserved_5 -
5090 (uint8_t *)&icb->interrupt_delay_timer;
5091 while (cnt--)
5092 *dptr1++ = *dptr2++;
5093
5094 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5095 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5096 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
69e5f1ea
AV		 5097 icb->enode_mac[0] = 0x00;
5098 icb->enode_mac[1] = 0xC0;
5099 icb->enode_mac[2] = 0xDD;
3a03eb79
AV		 5100 icb->enode_mac[3] = 0x04;
5101 icb->enode_mac[4] = 0x05;
e5b68a61 5102 icb->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5103 }
5104
b64b0e8f
AV		 5105 /* Use extended-initialization control block. */
5106 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5107
3a03eb79
AV		 5108 /*
5109 * Setup driver NVRAM options.
5110 */
5111 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 5112 "QLE8XXX");
3a03eb79
AV		 5113
5114 /* Use alternate WWN? */
5115 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5116 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5117 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5118 }
5119
5120 /* Prepare nodename */
5121 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5122 /*
5123 * Firmware will apply the following mask if the nodename was
5124 * not provided.
5125 */
5126 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5127 icb->node_name[0] &= 0xF0;
5128 }
5129
5130 /* Set host adapter parameters. */
5131 ha->flags.disable_risc_code_load = 0;
5132 ha->flags.enable_lip_reset = 0;
5133 ha->flags.enable_lip_full_login =
5134 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5135 ha->flags.enable_target_reset =
5136 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5137 ha->flags.enable_led_scheme = 0;
5138 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5139
5140 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5141 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5142
5143 /* save HBA serial number */
5144 ha->serial0 = icb->port_name[5];
5145 ha->serial1 = icb->port_name[6];
5146 ha->serial2 = icb->port_name[7];
5147 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5148 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5149
5150 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5151
5152 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5153
5154 /* Set minimum login_timeout to 4 seconds. */
5155 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5156 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5157 if (le16_to_cpu(nv->login_timeout) < 4)
5158 nv->login_timeout = __constant_cpu_to_le16(4);
5159 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5160 icb->login_timeout = nv->login_timeout;
5161
5162 /* Set minimum RATOV to 100 tenths of a second. */
5163 ha->r_a_tov = 100;
5164
5165 ha->loop_reset_delay = nv->reset_delay;
5166
5167 /* Link Down Timeout = 0:
5168 *
5169 * When Port Down timer expires we will start returning
5170 * I/O's to OS with "DID_NO_CONNECT".
5171 *
5172 * Link Down Timeout != 0:
5173 *
5174 * The driver waits for the link to come up after link down
5175 * before returning I/Os to OS with "DID_NO_CONNECT".
5176 */
5177 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5178 ha->loop_down_abort_time =
5179 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5180 } else {
5181 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5182 ha->loop_down_abort_time =
5183 (LOOP_DOWN_TIME - ha->link_down_timeout);
5184 }
5185
5186 /* Need enough time to try and get the port back. */
5187 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5188 if (qlport_down_retry)
5189 ha->port_down_retry_count = qlport_down_retry;
5190
5191 /* Set login_retry_count */
5192 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5193 if (ha->port_down_retry_count ==
5194 le16_to_cpu(nv->port_down_retry_count) &&
5195 ha->port_down_retry_count > 3)
5196 ha->login_retry_count = ha->port_down_retry_count;
5197 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5198 ha->login_retry_count = ha->port_down_retry_count;
5199 if (ql2xloginretrycount)
5200 ha->login_retry_count = ql2xloginretrycount;
5201
6246b8a1
GM		 5202 /* if not running MSI-X we need handshaking on interrupts */
5203 if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha))
5204 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
5205
3a03eb79
AV		 5206 /* Enable ZIO. */
5207 if (!vha->flags.init_done) {
5208 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5209 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5210 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5211 le16_to_cpu(icb->interrupt_delay_timer): 2;
5212 }
5213 icb->firmware_options_2 &= __constant_cpu_to_le32(
5214 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5215 vha->flags.process_response_queue = 0;
5216 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5217 ha->zio_mode = QLA_ZIO_MODE_6;
5218
7c3df132 5219 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 5220 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 5221 ha->zio_mode,
5222 ha->zio_timer * 100);
3a03eb79
AV		 5223
5224 icb->firmware_options_2 |= cpu_to_le32(
5225 (uint32_t)ha->zio_mode);
5226 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5227 vha->flags.process_response_queue = 1;
5228 }
5229
5230 if (rval) {
7c3df132
SK		 5231 ql_log(ql_log_warn, vha, 0x0076,
5232 "NVRAM configuration failed.\n");
3a03eb79
AV		 5233 }
5234 return (rval);
5235}
5236
a9083016
GM		 5237int
5238qla82xx_restart_isp(scsi_qla_host_t *vha)
5239{
5240 int status, rval;
5241 uint32_t wait_time;
5242 struct qla_hw_data *ha = vha->hw;
5243 struct req_que *req = ha->req_q_map[0];
5244 struct rsp_que *rsp = ha->rsp_q_map[0];
5245 struct scsi_qla_host *vp;
feafb7b1 5246 unsigned long flags;
a9083016
GM		 5247
5248 status = qla2x00_init_rings(vha);
5249 if (!status) {
5250 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5251 ha->flags.chip_reset_done = 1;
5252
5253 status = qla2x00_fw_ready(vha);
5254 if (!status) {
7c3df132
SK		 5255 ql_log(ql_log_info, vha, 0x803c,
5256 "Start configure loop, status =%d.\n", status);
a9083016
GM		 5257
5258 /* Issue a marker after FW becomes ready. */
5259 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5260
5261 vha->flags.online = 1;
5262 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5263 wait_time = 256;
5264 do {
5265 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5266 qla2x00_configure_loop(vha);
5267 wait_time--;
5268 } while (!atomic_read(&vha->loop_down_timer) &&
5269 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5270 wait_time &&
5271 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5272 }
5273
5274 /* if no cable then assume it's good */
5275 if ((vha->device_flags & DFLG_NO_CABLE))
5276 status = 0;
5277
cfb0919c 5278 ql_log(ql_log_info, vha, 0x8000,
7c3df132 5279 "Configure loop done, status = 0x%x.\n", status);
a9083016
GM		 5280 }
5281
5282 if (!status) {
5283 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5284
5285 if (!atomic_read(&vha->loop_down_timer)) {
5286 /*
5287 * Issue marker command only when we are going
5288 * to start the I/O .
5289 */
5290 vha->marker_needed = 1;
5291 }
5292
5293 vha->flags.online = 1;
5294
5295 ha->isp_ops->enable_intrs(ha);
5296
5297 ha->isp_abort_cnt = 0;
5298 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5299
53296788 5300 /* Update the firmware version */
3173167f 5301 status = qla82xx_check_md_needed(vha);
53296788 5302
a9083016
GM		 5303 if (ha->fce) {
5304 ha->flags.fce_enabled = 1;
5305 memset(ha->fce, 0,
5306 fce_calc_size(ha->fce_bufs));
5307 rval = qla2x00_enable_fce_trace(vha,
5308 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5309 &ha->fce_bufs);
5310 if (rval) {
cfb0919c 5311 ql_log(ql_log_warn, vha, 0x8001,
7c3df132
SK		 5312 "Unable to reinitialize FCE (%d).\n",
5313 rval);
a9083016
GM		 5314 ha->flags.fce_enabled = 0;
5315 }
5316 }
5317
5318 if (ha->eft) {
5319 memset(ha->eft, 0, EFT_SIZE);
5320 rval = qla2x00_enable_eft_trace(vha,
5321 ha->eft_dma, EFT_NUM_BUFFERS);
5322 if (rval) {
cfb0919c 5323 ql_log(ql_log_warn, vha, 0x8010,
7c3df132
SK		 5324 "Unable to reinitialize EFT (%d).\n",
5325 rval);
a9083016
GM		 5326 }
5327 }
a9083016
GM		 5328 }
5329
5330 if (!status) {
cfb0919c 5331 ql_dbg(ql_dbg_taskm, vha, 0x8011,
7c3df132 5332 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 5333
5334 spin_lock_irqsave(&ha->vport_slock, flags);
5335 list_for_each_entry(vp, &ha->vp_list, list) {
5336 if (vp->vp_idx) {
5337 atomic_inc(&vp->vref_count);
5338 spin_unlock_irqrestore(&ha->vport_slock, flags);
5339
a9083016 5340 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 5341
5342 spin_lock_irqsave(&ha->vport_slock, flags);
5343 atomic_dec(&vp->vref_count);
5344 }
a9083016 5345 }
feafb7b1
AE		 5346 spin_unlock_irqrestore(&ha->vport_slock, flags);
5347
a9083016 5348 } else {
cfb0919c 5349 ql_log(ql_log_warn, vha, 0x8016,
7c3df132 5350 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 5351 }
5352
5353 return status;
5354}
5355
3a03eb79 5356void
ae97c91e 5357qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 5358{
ae97c91e
AV		 5359 struct qla_hw_data *ha = vha->hw;
5360
5361 if (!ql2xetsenable)
5362 return;
5363
5364 /* Enable ETS Burst. */
5365 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5366 ha->fw_options[2] |= BIT_9;
5367 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 5368}
09ff701a
SR		 5369
5370/*
5371 * qla24xx_get_fcp_prio
5372 * Gets the fcp cmd priority value for the logged in port.
5373 * Looks for a match of the port descriptors within
5374 * each of the fcp prio config entries. If a match is found,
5375 * the tag (priority) value is returned.
5376 *
5377 * Input:
21090cbe 5378 * vha = scsi host structure pointer.
09ff701a
SR		 5379 * fcport = port structure pointer.
5380 *
5381 * Return:
6c452a45 5382 * non-zero (if found)
f28a0a96 5383 * -1 (if not found)
09ff701a
SR		 5384 *
5385 * Context:
5386 * Kernel context
5387 */
f28a0a96 5388static int
09ff701a
SR		 5389qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5390{
5391 int i, entries;
5392 uint8_t pid_match, wwn_match;
f28a0a96 5393 int priority;
09ff701a
SR		 5394 uint32_t pid1, pid2;
5395 uint64_t wwn1, wwn2;
5396 struct qla_fcp_prio_entry *pri_entry;
5397 struct qla_hw_data *ha = vha->hw;
5398
5399 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 5400 return -1;
09ff701a 5401
f28a0a96 5402 priority = -1;
09ff701a
SR		 5403 entries = ha->fcp_prio_cfg->num_entries;
5404 pri_entry = &ha->fcp_prio_cfg->entry[0];
5405
5406 for (i = 0; i < entries; i++) {
5407 pid_match = wwn_match = 0;
5408
5409 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5410 pri_entry++;
5411 continue;
5412 }
5413
5414 /* check source pid for a match */
5415 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5416 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5417 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
5418 if (pid1 == INVALID_PORT_ID)
5419 pid_match++;
5420 else if (pid1 == pid2)
5421 pid_match++;
5422 }
5423
5424 /* check destination pid for a match */
5425 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
5426 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
5427 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
5428 if (pid1 == INVALID_PORT_ID)
5429 pid_match++;
5430 else if (pid1 == pid2)
5431 pid_match++;
5432 }
5433
5434 /* check source WWN for a match */
5435 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
5436 wwn1 = wwn_to_u64(vha->port_name);
5437 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
5438 if (wwn2 == (uint64_t)-1)
5439 wwn_match++;
5440 else if (wwn1 == wwn2)
5441 wwn_match++;
5442 }
5443
5444 /* check destination WWN for a match */
5445 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
5446 wwn1 = wwn_to_u64(fcport->port_name);
5447 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
5448 if (wwn2 == (uint64_t)-1)
5449 wwn_match++;
5450 else if (wwn1 == wwn2)
5451 wwn_match++;
5452 }
5453
5454 if (pid_match == 2 || wwn_match == 2) {
5455 /* Found a matching entry */
5456 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
5457 priority = pri_entry->tag;
5458 break;
5459 }
5460
5461 pri_entry++;
5462 }
5463
5464 return priority;
5465}
5466
5467/*
5468 * qla24xx_update_fcport_fcp_prio
5469 * Activates fcp priority for the logged in fc port
5470 *
5471 * Input:
21090cbe 5472 * vha = scsi host structure pointer.
09ff701a
SR		 5473 * fcp = port structure pointer.
5474 *
5475 * Return:
5476 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5477 *
5478 * Context:
5479 * Kernel context.
5480 */
5481int
21090cbe 5482qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 5483{
5484 int ret;
f28a0a96 5485 int priority;
09ff701a
SR		 5486 uint16_t mb[5];
5487
21090cbe
MI		 5488 if (fcport->port_type != FCT_TARGET ||
5489 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 5490 return QLA_FUNCTION_FAILED;
5491
21090cbe 5492 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 5493 if (priority < 0)
5494 return QLA_FUNCTION_FAILED;
5495
a00f6296
SK		 5496 if (IS_QLA82XX(vha->hw)) {
5497 fcport->fcp_prio = priority & 0xf;
5498 return QLA_SUCCESS;
5499 }
5500
21090cbe 5501 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
cfb0919c
CD		 5502 if (ret == QLA_SUCCESS) {
5503 if (fcport->fcp_prio != priority)
5504 ql_dbg(ql_dbg_user, vha, 0x709e,
5505 "Updated FCP_CMND priority - value=%d loop_id=%d "
5506 "port_id=%02x%02x%02x.\n", priority,
5507 fcport->loop_id, fcport->d_id.b.domain,
5508 fcport->d_id.b.area, fcport->d_id.b.al_pa);
a00f6296 5509 fcport->fcp_prio = priority & 0xf;
cfb0919c 5510 } else
7c3df132 5511 ql_dbg(ql_dbg_user, vha, 0x704f,
cfb0919c
CD		 5512 "Unable to update FCP_CMND priority - ret=0x%x for "
5513 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
5514 fcport->d_id.b.domain, fcport->d_id.b.area,
5515 fcport->d_id.b.al_pa);
09ff701a
SR		 5516 return ret;
5517}
5518
5519/*
5520 * qla24xx_update_all_fcp_prio
5521 * Activates fcp priority for all the logged in ports
5522 *
5523 * Input:
5524 * ha = adapter block pointer.
5525 *
5526 * Return:
5527 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5528 *
5529 * Context:
5530 * Kernel context.
5531 */
5532int
5533qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
5534{
5535 int ret;
5536 fc_port_t *fcport;
5537
5538 ret = QLA_FUNCTION_FAILED;
5539 /* We need to set priority for all logged in ports */
5540 list_for_each_entry(fcport, &vha->vp_fcports, list)
5541 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
5542
5543 return ret;
5544}
Linux kernel - Deliverables
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