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[SCSI] qla2xxx: Increase speed of flash access in ISP82xx adapters to improve firmwar...
[deliverable/linux.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
07e264b7 3 * Copyright (c) 2003-2011 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
1da177e4
LT		 20/*
21* QLogic ISP2x00 Hardware Support Function Prototypes.
22*/
1da177e4 23static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 24static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 25static int qla2x00_init_rings(scsi_qla_host_t *);
26static int qla2x00_fw_ready(scsi_qla_host_t *);
27static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_configure_loop(scsi_qla_host_t *);
29static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_fabric(scsi_qla_host_t *);
31static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
1da177e4
LT		 32static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
33 uint16_t *);
1da177e4
LT		 34
35static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 36
4d4df193
HK		 37static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
38static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 39static int qla25xx_init_queues(struct qla_hw_data *);
4d4df193 40
ac280b67
AV		 41/* SRB Extensions ---------------------------------------------------------- */
42
9ba56b95
GM		 43void
44qla2x00_sp_timeout(unsigned long __data)
ac280b67
AV		 45{
46 srb_t *sp = (srb_t *)__data;
4916392b 47 struct srb_iocb *iocb;
ac280b67
AV		 48 fc_port_t *fcport = sp->fcport;
49 struct qla_hw_data *ha = fcport->vha->hw;
50 struct req_que *req;
51 unsigned long flags;
52
53 spin_lock_irqsave(&ha->hardware_lock, flags);
54 req = ha->req_q_map[0];
55 req->outstanding_cmds[sp->handle] = NULL;
9ba56b95 56 iocb = &sp->u.iocb_cmd;
4916392b 57 iocb->timeout(sp);
9ba56b95 58 sp->free(fcport->vha, sp);
6ac52608 59 spin_unlock_irqrestore(&ha->hardware_lock, flags);
ac280b67
AV		 60}
61
9ba56b95
GM		 62void
63qla2x00_sp_free(void *data, void *ptr)
ac280b67 64{
9ba56b95
GM		 65 srb_t *sp = (srb_t *)ptr;
66 struct srb_iocb *iocb = &sp->u.iocb_cmd;
67 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
ac280b67 68
4d97cc53 69 del_timer(&iocb->timer);
9ba56b95 70 mempool_free(sp, vha->hw->srb_mempool);
feafb7b1
AE		 71
72 QLA_VHA_MARK_NOT_BUSY(vha);
ac280b67
AV		 73}
74
ac280b67
AV		 75/* Asynchronous Login/Logout Routines -------------------------------------- */
76
5b91490e
AV		 77static inline unsigned long
78qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79{
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (!IS_FWI2_CAPABLE(ha)) {
86 /*
87 * Except for earlier ISPs where the timeout is seeded from the
88 * initialization control block.
89 */
90 tmo = ha->login_timeout;
91 }
92 return tmo;
93}
ac280b67
AV		 94
95static void
9ba56b95 96qla2x00_async_iocb_timeout(void *data)
ac280b67 97{
9ba56b95 98 srb_t *sp = (srb_t *)data;
ac280b67 99 fc_port_t *fcport = sp->fcport;
ac280b67 100
7c3df132 101 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
cfb0919c 102 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
9ba56b95 103 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
7c3df132 104 fcport->d_id.b.al_pa);
ac280b67 105
5ff1d584 106 fcport->flags &= ~FCF_ASYNC_SENT;
9ba56b95
GM		 107 if (sp->type == SRB_LOGIN_CMD) {
108 struct srb_iocb *lio = &sp->u.iocb_cmd;
ac280b67 109 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
6ac52608
AV		 110 /* Retry as needed. */
111 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
112 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
113 QLA_LOGIO_LOGIN_RETRIED : 0;
114 qla2x00_post_async_login_done_work(fcport->vha, fcport,
115 lio->u.logio.data);
116 }
ac280b67
AV		 117}
118
99b0bec7 119static void
9ba56b95 120qla2x00_async_login_sp_done(void *data, void *ptr, int res)
99b0bec7 121{
9ba56b95
GM		 122 srb_t *sp = (srb_t *)ptr;
123 struct srb_iocb *lio = &sp->u.iocb_cmd;
124 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
125
126 if (!test_bit(UNLOADING, &vha->dpc_flags))
127 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
128 lio->u.logio.data);
129 sp->free(sp->fcport->vha, sp);
99b0bec7
AV		 130}
131
ac280b67
AV		 132int
133qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
134 uint16_t *data)
135{
ac280b67 136 srb_t *sp;
4916392b 137 struct srb_iocb *lio;
ac280b67
AV		 138 int rval;
139
140 rval = QLA_FUNCTION_FAILED;
9ba56b95 141 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 142 if (!sp)
143 goto done;
144
9ba56b95
GM		 145 sp->type = SRB_LOGIN_CMD;
146 sp->name = "login";
147 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
148
149 lio = &sp->u.iocb_cmd;
3822263e 150 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 151 sp->done = qla2x00_async_login_sp_done;
4916392b 152 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
ac280b67 153 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 154 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
ac280b67
AV		 155 rval = qla2x00_start_sp(sp);
156 if (rval != QLA_SUCCESS)
157 goto done_free_sp;
158
7c3df132 159 ql_dbg(ql_dbg_disc, vha, 0x2072,
cfb0919c
CD		 160 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
161 "retries=%d.\n", sp->handle, fcport->loop_id,
162 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
163 fcport->login_retry);
ac280b67
AV		 164 return rval;
165
166done_free_sp:
9ba56b95 167 sp->free(fcport->vha, sp);
ac280b67
AV		 168done:
169 return rval;
170}
171
99b0bec7 172static void
9ba56b95 173qla2x00_async_logout_sp_done(void *data, void *ptr, int res)
99b0bec7 174{
9ba56b95
GM		 175 srb_t *sp = (srb_t *)ptr;
176 struct srb_iocb *lio = &sp->u.iocb_cmd;
177 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
178
179 if (!test_bit(UNLOADING, &vha->dpc_flags))
180 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
181 lio->u.logio.data);
182 sp->free(sp->fcport->vha, sp);
99b0bec7
AV		 183}
184
ac280b67
AV		 185int
186qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
187{
ac280b67 188 srb_t *sp;
4916392b 189 struct srb_iocb *lio;
ac280b67
AV		 190 int rval;
191
192 rval = QLA_FUNCTION_FAILED;
9ba56b95 193 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 194 if (!sp)
195 goto done;
196
9ba56b95
GM		 197 sp->type = SRB_LOGOUT_CMD;
198 sp->name = "logout";
199 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
200
201 lio = &sp->u.iocb_cmd;
3822263e 202 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 203 sp->done = qla2x00_async_logout_sp_done;
ac280b67
AV		 204 rval = qla2x00_start_sp(sp);
205 if (rval != QLA_SUCCESS)
206 goto done_free_sp;
207
7c3df132 208 ql_dbg(ql_dbg_disc, vha, 0x2070,
cfb0919c
CD		 209 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
210 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
211 fcport->d_id.b.area, fcport->d_id.b.al_pa);
ac280b67
AV		 212 return rval;
213
214done_free_sp:
9ba56b95 215 sp->free(fcport->vha, sp);
ac280b67
AV		 216done:
217 return rval;
218}
219
5ff1d584 220static void
9ba56b95 221qla2x00_async_adisc_sp_done(void *data, void *ptr, int res)
5ff1d584 222{
9ba56b95
GM		 223 srb_t *sp = (srb_t *)ptr;
224 struct srb_iocb *lio = &sp->u.iocb_cmd;
225 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
226
227 if (!test_bit(UNLOADING, &vha->dpc_flags))
228 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
229 lio->u.logio.data);
230 sp->free(sp->fcport->vha, sp);
5ff1d584
AV		 231}
232
233int
234qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
235 uint16_t *data)
236{
5ff1d584 237 srb_t *sp;
4916392b 238 struct srb_iocb *lio;
5ff1d584
AV		 239 int rval;
240
241 rval = QLA_FUNCTION_FAILED;
9ba56b95 242 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
5ff1d584
AV		 243 if (!sp)
244 goto done;
245
9ba56b95
GM		 246 sp->type = SRB_ADISC_CMD;
247 sp->name = "adisc";
248 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
249
250 lio = &sp->u.iocb_cmd;
3822263e 251 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 252 sp->done = qla2x00_async_adisc_sp_done;
5ff1d584 253 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 254 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584
AV		 255 rval = qla2x00_start_sp(sp);
256 if (rval != QLA_SUCCESS)
257 goto done_free_sp;
258
7c3df132 259 ql_dbg(ql_dbg_disc, vha, 0x206f,
cfb0919c
CD		 260 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
261 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
262 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5ff1d584
AV		 263 return rval;
264
265done_free_sp:
9ba56b95 266 sp->free(fcport->vha, sp);
5ff1d584
AV		 267done:
268 return rval;
269}
270
3822263e 271static void
9ba56b95 272qla2x00_async_tm_cmd_done(void *data, void *ptr, int res)
3822263e 273{
9ba56b95
GM		 274 srb_t *sp = (srb_t *)ptr;
275 struct srb_iocb *iocb = &sp->u.iocb_cmd;
276 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
277 uint32_t flags;
278 uint16_t lun;
279 int rval;
3822263e 280
9ba56b95
GM		 281 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
282 flags = iocb->u.tmf.flags;
283 lun = (uint16_t)iocb->u.tmf.lun;
284
285 /* Issue Marker IOCB */
286 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
287 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
288 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
289
290 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
291 ql_dbg(ql_dbg_taskm, vha, 0x8030,
292 "TM IOCB failed (%x).\n", rval);
293 }
294 }
295 sp->free(sp->fcport->vha, sp);
3822263e
MI		 296}
297
298int
9ba56b95 299qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun,
3822263e
MI		 300 uint32_t tag)
301{
302 struct scsi_qla_host *vha = fcport->vha;
3822263e 303 srb_t *sp;
3822263e
MI		 304 struct srb_iocb *tcf;
305 int rval;
306
307 rval = QLA_FUNCTION_FAILED;
9ba56b95 308 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
3822263e
MI		 309 if (!sp)
310 goto done;
311
9ba56b95
GM		 312 sp->type = SRB_TM_CMD;
313 sp->name = "tmf";
314 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
315
316 tcf = &sp->u.iocb_cmd;
317 tcf->u.tmf.flags = tm_flags;
3822263e
MI		 318 tcf->u.tmf.lun = lun;
319 tcf->u.tmf.data = tag;
320 tcf->timeout = qla2x00_async_iocb_timeout;
9ba56b95 321 sp->done = qla2x00_async_tm_cmd_done;
3822263e
MI		 322
323 rval = qla2x00_start_sp(sp);
324 if (rval != QLA_SUCCESS)
325 goto done_free_sp;
326
7c3df132 327 ql_dbg(ql_dbg_taskm, vha, 0x802f,
cfb0919c
CD		 328 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
329 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
330 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3822263e
MI		 331 return rval;
332
333done_free_sp:
9ba56b95 334 sp->free(fcport->vha, sp);
3822263e
MI		 335done:
336 return rval;
337}
338
4916392b 339void
ac280b67
AV		 340qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
341 uint16_t *data)
342{
343 int rval;
ac280b67
AV		 344
345 switch (data[0]) {
346 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 347 /*
348 * Driver must validate login state - If PRLI not complete,
349 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
350 * requests.
351 */
352 rval = qla2x00_get_port_database(vha, fcport, 0);
353 if (rval != QLA_SUCCESS) {
354 qla2x00_post_async_logout_work(vha, fcport, NULL);
355 qla2x00_post_async_login_work(vha, fcport, NULL);
356 break;
357 }
99b0bec7 358 if (fcport->flags & FCF_FCP2_DEVICE) {
5ff1d584
AV		 359 qla2x00_post_async_adisc_work(vha, fcport, data);
360 break;
99b0bec7
AV		 361 }
362 qla2x00_update_fcport(vha, fcport);
ac280b67
AV		 363 break;
364 case MBS_COMMAND_ERROR:
5ff1d584 365 fcport->flags &= ~FCF_ASYNC_SENT;
ac280b67
AV		 366 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
367 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
368 else
80d79440 369 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 370 break;
371 case MBS_PORT_ID_USED:
372 fcport->loop_id = data[1];
6ac52608 373 qla2x00_post_async_logout_work(vha, fcport, NULL);
ac280b67
AV		 374 qla2x00_post_async_login_work(vha, fcport, NULL);
375 break;
376 case MBS_LOOP_ID_USED:
377 fcport->loop_id++;
378 rval = qla2x00_find_new_loop_id(vha, fcport);
379 if (rval != QLA_SUCCESS) {
5ff1d584 380 fcport->flags &= ~FCF_ASYNC_SENT;
80d79440 381 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 382 break;
383 }
384 qla2x00_post_async_login_work(vha, fcport, NULL);
385 break;
386 }
4916392b 387 return;
ac280b67
AV		 388}
389
4916392b 390void
ac280b67
AV		 391qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
392 uint16_t *data)
393{
394 qla2x00_mark_device_lost(vha, fcport, 1, 0);
4916392b 395 return;
ac280b67
AV		 396}
397
4916392b 398void
5ff1d584
AV		 399qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
400 uint16_t *data)
401{
402 if (data[0] == MBS_COMMAND_COMPLETE) {
403 qla2x00_update_fcport(vha, fcport);
404
4916392b 405 return;
5ff1d584
AV		 406 }
407
408 /* Retry login. */
409 fcport->flags &= ~FCF_ASYNC_SENT;
410 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
411 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
412 else
80d79440 413 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5ff1d584 414
4916392b 415 return;
5ff1d584
AV		 416}
417
1da177e4
LT		 418/****************************************************************************/
419/* QLogic ISP2x00 Hardware Support Functions. */
420/****************************************************************************/
421
422/*
423* qla2x00_initialize_adapter
424* Initialize board.
425*
426* Input:
427* ha = adapter block pointer.
428*
429* Returns:
430* 0 = success
431*/
432int
e315cd28 433qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 434{
435 int rval;
e315cd28 436 struct qla_hw_data *ha = vha->hw;
73208dfd 437 struct req_que *req = ha->req_q_map[0];
2533cf67 438
1da177e4 439 /* Clear adapter flags. */
e315cd28 440 vha->flags.online = 0;
2533cf67 441 ha->flags.chip_reset_done = 0;
e315cd28 442 vha->flags.reset_active = 0;
85880801
AV		 443 ha->flags.pci_channel_io_perm_failure = 0;
444 ha->flags.eeh_busy = 0;
794a5691 445 ha->flags.thermal_supported = 1;
e315cd28
AC		 446 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
447 atomic_set(&vha->loop_state, LOOP_DOWN);
448 vha->device_flags = DFLG_NO_CABLE;
449 vha->dpc_flags = 0;
450 vha->flags.management_server_logged_in = 0;
451 vha->marker_needed = 0;
1da177e4
LT		 452 ha->isp_abort_cnt = 0;
453 ha->beacon_blink_led = 0;
454
73208dfd
AC		 455 set_bit(0, ha->req_qid_map);
456 set_bit(0, ha->rsp_qid_map);
457
cfb0919c 458 ql_dbg(ql_dbg_init, vha, 0x0040,
7c3df132 459 "Configuring PCI space...\n");
e315cd28 460 rval = ha->isp_ops->pci_config(vha);
1da177e4 461 if (rval) {
7c3df132
SK		 462 ql_log(ql_log_warn, vha, 0x0044,
463 "Unable to configure PCI space.\n");
1da177e4
LT		 464 return (rval);
465 }
466
e315cd28 467 ha->isp_ops->reset_chip(vha);
1da177e4 468
e315cd28 469 rval = qla2xxx_get_flash_info(vha);
c00d8994 470 if (rval) {
7c3df132
SK		 471 ql_log(ql_log_fatal, vha, 0x004f,
472 "Unable to validate FLASH data.\n");
c00d8994
AV		 473 return (rval);
474 }
475
73208dfd 476 ha->isp_ops->get_flash_version(vha, req->ring);
cfb0919c 477 ql_dbg(ql_dbg_init, vha, 0x0061,
7c3df132 478 "Configure NVRAM parameters...\n");
0107109e 479
e315cd28 480 ha->isp_ops->nvram_config(vha);
1da177e4 481
d4c760c2
AV		 482 if (ha->flags.disable_serdes) {
483 /* Mask HBA via NVRAM settings? */
7c3df132
SK		 484 ql_log(ql_log_info, vha, 0x0077,
485 "Masking HBA WWPN "
d4c760c2 486 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
e315cd28
AC		 487 vha->port_name[0], vha->port_name[1],
488 vha->port_name[2], vha->port_name[3],
489 vha->port_name[4], vha->port_name[5],
490 vha->port_name[6], vha->port_name[7]);
d4c760c2
AV		 491 return QLA_FUNCTION_FAILED;
492 }
493
cfb0919c 494 ql_dbg(ql_dbg_init, vha, 0x0078,
7c3df132 495 "Verifying loaded RISC code...\n");
1da177e4 496
e315cd28
AC		 497 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
498 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 499 if (rval)
500 return (rval);
e315cd28 501 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 502 if (rval)
503 return (rval);
1da177e4 504 }
a9083016 505
4d4df193 506 if (IS_QLA84XX(ha)) {
e315cd28 507 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 508 if (!ha->cs84xx) {
7c3df132 509 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 510 "Unable to configure ISP84XX.\n");
511 return QLA_FUNCTION_FAILED;
512 }
513 }
e315cd28 514 rval = qla2x00_init_rings(vha);
2533cf67 515 ha->flags.chip_reset_done = 1;
1da177e4 516
9a069e19 517 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 518 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 519 rval = qla84xx_init_chip(vha);
520 if (rval != QLA_SUCCESS) {
7c3df132
SK		 521 ql_log(ql_log_warn, vha, 0x00d4,
522 "Unable to initialize ISP84XX.\n");
9a069e19
GM		 523 qla84xx_put_chip(vha);
524 }
525 }
526
2f0f3f4f
MI		 527 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
528 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 529
1da177e4
LT		 530 return (rval);
531}
532
533/**
abbd8870 534 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
1da177e4
LT		 535 * @ha: HA context
536 *
537 * Returns 0 on success.
538 */
abbd8870 539int
e315cd28 540qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 541{
a157b101 542 uint16_t w;
abbd8870 543 unsigned long flags;
e315cd28 544 struct qla_hw_data *ha = vha->hw;
3d71644c 545 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 546
1da177e4 547 pci_set_master(ha->pdev);
af6177d8 548 pci_try_set_mwi(ha->pdev);
1da177e4 549
1da177e4 550 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 551 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 552 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
553
737faece 554 pci_disable_rom(ha->pdev);
1da177e4
LT		 555
556 /* Get PCI bus information. */
557 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 558 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 559 spin_unlock_irqrestore(&ha->hardware_lock, flags);
560
abbd8870
AV		 561 return QLA_SUCCESS;
562}
1da177e4 563
abbd8870
AV		 564/**
565 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
566 * @ha: HA context
567 *
568 * Returns 0 on success.
569 */
570int
e315cd28 571qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 572{
a157b101 573 uint16_t w;
abbd8870
AV		 574 unsigned long flags = 0;
575 uint32_t cnt;
e315cd28 576 struct qla_hw_data *ha = vha->hw;
3d71644c 577 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 578
abbd8870 579 pci_set_master(ha->pdev);
af6177d8 580 pci_try_set_mwi(ha->pdev);
1da177e4 581
abbd8870 582 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 583 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 584
abbd8870
AV		 585 if (IS_QLA2322(ha) || IS_QLA6322(ha))
586 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 587 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 588
abbd8870
AV		 589 /*
590 * If this is a 2300 card and not 2312, reset the
591 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
592 * the 2310 also reports itself as a 2300 so we need to get the
593 * fb revision level -- a 6 indicates it really is a 2300 and
594 * not a 2310.
595 */
596 if (IS_QLA2300(ha)) {
597 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 598
abbd8870 599 /* Pause RISC. */
3d71644c 600 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 601 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 602 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 603 break;
1da177e4 604
abbd8870
AV		 605 udelay(10);
606 }
1da177e4 607
abbd8870 608 /* Select FPM registers. */
3d71644c
AV		 609 WRT_REG_WORD(&reg->ctrl_status, 0x20);
610 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 611
612 /* Get the fb rev level */
3d71644c 613 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 614
615 if (ha->fb_rev == FPM_2300)
a157b101 616 pci_clear_mwi(ha->pdev);
abbd8870
AV		 617
618 /* Deselect FPM registers. */
3d71644c
AV		 619 WRT_REG_WORD(&reg->ctrl_status, 0x0);
620 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 621
622 /* Release RISC module. */
3d71644c 623 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 624 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 625 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 626 break;
627
628 udelay(10);
1da177e4 629 }
1da177e4 630
abbd8870
AV		 631 spin_unlock_irqrestore(&ha->hardware_lock, flags);
632 }
1da177e4 633
abbd8870
AV		 634 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
635
737faece 636 pci_disable_rom(ha->pdev);
1da177e4 637
abbd8870
AV		 638 /* Get PCI bus information. */
639 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 640 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 641 spin_unlock_irqrestore(&ha->hardware_lock, flags);
642
643 return QLA_SUCCESS;
1da177e4
LT		 644}
645
0107109e
AV		 646/**
647 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
648 * @ha: HA context
649 *
650 * Returns 0 on success.
651 */
652int
e315cd28 653qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 654{
a157b101 655 uint16_t w;
0107109e 656 unsigned long flags = 0;
e315cd28 657 struct qla_hw_data *ha = vha->hw;
0107109e 658 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 659
660 pci_set_master(ha->pdev);
af6177d8 661 pci_try_set_mwi(ha->pdev);
0107109e
AV		 662
663 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 664 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 665 w &= ~PCI_COMMAND_INTX_DISABLE;
666 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
667
668 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
669
670 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 671 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
672 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 673
674 /* PCIe -- adjust Maximum Read Request Size (2048). */
f85ec187
AV		 675 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
676 pcie_set_readrq(ha->pdev, 2048);
0107109e 677
737faece 678 pci_disable_rom(ha->pdev);
0107109e 679
44c10138 680 ha->chip_revision = ha->pdev->revision;
a8488abe 681
0107109e
AV		 682 /* Get PCI bus information. */
683 spin_lock_irqsave(&ha->hardware_lock, flags);
684 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
685 spin_unlock_irqrestore(&ha->hardware_lock, flags);
686
687 return QLA_SUCCESS;
688}
689
c3a2f0df
AV		 690/**
691 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
692 * @ha: HA context
693 *
694 * Returns 0 on success.
695 */
696int
e315cd28 697qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 698{
699 uint16_t w;
e315cd28 700 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 701
702 pci_set_master(ha->pdev);
703 pci_try_set_mwi(ha->pdev);
704
705 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
706 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
707 w &= ~PCI_COMMAND_INTX_DISABLE;
708 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
709
710 /* PCIe -- adjust Maximum Read Request Size (2048). */
711 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
712 pcie_set_readrq(ha->pdev, 2048);
713
737faece 714 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 715
716 ha->chip_revision = ha->pdev->revision;
717
718 return QLA_SUCCESS;
719}
720
1da177e4
LT		 721/**
722 * qla2x00_isp_firmware() - Choose firmware image.
723 * @ha: HA context
724 *
725 * Returns 0 on success.
726 */
727static int
e315cd28 728qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 729{
730 int rval;
42e421b1
AV		 731 uint16_t loop_id, topo, sw_cap;
732 uint8_t domain, area, al_pa;
e315cd28 733 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 734
735 /* Assume loading risc code */
fa2a1ce5 736 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 737
738 if (ha->flags.disable_risc_code_load) {
7c3df132 739 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 740
741 /* Verify checksum of loaded RISC code. */
e315cd28 742 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 743 if (rval == QLA_SUCCESS) {
744 /* And, verify we are not in ROM code. */
e315cd28 745 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 746 &area, &domain, &topo, &sw_cap);
747 }
1da177e4
LT		 748 }
749
7c3df132
SK		 750 if (rval)
751 ql_dbg(ql_dbg_init, vha, 0x007a,
752 "**** Load RISC code ****.\n");
1da177e4
LT		 753
754 return (rval);
755}
756
757/**
758 * qla2x00_reset_chip() - Reset ISP chip.
759 * @ha: HA context
760 *
761 * Returns 0 on success.
762 */
abbd8870 763void
e315cd28 764qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 765{
766 unsigned long flags = 0;
e315cd28 767 struct qla_hw_data *ha = vha->hw;
3d71644c 768 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 769 uint32_t cnt;
1da177e4
LT		 770 uint16_t cmd;
771
85880801
AV		 772 if (unlikely(pci_channel_offline(ha->pdev)))
773 return;
774
fd34f556 775 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 776
777 spin_lock_irqsave(&ha->hardware_lock, flags);
778
779 /* Turn off master enable */
780 cmd = 0;
781 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
782 cmd &= ~PCI_COMMAND_MASTER;
783 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
784
785 if (!IS_QLA2100(ha)) {
786 /* Pause RISC. */
787 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
788 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
789 for (cnt = 0; cnt < 30000; cnt++) {
790 if ((RD_REG_WORD(&reg->hccr) &
791 HCCR_RISC_PAUSE) != 0)
792 break;
793 udelay(100);
794 }
795 } else {
796 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
797 udelay(10);
798 }
799
800 /* Select FPM registers. */
801 WRT_REG_WORD(&reg->ctrl_status, 0x20);
802 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
803
804 /* FPM Soft Reset. */
805 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
806 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
807
808 /* Toggle Fpm Reset. */
809 if (!IS_QLA2200(ha)) {
810 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
811 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
812 }
813
814 /* Select frame buffer registers. */
815 WRT_REG_WORD(&reg->ctrl_status, 0x10);
816 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
817
818 /* Reset frame buffer FIFOs. */
819 if (IS_QLA2200(ha)) {
820 WRT_FB_CMD_REG(ha, reg, 0xa000);
821 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
822 } else {
823 WRT_FB_CMD_REG(ha, reg, 0x00fc);
824
825 /* Read back fb_cmd until zero or 3 seconds max */
826 for (cnt = 0; cnt < 3000; cnt++) {
827 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
828 break;
829 udelay(100);
830 }
831 }
832
833 /* Select RISC module registers. */
834 WRT_REG_WORD(&reg->ctrl_status, 0);
835 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
836
837 /* Reset RISC processor. */
838 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
839 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
840
841 /* Release RISC processor. */
842 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
843 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
844 }
845
846 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
847 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
848
849 /* Reset ISP chip. */
850 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
851
852 /* Wait for RISC to recover from reset. */
853 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
854 /*
855 * It is necessary to for a delay here since the card doesn't
856 * respond to PCI reads during a reset. On some architectures
857 * this will result in an MCA.
858 */
859 udelay(20);
860 for (cnt = 30000; cnt; cnt--) {
861 if ((RD_REG_WORD(&reg->ctrl_status) &
862 CSR_ISP_SOFT_RESET) == 0)
863 break;
864 udelay(100);
865 }
866 } else
867 udelay(10);
868
869 /* Reset RISC processor. */
870 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
871
872 WRT_REG_WORD(&reg->semaphore, 0);
873
874 /* Release RISC processor. */
875 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
876 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
877
878 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
879 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 880 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 881 break;
1da177e4
LT		 882
883 udelay(100);
884 }
885 } else
886 udelay(100);
887
888 /* Turn on master enable */
889 cmd |= PCI_COMMAND_MASTER;
890 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
891
892 /* Disable RISC pause on FPM parity error. */
893 if (!IS_QLA2100(ha)) {
894 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
895 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
896 }
897
898 spin_unlock_irqrestore(&ha->hardware_lock, flags);
899}
900
b1d46989
MI		 901/**
902 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
903 *
904 * Returns 0 on success.
905 */
906int
907qla81xx_reset_mpi(scsi_qla_host_t *vha)
908{
909 uint16_t mb[4] = {0x1010, 0, 1, 0};
910
6246b8a1
GM		 911 if (!IS_QLA81XX(vha->hw))
912 return QLA_SUCCESS;
913
b1d46989
MI		 914 return qla81xx_write_mpi_register(vha, mb);
915}
916
0107109e 917/**
88c26663 918 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
0107109e
AV		 919 * @ha: HA context
920 *
921 * Returns 0 on success.
922 */
88c26663 923static inline void
e315cd28 924qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 925{
926 unsigned long flags = 0;
e315cd28 927 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 928 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
929 uint32_t cnt, d2;
335a1cc9 930 uint16_t wd;
b1d46989 931 static int abts_cnt; /* ISP abort retry counts */
0107109e 932
0107109e
AV		 933 spin_lock_irqsave(&ha->hardware_lock, flags);
934
935 /* Reset RISC. */
936 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
937 for (cnt = 0; cnt < 30000; cnt++) {
938 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
939 break;
940
941 udelay(10);
942 }
943
944 WRT_REG_DWORD(&reg->ctrl_status,
945 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 946 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 947
335a1cc9 948 udelay(100);
88c26663 949 /* Wait for firmware to complete NVRAM accesses. */
88c26663
AV		 950 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
951 for (cnt = 10000 ; cnt && d2; cnt--) {
952 udelay(5);
953 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
954 barrier();
955 }
956
335a1cc9 957 /* Wait for soft-reset to complete. */
0107109e
AV		 958 d2 = RD_REG_DWORD(&reg->ctrl_status);
959 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
960 udelay(5);
961 d2 = RD_REG_DWORD(&reg->ctrl_status);
962 barrier();
963 }
964
b1d46989
MI		 965 /* If required, do an MPI FW reset now */
966 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
967 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
968 if (++abts_cnt < 5) {
969 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
970 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
971 } else {
972 /*
973 * We exhausted the ISP abort retries. We have to
974 * set the board offline.
975 */
976 abts_cnt = 0;
977 vha->flags.online = 0;
978 }
979 }
980 }
981
0107109e
AV		 982 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
983 RD_REG_DWORD(&reg->hccr);
984
985 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
986 RD_REG_DWORD(&reg->hccr);
987
988 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
989 RD_REG_DWORD(&reg->hccr);
990
991 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
992 for (cnt = 6000000 ; cnt && d2; cnt--) {
993 udelay(5);
994 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
995 barrier();
996 }
997
998 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6
AV		 999
1000 if (IS_NOPOLLING_TYPE(ha))
1001 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 1002}
1003
88c26663
AV		 1004/**
1005 * qla24xx_reset_chip() - Reset ISP24xx chip.
1006 * @ha: HA context
1007 *
1008 * Returns 0 on success.
1009 */
1010void
e315cd28 1011qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 1012{
e315cd28 1013 struct qla_hw_data *ha = vha->hw;
85880801
AV		 1014
1015 if (pci_channel_offline(ha->pdev) &&
1016 ha->flags.pci_channel_io_perm_failure) {
1017 return;
1018 }
1019
fd34f556 1020 ha->isp_ops->disable_intrs(ha);
88c26663
AV		 1021
1022 /* Perform RISC reset. */
e315cd28 1023 qla24xx_reset_risc(vha);
88c26663
AV		 1024}
1025
1da177e4
LT		 1026/**
1027 * qla2x00_chip_diag() - Test chip for proper operation.
1028 * @ha: HA context
1029 *
1030 * Returns 0 on success.
1031 */
abbd8870 1032int
e315cd28 1033qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 1034{
1035 int rval;
e315cd28 1036 struct qla_hw_data *ha = vha->hw;
3d71644c 1037 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 1038 unsigned long flags = 0;
1039 uint16_t data;
1040 uint32_t cnt;
1041 uint16_t mb[5];
73208dfd 1042 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 1043
1044 /* Assume a failed state */
1045 rval = QLA_FUNCTION_FAILED;
1046
7c3df132
SK		 1047 ql_dbg(ql_dbg_init, vha, 0x007b,
1048 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1da177e4
LT		 1049
1050 spin_lock_irqsave(&ha->hardware_lock, flags);
1051
1052 /* Reset ISP chip. */
1053 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1054
1055 /*
1056 * We need to have a delay here since the card will not respond while
1057 * in reset causing an MCA on some architectures.
1058 */
1059 udelay(20);
1060 data = qla2x00_debounce_register(&reg->ctrl_status);
1061 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1062 udelay(5);
1063 data = RD_REG_WORD(&reg->ctrl_status);
1064 barrier();
1065 }
1066
1067 if (!cnt)
1068 goto chip_diag_failed;
1069
7c3df132
SK		 1070 ql_dbg(ql_dbg_init, vha, 0x007c,
1071 "Reset register cleared by chip reset.\n");
1da177e4
LT		 1072
1073 /* Reset RISC processor. */
1074 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1075 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1076
1077 /* Workaround for QLA2312 PCI parity error */
1078 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1079 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1080 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1081 udelay(5);
1082 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 1083 barrier();
1da177e4
LT		 1084 }
1085 } else
1086 udelay(10);
1087
1088 if (!cnt)
1089 goto chip_diag_failed;
1090
1091 /* Check product ID of chip */
7c3df132 1092 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1da177e4
LT		 1093
1094 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1095 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1096 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1097 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1098 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1099 mb[3] != PROD_ID_3) {
7c3df132
SK		 1100 ql_log(ql_log_warn, vha, 0x0062,
1101 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1102 mb[1], mb[2], mb[3]);
1da177e4
LT		 1103
1104 goto chip_diag_failed;
1105 }
1106 ha->product_id[0] = mb[1];
1107 ha->product_id[1] = mb[2];
1108 ha->product_id[2] = mb[3];
1109 ha->product_id[3] = mb[4];
1110
1111 /* Adjust fw RISC transfer size */
73208dfd 1112 if (req->length > 1024)
1da177e4
LT		 1113 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1114 else
1115 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 1116 req->length;
1da177e4
LT		 1117
1118 if (IS_QLA2200(ha) &&
1119 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1120 /* Limit firmware transfer size with a 2200A */
7c3df132 1121 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 1122
ea5b6382 1123 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 1124 ha->fw_transfer_size = 128;
1125 }
1126
1127 /* Wrap Incoming Mailboxes Test. */
1128 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1129
7c3df132 1130 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 1131 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 1132 if (rval)
1133 ql_log(ql_log_warn, vha, 0x0080,
1134 "Failed mailbox send register test.\n");
1135 else
1da177e4
LT		 1136 /* Flag a successful rval */
1137 rval = QLA_SUCCESS;
1da177e4
LT		 1138 spin_lock_irqsave(&ha->hardware_lock, flags);
1139
1140chip_diag_failed:
1141 if (rval)
7c3df132
SK		 1142 ql_log(ql_log_info, vha, 0x0081,
1143 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 1144
1145 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1146
1147 return (rval);
1148}
1149
0107109e
AV		 1150/**
1151 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1152 * @ha: HA context
1153 *
1154 * Returns 0 on success.
1155 */
1156int
e315cd28 1157qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 1158{
1159 int rval;
e315cd28 1160 struct qla_hw_data *ha = vha->hw;
73208dfd 1161 struct req_que *req = ha->req_q_map[0];
0107109e 1162
a9083016
GM		 1163 if (IS_QLA82XX(ha))
1164 return QLA_SUCCESS;
1165
73208dfd 1166 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 1167
e315cd28 1168 rval = qla2x00_mbx_reg_test(vha);
0107109e 1169 if (rval) {
7c3df132
SK		 1170 ql_log(ql_log_warn, vha, 0x0082,
1171 "Failed mailbox send register test.\n");
0107109e
AV		 1172 } else {
1173 /* Flag a successful rval */
1174 rval = QLA_SUCCESS;
1175 }
1176
1177 return rval;
1178}
1179
a7a167bf 1180void
e315cd28 1181qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
0107109e 1182{
a7a167bf
AV		 1183 int rval;
1184 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
73208dfd 1185 eft_size, fce_size, mq_size;
df613b96
AV		 1186 dma_addr_t tc_dma;
1187 void *tc;
e315cd28 1188 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1189 struct req_que *req = ha->req_q_map[0];
1190 struct rsp_que *rsp = ha->rsp_q_map[0];
a7a167bf
AV		 1191
1192 if (ha->fw_dump) {
7c3df132
SK		 1193 ql_dbg(ql_dbg_init, vha, 0x00bd,
1194 "Firmware dump already allocated.\n");
a7a167bf
AV		 1195 return;
1196 }
d4e3e04d 1197
0107109e 1198 ha->fw_dumped = 0;
73208dfd 1199 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
d4e3e04d 1200 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
a7a167bf 1201 fixed_size = sizeof(struct qla2100_fw_dump);
d4e3e04d 1202 } else if (IS_QLA23XX(ha)) {
a7a167bf
AV		 1203 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1204 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1205 sizeof(uint16_t);
e428924c 1206 } else if (IS_FWI2_CAPABLE(ha)) {
6246b8a1
GM		 1207 if (IS_QLA83XX(ha))
1208 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1209 else if (IS_QLA81XX(ha))
3a03eb79
AV		 1210 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1211 else if (IS_QLA25XX(ha))
1212 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1213 else
1214 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
a7a167bf
AV		 1215 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1216 sizeof(uint32_t);
050c9bb1 1217 if (ha->mqenable) {
6246b8a1
GM		 1218 if (!IS_QLA83XX(ha))
1219 mq_size = sizeof(struct qla2xxx_mq_chain);
050c9bb1
GM		 1220 /*
1221 * Allocate maximum buffer size for all queues.
1222 * Resizing must be done at end-of-dump processing.
1223 */
1224 mq_size += ha->max_req_queues *
1225 (req->length * sizeof(request_t));
1226 mq_size += ha->max_rsp_queues *
1227 (rsp->length * sizeof(response_t));
1228 }
df613b96 1229 /* Allocate memory for Fibre Channel Event Buffer. */
6246b8a1 1230 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
436a7b11 1231 goto try_eft;
df613b96
AV		 1232
1233 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1234 GFP_KERNEL);
1235 if (!tc) {
7c3df132
SK		 1236 ql_log(ql_log_warn, vha, 0x00be,
1237 "Unable to allocate (%d KB) for FCE.\n",
1238 FCE_SIZE / 1024);
17d98630 1239 goto try_eft;
df613b96
AV		 1240 }
1241
1242 memset(tc, 0, FCE_SIZE);
e315cd28 1243 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 1244 ha->fce_mb, &ha->fce_bufs);
1245 if (rval) {
7c3df132
SK		 1246 ql_log(ql_log_warn, vha, 0x00bf,
1247 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 1248 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1249 tc_dma);
1250 ha->flags.fce_enabled = 0;
17d98630 1251 goto try_eft;
df613b96 1252 }
cfb0919c 1253 ql_dbg(ql_dbg_init, vha, 0x00c0,
7c3df132 1254 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 1255
7d9dade3 1256 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
df613b96
AV		 1257 ha->flags.fce_enabled = 1;
1258 ha->fce_dma = tc_dma;
1259 ha->fce = tc;
436a7b11
AV		 1260try_eft:
1261 /* Allocate memory for Extended Trace Buffer. */
1262 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1263 GFP_KERNEL);
1264 if (!tc) {
7c3df132
SK		 1265 ql_log(ql_log_warn, vha, 0x00c1,
1266 "Unable to allocate (%d KB) for EFT.\n",
1267 EFT_SIZE / 1024);
436a7b11
AV		 1268 goto cont_alloc;
1269 }
1270
1271 memset(tc, 0, EFT_SIZE);
e315cd28 1272 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 1273 if (rval) {
7c3df132
SK		 1274 ql_log(ql_log_warn, vha, 0x00c2,
1275 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 1276 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1277 tc_dma);
1278 goto cont_alloc;
1279 }
cfb0919c 1280 ql_dbg(ql_dbg_init, vha, 0x00c3,
7c3df132 1281 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11
AV		 1282
1283 eft_size = EFT_SIZE;
1284 ha->eft_dma = tc_dma;
1285 ha->eft = tc;
d4e3e04d 1286 }
a7a167bf 1287cont_alloc:
73208dfd
AC		 1288 req_q_size = req->length * sizeof(request_t);
1289 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf
AV		 1290
1291 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 1292 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 1293 ha->chain_offset = dump_size;
1294 dump_size += mq_size + fce_size;
d4e3e04d
AV		 1295
1296 ha->fw_dump = vmalloc(dump_size);
a7a167bf 1297 if (!ha->fw_dump) {
7c3df132
SK		 1298 ql_log(ql_log_warn, vha, 0x00c4,
1299 "Unable to allocate (%d KB) for firmware dump.\n",
1300 dump_size / 1024);
a7a167bf 1301
e30d1756
MI		 1302 if (ha->fce) {
1303 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1304 ha->fce_dma);
1305 ha->fce = NULL;
1306 ha->fce_dma = 0;
1307 }
1308
a7a167bf
AV		 1309 if (ha->eft) {
1310 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1311 ha->eft_dma);
1312 ha->eft = NULL;
1313 ha->eft_dma = 0;
1314 }
1315 return;
1316 }
cfb0919c 1317 ql_dbg(ql_dbg_init, vha, 0x00c5,
7c3df132 1318 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
a7a167bf
AV		 1319
1320 ha->fw_dump_len = dump_size;
1321 ha->fw_dump->signature[0] = 'Q';
1322 ha->fw_dump->signature[1] = 'L';
1323 ha->fw_dump->signature[2] = 'G';
1324 ha->fw_dump->signature[3] = 'C';
1325 ha->fw_dump->version = __constant_htonl(1);
1326
1327 ha->fw_dump->fixed_size = htonl(fixed_size);
1328 ha->fw_dump->mem_size = htonl(mem_size);
1329 ha->fw_dump->req_q_size = htonl(req_q_size);
1330 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1331
1332 ha->fw_dump->eft_size = htonl(eft_size);
1333 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1334 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1335
1336 ha->fw_dump->header_size =
1337 htonl(offsetof(struct qla2xxx_fw_dump, isp));
0107109e
AV		 1338}
1339
18e7555a
AV		 1340static int
1341qla81xx_mpi_sync(scsi_qla_host_t *vha)
1342{
1343#define MPS_MASK 0xe0
1344 int rval;
1345 uint16_t dc;
1346 uint32_t dw;
18e7555a
AV		 1347
1348 if (!IS_QLA81XX(vha->hw))
1349 return QLA_SUCCESS;
1350
1351 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1352 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1353 ql_log(ql_log_warn, vha, 0x0105,
1354 "Unable to acquire semaphore.\n");
18e7555a
AV		 1355 goto done;
1356 }
1357
1358 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1359 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1360 if (rval != QLA_SUCCESS) {
7c3df132 1361 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 1362 goto done_release;
1363 }
1364
1365 dc &= MPS_MASK;
1366 if (dc == (dw & MPS_MASK))
1367 goto done_release;
1368
1369 dw &= ~MPS_MASK;
1370 dw |= dc;
1371 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1372 if (rval != QLA_SUCCESS) {
7c3df132 1373 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 1374 }
1375
1376done_release:
1377 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1378 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1379 ql_log(ql_log_warn, vha, 0x006d,
1380 "Unable to release semaphore.\n");
18e7555a
AV		 1381 }
1382
1383done:
1384 return rval;
1385}
1386
1da177e4
LT		 1387/**
1388 * qla2x00_setup_chip() - Load and start RISC firmware.
1389 * @ha: HA context
1390 *
1391 * Returns 0 on success.
1392 */
1393static int
e315cd28 1394qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 1395{
0107109e
AV		 1396 int rval;
1397 uint32_t srisc_address = 0;
e315cd28 1398 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 1399 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1400 unsigned long flags;
dda772e8 1401 uint16_t fw_major_version;
3db0652e 1402
a9083016
GM		 1403 if (IS_QLA82XX(ha)) {
1404 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 1405 if (rval == QLA_SUCCESS) {
1406 qla2x00_stop_firmware(vha);
a9083016 1407 goto enable_82xx_npiv;
14e303d9 1408 } else
b963752f 1409 goto failed;
a9083016
GM		 1410 }
1411
3db0652e
AV		 1412 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1413 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1414 spin_lock_irqsave(&ha->hardware_lock, flags);
1415 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1416 RD_REG_WORD(&reg->hccr);
1417 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1418 }
1da177e4 1419
18e7555a
AV		 1420 qla81xx_mpi_sync(vha);
1421
1da177e4 1422 /* Load firmware sequences */
e315cd28 1423 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 1424 if (rval == QLA_SUCCESS) {
7c3df132
SK		 1425 ql_dbg(ql_dbg_init, vha, 0x00c9,
1426 "Verifying Checksum of loaded RISC code.\n");
1da177e4 1427
e315cd28 1428 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 1429 if (rval == QLA_SUCCESS) {
1430 /* Start firmware execution. */
7c3df132
SK		 1431 ql_dbg(ql_dbg_init, vha, 0x00ca,
1432 "Starting firmware.\n");
1da177e4 1433
e315cd28 1434 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 1435 /* Retrieve firmware information. */
dda772e8 1436 if (rval == QLA_SUCCESS) {
a9083016 1437enable_82xx_npiv:
dda772e8 1438 fw_major_version = ha->fw_major_version;
3173167f
GM		 1439 if (IS_QLA82XX(ha))
1440 qla82xx_check_md_needed(vha);
6246b8a1
GM		 1441 else
1442 rval = qla2x00_get_fw_version(vha);
ca9e9c3e
AV		 1443 if (rval != QLA_SUCCESS)
1444 goto failed;
2c3dfe3f 1445 ha->flags.npiv_supported = 0;
e315cd28 1446 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 1447 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 1448 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 1449 if ((!ha->max_npiv_vports) ||
1450 ((ha->max_npiv_vports + 1) %
eb66dc60 1451 MIN_MULTI_ID_FABRIC))
4d0ea247 1452 ha->max_npiv_vports =
eb66dc60 1453 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 1454 }
24a08138
AV		 1455 qla2x00_get_resource_cnts(vha, NULL,
1456 &ha->fw_xcb_count, NULL, NULL,
f3a0a77e 1457 &ha->max_npiv_vports, NULL);
d743de66 1458
be5ea3cf
SK		 1459 if (!fw_major_version && ql2xallocfwdump
1460 && !IS_QLA82XX(ha))
08de2844 1461 qla2x00_alloc_fw_dump(vha);
1da177e4
LT		 1462 }
1463 } else {
7c3df132
SK		 1464 ql_log(ql_log_fatal, vha, 0x00cd,
1465 "ISP Firmware failed checksum.\n");
1466 goto failed;
1da177e4
LT		 1467 }
1468 }
1469
3db0652e
AV		 1470 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1471 /* Enable proper parity. */
1472 spin_lock_irqsave(&ha->hardware_lock, flags);
1473 if (IS_QLA2300(ha))
1474 /* SRAM parity */
1475 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1476 else
1477 /* SRAM, Instruction RAM and GP RAM parity */
1478 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1479 RD_REG_WORD(&reg->hccr);
1480 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1481 }
1482
6246b8a1
GM		 1483 if (IS_QLA83XX(ha))
1484 goto skip_fac_check;
1485
1d2874de
JC		 1486 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1487 uint32_t size;
1488
1489 rval = qla81xx_fac_get_sector_size(vha, &size);
1490 if (rval == QLA_SUCCESS) {
1491 ha->flags.fac_supported = 1;
1492 ha->fdt_block_size = size << 2;
1493 } else {
7c3df132 1494 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 1495 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1496 ha->fw_major_version, ha->fw_minor_version,
1497 ha->fw_subminor_version);
6246b8a1
GM		 1498skip_fac_check:
1499 if (IS_QLA83XX(ha)) {
1500 ha->flags.fac_supported = 0;
1501 rval = QLA_SUCCESS;
1502 }
1d2874de
JC		 1503 }
1504 }
ca9e9c3e 1505failed:
1da177e4 1506 if (rval) {
7c3df132
SK		 1507 ql_log(ql_log_fatal, vha, 0x00cf,
1508 "Setup chip ****FAILED****.\n");
1da177e4
LT		 1509 }
1510
1511 return (rval);
1512}
1513
1514/**
1515 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1516 * @ha: HA context
1517 *
1518 * Beginning of request ring has initialization control block already built
1519 * by nvram config routine.
1520 *
1521 * Returns 0 on success.
1522 */
73208dfd
AC		 1523void
1524qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 1525{
1526 uint16_t cnt;
1527 response_t *pkt;
1528
2afa19a9
AC		 1529 rsp->ring_ptr = rsp->ring;
1530 rsp->ring_index = 0;
1531 rsp->status_srb = NULL;
e315cd28
AC		 1532 pkt = rsp->ring_ptr;
1533 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 1534 pkt->signature = RESPONSE_PROCESSED;
1535 pkt++;
1536 }
1da177e4
LT		 1537}
1538
1539/**
1540 * qla2x00_update_fw_options() - Read and process firmware options.
1541 * @ha: HA context
1542 *
1543 * Returns 0 on success.
1544 */
abbd8870 1545void
e315cd28 1546qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 1547{
1548 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 1549 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1550
1551 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 1552 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 1553
1554 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1555 return;
1556
1557 /* Serial Link options. */
7c3df132
SK		 1558 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1559 "Serial link options.\n");
1560 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1561 (uint8_t *)&ha->fw_seriallink_options,
1562 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 1563
1564 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1565 if (ha->fw_seriallink_options[3] & BIT_2) {
1566 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1567
1568 /* 1G settings */
1569 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1570 emphasis = (ha->fw_seriallink_options[2] &
1571 (BIT_4 | BIT_3)) >> 3;
1572 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 1573 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1574 rx_sens = (ha->fw_seriallink_options[0] &
1575 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1576 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1577 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1578 if (rx_sens == 0x0)
1579 rx_sens = 0x3;
1580 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1581 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1582 ha->fw_options[10] |= BIT_5 |
1583 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1584 (tx_sens & (BIT_1 | BIT_0));
1585
1586 /* 2G settings */
1587 swing = (ha->fw_seriallink_options[2] &
1588 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1589 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1590 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 1591 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1592 rx_sens = (ha->fw_seriallink_options[1] &
1593 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1594 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1595 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1596 if (rx_sens == 0x0)
1597 rx_sens = 0x3;
1598 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1599 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1600 ha->fw_options[11] |= BIT_5 |
1601 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1602 (tx_sens & (BIT_1 | BIT_0));
1603 }
1604
1605 /* FCP2 options. */
1606 /* Return command IOCBs without waiting for an ABTS to complete. */
1607 ha->fw_options[3] |= BIT_13;
1608
1609 /* LED scheme. */
1610 if (ha->flags.enable_led_scheme)
1611 ha->fw_options[2] |= BIT_12;
1612
48c02fde 1613 /* Detect ISP6312. */
1614 if (IS_QLA6312(ha))
1615 ha->fw_options[2] |= BIT_13;
1616
1da177e4 1617 /* Update firmware options. */
e315cd28 1618 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 1619}
1620
0107109e 1621void
e315cd28 1622qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 1623{
1624 int rval;
e315cd28 1625 struct qla_hw_data *ha = vha->hw;
0107109e 1626
a9083016
GM		 1627 if (IS_QLA82XX(ha))
1628 return;
1629
0107109e 1630 /* Update Serial Link options. */
f94097ed 1631 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 1632 return;
1633
e315cd28 1634 rval = qla2x00_set_serdes_params(vha,
f94097ed 1635 le16_to_cpu(ha->fw_seriallink_options24[1]),
1636 le16_to_cpu(ha->fw_seriallink_options24[2]),
1637 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 1638 if (rval != QLA_SUCCESS) {
7c3df132 1639 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 1640 "Unable to update Serial Link options (%x).\n", rval);
1641 }
1642}
1643
abbd8870 1644void
e315cd28 1645qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 1646{
e315cd28 1647 struct qla_hw_data *ha = vha->hw;
3d71644c 1648 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 1649 struct req_que *req = ha->req_q_map[0];
1650 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 1651
1652 /* Setup ring parameters in initialization control block. */
1653 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1654 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1655 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1656 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1657 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1658 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1659 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1660 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 1661
1662 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1663 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1664 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1665 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1666 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1667}
1668
0107109e 1669void
e315cd28 1670qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 1671{
e315cd28 1672 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1673 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1674 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1675 struct qla_msix_entry *msix;
0107109e 1676 struct init_cb_24xx *icb;
73208dfd
AC		 1677 uint16_t rid = 0;
1678 struct req_que *req = ha->req_q_map[0];
1679 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 1680
6246b8a1 1681 /* Setup ring parameters in initialization control block. */
0107109e
AV		 1682 icb = (struct init_cb_24xx *)ha->init_cb;
1683 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1684 icb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1685 icb->request_q_length = cpu_to_le16(req->length);
1686 icb->response_q_length = cpu_to_le16(rsp->length);
1687 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1688 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1689 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1690 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 1691
6246b8a1 1692 if (ha->mqenable || IS_QLA83XX(ha)) {
73208dfd
AC		 1693 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1694 icb->rid = __constant_cpu_to_le16(rid);
1695 if (ha->flags.msix_enabled) {
1696 msix = &ha->msix_entries[1];
7c3df132
SK		 1697 ql_dbg(ql_dbg_init, vha, 0x00fd,
1698 "Registering vector 0x%x for base que.\n",
1699 msix->entry);
73208dfd
AC		 1700 icb->msix = cpu_to_le16(msix->entry);
1701 }
1702 /* Use alternate PCI bus number */
1703 if (MSB(rid))
1704 icb->firmware_options_2 |=
1705 __constant_cpu_to_le32(BIT_19);
1706 /* Use alternate PCI devfn */
1707 if (LSB(rid))
1708 icb->firmware_options_2 |=
1709 __constant_cpu_to_le32(BIT_18);
1710
3155754a 1711 /* Use Disable MSIX Handshake mode for capable adapters */
6246b8a1
GM		 1712 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
1713 (ha->flags.msix_enabled)) {
3155754a
AC		 1714 icb->firmware_options_2 &=
1715 __constant_cpu_to_le32(~BIT_22);
1716 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 1717 ql_dbg(ql_dbg_init, vha, 0x00fe,
1718 "MSIX Handshake Disable Mode turned on.\n");
3155754a
AC		 1719 } else {
1720 icb->firmware_options_2 |=
1721 __constant_cpu_to_le32(BIT_22);
1722 }
73208dfd 1723 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
73208dfd
AC		 1724
1725 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1726 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1727 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1728 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1729 } else {
1730 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1731 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1732 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1733 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1734 }
1735 /* PCI posting */
1736 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 1737}
1738
1da177e4
LT		 1739/**
1740 * qla2x00_init_rings() - Initializes firmware.
1741 * @ha: HA context
1742 *
1743 * Beginning of request ring has initialization control block already built
1744 * by nvram config routine.
1745 *
1746 * Returns 0 on success.
1747 */
1748static int
e315cd28 1749qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 1750{
1751 int rval;
1752 unsigned long flags = 0;
29bdccbe 1753 int cnt, que;
e315cd28 1754 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 1755 struct req_que *req;
1756 struct rsp_que *rsp;
2c3dfe3f
SJ		 1757 struct mid_init_cb_24xx *mid_init_cb =
1758 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 1759
1760 spin_lock_irqsave(&ha->hardware_lock, flags);
1761
1762 /* Clear outstanding commands array. */
2afa19a9 1763 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe
AC		 1764 req = ha->req_q_map[que];
1765 if (!req)
1766 continue;
2afa19a9 1767 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
29bdccbe 1768 req->outstanding_cmds[cnt] = NULL;
1da177e4 1769
2afa19a9 1770 req->current_outstanding_cmd = 1;
1da177e4 1771
29bdccbe
AC		 1772 /* Initialize firmware. */
1773 req->ring_ptr = req->ring;
1774 req->ring_index = 0;
1775 req->cnt = req->length;
1776 }
1da177e4 1777
2afa19a9 1778 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe
AC		 1779 rsp = ha->rsp_q_map[que];
1780 if (!rsp)
1781 continue;
29bdccbe
AC		 1782 /* Initialize response queue entries */
1783 qla2x00_init_response_q_entries(rsp);
1784 }
1da177e4 1785
542bce1f 1786 spin_lock(&ha->vport_slock);
feafb7b1 1787
542bce1f 1788 spin_unlock(&ha->vport_slock);
feafb7b1 1789
e315cd28 1790 ha->isp_ops->config_rings(vha);
1da177e4
LT		 1791
1792 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1793
1794 /* Update any ISP specific firmware options before initialization. */
e315cd28 1795 ha->isp_ops->update_fw_options(vha);
1da177e4 1796
7c3df132 1797 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2c3dfe3f 1798
605aa2bc
LC		 1799 if (ha->flags.npiv_supported) {
1800 if (ha->operating_mode == LOOP)
1801 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 1802 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 1803 }
1804
24a08138
AV		 1805 if (IS_FWI2_CAPABLE(ha)) {
1806 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
1807 mid_init_cb->init_cb.execution_throttle =
1808 cpu_to_le16(ha->fw_xcb_count);
1809 }
2c3dfe3f 1810
e315cd28 1811 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
1da177e4 1812 if (rval) {
7c3df132
SK		 1813 ql_log(ql_log_fatal, vha, 0x00d2,
1814 "Init Firmware **** FAILED ****.\n");
1da177e4 1815 } else {
7c3df132
SK		 1816 ql_dbg(ql_dbg_init, vha, 0x00d3,
1817 "Init Firmware -- success.\n");
1da177e4
LT		 1818 }
1819
1820 return (rval);
1821}
1822
1823/**
1824 * qla2x00_fw_ready() - Waits for firmware ready.
1825 * @ha: HA context
1826 *
1827 * Returns 0 on success.
1828 */
1829static int
e315cd28 1830qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 1831{
1832 int rval;
4d4df193 1833 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 1834 uint16_t min_wait; /* Minimum wait time if loop is down */
1835 uint16_t wait_time; /* Wait time if loop is coming ready */
656e8912 1836 uint16_t state[5];
e315cd28 1837 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1838
1839 rval = QLA_SUCCESS;
1840
1841 /* 20 seconds for loop down. */
fa2a1ce5 1842 min_wait = 20;
1da177e4
LT		 1843
1844 /*
1845 * Firmware should take at most one RATOV to login, plus 5 seconds for
1846 * our own processing.
1847 */
1848 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
1849 wait_time = min_wait;
1850 }
1851
1852 /* Min wait time if loop down */
1853 mtime = jiffies + (min_wait * HZ);
1854
1855 /* wait time before firmware ready */
1856 wtime = jiffies + (wait_time * HZ);
1857
1858 /* Wait for ISP to finish LIP */
e315cd28 1859 if (!vha->flags.init_done)
7c3df132
SK		 1860 ql_log(ql_log_info, vha, 0x801e,
1861 "Waiting for LIP to complete.\n");
1da177e4
LT		 1862
1863 do {
e315cd28 1864 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 1865 if (rval == QLA_SUCCESS) {
4d4df193 1866 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 1867 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 1868 }
4d4df193 1869 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 1870 ql_dbg(ql_dbg_taskm, vha, 0x801f,
1871 "fw_state=%x 84xx=%x.\n", state[0],
1872 state[2]);
4d4df193
HK		 1873 if ((state[2] & FSTATE_LOGGED_IN) &&
1874 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 1875 ql_dbg(ql_dbg_taskm, vha, 0x8028,
1876 "Sending verify iocb.\n");
4d4df193
HK		 1877
1878 cs84xx_time = jiffies;
e315cd28 1879 rval = qla84xx_init_chip(vha);
7c3df132
SK		 1880 if (rval != QLA_SUCCESS) {
1881 ql_log(ql_log_warn,
cfb0919c 1882 vha, 0x8007,
7c3df132 1883 "Init chip failed.\n");
4d4df193 1884 break;
7c3df132 1885 }
4d4df193
HK		 1886
1887 /* Add time taken to initialize. */
1888 cs84xx_time = jiffies - cs84xx_time;
1889 wtime += cs84xx_time;
1890 mtime += cs84xx_time;
cfb0919c 1891 ql_dbg(ql_dbg_taskm, vha, 0x8008,
7c3df132
SK		 1892 "Increasing wait time by %ld. "
1893 "New time %ld.\n", cs84xx_time,
1894 wtime);
4d4df193
HK		 1895 }
1896 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 1897 ql_dbg(ql_dbg_taskm, vha, 0x8037,
1898 "F/W Ready - OK.\n");
1da177e4 1899
e315cd28 1900 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 1901 &ha->login_timeout, &ha->r_a_tov);
1902
1903 rval = QLA_SUCCESS;
1904 break;
1905 }
1906
1907 rval = QLA_FUNCTION_FAILED;
1908
e315cd28 1909 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 1910 state[0] != FSTATE_READY) {
1da177e4 1911 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 1912 * other than Wait for Login.
1913 */
1da177e4 1914 if (time_after_eq(jiffies, mtime)) {
7c3df132 1915 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 1916 "Cable is unplugged...\n");
1917
e315cd28 1918 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 1919 break;
1920 }
1921 }
1922 } else {
1923 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 1924 if (time_after_eq(jiffies, mtime) ||
7190575f 1925 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 1926 break;
1927 }
1928
1929 if (time_after_eq(jiffies, wtime))
1930 break;
1931
1932 /* Delay for a while */
1933 msleep(500);
1da177e4
LT		 1934 } while (1);
1935
7c3df132
SK		 1936 ql_dbg(ql_dbg_taskm, vha, 0x803a,
1937 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
1938 state[1], state[2], state[3], state[4], jiffies);
1da177e4 1939
cfb0919c 1940 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
7c3df132
SK		 1941 ql_log(ql_log_warn, vha, 0x803b,
1942 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 1943 }
1944
1945 return (rval);
1946}
1947
1948/*
1949* qla2x00_configure_hba
1950* Setup adapter context.
1951*
1952* Input:
1953* ha = adapter state pointer.
1954*
1955* Returns:
1956* 0 = success
1957*
1958* Context:
1959* Kernel context.
1960*/
1961static int
e315cd28 1962qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 1963{
1964 int rval;
1965 uint16_t loop_id;
1966 uint16_t topo;
2c3dfe3f 1967 uint16_t sw_cap;
1da177e4
LT		 1968 uint8_t al_pa;
1969 uint8_t area;
1970 uint8_t domain;
1971 char connect_type[22];
e315cd28 1972 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1973
1974 /* Get host addresses. */
e315cd28 1975 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 1976 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 1977 if (rval != QLA_SUCCESS) {
e315cd28 1978 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
6246b8a1 1979 IS_CNA_CAPABLE(ha) ||
33135aa2 1980 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 1981 ql_dbg(ql_dbg_disc, vha, 0x2008,
1982 "Loop is in a transition state.\n");
33135aa2 1983 } else {
7c3df132
SK		 1984 ql_log(ql_log_warn, vha, 0x2009,
1985 "Unable to get host loop ID.\n");
e315cd28 1986 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 1987 }
1da177e4
LT		 1988 return (rval);
1989 }
1990
1991 if (topo == 4) {
7c3df132
SK		 1992 ql_log(ql_log_info, vha, 0x200a,
1993 "Cannot get topology - retrying.\n");
1da177e4
LT		 1994 return (QLA_FUNCTION_FAILED);
1995 }
1996
e315cd28 1997 vha->loop_id = loop_id;
1da177e4
LT		 1998
1999 /* initialize */
2000 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2001 ha->operating_mode = LOOP;
2c3dfe3f 2002 ha->switch_cap = 0;
1da177e4
LT		 2003
2004 switch (topo) {
2005 case 0:
7c3df132 2006 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 2007 ha->current_topology = ISP_CFG_NL;
2008 strcpy(connect_type, "(Loop)");
2009 break;
2010
2011 case 1:
7c3df132 2012 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 2013 ha->switch_cap = sw_cap;
1da177e4
LT		 2014 ha->current_topology = ISP_CFG_FL;
2015 strcpy(connect_type, "(FL_Port)");
2016 break;
2017
2018 case 2:
7c3df132 2019 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 2020 ha->operating_mode = P2P;
2021 ha->current_topology = ISP_CFG_N;
2022 strcpy(connect_type, "(N_Port-to-N_Port)");
2023 break;
2024
2025 case 3:
7c3df132 2026 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 2027 ha->switch_cap = sw_cap;
1da177e4
LT		 2028 ha->operating_mode = P2P;
2029 ha->current_topology = ISP_CFG_F;
2030 strcpy(connect_type, "(F_Port)");
2031 break;
2032
2033 default:
7c3df132
SK		 2034 ql_dbg(ql_dbg_disc, vha, 0x200f,
2035 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 2036 ha->current_topology = ISP_CFG_NL;
2037 strcpy(connect_type, "(Loop)");
2038 break;
2039 }
2040
2041 /* Save Host port and loop ID. */
2042 /* byte order - Big Endian */
e315cd28
AC		 2043 vha->d_id.b.domain = domain;
2044 vha->d_id.b.area = area;
2045 vha->d_id.b.al_pa = al_pa;
1da177e4 2046
e315cd28 2047 if (!vha->flags.init_done)
7c3df132
SK		 2048 ql_log(ql_log_info, vha, 0x2010,
2049 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 2050 connect_type, vha->loop_id);
1da177e4
LT		 2051
2052 if (rval) {
7c3df132
SK		 2053 ql_log(ql_log_warn, vha, 0x2011,
2054 "%s FAILED\n", __func__);
1da177e4 2055 } else {
7c3df132
SK		 2056 ql_dbg(ql_dbg_disc, vha, 0x2012,
2057 "%s success\n", __func__);
1da177e4
LT		 2058 }
2059
2060 return(rval);
2061}
2062
a9083016 2063inline void
e315cd28
AC		 2064qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2065 char *def)
9bb9fcf2
AV		 2066{
2067 char *st, *en;
2068 uint16_t index;
e315cd28 2069 struct qla_hw_data *ha = vha->hw;
ab671149 2070 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
6246b8a1 2071 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
9bb9fcf2
AV		 2072
2073 if (memcmp(model, BINZERO, len) != 0) {
2074 strncpy(ha->model_number, model, len);
2075 st = en = ha->model_number;
2076 en += len - 1;
2077 while (en > st) {
2078 if (*en != 0x20 && *en != 0x00)
2079 break;
2080 *en-- = '\0';
2081 }
2082
2083 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2084 if (use_tbl &&
2085 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 2086 index < QLA_MODEL_NAMES)
1ee27146
JC		 2087 strncpy(ha->model_desc,
2088 qla2x00_model_name[index * 2 + 1],
2089 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2090 } else {
2091 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2092 if (use_tbl &&
2093 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 2094 index < QLA_MODEL_NAMES) {
2095 strcpy(ha->model_number,
2096 qla2x00_model_name[index * 2]);
1ee27146
JC		 2097 strncpy(ha->model_desc,
2098 qla2x00_model_name[index * 2 + 1],
2099 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2100 } else {
2101 strcpy(ha->model_number, def);
2102 }
2103 }
1ee27146 2104 if (IS_FWI2_CAPABLE(ha))
e315cd28 2105 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 2106 sizeof(ha->model_desc));
9bb9fcf2
AV		 2107}
2108
4e08df3f
DM		 2109/* On sparc systems, obtain port and node WWN from firmware
2110 * properties.
2111 */
e315cd28 2112static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 2113{
2114#ifdef CONFIG_SPARC
e315cd28 2115 struct qla_hw_data *ha = vha->hw;
4e08df3f 2116 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 2117 struct device_node *dp = pci_device_to_OF_node(pdev);
2118 const u8 *val;
4e08df3f
DM		 2119 int len;
2120
2121 val = of_get_property(dp, "port-wwn", &len);
2122 if (val && len >= WWN_SIZE)
2123 memcpy(nv->port_name, val, WWN_SIZE);
2124
2125 val = of_get_property(dp, "node-wwn", &len);
2126 if (val && len >= WWN_SIZE)
2127 memcpy(nv->node_name, val, WWN_SIZE);
2128#endif
2129}
2130
1da177e4
LT		 2131/*
2132* NVRAM configuration for ISP 2xxx
2133*
2134* Input:
2135* ha = adapter block pointer.
2136*
2137* Output:
2138* initialization control block in response_ring
2139* host adapters parameters in host adapter block
2140*
2141* Returns:
2142* 0 = success.
2143*/
abbd8870 2144int
e315cd28 2145qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 2146{
4e08df3f 2147 int rval;
0107109e
AV		 2148 uint8_t chksum = 0;
2149 uint16_t cnt;
2150 uint8_t *dptr1, *dptr2;
e315cd28 2151 struct qla_hw_data *ha = vha->hw;
0107109e 2152 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 2153 nvram_t *nv = ha->nvram;
2154 uint8_t *ptr = ha->nvram;
3d71644c 2155 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2156
4e08df3f
DM		 2157 rval = QLA_SUCCESS;
2158
1da177e4 2159 /* Determine NVRAM starting address. */
0107109e 2160 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 2161 ha->nvram_base = 0;
2162 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2163 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2164 ha->nvram_base = 0x80;
2165
2166 /* Get NVRAM data and calculate checksum. */
e315cd28 2167 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 2168 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2169 chksum += *ptr++;
1da177e4 2170
7c3df132
SK		 2171 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2172 "Contents of NVRAM.\n");
2173 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2174 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 2175
2176 /* Bad NVRAM data, set defaults parameters. */
2177 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2178 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2179 /* Reset NVRAM data. */
7c3df132
SK		 2180 ql_log(ql_log_warn, vha, 0x0064,
2181 "Inconisistent NVRAM "
2182 "detected: checksum=0x%x id=%c version=0x%x.\n",
2183 chksum, nv->id[0], nv->nvram_version);
2184 ql_log(ql_log_warn, vha, 0x0065,
2185 "Falling back to "
2186 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 2187
2188 /*
2189 * Set default initialization control block.
2190 */
2191 memset(nv, 0, ha->nvram_size);
2192 nv->parameter_block_version = ICB_VERSION;
2193
2194 if (IS_QLA23XX(ha)) {
2195 nv->firmware_options[0] = BIT_2 | BIT_1;
2196 nv->firmware_options[1] = BIT_7 | BIT_5;
2197 nv->add_firmware_options[0] = BIT_5;
2198 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2199 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2200 nv->special_options[1] = BIT_7;
2201 } else if (IS_QLA2200(ha)) {
2202 nv->firmware_options[0] = BIT_2 | BIT_1;
2203 nv->firmware_options[1] = BIT_7 | BIT_5;
2204 nv->add_firmware_options[0] = BIT_5;
2205 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2206 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2207 } else if (IS_QLA2100(ha)) {
2208 nv->firmware_options[0] = BIT_3 | BIT_1;
2209 nv->firmware_options[1] = BIT_5;
2210 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2211 }
2212
2213 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2214 nv->execution_throttle = __constant_cpu_to_le16(16);
2215 nv->retry_count = 8;
2216 nv->retry_delay = 1;
2217
2218 nv->port_name[0] = 33;
2219 nv->port_name[3] = 224;
2220 nv->port_name[4] = 139;
2221
e315cd28 2222 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 2223
2224 nv->login_timeout = 4;
2225
2226 /*
2227 * Set default host adapter parameters
2228 */
2229 nv->host_p[1] = BIT_2;
2230 nv->reset_delay = 5;
2231 nv->port_down_retry_count = 8;
2232 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2233 nv->link_down_timeout = 60;
2234
2235 rval = 1;
1da177e4
LT		 2236 }
2237
2238#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2239 /*
2240 * The SN2 does not provide BIOS emulation which means you can't change
2241 * potentially bogus BIOS settings. Force the use of default settings
2242 * for link rate and frame size. Hope that the rest of the settings
2243 * are valid.
2244 */
2245 if (ia64_platform_is("sn2")) {
2246 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2247 if (IS_QLA23XX(ha))
2248 nv->special_options[1] = BIT_7;
2249 }
2250#endif
2251
2252 /* Reset Initialization control block */
0107109e 2253 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 2254
2255 /*
2256 * Setup driver NVRAM options.
2257 */
2258 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2259 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2260 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2261 nv->firmware_options[1] &= ~BIT_4;
2262
2263 if (IS_QLA23XX(ha)) {
2264 nv->firmware_options[0] |= BIT_2;
2265 nv->firmware_options[0] &= ~BIT_3;
5ff1d584 2266 nv->firmware_options[0] &= ~BIT_6;
0107109e 2267 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 2268
2269 if (IS_QLA2300(ha)) {
2270 if (ha->fb_rev == FPM_2310) {
2271 strcpy(ha->model_number, "QLA2310");
2272 } else {
2273 strcpy(ha->model_number, "QLA2300");
2274 }
2275 } else {
e315cd28 2276 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 2277 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 2278 }
2279 } else if (IS_QLA2200(ha)) {
2280 nv->firmware_options[0] |= BIT_2;
2281 /*
2282 * 'Point-to-point preferred, else loop' is not a safe
2283 * connection mode setting.
2284 */
2285 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2286 (BIT_5 | BIT_4)) {
2287 /* Force 'loop preferred, else point-to-point'. */
2288 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2289 nv->add_firmware_options[0] |= BIT_5;
2290 }
2291 strcpy(ha->model_number, "QLA22xx");
2292 } else /*if (IS_QLA2100(ha))*/ {
2293 strcpy(ha->model_number, "QLA2100");
2294 }
2295
2296 /*
2297 * Copy over NVRAM RISC parameter block to initialization control block.
2298 */
2299 dptr1 = (uint8_t *)icb;
2300 dptr2 = (uint8_t *)&nv->parameter_block_version;
2301 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2302 while (cnt--)
2303 *dptr1++ = *dptr2++;
2304
2305 /* Copy 2nd half. */
2306 dptr1 = (uint8_t *)icb->add_firmware_options;
2307 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2308 while (cnt--)
2309 *dptr1++ = *dptr2++;
2310
5341e868
AV		 2311 /* Use alternate WWN? */
2312 if (nv->host_p[1] & BIT_7) {
2313 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2314 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2315 }
2316
1da177e4
LT		 2317 /* Prepare nodename */
2318 if ((icb->firmware_options[1] & BIT_6) == 0) {
2319 /*
2320 * Firmware will apply the following mask if the nodename was
2321 * not provided.
2322 */
2323 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2324 icb->node_name[0] &= 0xF0;
2325 }
2326
2327 /*
2328 * Set host adapter parameters.
2329 */
3ce8866c
SK		 2330
2331 /*
2332 * BIT_7 in the host-parameters section allows for modification to
2333 * internal driver logging.
2334 */
0181944f 2335 if (nv->host_p[0] & BIT_7)
cfb0919c 2336 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
1da177e4
LT		 2337 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2338 /* Always load RISC code on non ISP2[12]00 chips. */
2339 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2340 ha->flags.disable_risc_code_load = 0;
2341 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2342 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2343 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 2344 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 2345 ha->flags.disable_serdes = 0;
1da177e4
LT		 2346
2347 ha->operating_mode =
2348 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2349
2350 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2351 sizeof(ha->fw_seriallink_options));
2352
2353 /* save HBA serial number */
2354 ha->serial0 = icb->port_name[5];
2355 ha->serial1 = icb->port_name[6];
2356 ha->serial2 = icb->port_name[7];
e315cd28
AC		 2357 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2358 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4
LT		 2359
2360 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2361
2362 ha->retry_count = nv->retry_count;
2363
2364 /* Set minimum login_timeout to 4 seconds. */
5b91490e 2365 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 2366 nv->login_timeout = ql2xlogintimeout;
2367 if (nv->login_timeout < 4)
2368 nv->login_timeout = 4;
2369 ha->login_timeout = nv->login_timeout;
2370 icb->login_timeout = nv->login_timeout;
2371
00a537b8
AV		 2372 /* Set minimum RATOV to 100 tenths of a second. */
2373 ha->r_a_tov = 100;
1da177e4 2374
1da177e4
LT		 2375 ha->loop_reset_delay = nv->reset_delay;
2376
1da177e4
LT		 2377 /* Link Down Timeout = 0:
2378 *
2379 * When Port Down timer expires we will start returning
2380 * I/O's to OS with "DID_NO_CONNECT".
2381 *
2382 * Link Down Timeout != 0:
2383 *
2384 * The driver waits for the link to come up after link down
2385 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 2386 */
1da177e4
LT		 2387 if (nv->link_down_timeout == 0) {
2388 ha->loop_down_abort_time =
354d6b21 2389 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 2390 } else {
2391 ha->link_down_timeout = nv->link_down_timeout;
2392 ha->loop_down_abort_time =
2393 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 2394 }
1da177e4 2395
1da177e4
LT		 2396 /*
2397 * Need enough time to try and get the port back.
2398 */
2399 ha->port_down_retry_count = nv->port_down_retry_count;
2400 if (qlport_down_retry)
2401 ha->port_down_retry_count = qlport_down_retry;
2402 /* Set login_retry_count */
2403 ha->login_retry_count = nv->retry_count;
2404 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2405 ha->port_down_retry_count > 3)
2406 ha->login_retry_count = ha->port_down_retry_count;
2407 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2408 ha->login_retry_count = ha->port_down_retry_count;
2409 if (ql2xloginretrycount)
2410 ha->login_retry_count = ql2xloginretrycount;
2411
1da177e4
LT		 2412 icb->lun_enables = __constant_cpu_to_le16(0);
2413 icb->command_resource_count = 0;
2414 icb->immediate_notify_resource_count = 0;
2415 icb->timeout = __constant_cpu_to_le16(0);
2416
2417 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2418 /* Enable RIO */
2419 icb->firmware_options[0] &= ~BIT_3;
2420 icb->add_firmware_options[0] &=
2421 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2422 icb->add_firmware_options[0] |= BIT_2;
2423 icb->response_accumulation_timer = 3;
2424 icb->interrupt_delay_timer = 5;
2425
e315cd28 2426 vha->flags.process_response_queue = 1;
1da177e4 2427 } else {
4fdfefe5 2428 /* Enable ZIO. */
e315cd28 2429 if (!vha->flags.init_done) {
4fdfefe5
AV		 2430 ha->zio_mode = icb->add_firmware_options[0] &
2431 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2432 ha->zio_timer = icb->interrupt_delay_timer ?
2433 icb->interrupt_delay_timer: 2;
2434 }
1da177e4
LT		 2435 icb->add_firmware_options[0] &=
2436 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 2437 vha->flags.process_response_queue = 0;
4fdfefe5 2438 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 2439 ha->zio_mode = QLA_ZIO_MODE_6;
2440
7c3df132 2441 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 2442 "ZIO mode %d enabled; timer delay (%d us).\n",
2443 ha->zio_mode, ha->zio_timer * 100);
1da177e4 2444
4fdfefe5
AV		 2445 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2446 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 2447 vha->flags.process_response_queue = 1;
1da177e4
LT		 2448 }
2449 }
2450
4e08df3f 2451 if (rval) {
7c3df132
SK		 2452 ql_log(ql_log_warn, vha, 0x0069,
2453 "NVRAM configuration failed.\n");
4e08df3f
DM		 2454 }
2455 return (rval);
1da177e4
LT		 2456}
2457
19a7b4ae
JSEC		 2458static void
2459qla2x00_rport_del(void *data)
2460{
2461 fc_port_t *fcport = data;
d97994dc 2462 struct fc_rport *rport;
044d78e1 2463 unsigned long flags;
d97994dc 2464
044d78e1 2465 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 2466 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 2467 fcport->drport = NULL;
044d78e1 2468 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 2469 if (rport)
2470 fc_remote_port_delete(rport);
19a7b4ae
JSEC		 2471}
2472
1da177e4
LT		 2473/**
2474 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2475 * @ha: HA context
2476 * @flags: allocation flags
2477 *
2478 * Returns a pointer to the allocated fcport, or NULL, if none available.
2479 */
9a069e19 2480fc_port_t *
e315cd28 2481qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 2482{
2483 fc_port_t *fcport;
2484
bbfbbbc1
MK		 2485 fcport = kzalloc(sizeof(fc_port_t), flags);
2486 if (!fcport)
2487 return NULL;
1da177e4
LT		 2488
2489 /* Setup fcport template structure. */
e315cd28
AC		 2490 fcport->vha = vha;
2491 fcport->vp_idx = vha->vp_idx;
1da177e4
LT		 2492 fcport->port_type = FCT_UNKNOWN;
2493 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 2494 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 2495 fcport->supported_classes = FC_COS_UNSPECIFIED;
1da177e4 2496
bbfbbbc1 2497 return fcport;
1da177e4
LT		 2498}
2499
2500/*
2501 * qla2x00_configure_loop
2502 * Updates Fibre Channel Device Database with what is actually on loop.
2503 *
2504 * Input:
2505 * ha = adapter block pointer.
2506 *
2507 * Returns:
2508 * 0 = success.
2509 * 1 = error.
2510 * 2 = database was full and device was not configured.
2511 */
2512static int
e315cd28 2513qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2514{
2515 int rval;
2516 unsigned long flags, save_flags;
e315cd28 2517 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2518 rval = QLA_SUCCESS;
2519
2520 /* Get Initiator ID */
e315cd28
AC		 2521 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2522 rval = qla2x00_configure_hba(vha);
1da177e4 2523 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2524 ql_dbg(ql_dbg_disc, vha, 0x2013,
2525 "Unable to configure HBA.\n");
1da177e4
LT		 2526 return (rval);
2527 }
2528 }
2529
e315cd28 2530 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 2531 ql_dbg(ql_dbg_disc, vha, 0x2014,
2532 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 2533
2534 /*
2535 * If we have both an RSCN and PORT UPDATE pending then handle them
2536 * both at the same time.
2537 */
e315cd28
AC		 2538 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2539 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 2540
3064ff39
MH		 2541 qla2x00_get_data_rate(vha);
2542
1da177e4
LT		 2543 /* Determine what we need to do */
2544 if (ha->current_topology == ISP_CFG_FL &&
2545 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2546
1da177e4
LT		 2547 set_bit(RSCN_UPDATE, &flags);
2548
2549 } else if (ha->current_topology == ISP_CFG_F &&
2550 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2551
1da177e4
LT		 2552 set_bit(RSCN_UPDATE, &flags);
2553 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 2554
2555 } else if (ha->current_topology == ISP_CFG_N) {
2556 clear_bit(RSCN_UPDATE, &flags);
1da177e4 2557
e315cd28 2558 } else if (!vha->flags.online ||
1da177e4
LT		 2559 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2560
1da177e4
LT		 2561 set_bit(RSCN_UPDATE, &flags);
2562 set_bit(LOCAL_LOOP_UPDATE, &flags);
2563 }
2564
2565 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 2566 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2567 ql_dbg(ql_dbg_disc, vha, 0x2015,
2568 "Loop resync needed, failing.\n");
1da177e4 2569 rval = QLA_FUNCTION_FAILED;
7c3df132 2570 }
e315cd28
AC		 2571 else
2572 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 2573 }
2574
2575 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132
SK		 2576 if (LOOP_TRANSITION(vha)) {
2577 ql_dbg(ql_dbg_disc, vha, 0x201e,
2578 "Needs RSCN update and loop transition.\n");
1da177e4 2579 rval = QLA_FUNCTION_FAILED;
7c3df132 2580 }
e315cd28
AC		 2581 else
2582 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 2583 }
2584
2585 if (rval == QLA_SUCCESS) {
e315cd28
AC		 2586 if (atomic_read(&vha->loop_down_timer) ||
2587 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 2588 rval = QLA_FUNCTION_FAILED;
2589 } else {
e315cd28 2590 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 2591 ql_dbg(ql_dbg_disc, vha, 0x2069,
2592 "LOOP READY.\n");
1da177e4
LT		 2593 }
2594 }
2595
2596 if (rval) {
7c3df132
SK		 2597 ql_dbg(ql_dbg_disc, vha, 0x206a,
2598 "%s *** FAILED ***.\n", __func__);
1da177e4 2599 } else {
7c3df132
SK		 2600 ql_dbg(ql_dbg_disc, vha, 0x206b,
2601 "%s: exiting normally.\n", __func__);
1da177e4
LT		 2602 }
2603
cc3ef7bc 2604 /* Restore state if a resync event occurred during processing */
e315cd28 2605 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 2606 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 2607 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 2608 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 2609 set_bit(RSCN_UPDATE, &vha->dpc_flags);
f4658b6c 2610 }
1da177e4
LT		 2611 }
2612
2613 return (rval);
2614}
2615
2616
2617
2618/*
2619 * qla2x00_configure_local_loop
2620 * Updates Fibre Channel Device Database with local loop devices.
2621 *
2622 * Input:
2623 * ha = adapter block pointer.
2624 *
2625 * Returns:
2626 * 0 = success.
2627 */
2628static int
e315cd28 2629qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2630{
2631 int rval, rval2;
2632 int found_devs;
2633 int found;
2634 fc_port_t *fcport, *new_fcport;
2635
2636 uint16_t index;
2637 uint16_t entries;
2638 char *id_iter;
2639 uint16_t loop_id;
2640 uint8_t domain, area, al_pa;
e315cd28 2641 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2642
2643 found_devs = 0;
2644 new_fcport = NULL;
2645 entries = MAX_FIBRE_DEVICES;
2646
7c3df132
SK		 2647 ql_dbg(ql_dbg_disc, vha, 0x2016,
2648 "Getting FCAL position map.\n");
2649 if (ql2xextended_error_logging & ql_dbg_disc)
2650 qla2x00_get_fcal_position_map(vha, NULL);
1da177e4
LT		 2651
2652 /* Get list of logged in devices. */
2653 memset(ha->gid_list, 0, GID_LIST_SIZE);
e315cd28 2654 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 2655 &entries);
2656 if (rval != QLA_SUCCESS)
2657 goto cleanup_allocation;
2658
7c3df132
SK		 2659 ql_dbg(ql_dbg_disc, vha, 0x2017,
2660 "Entries in ID list (%d).\n", entries);
2661 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2662 (uint8_t *)ha->gid_list,
2663 entries * sizeof(struct gid_list_info));
1da177e4
LT		 2664
2665 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 2666 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2667 if (new_fcport == NULL) {
7c3df132
SK		 2668 ql_log(ql_log_warn, vha, 0x2018,
2669 "Memory allocation failed for fcport.\n");
1da177e4
LT		 2670 rval = QLA_MEMORY_ALLOC_FAILED;
2671 goto cleanup_allocation;
2672 }
2673 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2674
2675 /*
2676 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2677 */
e315cd28 2678 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2679 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2680 fcport->port_type != FCT_BROADCAST &&
2681 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2682
7c3df132
SK		 2683 ql_dbg(ql_dbg_disc, vha, 0x2019,
2684 "Marking port lost loop_id=0x%04x.\n",
2685 fcport->loop_id);
1da177e4 2686
ec426e10 2687 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1da177e4
LT		 2688 }
2689 }
2690
2691 /* Add devices to port list. */
2692 id_iter = (char *)ha->gid_list;
2693 for (index = 0; index < entries; index++) {
2694 domain = ((struct gid_list_info *)id_iter)->domain;
2695 area = ((struct gid_list_info *)id_iter)->area;
2696 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 2697 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 2698 loop_id = (uint16_t)
2699 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 2700 else
1da177e4
LT		 2701 loop_id = le16_to_cpu(
2702 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 2703 id_iter += ha->gid_list_info_size;
1da177e4
LT		 2704
2705 /* Bypass reserved domain fields. */
2706 if ((domain & 0xf0) == 0xf0)
2707 continue;
2708
2709 /* Bypass if not same domain and area of adapter. */
f7d289f6 2710 if (area && domain &&
e315cd28 2711 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
1da177e4
LT		 2712 continue;
2713
2714 /* Bypass invalid local loop ID. */
2715 if (loop_id > LAST_LOCAL_LOOP_ID)
2716 continue;
2717
2718 /* Fill in member data. */
2719 new_fcport->d_id.b.domain = domain;
2720 new_fcport->d_id.b.area = area;
2721 new_fcport->d_id.b.al_pa = al_pa;
2722 new_fcport->loop_id = loop_id;
e315cd28
AC		 2723 new_fcport->vp_idx = vha->vp_idx;
2724 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 2725 if (rval2 != QLA_SUCCESS) {
7c3df132
SK		 2726 ql_dbg(ql_dbg_disc, vha, 0x201a,
2727 "Failed to retrieve fcport information "
2728 "-- get_port_database=%x, loop_id=0x%04x.\n",
2729 rval2, new_fcport->loop_id);
2730 ql_dbg(ql_dbg_disc, vha, 0x201b,
2731 "Scheduling resync.\n");
e315cd28 2732 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2733 continue;
2734 }
2735
2736 /* Check for matching device in port list. */
2737 found = 0;
2738 fcport = NULL;
e315cd28 2739 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2740 if (memcmp(new_fcport->port_name, fcport->port_name,
2741 WWN_SIZE))
2742 continue;
2743
ddb9b126 2744 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 2745 fcport->loop_id = new_fcport->loop_id;
2746 fcport->port_type = new_fcport->port_type;
2747 fcport->d_id.b24 = new_fcport->d_id.b24;
2748 memcpy(fcport->node_name, new_fcport->node_name,
2749 WWN_SIZE);
2750
2751 found++;
2752 break;
2753 }
2754
2755 if (!found) {
2756 /* New device, add to fcports list. */
e315cd28
AC		 2757 if (vha->vp_idx) {
2758 new_fcport->vha = vha;
2759 new_fcport->vp_idx = vha->vp_idx;
2c3dfe3f 2760 }
e315cd28 2761 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 2762
2763 /* Allocate a new replacement fcport. */
2764 fcport = new_fcport;
e315cd28 2765 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2766 if (new_fcport == NULL) {
7c3df132
SK		 2767 ql_log(ql_log_warn, vha, 0x201c,
2768 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 2769 rval = QLA_MEMORY_ALLOC_FAILED;
2770 goto cleanup_allocation;
2771 }
2772 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2773 }
2774
d8b45213 2775 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 2776 fcport->fp_speed = ha->link_data_rate;
d8b45213 2777
e315cd28 2778 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 2779
2780 found_devs++;
2781 }
2782
2783cleanup_allocation:
c9475cb0 2784 kfree(new_fcport);
1da177e4
LT		 2785
2786 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2787 ql_dbg(ql_dbg_disc, vha, 0x201d,
2788 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 2789 }
2790
1da177e4
LT		 2791 return (rval);
2792}
2793
d8b45213 2794static void
e315cd28 2795qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213
AV		 2796{
2797#define LS_UNKNOWN 2
9f8fddee
AV		 2798 static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
2799 char *link_speed;
d8b45213 2800 int rval;
1bb39548 2801 uint16_t mb[4];
e315cd28 2802 struct qla_hw_data *ha = vha->hw;
d8b45213 2803
c76f2c01 2804 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 2805 return;
2806
c9afb9a2
GM		 2807 if (atomic_read(&fcport->state) != FCS_ONLINE)
2808 return;
2809
39bd9622
AV		 2810 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
2811 fcport->fp_speed > ha->link_data_rate)
d8b45213
AV		 2812 return;
2813
e315cd28 2814 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 2815 mb);
d8b45213 2816 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2817 ql_dbg(ql_dbg_disc, vha, 0x2004,
2818 "Unable to adjust iIDMA "
2819 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x "
2820 "%04x.\n", fcport->port_name[0], fcport->port_name[1],
d8b45213
AV		 2821 fcport->port_name[2], fcport->port_name[3],
2822 fcport->port_name[4], fcport->port_name[5],
2823 fcport->port_name[6], fcport->port_name[7], rval,
7c3df132 2824 fcport->fp_speed, mb[0], mb[1]);
d8b45213 2825 } else {
9f8fddee
AV		 2826 link_speed = link_speeds[LS_UNKNOWN];
2827 if (fcport->fp_speed < 5)
2828 link_speed = link_speeds[fcport->fp_speed];
2829 else if (fcport->fp_speed == 0x13)
2830 link_speed = link_speeds[5];
7c3df132
SK		 2831 ql_dbg(ql_dbg_disc, vha, 0x2005,
2832 "iIDMA adjusted to %s GB/s "
2833 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed,
2834 fcport->port_name[0], fcport->port_name[1],
2835 fcport->port_name[2], fcport->port_name[3],
2836 fcport->port_name[4], fcport->port_name[5],
2837 fcport->port_name[6], fcport->port_name[7]);
d8b45213
AV		 2838 }
2839}
2840
23be331d 2841static void
e315cd28 2842qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118 2843{
2844 struct fc_rport_identifiers rport_ids;
bdf79621 2845 struct fc_rport *rport;
044d78e1 2846 unsigned long flags;
8482e118 2847
ac280b67 2848 qla2x00_rport_del(fcport);
8482e118 2849
f8b02a85
AV		 2850 rport_ids.node_name = wwn_to_u64(fcport->node_name);
2851 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118 2852 rport_ids.port_id = fcport->d_id.b.domain << 16 |
2853 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 2854 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 2855 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 2856 if (!rport) {
7c3df132
SK		 2857 ql_log(ql_log_warn, vha, 0x2006,
2858 "Unable to allocate fc remote port.\n");
77d74143
AV		 2859 return;
2860 }
044d78e1 2861 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 2862 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 2863 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 2864
ad3e0eda 2865 rport->supported_classes = fcport->supported_classes;
77d74143 2866
8482e118 2867 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
2868 if (fcport->port_type == FCT_INITIATOR)
2869 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
2870 if (fcport->port_type == FCT_TARGET)
2871 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
77d74143 2872 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 2873}
2874
23be331d
AB		 2875/*
2876 * qla2x00_update_fcport
2877 * Updates device on list.
2878 *
2879 * Input:
2880 * ha = adapter block pointer.
2881 * fcport = port structure pointer.
2882 *
2883 * Return:
2884 * 0 - Success
2885 * BIT_0 - error
2886 *
2887 * Context:
2888 * Kernel context.
2889 */
2890void
e315cd28 2891qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 2892{
e315cd28 2893 fcport->vha = vha;
23be331d 2894 fcport->login_retry = 0;
5ff1d584 2895 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
23be331d 2896
e315cd28 2897 qla2x00_iidma_fcport(vha, fcport);
21090cbe 2898 qla24xx_update_fcport_fcp_prio(vha, fcport);
e315cd28 2899 qla2x00_reg_remote_port(vha, fcport);
ec426e10 2900 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
23be331d
AB		 2901}
2902
1da177e4
LT		 2903/*
2904 * qla2x00_configure_fabric
2905 * Setup SNS devices with loop ID's.
2906 *
2907 * Input:
2908 * ha = adapter block pointer.
2909 *
2910 * Returns:
2911 * 0 = success.
2912 * BIT_0 = error
2913 */
2914static int
e315cd28 2915qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4 2916{
b3b02e6e 2917 int rval;
1da177e4
LT		 2918 fc_port_t *fcport, *fcptemp;
2919 uint16_t next_loopid;
2920 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 2921 uint16_t loop_id;
1da177e4 2922 LIST_HEAD(new_fcports);
e315cd28
AC		 2923 struct qla_hw_data *ha = vha->hw;
2924 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 2925
2926 /* If FL port exists, then SNS is present */
e428924c 2927 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 2928 loop_id = NPH_F_PORT;
2929 else
2930 loop_id = SNS_FL_PORT;
e315cd28 2931 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 2932 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2933 ql_dbg(ql_dbg_disc, vha, 0x201f,
2934 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 2935
e315cd28 2936 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 2937 return (QLA_SUCCESS);
2938 }
e315cd28 2939 vha->device_flags |= SWITCH_FOUND;
1da177e4 2940
1da177e4 2941 do {
cca5335c
AV		 2942 /* FDMI support. */
2943 if (ql2xfdmienable &&
e315cd28
AC		 2944 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
2945 qla2x00_fdmi_register(vha);
cca5335c 2946
1da177e4 2947 /* Ensure we are logged into the SNS. */
e428924c 2948 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 2949 loop_id = NPH_SNS;
2950 else
2951 loop_id = SIMPLE_NAME_SERVER;
e315cd28 2952 ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
abbd8870 2953 0xfc, mb, BIT_1 | BIT_0);
1da177e4 2954 if (mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 2955 ql_dbg(ql_dbg_disc, vha, 0x2042,
2956 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
2957 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
2958 mb[2], mb[6], mb[7]);
1da177e4
LT		 2959 return (QLA_SUCCESS);
2960 }
2961
e315cd28
AC		 2962 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
2963 if (qla2x00_rft_id(vha)) {
1da177e4 2964 /* EMPTY */
7c3df132
SK		 2965 ql_dbg(ql_dbg_disc, vha, 0x2045,
2966 "Register FC-4 TYPE failed.\n");
1da177e4 2967 }
e315cd28 2968 if (qla2x00_rff_id(vha)) {
1da177e4 2969 /* EMPTY */
7c3df132
SK		 2970 ql_dbg(ql_dbg_disc, vha, 0x2049,
2971 "Register FC-4 Features failed.\n");
1da177e4 2972 }
e315cd28 2973 if (qla2x00_rnn_id(vha)) {
1da177e4 2974 /* EMPTY */
7c3df132
SK		 2975 ql_dbg(ql_dbg_disc, vha, 0x204f,
2976 "Register Node Name failed.\n");
e315cd28 2977 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 2978 /* EMPTY */
7c3df132
SK		 2979 ql_dbg(ql_dbg_disc, vha, 0x2053,
2980 "Register Symobilic Node Name failed.\n");
1da177e4
LT		 2981 }
2982 }
2983
b3b02e6e
AE		 2984#define QLA_FCPORT_SCAN 1
2985#define QLA_FCPORT_FOUND 2
2986
2987 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2988 fcport->scan_state = QLA_FCPORT_SCAN;
2989 }
2990
e315cd28 2991 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
1da177e4
LT		 2992 if (rval != QLA_SUCCESS)
2993 break;
2994
2995 /*
2996 * Logout all previous fabric devices marked lost, except
f08b7251 2997 * FCP2 devices.
1da177e4 2998 */
e315cd28
AC		 2999 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3000 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3001 break;
3002
3003 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3004 continue;
3005
b3b02e6e
AE		 3006 if (fcport->scan_state == QLA_FCPORT_SCAN &&
3007 atomic_read(&fcport->state) == FCS_ONLINE) {
e315cd28 3008 qla2x00_mark_device_lost(vha, fcport,
d97994dc 3009 ql2xplogiabsentdevice, 0);
1da177e4 3010 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3011 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
1da177e4
LT		 3012 fcport->port_type != FCT_INITIATOR &&
3013 fcport->port_type != FCT_BROADCAST) {
e315cd28 3014 ha->isp_ops->fabric_logout(vha,
1c7c6357
AV		 3015 fcport->loop_id,
3016 fcport->d_id.b.domain,
3017 fcport->d_id.b.area,
3018 fcport->d_id.b.al_pa);
1da177e4
LT		 3019 fcport->loop_id = FC_NO_LOOP_ID;
3020 }
3021 }
3022 }
3023
3024 /* Starting free loop ID. */
e315cd28 3025 next_loopid = ha->min_external_loopid;
1da177e4
LT		 3026
3027 /*
3028 * Scan through our port list and login entries that need to be
3029 * logged in.
3030 */
e315cd28
AC		 3031 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3032 if (atomic_read(&vha->loop_down_timer) ||
3033 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3034 break;
3035
3036 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3037 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3038 continue;
3039
3040 if (fcport->loop_id == FC_NO_LOOP_ID) {
3041 fcport->loop_id = next_loopid;
d4486fd6 3042 rval = qla2x00_find_new_loop_id(
e315cd28 3043 base_vha, fcport);
1da177e4
LT		 3044 if (rval != QLA_SUCCESS) {
3045 /* Ran out of IDs to use */
3046 break;
3047 }
3048 }
1da177e4 3049 /* Login and update database */
e315cd28 3050 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
1da177e4
LT		 3051 }
3052
3053 /* Exit if out of loop IDs. */
3054 if (rval != QLA_SUCCESS) {
3055 break;
3056 }
3057
3058 /*
3059 * Login and add the new devices to our port list.
3060 */
3061 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
e315cd28
AC		 3062 if (atomic_read(&vha->loop_down_timer) ||
3063 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3064 break;
3065
3066 /* Find a new loop ID to use. */
3067 fcport->loop_id = next_loopid;
e315cd28 3068 rval = qla2x00_find_new_loop_id(base_vha, fcport);
1da177e4
LT		 3069 if (rval != QLA_SUCCESS) {
3070 /* Ran out of IDs to use */
3071 break;
3072 }
3073
bdf79621 3074 /* Login and update database */
e315cd28
AC		 3075 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3076
3077 if (vha->vp_idx) {
3078 fcport->vha = vha;
3079 fcport->vp_idx = vha->vp_idx;
3080 }
3081 list_move_tail(&fcport->list, &vha->vp_fcports);
1da177e4
LT		 3082 }
3083 } while (0);
3084
3085 /* Free all new device structures not processed. */
3086 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3087 list_del(&fcport->list);
3088 kfree(fcport);
3089 }
3090
3091 if (rval) {
7c3df132
SK		 3092 ql_dbg(ql_dbg_disc, vha, 0x2068,
3093 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 3094 }
3095
3096 return (rval);
3097}
3098
1da177e4
LT		 3099/*
3100 * qla2x00_find_all_fabric_devs
3101 *
3102 * Input:
3103 * ha = adapter block pointer.
3104 * dev = database device entry pointer.
3105 *
3106 * Returns:
3107 * 0 = success.
3108 *
3109 * Context:
3110 * Kernel context.
3111 */
3112static int
e315cd28
AC		 3113qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3114 struct list_head *new_fcports)
1da177e4
LT		 3115{
3116 int rval;
3117 uint16_t loop_id;
3118 fc_port_t *fcport, *new_fcport, *fcptemp;
3119 int found;
3120
3121 sw_info_t *swl;
3122 int swl_idx;
3123 int first_dev, last_dev;
1516ef44 3124 port_id_t wrap = {}, nxt_d_id;
e315cd28
AC		 3125 struct qla_hw_data *ha = vha->hw;
3126 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
ee546b6e 3127 struct scsi_qla_host *tvp;
1da177e4
LT		 3128
3129 rval = QLA_SUCCESS;
3130
3131 /* Try GID_PT to get device list, else GAN. */
4b89258c 3132 swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
bbfbbbc1 3133 if (!swl) {
1da177e4 3134 /*EMPTY*/
7c3df132
SK		 3135 ql_dbg(ql_dbg_disc, vha, 0x2054,
3136 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 3137 } else {
e315cd28 3138 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4
LT		 3139 kfree(swl);
3140 swl = NULL;
e315cd28 3141 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4
LT		 3142 kfree(swl);
3143 swl = NULL;
e315cd28 3144 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4
LT		 3145 kfree(swl);
3146 swl = NULL;
e5896bd5 3147 } else if (ql2xiidmaenable &&
e315cd28
AC		 3148 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3149 qla2x00_gpsc(vha, swl);
1da177e4 3150 }
e8c72ba5
CD		 3151
3152 /* If other queries succeeded probe for FC-4 type */
3153 if (swl)
3154 qla2x00_gff_id(vha, swl);
1da177e4
LT		 3155 }
3156 swl_idx = 0;
3157
3158 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 3159 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3160 if (new_fcport == NULL) {
7c3df132
SK		 3161 ql_log(ql_log_warn, vha, 0x205e,
3162 "Failed to allocate memory for fcport.\n");
c9475cb0 3163 kfree(swl);
1da177e4
LT		 3164 return (QLA_MEMORY_ALLOC_FAILED);
3165 }
3166 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 3167 /* Set start port ID scan at adapter ID. */
3168 first_dev = 1;
3169 last_dev = 0;
3170
3171 /* Starting free loop ID. */
e315cd28
AC		 3172 loop_id = ha->min_external_loopid;
3173 for (; loop_id <= ha->max_loop_id; loop_id++) {
3174 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 3175 continue;
3176
3a6478df
GM		 3177 if (ha->current_topology == ISP_CFG_FL &&
3178 (atomic_read(&vha->loop_down_timer) ||
3179 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 3180 atomic_set(&vha->loop_down_timer, 0);
3181 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3182 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 3183 break;
bb2d52b2 3184 }
1da177e4
LT		 3185
3186 if (swl != NULL) {
3187 if (last_dev) {
3188 wrap.b24 = new_fcport->d_id.b24;
3189 } else {
3190 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3191 memcpy(new_fcport->node_name,
3192 swl[swl_idx].node_name, WWN_SIZE);
3193 memcpy(new_fcport->port_name,
3194 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 3195 memcpy(new_fcport->fabric_port_name,
3196 swl[swl_idx].fabric_port_name, WWN_SIZE);
3197 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 3198 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4
LT		 3199
3200 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3201 last_dev = 1;
3202 }
3203 swl_idx++;
3204 }
3205 } else {
3206 /* Send GA_NXT to the switch */
e315cd28 3207 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 3208 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3209 ql_log(ql_log_warn, vha, 0x2064,
3210 "SNS scan failed -- assuming "
3211 "zero-entry result.\n");
1da177e4
LT		 3212 list_for_each_entry_safe(fcport, fcptemp,
3213 new_fcports, list) {
3214 list_del(&fcport->list);
3215 kfree(fcport);
3216 }
3217 rval = QLA_SUCCESS;
3218 break;
3219 }
3220 }
3221
3222 /* If wrap on switch device list, exit. */
3223 if (first_dev) {
3224 wrap.b24 = new_fcport->d_id.b24;
3225 first_dev = 0;
3226 } else if (new_fcport->d_id.b24 == wrap.b24) {
7c3df132
SK		 3227 ql_dbg(ql_dbg_disc, vha, 0x2065,
3228 "Device wrap (%02x%02x%02x).\n",
3229 new_fcport->d_id.b.domain,
3230 new_fcport->d_id.b.area,
3231 new_fcport->d_id.b.al_pa);
1da177e4
LT		 3232 break;
3233 }
3234
2c3dfe3f 3235 /* Bypass if same physical adapter. */
e315cd28 3236 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 3237 continue;
3238
2c3dfe3f 3239 /* Bypass virtual ports of the same host. */
e315cd28
AC		 3240 found = 0;
3241 if (ha->num_vhosts) {
feafb7b1
AE		 3242 unsigned long flags;
3243
3244 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3245 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3246 if (new_fcport->d_id.b24 == vp->d_id.b24) {
3247 found = 1;
2c3dfe3f 3248 break;
e315cd28 3249 }
2c3dfe3f 3250 }
feafb7b1
AE		 3251 spin_unlock_irqrestore(&ha->vport_slock, flags);
3252
e315cd28 3253 if (found)
2c3dfe3f
SJ		 3254 continue;
3255 }
3256
f7d289f6
AV		 3257 /* Bypass if same domain and area of adapter. */
3258 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 3259 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 3260 ISP_CFG_FL)
3261 continue;
3262
1da177e4
LT		 3263 /* Bypass reserved domain fields. */
3264 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3265 continue;
3266
e8c72ba5 3267 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 3268 if (ql2xgffidenable &&
3269 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3270 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 3271 continue;
3272
1da177e4
LT		 3273 /* Locate matching device in database. */
3274 found = 0;
e315cd28 3275 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3276 if (memcmp(new_fcport->port_name, fcport->port_name,
3277 WWN_SIZE))
3278 continue;
3279
b3b02e6e
AE		 3280 fcport->scan_state = QLA_FCPORT_FOUND;
3281
1da177e4
LT		 3282 found++;
3283
d8b45213
AV		 3284 /* Update port state. */
3285 memcpy(fcport->fabric_port_name,
3286 new_fcport->fabric_port_name, WWN_SIZE);
3287 fcport->fp_speed = new_fcport->fp_speed;
3288
1da177e4
LT		 3289 /*
3290 * If address the same and state FCS_ONLINE, nothing
3291 * changed.
3292 */
3293 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3294 atomic_read(&fcport->state) == FCS_ONLINE) {
3295 break;
3296 }
3297
3298 /*
3299 * If device was not a fabric device before.
3300 */
3301 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3302 fcport->d_id.b24 = new_fcport->d_id.b24;
3303 fcport->loop_id = FC_NO_LOOP_ID;
3304 fcport->flags |= (FCF_FABRIC_DEVICE |
3305 FCF_LOGIN_NEEDED);
1da177e4
LT		 3306 break;
3307 }
3308
3309 /*
3310 * Port ID changed or device was marked to be updated;
3311 * Log it out if still logged in and mark it for
3312 * relogin later.
3313 */
3314 fcport->d_id.b24 = new_fcport->d_id.b24;
3315 fcport->flags |= FCF_LOGIN_NEEDED;
3316 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3317 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
1da177e4
LT		 3318 fcport->port_type != FCT_INITIATOR &&
3319 fcport->port_type != FCT_BROADCAST) {
e315cd28 3320 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3321 fcport->d_id.b.domain, fcport->d_id.b.area,
3322 fcport->d_id.b.al_pa);
1da177e4
LT		 3323 fcport->loop_id = FC_NO_LOOP_ID;
3324 }
3325
3326 break;
3327 }
3328
3329 if (found)
3330 continue;
1da177e4
LT		 3331 /* If device was not in our fcports list, then add it. */
3332 list_add_tail(&new_fcport->list, new_fcports);
3333
3334 /* Allocate a new replacement fcport. */
3335 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 3336 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3337 if (new_fcport == NULL) {
7c3df132
SK		 3338 ql_log(ql_log_warn, vha, 0x2066,
3339 "Memory allocation failed for fcport.\n");
c9475cb0 3340 kfree(swl);
1da177e4
LT		 3341 return (QLA_MEMORY_ALLOC_FAILED);
3342 }
3343 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3344 new_fcport->d_id.b24 = nxt_d_id.b24;
3345 }
3346
c9475cb0
JJ		 3347 kfree(swl);
3348 kfree(new_fcport);
1da177e4 3349
1da177e4
LT		 3350 return (rval);
3351}
3352
3353/*
3354 * qla2x00_find_new_loop_id
3355 * Scan through our port list and find a new usable loop ID.
3356 *
3357 * Input:
3358 * ha: adapter state pointer.
3359 * dev: port structure pointer.
3360 *
3361 * Returns:
3362 * qla2x00 local function return status code.
3363 *
3364 * Context:
3365 * Kernel context.
3366 */
03bcfb57 3367int
e315cd28 3368qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 3369{
3370 int rval;
3371 int found;
3372 fc_port_t *fcport;
3373 uint16_t first_loop_id;
e315cd28
AC		 3374 struct qla_hw_data *ha = vha->hw;
3375 struct scsi_qla_host *vp;
ee546b6e 3376 struct scsi_qla_host *tvp;
feafb7b1 3377 unsigned long flags = 0;
1da177e4
LT		 3378
3379 rval = QLA_SUCCESS;
3380
3381 /* Save starting loop ID. */
3382 first_loop_id = dev->loop_id;
3383
3384 for (;;) {
3385 /* Skip loop ID if already used by adapter. */
e315cd28 3386 if (dev->loop_id == vha->loop_id)
1da177e4 3387 dev->loop_id++;
1da177e4
LT		 3388
3389 /* Skip reserved loop IDs. */
e315cd28 3390 while (qla2x00_is_reserved_id(vha, dev->loop_id))
1da177e4 3391 dev->loop_id++;
1da177e4
LT		 3392
3393 /* Reset loop ID if passed the end. */
e315cd28 3394 if (dev->loop_id > ha->max_loop_id) {
1da177e4
LT		 3395 /* first loop ID. */
3396 dev->loop_id = ha->min_external_loopid;
3397 }
3398
3399 /* Check for loop ID being already in use. */
3400 found = 0;
3401 fcport = NULL;
feafb7b1
AE		 3402
3403 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3404 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3405 list_for_each_entry(fcport, &vp->vp_fcports, list) {
3406 if (fcport->loop_id == dev->loop_id &&
3407 fcport != dev) {
3408 /* ID possibly in use */
3409 found++;
3410 break;
3411 }
1da177e4 3412 }
e315cd28
AC		 3413 if (found)
3414 break;
1da177e4 3415 }
feafb7b1 3416 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4
LT		 3417
3418 /* If not in use then it is free to use. */
3419 if (!found) {
3420 break;
3421 }
3422
3423 /* ID in use. Try next value. */
3424 dev->loop_id++;
3425
3426 /* If wrap around. No free ID to use. */
3427 if (dev->loop_id == first_loop_id) {
3428 dev->loop_id = FC_NO_LOOP_ID;
3429 rval = QLA_FUNCTION_FAILED;
3430 break;
3431 }
3432 }
3433
3434 return (rval);
3435}
3436
1da177e4
LT		 3437/*
3438 * qla2x00_fabric_dev_login
3439 * Login fabric target device and update FC port database.
3440 *
3441 * Input:
3442 * ha: adapter state pointer.
3443 * fcport: port structure list pointer.
3444 * next_loopid: contains value of a new loop ID that can be used
3445 * by the next login attempt.
3446 *
3447 * Returns:
3448 * qla2x00 local function return status code.
3449 *
3450 * Context:
3451 * Kernel context.
3452 */
3453static int
e315cd28 3454qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3455 uint16_t *next_loopid)
3456{
3457 int rval;
3458 int retry;
0107109e 3459 uint8_t opts;
e315cd28 3460 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3461
3462 rval = QLA_SUCCESS;
3463 retry = 0;
3464
ac280b67 3465 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584
AV		 3466 if (fcport->flags & FCF_ASYNC_SENT)
3467 return rval;
3468 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3469 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3470 if (!rval)
3471 return rval;
3472 }
3473
5ff1d584 3474 fcport->flags &= ~FCF_ASYNC_SENT;
e315cd28 3475 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
1da177e4 3476 if (rval == QLA_SUCCESS) {
f08b7251 3477 /* Send an ADISC to FCP2 devices.*/
0107109e 3478 opts = 0;
f08b7251 3479 if (fcport->flags & FCF_FCP2_DEVICE)
0107109e 3480 opts |= BIT_1;
e315cd28 3481 rval = qla2x00_get_port_database(vha, fcport, opts);
1da177e4 3482 if (rval != QLA_SUCCESS) {
e315cd28 3483 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3484 fcport->d_id.b.domain, fcport->d_id.b.area,
3485 fcport->d_id.b.al_pa);
e315cd28 3486 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4 3487 } else {
e315cd28 3488 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 3489 }
3490 }
3491
3492 return (rval);
3493}
3494
3495/*
3496 * qla2x00_fabric_login
3497 * Issue fabric login command.
3498 *
3499 * Input:
3500 * ha = adapter block pointer.
3501 * device = pointer to FC device type structure.
3502 *
3503 * Returns:
3504 * 0 - Login successfully
3505 * 1 - Login failed
3506 * 2 - Initiator device
3507 * 3 - Fatal error
3508 */
3509int
e315cd28 3510qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3511 uint16_t *next_loopid)
3512{
3513 int rval;
3514 int retry;
3515 uint16_t tmp_loopid;
3516 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 3517 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3518
3519 retry = 0;
3520 tmp_loopid = 0;
3521
3522 for (;;) {
7c3df132
SK		 3523 ql_dbg(ql_dbg_disc, vha, 0x2000,
3524 "Trying Fabric Login w/loop id 0x%04x for port "
3525 "%02x%02x%02x.\n",
3526 fcport->loop_id, fcport->d_id.b.domain,
3527 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3528
3529 /* Login fcport on switch. */
e315cd28 3530 ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 3531 fcport->d_id.b.domain, fcport->d_id.b.area,
3532 fcport->d_id.b.al_pa, mb, BIT_0);
3533 if (mb[0] == MBS_PORT_ID_USED) {
3534 /*
3535 * Device has another loop ID. The firmware team
0107109e
AV		 3536 * recommends the driver perform an implicit login with
3537 * the specified ID again. The ID we just used is save
3538 * here so we return with an ID that can be tried by
3539 * the next login.
1da177e4
LT		 3540 */
3541 retry++;
3542 tmp_loopid = fcport->loop_id;
3543 fcport->loop_id = mb[1];
3544
7c3df132
SK		 3545 ql_dbg(ql_dbg_disc, vha, 0x2001,
3546 "Fabric Login: port in use - next loop "
3547 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 3548 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 3549 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3550
3551 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3552 /*
3553 * Login succeeded.
3554 */
3555 if (retry) {
3556 /* A retry occurred before. */
3557 *next_loopid = tmp_loopid;
3558 } else {
3559 /*
3560 * No retry occurred before. Just increment the
3561 * ID value for next login.
3562 */
3563 *next_loopid = (fcport->loop_id + 1);
3564 }
3565
3566 if (mb[1] & BIT_0) {
3567 fcport->port_type = FCT_INITIATOR;
3568 } else {
3569 fcport->port_type = FCT_TARGET;
3570 if (mb[1] & BIT_1) {
8474f3a0 3571 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 3572 }
3573 }
3574
ad3e0eda
AV		 3575 if (mb[10] & BIT_0)
3576 fcport->supported_classes |= FC_COS_CLASS2;
3577 if (mb[10] & BIT_1)
3578 fcport->supported_classes |= FC_COS_CLASS3;
3579
1da177e4
LT		 3580 rval = QLA_SUCCESS;
3581 break;
3582 } else if (mb[0] == MBS_LOOP_ID_USED) {
3583 /*
3584 * Loop ID already used, try next loop ID.
3585 */
3586 fcport->loop_id++;
e315cd28 3587 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 3588 if (rval != QLA_SUCCESS) {
3589 /* Ran out of loop IDs to use */
3590 break;
3591 }
3592 } else if (mb[0] == MBS_COMMAND_ERROR) {
3593 /*
3594 * Firmware possibly timed out during login. If NO
3595 * retries are left to do then the device is declared
3596 * dead.
3597 */
3598 *next_loopid = fcport->loop_id;
e315cd28 3599 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3600 fcport->d_id.b.domain, fcport->d_id.b.area,
3601 fcport->d_id.b.al_pa);
e315cd28 3602 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 3603
3604 rval = 1;
3605 break;
3606 } else {
3607 /*
3608 * unrecoverable / not handled error
3609 */
7c3df132
SK		 3610 ql_dbg(ql_dbg_disc, vha, 0x2002,
3611 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3612 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3613 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3614 fcport->loop_id, jiffies);
1da177e4
LT		 3615
3616 *next_loopid = fcport->loop_id;
e315cd28 3617 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3618 fcport->d_id.b.domain, fcport->d_id.b.area,
3619 fcport->d_id.b.al_pa);
1da177e4 3620 fcport->loop_id = FC_NO_LOOP_ID;
0eedfcf0 3621 fcport->login_retry = 0;
1da177e4
LT		 3622
3623 rval = 3;
3624 break;
3625 }
3626 }
3627
3628 return (rval);
3629}
3630
3631/*
3632 * qla2x00_local_device_login
3633 * Issue local device login command.
3634 *
3635 * Input:
3636 * ha = adapter block pointer.
3637 * loop_id = loop id of device to login to.
3638 *
3639 * Returns (Where's the #define!!!!):
3640 * 0 - Login successfully
3641 * 1 - Login failed
3642 * 3 - Fatal error
3643 */
3644int
e315cd28 3645qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 3646{
3647 int rval;
3648 uint16_t mb[MAILBOX_REGISTER_COUNT];
3649
3650 memset(mb, 0, sizeof(mb));
e315cd28 3651 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 3652 if (rval == QLA_SUCCESS) {
3653 /* Interrogate mailbox registers for any errors */
3654 if (mb[0] == MBS_COMMAND_ERROR)
3655 rval = 1;
3656 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3657 /* device not in PCB table */
3658 rval = 3;
3659 }
3660
3661 return (rval);
3662}
3663
3664/*
3665 * qla2x00_loop_resync
3666 * Resync with fibre channel devices.
3667 *
3668 * Input:
3669 * ha = adapter block pointer.
3670 *
3671 * Returns:
3672 * 0 = success
3673 */
3674int
e315cd28 3675qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 3676{
73208dfd 3677 int rval = QLA_SUCCESS;
1da177e4 3678 uint32_t wait_time;
67c2e93a
AC		 3679 struct req_que *req;
3680 struct rsp_que *rsp;
3681
7163ea81 3682 if (vha->hw->flags.cpu_affinity_enabled)
67c2e93a
AC		 3683 req = vha->hw->req_q_map[0];
3684 else
3685 req = vha->req;
3686 rsp = req->rsp;
1da177e4 3687
e315cd28
AC		 3688 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3689 if (vha->flags.online) {
3690 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 3691 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3692 wait_time = 256;
3693 do {
0107109e 3694 /* Issue a marker after FW becomes ready. */
73208dfd
AC		 3695 qla2x00_marker(vha, req, rsp, 0, 0,
3696 MK_SYNC_ALL);
e315cd28 3697 vha->marker_needed = 0;
1da177e4
LT		 3698
3699 /* Remap devices on Loop. */
e315cd28 3700 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 3701
e315cd28 3702 qla2x00_configure_loop(vha);
1da177e4 3703 wait_time--;
e315cd28
AC		 3704 } while (!atomic_read(&vha->loop_down_timer) &&
3705 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3706 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3707 &vha->dpc_flags)));
1da177e4 3708 }
1da177e4
LT		 3709 }
3710
e315cd28 3711 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 3712 return (QLA_FUNCTION_FAILED);
1da177e4 3713
e315cd28 3714 if (rval)
7c3df132
SK		 3715 ql_dbg(ql_dbg_disc, vha, 0x206c,
3716 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 3717
3718 return (rval);
3719}
3720
579d12b5
SK		 3721/*
3722* qla2x00_perform_loop_resync
3723* Description: This function will set the appropriate flags and call
3724* qla2x00_loop_resync. If successful loop will be resynced
3725* Arguments : scsi_qla_host_t pointer
3726* returm : Success or Failure
3727*/
3728
3729int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3730{
3731 int32_t rval = 0;
3732
3733 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3734 /*Configure the flags so that resync happens properly*/
3735 atomic_set(&ha->loop_down_timer, 0);
3736 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3737 atomic_set(&ha->loop_state, LOOP_UP);
3738 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3739 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3740 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3741
3742 rval = qla2x00_loop_resync(ha);
3743 } else
3744 atomic_set(&ha->loop_state, LOOP_DEAD);
3745
3746 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3747 }
3748
3749 return rval;
3750}
3751
d97994dc 3752void
67becc00 3753qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc 3754{
3755 fc_port_t *fcport;
feafb7b1
AE		 3756 struct scsi_qla_host *vha;
3757 struct qla_hw_data *ha = base_vha->hw;
3758 unsigned long flags;
d97994dc 3759
feafb7b1 3760 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 3761 /* Go with deferred removal of rport references. */
feafb7b1
AE		 3762 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3763 atomic_inc(&vha->vref_count);
3764 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 3765 if (fcport->drport &&
feafb7b1
AE		 3766 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3767 spin_unlock_irqrestore(&ha->vport_slock, flags);
3768
67becc00 3769 qla2x00_rport_del(fcport);
feafb7b1
AE		 3770
3771 spin_lock_irqsave(&ha->vport_slock, flags);
3772 }
3773 }
3774 atomic_dec(&vha->vref_count);
3775 }
3776 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc 3777}
3778
579d12b5
SK		 3779/*
3780* qla82xx_quiescent_state_cleanup
3781* Description: This function will block the new I/Os
3782* Its not aborting any I/Os as context
3783* is not destroyed during quiescence
3784* Arguments: scsi_qla_host_t
3785* return : void
3786*/
3787void
3788qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
3789{
3790 struct qla_hw_data *ha = vha->hw;
3791 struct scsi_qla_host *vp;
3792
7c3df132
SK		 3793 ql_dbg(ql_dbg_p3p, vha, 0xb002,
3794 "Performing ISP error recovery - ha=%p.\n", ha);
579d12b5
SK		 3795
3796 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
3797 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3798 atomic_set(&vha->loop_state, LOOP_DOWN);
3799 qla2x00_mark_all_devices_lost(vha, 0);
3800 list_for_each_entry(vp, &ha->vp_list, list)
3801 qla2x00_mark_all_devices_lost(vha, 0);
3802 } else {
3803 if (!atomic_read(&vha->loop_down_timer))
3804 atomic_set(&vha->loop_down_timer,
3805 LOOP_DOWN_TIME);
3806 }
3807 /* Wait for pending cmds to complete */
3808 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
3809}
3810
a9083016
GM		 3811void
3812qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
3813{
3814 struct qla_hw_data *ha = vha->hw;
579d12b5 3815 struct scsi_qla_host *vp;
feafb7b1 3816 unsigned long flags;
6aef87be 3817 fc_port_t *fcport;
a9083016 3818
e46ef004
SK		 3819 /* For ISP82XX, driver waits for completion of the commands.
3820 * online flag should be set.
3821 */
3822 if (!IS_QLA82XX(ha))
3823 vha->flags.online = 0;
a9083016
GM		 3824 ha->flags.chip_reset_done = 0;
3825 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3826 ha->qla_stats.total_isp_aborts++;
3827
7c3df132
SK		 3828 ql_log(ql_log_info, vha, 0x00af,
3829 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 3830
e46ef004
SK		 3831 /* For ISP82XX, reset_chip is just disabling interrupts.
3832 * Driver waits for the completion of the commands.
3833 * the interrupts need to be enabled.
3834 */
a9083016
GM		 3835 if (!IS_QLA82XX(ha))
3836 ha->isp_ops->reset_chip(vha);
3837
3838 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
3839 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3840 atomic_set(&vha->loop_state, LOOP_DOWN);
3841 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 3842
3843 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 3844 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 3845 atomic_inc(&vp->vref_count);
3846 spin_unlock_irqrestore(&ha->vport_slock, flags);
3847
a9083016 3848 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 3849
3850 spin_lock_irqsave(&ha->vport_slock, flags);
3851 atomic_dec(&vp->vref_count);
3852 }
3853 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 3854 } else {
3855 if (!atomic_read(&vha->loop_down_timer))
3856 atomic_set(&vha->loop_down_timer,
3857 LOOP_DOWN_TIME);
3858 }
3859
6aef87be
AV		 3860 /* Clear all async request states across all VPs. */
3861 list_for_each_entry(fcport, &vha->vp_fcports, list)
3862 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3863 spin_lock_irqsave(&ha->vport_slock, flags);
3864 list_for_each_entry(vp, &ha->vp_list, list) {
3865 atomic_inc(&vp->vref_count);
3866 spin_unlock_irqrestore(&ha->vport_slock, flags);
3867
3868 list_for_each_entry(fcport, &vp->vp_fcports, list)
3869 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3870
3871 spin_lock_irqsave(&ha->vport_slock, flags);
3872 atomic_dec(&vp->vref_count);
3873 }
3874 spin_unlock_irqrestore(&ha->vport_slock, flags);
3875
bddd2d65
LC		 3876 if (!ha->flags.eeh_busy) {
3877 /* Make sure for ISP 82XX IO DMA is complete */
3878 if (IS_QLA82XX(ha)) {
7190575f 3879 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 3880 ql_log(ql_log_info, vha, 0x00b4,
3881 "Done chip reset cleanup.\n");
a9083016 3882
e46ef004
SK		 3883 /* Done waiting for pending commands.
3884 * Reset the online flag.
3885 */
3886 vha->flags.online = 0;
4d78c973 3887 }
a9083016 3888
bddd2d65
LC		 3889 /* Requeue all commands in outstanding command list. */
3890 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
3891 }
a9083016
GM		 3892}
3893
1da177e4
LT		 3894/*
3895* qla2x00_abort_isp
3896* Resets ISP and aborts all outstanding commands.
3897*
3898* Input:
3899* ha = adapter block pointer.
3900*
3901* Returns:
3902* 0 = success
3903*/
3904int
e315cd28 3905qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 3906{
476e8978 3907 int rval;
1da177e4 3908 uint8_t status = 0;
e315cd28
AC		 3909 struct qla_hw_data *ha = vha->hw;
3910 struct scsi_qla_host *vp;
73208dfd 3911 struct req_que *req = ha->req_q_map[0];
feafb7b1 3912 unsigned long flags;
1da177e4 3913
e315cd28 3914 if (vha->flags.online) {
a9083016 3915 qla2x00_abort_isp_cleanup(vha);
1da177e4 3916
85880801
AV		 3917 if (unlikely(pci_channel_offline(ha->pdev) &&
3918 ha->flags.pci_channel_io_perm_failure)) {
3919 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3920 status = 0;
3921 return status;
3922 }
3923
73208dfd 3924 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 3925
e315cd28 3926 ha->isp_ops->nvram_config(vha);
1da177e4 3927
e315cd28
AC		 3928 if (!qla2x00_restart_isp(vha)) {
3929 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 3930
e315cd28 3931 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 3932 /*
3933 * Issue marker command only when we are going
3934 * to start the I/O .
3935 */
e315cd28 3936 vha->marker_needed = 1;
1da177e4
LT		 3937 }
3938
e315cd28 3939 vha->flags.online = 1;
1da177e4 3940
fd34f556 3941 ha->isp_ops->enable_intrs(ha);
1da177e4 3942
fa2a1ce5 3943 ha->isp_abort_cnt = 0;
e315cd28 3944 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 3945
6246b8a1
GM		 3946 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
3947 qla2x00_get_fw_version(vha);
df613b96
AV		 3948 if (ha->fce) {
3949 ha->flags.fce_enabled = 1;
3950 memset(ha->fce, 0,
3951 fce_calc_size(ha->fce_bufs));
e315cd28 3952 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 3953 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
3954 &ha->fce_bufs);
3955 if (rval) {
7c3df132 3956 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 3957 "Unable to reinitialize FCE "
3958 "(%d).\n", rval);
3959 ha->flags.fce_enabled = 0;
3960 }
3961 }
436a7b11
AV		 3962
3963 if (ha->eft) {
3964 memset(ha->eft, 0, EFT_SIZE);
e315cd28 3965 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 3966 ha->eft_dma, EFT_NUM_BUFFERS);
3967 if (rval) {
7c3df132 3968 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 3969 "Unable to reinitialize EFT "
3970 "(%d).\n", rval);
3971 }
3972 }
1da177e4 3973 } else { /* failed the ISP abort */
e315cd28
AC		 3974 vha->flags.online = 1;
3975 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 3976 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 3977 ql_log(ql_log_fatal, vha, 0x8035,
3978 "ISP error recover failed - "
3979 "board disabled.\n");
fa2a1ce5 3980 /*
1da177e4
LT		 3981 * The next call disables the board
3982 * completely.
3983 */
e315cd28
AC		 3984 ha->isp_ops->reset_adapter(vha);
3985 vha->flags.online = 0;
1da177e4 3986 clear_bit(ISP_ABORT_RETRY,
e315cd28 3987 &vha->dpc_flags);
1da177e4
LT		 3988 status = 0;
3989 } else { /* schedule another ISP abort */
3990 ha->isp_abort_cnt--;
7c3df132
SK		 3991 ql_dbg(ql_dbg_taskm, vha, 0x8020,
3992 "ISP abort - retry remaining %d.\n",
3993 ha->isp_abort_cnt);
1da177e4
LT		 3994 status = 1;
3995 }
3996 } else {
3997 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 3998 ql_dbg(ql_dbg_taskm, vha, 0x8021,
3999 "ISP error recovery - retrying (%d) "
4000 "more times.\n", ha->isp_abort_cnt);
e315cd28 4001 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 4002 status = 1;
4003 }
4004 }
fa2a1ce5 4005
1da177e4
LT		 4006 }
4007
e315cd28 4008 if (!status) {
7c3df132 4009 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
feafb7b1
AE		 4010
4011 spin_lock_irqsave(&ha->vport_slock, flags);
4012 list_for_each_entry(vp, &ha->vp_list, list) {
4013 if (vp->vp_idx) {
4014 atomic_inc(&vp->vref_count);
4015 spin_unlock_irqrestore(&ha->vport_slock, flags);
4016
e315cd28 4017 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 4018
4019 spin_lock_irqsave(&ha->vport_slock, flags);
4020 atomic_dec(&vp->vref_count);
4021 }
e315cd28 4022 }
feafb7b1
AE		 4023 spin_unlock_irqrestore(&ha->vport_slock, flags);
4024
e315cd28 4025 } else {
d8424f68
JP		 4026 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4027 __func__);
1da177e4
LT		 4028 }
4029
4030 return(status);
4031}
4032
4033/*
4034* qla2x00_restart_isp
4035* restarts the ISP after a reset
4036*
4037* Input:
4038* ha = adapter block pointer.
4039*
4040* Returns:
4041* 0 = success
4042*/
4043static int
e315cd28 4044qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 4045{
c6b2fca8 4046 int status = 0;
1da177e4 4047 uint32_t wait_time;
e315cd28 4048 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 4049 struct req_que *req = ha->req_q_map[0];
4050 struct rsp_que *rsp = ha->rsp_q_map[0];
1da177e4
LT		 4051
4052 /* If firmware needs to be loaded */
e315cd28
AC		 4053 if (qla2x00_isp_firmware(vha)) {
4054 vha->flags.online = 0;
4055 status = ha->isp_ops->chip_diag(vha);
4056 if (!status)
4057 status = qla2x00_setup_chip(vha);
1da177e4
LT		 4058 }
4059
e315cd28
AC		 4060 if (!status && !(status = qla2x00_init_rings(vha))) {
4061 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 4062 ha->flags.chip_reset_done = 1;
73208dfd
AC		 4063 /* Initialize the queues in use */
4064 qla25xx_init_queues(ha);
4065
e315cd28
AC		 4066 status = qla2x00_fw_ready(vha);
4067 if (!status) {
7c3df132
SK		 4068 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4069 "Start configure loop status = %d.\n", status);
0107109e
AV		 4070
4071 /* Issue a marker after FW becomes ready. */
73208dfd 4072 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
0107109e 4073
e315cd28 4074 vha->flags.online = 1;
1da177e4
LT		 4075 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4076 wait_time = 256;
4077 do {
e315cd28
AC		 4078 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4079 qla2x00_configure_loop(vha);
1da177e4 4080 wait_time--;
e315cd28
AC		 4081 } while (!atomic_read(&vha->loop_down_timer) &&
4082 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4083 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4084 &vha->dpc_flags)));
1da177e4
LT		 4085 }
4086
4087 /* if no cable then assume it's good */
e315cd28 4088 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4
LT		 4089 status = 0;
4090
7c3df132
SK		 4091 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4092 "Configure loop done, status = 0x%x.\n", status);
1da177e4
LT		 4093 }
4094 return (status);
4095}
4096
73208dfd
AC		 4097static int
4098qla25xx_init_queues(struct qla_hw_data *ha)
4099{
4100 struct rsp_que *rsp = NULL;
4101 struct req_que *req = NULL;
4102 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4103 int ret = -1;
4104 int i;
4105
2afa19a9 4106 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd
AC		 4107 rsp = ha->rsp_q_map[i];
4108 if (rsp) {
4109 rsp->options &= ~BIT_0;
618a7523 4110 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 4111 if (ret != QLA_SUCCESS)
7c3df132
SK		 4112 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4113 "%s Rsp que: %d init failed.\n",
4114 __func__, rsp->id);
73208dfd 4115 else
7c3df132
SK		 4116 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4117 "%s Rsp que: %d inited.\n",
4118 __func__, rsp->id);
73208dfd 4119 }
2afa19a9
AC		 4120 }
4121 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd
AC		 4122 req = ha->req_q_map[i];
4123 if (req) {
29bdccbe 4124 /* Clear outstanding commands array. */
73208dfd 4125 req->options &= ~BIT_0;
618a7523 4126 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 4127 if (ret != QLA_SUCCESS)
7c3df132
SK		 4128 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4129 "%s Req que: %d init failed.\n",
4130 __func__, req->id);
73208dfd 4131 else
7c3df132
SK		 4132 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4133 "%s Req que: %d inited.\n",
4134 __func__, req->id);
73208dfd
AC		 4135 }
4136 }
4137 return ret;
4138}
4139
1da177e4
LT		 4140/*
4141* qla2x00_reset_adapter
4142* Reset adapter.
4143*
4144* Input:
4145* ha = adapter block pointer.
4146*/
abbd8870 4147void
e315cd28 4148qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 4149{
4150 unsigned long flags = 0;
e315cd28 4151 struct qla_hw_data *ha = vha->hw;
3d71644c 4152 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 4153
e315cd28 4154 vha->flags.online = 0;
fd34f556 4155 ha->isp_ops->disable_intrs(ha);
1da177e4 4156
1da177e4
LT		 4157 spin_lock_irqsave(&ha->hardware_lock, flags);
4158 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4159 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4160 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4161 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4162 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4163}
0107109e
AV		 4164
4165void
e315cd28 4166qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 4167{
4168 unsigned long flags = 0;
e315cd28 4169 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 4170 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4171
a9083016
GM		 4172 if (IS_QLA82XX(ha))
4173 return;
4174
e315cd28 4175 vha->flags.online = 0;
fd34f556 4176 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 4177
4178 spin_lock_irqsave(&ha->hardware_lock, flags);
4179 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4180 RD_REG_DWORD(&reg->hccr);
4181 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4182 RD_REG_DWORD(&reg->hccr);
4183 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 4184
4185 if (IS_NOPOLLING_TYPE(ha))
4186 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 4187}
4188
4e08df3f
DM		 4189/* On sparc systems, obtain port and node WWN from firmware
4190 * properties.
4191 */
e315cd28
AC		 4192static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4193 struct nvram_24xx *nv)
4e08df3f
DM		 4194{
4195#ifdef CONFIG_SPARC
e315cd28 4196 struct qla_hw_data *ha = vha->hw;
4e08df3f 4197 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 4198 struct device_node *dp = pci_device_to_OF_node(pdev);
4199 const u8 *val;
4e08df3f
DM		 4200 int len;
4201
4202 val = of_get_property(dp, "port-wwn", &len);
4203 if (val && len >= WWN_SIZE)
4204 memcpy(nv->port_name, val, WWN_SIZE);
4205
4206 val = of_get_property(dp, "node-wwn", &len);
4207 if (val && len >= WWN_SIZE)
4208 memcpy(nv->node_name, val, WWN_SIZE);
4209#endif
4210}
4211
0107109e 4212int
e315cd28 4213qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 4214{
4e08df3f 4215 int rval;
0107109e
AV		 4216 struct init_cb_24xx *icb;
4217 struct nvram_24xx *nv;
4218 uint32_t *dptr;
4219 uint8_t *dptr1, *dptr2;
4220 uint32_t chksum;
4221 uint16_t cnt;
e315cd28 4222 struct qla_hw_data *ha = vha->hw;
0107109e 4223
4e08df3f 4224 rval = QLA_SUCCESS;
0107109e 4225 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 4226 nv = ha->nvram;
0107109e
AV		 4227
4228 /* Determine NVRAM starting address. */
e5b68a61
AC		 4229 if (ha->flags.port0) {
4230 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4231 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4232 } else {
0107109e 4233 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790 4234 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4235 }
e5b68a61
AC		 4236 ha->nvram_size = sizeof(struct nvram_24xx);
4237 ha->vpd_size = FA_NVRAM_VPD_SIZE;
a9083016
GM		 4238 if (IS_QLA82XX(ha))
4239 ha->vpd_size = FA_VPD_SIZE_82XX;
0107109e 4240
281afe19
SJ		 4241 /* Get VPD data into cache */
4242 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 4243 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 4244 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4245
4246 /* Get NVRAM data into cache and calculate checksum. */
0107109e 4247 dptr = (uint32_t *)nv;
e315cd28 4248 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e
AV		 4249 ha->nvram_size);
4250 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4251 chksum += le32_to_cpu(*dptr++);
4252
7c3df132
SK		 4253 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4254 "Contents of NVRAM\n");
4255 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4256 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 4257
4258 /* Bad NVRAM data, set defaults parameters. */
4259 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4260 || nv->id[3] != ' ' ||
4261 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4262 /* Reset NVRAM data. */
7c3df132
SK		 4263 ql_log(ql_log_warn, vha, 0x006b,
4264 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
4265 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4266 ql_log(ql_log_warn, vha, 0x006c,
4267 "Falling back to functioning (yet invalid -- WWPN) "
4268 "defaults.\n");
4e08df3f
DM		 4269
4270 /*
4271 * Set default initialization control block.
4272 */
4273 memset(nv, 0, ha->nvram_size);
4274 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4275 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4276 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4277 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4278 nv->exchange_count = __constant_cpu_to_le16(0);
4279 nv->hard_address = __constant_cpu_to_le16(124);
4280 nv->port_name[0] = 0x21;
e5b68a61 4281 nv->port_name[1] = 0x00 + ha->port_no;
4e08df3f
DM		 4282 nv->port_name[2] = 0x00;
4283 nv->port_name[3] = 0xe0;
4284 nv->port_name[4] = 0x8b;
4285 nv->port_name[5] = 0x1c;
4286 nv->port_name[6] = 0x55;
4287 nv->port_name[7] = 0x86;
4288 nv->node_name[0] = 0x20;
4289 nv->node_name[1] = 0x00;
4290 nv->node_name[2] = 0x00;
4291 nv->node_name[3] = 0xe0;
4292 nv->node_name[4] = 0x8b;
4293 nv->node_name[5] = 0x1c;
4294 nv->node_name[6] = 0x55;
4295 nv->node_name[7] = 0x86;
e315cd28 4296 qla24xx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 4297 nv->login_retry_count = __constant_cpu_to_le16(8);
4298 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4299 nv->login_timeout = __constant_cpu_to_le16(0);
4300 nv->firmware_options_1 =
4301 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4302 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4303 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4304 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4305 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4306 nv->efi_parameters = __constant_cpu_to_le32(0);
4307 nv->reset_delay = 5;
4308 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4309 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4310 nv->link_down_timeout = __constant_cpu_to_le16(30);
4311
4312 rval = 1;
0107109e
AV		 4313 }
4314
4315 /* Reset Initialization control block */
e315cd28 4316 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 4317
4318 /* Copy 1st segment. */
4319 dptr1 = (uint8_t *)icb;
4320 dptr2 = (uint8_t *)&nv->version;
4321 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4322 while (cnt--)
4323 *dptr1++ = *dptr2++;
4324
4325 icb->login_retry_count = nv->login_retry_count;
3ea66e28 4326 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 4327
4328 /* Copy 2nd segment. */
4329 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4330 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4331 cnt = (uint8_t *)&icb->reserved_3 -
4332 (uint8_t *)&icb->interrupt_delay_timer;
4333 while (cnt--)
4334 *dptr1++ = *dptr2++;
4335
4336 /*
4337 * Setup driver NVRAM options.
4338 */
e315cd28 4339 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 4340 "QLA2462");
0107109e 4341
5341e868
AV		 4342 /* Use alternate WWN? */
4343 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4344 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4345 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4346 }
4347
0107109e 4348 /* Prepare nodename */
fd0e7e4d 4349 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 4350 /*
4351 * Firmware will apply the following mask if the nodename was
4352 * not provided.
4353 */
4354 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4355 icb->node_name[0] &= 0xF0;
4356 }
4357
4358 /* Set host adapter parameters. */
4359 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 4360 ha->flags.enable_lip_reset = 0;
4361 ha->flags.enable_lip_full_login =
4362 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4363 ha->flags.enable_target_reset =
4364 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 4365 ha->flags.enable_led_scheme = 0;
d4c760c2 4366 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 4367
fd0e7e4d
AV		 4368 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4369 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 4370
4371 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4372 sizeof(ha->fw_seriallink_options24));
4373
4374 /* save HBA serial number */
4375 ha->serial0 = icb->port_name[5];
4376 ha->serial1 = icb->port_name[6];
4377 ha->serial2 = icb->port_name[7];
e315cd28
AC		 4378 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4379 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 4380
bc8fb3cb 4381 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4382
0107109e
AV		 4383 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4384
4385 /* Set minimum login_timeout to 4 seconds. */
4386 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4387 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4388 if (le16_to_cpu(nv->login_timeout) < 4)
4389 nv->login_timeout = __constant_cpu_to_le16(4);
4390 ha->login_timeout = le16_to_cpu(nv->login_timeout);
c6852c4c 4391 icb->login_timeout = nv->login_timeout;
0107109e 4392
00a537b8
AV		 4393 /* Set minimum RATOV to 100 tenths of a second. */
4394 ha->r_a_tov = 100;
0107109e
AV		 4395
4396 ha->loop_reset_delay = nv->reset_delay;
4397
4398 /* Link Down Timeout = 0:
4399 *
4400 * When Port Down timer expires we will start returning
4401 * I/O's to OS with "DID_NO_CONNECT".
4402 *
4403 * Link Down Timeout != 0:
4404 *
4405 * The driver waits for the link to come up after link down
4406 * before returning I/Os to OS with "DID_NO_CONNECT".
4407 */
4408 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4409 ha->loop_down_abort_time =
4410 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4411 } else {
4412 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4413 ha->loop_down_abort_time =
4414 (LOOP_DOWN_TIME - ha->link_down_timeout);
4415 }
4416
4417 /* Need enough time to try and get the port back. */
4418 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4419 if (qlport_down_retry)
4420 ha->port_down_retry_count = qlport_down_retry;
4421
4422 /* Set login_retry_count */
4423 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
4424 if (ha->port_down_retry_count ==
4425 le16_to_cpu(nv->port_down_retry_count) &&
4426 ha->port_down_retry_count > 3)
4427 ha->login_retry_count = ha->port_down_retry_count;
4428 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4429 ha->login_retry_count = ha->port_down_retry_count;
4430 if (ql2xloginretrycount)
4431 ha->login_retry_count = ql2xloginretrycount;
4432
4fdfefe5 4433 /* Enable ZIO. */
e315cd28 4434 if (!vha->flags.init_done) {
4fdfefe5
AV		 4435 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
4436 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4437 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
4438 le16_to_cpu(icb->interrupt_delay_timer): 2;
4439 }
4440 icb->firmware_options_2 &= __constant_cpu_to_le32(
4441 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
e315cd28 4442 vha->flags.process_response_queue = 0;
4fdfefe5 4443 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 4444 ha->zio_mode = QLA_ZIO_MODE_6;
4445
7c3df132 4446 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 4447 "ZIO mode %d enabled; timer delay (%d us).\n",
4448 ha->zio_mode, ha->zio_timer * 100);
4449
4450 icb->firmware_options_2 |= cpu_to_le32(
4451 (uint32_t)ha->zio_mode);
4452 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
e315cd28 4453 vha->flags.process_response_queue = 1;
4fdfefe5
AV		 4454 }
4455
4e08df3f 4456 if (rval) {
7c3df132
SK		 4457 ql_log(ql_log_warn, vha, 0x0070,
4458 "NVRAM configuration failed.\n");
4e08df3f
DM		 4459 }
4460 return (rval);
0107109e
AV		 4461}
4462
413975a0 4463static int
cbc8eb67
AV		 4464qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
4465 uint32_t faddr)
d1c61909 4466{
73208dfd 4467 int rval = QLA_SUCCESS;
d1c61909 4468 int segments, fragment;
d1c61909
AV		 4469 uint32_t *dcode, dlen;
4470 uint32_t risc_addr;
4471 uint32_t risc_size;
4472 uint32_t i;
e315cd28 4473 struct qla_hw_data *ha = vha->hw;
73208dfd 4474 struct req_que *req = ha->req_q_map[0];
eaac30be 4475
7c3df132 4476 ql_dbg(ql_dbg_init, vha, 0x008b,
cfb0919c 4477 "FW: Loading firmware from flash (%x).\n", faddr);
eaac30be 4478
d1c61909
AV		 4479 rval = QLA_SUCCESS;
4480
4481 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4482 dcode = (uint32_t *)req->ring;
d1c61909
AV		 4483 *srisc_addr = 0;
4484
4485 /* Validate firmware image by checking version. */
e315cd28 4486 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 4487 for (i = 0; i < 4; i++)
4488 dcode[i] = be32_to_cpu(dcode[i]);
4489 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4490 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4491 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4492 dcode[3] == 0)) {
7c3df132
SK		 4493 ql_log(ql_log_fatal, vha, 0x008c,
4494 "Unable to verify the integrity of flash firmware "
4495 "image.\n");
4496 ql_log(ql_log_fatal, vha, 0x008d,
4497 "Firmware data: %08x %08x %08x %08x.\n",
4498 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 4499
4500 return QLA_FUNCTION_FAILED;
4501 }
4502
4503 while (segments && rval == QLA_SUCCESS) {
4504 /* Read segment's load information. */
e315cd28 4505 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 4506
4507 risc_addr = be32_to_cpu(dcode[2]);
4508 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4509 risc_size = be32_to_cpu(dcode[3]);
4510
4511 fragment = 0;
4512 while (risc_size > 0 && rval == QLA_SUCCESS) {
4513 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4514 if (dlen > risc_size)
4515 dlen = risc_size;
4516
7c3df132
SK		 4517 ql_dbg(ql_dbg_init, vha, 0x008e,
4518 "Loading risc segment@ risc addr %x "
4519 "number of dwords 0x%x offset 0x%x.\n",
4520 risc_addr, dlen, faddr);
d1c61909 4521
e315cd28 4522 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 4523 for (i = 0; i < dlen; i++)
4524 dcode[i] = swab32(dcode[i]);
4525
73208dfd 4526 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 4527 dlen);
4528 if (rval) {
7c3df132
SK		 4529 ql_log(ql_log_fatal, vha, 0x008f,
4530 "Failed to load segment %d of firmware.\n",
4531 fragment);
d1c61909
AV		 4532 break;
4533 }
4534
4535 faddr += dlen;
4536 risc_addr += dlen;
4537 risc_size -= dlen;
4538 fragment++;
4539 }
4540
4541 /* Next segment. */
4542 segments--;
4543 }
4544
4545 return rval;
4546}
4547
d1c61909
AV		 4548#define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
4549
0107109e 4550int
e315cd28 4551qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 4552{
4553 int rval;
4554 int i, fragment;
4555 uint16_t *wcode, *fwcode;
4556 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
4557 struct fw_blob *blob;
e315cd28 4558 struct qla_hw_data *ha = vha->hw;
73208dfd 4559 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 4560
4561 /* Load firmware blob. */
e315cd28 4562 blob = qla2x00_request_firmware(vha);
5433383e 4563 if (!blob) {
7c3df132
SK		 4564 ql_log(ql_log_info, vha, 0x0083,
4565 "Fimware image unavailable.\n");
4566 ql_log(ql_log_info, vha, 0x0084,
4567 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 4568 return QLA_FUNCTION_FAILED;
4569 }
4570
4571 rval = QLA_SUCCESS;
4572
73208dfd 4573 wcode = (uint16_t *)req->ring;
5433383e
AV		 4574 *srisc_addr = 0;
4575 fwcode = (uint16_t *)blob->fw->data;
4576 fwclen = 0;
4577
4578 /* Validate firmware image by checking version. */
4579 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132
SK		 4580 ql_log(ql_log_fatal, vha, 0x0085,
4581 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e
AV		 4582 blob->fw->size);
4583 goto fail_fw_integrity;
4584 }
4585 for (i = 0; i < 4; i++)
4586 wcode[i] = be16_to_cpu(fwcode[i + 4]);
4587 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
4588 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
4589 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 4590 ql_log(ql_log_fatal, vha, 0x0086,
4591 "Unable to verify integrity of firmware image.\n");
4592 ql_log(ql_log_fatal, vha, 0x0087,
4593 "Firmware data: %04x %04x %04x %04x.\n",
4594 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 4595 goto fail_fw_integrity;
4596 }
4597
4598 seg = blob->segs;
4599 while (*seg && rval == QLA_SUCCESS) {
4600 risc_addr = *seg;
4601 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
4602 risc_size = be16_to_cpu(fwcode[3]);
4603
4604 /* Validate firmware image size. */
4605 fwclen += risc_size * sizeof(uint16_t);
4606 if (blob->fw->size < fwclen) {
7c3df132 4607 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 4608 "Unable to verify integrity of firmware image "
7c3df132 4609 "(%Zd).\n", blob->fw->size);
5433383e
AV		 4610 goto fail_fw_integrity;
4611 }
4612
4613 fragment = 0;
4614 while (risc_size > 0 && rval == QLA_SUCCESS) {
4615 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
4616 if (wlen > risc_size)
4617 wlen = risc_size;
7c3df132
SK		 4618 ql_dbg(ql_dbg_init, vha, 0x0089,
4619 "Loading risc segment@ risc addr %x number of "
4620 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 4621
4622 for (i = 0; i < wlen; i++)
4623 wcode[i] = swab16(fwcode[i]);
4624
73208dfd 4625 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 4626 wlen);
4627 if (rval) {
7c3df132
SK		 4628 ql_log(ql_log_fatal, vha, 0x008a,
4629 "Failed to load segment %d of firmware.\n",
4630 fragment);
5433383e
AV		 4631 break;
4632 }
4633
4634 fwcode += wlen;
4635 risc_addr += wlen;
4636 risc_size -= wlen;
4637 fragment++;
4638 }
4639
4640 /* Next segment. */
4641 seg++;
4642 }
4643 return rval;
4644
4645fail_fw_integrity:
4646 return QLA_FUNCTION_FAILED;
4647}
4648
eaac30be
AV		 4649static int
4650qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 4651{
4652 int rval;
4653 int segments, fragment;
4654 uint32_t *dcode, dlen;
4655 uint32_t risc_addr;
4656 uint32_t risc_size;
4657 uint32_t i;
5433383e 4658 struct fw_blob *blob;
0107109e 4659 uint32_t *fwcode, fwclen;
e315cd28 4660 struct qla_hw_data *ha = vha->hw;
73208dfd 4661 struct req_que *req = ha->req_q_map[0];
0107109e 4662
5433383e 4663 /* Load firmware blob. */
e315cd28 4664 blob = qla2x00_request_firmware(vha);
5433383e 4665 if (!blob) {
7c3df132
SK		 4666 ql_log(ql_log_warn, vha, 0x0090,
4667 "Fimware image unavailable.\n");
4668 ql_log(ql_log_warn, vha, 0x0091,
4669 "Firmware images can be retrieved from: "
4670 QLA_FW_URL ".\n");
d1c61909 4671
eaac30be 4672 return QLA_FUNCTION_FAILED;
0107109e
AV		 4673 }
4674
cfb0919c
CD		 4675 ql_dbg(ql_dbg_init, vha, 0x0092,
4676 "FW: Loading via request-firmware.\n");
eaac30be 4677
0107109e
AV		 4678 rval = QLA_SUCCESS;
4679
4680 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4681 dcode = (uint32_t *)req->ring;
0107109e 4682 *srisc_addr = 0;
5433383e 4683 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 4684 fwclen = 0;
4685
4686 /* Validate firmware image by checking version. */
5433383e 4687 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132
SK		 4688 ql_log(ql_log_fatal, vha, 0x0093,
4689 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e 4690 blob->fw->size);
0107109e
AV		 4691 goto fail_fw_integrity;
4692 }
4693 for (i = 0; i < 4; i++)
4694 dcode[i] = be32_to_cpu(fwcode[i + 4]);
4695 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4696 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4697 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4698 dcode[3] == 0)) {
7c3df132
SK		 4699 ql_log(ql_log_fatal, vha, 0x0094,
4700 "Unable to verify integrity of firmware image (%Zd).\n",
4701 blob->fw->size);
4702 ql_log(ql_log_fatal, vha, 0x0095,
4703 "Firmware data: %08x %08x %08x %08x.\n",
4704 dcode[0], dcode[1], dcode[2], dcode[3]);
0107109e
AV		 4705 goto fail_fw_integrity;
4706 }
4707
4708 while (segments && rval == QLA_SUCCESS) {
4709 risc_addr = be32_to_cpu(fwcode[2]);
4710 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4711 risc_size = be32_to_cpu(fwcode[3]);
4712
4713 /* Validate firmware image size. */
4714 fwclen += risc_size * sizeof(uint32_t);
5433383e 4715 if (blob->fw->size < fwclen) {
7c3df132 4716 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 4717 "Unable to verify integrity of firmware image "
7c3df132 4718 "(%Zd).\n", blob->fw->size);
5433383e 4719
0107109e
AV		 4720 goto fail_fw_integrity;
4721 }
4722
4723 fragment = 0;
4724 while (risc_size > 0 && rval == QLA_SUCCESS) {
4725 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4726 if (dlen > risc_size)
4727 dlen = risc_size;
4728
7c3df132
SK		 4729 ql_dbg(ql_dbg_init, vha, 0x0097,
4730 "Loading risc segment@ risc addr %x "
4731 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 4732
4733 for (i = 0; i < dlen; i++)
4734 dcode[i] = swab32(fwcode[i]);
4735
73208dfd 4736 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 4737 dlen);
0107109e 4738 if (rval) {
7c3df132
SK		 4739 ql_log(ql_log_fatal, vha, 0x0098,
4740 "Failed to load segment %d of firmware.\n",
4741 fragment);
0107109e
AV		 4742 break;
4743 }
4744
4745 fwcode += dlen;
4746 risc_addr += dlen;
4747 risc_size -= dlen;
4748 fragment++;
4749 }
4750
4751 /* Next segment. */
4752 segments--;
4753 }
0107109e
AV		 4754 return rval;
4755
4756fail_fw_integrity:
0107109e 4757 return QLA_FUNCTION_FAILED;
0107109e 4758}
18c6c127 4759
eaac30be
AV		 4760int
4761qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4762{
4763 int rval;
4764
e337d907
AV		 4765 if (ql2xfwloadbin == 1)
4766 return qla81xx_load_risc(vha, srisc_addr);
4767
eaac30be
AV		 4768 /*
4769 * FW Load priority:
4770 * 1) Firmware via request-firmware interface (.bin file).
4771 * 2) Firmware residing in flash.
4772 */
4773 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4774 if (rval == QLA_SUCCESS)
4775 return rval;
4776
cbc8eb67
AV		 4777 return qla24xx_load_risc_flash(vha, srisc_addr,
4778 vha->hw->flt_region_fw);
eaac30be
AV		 4779}
4780
4781int
4782qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4783{
4784 int rval;
cbc8eb67 4785 struct qla_hw_data *ha = vha->hw;
eaac30be 4786
e337d907 4787 if (ql2xfwloadbin == 2)
cbc8eb67 4788 goto try_blob_fw;
e337d907 4789
eaac30be
AV		 4790 /*
4791 * FW Load priority:
4792 * 1) Firmware residing in flash.
4793 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 4794 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 4795 */
cbc8eb67 4796 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 4797 if (rval == QLA_SUCCESS)
4798 return rval;
4799
cbc8eb67
AV		 4800try_blob_fw:
4801 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4802 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
4803 return rval;
4804
7c3df132
SK		 4805 ql_log(ql_log_info, vha, 0x0099,
4806 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 4807 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
4808 if (rval != QLA_SUCCESS)
4809 return rval;
4810
7c3df132 4811 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67 4812 ha->flags.running_gold_fw = 1;
cbc8eb67 4813 return rval;
eaac30be
AV		 4814}
4815
18c6c127 4816void
e315cd28 4817qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 4818{
4819 int ret, retries;
e315cd28 4820 struct qla_hw_data *ha = vha->hw;
18c6c127 4821
85880801
AV		 4822 if (ha->flags.pci_channel_io_perm_failure)
4823 return;
e428924c 4824 if (!IS_FWI2_CAPABLE(ha))
18c6c127 4825 return;
75edf81d
AV		 4826 if (!ha->fw_major_version)
4827 return;
18c6c127 4828
e315cd28 4829 ret = qla2x00_stop_firmware(vha);
7c7f1f29 4830 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 4831 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 4832 ha->isp_ops->reset_chip(vha);
4833 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 4834 continue;
e315cd28 4835 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 4836 continue;
7c3df132
SK		 4837 ql_log(ql_log_info, vha, 0x8015,
4838 "Attempting retry of stop-firmware command.\n");
e315cd28 4839 ret = qla2x00_stop_firmware(vha);
18c6c127
AV		 4840 }
4841}
2c3dfe3f
SJ		 4842
4843int
e315cd28 4844qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 4845{
4846 int rval = QLA_SUCCESS;
4847 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 4848 struct qla_hw_data *ha = vha->hw;
4849 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 4850 struct req_que *req;
4851 struct rsp_que *rsp;
2c3dfe3f 4852
e315cd28 4853 if (!vha->vp_idx)
2c3dfe3f
SJ		 4854 return -EINVAL;
4855
e315cd28 4856 rval = qla2x00_fw_ready(base_vha);
7163ea81 4857 if (ha->flags.cpu_affinity_enabled)
67c2e93a
AC		 4858 req = ha->req_q_map[0];
4859 else
4860 req = vha->req;
4861 rsp = req->rsp;
4862
2c3dfe3f 4863 if (rval == QLA_SUCCESS) {
e315cd28 4864 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 4865 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 4866 }
4867
e315cd28 4868 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 4869
4870 /* Login to SNS first */
e315cd28 4871 ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
2c3dfe3f 4872 if (mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 4873 ql_dbg(ql_dbg_init, vha, 0x0103,
4874 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
4875 "mb[6]=%x mb[7]=%x.\n",
4876 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 4877 return (QLA_FUNCTION_FAILED);
4878 }
4879
e315cd28
AC		 4880 atomic_set(&vha->loop_down_timer, 0);
4881 atomic_set(&vha->loop_state, LOOP_UP);
4882 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4883 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4884 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 4885
4886 return rval;
4887}
4d4df193
HK		 4888
4889/* 84XX Support **************************************************************/
4890
4891static LIST_HEAD(qla_cs84xx_list);
4892static DEFINE_MUTEX(qla_cs84xx_mutex);
4893
4894static struct qla_chip_state_84xx *
e315cd28 4895qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 4896{
4897 struct qla_chip_state_84xx *cs84xx;
e315cd28 4898 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 4899
4900 mutex_lock(&qla_cs84xx_mutex);
4901
4902 /* Find any shared 84xx chip. */
4903 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
4904 if (cs84xx->bus == ha->pdev->bus) {
4905 kref_get(&cs84xx->kref);
4906 goto done;
4907 }
4908 }
4909
4910 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
4911 if (!cs84xx)
4912 goto done;
4913
4914 kref_init(&cs84xx->kref);
4915 spin_lock_init(&cs84xx->access_lock);
4916 mutex_init(&cs84xx->fw_update_mutex);
4917 cs84xx->bus = ha->pdev->bus;
4918
4919 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
4920done:
4921 mutex_unlock(&qla_cs84xx_mutex);
4922 return cs84xx;
4923}
4924
4925static void
4926__qla84xx_chip_release(struct kref *kref)
4927{
4928 struct qla_chip_state_84xx *cs84xx =
4929 container_of(kref, struct qla_chip_state_84xx, kref);
4930
4931 mutex_lock(&qla_cs84xx_mutex);
4932 list_del(&cs84xx->list);
4933 mutex_unlock(&qla_cs84xx_mutex);
4934 kfree(cs84xx);
4935}
4936
4937void
e315cd28 4938qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 4939{
e315cd28 4940 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 4941 if (ha->cs84xx)
4942 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
4943}
4944
4945static int
e315cd28 4946qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 4947{
4948 int rval;
4949 uint16_t status[2];
e315cd28 4950 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 4951
4952 mutex_lock(&ha->cs84xx->fw_update_mutex);
4953
e315cd28 4954 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 4955
4956 mutex_unlock(&ha->cs84xx->fw_update_mutex);
4957
4958 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
4959 QLA_SUCCESS;
4960}
3a03eb79
AV		 4961
4962/* 81XX Support **************************************************************/
4963
4964int
4965qla81xx_nvram_config(scsi_qla_host_t *vha)
4966{
4967 int rval;
4968 struct init_cb_81xx *icb;
4969 struct nvram_81xx *nv;
4970 uint32_t *dptr;
4971 uint8_t *dptr1, *dptr2;
4972 uint32_t chksum;
4973 uint16_t cnt;
4974 struct qla_hw_data *ha = vha->hw;
4975
4976 rval = QLA_SUCCESS;
4977 icb = (struct init_cb_81xx *)ha->init_cb;
4978 nv = ha->nvram;
4979
4980 /* Determine NVRAM starting address. */
4981 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 4982 ha->vpd_size = FA_NVRAM_VPD_SIZE;
3a03eb79
AV		 4983
4984 /* Get VPD data into cache */
4985 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 4986 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
4987 ha->vpd_size);
3a03eb79
AV		 4988
4989 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 4990 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 4991 ha->nvram_size);
3d79038f 4992 dptr = (uint32_t *)nv;
3a03eb79
AV		 4993 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4994 chksum += le32_to_cpu(*dptr++);
4995
7c3df132
SK		 4996 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
4997 "Contents of NVRAM:\n");
4998 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
4999 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 5000
5001 /* Bad NVRAM data, set defaults parameters. */
5002 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5003 || nv->id[3] != ' ' ||
5004 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5005 /* Reset NVRAM data. */
7c3df132
SK		 5006 ql_log(ql_log_info, vha, 0x0073,
5007 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
5008 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 5009 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 5010 ql_log(ql_log_info, vha, 0x0074,
5011 "Falling back to functioning (yet invalid -- WWPN) "
5012 "defaults.\n");
3a03eb79
AV		 5013
5014 /*
5015 * Set default initialization control block.
5016 */
5017 memset(nv, 0, ha->nvram_size);
5018 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5019 nv->version = __constant_cpu_to_le16(ICB_VERSION);
5020 nv->frame_payload_size = __constant_cpu_to_le16(2048);
5021 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5022 nv->exchange_count = __constant_cpu_to_le16(0);
5023 nv->port_name[0] = 0x21;
e5b68a61 5024 nv->port_name[1] = 0x00 + ha->port_no;
3a03eb79
AV		 5025 nv->port_name[2] = 0x00;
5026 nv->port_name[3] = 0xe0;
5027 nv->port_name[4] = 0x8b;
5028 nv->port_name[5] = 0x1c;
5029 nv->port_name[6] = 0x55;
5030 nv->port_name[7] = 0x86;
5031 nv->node_name[0] = 0x20;
5032 nv->node_name[1] = 0x00;
5033 nv->node_name[2] = 0x00;
5034 nv->node_name[3] = 0xe0;
5035 nv->node_name[4] = 0x8b;
5036 nv->node_name[5] = 0x1c;
5037 nv->node_name[6] = 0x55;
5038 nv->node_name[7] = 0x86;
5039 nv->login_retry_count = __constant_cpu_to_le16(8);
5040 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5041 nv->login_timeout = __constant_cpu_to_le16(0);
5042 nv->firmware_options_1 =
5043 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5044 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5045 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5046 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5047 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5048 nv->efi_parameters = __constant_cpu_to_le32(0);
5049 nv->reset_delay = 5;
5050 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5051 nv->port_down_retry_count = __constant_cpu_to_le16(30);
6246b8a1 5052 nv->link_down_timeout = __constant_cpu_to_le16(180);
eeebcc92 5053 nv->enode_mac[0] = 0x00;
6246b8a1
GM		 5054 nv->enode_mac[1] = 0xC0;
5055 nv->enode_mac[2] = 0xDD;
3a03eb79
AV		 5056 nv->enode_mac[3] = 0x04;
5057 nv->enode_mac[4] = 0x05;
e5b68a61 5058 nv->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5059
5060 rval = 1;
5061 }
5062
5063 /* Reset Initialization control block */
773120e4 5064 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 5065
5066 /* Copy 1st segment. */
5067 dptr1 = (uint8_t *)icb;
5068 dptr2 = (uint8_t *)&nv->version;
5069 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5070 while (cnt--)
5071 *dptr1++ = *dptr2++;
5072
5073 icb->login_retry_count = nv->login_retry_count;
5074
5075 /* Copy 2nd segment. */
5076 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5077 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5078 cnt = (uint8_t *)&icb->reserved_5 -
5079 (uint8_t *)&icb->interrupt_delay_timer;
5080 while (cnt--)
5081 *dptr1++ = *dptr2++;
5082
5083 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5084 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5085 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
69e5f1ea
AV		 5086 icb->enode_mac[0] = 0x00;
5087 icb->enode_mac[1] = 0xC0;
5088 icb->enode_mac[2] = 0xDD;
3a03eb79
AV		 5089 icb->enode_mac[3] = 0x04;
5090 icb->enode_mac[4] = 0x05;
e5b68a61 5091 icb->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5092 }
5093
b64b0e8f
AV		 5094 /* Use extended-initialization control block. */
5095 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5096
3a03eb79
AV		 5097 /*
5098 * Setup driver NVRAM options.
5099 */
5100 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 5101 "QLE8XXX");
3a03eb79
AV		 5102
5103 /* Use alternate WWN? */
5104 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5105 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5106 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5107 }
5108
5109 /* Prepare nodename */
5110 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5111 /*
5112 * Firmware will apply the following mask if the nodename was
5113 * not provided.
5114 */
5115 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5116 icb->node_name[0] &= 0xF0;
5117 }
5118
5119 /* Set host adapter parameters. */
5120 ha->flags.disable_risc_code_load = 0;
5121 ha->flags.enable_lip_reset = 0;
5122 ha->flags.enable_lip_full_login =
5123 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5124 ha->flags.enable_target_reset =
5125 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5126 ha->flags.enable_led_scheme = 0;
5127 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5128
5129 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5130 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5131
5132 /* save HBA serial number */
5133 ha->serial0 = icb->port_name[5];
5134 ha->serial1 = icb->port_name[6];
5135 ha->serial2 = icb->port_name[7];
5136 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5137 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5138
5139 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5140
5141 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5142
5143 /* Set minimum login_timeout to 4 seconds. */
5144 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5145 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5146 if (le16_to_cpu(nv->login_timeout) < 4)
5147 nv->login_timeout = __constant_cpu_to_le16(4);
5148 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5149 icb->login_timeout = nv->login_timeout;
5150
5151 /* Set minimum RATOV to 100 tenths of a second. */
5152 ha->r_a_tov = 100;
5153
5154 ha->loop_reset_delay = nv->reset_delay;
5155
5156 /* Link Down Timeout = 0:
5157 *
5158 * When Port Down timer expires we will start returning
5159 * I/O's to OS with "DID_NO_CONNECT".
5160 *
5161 * Link Down Timeout != 0:
5162 *
5163 * The driver waits for the link to come up after link down
5164 * before returning I/Os to OS with "DID_NO_CONNECT".
5165 */
5166 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5167 ha->loop_down_abort_time =
5168 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5169 } else {
5170 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5171 ha->loop_down_abort_time =
5172 (LOOP_DOWN_TIME - ha->link_down_timeout);
5173 }
5174
5175 /* Need enough time to try and get the port back. */
5176 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5177 if (qlport_down_retry)
5178 ha->port_down_retry_count = qlport_down_retry;
5179
5180 /* Set login_retry_count */
5181 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5182 if (ha->port_down_retry_count ==
5183 le16_to_cpu(nv->port_down_retry_count) &&
5184 ha->port_down_retry_count > 3)
5185 ha->login_retry_count = ha->port_down_retry_count;
5186 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5187 ha->login_retry_count = ha->port_down_retry_count;
5188 if (ql2xloginretrycount)
5189 ha->login_retry_count = ql2xloginretrycount;
5190
6246b8a1
GM		 5191 /* if not running MSI-X we need handshaking on interrupts */
5192 if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha))
5193 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
5194
3a03eb79
AV		 5195 /* Enable ZIO. */
5196 if (!vha->flags.init_done) {
5197 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5198 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5199 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5200 le16_to_cpu(icb->interrupt_delay_timer): 2;
5201 }
5202 icb->firmware_options_2 &= __constant_cpu_to_le32(
5203 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5204 vha->flags.process_response_queue = 0;
5205 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5206 ha->zio_mode = QLA_ZIO_MODE_6;
5207
7c3df132 5208 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 5209 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 5210 ha->zio_mode,
5211 ha->zio_timer * 100);
3a03eb79
AV		 5212
5213 icb->firmware_options_2 |= cpu_to_le32(
5214 (uint32_t)ha->zio_mode);
5215 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5216 vha->flags.process_response_queue = 1;
5217 }
5218
5219 if (rval) {
7c3df132
SK		 5220 ql_log(ql_log_warn, vha, 0x0076,
5221 "NVRAM configuration failed.\n");
3a03eb79
AV		 5222 }
5223 return (rval);
5224}
5225
a9083016
GM		 5226int
5227qla82xx_restart_isp(scsi_qla_host_t *vha)
5228{
5229 int status, rval;
5230 uint32_t wait_time;
5231 struct qla_hw_data *ha = vha->hw;
5232 struct req_que *req = ha->req_q_map[0];
5233 struct rsp_que *rsp = ha->rsp_q_map[0];
5234 struct scsi_qla_host *vp;
feafb7b1 5235 unsigned long flags;
a9083016
GM		 5236
5237 status = qla2x00_init_rings(vha);
5238 if (!status) {
5239 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5240 ha->flags.chip_reset_done = 1;
5241
5242 status = qla2x00_fw_ready(vha);
5243 if (!status) {
7c3df132
SK		 5244 ql_log(ql_log_info, vha, 0x803c,
5245 "Start configure loop, status =%d.\n", status);
a9083016
GM		 5246
5247 /* Issue a marker after FW becomes ready. */
5248 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5249
5250 vha->flags.online = 1;
5251 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5252 wait_time = 256;
5253 do {
5254 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5255 qla2x00_configure_loop(vha);
5256 wait_time--;
5257 } while (!atomic_read(&vha->loop_down_timer) &&
5258 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5259 wait_time &&
5260 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5261 }
5262
5263 /* if no cable then assume it's good */
5264 if ((vha->device_flags & DFLG_NO_CABLE))
5265 status = 0;
5266
cfb0919c 5267 ql_log(ql_log_info, vha, 0x8000,
7c3df132 5268 "Configure loop done, status = 0x%x.\n", status);
a9083016
GM		 5269 }
5270
5271 if (!status) {
5272 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5273
5274 if (!atomic_read(&vha->loop_down_timer)) {
5275 /*
5276 * Issue marker command only when we are going
5277 * to start the I/O .
5278 */
5279 vha->marker_needed = 1;
5280 }
5281
5282 vha->flags.online = 1;
5283
5284 ha->isp_ops->enable_intrs(ha);
5285
5286 ha->isp_abort_cnt = 0;
5287 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5288
53296788 5289 /* Update the firmware version */
3173167f 5290 status = qla82xx_check_md_needed(vha);
53296788 5291
a9083016
GM		 5292 if (ha->fce) {
5293 ha->flags.fce_enabled = 1;
5294 memset(ha->fce, 0,
5295 fce_calc_size(ha->fce_bufs));
5296 rval = qla2x00_enable_fce_trace(vha,
5297 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5298 &ha->fce_bufs);
5299 if (rval) {
cfb0919c 5300 ql_log(ql_log_warn, vha, 0x8001,
7c3df132
SK		 5301 "Unable to reinitialize FCE (%d).\n",
5302 rval);
a9083016
GM		 5303 ha->flags.fce_enabled = 0;
5304 }
5305 }
5306
5307 if (ha->eft) {
5308 memset(ha->eft, 0, EFT_SIZE);
5309 rval = qla2x00_enable_eft_trace(vha,
5310 ha->eft_dma, EFT_NUM_BUFFERS);
5311 if (rval) {
cfb0919c 5312 ql_log(ql_log_warn, vha, 0x8010,
7c3df132
SK		 5313 "Unable to reinitialize EFT (%d).\n",
5314 rval);
a9083016
GM		 5315 }
5316 }
a9083016
GM		 5317 }
5318
5319 if (!status) {
cfb0919c 5320 ql_dbg(ql_dbg_taskm, vha, 0x8011,
7c3df132 5321 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 5322
5323 spin_lock_irqsave(&ha->vport_slock, flags);
5324 list_for_each_entry(vp, &ha->vp_list, list) {
5325 if (vp->vp_idx) {
5326 atomic_inc(&vp->vref_count);
5327 spin_unlock_irqrestore(&ha->vport_slock, flags);
5328
a9083016 5329 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 5330
5331 spin_lock_irqsave(&ha->vport_slock, flags);
5332 atomic_dec(&vp->vref_count);
5333 }
a9083016 5334 }
feafb7b1
AE		 5335 spin_unlock_irqrestore(&ha->vport_slock, flags);
5336
a9083016 5337 } else {
cfb0919c 5338 ql_log(ql_log_warn, vha, 0x8016,
7c3df132 5339 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 5340 }
5341
5342 return status;
5343}
5344
3a03eb79 5345void
ae97c91e 5346qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 5347{
ae97c91e
AV		 5348 struct qla_hw_data *ha = vha->hw;
5349
5350 if (!ql2xetsenable)
5351 return;
5352
5353 /* Enable ETS Burst. */
5354 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5355 ha->fw_options[2] |= BIT_9;
5356 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 5357}
09ff701a
SR		 5358
5359/*
5360 * qla24xx_get_fcp_prio
5361 * Gets the fcp cmd priority value for the logged in port.
5362 * Looks for a match of the port descriptors within
5363 * each of the fcp prio config entries. If a match is found,
5364 * the tag (priority) value is returned.
5365 *
5366 * Input:
21090cbe 5367 * vha = scsi host structure pointer.
09ff701a
SR		 5368 * fcport = port structure pointer.
5369 *
5370 * Return:
6c452a45 5371 * non-zero (if found)
f28a0a96 5372 * -1 (if not found)
09ff701a
SR		 5373 *
5374 * Context:
5375 * Kernel context
5376 */
f28a0a96 5377static int
09ff701a
SR		 5378qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5379{
5380 int i, entries;
5381 uint8_t pid_match, wwn_match;
f28a0a96 5382 int priority;
09ff701a
SR		 5383 uint32_t pid1, pid2;
5384 uint64_t wwn1, wwn2;
5385 struct qla_fcp_prio_entry *pri_entry;
5386 struct qla_hw_data *ha = vha->hw;
5387
5388 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 5389 return -1;
09ff701a 5390
f28a0a96 5391 priority = -1;
09ff701a
SR		 5392 entries = ha->fcp_prio_cfg->num_entries;
5393 pri_entry = &ha->fcp_prio_cfg->entry[0];
5394
5395 for (i = 0; i < entries; i++) {
5396 pid_match = wwn_match = 0;
5397
5398 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5399 pri_entry++;
5400 continue;
5401 }
5402
5403 /* check source pid for a match */
5404 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5405 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5406 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
5407 if (pid1 == INVALID_PORT_ID)
5408 pid_match++;
5409 else if (pid1 == pid2)
5410 pid_match++;
5411 }
5412
5413 /* check destination pid for a match */
5414 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
5415 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
5416 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
5417 if (pid1 == INVALID_PORT_ID)
5418 pid_match++;
5419 else if (pid1 == pid2)
5420 pid_match++;
5421 }
5422
5423 /* check source WWN for a match */
5424 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
5425 wwn1 = wwn_to_u64(vha->port_name);
5426 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
5427 if (wwn2 == (uint64_t)-1)
5428 wwn_match++;
5429 else if (wwn1 == wwn2)
5430 wwn_match++;
5431 }
5432
5433 /* check destination WWN for a match */
5434 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
5435 wwn1 = wwn_to_u64(fcport->port_name);
5436 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
5437 if (wwn2 == (uint64_t)-1)
5438 wwn_match++;
5439 else if (wwn1 == wwn2)
5440 wwn_match++;
5441 }
5442
5443 if (pid_match == 2 || wwn_match == 2) {
5444 /* Found a matching entry */
5445 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
5446 priority = pri_entry->tag;
5447 break;
5448 }
5449
5450 pri_entry++;
5451 }
5452
5453 return priority;
5454}
5455
5456/*
5457 * qla24xx_update_fcport_fcp_prio
5458 * Activates fcp priority for the logged in fc port
5459 *
5460 * Input:
21090cbe 5461 * vha = scsi host structure pointer.
09ff701a
SR		 5462 * fcp = port structure pointer.
5463 *
5464 * Return:
5465 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5466 *
5467 * Context:
5468 * Kernel context.
5469 */
5470int
21090cbe 5471qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 5472{
5473 int ret;
f28a0a96 5474 int priority;
09ff701a
SR		 5475 uint16_t mb[5];
5476
21090cbe
MI		 5477 if (fcport->port_type != FCT_TARGET ||
5478 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 5479 return QLA_FUNCTION_FAILED;
5480
21090cbe 5481 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 5482 if (priority < 0)
5483 return QLA_FUNCTION_FAILED;
5484
a00f6296
SK		 5485 if (IS_QLA82XX(vha->hw)) {
5486 fcport->fcp_prio = priority & 0xf;
5487 return QLA_SUCCESS;
5488 }
5489
21090cbe 5490 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
cfb0919c
CD		 5491 if (ret == QLA_SUCCESS) {
5492 if (fcport->fcp_prio != priority)
5493 ql_dbg(ql_dbg_user, vha, 0x709e,
5494 "Updated FCP_CMND priority - value=%d loop_id=%d "
5495 "port_id=%02x%02x%02x.\n", priority,
5496 fcport->loop_id, fcport->d_id.b.domain,
5497 fcport->d_id.b.area, fcport->d_id.b.al_pa);
a00f6296 5498 fcport->fcp_prio = priority & 0xf;
cfb0919c 5499 } else
7c3df132 5500 ql_dbg(ql_dbg_user, vha, 0x704f,
cfb0919c
CD		 5501 "Unable to update FCP_CMND priority - ret=0x%x for "
5502 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
5503 fcport->d_id.b.domain, fcport->d_id.b.area,
5504 fcport->d_id.b.al_pa);
09ff701a
SR		 5505 return ret;
5506}
5507
5508/*
5509 * qla24xx_update_all_fcp_prio
5510 * Activates fcp priority for all the logged in ports
5511 *
5512 * Input:
5513 * ha = adapter block pointer.
5514 *
5515 * Return:
5516 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5517 *
5518 * Context:
5519 * Kernel context.
5520 */
5521int
5522qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
5523{
5524 int ret;
5525 fc_port_t *fcport;
5526
5527 ret = QLA_FUNCTION_FAILED;
5528 /* We need to set priority for all logged in ports */
5529 list_for_each_entry(fcport, &vha->vp_fcports, list)
5530 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
5531
5532 return ret;
5533}
Linux kernel - Deliverables
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