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[SCSI] Revert "qla2xxx: During loopdown perform Diagnostic loopback."
[deliverable/linux.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
07e264b7 3 * Copyright (c) 2003-2011 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
1da177e4
LT		 20/*
21* QLogic ISP2x00 Hardware Support Function Prototypes.
22*/
1da177e4 23static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 24static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 25static int qla2x00_init_rings(scsi_qla_host_t *);
26static int qla2x00_fw_ready(scsi_qla_host_t *);
27static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_configure_loop(scsi_qla_host_t *);
29static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_fabric(scsi_qla_host_t *);
31static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
1da177e4
LT		 32static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
33 uint16_t *);
1da177e4
LT		 34
35static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 36
4d4df193
HK		 37static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
38static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 39static int qla25xx_init_queues(struct qla_hw_data *);
4d4df193 40
ac280b67
AV		 41/* SRB Extensions ---------------------------------------------------------- */
42
9ba56b95
GM		 43void
44qla2x00_sp_timeout(unsigned long __data)
ac280b67
AV		 45{
46 srb_t *sp = (srb_t *)__data;
4916392b 47 struct srb_iocb *iocb;
ac280b67
AV		 48 fc_port_t *fcport = sp->fcport;
49 struct qla_hw_data *ha = fcport->vha->hw;
50 struct req_que *req;
51 unsigned long flags;
52
53 spin_lock_irqsave(&ha->hardware_lock, flags);
54 req = ha->req_q_map[0];
55 req->outstanding_cmds[sp->handle] = NULL;
9ba56b95 56 iocb = &sp->u.iocb_cmd;
4916392b 57 iocb->timeout(sp);
9ba56b95 58 sp->free(fcport->vha, sp);
6ac52608 59 spin_unlock_irqrestore(&ha->hardware_lock, flags);
ac280b67
AV		 60}
61
9ba56b95
GM		 62void
63qla2x00_sp_free(void *data, void *ptr)
ac280b67 64{
9ba56b95
GM		 65 srb_t *sp = (srb_t *)ptr;
66 struct srb_iocb *iocb = &sp->u.iocb_cmd;
67 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
ac280b67 68
4d97cc53 69 del_timer(&iocb->timer);
9ba56b95 70 mempool_free(sp, vha->hw->srb_mempool);
feafb7b1
AE		 71
72 QLA_VHA_MARK_NOT_BUSY(vha);
ac280b67
AV		 73}
74
ac280b67
AV		 75/* Asynchronous Login/Logout Routines -------------------------------------- */
76
5b91490e
AV		 77static inline unsigned long
78qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79{
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (!IS_FWI2_CAPABLE(ha)) {
86 /*
87 * Except for earlier ISPs where the timeout is seeded from the
88 * initialization control block.
89 */
90 tmo = ha->login_timeout;
91 }
92 return tmo;
93}
ac280b67
AV		 94
95static void
9ba56b95 96qla2x00_async_iocb_timeout(void *data)
ac280b67 97{
9ba56b95 98 srb_t *sp = (srb_t *)data;
ac280b67 99 fc_port_t *fcport = sp->fcport;
ac280b67 100
7c3df132 101 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
cfb0919c 102 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
9ba56b95 103 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
7c3df132 104 fcport->d_id.b.al_pa);
ac280b67 105
5ff1d584 106 fcport->flags &= ~FCF_ASYNC_SENT;
9ba56b95
GM		 107 if (sp->type == SRB_LOGIN_CMD) {
108 struct srb_iocb *lio = &sp->u.iocb_cmd;
ac280b67 109 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
6ac52608
AV		 110 /* Retry as needed. */
111 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
112 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
113 QLA_LOGIO_LOGIN_RETRIED : 0;
114 qla2x00_post_async_login_done_work(fcport->vha, fcport,
115 lio->u.logio.data);
116 }
ac280b67
AV		 117}
118
99b0bec7 119static void
9ba56b95 120qla2x00_async_login_sp_done(void *data, void *ptr, int res)
99b0bec7 121{
9ba56b95
GM		 122 srb_t *sp = (srb_t *)ptr;
123 struct srb_iocb *lio = &sp->u.iocb_cmd;
124 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
125
126 if (!test_bit(UNLOADING, &vha->dpc_flags))
127 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
128 lio->u.logio.data);
129 sp->free(sp->fcport->vha, sp);
99b0bec7
AV		 130}
131
ac280b67
AV		 132int
133qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
134 uint16_t *data)
135{
ac280b67 136 srb_t *sp;
4916392b 137 struct srb_iocb *lio;
ac280b67
AV		 138 int rval;
139
140 rval = QLA_FUNCTION_FAILED;
9ba56b95 141 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 142 if (!sp)
143 goto done;
144
9ba56b95
GM		 145 sp->type = SRB_LOGIN_CMD;
146 sp->name = "login";
147 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
148
149 lio = &sp->u.iocb_cmd;
3822263e 150 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 151 sp->done = qla2x00_async_login_sp_done;
4916392b 152 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
ac280b67 153 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 154 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
ac280b67
AV		 155 rval = qla2x00_start_sp(sp);
156 if (rval != QLA_SUCCESS)
157 goto done_free_sp;
158
7c3df132 159 ql_dbg(ql_dbg_disc, vha, 0x2072,
cfb0919c
CD		 160 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
161 "retries=%d.\n", sp->handle, fcport->loop_id,
162 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
163 fcport->login_retry);
ac280b67
AV		 164 return rval;
165
166done_free_sp:
9ba56b95 167 sp->free(fcport->vha, sp);
ac280b67
AV		 168done:
169 return rval;
170}
171
99b0bec7 172static void
9ba56b95 173qla2x00_async_logout_sp_done(void *data, void *ptr, int res)
99b0bec7 174{
9ba56b95
GM		 175 srb_t *sp = (srb_t *)ptr;
176 struct srb_iocb *lio = &sp->u.iocb_cmd;
177 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
178
179 if (!test_bit(UNLOADING, &vha->dpc_flags))
180 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
181 lio->u.logio.data);
182 sp->free(sp->fcport->vha, sp);
99b0bec7
AV		 183}
184
ac280b67
AV		 185int
186qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
187{
ac280b67 188 srb_t *sp;
4916392b 189 struct srb_iocb *lio;
ac280b67
AV		 190 int rval;
191
192 rval = QLA_FUNCTION_FAILED;
9ba56b95 193 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 194 if (!sp)
195 goto done;
196
9ba56b95
GM		 197 sp->type = SRB_LOGOUT_CMD;
198 sp->name = "logout";
199 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
200
201 lio = &sp->u.iocb_cmd;
3822263e 202 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 203 sp->done = qla2x00_async_logout_sp_done;
ac280b67
AV		 204 rval = qla2x00_start_sp(sp);
205 if (rval != QLA_SUCCESS)
206 goto done_free_sp;
207
7c3df132 208 ql_dbg(ql_dbg_disc, vha, 0x2070,
cfb0919c
CD		 209 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
210 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
211 fcport->d_id.b.area, fcport->d_id.b.al_pa);
ac280b67
AV		 212 return rval;
213
214done_free_sp:
9ba56b95 215 sp->free(fcport->vha, sp);
ac280b67
AV		 216done:
217 return rval;
218}
219
5ff1d584 220static void
9ba56b95 221qla2x00_async_adisc_sp_done(void *data, void *ptr, int res)
5ff1d584 222{
9ba56b95
GM		 223 srb_t *sp = (srb_t *)ptr;
224 struct srb_iocb *lio = &sp->u.iocb_cmd;
225 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
226
227 if (!test_bit(UNLOADING, &vha->dpc_flags))
228 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
229 lio->u.logio.data);
230 sp->free(sp->fcport->vha, sp);
5ff1d584
AV		 231}
232
233int
234qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
235 uint16_t *data)
236{
5ff1d584 237 srb_t *sp;
4916392b 238 struct srb_iocb *lio;
5ff1d584
AV		 239 int rval;
240
241 rval = QLA_FUNCTION_FAILED;
9ba56b95 242 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
5ff1d584
AV		 243 if (!sp)
244 goto done;
245
9ba56b95
GM		 246 sp->type = SRB_ADISC_CMD;
247 sp->name = "adisc";
248 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
249
250 lio = &sp->u.iocb_cmd;
3822263e 251 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 252 sp->done = qla2x00_async_adisc_sp_done;
5ff1d584 253 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 254 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584
AV		 255 rval = qla2x00_start_sp(sp);
256 if (rval != QLA_SUCCESS)
257 goto done_free_sp;
258
7c3df132 259 ql_dbg(ql_dbg_disc, vha, 0x206f,
cfb0919c
CD		 260 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
261 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
262 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5ff1d584
AV		 263 return rval;
264
265done_free_sp:
9ba56b95 266 sp->free(fcport->vha, sp);
5ff1d584
AV		 267done:
268 return rval;
269}
270
3822263e 271static void
9ba56b95 272qla2x00_async_tm_cmd_done(void *data, void *ptr, int res)
3822263e 273{
9ba56b95
GM		 274 srb_t *sp = (srb_t *)ptr;
275 struct srb_iocb *iocb = &sp->u.iocb_cmd;
276 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
277 uint32_t flags;
278 uint16_t lun;
279 int rval;
3822263e 280
9ba56b95
GM		 281 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
282 flags = iocb->u.tmf.flags;
283 lun = (uint16_t)iocb->u.tmf.lun;
284
285 /* Issue Marker IOCB */
286 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
287 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
288 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
289
290 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
291 ql_dbg(ql_dbg_taskm, vha, 0x8030,
292 "TM IOCB failed (%x).\n", rval);
293 }
294 }
295 sp->free(sp->fcport->vha, sp);
3822263e
MI		 296}
297
298int
9ba56b95 299qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun,
3822263e
MI		 300 uint32_t tag)
301{
302 struct scsi_qla_host *vha = fcport->vha;
3822263e 303 srb_t *sp;
3822263e
MI		 304 struct srb_iocb *tcf;
305 int rval;
306
307 rval = QLA_FUNCTION_FAILED;
9ba56b95 308 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
3822263e
MI		 309 if (!sp)
310 goto done;
311
9ba56b95
GM		 312 sp->type = SRB_TM_CMD;
313 sp->name = "tmf";
314 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
315
316 tcf = &sp->u.iocb_cmd;
317 tcf->u.tmf.flags = tm_flags;
3822263e
MI		 318 tcf->u.tmf.lun = lun;
319 tcf->u.tmf.data = tag;
320 tcf->timeout = qla2x00_async_iocb_timeout;
9ba56b95 321 sp->done = qla2x00_async_tm_cmd_done;
3822263e
MI		 322
323 rval = qla2x00_start_sp(sp);
324 if (rval != QLA_SUCCESS)
325 goto done_free_sp;
326
7c3df132 327 ql_dbg(ql_dbg_taskm, vha, 0x802f,
cfb0919c
CD		 328 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
329 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
330 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3822263e
MI		 331 return rval;
332
333done_free_sp:
9ba56b95 334 sp->free(fcport->vha, sp);
3822263e
MI		 335done:
336 return rval;
337}
338
4916392b 339void
ac280b67
AV		 340qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
341 uint16_t *data)
342{
343 int rval;
ac280b67
AV		 344
345 switch (data[0]) {
346 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 347 /*
348 * Driver must validate login state - If PRLI not complete,
349 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
350 * requests.
351 */
352 rval = qla2x00_get_port_database(vha, fcport, 0);
0eba25df
AE		 353 if (rval == QLA_NOT_LOGGED_IN) {
354 fcport->flags &= ~FCF_ASYNC_SENT;
355 fcport->flags |= FCF_LOGIN_NEEDED;
356 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
357 break;
358 }
359
a4f92a32
AV		 360 if (rval != QLA_SUCCESS) {
361 qla2x00_post_async_logout_work(vha, fcport, NULL);
362 qla2x00_post_async_login_work(vha, fcport, NULL);
363 break;
364 }
99b0bec7 365 if (fcport->flags & FCF_FCP2_DEVICE) {
5ff1d584
AV		 366 qla2x00_post_async_adisc_work(vha, fcport, data);
367 break;
99b0bec7
AV		 368 }
369 qla2x00_update_fcport(vha, fcport);
ac280b67
AV		 370 break;
371 case MBS_COMMAND_ERROR:
5ff1d584 372 fcport->flags &= ~FCF_ASYNC_SENT;
ac280b67
AV		 373 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
374 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
375 else
80d79440 376 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 377 break;
378 case MBS_PORT_ID_USED:
379 fcport->loop_id = data[1];
6ac52608 380 qla2x00_post_async_logout_work(vha, fcport, NULL);
ac280b67
AV		 381 qla2x00_post_async_login_work(vha, fcport, NULL);
382 break;
383 case MBS_LOOP_ID_USED:
384 fcport->loop_id++;
385 rval = qla2x00_find_new_loop_id(vha, fcport);
386 if (rval != QLA_SUCCESS) {
5ff1d584 387 fcport->flags &= ~FCF_ASYNC_SENT;
80d79440 388 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 389 break;
390 }
391 qla2x00_post_async_login_work(vha, fcport, NULL);
392 break;
393 }
4916392b 394 return;
ac280b67
AV		 395}
396
4916392b 397void
ac280b67
AV		 398qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
399 uint16_t *data)
400{
401 qla2x00_mark_device_lost(vha, fcport, 1, 0);
4916392b 402 return;
ac280b67
AV		 403}
404
4916392b 405void
5ff1d584
AV		 406qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
407 uint16_t *data)
408{
409 if (data[0] == MBS_COMMAND_COMPLETE) {
410 qla2x00_update_fcport(vha, fcport);
411
4916392b 412 return;
5ff1d584
AV		 413 }
414
415 /* Retry login. */
416 fcport->flags &= ~FCF_ASYNC_SENT;
417 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
418 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
419 else
80d79440 420 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5ff1d584 421
4916392b 422 return;
5ff1d584
AV		 423}
424
1da177e4
LT		 425/****************************************************************************/
426/* QLogic ISP2x00 Hardware Support Functions. */
427/****************************************************************************/
428
429/*
430* qla2x00_initialize_adapter
431* Initialize board.
432*
433* Input:
434* ha = adapter block pointer.
435*
436* Returns:
437* 0 = success
438*/
439int
e315cd28 440qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 441{
442 int rval;
e315cd28 443 struct qla_hw_data *ha = vha->hw;
73208dfd 444 struct req_que *req = ha->req_q_map[0];
2533cf67 445
1da177e4 446 /* Clear adapter flags. */
e315cd28 447 vha->flags.online = 0;
2533cf67 448 ha->flags.chip_reset_done = 0;
e315cd28 449 vha->flags.reset_active = 0;
85880801
AV		 450 ha->flags.pci_channel_io_perm_failure = 0;
451 ha->flags.eeh_busy = 0;
794a5691 452 ha->flags.thermal_supported = 1;
e315cd28
AC		 453 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
454 atomic_set(&vha->loop_state, LOOP_DOWN);
455 vha->device_flags = DFLG_NO_CABLE;
456 vha->dpc_flags = 0;
457 vha->flags.management_server_logged_in = 0;
458 vha->marker_needed = 0;
1da177e4
LT		 459 ha->isp_abort_cnt = 0;
460 ha->beacon_blink_led = 0;
461
73208dfd
AC		 462 set_bit(0, ha->req_qid_map);
463 set_bit(0, ha->rsp_qid_map);
464
cfb0919c 465 ql_dbg(ql_dbg_init, vha, 0x0040,
7c3df132 466 "Configuring PCI space...\n");
e315cd28 467 rval = ha->isp_ops->pci_config(vha);
1da177e4 468 if (rval) {
7c3df132
SK		 469 ql_log(ql_log_warn, vha, 0x0044,
470 "Unable to configure PCI space.\n");
1da177e4
LT		 471 return (rval);
472 }
473
e315cd28 474 ha->isp_ops->reset_chip(vha);
1da177e4 475
e315cd28 476 rval = qla2xxx_get_flash_info(vha);
c00d8994 477 if (rval) {
7c3df132
SK		 478 ql_log(ql_log_fatal, vha, 0x004f,
479 "Unable to validate FLASH data.\n");
c00d8994
AV		 480 return (rval);
481 }
482
73208dfd 483 ha->isp_ops->get_flash_version(vha, req->ring);
cfb0919c 484 ql_dbg(ql_dbg_init, vha, 0x0061,
7c3df132 485 "Configure NVRAM parameters...\n");
0107109e 486
e315cd28 487 ha->isp_ops->nvram_config(vha);
1da177e4 488
d4c760c2
AV		 489 if (ha->flags.disable_serdes) {
490 /* Mask HBA via NVRAM settings? */
7c3df132
SK		 491 ql_log(ql_log_info, vha, 0x0077,
492 "Masking HBA WWPN "
d4c760c2 493 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
e315cd28
AC		 494 vha->port_name[0], vha->port_name[1],
495 vha->port_name[2], vha->port_name[3],
496 vha->port_name[4], vha->port_name[5],
497 vha->port_name[6], vha->port_name[7]);
d4c760c2
AV		 498 return QLA_FUNCTION_FAILED;
499 }
500
cfb0919c 501 ql_dbg(ql_dbg_init, vha, 0x0078,
7c3df132 502 "Verifying loaded RISC code...\n");
1da177e4 503
e315cd28
AC		 504 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
505 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 506 if (rval)
507 return (rval);
e315cd28 508 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 509 if (rval)
510 return (rval);
1da177e4 511 }
a9083016 512
4d4df193 513 if (IS_QLA84XX(ha)) {
e315cd28 514 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 515 if (!ha->cs84xx) {
7c3df132 516 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 517 "Unable to configure ISP84XX.\n");
518 return QLA_FUNCTION_FAILED;
519 }
520 }
e315cd28 521 rval = qla2x00_init_rings(vha);
2533cf67 522 ha->flags.chip_reset_done = 1;
1da177e4 523
9a069e19 524 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 525 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 526 rval = qla84xx_init_chip(vha);
527 if (rval != QLA_SUCCESS) {
7c3df132
SK		 528 ql_log(ql_log_warn, vha, 0x00d4,
529 "Unable to initialize ISP84XX.\n");
9a069e19
GM		 530 qla84xx_put_chip(vha);
531 }
532 }
533
2f0f3f4f
MI		 534 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
535 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 536
1da177e4
LT		 537 return (rval);
538}
539
540/**
abbd8870 541 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
1da177e4
LT		 542 * @ha: HA context
543 *
544 * Returns 0 on success.
545 */
abbd8870 546int
e315cd28 547qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 548{
a157b101 549 uint16_t w;
abbd8870 550 unsigned long flags;
e315cd28 551 struct qla_hw_data *ha = vha->hw;
3d71644c 552 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 553
1da177e4 554 pci_set_master(ha->pdev);
af6177d8 555 pci_try_set_mwi(ha->pdev);
1da177e4 556
1da177e4 557 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 558 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 559 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
560
737faece 561 pci_disable_rom(ha->pdev);
1da177e4
LT		 562
563 /* Get PCI bus information. */
564 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 565 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 566 spin_unlock_irqrestore(&ha->hardware_lock, flags);
567
abbd8870
AV		 568 return QLA_SUCCESS;
569}
1da177e4 570
abbd8870
AV		 571/**
572 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
573 * @ha: HA context
574 *
575 * Returns 0 on success.
576 */
577int
e315cd28 578qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 579{
a157b101 580 uint16_t w;
abbd8870
AV		 581 unsigned long flags = 0;
582 uint32_t cnt;
e315cd28 583 struct qla_hw_data *ha = vha->hw;
3d71644c 584 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 585
abbd8870 586 pci_set_master(ha->pdev);
af6177d8 587 pci_try_set_mwi(ha->pdev);
1da177e4 588
abbd8870 589 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 590 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 591
abbd8870
AV		 592 if (IS_QLA2322(ha) || IS_QLA6322(ha))
593 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 594 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 595
abbd8870
AV		 596 /*
597 * If this is a 2300 card and not 2312, reset the
598 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
599 * the 2310 also reports itself as a 2300 so we need to get the
600 * fb revision level -- a 6 indicates it really is a 2300 and
601 * not a 2310.
602 */
603 if (IS_QLA2300(ha)) {
604 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 605
abbd8870 606 /* Pause RISC. */
3d71644c 607 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 608 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 609 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 610 break;
1da177e4 611
abbd8870
AV		 612 udelay(10);
613 }
1da177e4 614
abbd8870 615 /* Select FPM registers. */
3d71644c
AV		 616 WRT_REG_WORD(&reg->ctrl_status, 0x20);
617 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 618
619 /* Get the fb rev level */
3d71644c 620 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 621
622 if (ha->fb_rev == FPM_2300)
a157b101 623 pci_clear_mwi(ha->pdev);
abbd8870
AV		 624
625 /* Deselect FPM registers. */
3d71644c
AV		 626 WRT_REG_WORD(&reg->ctrl_status, 0x0);
627 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 628
629 /* Release RISC module. */
3d71644c 630 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 631 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 632 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 633 break;
634
635 udelay(10);
1da177e4 636 }
1da177e4 637
abbd8870
AV		 638 spin_unlock_irqrestore(&ha->hardware_lock, flags);
639 }
1da177e4 640
abbd8870
AV		 641 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
642
737faece 643 pci_disable_rom(ha->pdev);
1da177e4 644
abbd8870
AV		 645 /* Get PCI bus information. */
646 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 647 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 648 spin_unlock_irqrestore(&ha->hardware_lock, flags);
649
650 return QLA_SUCCESS;
1da177e4
LT		 651}
652
0107109e
AV		 653/**
654 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
655 * @ha: HA context
656 *
657 * Returns 0 on success.
658 */
659int
e315cd28 660qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 661{
a157b101 662 uint16_t w;
0107109e 663 unsigned long flags = 0;
e315cd28 664 struct qla_hw_data *ha = vha->hw;
0107109e 665 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 666
667 pci_set_master(ha->pdev);
af6177d8 668 pci_try_set_mwi(ha->pdev);
0107109e
AV		 669
670 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 671 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 672 w &= ~PCI_COMMAND_INTX_DISABLE;
673 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
674
675 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
676
677 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 678 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
679 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 680
681 /* PCIe -- adjust Maximum Read Request Size (2048). */
f85ec187
AV		 682 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
683 pcie_set_readrq(ha->pdev, 2048);
0107109e 684
737faece 685 pci_disable_rom(ha->pdev);
0107109e 686
44c10138 687 ha->chip_revision = ha->pdev->revision;
a8488abe 688
0107109e
AV		 689 /* Get PCI bus information. */
690 spin_lock_irqsave(&ha->hardware_lock, flags);
691 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
692 spin_unlock_irqrestore(&ha->hardware_lock, flags);
693
694 return QLA_SUCCESS;
695}
696
c3a2f0df
AV		 697/**
698 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
699 * @ha: HA context
700 *
701 * Returns 0 on success.
702 */
703int
e315cd28 704qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 705{
706 uint16_t w;
e315cd28 707 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 708
709 pci_set_master(ha->pdev);
710 pci_try_set_mwi(ha->pdev);
711
712 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
713 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
714 w &= ~PCI_COMMAND_INTX_DISABLE;
715 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
716
717 /* PCIe -- adjust Maximum Read Request Size (2048). */
718 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
719 pcie_set_readrq(ha->pdev, 2048);
720
737faece 721 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 722
723 ha->chip_revision = ha->pdev->revision;
724
725 return QLA_SUCCESS;
726}
727
1da177e4
LT		 728/**
729 * qla2x00_isp_firmware() - Choose firmware image.
730 * @ha: HA context
731 *
732 * Returns 0 on success.
733 */
734static int
e315cd28 735qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 736{
737 int rval;
42e421b1
AV		 738 uint16_t loop_id, topo, sw_cap;
739 uint8_t domain, area, al_pa;
e315cd28 740 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 741
742 /* Assume loading risc code */
fa2a1ce5 743 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 744
745 if (ha->flags.disable_risc_code_load) {
7c3df132 746 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 747
748 /* Verify checksum of loaded RISC code. */
e315cd28 749 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 750 if (rval == QLA_SUCCESS) {
751 /* And, verify we are not in ROM code. */
e315cd28 752 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 753 &area, &domain, &topo, &sw_cap);
754 }
1da177e4
LT		 755 }
756
7c3df132
SK		 757 if (rval)
758 ql_dbg(ql_dbg_init, vha, 0x007a,
759 "**** Load RISC code ****.\n");
1da177e4
LT		 760
761 return (rval);
762}
763
764/**
765 * qla2x00_reset_chip() - Reset ISP chip.
766 * @ha: HA context
767 *
768 * Returns 0 on success.
769 */
abbd8870 770void
e315cd28 771qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 772{
773 unsigned long flags = 0;
e315cd28 774 struct qla_hw_data *ha = vha->hw;
3d71644c 775 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 776 uint32_t cnt;
1da177e4
LT		 777 uint16_t cmd;
778
85880801
AV		 779 if (unlikely(pci_channel_offline(ha->pdev)))
780 return;
781
fd34f556 782 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 783
784 spin_lock_irqsave(&ha->hardware_lock, flags);
785
786 /* Turn off master enable */
787 cmd = 0;
788 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
789 cmd &= ~PCI_COMMAND_MASTER;
790 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
791
792 if (!IS_QLA2100(ha)) {
793 /* Pause RISC. */
794 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
795 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
796 for (cnt = 0; cnt < 30000; cnt++) {
797 if ((RD_REG_WORD(&reg->hccr) &
798 HCCR_RISC_PAUSE) != 0)
799 break;
800 udelay(100);
801 }
802 } else {
803 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
804 udelay(10);
805 }
806
807 /* Select FPM registers. */
808 WRT_REG_WORD(&reg->ctrl_status, 0x20);
809 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
810
811 /* FPM Soft Reset. */
812 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
813 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
814
815 /* Toggle Fpm Reset. */
816 if (!IS_QLA2200(ha)) {
817 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
818 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
819 }
820
821 /* Select frame buffer registers. */
822 WRT_REG_WORD(&reg->ctrl_status, 0x10);
823 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
824
825 /* Reset frame buffer FIFOs. */
826 if (IS_QLA2200(ha)) {
827 WRT_FB_CMD_REG(ha, reg, 0xa000);
828 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
829 } else {
830 WRT_FB_CMD_REG(ha, reg, 0x00fc);
831
832 /* Read back fb_cmd until zero or 3 seconds max */
833 for (cnt = 0; cnt < 3000; cnt++) {
834 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
835 break;
836 udelay(100);
837 }
838 }
839
840 /* Select RISC module registers. */
841 WRT_REG_WORD(&reg->ctrl_status, 0);
842 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
843
844 /* Reset RISC processor. */
845 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
846 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
847
848 /* Release RISC processor. */
849 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
850 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
851 }
852
853 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
854 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
855
856 /* Reset ISP chip. */
857 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
858
859 /* Wait for RISC to recover from reset. */
860 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
861 /*
862 * It is necessary to for a delay here since the card doesn't
863 * respond to PCI reads during a reset. On some architectures
864 * this will result in an MCA.
865 */
866 udelay(20);
867 for (cnt = 30000; cnt; cnt--) {
868 if ((RD_REG_WORD(&reg->ctrl_status) &
869 CSR_ISP_SOFT_RESET) == 0)
870 break;
871 udelay(100);
872 }
873 } else
874 udelay(10);
875
876 /* Reset RISC processor. */
877 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
878
879 WRT_REG_WORD(&reg->semaphore, 0);
880
881 /* Release RISC processor. */
882 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
883 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
884
885 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
886 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 887 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 888 break;
1da177e4
LT		 889
890 udelay(100);
891 }
892 } else
893 udelay(100);
894
895 /* Turn on master enable */
896 cmd |= PCI_COMMAND_MASTER;
897 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
898
899 /* Disable RISC pause on FPM parity error. */
900 if (!IS_QLA2100(ha)) {
901 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
902 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
903 }
904
905 spin_unlock_irqrestore(&ha->hardware_lock, flags);
906}
907
b1d46989
MI		 908/**
909 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
910 *
911 * Returns 0 on success.
912 */
913int
914qla81xx_reset_mpi(scsi_qla_host_t *vha)
915{
916 uint16_t mb[4] = {0x1010, 0, 1, 0};
917
6246b8a1
GM		 918 if (!IS_QLA81XX(vha->hw))
919 return QLA_SUCCESS;
920
b1d46989
MI		 921 return qla81xx_write_mpi_register(vha, mb);
922}
923
0107109e 924/**
88c26663 925 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
0107109e
AV		 926 * @ha: HA context
927 *
928 * Returns 0 on success.
929 */
88c26663 930static inline void
e315cd28 931qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 932{
933 unsigned long flags = 0;
e315cd28 934 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 935 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
936 uint32_t cnt, d2;
335a1cc9 937 uint16_t wd;
b1d46989 938 static int abts_cnt; /* ISP abort retry counts */
0107109e 939
0107109e
AV		 940 spin_lock_irqsave(&ha->hardware_lock, flags);
941
942 /* Reset RISC. */
943 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
944 for (cnt = 0; cnt < 30000; cnt++) {
945 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
946 break;
947
948 udelay(10);
949 }
950
951 WRT_REG_DWORD(&reg->ctrl_status,
952 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 953 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 954
335a1cc9 955 udelay(100);
88c26663 956 /* Wait for firmware to complete NVRAM accesses. */
88c26663
AV		 957 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
958 for (cnt = 10000 ; cnt && d2; cnt--) {
959 udelay(5);
960 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
961 barrier();
962 }
963
335a1cc9 964 /* Wait for soft-reset to complete. */
0107109e
AV		 965 d2 = RD_REG_DWORD(&reg->ctrl_status);
966 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
967 udelay(5);
968 d2 = RD_REG_DWORD(&reg->ctrl_status);
969 barrier();
970 }
971
b1d46989
MI		 972 /* If required, do an MPI FW reset now */
973 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
974 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
975 if (++abts_cnt < 5) {
976 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
977 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
978 } else {
979 /*
980 * We exhausted the ISP abort retries. We have to
981 * set the board offline.
982 */
983 abts_cnt = 0;
984 vha->flags.online = 0;
985 }
986 }
987 }
988
0107109e
AV		 989 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
990 RD_REG_DWORD(&reg->hccr);
991
992 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
993 RD_REG_DWORD(&reg->hccr);
994
995 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
996 RD_REG_DWORD(&reg->hccr);
997
998 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
999 for (cnt = 6000000 ; cnt && d2; cnt--) {
1000 udelay(5);
1001 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1002 barrier();
1003 }
1004
1005 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6
AV		 1006
1007 if (IS_NOPOLLING_TYPE(ha))
1008 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 1009}
1010
88c26663
AV		 1011/**
1012 * qla24xx_reset_chip() - Reset ISP24xx chip.
1013 * @ha: HA context
1014 *
1015 * Returns 0 on success.
1016 */
1017void
e315cd28 1018qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 1019{
e315cd28 1020 struct qla_hw_data *ha = vha->hw;
85880801
AV		 1021
1022 if (pci_channel_offline(ha->pdev) &&
1023 ha->flags.pci_channel_io_perm_failure) {
1024 return;
1025 }
1026
fd34f556 1027 ha->isp_ops->disable_intrs(ha);
88c26663
AV		 1028
1029 /* Perform RISC reset. */
e315cd28 1030 qla24xx_reset_risc(vha);
88c26663
AV		 1031}
1032
1da177e4
LT		 1033/**
1034 * qla2x00_chip_diag() - Test chip for proper operation.
1035 * @ha: HA context
1036 *
1037 * Returns 0 on success.
1038 */
abbd8870 1039int
e315cd28 1040qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 1041{
1042 int rval;
e315cd28 1043 struct qla_hw_data *ha = vha->hw;
3d71644c 1044 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 1045 unsigned long flags = 0;
1046 uint16_t data;
1047 uint32_t cnt;
1048 uint16_t mb[5];
73208dfd 1049 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 1050
1051 /* Assume a failed state */
1052 rval = QLA_FUNCTION_FAILED;
1053
7c3df132
SK		 1054 ql_dbg(ql_dbg_init, vha, 0x007b,
1055 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1da177e4
LT		 1056
1057 spin_lock_irqsave(&ha->hardware_lock, flags);
1058
1059 /* Reset ISP chip. */
1060 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1061
1062 /*
1063 * We need to have a delay here since the card will not respond while
1064 * in reset causing an MCA on some architectures.
1065 */
1066 udelay(20);
1067 data = qla2x00_debounce_register(&reg->ctrl_status);
1068 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1069 udelay(5);
1070 data = RD_REG_WORD(&reg->ctrl_status);
1071 barrier();
1072 }
1073
1074 if (!cnt)
1075 goto chip_diag_failed;
1076
7c3df132
SK		 1077 ql_dbg(ql_dbg_init, vha, 0x007c,
1078 "Reset register cleared by chip reset.\n");
1da177e4
LT		 1079
1080 /* Reset RISC processor. */
1081 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1082 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1083
1084 /* Workaround for QLA2312 PCI parity error */
1085 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1086 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1087 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1088 udelay(5);
1089 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 1090 barrier();
1da177e4
LT		 1091 }
1092 } else
1093 udelay(10);
1094
1095 if (!cnt)
1096 goto chip_diag_failed;
1097
1098 /* Check product ID of chip */
7c3df132 1099 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1da177e4
LT		 1100
1101 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1102 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1103 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1104 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1105 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1106 mb[3] != PROD_ID_3) {
7c3df132
SK		 1107 ql_log(ql_log_warn, vha, 0x0062,
1108 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1109 mb[1], mb[2], mb[3]);
1da177e4
LT		 1110
1111 goto chip_diag_failed;
1112 }
1113 ha->product_id[0] = mb[1];
1114 ha->product_id[1] = mb[2];
1115 ha->product_id[2] = mb[3];
1116 ha->product_id[3] = mb[4];
1117
1118 /* Adjust fw RISC transfer size */
73208dfd 1119 if (req->length > 1024)
1da177e4
LT		 1120 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1121 else
1122 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 1123 req->length;
1da177e4
LT		 1124
1125 if (IS_QLA2200(ha) &&
1126 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1127 /* Limit firmware transfer size with a 2200A */
7c3df132 1128 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 1129
ea5b6382 1130 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 1131 ha->fw_transfer_size = 128;
1132 }
1133
1134 /* Wrap Incoming Mailboxes Test. */
1135 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1136
7c3df132 1137 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 1138 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 1139 if (rval)
1140 ql_log(ql_log_warn, vha, 0x0080,
1141 "Failed mailbox send register test.\n");
1142 else
1da177e4
LT		 1143 /* Flag a successful rval */
1144 rval = QLA_SUCCESS;
1da177e4
LT		 1145 spin_lock_irqsave(&ha->hardware_lock, flags);
1146
1147chip_diag_failed:
1148 if (rval)
7c3df132
SK		 1149 ql_log(ql_log_info, vha, 0x0081,
1150 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 1151
1152 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1153
1154 return (rval);
1155}
1156
0107109e
AV		 1157/**
1158 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1159 * @ha: HA context
1160 *
1161 * Returns 0 on success.
1162 */
1163int
e315cd28 1164qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 1165{
1166 int rval;
e315cd28 1167 struct qla_hw_data *ha = vha->hw;
73208dfd 1168 struct req_que *req = ha->req_q_map[0];
0107109e 1169
a9083016
GM		 1170 if (IS_QLA82XX(ha))
1171 return QLA_SUCCESS;
1172
73208dfd 1173 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 1174
e315cd28 1175 rval = qla2x00_mbx_reg_test(vha);
0107109e 1176 if (rval) {
7c3df132
SK		 1177 ql_log(ql_log_warn, vha, 0x0082,
1178 "Failed mailbox send register test.\n");
0107109e
AV		 1179 } else {
1180 /* Flag a successful rval */
1181 rval = QLA_SUCCESS;
1182 }
1183
1184 return rval;
1185}
1186
a7a167bf 1187void
e315cd28 1188qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
0107109e 1189{
a7a167bf
AV		 1190 int rval;
1191 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
73208dfd 1192 eft_size, fce_size, mq_size;
df613b96
AV		 1193 dma_addr_t tc_dma;
1194 void *tc;
e315cd28 1195 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1196 struct req_que *req = ha->req_q_map[0];
1197 struct rsp_que *rsp = ha->rsp_q_map[0];
a7a167bf
AV		 1198
1199 if (ha->fw_dump) {
7c3df132
SK		 1200 ql_dbg(ql_dbg_init, vha, 0x00bd,
1201 "Firmware dump already allocated.\n");
a7a167bf
AV		 1202 return;
1203 }
d4e3e04d 1204
0107109e 1205 ha->fw_dumped = 0;
73208dfd 1206 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
d4e3e04d 1207 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
a7a167bf 1208 fixed_size = sizeof(struct qla2100_fw_dump);
d4e3e04d 1209 } else if (IS_QLA23XX(ha)) {
a7a167bf
AV		 1210 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1211 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1212 sizeof(uint16_t);
e428924c 1213 } else if (IS_FWI2_CAPABLE(ha)) {
6246b8a1
GM		 1214 if (IS_QLA83XX(ha))
1215 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1216 else if (IS_QLA81XX(ha))
3a03eb79
AV		 1217 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1218 else if (IS_QLA25XX(ha))
1219 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1220 else
1221 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
a7a167bf
AV		 1222 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1223 sizeof(uint32_t);
050c9bb1 1224 if (ha->mqenable) {
6246b8a1
GM		 1225 if (!IS_QLA83XX(ha))
1226 mq_size = sizeof(struct qla2xxx_mq_chain);
050c9bb1
GM		 1227 /*
1228 * Allocate maximum buffer size for all queues.
1229 * Resizing must be done at end-of-dump processing.
1230 */
1231 mq_size += ha->max_req_queues *
1232 (req->length * sizeof(request_t));
1233 mq_size += ha->max_rsp_queues *
1234 (rsp->length * sizeof(response_t));
1235 }
df613b96 1236 /* Allocate memory for Fibre Channel Event Buffer. */
6246b8a1 1237 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
436a7b11 1238 goto try_eft;
df613b96
AV		 1239
1240 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1241 GFP_KERNEL);
1242 if (!tc) {
7c3df132
SK		 1243 ql_log(ql_log_warn, vha, 0x00be,
1244 "Unable to allocate (%d KB) for FCE.\n",
1245 FCE_SIZE / 1024);
17d98630 1246 goto try_eft;
df613b96
AV		 1247 }
1248
1249 memset(tc, 0, FCE_SIZE);
e315cd28 1250 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 1251 ha->fce_mb, &ha->fce_bufs);
1252 if (rval) {
7c3df132
SK		 1253 ql_log(ql_log_warn, vha, 0x00bf,
1254 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 1255 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1256 tc_dma);
1257 ha->flags.fce_enabled = 0;
17d98630 1258 goto try_eft;
df613b96 1259 }
cfb0919c 1260 ql_dbg(ql_dbg_init, vha, 0x00c0,
7c3df132 1261 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 1262
7d9dade3 1263 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
df613b96
AV		 1264 ha->flags.fce_enabled = 1;
1265 ha->fce_dma = tc_dma;
1266 ha->fce = tc;
436a7b11
AV		 1267try_eft:
1268 /* Allocate memory for Extended Trace Buffer. */
1269 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1270 GFP_KERNEL);
1271 if (!tc) {
7c3df132
SK		 1272 ql_log(ql_log_warn, vha, 0x00c1,
1273 "Unable to allocate (%d KB) for EFT.\n",
1274 EFT_SIZE / 1024);
436a7b11
AV		 1275 goto cont_alloc;
1276 }
1277
1278 memset(tc, 0, EFT_SIZE);
e315cd28 1279 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 1280 if (rval) {
7c3df132
SK		 1281 ql_log(ql_log_warn, vha, 0x00c2,
1282 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 1283 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1284 tc_dma);
1285 goto cont_alloc;
1286 }
cfb0919c 1287 ql_dbg(ql_dbg_init, vha, 0x00c3,
7c3df132 1288 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11
AV		 1289
1290 eft_size = EFT_SIZE;
1291 ha->eft_dma = tc_dma;
1292 ha->eft = tc;
d4e3e04d 1293 }
a7a167bf 1294cont_alloc:
73208dfd
AC		 1295 req_q_size = req->length * sizeof(request_t);
1296 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf
AV		 1297
1298 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 1299 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 1300 ha->chain_offset = dump_size;
1301 dump_size += mq_size + fce_size;
d4e3e04d
AV		 1302
1303 ha->fw_dump = vmalloc(dump_size);
a7a167bf 1304 if (!ha->fw_dump) {
7c3df132
SK		 1305 ql_log(ql_log_warn, vha, 0x00c4,
1306 "Unable to allocate (%d KB) for firmware dump.\n",
1307 dump_size / 1024);
a7a167bf 1308
e30d1756
MI		 1309 if (ha->fce) {
1310 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1311 ha->fce_dma);
1312 ha->fce = NULL;
1313 ha->fce_dma = 0;
1314 }
1315
a7a167bf
AV		 1316 if (ha->eft) {
1317 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1318 ha->eft_dma);
1319 ha->eft = NULL;
1320 ha->eft_dma = 0;
1321 }
1322 return;
1323 }
cfb0919c 1324 ql_dbg(ql_dbg_init, vha, 0x00c5,
7c3df132 1325 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
a7a167bf
AV		 1326
1327 ha->fw_dump_len = dump_size;
1328 ha->fw_dump->signature[0] = 'Q';
1329 ha->fw_dump->signature[1] = 'L';
1330 ha->fw_dump->signature[2] = 'G';
1331 ha->fw_dump->signature[3] = 'C';
1332 ha->fw_dump->version = __constant_htonl(1);
1333
1334 ha->fw_dump->fixed_size = htonl(fixed_size);
1335 ha->fw_dump->mem_size = htonl(mem_size);
1336 ha->fw_dump->req_q_size = htonl(req_q_size);
1337 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1338
1339 ha->fw_dump->eft_size = htonl(eft_size);
1340 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1341 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1342
1343 ha->fw_dump->header_size =
1344 htonl(offsetof(struct qla2xxx_fw_dump, isp));
0107109e
AV		 1345}
1346
18e7555a
AV		 1347static int
1348qla81xx_mpi_sync(scsi_qla_host_t *vha)
1349{
1350#define MPS_MASK 0xe0
1351 int rval;
1352 uint16_t dc;
1353 uint32_t dw;
18e7555a
AV		 1354
1355 if (!IS_QLA81XX(vha->hw))
1356 return QLA_SUCCESS;
1357
1358 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1359 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1360 ql_log(ql_log_warn, vha, 0x0105,
1361 "Unable to acquire semaphore.\n");
18e7555a
AV		 1362 goto done;
1363 }
1364
1365 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1366 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1367 if (rval != QLA_SUCCESS) {
7c3df132 1368 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 1369 goto done_release;
1370 }
1371
1372 dc &= MPS_MASK;
1373 if (dc == (dw & MPS_MASK))
1374 goto done_release;
1375
1376 dw &= ~MPS_MASK;
1377 dw |= dc;
1378 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1379 if (rval != QLA_SUCCESS) {
7c3df132 1380 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 1381 }
1382
1383done_release:
1384 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1385 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1386 ql_log(ql_log_warn, vha, 0x006d,
1387 "Unable to release semaphore.\n");
18e7555a
AV		 1388 }
1389
1390done:
1391 return rval;
1392}
1393
1da177e4
LT		 1394/**
1395 * qla2x00_setup_chip() - Load and start RISC firmware.
1396 * @ha: HA context
1397 *
1398 * Returns 0 on success.
1399 */
1400static int
e315cd28 1401qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 1402{
0107109e
AV		 1403 int rval;
1404 uint32_t srisc_address = 0;
e315cd28 1405 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 1406 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1407 unsigned long flags;
dda772e8 1408 uint16_t fw_major_version;
3db0652e 1409
a9083016
GM		 1410 if (IS_QLA82XX(ha)) {
1411 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 1412 if (rval == QLA_SUCCESS) {
1413 qla2x00_stop_firmware(vha);
a9083016 1414 goto enable_82xx_npiv;
14e303d9 1415 } else
b963752f 1416 goto failed;
a9083016
GM		 1417 }
1418
3db0652e
AV		 1419 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1420 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1421 spin_lock_irqsave(&ha->hardware_lock, flags);
1422 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1423 RD_REG_WORD(&reg->hccr);
1424 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1425 }
1da177e4 1426
18e7555a
AV		 1427 qla81xx_mpi_sync(vha);
1428
1da177e4 1429 /* Load firmware sequences */
e315cd28 1430 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 1431 if (rval == QLA_SUCCESS) {
7c3df132
SK		 1432 ql_dbg(ql_dbg_init, vha, 0x00c9,
1433 "Verifying Checksum of loaded RISC code.\n");
1da177e4 1434
e315cd28 1435 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 1436 if (rval == QLA_SUCCESS) {
1437 /* Start firmware execution. */
7c3df132
SK		 1438 ql_dbg(ql_dbg_init, vha, 0x00ca,
1439 "Starting firmware.\n");
1da177e4 1440
e315cd28 1441 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 1442 /* Retrieve firmware information. */
dda772e8 1443 if (rval == QLA_SUCCESS) {
a9083016 1444enable_82xx_npiv:
dda772e8 1445 fw_major_version = ha->fw_major_version;
3173167f
GM		 1446 if (IS_QLA82XX(ha))
1447 qla82xx_check_md_needed(vha);
6246b8a1
GM		 1448 else
1449 rval = qla2x00_get_fw_version(vha);
ca9e9c3e
AV		 1450 if (rval != QLA_SUCCESS)
1451 goto failed;
2c3dfe3f 1452 ha->flags.npiv_supported = 0;
e315cd28 1453 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 1454 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 1455 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 1456 if ((!ha->max_npiv_vports) ||
1457 ((ha->max_npiv_vports + 1) %
eb66dc60 1458 MIN_MULTI_ID_FABRIC))
4d0ea247 1459 ha->max_npiv_vports =
eb66dc60 1460 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 1461 }
24a08138
AV		 1462 qla2x00_get_resource_cnts(vha, NULL,
1463 &ha->fw_xcb_count, NULL, NULL,
f3a0a77e 1464 &ha->max_npiv_vports, NULL);
d743de66 1465
be5ea3cf
SK		 1466 if (!fw_major_version && ql2xallocfwdump
1467 && !IS_QLA82XX(ha))
08de2844 1468 qla2x00_alloc_fw_dump(vha);
1da177e4
LT		 1469 }
1470 } else {
7c3df132
SK		 1471 ql_log(ql_log_fatal, vha, 0x00cd,
1472 "ISP Firmware failed checksum.\n");
1473 goto failed;
1da177e4
LT		 1474 }
1475 }
1476
3db0652e
AV		 1477 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1478 /* Enable proper parity. */
1479 spin_lock_irqsave(&ha->hardware_lock, flags);
1480 if (IS_QLA2300(ha))
1481 /* SRAM parity */
1482 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1483 else
1484 /* SRAM, Instruction RAM and GP RAM parity */
1485 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1486 RD_REG_WORD(&reg->hccr);
1487 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1488 }
1489
6246b8a1
GM		 1490 if (IS_QLA83XX(ha))
1491 goto skip_fac_check;
1492
1d2874de
JC		 1493 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1494 uint32_t size;
1495
1496 rval = qla81xx_fac_get_sector_size(vha, &size);
1497 if (rval == QLA_SUCCESS) {
1498 ha->flags.fac_supported = 1;
1499 ha->fdt_block_size = size << 2;
1500 } else {
7c3df132 1501 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 1502 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1503 ha->fw_major_version, ha->fw_minor_version,
1504 ha->fw_subminor_version);
6246b8a1
GM		 1505skip_fac_check:
1506 if (IS_QLA83XX(ha)) {
1507 ha->flags.fac_supported = 0;
1508 rval = QLA_SUCCESS;
1509 }
1d2874de
JC		 1510 }
1511 }
ca9e9c3e 1512failed:
1da177e4 1513 if (rval) {
7c3df132
SK		 1514 ql_log(ql_log_fatal, vha, 0x00cf,
1515 "Setup chip ****FAILED****.\n");
1da177e4
LT		 1516 }
1517
1518 return (rval);
1519}
1520
1521/**
1522 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1523 * @ha: HA context
1524 *
1525 * Beginning of request ring has initialization control block already built
1526 * by nvram config routine.
1527 *
1528 * Returns 0 on success.
1529 */
73208dfd
AC		 1530void
1531qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 1532{
1533 uint16_t cnt;
1534 response_t *pkt;
1535
2afa19a9
AC		 1536 rsp->ring_ptr = rsp->ring;
1537 rsp->ring_index = 0;
1538 rsp->status_srb = NULL;
e315cd28
AC		 1539 pkt = rsp->ring_ptr;
1540 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 1541 pkt->signature = RESPONSE_PROCESSED;
1542 pkt++;
1543 }
1da177e4
LT		 1544}
1545
1546/**
1547 * qla2x00_update_fw_options() - Read and process firmware options.
1548 * @ha: HA context
1549 *
1550 * Returns 0 on success.
1551 */
abbd8870 1552void
e315cd28 1553qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 1554{
1555 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 1556 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1557
1558 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 1559 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 1560
1561 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1562 return;
1563
1564 /* Serial Link options. */
7c3df132
SK		 1565 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1566 "Serial link options.\n");
1567 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1568 (uint8_t *)&ha->fw_seriallink_options,
1569 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 1570
1571 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1572 if (ha->fw_seriallink_options[3] & BIT_2) {
1573 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1574
1575 /* 1G settings */
1576 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1577 emphasis = (ha->fw_seriallink_options[2] &
1578 (BIT_4 | BIT_3)) >> 3;
1579 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 1580 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1581 rx_sens = (ha->fw_seriallink_options[0] &
1582 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1583 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1584 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1585 if (rx_sens == 0x0)
1586 rx_sens = 0x3;
1587 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1588 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1589 ha->fw_options[10] |= BIT_5 |
1590 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1591 (tx_sens & (BIT_1 | BIT_0));
1592
1593 /* 2G settings */
1594 swing = (ha->fw_seriallink_options[2] &
1595 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1596 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1597 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 1598 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1599 rx_sens = (ha->fw_seriallink_options[1] &
1600 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1601 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1602 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1603 if (rx_sens == 0x0)
1604 rx_sens = 0x3;
1605 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1606 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1607 ha->fw_options[11] |= BIT_5 |
1608 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1609 (tx_sens & (BIT_1 | BIT_0));
1610 }
1611
1612 /* FCP2 options. */
1613 /* Return command IOCBs without waiting for an ABTS to complete. */
1614 ha->fw_options[3] |= BIT_13;
1615
1616 /* LED scheme. */
1617 if (ha->flags.enable_led_scheme)
1618 ha->fw_options[2] |= BIT_12;
1619
48c02fde 1620 /* Detect ISP6312. */
1621 if (IS_QLA6312(ha))
1622 ha->fw_options[2] |= BIT_13;
1623
1da177e4 1624 /* Update firmware options. */
e315cd28 1625 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 1626}
1627
0107109e 1628void
e315cd28 1629qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 1630{
1631 int rval;
e315cd28 1632 struct qla_hw_data *ha = vha->hw;
0107109e 1633
a9083016
GM		 1634 if (IS_QLA82XX(ha))
1635 return;
1636
0107109e 1637 /* Update Serial Link options. */
f94097ed 1638 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 1639 return;
1640
e315cd28 1641 rval = qla2x00_set_serdes_params(vha,
f94097ed 1642 le16_to_cpu(ha->fw_seriallink_options24[1]),
1643 le16_to_cpu(ha->fw_seriallink_options24[2]),
1644 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 1645 if (rval != QLA_SUCCESS) {
7c3df132 1646 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 1647 "Unable to update Serial Link options (%x).\n", rval);
1648 }
1649}
1650
abbd8870 1651void
e315cd28 1652qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 1653{
e315cd28 1654 struct qla_hw_data *ha = vha->hw;
3d71644c 1655 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 1656 struct req_que *req = ha->req_q_map[0];
1657 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 1658
1659 /* Setup ring parameters in initialization control block. */
1660 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1661 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1662 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1663 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1664 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1665 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1666 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1667 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 1668
1669 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1670 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1671 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1672 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1673 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1674}
1675
0107109e 1676void
e315cd28 1677qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 1678{
e315cd28 1679 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1680 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1681 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1682 struct qla_msix_entry *msix;
0107109e 1683 struct init_cb_24xx *icb;
73208dfd
AC		 1684 uint16_t rid = 0;
1685 struct req_que *req = ha->req_q_map[0];
1686 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 1687
6246b8a1 1688 /* Setup ring parameters in initialization control block. */
0107109e
AV		 1689 icb = (struct init_cb_24xx *)ha->init_cb;
1690 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1691 icb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1692 icb->request_q_length = cpu_to_le16(req->length);
1693 icb->response_q_length = cpu_to_le16(rsp->length);
1694 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1695 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1696 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1697 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 1698
6246b8a1 1699 if (ha->mqenable || IS_QLA83XX(ha)) {
73208dfd
AC		 1700 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1701 icb->rid = __constant_cpu_to_le16(rid);
1702 if (ha->flags.msix_enabled) {
1703 msix = &ha->msix_entries[1];
7c3df132
SK		 1704 ql_dbg(ql_dbg_init, vha, 0x00fd,
1705 "Registering vector 0x%x for base que.\n",
1706 msix->entry);
73208dfd
AC		 1707 icb->msix = cpu_to_le16(msix->entry);
1708 }
1709 /* Use alternate PCI bus number */
1710 if (MSB(rid))
1711 icb->firmware_options_2 |=
1712 __constant_cpu_to_le32(BIT_19);
1713 /* Use alternate PCI devfn */
1714 if (LSB(rid))
1715 icb->firmware_options_2 |=
1716 __constant_cpu_to_le32(BIT_18);
1717
3155754a 1718 /* Use Disable MSIX Handshake mode for capable adapters */
6246b8a1
GM		 1719 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
1720 (ha->flags.msix_enabled)) {
3155754a
AC		 1721 icb->firmware_options_2 &=
1722 __constant_cpu_to_le32(~BIT_22);
1723 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 1724 ql_dbg(ql_dbg_init, vha, 0x00fe,
1725 "MSIX Handshake Disable Mode turned on.\n");
3155754a
AC		 1726 } else {
1727 icb->firmware_options_2 |=
1728 __constant_cpu_to_le32(BIT_22);
1729 }
73208dfd 1730 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
73208dfd
AC		 1731
1732 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1733 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1734 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1735 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1736 } else {
1737 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1738 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1739 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1740 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1741 }
1742 /* PCI posting */
1743 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 1744}
1745
1da177e4
LT		 1746/**
1747 * qla2x00_init_rings() - Initializes firmware.
1748 * @ha: HA context
1749 *
1750 * Beginning of request ring has initialization control block already built
1751 * by nvram config routine.
1752 *
1753 * Returns 0 on success.
1754 */
1755static int
e315cd28 1756qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 1757{
1758 int rval;
1759 unsigned long flags = 0;
29bdccbe 1760 int cnt, que;
e315cd28 1761 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 1762 struct req_que *req;
1763 struct rsp_que *rsp;
2c3dfe3f
SJ		 1764 struct mid_init_cb_24xx *mid_init_cb =
1765 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 1766
1767 spin_lock_irqsave(&ha->hardware_lock, flags);
1768
1769 /* Clear outstanding commands array. */
2afa19a9 1770 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe
AC		 1771 req = ha->req_q_map[que];
1772 if (!req)
1773 continue;
2afa19a9 1774 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
29bdccbe 1775 req->outstanding_cmds[cnt] = NULL;
1da177e4 1776
2afa19a9 1777 req->current_outstanding_cmd = 1;
1da177e4 1778
29bdccbe
AC		 1779 /* Initialize firmware. */
1780 req->ring_ptr = req->ring;
1781 req->ring_index = 0;
1782 req->cnt = req->length;
1783 }
1da177e4 1784
2afa19a9 1785 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe
AC		 1786 rsp = ha->rsp_q_map[que];
1787 if (!rsp)
1788 continue;
29bdccbe
AC		 1789 /* Initialize response queue entries */
1790 qla2x00_init_response_q_entries(rsp);
1791 }
1da177e4 1792
542bce1f 1793 spin_lock(&ha->vport_slock);
feafb7b1 1794
542bce1f 1795 spin_unlock(&ha->vport_slock);
feafb7b1 1796
e315cd28 1797 ha->isp_ops->config_rings(vha);
1da177e4
LT		 1798
1799 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1800
1801 /* Update any ISP specific firmware options before initialization. */
e315cd28 1802 ha->isp_ops->update_fw_options(vha);
1da177e4 1803
7c3df132 1804 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2c3dfe3f 1805
605aa2bc
LC		 1806 if (ha->flags.npiv_supported) {
1807 if (ha->operating_mode == LOOP)
1808 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 1809 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 1810 }
1811
24a08138
AV		 1812 if (IS_FWI2_CAPABLE(ha)) {
1813 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
1814 mid_init_cb->init_cb.execution_throttle =
1815 cpu_to_le16(ha->fw_xcb_count);
1816 }
2c3dfe3f 1817
e315cd28 1818 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
1da177e4 1819 if (rval) {
7c3df132
SK		 1820 ql_log(ql_log_fatal, vha, 0x00d2,
1821 "Init Firmware **** FAILED ****.\n");
1da177e4 1822 } else {
7c3df132
SK		 1823 ql_dbg(ql_dbg_init, vha, 0x00d3,
1824 "Init Firmware -- success.\n");
1da177e4
LT		 1825 }
1826
1827 return (rval);
1828}
1829
1830/**
1831 * qla2x00_fw_ready() - Waits for firmware ready.
1832 * @ha: HA context
1833 *
1834 * Returns 0 on success.
1835 */
1836static int
e315cd28 1837qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 1838{
1839 int rval;
4d4df193 1840 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 1841 uint16_t min_wait; /* Minimum wait time if loop is down */
1842 uint16_t wait_time; /* Wait time if loop is coming ready */
656e8912 1843 uint16_t state[5];
e315cd28 1844 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1845
1846 rval = QLA_SUCCESS;
1847
1848 /* 20 seconds for loop down. */
fa2a1ce5 1849 min_wait = 20;
1da177e4
LT		 1850
1851 /*
1852 * Firmware should take at most one RATOV to login, plus 5 seconds for
1853 * our own processing.
1854 */
1855 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
1856 wait_time = min_wait;
1857 }
1858
1859 /* Min wait time if loop down */
1860 mtime = jiffies + (min_wait * HZ);
1861
1862 /* wait time before firmware ready */
1863 wtime = jiffies + (wait_time * HZ);
1864
1865 /* Wait for ISP to finish LIP */
e315cd28 1866 if (!vha->flags.init_done)
7c3df132
SK		 1867 ql_log(ql_log_info, vha, 0x801e,
1868 "Waiting for LIP to complete.\n");
1da177e4
LT		 1869
1870 do {
e315cd28 1871 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 1872 if (rval == QLA_SUCCESS) {
4d4df193 1873 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 1874 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 1875 }
4d4df193 1876 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 1877 ql_dbg(ql_dbg_taskm, vha, 0x801f,
1878 "fw_state=%x 84xx=%x.\n", state[0],
1879 state[2]);
4d4df193
HK		 1880 if ((state[2] & FSTATE_LOGGED_IN) &&
1881 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 1882 ql_dbg(ql_dbg_taskm, vha, 0x8028,
1883 "Sending verify iocb.\n");
4d4df193
HK		 1884
1885 cs84xx_time = jiffies;
e315cd28 1886 rval = qla84xx_init_chip(vha);
7c3df132
SK		 1887 if (rval != QLA_SUCCESS) {
1888 ql_log(ql_log_warn,
cfb0919c 1889 vha, 0x8007,
7c3df132 1890 "Init chip failed.\n");
4d4df193 1891 break;
7c3df132 1892 }
4d4df193
HK		 1893
1894 /* Add time taken to initialize. */
1895 cs84xx_time = jiffies - cs84xx_time;
1896 wtime += cs84xx_time;
1897 mtime += cs84xx_time;
cfb0919c 1898 ql_dbg(ql_dbg_taskm, vha, 0x8008,
7c3df132
SK		 1899 "Increasing wait time by %ld. "
1900 "New time %ld.\n", cs84xx_time,
1901 wtime);
4d4df193
HK		 1902 }
1903 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 1904 ql_dbg(ql_dbg_taskm, vha, 0x8037,
1905 "F/W Ready - OK.\n");
1da177e4 1906
e315cd28 1907 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 1908 &ha->login_timeout, &ha->r_a_tov);
1909
1910 rval = QLA_SUCCESS;
1911 break;
1912 }
1913
1914 rval = QLA_FUNCTION_FAILED;
1915
e315cd28 1916 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 1917 state[0] != FSTATE_READY) {
1da177e4 1918 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 1919 * other than Wait for Login.
1920 */
1da177e4 1921 if (time_after_eq(jiffies, mtime)) {
7c3df132 1922 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 1923 "Cable is unplugged...\n");
1924
e315cd28 1925 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 1926 break;
1927 }
1928 }
1929 } else {
1930 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 1931 if (time_after_eq(jiffies, mtime) ||
7190575f 1932 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 1933 break;
1934 }
1935
1936 if (time_after_eq(jiffies, wtime))
1937 break;
1938
1939 /* Delay for a while */
1940 msleep(500);
1da177e4
LT		 1941 } while (1);
1942
7c3df132
SK		 1943 ql_dbg(ql_dbg_taskm, vha, 0x803a,
1944 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
1945 state[1], state[2], state[3], state[4], jiffies);
1da177e4 1946
cfb0919c 1947 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
7c3df132
SK		 1948 ql_log(ql_log_warn, vha, 0x803b,
1949 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 1950 }
1951
1952 return (rval);
1953}
1954
1955/*
1956* qla2x00_configure_hba
1957* Setup adapter context.
1958*
1959* Input:
1960* ha = adapter state pointer.
1961*
1962* Returns:
1963* 0 = success
1964*
1965* Context:
1966* Kernel context.
1967*/
1968static int
e315cd28 1969qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 1970{
1971 int rval;
1972 uint16_t loop_id;
1973 uint16_t topo;
2c3dfe3f 1974 uint16_t sw_cap;
1da177e4
LT		 1975 uint8_t al_pa;
1976 uint8_t area;
1977 uint8_t domain;
1978 char connect_type[22];
e315cd28 1979 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1980
1981 /* Get host addresses. */
e315cd28 1982 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 1983 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 1984 if (rval != QLA_SUCCESS) {
e315cd28 1985 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
6246b8a1 1986 IS_CNA_CAPABLE(ha) ||
33135aa2 1987 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 1988 ql_dbg(ql_dbg_disc, vha, 0x2008,
1989 "Loop is in a transition state.\n");
33135aa2 1990 } else {
7c3df132
SK		 1991 ql_log(ql_log_warn, vha, 0x2009,
1992 "Unable to get host loop ID.\n");
e315cd28 1993 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 1994 }
1da177e4
LT		 1995 return (rval);
1996 }
1997
1998 if (topo == 4) {
7c3df132
SK		 1999 ql_log(ql_log_info, vha, 0x200a,
2000 "Cannot get topology - retrying.\n");
1da177e4
LT		 2001 return (QLA_FUNCTION_FAILED);
2002 }
2003
e315cd28 2004 vha->loop_id = loop_id;
1da177e4
LT		 2005
2006 /* initialize */
2007 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2008 ha->operating_mode = LOOP;
2c3dfe3f 2009 ha->switch_cap = 0;
1da177e4
LT		 2010
2011 switch (topo) {
2012 case 0:
7c3df132 2013 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 2014 ha->current_topology = ISP_CFG_NL;
2015 strcpy(connect_type, "(Loop)");
2016 break;
2017
2018 case 1:
7c3df132 2019 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 2020 ha->switch_cap = sw_cap;
1da177e4
LT		 2021 ha->current_topology = ISP_CFG_FL;
2022 strcpy(connect_type, "(FL_Port)");
2023 break;
2024
2025 case 2:
7c3df132 2026 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 2027 ha->operating_mode = P2P;
2028 ha->current_topology = ISP_CFG_N;
2029 strcpy(connect_type, "(N_Port-to-N_Port)");
2030 break;
2031
2032 case 3:
7c3df132 2033 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 2034 ha->switch_cap = sw_cap;
1da177e4
LT		 2035 ha->operating_mode = P2P;
2036 ha->current_topology = ISP_CFG_F;
2037 strcpy(connect_type, "(F_Port)");
2038 break;
2039
2040 default:
7c3df132
SK		 2041 ql_dbg(ql_dbg_disc, vha, 0x200f,
2042 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 2043 ha->current_topology = ISP_CFG_NL;
2044 strcpy(connect_type, "(Loop)");
2045 break;
2046 }
2047
2048 /* Save Host port and loop ID. */
2049 /* byte order - Big Endian */
e315cd28
AC		 2050 vha->d_id.b.domain = domain;
2051 vha->d_id.b.area = area;
2052 vha->d_id.b.al_pa = al_pa;
1da177e4 2053
e315cd28 2054 if (!vha->flags.init_done)
7c3df132
SK		 2055 ql_log(ql_log_info, vha, 0x2010,
2056 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 2057 connect_type, vha->loop_id);
1da177e4
LT		 2058
2059 if (rval) {
7c3df132
SK		 2060 ql_log(ql_log_warn, vha, 0x2011,
2061 "%s FAILED\n", __func__);
1da177e4 2062 } else {
7c3df132
SK		 2063 ql_dbg(ql_dbg_disc, vha, 0x2012,
2064 "%s success\n", __func__);
1da177e4
LT		 2065 }
2066
2067 return(rval);
2068}
2069
a9083016 2070inline void
e315cd28
AC		 2071qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2072 char *def)
9bb9fcf2
AV		 2073{
2074 char *st, *en;
2075 uint16_t index;
e315cd28 2076 struct qla_hw_data *ha = vha->hw;
ab671149 2077 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
6246b8a1 2078 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
9bb9fcf2
AV		 2079
2080 if (memcmp(model, BINZERO, len) != 0) {
2081 strncpy(ha->model_number, model, len);
2082 st = en = ha->model_number;
2083 en += len - 1;
2084 while (en > st) {
2085 if (*en != 0x20 && *en != 0x00)
2086 break;
2087 *en-- = '\0';
2088 }
2089
2090 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2091 if (use_tbl &&
2092 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 2093 index < QLA_MODEL_NAMES)
1ee27146
JC		 2094 strncpy(ha->model_desc,
2095 qla2x00_model_name[index * 2 + 1],
2096 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2097 } else {
2098 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2099 if (use_tbl &&
2100 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 2101 index < QLA_MODEL_NAMES) {
2102 strcpy(ha->model_number,
2103 qla2x00_model_name[index * 2]);
1ee27146
JC		 2104 strncpy(ha->model_desc,
2105 qla2x00_model_name[index * 2 + 1],
2106 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2107 } else {
2108 strcpy(ha->model_number, def);
2109 }
2110 }
1ee27146 2111 if (IS_FWI2_CAPABLE(ha))
e315cd28 2112 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 2113 sizeof(ha->model_desc));
9bb9fcf2
AV		 2114}
2115
4e08df3f
DM		 2116/* On sparc systems, obtain port and node WWN from firmware
2117 * properties.
2118 */
e315cd28 2119static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 2120{
2121#ifdef CONFIG_SPARC
e315cd28 2122 struct qla_hw_data *ha = vha->hw;
4e08df3f 2123 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 2124 struct device_node *dp = pci_device_to_OF_node(pdev);
2125 const u8 *val;
4e08df3f
DM		 2126 int len;
2127
2128 val = of_get_property(dp, "port-wwn", &len);
2129 if (val && len >= WWN_SIZE)
2130 memcpy(nv->port_name, val, WWN_SIZE);
2131
2132 val = of_get_property(dp, "node-wwn", &len);
2133 if (val && len >= WWN_SIZE)
2134 memcpy(nv->node_name, val, WWN_SIZE);
2135#endif
2136}
2137
1da177e4
LT		 2138/*
2139* NVRAM configuration for ISP 2xxx
2140*
2141* Input:
2142* ha = adapter block pointer.
2143*
2144* Output:
2145* initialization control block in response_ring
2146* host adapters parameters in host adapter block
2147*
2148* Returns:
2149* 0 = success.
2150*/
abbd8870 2151int
e315cd28 2152qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 2153{
4e08df3f 2154 int rval;
0107109e
AV		 2155 uint8_t chksum = 0;
2156 uint16_t cnt;
2157 uint8_t *dptr1, *dptr2;
e315cd28 2158 struct qla_hw_data *ha = vha->hw;
0107109e 2159 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 2160 nvram_t *nv = ha->nvram;
2161 uint8_t *ptr = ha->nvram;
3d71644c 2162 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2163
4e08df3f
DM		 2164 rval = QLA_SUCCESS;
2165
1da177e4 2166 /* Determine NVRAM starting address. */
0107109e 2167 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 2168 ha->nvram_base = 0;
2169 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2170 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2171 ha->nvram_base = 0x80;
2172
2173 /* Get NVRAM data and calculate checksum. */
e315cd28 2174 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 2175 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2176 chksum += *ptr++;
1da177e4 2177
7c3df132
SK		 2178 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2179 "Contents of NVRAM.\n");
2180 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2181 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 2182
2183 /* Bad NVRAM data, set defaults parameters. */
2184 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2185 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2186 /* Reset NVRAM data. */
7c3df132 2187 ql_log(ql_log_warn, vha, 0x0064,
9e336520 2188 "Inconsistent NVRAM "
7c3df132
SK		 2189 "detected: checksum=0x%x id=%c version=0x%x.\n",
2190 chksum, nv->id[0], nv->nvram_version);
2191 ql_log(ql_log_warn, vha, 0x0065,
2192 "Falling back to "
2193 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 2194
2195 /*
2196 * Set default initialization control block.
2197 */
2198 memset(nv, 0, ha->nvram_size);
2199 nv->parameter_block_version = ICB_VERSION;
2200
2201 if (IS_QLA23XX(ha)) {
2202 nv->firmware_options[0] = BIT_2 | BIT_1;
2203 nv->firmware_options[1] = BIT_7 | BIT_5;
2204 nv->add_firmware_options[0] = BIT_5;
2205 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2206 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2207 nv->special_options[1] = BIT_7;
2208 } else if (IS_QLA2200(ha)) {
2209 nv->firmware_options[0] = BIT_2 | BIT_1;
2210 nv->firmware_options[1] = BIT_7 | BIT_5;
2211 nv->add_firmware_options[0] = BIT_5;
2212 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2213 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2214 } else if (IS_QLA2100(ha)) {
2215 nv->firmware_options[0] = BIT_3 | BIT_1;
2216 nv->firmware_options[1] = BIT_5;
2217 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2218 }
2219
2220 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2221 nv->execution_throttle = __constant_cpu_to_le16(16);
2222 nv->retry_count = 8;
2223 nv->retry_delay = 1;
2224
2225 nv->port_name[0] = 33;
2226 nv->port_name[3] = 224;
2227 nv->port_name[4] = 139;
2228
e315cd28 2229 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 2230
2231 nv->login_timeout = 4;
2232
2233 /*
2234 * Set default host adapter parameters
2235 */
2236 nv->host_p[1] = BIT_2;
2237 nv->reset_delay = 5;
2238 nv->port_down_retry_count = 8;
2239 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2240 nv->link_down_timeout = 60;
2241
2242 rval = 1;
1da177e4
LT		 2243 }
2244
2245#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2246 /*
2247 * The SN2 does not provide BIOS emulation which means you can't change
2248 * potentially bogus BIOS settings. Force the use of default settings
2249 * for link rate and frame size. Hope that the rest of the settings
2250 * are valid.
2251 */
2252 if (ia64_platform_is("sn2")) {
2253 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2254 if (IS_QLA23XX(ha))
2255 nv->special_options[1] = BIT_7;
2256 }
2257#endif
2258
2259 /* Reset Initialization control block */
0107109e 2260 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 2261
2262 /*
2263 * Setup driver NVRAM options.
2264 */
2265 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2266 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2267 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2268 nv->firmware_options[1] &= ~BIT_4;
2269
2270 if (IS_QLA23XX(ha)) {
2271 nv->firmware_options[0] |= BIT_2;
2272 nv->firmware_options[0] &= ~BIT_3;
5ff1d584 2273 nv->firmware_options[0] &= ~BIT_6;
0107109e 2274 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 2275
2276 if (IS_QLA2300(ha)) {
2277 if (ha->fb_rev == FPM_2310) {
2278 strcpy(ha->model_number, "QLA2310");
2279 } else {
2280 strcpy(ha->model_number, "QLA2300");
2281 }
2282 } else {
e315cd28 2283 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 2284 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 2285 }
2286 } else if (IS_QLA2200(ha)) {
2287 nv->firmware_options[0] |= BIT_2;
2288 /*
2289 * 'Point-to-point preferred, else loop' is not a safe
2290 * connection mode setting.
2291 */
2292 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2293 (BIT_5 | BIT_4)) {
2294 /* Force 'loop preferred, else point-to-point'. */
2295 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2296 nv->add_firmware_options[0] |= BIT_5;
2297 }
2298 strcpy(ha->model_number, "QLA22xx");
2299 } else /*if (IS_QLA2100(ha))*/ {
2300 strcpy(ha->model_number, "QLA2100");
2301 }
2302
2303 /*
2304 * Copy over NVRAM RISC parameter block to initialization control block.
2305 */
2306 dptr1 = (uint8_t *)icb;
2307 dptr2 = (uint8_t *)&nv->parameter_block_version;
2308 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2309 while (cnt--)
2310 *dptr1++ = *dptr2++;
2311
2312 /* Copy 2nd half. */
2313 dptr1 = (uint8_t *)icb->add_firmware_options;
2314 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2315 while (cnt--)
2316 *dptr1++ = *dptr2++;
2317
5341e868
AV		 2318 /* Use alternate WWN? */
2319 if (nv->host_p[1] & BIT_7) {
2320 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2321 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2322 }
2323
1da177e4
LT		 2324 /* Prepare nodename */
2325 if ((icb->firmware_options[1] & BIT_6) == 0) {
2326 /*
2327 * Firmware will apply the following mask if the nodename was
2328 * not provided.
2329 */
2330 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2331 icb->node_name[0] &= 0xF0;
2332 }
2333
2334 /*
2335 * Set host adapter parameters.
2336 */
3ce8866c
SK		 2337
2338 /*
2339 * BIT_7 in the host-parameters section allows for modification to
2340 * internal driver logging.
2341 */
0181944f 2342 if (nv->host_p[0] & BIT_7)
cfb0919c 2343 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
1da177e4
LT		 2344 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2345 /* Always load RISC code on non ISP2[12]00 chips. */
2346 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2347 ha->flags.disable_risc_code_load = 0;
2348 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2349 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2350 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 2351 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 2352 ha->flags.disable_serdes = 0;
1da177e4
LT		 2353
2354 ha->operating_mode =
2355 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2356
2357 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2358 sizeof(ha->fw_seriallink_options));
2359
2360 /* save HBA serial number */
2361 ha->serial0 = icb->port_name[5];
2362 ha->serial1 = icb->port_name[6];
2363 ha->serial2 = icb->port_name[7];
e315cd28
AC		 2364 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2365 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4
LT		 2366
2367 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2368
2369 ha->retry_count = nv->retry_count;
2370
2371 /* Set minimum login_timeout to 4 seconds. */
5b91490e 2372 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 2373 nv->login_timeout = ql2xlogintimeout;
2374 if (nv->login_timeout < 4)
2375 nv->login_timeout = 4;
2376 ha->login_timeout = nv->login_timeout;
2377 icb->login_timeout = nv->login_timeout;
2378
00a537b8
AV		 2379 /* Set minimum RATOV to 100 tenths of a second. */
2380 ha->r_a_tov = 100;
1da177e4 2381
1da177e4
LT		 2382 ha->loop_reset_delay = nv->reset_delay;
2383
1da177e4
LT		 2384 /* Link Down Timeout = 0:
2385 *
2386 * When Port Down timer expires we will start returning
2387 * I/O's to OS with "DID_NO_CONNECT".
2388 *
2389 * Link Down Timeout != 0:
2390 *
2391 * The driver waits for the link to come up after link down
2392 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 2393 */
1da177e4
LT		 2394 if (nv->link_down_timeout == 0) {
2395 ha->loop_down_abort_time =
354d6b21 2396 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 2397 } else {
2398 ha->link_down_timeout = nv->link_down_timeout;
2399 ha->loop_down_abort_time =
2400 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 2401 }
1da177e4 2402
1da177e4
LT		 2403 /*
2404 * Need enough time to try and get the port back.
2405 */
2406 ha->port_down_retry_count = nv->port_down_retry_count;
2407 if (qlport_down_retry)
2408 ha->port_down_retry_count = qlport_down_retry;
2409 /* Set login_retry_count */
2410 ha->login_retry_count = nv->retry_count;
2411 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2412 ha->port_down_retry_count > 3)
2413 ha->login_retry_count = ha->port_down_retry_count;
2414 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2415 ha->login_retry_count = ha->port_down_retry_count;
2416 if (ql2xloginretrycount)
2417 ha->login_retry_count = ql2xloginretrycount;
2418
1da177e4
LT		 2419 icb->lun_enables = __constant_cpu_to_le16(0);
2420 icb->command_resource_count = 0;
2421 icb->immediate_notify_resource_count = 0;
2422 icb->timeout = __constant_cpu_to_le16(0);
2423
2424 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2425 /* Enable RIO */
2426 icb->firmware_options[0] &= ~BIT_3;
2427 icb->add_firmware_options[0] &=
2428 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2429 icb->add_firmware_options[0] |= BIT_2;
2430 icb->response_accumulation_timer = 3;
2431 icb->interrupt_delay_timer = 5;
2432
e315cd28 2433 vha->flags.process_response_queue = 1;
1da177e4 2434 } else {
4fdfefe5 2435 /* Enable ZIO. */
e315cd28 2436 if (!vha->flags.init_done) {
4fdfefe5
AV		 2437 ha->zio_mode = icb->add_firmware_options[0] &
2438 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2439 ha->zio_timer = icb->interrupt_delay_timer ?
2440 icb->interrupt_delay_timer: 2;
2441 }
1da177e4
LT		 2442 icb->add_firmware_options[0] &=
2443 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 2444 vha->flags.process_response_queue = 0;
4fdfefe5 2445 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 2446 ha->zio_mode = QLA_ZIO_MODE_6;
2447
7c3df132 2448 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 2449 "ZIO mode %d enabled; timer delay (%d us).\n",
2450 ha->zio_mode, ha->zio_timer * 100);
1da177e4 2451
4fdfefe5
AV		 2452 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2453 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 2454 vha->flags.process_response_queue = 1;
1da177e4
LT		 2455 }
2456 }
2457
4e08df3f 2458 if (rval) {
7c3df132
SK		 2459 ql_log(ql_log_warn, vha, 0x0069,
2460 "NVRAM configuration failed.\n");
4e08df3f
DM		 2461 }
2462 return (rval);
1da177e4
LT		 2463}
2464
19a7b4ae
JSEC		 2465static void
2466qla2x00_rport_del(void *data)
2467{
2468 fc_port_t *fcport = data;
d97994dc 2469 struct fc_rport *rport;
044d78e1 2470 unsigned long flags;
d97994dc 2471
044d78e1 2472 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 2473 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 2474 fcport->drport = NULL;
044d78e1 2475 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 2476 if (rport)
2477 fc_remote_port_delete(rport);
19a7b4ae
JSEC		 2478}
2479
1da177e4
LT		 2480/**
2481 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2482 * @ha: HA context
2483 * @flags: allocation flags
2484 *
2485 * Returns a pointer to the allocated fcport, or NULL, if none available.
2486 */
9a069e19 2487fc_port_t *
e315cd28 2488qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 2489{
2490 fc_port_t *fcport;
2491
bbfbbbc1
MK		 2492 fcport = kzalloc(sizeof(fc_port_t), flags);
2493 if (!fcport)
2494 return NULL;
1da177e4
LT		 2495
2496 /* Setup fcport template structure. */
e315cd28 2497 fcport->vha = vha;
1da177e4
LT		 2498 fcport->port_type = FCT_UNKNOWN;
2499 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 2500 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 2501 fcport->supported_classes = FC_COS_UNSPECIFIED;
c0822b63 2502 fcport->scan_state = QLA_FCPORT_SCAN_NONE;
1da177e4 2503
bbfbbbc1 2504 return fcport;
1da177e4
LT		 2505}
2506
2507/*
2508 * qla2x00_configure_loop
2509 * Updates Fibre Channel Device Database with what is actually on loop.
2510 *
2511 * Input:
2512 * ha = adapter block pointer.
2513 *
2514 * Returns:
2515 * 0 = success.
2516 * 1 = error.
2517 * 2 = database was full and device was not configured.
2518 */
2519static int
e315cd28 2520qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2521{
2522 int rval;
2523 unsigned long flags, save_flags;
e315cd28 2524 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2525 rval = QLA_SUCCESS;
2526
2527 /* Get Initiator ID */
e315cd28
AC		 2528 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2529 rval = qla2x00_configure_hba(vha);
1da177e4 2530 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2531 ql_dbg(ql_dbg_disc, vha, 0x2013,
2532 "Unable to configure HBA.\n");
1da177e4
LT		 2533 return (rval);
2534 }
2535 }
2536
e315cd28 2537 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 2538 ql_dbg(ql_dbg_disc, vha, 0x2014,
2539 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 2540
2541 /*
2542 * If we have both an RSCN and PORT UPDATE pending then handle them
2543 * both at the same time.
2544 */
e315cd28
AC		 2545 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2546 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 2547
3064ff39
MH		 2548 qla2x00_get_data_rate(vha);
2549
1da177e4
LT		 2550 /* Determine what we need to do */
2551 if (ha->current_topology == ISP_CFG_FL &&
2552 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2553
1da177e4
LT		 2554 set_bit(RSCN_UPDATE, &flags);
2555
2556 } else if (ha->current_topology == ISP_CFG_F &&
2557 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2558
1da177e4
LT		 2559 set_bit(RSCN_UPDATE, &flags);
2560 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 2561
2562 } else if (ha->current_topology == ISP_CFG_N) {
2563 clear_bit(RSCN_UPDATE, &flags);
1da177e4 2564
e315cd28 2565 } else if (!vha->flags.online ||
1da177e4
LT		 2566 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2567
1da177e4
LT		 2568 set_bit(RSCN_UPDATE, &flags);
2569 set_bit(LOCAL_LOOP_UPDATE, &flags);
2570 }
2571
2572 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 2573 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2574 ql_dbg(ql_dbg_disc, vha, 0x2015,
2575 "Loop resync needed, failing.\n");
1da177e4 2576 rval = QLA_FUNCTION_FAILED;
642ef983 2577 } else
e315cd28 2578 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 2579 }
2580
2581 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132
SK		 2582 if (LOOP_TRANSITION(vha)) {
2583 ql_dbg(ql_dbg_disc, vha, 0x201e,
2584 "Needs RSCN update and loop transition.\n");
1da177e4 2585 rval = QLA_FUNCTION_FAILED;
7c3df132 2586 }
e315cd28
AC		 2587 else
2588 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 2589 }
2590
2591 if (rval == QLA_SUCCESS) {
e315cd28
AC		 2592 if (atomic_read(&vha->loop_down_timer) ||
2593 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 2594 rval = QLA_FUNCTION_FAILED;
2595 } else {
e315cd28 2596 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 2597 ql_dbg(ql_dbg_disc, vha, 0x2069,
2598 "LOOP READY.\n");
1da177e4
LT		 2599 }
2600 }
2601
2602 if (rval) {
7c3df132
SK		 2603 ql_dbg(ql_dbg_disc, vha, 0x206a,
2604 "%s *** FAILED ***.\n", __func__);
1da177e4 2605 } else {
7c3df132
SK		 2606 ql_dbg(ql_dbg_disc, vha, 0x206b,
2607 "%s: exiting normally.\n", __func__);
1da177e4
LT		 2608 }
2609
cc3ef7bc 2610 /* Restore state if a resync event occurred during processing */
e315cd28 2611 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 2612 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 2613 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 2614 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 2615 set_bit(RSCN_UPDATE, &vha->dpc_flags);
f4658b6c 2616 }
1da177e4
LT		 2617 }
2618
2619 return (rval);
2620}
2621
2622
2623
2624/*
2625 * qla2x00_configure_local_loop
2626 * Updates Fibre Channel Device Database with local loop devices.
2627 *
2628 * Input:
2629 * ha = adapter block pointer.
2630 *
2631 * Returns:
2632 * 0 = success.
2633 */
2634static int
e315cd28 2635qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2636{
2637 int rval, rval2;
2638 int found_devs;
2639 int found;
2640 fc_port_t *fcport, *new_fcport;
2641
2642 uint16_t index;
2643 uint16_t entries;
2644 char *id_iter;
2645 uint16_t loop_id;
2646 uint8_t domain, area, al_pa;
e315cd28 2647 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2648
2649 found_devs = 0;
2650 new_fcport = NULL;
642ef983 2651 entries = MAX_FIBRE_DEVICES_LOOP;
1da177e4 2652
7c3df132
SK		 2653 ql_dbg(ql_dbg_disc, vha, 0x2016,
2654 "Getting FCAL position map.\n");
2655 if (ql2xextended_error_logging & ql_dbg_disc)
2656 qla2x00_get_fcal_position_map(vha, NULL);
1da177e4
LT		 2657
2658 /* Get list of logged in devices. */
642ef983 2659 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
e315cd28 2660 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 2661 &entries);
2662 if (rval != QLA_SUCCESS)
2663 goto cleanup_allocation;
2664
7c3df132
SK		 2665 ql_dbg(ql_dbg_disc, vha, 0x2017,
2666 "Entries in ID list (%d).\n", entries);
2667 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2668 (uint8_t *)ha->gid_list,
2669 entries * sizeof(struct gid_list_info));
1da177e4
LT		 2670
2671 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 2672 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2673 if (new_fcport == NULL) {
7c3df132
SK		 2674 ql_log(ql_log_warn, vha, 0x2018,
2675 "Memory allocation failed for fcport.\n");
1da177e4
LT		 2676 rval = QLA_MEMORY_ALLOC_FAILED;
2677 goto cleanup_allocation;
2678 }
2679 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2680
2681 /*
2682 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2683 */
e315cd28 2684 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2685 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2686 fcport->port_type != FCT_BROADCAST &&
2687 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2688
7c3df132
SK		 2689 ql_dbg(ql_dbg_disc, vha, 0x2019,
2690 "Marking port lost loop_id=0x%04x.\n",
2691 fcport->loop_id);
1da177e4 2692
ec426e10 2693 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1da177e4
LT		 2694 }
2695 }
2696
2697 /* Add devices to port list. */
2698 id_iter = (char *)ha->gid_list;
2699 for (index = 0; index < entries; index++) {
2700 domain = ((struct gid_list_info *)id_iter)->domain;
2701 area = ((struct gid_list_info *)id_iter)->area;
2702 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 2703 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 2704 loop_id = (uint16_t)
2705 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 2706 else
1da177e4
LT		 2707 loop_id = le16_to_cpu(
2708 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 2709 id_iter += ha->gid_list_info_size;
1da177e4
LT		 2710
2711 /* Bypass reserved domain fields. */
2712 if ((domain & 0xf0) == 0xf0)
2713 continue;
2714
2715 /* Bypass if not same domain and area of adapter. */
f7d289f6 2716 if (area && domain &&
e315cd28 2717 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
1da177e4
LT		 2718 continue;
2719
2720 /* Bypass invalid local loop ID. */
2721 if (loop_id > LAST_LOCAL_LOOP_ID)
2722 continue;
2723
2724 /* Fill in member data. */
2725 new_fcport->d_id.b.domain = domain;
2726 new_fcport->d_id.b.area = area;
2727 new_fcport->d_id.b.al_pa = al_pa;
2728 new_fcport->loop_id = loop_id;
e315cd28 2729 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 2730 if (rval2 != QLA_SUCCESS) {
7c3df132
SK		 2731 ql_dbg(ql_dbg_disc, vha, 0x201a,
2732 "Failed to retrieve fcport information "
2733 "-- get_port_database=%x, loop_id=0x%04x.\n",
2734 rval2, new_fcport->loop_id);
2735 ql_dbg(ql_dbg_disc, vha, 0x201b,
2736 "Scheduling resync.\n");
e315cd28 2737 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2738 continue;
2739 }
2740
2741 /* Check for matching device in port list. */
2742 found = 0;
2743 fcport = NULL;
e315cd28 2744 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2745 if (memcmp(new_fcport->port_name, fcport->port_name,
2746 WWN_SIZE))
2747 continue;
2748
ddb9b126 2749 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 2750 fcport->loop_id = new_fcport->loop_id;
2751 fcport->port_type = new_fcport->port_type;
2752 fcport->d_id.b24 = new_fcport->d_id.b24;
2753 memcpy(fcport->node_name, new_fcport->node_name,
2754 WWN_SIZE);
2755
2756 found++;
2757 break;
2758 }
2759
2760 if (!found) {
2761 /* New device, add to fcports list. */
e315cd28 2762 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 2763
2764 /* Allocate a new replacement fcport. */
2765 fcport = new_fcport;
e315cd28 2766 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2767 if (new_fcport == NULL) {
7c3df132
SK		 2768 ql_log(ql_log_warn, vha, 0x201c,
2769 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 2770 rval = QLA_MEMORY_ALLOC_FAILED;
2771 goto cleanup_allocation;
2772 }
2773 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2774 }
2775
d8b45213 2776 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 2777 fcport->fp_speed = ha->link_data_rate;
d8b45213 2778
e315cd28 2779 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 2780
2781 found_devs++;
2782 }
2783
2784cleanup_allocation:
c9475cb0 2785 kfree(new_fcport);
1da177e4
LT		 2786
2787 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2788 ql_dbg(ql_dbg_disc, vha, 0x201d,
2789 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 2790 }
2791
1da177e4
LT		 2792 return (rval);
2793}
2794
d8b45213 2795static void
e315cd28 2796qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213 2797{
9f8fddee 2798 char *link_speed;
d8b45213 2799 int rval;
1bb39548 2800 uint16_t mb[4];
e315cd28 2801 struct qla_hw_data *ha = vha->hw;
d8b45213 2802
c76f2c01 2803 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 2804 return;
2805
c9afb9a2
GM		 2806 if (atomic_read(&fcport->state) != FCS_ONLINE)
2807 return;
2808
39bd9622
AV		 2809 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
2810 fcport->fp_speed > ha->link_data_rate)
d8b45213
AV		 2811 return;
2812
e315cd28 2813 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 2814 mb);
d8b45213 2815 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2816 ql_dbg(ql_dbg_disc, vha, 0x2004,
2817 "Unable to adjust iIDMA "
2818 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x "
2819 "%04x.\n", fcport->port_name[0], fcport->port_name[1],
d8b45213
AV		 2820 fcport->port_name[2], fcport->port_name[3],
2821 fcport->port_name[4], fcport->port_name[5],
2822 fcport->port_name[6], fcport->port_name[7], rval,
7c3df132 2823 fcport->fp_speed, mb[0], mb[1]);
d8b45213 2824 } else {
daae62a3 2825 link_speed = qla2x00_get_link_speed_str(ha);
7c3df132
SK		 2826 ql_dbg(ql_dbg_disc, vha, 0x2005,
2827 "iIDMA adjusted to %s GB/s "
2828 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed,
2829 fcport->port_name[0], fcport->port_name[1],
2830 fcport->port_name[2], fcport->port_name[3],
2831 fcport->port_name[4], fcport->port_name[5],
2832 fcport->port_name[6], fcport->port_name[7]);
d8b45213
AV		 2833 }
2834}
2835
23be331d 2836static void
e315cd28 2837qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118 2838{
2839 struct fc_rport_identifiers rport_ids;
bdf79621 2840 struct fc_rport *rport;
044d78e1 2841 unsigned long flags;
8482e118 2842
ac280b67 2843 qla2x00_rport_del(fcport);
8482e118 2844
f8b02a85
AV		 2845 rport_ids.node_name = wwn_to_u64(fcport->node_name);
2846 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118 2847 rport_ids.port_id = fcport->d_id.b.domain << 16 |
2848 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 2849 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 2850 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 2851 if (!rport) {
7c3df132
SK		 2852 ql_log(ql_log_warn, vha, 0x2006,
2853 "Unable to allocate fc remote port.\n");
77d74143
AV		 2854 return;
2855 }
044d78e1 2856 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 2857 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 2858 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 2859
ad3e0eda 2860 rport->supported_classes = fcport->supported_classes;
77d74143 2861
8482e118 2862 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
2863 if (fcport->port_type == FCT_INITIATOR)
2864 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
2865 if (fcport->port_type == FCT_TARGET)
2866 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
77d74143 2867 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 2868}
2869
23be331d
AB		 2870/*
2871 * qla2x00_update_fcport
2872 * Updates device on list.
2873 *
2874 * Input:
2875 * ha = adapter block pointer.
2876 * fcport = port structure pointer.
2877 *
2878 * Return:
2879 * 0 - Success
2880 * BIT_0 - error
2881 *
2882 * Context:
2883 * Kernel context.
2884 */
2885void
e315cd28 2886qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 2887{
e315cd28 2888 fcport->vha = vha;
23be331d 2889 fcport->login_retry = 0;
5ff1d584 2890 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
23be331d 2891
e315cd28 2892 qla2x00_iidma_fcport(vha, fcport);
21090cbe 2893 qla24xx_update_fcport_fcp_prio(vha, fcport);
e315cd28 2894 qla2x00_reg_remote_port(vha, fcport);
ec426e10 2895 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
23be331d
AB		 2896}
2897
1da177e4
LT		 2898/*
2899 * qla2x00_configure_fabric
2900 * Setup SNS devices with loop ID's.
2901 *
2902 * Input:
2903 * ha = adapter block pointer.
2904 *
2905 * Returns:
2906 * 0 = success.
2907 * BIT_0 = error
2908 */
2909static int
e315cd28 2910qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4 2911{
b3b02e6e 2912 int rval;
4dc77c36 2913 fc_port_t *fcport;
1da177e4
LT		 2914 uint16_t next_loopid;
2915 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 2916 uint16_t loop_id;
1da177e4 2917 LIST_HEAD(new_fcports);
e315cd28
AC		 2918 struct qla_hw_data *ha = vha->hw;
2919 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 2920
2921 /* If FL port exists, then SNS is present */
e428924c 2922 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 2923 loop_id = NPH_F_PORT;
2924 else
2925 loop_id = SNS_FL_PORT;
e315cd28 2926 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 2927 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2928 ql_dbg(ql_dbg_disc, vha, 0x201f,
2929 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 2930
e315cd28 2931 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 2932 return (QLA_SUCCESS);
2933 }
e315cd28 2934 vha->device_flags |= SWITCH_FOUND;
1da177e4 2935
1da177e4 2936 do {
cca5335c
AV		 2937 /* FDMI support. */
2938 if (ql2xfdmienable &&
e315cd28
AC		 2939 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
2940 qla2x00_fdmi_register(vha);
cca5335c 2941
1da177e4 2942 /* Ensure we are logged into the SNS. */
e428924c 2943 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 2944 loop_id = NPH_SNS;
2945 else
2946 loop_id = SIMPLE_NAME_SERVER;
0b91d116
CD		 2947 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
2948 0xfc, mb, BIT_1|BIT_0);
2949 if (rval != QLA_SUCCESS) {
2950 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4dc77c36 2951 break;
0b91d116 2952 }
1da177e4 2953 if (mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 2954 ql_dbg(ql_dbg_disc, vha, 0x2042,
2955 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
2956 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
2957 mb[2], mb[6], mb[7]);
1da177e4
LT		 2958 return (QLA_SUCCESS);
2959 }
2960
e315cd28
AC		 2961 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
2962 if (qla2x00_rft_id(vha)) {
1da177e4 2963 /* EMPTY */
7c3df132
SK		 2964 ql_dbg(ql_dbg_disc, vha, 0x2045,
2965 "Register FC-4 TYPE failed.\n");
1da177e4 2966 }
e315cd28 2967 if (qla2x00_rff_id(vha)) {
1da177e4 2968 /* EMPTY */
7c3df132
SK		 2969 ql_dbg(ql_dbg_disc, vha, 0x2049,
2970 "Register FC-4 Features failed.\n");
1da177e4 2971 }
e315cd28 2972 if (qla2x00_rnn_id(vha)) {
1da177e4 2973 /* EMPTY */
7c3df132
SK		 2974 ql_dbg(ql_dbg_disc, vha, 0x204f,
2975 "Register Node Name failed.\n");
e315cd28 2976 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 2977 /* EMPTY */
7c3df132
SK		 2978 ql_dbg(ql_dbg_disc, vha, 0x2053,
2979 "Register Symobilic Node Name failed.\n");
1da177e4
LT		 2980 }
2981 }
2982
e315cd28 2983 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
1da177e4
LT		 2984 if (rval != QLA_SUCCESS)
2985 break;
2986
4dc77c36
JC		 2987 /* Add new ports to existing port list */
2988 list_splice_tail_init(&new_fcports, &vha->vp_fcports);
2989
2990 /* Starting free loop ID. */
2991 next_loopid = ha->min_external_loopid;
2992
e315cd28
AC		 2993 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2994 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 2995 break;
2996
2997 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
2998 continue;
2999
4dc77c36 3000 /* Logout lost/gone fabric devices (non-FCP2) */
c0822b63 3001 if (fcport->scan_state != QLA_FCPORT_SCAN_FOUND &&
b3b02e6e 3002 atomic_read(&fcport->state) == FCS_ONLINE) {
e315cd28 3003 qla2x00_mark_device_lost(vha, fcport,
d97994dc 3004 ql2xplogiabsentdevice, 0);
1da177e4 3005 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3006 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
1da177e4
LT		 3007 fcport->port_type != FCT_INITIATOR &&
3008 fcport->port_type != FCT_BROADCAST) {
e315cd28 3009 ha->isp_ops->fabric_logout(vha,
1c7c6357
AV		 3010 fcport->loop_id,
3011 fcport->d_id.b.domain,
3012 fcport->d_id.b.area,
3013 fcport->d_id.b.al_pa);
1da177e4 3014 }
c0822b63 3015 continue;
1da177e4 3016 }
c0822b63 3017 fcport->scan_state = QLA_FCPORT_SCAN_NONE;
1da177e4 3018
4dc77c36
JC		 3019 /* Login fabric devices that need a login */
3020 if ((fcport->flags & FCF_LOGIN_NEEDED) != 0 &&
3021 atomic_read(&vha->loop_down_timer) == 0) {
3022 if (fcport->loop_id == FC_NO_LOOP_ID) {
3023 fcport->loop_id = next_loopid;
3024 rval = qla2x00_find_new_loop_id(
3025 base_vha, fcport);
3026 if (rval != QLA_SUCCESS) {
3027 /* Ran out of IDs to use */
3028 continue;
3029 }
1da177e4
LT		 3030 }
3031 }
1da177e4 3032
bdf79621 3033 /* Login and update database */
e315cd28 3034 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
1da177e4
LT		 3035 }
3036 } while (0);
3037
1da177e4 3038 if (rval) {
7c3df132
SK		 3039 ql_dbg(ql_dbg_disc, vha, 0x2068,
3040 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 3041 }
3042
3043 return (rval);
3044}
3045
1da177e4
LT		 3046/*
3047 * qla2x00_find_all_fabric_devs
3048 *
3049 * Input:
3050 * ha = adapter block pointer.
3051 * dev = database device entry pointer.
3052 *
3053 * Returns:
3054 * 0 = success.
3055 *
3056 * Context:
3057 * Kernel context.
3058 */
3059static int
e315cd28
AC		 3060qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3061 struct list_head *new_fcports)
1da177e4
LT		 3062{
3063 int rval;
3064 uint16_t loop_id;
3065 fc_port_t *fcport, *new_fcport, *fcptemp;
3066 int found;
3067
3068 sw_info_t *swl;
3069 int swl_idx;
3070 int first_dev, last_dev;
1516ef44 3071 port_id_t wrap = {}, nxt_d_id;
e315cd28
AC		 3072 struct qla_hw_data *ha = vha->hw;
3073 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
ee546b6e 3074 struct scsi_qla_host *tvp;
1da177e4
LT		 3075
3076 rval = QLA_SUCCESS;
3077
3078 /* Try GID_PT to get device list, else GAN. */
7a67735b 3079 if (!ha->swl)
642ef983 3080 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
7a67735b
AV		 3081 GFP_KERNEL);
3082 swl = ha->swl;
bbfbbbc1 3083 if (!swl) {
1da177e4 3084 /*EMPTY*/
7c3df132
SK		 3085 ql_dbg(ql_dbg_disc, vha, 0x2054,
3086 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 3087 } else {
642ef983 3088 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
e315cd28 3089 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4 3090 swl = NULL;
e315cd28 3091 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 3092 swl = NULL;
e315cd28 3093 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 3094 swl = NULL;
e5896bd5 3095 } else if (ql2xiidmaenable &&
e315cd28
AC		 3096 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3097 qla2x00_gpsc(vha, swl);
1da177e4 3098 }
e8c72ba5
CD		 3099
3100 /* If other queries succeeded probe for FC-4 type */
3101 if (swl)
3102 qla2x00_gff_id(vha, swl);
1da177e4
LT		 3103 }
3104 swl_idx = 0;
3105
3106 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 3107 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3108 if (new_fcport == NULL) {
7c3df132
SK		 3109 ql_log(ql_log_warn, vha, 0x205e,
3110 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 3111 return (QLA_MEMORY_ALLOC_FAILED);
3112 }
3113 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 3114 /* Set start port ID scan at adapter ID. */
3115 first_dev = 1;
3116 last_dev = 0;
3117
3118 /* Starting free loop ID. */
e315cd28
AC		 3119 loop_id = ha->min_external_loopid;
3120 for (; loop_id <= ha->max_loop_id; loop_id++) {
3121 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 3122 continue;
3123
3a6478df
GM		 3124 if (ha->current_topology == ISP_CFG_FL &&
3125 (atomic_read(&vha->loop_down_timer) ||
3126 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 3127 atomic_set(&vha->loop_down_timer, 0);
3128 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3129 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 3130 break;
bb2d52b2 3131 }
1da177e4
LT		 3132
3133 if (swl != NULL) {
3134 if (last_dev) {
3135 wrap.b24 = new_fcport->d_id.b24;
3136 } else {
3137 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3138 memcpy(new_fcport->node_name,
3139 swl[swl_idx].node_name, WWN_SIZE);
3140 memcpy(new_fcport->port_name,
3141 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 3142 memcpy(new_fcport->fabric_port_name,
3143 swl[swl_idx].fabric_port_name, WWN_SIZE);
3144 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 3145 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4
LT		 3146
3147 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3148 last_dev = 1;
3149 }
3150 swl_idx++;
3151 }
3152 } else {
3153 /* Send GA_NXT to the switch */
e315cd28 3154 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 3155 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3156 ql_log(ql_log_warn, vha, 0x2064,
3157 "SNS scan failed -- assuming "
3158 "zero-entry result.\n");
1da177e4
LT		 3159 list_for_each_entry_safe(fcport, fcptemp,
3160 new_fcports, list) {
3161 list_del(&fcport->list);
3162 kfree(fcport);
3163 }
3164 rval = QLA_SUCCESS;
3165 break;
3166 }
3167 }
3168
3169 /* If wrap on switch device list, exit. */
3170 if (first_dev) {
3171 wrap.b24 = new_fcport->d_id.b24;
3172 first_dev = 0;
3173 } else if (new_fcport->d_id.b24 == wrap.b24) {
7c3df132
SK		 3174 ql_dbg(ql_dbg_disc, vha, 0x2065,
3175 "Device wrap (%02x%02x%02x).\n",
3176 new_fcport->d_id.b.domain,
3177 new_fcport->d_id.b.area,
3178 new_fcport->d_id.b.al_pa);
1da177e4
LT		 3179 break;
3180 }
3181
2c3dfe3f 3182 /* Bypass if same physical adapter. */
e315cd28 3183 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 3184 continue;
3185
2c3dfe3f 3186 /* Bypass virtual ports of the same host. */
e315cd28
AC		 3187 found = 0;
3188 if (ha->num_vhosts) {
feafb7b1
AE		 3189 unsigned long flags;
3190
3191 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3192 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3193 if (new_fcport->d_id.b24 == vp->d_id.b24) {
3194 found = 1;
2c3dfe3f 3195 break;
e315cd28 3196 }
2c3dfe3f 3197 }
feafb7b1
AE		 3198 spin_unlock_irqrestore(&ha->vport_slock, flags);
3199
e315cd28 3200 if (found)
2c3dfe3f
SJ		 3201 continue;
3202 }
3203
f7d289f6
AV		 3204 /* Bypass if same domain and area of adapter. */
3205 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 3206 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 3207 ISP_CFG_FL)
3208 continue;
3209
1da177e4
LT		 3210 /* Bypass reserved domain fields. */
3211 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3212 continue;
3213
e8c72ba5 3214 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 3215 if (ql2xgffidenable &&
3216 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3217 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 3218 continue;
3219
1da177e4
LT		 3220 /* Locate matching device in database. */
3221 found = 0;
e315cd28 3222 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3223 if (memcmp(new_fcport->port_name, fcport->port_name,
3224 WWN_SIZE))
3225 continue;
3226
c0822b63 3227 fcport->scan_state = QLA_FCPORT_SCAN_FOUND;
b3b02e6e 3228
1da177e4
LT		 3229 found++;
3230
d8b45213
AV		 3231 /* Update port state. */
3232 memcpy(fcport->fabric_port_name,
3233 new_fcport->fabric_port_name, WWN_SIZE);
3234 fcport->fp_speed = new_fcport->fp_speed;
3235
1da177e4
LT		 3236 /*
3237 * If address the same and state FCS_ONLINE, nothing
3238 * changed.
3239 */
3240 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3241 atomic_read(&fcport->state) == FCS_ONLINE) {
3242 break;
3243 }
3244
3245 /*
3246 * If device was not a fabric device before.
3247 */
3248 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3249 fcport->d_id.b24 = new_fcport->d_id.b24;
3250 fcport->loop_id = FC_NO_LOOP_ID;
3251 fcport->flags |= (FCF_FABRIC_DEVICE |
3252 FCF_LOGIN_NEEDED);
1da177e4
LT		 3253 break;
3254 }
3255
3256 /*
3257 * Port ID changed or device was marked to be updated;
3258 * Log it out if still logged in and mark it for
3259 * relogin later.
3260 */
3261 fcport->d_id.b24 = new_fcport->d_id.b24;
3262 fcport->flags |= FCF_LOGIN_NEEDED;
3263 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3264 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
0eba25df 3265 (fcport->flags & FCF_ASYNC_SENT) == 0 &&
1da177e4
LT		 3266 fcport->port_type != FCT_INITIATOR &&
3267 fcport->port_type != FCT_BROADCAST) {
e315cd28 3268 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3269 fcport->d_id.b.domain, fcport->d_id.b.area,
3270 fcport->d_id.b.al_pa);
1da177e4
LT		 3271 fcport->loop_id = FC_NO_LOOP_ID;
3272 }
3273
3274 break;
3275 }
3276
3277 if (found)
3278 continue;
1da177e4
LT		 3279 /* If device was not in our fcports list, then add it. */
3280 list_add_tail(&new_fcport->list, new_fcports);
3281
3282 /* Allocate a new replacement fcport. */
3283 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 3284 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3285 if (new_fcport == NULL) {
7c3df132
SK		 3286 ql_log(ql_log_warn, vha, 0x2066,
3287 "Memory allocation failed for fcport.\n");
1da177e4
LT		 3288 return (QLA_MEMORY_ALLOC_FAILED);
3289 }
3290 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3291 new_fcport->d_id.b24 = nxt_d_id.b24;
3292 }
3293
c9475cb0 3294 kfree(new_fcport);
1da177e4 3295
1da177e4
LT		 3296 return (rval);
3297}
3298
3299/*
3300 * qla2x00_find_new_loop_id
3301 * Scan through our port list and find a new usable loop ID.
3302 *
3303 * Input:
3304 * ha: adapter state pointer.
3305 * dev: port structure pointer.
3306 *
3307 * Returns:
3308 * qla2x00 local function return status code.
3309 *
3310 * Context:
3311 * Kernel context.
3312 */
03bcfb57 3313int
e315cd28 3314qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 3315{
3316 int rval;
3317 int found;
3318 fc_port_t *fcport;
3319 uint16_t first_loop_id;
e315cd28
AC		 3320 struct qla_hw_data *ha = vha->hw;
3321 struct scsi_qla_host *vp;
ee546b6e 3322 struct scsi_qla_host *tvp;
feafb7b1 3323 unsigned long flags = 0;
1da177e4
LT		 3324
3325 rval = QLA_SUCCESS;
3326
3327 /* Save starting loop ID. */
3328 first_loop_id = dev->loop_id;
3329
3330 for (;;) {
3331 /* Skip loop ID if already used by adapter. */
e315cd28 3332 if (dev->loop_id == vha->loop_id)
1da177e4 3333 dev->loop_id++;
1da177e4
LT		 3334
3335 /* Skip reserved loop IDs. */
e315cd28 3336 while (qla2x00_is_reserved_id(vha, dev->loop_id))
1da177e4 3337 dev->loop_id++;
1da177e4
LT		 3338
3339 /* Reset loop ID if passed the end. */
e315cd28 3340 if (dev->loop_id > ha->max_loop_id) {
1da177e4
LT		 3341 /* first loop ID. */
3342 dev->loop_id = ha->min_external_loopid;
3343 }
3344
3345 /* Check for loop ID being already in use. */
3346 found = 0;
3347 fcport = NULL;
feafb7b1
AE		 3348
3349 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3350 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3351 list_for_each_entry(fcport, &vp->vp_fcports, list) {
3352 if (fcport->loop_id == dev->loop_id &&
3353 fcport != dev) {
3354 /* ID possibly in use */
3355 found++;
3356 break;
3357 }
1da177e4 3358 }
e315cd28
AC		 3359 if (found)
3360 break;
1da177e4 3361 }
feafb7b1 3362 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4
LT		 3363
3364 /* If not in use then it is free to use. */
3365 if (!found) {
557cf785
AE		 3366 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
3367 "Assigning new loopid=%x, portid=%x.\n",
3368 dev->loop_id, dev->d_id.b24);
1da177e4
LT		 3369 break;
3370 }
3371
3372 /* ID in use. Try next value. */
3373 dev->loop_id++;
3374
3375 /* If wrap around. No free ID to use. */
3376 if (dev->loop_id == first_loop_id) {
3377 dev->loop_id = FC_NO_LOOP_ID;
3378 rval = QLA_FUNCTION_FAILED;
3379 break;
3380 }
3381 }
3382
3383 return (rval);
3384}
3385
1da177e4
LT		 3386/*
3387 * qla2x00_fabric_dev_login
3388 * Login fabric target device and update FC port database.
3389 *
3390 * Input:
3391 * ha: adapter state pointer.
3392 * fcport: port structure list pointer.
3393 * next_loopid: contains value of a new loop ID that can be used
3394 * by the next login attempt.
3395 *
3396 * Returns:
3397 * qla2x00 local function return status code.
3398 *
3399 * Context:
3400 * Kernel context.
3401 */
3402static int
e315cd28 3403qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3404 uint16_t *next_loopid)
3405{
3406 int rval;
3407 int retry;
0107109e 3408 uint8_t opts;
e315cd28 3409 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3410
3411 rval = QLA_SUCCESS;
3412 retry = 0;
3413
ac280b67 3414 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584
AV		 3415 if (fcport->flags & FCF_ASYNC_SENT)
3416 return rval;
3417 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3418 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3419 if (!rval)
3420 return rval;
3421 }
3422
5ff1d584 3423 fcport->flags &= ~FCF_ASYNC_SENT;
e315cd28 3424 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
1da177e4 3425 if (rval == QLA_SUCCESS) {
f08b7251 3426 /* Send an ADISC to FCP2 devices.*/
0107109e 3427 opts = 0;
f08b7251 3428 if (fcport->flags & FCF_FCP2_DEVICE)
0107109e 3429 opts |= BIT_1;
e315cd28 3430 rval = qla2x00_get_port_database(vha, fcport, opts);
1da177e4 3431 if (rval != QLA_SUCCESS) {
e315cd28 3432 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3433 fcport->d_id.b.domain, fcport->d_id.b.area,
3434 fcport->d_id.b.al_pa);
e315cd28 3435 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4 3436 } else {
e315cd28 3437 qla2x00_update_fcport(vha, fcport);
1da177e4 3438 }
0b91d116
CD		 3439 } else {
3440 /* Retry Login. */
3441 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 3442 }
3443
3444 return (rval);
3445}
3446
3447/*
3448 * qla2x00_fabric_login
3449 * Issue fabric login command.
3450 *
3451 * Input:
3452 * ha = adapter block pointer.
3453 * device = pointer to FC device type structure.
3454 *
3455 * Returns:
3456 * 0 - Login successfully
3457 * 1 - Login failed
3458 * 2 - Initiator device
3459 * 3 - Fatal error
3460 */
3461int
e315cd28 3462qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3463 uint16_t *next_loopid)
3464{
3465 int rval;
3466 int retry;
3467 uint16_t tmp_loopid;
3468 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 3469 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3470
3471 retry = 0;
3472 tmp_loopid = 0;
3473
3474 for (;;) {
7c3df132
SK		 3475 ql_dbg(ql_dbg_disc, vha, 0x2000,
3476 "Trying Fabric Login w/loop id 0x%04x for port "
3477 "%02x%02x%02x.\n",
3478 fcport->loop_id, fcport->d_id.b.domain,
3479 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3480
3481 /* Login fcport on switch. */
0b91d116 3482 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 3483 fcport->d_id.b.domain, fcport->d_id.b.area,
3484 fcport->d_id.b.al_pa, mb, BIT_0);
0b91d116
CD		 3485 if (rval != QLA_SUCCESS) {
3486 return rval;
3487 }
1da177e4
LT		 3488 if (mb[0] == MBS_PORT_ID_USED) {
3489 /*
3490 * Device has another loop ID. The firmware team
0107109e
AV		 3491 * recommends the driver perform an implicit login with
3492 * the specified ID again. The ID we just used is save
3493 * here so we return with an ID that can be tried by
3494 * the next login.
1da177e4
LT		 3495 */
3496 retry++;
3497 tmp_loopid = fcport->loop_id;
3498 fcport->loop_id = mb[1];
3499
7c3df132
SK		 3500 ql_dbg(ql_dbg_disc, vha, 0x2001,
3501 "Fabric Login: port in use - next loop "
3502 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 3503 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 3504 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3505
3506 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3507 /*
3508 * Login succeeded.
3509 */
3510 if (retry) {
3511 /* A retry occurred before. */
3512 *next_loopid = tmp_loopid;
3513 } else {
3514 /*
3515 * No retry occurred before. Just increment the
3516 * ID value for next login.
3517 */
3518 *next_loopid = (fcport->loop_id + 1);
3519 }
3520
3521 if (mb[1] & BIT_0) {
3522 fcport->port_type = FCT_INITIATOR;
3523 } else {
3524 fcport->port_type = FCT_TARGET;
3525 if (mb[1] & BIT_1) {
8474f3a0 3526 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 3527 }
3528 }
3529
ad3e0eda
AV		 3530 if (mb[10] & BIT_0)
3531 fcport->supported_classes |= FC_COS_CLASS2;
3532 if (mb[10] & BIT_1)
3533 fcport->supported_classes |= FC_COS_CLASS3;
3534
1da177e4
LT		 3535 rval = QLA_SUCCESS;
3536 break;
3537 } else if (mb[0] == MBS_LOOP_ID_USED) {
3538 /*
3539 * Loop ID already used, try next loop ID.
3540 */
3541 fcport->loop_id++;
e315cd28 3542 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 3543 if (rval != QLA_SUCCESS) {
3544 /* Ran out of loop IDs to use */
3545 break;
3546 }
3547 } else if (mb[0] == MBS_COMMAND_ERROR) {
3548 /*
3549 * Firmware possibly timed out during login. If NO
3550 * retries are left to do then the device is declared
3551 * dead.
3552 */
3553 *next_loopid = fcport->loop_id;
e315cd28 3554 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3555 fcport->d_id.b.domain, fcport->d_id.b.area,
3556 fcport->d_id.b.al_pa);
e315cd28 3557 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 3558
3559 rval = 1;
3560 break;
3561 } else {
3562 /*
3563 * unrecoverable / not handled error
3564 */
7c3df132
SK		 3565 ql_dbg(ql_dbg_disc, vha, 0x2002,
3566 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3567 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3568 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3569 fcport->loop_id, jiffies);
1da177e4
LT		 3570
3571 *next_loopid = fcport->loop_id;
e315cd28 3572 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3573 fcport->d_id.b.domain, fcport->d_id.b.area,
3574 fcport->d_id.b.al_pa);
1da177e4 3575 fcport->loop_id = FC_NO_LOOP_ID;
0eedfcf0 3576 fcport->login_retry = 0;
1da177e4
LT		 3577
3578 rval = 3;
3579 break;
3580 }
3581 }
3582
3583 return (rval);
3584}
3585
3586/*
3587 * qla2x00_local_device_login
3588 * Issue local device login command.
3589 *
3590 * Input:
3591 * ha = adapter block pointer.
3592 * loop_id = loop id of device to login to.
3593 *
3594 * Returns (Where's the #define!!!!):
3595 * 0 - Login successfully
3596 * 1 - Login failed
3597 * 3 - Fatal error
3598 */
3599int
e315cd28 3600qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 3601{
3602 int rval;
3603 uint16_t mb[MAILBOX_REGISTER_COUNT];
3604
3605 memset(mb, 0, sizeof(mb));
e315cd28 3606 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 3607 if (rval == QLA_SUCCESS) {
3608 /* Interrogate mailbox registers for any errors */
3609 if (mb[0] == MBS_COMMAND_ERROR)
3610 rval = 1;
3611 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3612 /* device not in PCB table */
3613 rval = 3;
3614 }
3615
3616 return (rval);
3617}
3618
3619/*
3620 * qla2x00_loop_resync
3621 * Resync with fibre channel devices.
3622 *
3623 * Input:
3624 * ha = adapter block pointer.
3625 *
3626 * Returns:
3627 * 0 = success
3628 */
3629int
e315cd28 3630qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 3631{
73208dfd 3632 int rval = QLA_SUCCESS;
1da177e4 3633 uint32_t wait_time;
67c2e93a
AC		 3634 struct req_que *req;
3635 struct rsp_que *rsp;
3636
7163ea81 3637 if (vha->hw->flags.cpu_affinity_enabled)
67c2e93a
AC		 3638 req = vha->hw->req_q_map[0];
3639 else
3640 req = vha->req;
3641 rsp = req->rsp;
1da177e4 3642
e315cd28
AC		 3643 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3644 if (vha->flags.online) {
3645 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 3646 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3647 wait_time = 256;
3648 do {
0107109e 3649 /* Issue a marker after FW becomes ready. */
73208dfd
AC		 3650 qla2x00_marker(vha, req, rsp, 0, 0,
3651 MK_SYNC_ALL);
e315cd28 3652 vha->marker_needed = 0;
1da177e4
LT		 3653
3654 /* Remap devices on Loop. */
e315cd28 3655 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 3656
e315cd28 3657 qla2x00_configure_loop(vha);
1da177e4 3658 wait_time--;
e315cd28
AC		 3659 } while (!atomic_read(&vha->loop_down_timer) &&
3660 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3661 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3662 &vha->dpc_flags)));
1da177e4 3663 }
1da177e4
LT		 3664 }
3665
e315cd28 3666 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 3667 return (QLA_FUNCTION_FAILED);
1da177e4 3668
e315cd28 3669 if (rval)
7c3df132
SK		 3670 ql_dbg(ql_dbg_disc, vha, 0x206c,
3671 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 3672
3673 return (rval);
3674}
3675
579d12b5
SK		 3676/*
3677* qla2x00_perform_loop_resync
3678* Description: This function will set the appropriate flags and call
3679* qla2x00_loop_resync. If successful loop will be resynced
3680* Arguments : scsi_qla_host_t pointer
3681* returm : Success or Failure
3682*/
3683
3684int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3685{
3686 int32_t rval = 0;
3687
3688 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3689 /*Configure the flags so that resync happens properly*/
3690 atomic_set(&ha->loop_down_timer, 0);
3691 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3692 atomic_set(&ha->loop_state, LOOP_UP);
3693 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3694 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3695 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3696
3697 rval = qla2x00_loop_resync(ha);
3698 } else
3699 atomic_set(&ha->loop_state, LOOP_DEAD);
3700
3701 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3702 }
3703
3704 return rval;
3705}
3706
d97994dc 3707void
67becc00 3708qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc 3709{
3710 fc_port_t *fcport;
feafb7b1
AE		 3711 struct scsi_qla_host *vha;
3712 struct qla_hw_data *ha = base_vha->hw;
3713 unsigned long flags;
d97994dc 3714
feafb7b1 3715 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 3716 /* Go with deferred removal of rport references. */
feafb7b1
AE		 3717 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3718 atomic_inc(&vha->vref_count);
3719 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 3720 if (fcport->drport &&
feafb7b1
AE		 3721 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3722 spin_unlock_irqrestore(&ha->vport_slock, flags);
3723
67becc00 3724 qla2x00_rport_del(fcport);
feafb7b1
AE		 3725
3726 spin_lock_irqsave(&ha->vport_slock, flags);
3727 }
3728 }
3729 atomic_dec(&vha->vref_count);
3730 }
3731 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc 3732}
3733
579d12b5
SK		 3734/*
3735* qla82xx_quiescent_state_cleanup
3736* Description: This function will block the new I/Os
3737* Its not aborting any I/Os as context
3738* is not destroyed during quiescence
3739* Arguments: scsi_qla_host_t
3740* return : void
3741*/
3742void
3743qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
3744{
3745 struct qla_hw_data *ha = vha->hw;
3746 struct scsi_qla_host *vp;
3747
7c3df132
SK		 3748 ql_dbg(ql_dbg_p3p, vha, 0xb002,
3749 "Performing ISP error recovery - ha=%p.\n", ha);
579d12b5
SK		 3750
3751 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
3752 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3753 atomic_set(&vha->loop_state, LOOP_DOWN);
3754 qla2x00_mark_all_devices_lost(vha, 0);
3755 list_for_each_entry(vp, &ha->vp_list, list)
3756 qla2x00_mark_all_devices_lost(vha, 0);
3757 } else {
3758 if (!atomic_read(&vha->loop_down_timer))
3759 atomic_set(&vha->loop_down_timer,
3760 LOOP_DOWN_TIME);
3761 }
3762 /* Wait for pending cmds to complete */
3763 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
3764}
3765
a9083016
GM		 3766void
3767qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
3768{
3769 struct qla_hw_data *ha = vha->hw;
579d12b5 3770 struct scsi_qla_host *vp;
feafb7b1 3771 unsigned long flags;
6aef87be 3772 fc_port_t *fcport;
a9083016 3773
e46ef004
SK		 3774 /* For ISP82XX, driver waits for completion of the commands.
3775 * online flag should be set.
3776 */
3777 if (!IS_QLA82XX(ha))
3778 vha->flags.online = 0;
a9083016
GM		 3779 ha->flags.chip_reset_done = 0;
3780 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2be21fa2 3781 vha->qla_stats.total_isp_aborts++;
a9083016 3782
7c3df132
SK		 3783 ql_log(ql_log_info, vha, 0x00af,
3784 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 3785
e46ef004
SK		 3786 /* For ISP82XX, reset_chip is just disabling interrupts.
3787 * Driver waits for the completion of the commands.
3788 * the interrupts need to be enabled.
3789 */
a9083016
GM		 3790 if (!IS_QLA82XX(ha))
3791 ha->isp_ops->reset_chip(vha);
3792
3793 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
3794 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3795 atomic_set(&vha->loop_state, LOOP_DOWN);
3796 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 3797
3798 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 3799 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 3800 atomic_inc(&vp->vref_count);
3801 spin_unlock_irqrestore(&ha->vport_slock, flags);
3802
a9083016 3803 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 3804
3805 spin_lock_irqsave(&ha->vport_slock, flags);
3806 atomic_dec(&vp->vref_count);
3807 }
3808 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 3809 } else {
3810 if (!atomic_read(&vha->loop_down_timer))
3811 atomic_set(&vha->loop_down_timer,
3812 LOOP_DOWN_TIME);
3813 }
3814
6aef87be
AV		 3815 /* Clear all async request states across all VPs. */
3816 list_for_each_entry(fcport, &vha->vp_fcports, list)
3817 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3818 spin_lock_irqsave(&ha->vport_slock, flags);
3819 list_for_each_entry(vp, &ha->vp_list, list) {
3820 atomic_inc(&vp->vref_count);
3821 spin_unlock_irqrestore(&ha->vport_slock, flags);
3822
3823 list_for_each_entry(fcport, &vp->vp_fcports, list)
3824 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3825
3826 spin_lock_irqsave(&ha->vport_slock, flags);
3827 atomic_dec(&vp->vref_count);
3828 }
3829 spin_unlock_irqrestore(&ha->vport_slock, flags);
3830
bddd2d65
LC		 3831 if (!ha->flags.eeh_busy) {
3832 /* Make sure for ISP 82XX IO DMA is complete */
3833 if (IS_QLA82XX(ha)) {
7190575f 3834 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 3835 ql_log(ql_log_info, vha, 0x00b4,
3836 "Done chip reset cleanup.\n");
a9083016 3837
e46ef004
SK		 3838 /* Done waiting for pending commands.
3839 * Reset the online flag.
3840 */
3841 vha->flags.online = 0;
4d78c973 3842 }
a9083016 3843
bddd2d65
LC		 3844 /* Requeue all commands in outstanding command list. */
3845 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
3846 }
a9083016
GM		 3847}
3848
1da177e4
LT		 3849/*
3850* qla2x00_abort_isp
3851* Resets ISP and aborts all outstanding commands.
3852*
3853* Input:
3854* ha = adapter block pointer.
3855*
3856* Returns:
3857* 0 = success
3858*/
3859int
e315cd28 3860qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 3861{
476e8978 3862 int rval;
1da177e4 3863 uint8_t status = 0;
e315cd28
AC		 3864 struct qla_hw_data *ha = vha->hw;
3865 struct scsi_qla_host *vp;
73208dfd 3866 struct req_que *req = ha->req_q_map[0];
feafb7b1 3867 unsigned long flags;
1da177e4 3868
e315cd28 3869 if (vha->flags.online) {
a9083016 3870 qla2x00_abort_isp_cleanup(vha);
1da177e4 3871
85880801
AV		 3872 if (unlikely(pci_channel_offline(ha->pdev) &&
3873 ha->flags.pci_channel_io_perm_failure)) {
3874 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3875 status = 0;
3876 return status;
3877 }
3878
73208dfd 3879 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 3880
e315cd28 3881 ha->isp_ops->nvram_config(vha);
1da177e4 3882
e315cd28
AC		 3883 if (!qla2x00_restart_isp(vha)) {
3884 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 3885
e315cd28 3886 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 3887 /*
3888 * Issue marker command only when we are going
3889 * to start the I/O .
3890 */
e315cd28 3891 vha->marker_needed = 1;
1da177e4
LT		 3892 }
3893
e315cd28 3894 vha->flags.online = 1;
1da177e4 3895
fd34f556 3896 ha->isp_ops->enable_intrs(ha);
1da177e4 3897
fa2a1ce5 3898 ha->isp_abort_cnt = 0;
e315cd28 3899 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 3900
6246b8a1
GM		 3901 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
3902 qla2x00_get_fw_version(vha);
df613b96
AV		 3903 if (ha->fce) {
3904 ha->flags.fce_enabled = 1;
3905 memset(ha->fce, 0,
3906 fce_calc_size(ha->fce_bufs));
e315cd28 3907 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 3908 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
3909 &ha->fce_bufs);
3910 if (rval) {
7c3df132 3911 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 3912 "Unable to reinitialize FCE "
3913 "(%d).\n", rval);
3914 ha->flags.fce_enabled = 0;
3915 }
3916 }
436a7b11
AV		 3917
3918 if (ha->eft) {
3919 memset(ha->eft, 0, EFT_SIZE);
e315cd28 3920 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 3921 ha->eft_dma, EFT_NUM_BUFFERS);
3922 if (rval) {
7c3df132 3923 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 3924 "Unable to reinitialize EFT "
3925 "(%d).\n", rval);
3926 }
3927 }
1da177e4 3928 } else { /* failed the ISP abort */
e315cd28
AC		 3929 vha->flags.online = 1;
3930 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 3931 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 3932 ql_log(ql_log_fatal, vha, 0x8035,
3933 "ISP error recover failed - "
3934 "board disabled.\n");
fa2a1ce5 3935 /*
1da177e4
LT		 3936 * The next call disables the board
3937 * completely.
3938 */
e315cd28
AC		 3939 ha->isp_ops->reset_adapter(vha);
3940 vha->flags.online = 0;
1da177e4 3941 clear_bit(ISP_ABORT_RETRY,
e315cd28 3942 &vha->dpc_flags);
1da177e4
LT		 3943 status = 0;
3944 } else { /* schedule another ISP abort */
3945 ha->isp_abort_cnt--;
7c3df132
SK		 3946 ql_dbg(ql_dbg_taskm, vha, 0x8020,
3947 "ISP abort - retry remaining %d.\n",
3948 ha->isp_abort_cnt);
1da177e4
LT		 3949 status = 1;
3950 }
3951 } else {
3952 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 3953 ql_dbg(ql_dbg_taskm, vha, 0x8021,
3954 "ISP error recovery - retrying (%d) "
3955 "more times.\n", ha->isp_abort_cnt);
e315cd28 3956 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 3957 status = 1;
3958 }
3959 }
fa2a1ce5 3960
1da177e4
LT		 3961 }
3962
e315cd28 3963 if (!status) {
7c3df132 3964 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
feafb7b1
AE		 3965
3966 spin_lock_irqsave(&ha->vport_slock, flags);
3967 list_for_each_entry(vp, &ha->vp_list, list) {
3968 if (vp->vp_idx) {
3969 atomic_inc(&vp->vref_count);
3970 spin_unlock_irqrestore(&ha->vport_slock, flags);
3971
e315cd28 3972 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 3973
3974 spin_lock_irqsave(&ha->vport_slock, flags);
3975 atomic_dec(&vp->vref_count);
3976 }
e315cd28 3977 }
feafb7b1
AE		 3978 spin_unlock_irqrestore(&ha->vport_slock, flags);
3979
e315cd28 3980 } else {
d8424f68
JP		 3981 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
3982 __func__);
1da177e4
LT		 3983 }
3984
3985 return(status);
3986}
3987
3988/*
3989* qla2x00_restart_isp
3990* restarts the ISP after a reset
3991*
3992* Input:
3993* ha = adapter block pointer.
3994*
3995* Returns:
3996* 0 = success
3997*/
3998static int
e315cd28 3999qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 4000{
c6b2fca8 4001 int status = 0;
1da177e4 4002 uint32_t wait_time;
e315cd28 4003 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 4004 struct req_que *req = ha->req_q_map[0];
4005 struct rsp_que *rsp = ha->rsp_q_map[0];
1da177e4
LT		 4006
4007 /* If firmware needs to be loaded */
e315cd28
AC		 4008 if (qla2x00_isp_firmware(vha)) {
4009 vha->flags.online = 0;
4010 status = ha->isp_ops->chip_diag(vha);
4011 if (!status)
4012 status = qla2x00_setup_chip(vha);
1da177e4
LT		 4013 }
4014
e315cd28
AC		 4015 if (!status && !(status = qla2x00_init_rings(vha))) {
4016 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 4017 ha->flags.chip_reset_done = 1;
73208dfd
AC		 4018 /* Initialize the queues in use */
4019 qla25xx_init_queues(ha);
4020
e315cd28
AC		 4021 status = qla2x00_fw_ready(vha);
4022 if (!status) {
7c3df132
SK		 4023 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4024 "Start configure loop status = %d.\n", status);
0107109e
AV		 4025
4026 /* Issue a marker after FW becomes ready. */
73208dfd 4027 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
0107109e 4028
e315cd28 4029 vha->flags.online = 1;
1da177e4
LT		 4030 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4031 wait_time = 256;
4032 do {
e315cd28
AC		 4033 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4034 qla2x00_configure_loop(vha);
1da177e4 4035 wait_time--;
e315cd28
AC		 4036 } while (!atomic_read(&vha->loop_down_timer) &&
4037 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4038 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4039 &vha->dpc_flags)));
1da177e4
LT		 4040 }
4041
4042 /* if no cable then assume it's good */
e315cd28 4043 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4
LT		 4044 status = 0;
4045
7c3df132
SK		 4046 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4047 "Configure loop done, status = 0x%x.\n", status);
1da177e4
LT		 4048 }
4049 return (status);
4050}
4051
73208dfd
AC		 4052static int
4053qla25xx_init_queues(struct qla_hw_data *ha)
4054{
4055 struct rsp_que *rsp = NULL;
4056 struct req_que *req = NULL;
4057 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4058 int ret = -1;
4059 int i;
4060
2afa19a9 4061 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd
AC		 4062 rsp = ha->rsp_q_map[i];
4063 if (rsp) {
4064 rsp->options &= ~BIT_0;
618a7523 4065 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 4066 if (ret != QLA_SUCCESS)
7c3df132
SK		 4067 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4068 "%s Rsp que: %d init failed.\n",
4069 __func__, rsp->id);
73208dfd 4070 else
7c3df132
SK		 4071 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4072 "%s Rsp que: %d inited.\n",
4073 __func__, rsp->id);
73208dfd 4074 }
2afa19a9
AC		 4075 }
4076 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd
AC		 4077 req = ha->req_q_map[i];
4078 if (req) {
29bdccbe 4079 /* Clear outstanding commands array. */
73208dfd 4080 req->options &= ~BIT_0;
618a7523 4081 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 4082 if (ret != QLA_SUCCESS)
7c3df132
SK		 4083 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4084 "%s Req que: %d init failed.\n",
4085 __func__, req->id);
73208dfd 4086 else
7c3df132
SK		 4087 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4088 "%s Req que: %d inited.\n",
4089 __func__, req->id);
73208dfd
AC		 4090 }
4091 }
4092 return ret;
4093}
4094
1da177e4
LT		 4095/*
4096* qla2x00_reset_adapter
4097* Reset adapter.
4098*
4099* Input:
4100* ha = adapter block pointer.
4101*/
abbd8870 4102void
e315cd28 4103qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 4104{
4105 unsigned long flags = 0;
e315cd28 4106 struct qla_hw_data *ha = vha->hw;
3d71644c 4107 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 4108
e315cd28 4109 vha->flags.online = 0;
fd34f556 4110 ha->isp_ops->disable_intrs(ha);
1da177e4 4111
1da177e4
LT		 4112 spin_lock_irqsave(&ha->hardware_lock, flags);
4113 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4114 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4115 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4116 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4117 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4118}
0107109e
AV		 4119
4120void
e315cd28 4121qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 4122{
4123 unsigned long flags = 0;
e315cd28 4124 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 4125 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4126
a9083016
GM		 4127 if (IS_QLA82XX(ha))
4128 return;
4129
e315cd28 4130 vha->flags.online = 0;
fd34f556 4131 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 4132
4133 spin_lock_irqsave(&ha->hardware_lock, flags);
4134 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4135 RD_REG_DWORD(&reg->hccr);
4136 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4137 RD_REG_DWORD(&reg->hccr);
4138 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 4139
4140 if (IS_NOPOLLING_TYPE(ha))
4141 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 4142}
4143
4e08df3f
DM		 4144/* On sparc systems, obtain port and node WWN from firmware
4145 * properties.
4146 */
e315cd28
AC		 4147static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4148 struct nvram_24xx *nv)
4e08df3f
DM		 4149{
4150#ifdef CONFIG_SPARC
e315cd28 4151 struct qla_hw_data *ha = vha->hw;
4e08df3f 4152 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 4153 struct device_node *dp = pci_device_to_OF_node(pdev);
4154 const u8 *val;
4e08df3f
DM		 4155 int len;
4156
4157 val = of_get_property(dp, "port-wwn", &len);
4158 if (val && len >= WWN_SIZE)
4159 memcpy(nv->port_name, val, WWN_SIZE);
4160
4161 val = of_get_property(dp, "node-wwn", &len);
4162 if (val && len >= WWN_SIZE)
4163 memcpy(nv->node_name, val, WWN_SIZE);
4164#endif
4165}
4166
0107109e 4167int
e315cd28 4168qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 4169{
4e08df3f 4170 int rval;
0107109e
AV		 4171 struct init_cb_24xx *icb;
4172 struct nvram_24xx *nv;
4173 uint32_t *dptr;
4174 uint8_t *dptr1, *dptr2;
4175 uint32_t chksum;
4176 uint16_t cnt;
e315cd28 4177 struct qla_hw_data *ha = vha->hw;
0107109e 4178
4e08df3f 4179 rval = QLA_SUCCESS;
0107109e 4180 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 4181 nv = ha->nvram;
0107109e
AV		 4182
4183 /* Determine NVRAM starting address. */
e5b68a61
AC		 4184 if (ha->flags.port0) {
4185 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4186 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4187 } else {
0107109e 4188 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790 4189 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4190 }
e5b68a61
AC		 4191 ha->nvram_size = sizeof(struct nvram_24xx);
4192 ha->vpd_size = FA_NVRAM_VPD_SIZE;
a9083016
GM		 4193 if (IS_QLA82XX(ha))
4194 ha->vpd_size = FA_VPD_SIZE_82XX;
0107109e 4195
281afe19
SJ		 4196 /* Get VPD data into cache */
4197 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 4198 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 4199 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4200
4201 /* Get NVRAM data into cache and calculate checksum. */
0107109e 4202 dptr = (uint32_t *)nv;
e315cd28 4203 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e
AV		 4204 ha->nvram_size);
4205 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4206 chksum += le32_to_cpu(*dptr++);
4207
7c3df132
SK		 4208 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4209 "Contents of NVRAM\n");
4210 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4211 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 4212
4213 /* Bad NVRAM data, set defaults parameters. */
4214 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4215 || nv->id[3] != ' ' ||
4216 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4217 /* Reset NVRAM data. */
7c3df132 4218 ql_log(ql_log_warn, vha, 0x006b,
9e336520 4219 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132
SK		 4220 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4221 ql_log(ql_log_warn, vha, 0x006c,
4222 "Falling back to functioning (yet invalid -- WWPN) "
4223 "defaults.\n");
4e08df3f
DM		 4224
4225 /*
4226 * Set default initialization control block.
4227 */
4228 memset(nv, 0, ha->nvram_size);
4229 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4230 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4231 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4232 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4233 nv->exchange_count = __constant_cpu_to_le16(0);
4234 nv->hard_address = __constant_cpu_to_le16(124);
4235 nv->port_name[0] = 0x21;
e5b68a61 4236 nv->port_name[1] = 0x00 + ha->port_no;
4e08df3f
DM		 4237 nv->port_name[2] = 0x00;
4238 nv->port_name[3] = 0xe0;
4239 nv->port_name[4] = 0x8b;
4240 nv->port_name[5] = 0x1c;
4241 nv->port_name[6] = 0x55;
4242 nv->port_name[7] = 0x86;
4243 nv->node_name[0] = 0x20;
4244 nv->node_name[1] = 0x00;
4245 nv->node_name[2] = 0x00;
4246 nv->node_name[3] = 0xe0;
4247 nv->node_name[4] = 0x8b;
4248 nv->node_name[5] = 0x1c;
4249 nv->node_name[6] = 0x55;
4250 nv->node_name[7] = 0x86;
e315cd28 4251 qla24xx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 4252 nv->login_retry_count = __constant_cpu_to_le16(8);
4253 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4254 nv->login_timeout = __constant_cpu_to_le16(0);
4255 nv->firmware_options_1 =
4256 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4257 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4258 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4259 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4260 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4261 nv->efi_parameters = __constant_cpu_to_le32(0);
4262 nv->reset_delay = 5;
4263 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4264 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4265 nv->link_down_timeout = __constant_cpu_to_le16(30);
4266
4267 rval = 1;
0107109e
AV		 4268 }
4269
4270 /* Reset Initialization control block */
e315cd28 4271 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 4272
4273 /* Copy 1st segment. */
4274 dptr1 = (uint8_t *)icb;
4275 dptr2 = (uint8_t *)&nv->version;
4276 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4277 while (cnt--)
4278 *dptr1++ = *dptr2++;
4279
4280 icb->login_retry_count = nv->login_retry_count;
3ea66e28 4281 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 4282
4283 /* Copy 2nd segment. */
4284 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4285 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4286 cnt = (uint8_t *)&icb->reserved_3 -
4287 (uint8_t *)&icb->interrupt_delay_timer;
4288 while (cnt--)
4289 *dptr1++ = *dptr2++;
4290
4291 /*
4292 * Setup driver NVRAM options.
4293 */
e315cd28 4294 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 4295 "QLA2462");
0107109e 4296
5341e868
AV		 4297 /* Use alternate WWN? */
4298 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4299 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4300 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4301 }
4302
0107109e 4303 /* Prepare nodename */
fd0e7e4d 4304 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 4305 /*
4306 * Firmware will apply the following mask if the nodename was
4307 * not provided.
4308 */
4309 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4310 icb->node_name[0] &= 0xF0;
4311 }
4312
4313 /* Set host adapter parameters. */
4314 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 4315 ha->flags.enable_lip_reset = 0;
4316 ha->flags.enable_lip_full_login =
4317 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4318 ha->flags.enable_target_reset =
4319 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 4320 ha->flags.enable_led_scheme = 0;
d4c760c2 4321 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 4322
fd0e7e4d
AV		 4323 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4324 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 4325
4326 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4327 sizeof(ha->fw_seriallink_options24));
4328
4329 /* save HBA serial number */
4330 ha->serial0 = icb->port_name[5];
4331 ha->serial1 = icb->port_name[6];
4332 ha->serial2 = icb->port_name[7];
e315cd28
AC		 4333 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4334 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 4335
bc8fb3cb 4336 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4337
0107109e
AV		 4338 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4339
4340 /* Set minimum login_timeout to 4 seconds. */
4341 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4342 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4343 if (le16_to_cpu(nv->login_timeout) < 4)
4344 nv->login_timeout = __constant_cpu_to_le16(4);
4345 ha->login_timeout = le16_to_cpu(nv->login_timeout);
c6852c4c 4346 icb->login_timeout = nv->login_timeout;
0107109e 4347
00a537b8
AV		 4348 /* Set minimum RATOV to 100 tenths of a second. */
4349 ha->r_a_tov = 100;
0107109e
AV		 4350
4351 ha->loop_reset_delay = nv->reset_delay;
4352
4353 /* Link Down Timeout = 0:
4354 *
4355 * When Port Down timer expires we will start returning
4356 * I/O's to OS with "DID_NO_CONNECT".
4357 *
4358 * Link Down Timeout != 0:
4359 *
4360 * The driver waits for the link to come up after link down
4361 * before returning I/Os to OS with "DID_NO_CONNECT".
4362 */
4363 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4364 ha->loop_down_abort_time =
4365 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4366 } else {
4367 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4368 ha->loop_down_abort_time =
4369 (LOOP_DOWN_TIME - ha->link_down_timeout);
4370 }
4371
4372 /* Need enough time to try and get the port back. */
4373 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4374 if (qlport_down_retry)
4375 ha->port_down_retry_count = qlport_down_retry;
4376
4377 /* Set login_retry_count */
4378 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
4379 if (ha->port_down_retry_count ==
4380 le16_to_cpu(nv->port_down_retry_count) &&
4381 ha->port_down_retry_count > 3)
4382 ha->login_retry_count = ha->port_down_retry_count;
4383 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4384 ha->login_retry_count = ha->port_down_retry_count;
4385 if (ql2xloginretrycount)
4386 ha->login_retry_count = ql2xloginretrycount;
4387
4fdfefe5 4388 /* Enable ZIO. */
e315cd28 4389 if (!vha->flags.init_done) {
4fdfefe5
AV		 4390 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
4391 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4392 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
4393 le16_to_cpu(icb->interrupt_delay_timer): 2;
4394 }
4395 icb->firmware_options_2 &= __constant_cpu_to_le32(
4396 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
e315cd28 4397 vha->flags.process_response_queue = 0;
4fdfefe5 4398 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 4399 ha->zio_mode = QLA_ZIO_MODE_6;
4400
7c3df132 4401 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 4402 "ZIO mode %d enabled; timer delay (%d us).\n",
4403 ha->zio_mode, ha->zio_timer * 100);
4404
4405 icb->firmware_options_2 |= cpu_to_le32(
4406 (uint32_t)ha->zio_mode);
4407 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
e315cd28 4408 vha->flags.process_response_queue = 1;
4fdfefe5
AV		 4409 }
4410
4e08df3f 4411 if (rval) {
7c3df132
SK		 4412 ql_log(ql_log_warn, vha, 0x0070,
4413 "NVRAM configuration failed.\n");
4e08df3f
DM		 4414 }
4415 return (rval);
0107109e
AV		 4416}
4417
413975a0 4418static int
cbc8eb67
AV		 4419qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
4420 uint32_t faddr)
d1c61909 4421{
73208dfd 4422 int rval = QLA_SUCCESS;
d1c61909 4423 int segments, fragment;
d1c61909
AV		 4424 uint32_t *dcode, dlen;
4425 uint32_t risc_addr;
4426 uint32_t risc_size;
4427 uint32_t i;
e315cd28 4428 struct qla_hw_data *ha = vha->hw;
73208dfd 4429 struct req_que *req = ha->req_q_map[0];
eaac30be 4430
7c3df132 4431 ql_dbg(ql_dbg_init, vha, 0x008b,
cfb0919c 4432 "FW: Loading firmware from flash (%x).\n", faddr);
eaac30be 4433
d1c61909
AV		 4434 rval = QLA_SUCCESS;
4435
4436 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4437 dcode = (uint32_t *)req->ring;
d1c61909
AV		 4438 *srisc_addr = 0;
4439
4440 /* Validate firmware image by checking version. */
e315cd28 4441 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 4442 for (i = 0; i < 4; i++)
4443 dcode[i] = be32_to_cpu(dcode[i]);
4444 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4445 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4446 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4447 dcode[3] == 0)) {
7c3df132
SK		 4448 ql_log(ql_log_fatal, vha, 0x008c,
4449 "Unable to verify the integrity of flash firmware "
4450 "image.\n");
4451 ql_log(ql_log_fatal, vha, 0x008d,
4452 "Firmware data: %08x %08x %08x %08x.\n",
4453 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 4454
4455 return QLA_FUNCTION_FAILED;
4456 }
4457
4458 while (segments && rval == QLA_SUCCESS) {
4459 /* Read segment's load information. */
e315cd28 4460 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 4461
4462 risc_addr = be32_to_cpu(dcode[2]);
4463 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4464 risc_size = be32_to_cpu(dcode[3]);
4465
4466 fragment = 0;
4467 while (risc_size > 0 && rval == QLA_SUCCESS) {
4468 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4469 if (dlen > risc_size)
4470 dlen = risc_size;
4471
7c3df132
SK		 4472 ql_dbg(ql_dbg_init, vha, 0x008e,
4473 "Loading risc segment@ risc addr %x "
4474 "number of dwords 0x%x offset 0x%x.\n",
4475 risc_addr, dlen, faddr);
d1c61909 4476
e315cd28 4477 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 4478 for (i = 0; i < dlen; i++)
4479 dcode[i] = swab32(dcode[i]);
4480
73208dfd 4481 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 4482 dlen);
4483 if (rval) {
7c3df132
SK		 4484 ql_log(ql_log_fatal, vha, 0x008f,
4485 "Failed to load segment %d of firmware.\n",
4486 fragment);
d1c61909
AV		 4487 break;
4488 }
4489
4490 faddr += dlen;
4491 risc_addr += dlen;
4492 risc_size -= dlen;
4493 fragment++;
4494 }
4495
4496 /* Next segment. */
4497 segments--;
4498 }
4499
4500 return rval;
4501}
4502
d1c61909
AV		 4503#define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
4504
0107109e 4505int
e315cd28 4506qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 4507{
4508 int rval;
4509 int i, fragment;
4510 uint16_t *wcode, *fwcode;
4511 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
4512 struct fw_blob *blob;
e315cd28 4513 struct qla_hw_data *ha = vha->hw;
73208dfd 4514 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 4515
4516 /* Load firmware blob. */
e315cd28 4517 blob = qla2x00_request_firmware(vha);
5433383e 4518 if (!blob) {
7c3df132
SK		 4519 ql_log(ql_log_info, vha, 0x0083,
4520 "Fimware image unavailable.\n");
4521 ql_log(ql_log_info, vha, 0x0084,
4522 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 4523 return QLA_FUNCTION_FAILED;
4524 }
4525
4526 rval = QLA_SUCCESS;
4527
73208dfd 4528 wcode = (uint16_t *)req->ring;
5433383e
AV		 4529 *srisc_addr = 0;
4530 fwcode = (uint16_t *)blob->fw->data;
4531 fwclen = 0;
4532
4533 /* Validate firmware image by checking version. */
4534 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132
SK		 4535 ql_log(ql_log_fatal, vha, 0x0085,
4536 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e
AV		 4537 blob->fw->size);
4538 goto fail_fw_integrity;
4539 }
4540 for (i = 0; i < 4; i++)
4541 wcode[i] = be16_to_cpu(fwcode[i + 4]);
4542 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
4543 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
4544 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 4545 ql_log(ql_log_fatal, vha, 0x0086,
4546 "Unable to verify integrity of firmware image.\n");
4547 ql_log(ql_log_fatal, vha, 0x0087,
4548 "Firmware data: %04x %04x %04x %04x.\n",
4549 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 4550 goto fail_fw_integrity;
4551 }
4552
4553 seg = blob->segs;
4554 while (*seg && rval == QLA_SUCCESS) {
4555 risc_addr = *seg;
4556 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
4557 risc_size = be16_to_cpu(fwcode[3]);
4558
4559 /* Validate firmware image size. */
4560 fwclen += risc_size * sizeof(uint16_t);
4561 if (blob->fw->size < fwclen) {
7c3df132 4562 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 4563 "Unable to verify integrity of firmware image "
7c3df132 4564 "(%Zd).\n", blob->fw->size);
5433383e
AV		 4565 goto fail_fw_integrity;
4566 }
4567
4568 fragment = 0;
4569 while (risc_size > 0 && rval == QLA_SUCCESS) {
4570 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
4571 if (wlen > risc_size)
4572 wlen = risc_size;
7c3df132
SK		 4573 ql_dbg(ql_dbg_init, vha, 0x0089,
4574 "Loading risc segment@ risc addr %x number of "
4575 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 4576
4577 for (i = 0; i < wlen; i++)
4578 wcode[i] = swab16(fwcode[i]);
4579
73208dfd 4580 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 4581 wlen);
4582 if (rval) {
7c3df132
SK		 4583 ql_log(ql_log_fatal, vha, 0x008a,
4584 "Failed to load segment %d of firmware.\n",
4585 fragment);
5433383e
AV		 4586 break;
4587 }
4588
4589 fwcode += wlen;
4590 risc_addr += wlen;
4591 risc_size -= wlen;
4592 fragment++;
4593 }
4594
4595 /* Next segment. */
4596 seg++;
4597 }
4598 return rval;
4599
4600fail_fw_integrity:
4601 return QLA_FUNCTION_FAILED;
4602}
4603
eaac30be
AV		 4604static int
4605qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 4606{
4607 int rval;
4608 int segments, fragment;
4609 uint32_t *dcode, dlen;
4610 uint32_t risc_addr;
4611 uint32_t risc_size;
4612 uint32_t i;
5433383e 4613 struct fw_blob *blob;
0107109e 4614 uint32_t *fwcode, fwclen;
e315cd28 4615 struct qla_hw_data *ha = vha->hw;
73208dfd 4616 struct req_que *req = ha->req_q_map[0];
0107109e 4617
5433383e 4618 /* Load firmware blob. */
e315cd28 4619 blob = qla2x00_request_firmware(vha);
5433383e 4620 if (!blob) {
7c3df132
SK		 4621 ql_log(ql_log_warn, vha, 0x0090,
4622 "Fimware image unavailable.\n");
4623 ql_log(ql_log_warn, vha, 0x0091,
4624 "Firmware images can be retrieved from: "
4625 QLA_FW_URL ".\n");
d1c61909 4626
eaac30be 4627 return QLA_FUNCTION_FAILED;
0107109e
AV		 4628 }
4629
cfb0919c
CD		 4630 ql_dbg(ql_dbg_init, vha, 0x0092,
4631 "FW: Loading via request-firmware.\n");
eaac30be 4632
0107109e
AV		 4633 rval = QLA_SUCCESS;
4634
4635 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4636 dcode = (uint32_t *)req->ring;
0107109e 4637 *srisc_addr = 0;
5433383e 4638 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 4639 fwclen = 0;
4640
4641 /* Validate firmware image by checking version. */
5433383e 4642 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132
SK		 4643 ql_log(ql_log_fatal, vha, 0x0093,
4644 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e 4645 blob->fw->size);
0107109e
AV		 4646 goto fail_fw_integrity;
4647 }
4648 for (i = 0; i < 4; i++)
4649 dcode[i] = be32_to_cpu(fwcode[i + 4]);
4650 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4651 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4652 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4653 dcode[3] == 0)) {
7c3df132
SK		 4654 ql_log(ql_log_fatal, vha, 0x0094,
4655 "Unable to verify integrity of firmware image (%Zd).\n",
4656 blob->fw->size);
4657 ql_log(ql_log_fatal, vha, 0x0095,
4658 "Firmware data: %08x %08x %08x %08x.\n",
4659 dcode[0], dcode[1], dcode[2], dcode[3]);
0107109e
AV		 4660 goto fail_fw_integrity;
4661 }
4662
4663 while (segments && rval == QLA_SUCCESS) {
4664 risc_addr = be32_to_cpu(fwcode[2]);
4665 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4666 risc_size = be32_to_cpu(fwcode[3]);
4667
4668 /* Validate firmware image size. */
4669 fwclen += risc_size * sizeof(uint32_t);
5433383e 4670 if (blob->fw->size < fwclen) {
7c3df132 4671 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 4672 "Unable to verify integrity of firmware image "
7c3df132 4673 "(%Zd).\n", blob->fw->size);
5433383e 4674
0107109e
AV		 4675 goto fail_fw_integrity;
4676 }
4677
4678 fragment = 0;
4679 while (risc_size > 0 && rval == QLA_SUCCESS) {
4680 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4681 if (dlen > risc_size)
4682 dlen = risc_size;
4683
7c3df132
SK		 4684 ql_dbg(ql_dbg_init, vha, 0x0097,
4685 "Loading risc segment@ risc addr %x "
4686 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 4687
4688 for (i = 0; i < dlen; i++)
4689 dcode[i] = swab32(fwcode[i]);
4690
73208dfd 4691 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 4692 dlen);
0107109e 4693 if (rval) {
7c3df132
SK		 4694 ql_log(ql_log_fatal, vha, 0x0098,
4695 "Failed to load segment %d of firmware.\n",
4696 fragment);
0107109e
AV		 4697 break;
4698 }
4699
4700 fwcode += dlen;
4701 risc_addr += dlen;
4702 risc_size -= dlen;
4703 fragment++;
4704 }
4705
4706 /* Next segment. */
4707 segments--;
4708 }
0107109e
AV		 4709 return rval;
4710
4711fail_fw_integrity:
0107109e 4712 return QLA_FUNCTION_FAILED;
0107109e 4713}
18c6c127 4714
eaac30be
AV		 4715int
4716qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4717{
4718 int rval;
4719
e337d907
AV		 4720 if (ql2xfwloadbin == 1)
4721 return qla81xx_load_risc(vha, srisc_addr);
4722
eaac30be
AV		 4723 /*
4724 * FW Load priority:
4725 * 1) Firmware via request-firmware interface (.bin file).
4726 * 2) Firmware residing in flash.
4727 */
4728 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4729 if (rval == QLA_SUCCESS)
4730 return rval;
4731
cbc8eb67
AV		 4732 return qla24xx_load_risc_flash(vha, srisc_addr,
4733 vha->hw->flt_region_fw);
eaac30be
AV		 4734}
4735
4736int
4737qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4738{
4739 int rval;
cbc8eb67 4740 struct qla_hw_data *ha = vha->hw;
eaac30be 4741
e337d907 4742 if (ql2xfwloadbin == 2)
cbc8eb67 4743 goto try_blob_fw;
e337d907 4744
eaac30be
AV		 4745 /*
4746 * FW Load priority:
4747 * 1) Firmware residing in flash.
4748 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 4749 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 4750 */
cbc8eb67 4751 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 4752 if (rval == QLA_SUCCESS)
4753 return rval;
4754
cbc8eb67
AV		 4755try_blob_fw:
4756 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4757 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
4758 return rval;
4759
7c3df132
SK		 4760 ql_log(ql_log_info, vha, 0x0099,
4761 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 4762 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
4763 if (rval != QLA_SUCCESS)
4764 return rval;
4765
7c3df132 4766 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67 4767 ha->flags.running_gold_fw = 1;
cbc8eb67 4768 return rval;
eaac30be
AV		 4769}
4770
18c6c127 4771void
e315cd28 4772qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 4773{
4774 int ret, retries;
e315cd28 4775 struct qla_hw_data *ha = vha->hw;
18c6c127 4776
85880801
AV		 4777 if (ha->flags.pci_channel_io_perm_failure)
4778 return;
e428924c 4779 if (!IS_FWI2_CAPABLE(ha))
18c6c127 4780 return;
75edf81d
AV		 4781 if (!ha->fw_major_version)
4782 return;
18c6c127 4783
e315cd28 4784 ret = qla2x00_stop_firmware(vha);
7c7f1f29 4785 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 4786 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 4787 ha->isp_ops->reset_chip(vha);
4788 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 4789 continue;
e315cd28 4790 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 4791 continue;
7c3df132
SK		 4792 ql_log(ql_log_info, vha, 0x8015,
4793 "Attempting retry of stop-firmware command.\n");
e315cd28 4794 ret = qla2x00_stop_firmware(vha);
18c6c127
AV		 4795 }
4796}
2c3dfe3f
SJ		 4797
4798int
e315cd28 4799qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 4800{
4801 int rval = QLA_SUCCESS;
0b91d116 4802 int rval2;
2c3dfe3f 4803 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 4804 struct qla_hw_data *ha = vha->hw;
4805 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 4806 struct req_que *req;
4807 struct rsp_que *rsp;
2c3dfe3f 4808
e315cd28 4809 if (!vha->vp_idx)
2c3dfe3f
SJ		 4810 return -EINVAL;
4811
e315cd28 4812 rval = qla2x00_fw_ready(base_vha);
7163ea81 4813 if (ha->flags.cpu_affinity_enabled)
67c2e93a
AC		 4814 req = ha->req_q_map[0];
4815 else
4816 req = vha->req;
4817 rsp = req->rsp;
4818
2c3dfe3f 4819 if (rval == QLA_SUCCESS) {
e315cd28 4820 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 4821 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 4822 }
4823
e315cd28 4824 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 4825
4826 /* Login to SNS first */
0b91d116
CD		 4827 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
4828 BIT_1);
4829 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
4830 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
4831 ql_dbg(ql_dbg_init, vha, 0x0120,
4832 "Failed SNS login: loop_id=%x, rval2=%d\n",
4833 NPH_SNS, rval2);
4834 else
4835 ql_dbg(ql_dbg_init, vha, 0x0103,
4836 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
4837 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
4838 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 4839 return (QLA_FUNCTION_FAILED);
4840 }
4841
e315cd28
AC		 4842 atomic_set(&vha->loop_down_timer, 0);
4843 atomic_set(&vha->loop_state, LOOP_UP);
4844 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4845 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4846 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 4847
4848 return rval;
4849}
4d4df193
HK		 4850
4851/* 84XX Support **************************************************************/
4852
4853static LIST_HEAD(qla_cs84xx_list);
4854static DEFINE_MUTEX(qla_cs84xx_mutex);
4855
4856static struct qla_chip_state_84xx *
e315cd28 4857qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 4858{
4859 struct qla_chip_state_84xx *cs84xx;
e315cd28 4860 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 4861
4862 mutex_lock(&qla_cs84xx_mutex);
4863
4864 /* Find any shared 84xx chip. */
4865 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
4866 if (cs84xx->bus == ha->pdev->bus) {
4867 kref_get(&cs84xx->kref);
4868 goto done;
4869 }
4870 }
4871
4872 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
4873 if (!cs84xx)
4874 goto done;
4875
4876 kref_init(&cs84xx->kref);
4877 spin_lock_init(&cs84xx->access_lock);
4878 mutex_init(&cs84xx->fw_update_mutex);
4879 cs84xx->bus = ha->pdev->bus;
4880
4881 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
4882done:
4883 mutex_unlock(&qla_cs84xx_mutex);
4884 return cs84xx;
4885}
4886
4887static void
4888__qla84xx_chip_release(struct kref *kref)
4889{
4890 struct qla_chip_state_84xx *cs84xx =
4891 container_of(kref, struct qla_chip_state_84xx, kref);
4892
4893 mutex_lock(&qla_cs84xx_mutex);
4894 list_del(&cs84xx->list);
4895 mutex_unlock(&qla_cs84xx_mutex);
4896 kfree(cs84xx);
4897}
4898
4899void
e315cd28 4900qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 4901{
e315cd28 4902 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 4903 if (ha->cs84xx)
4904 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
4905}
4906
4907static int
e315cd28 4908qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 4909{
4910 int rval;
4911 uint16_t status[2];
e315cd28 4912 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 4913
4914 mutex_lock(&ha->cs84xx->fw_update_mutex);
4915
e315cd28 4916 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 4917
4918 mutex_unlock(&ha->cs84xx->fw_update_mutex);
4919
4920 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
4921 QLA_SUCCESS;
4922}
3a03eb79
AV		 4923
4924/* 81XX Support **************************************************************/
4925
4926int
4927qla81xx_nvram_config(scsi_qla_host_t *vha)
4928{
4929 int rval;
4930 struct init_cb_81xx *icb;
4931 struct nvram_81xx *nv;
4932 uint32_t *dptr;
4933 uint8_t *dptr1, *dptr2;
4934 uint32_t chksum;
4935 uint16_t cnt;
4936 struct qla_hw_data *ha = vha->hw;
4937
4938 rval = QLA_SUCCESS;
4939 icb = (struct init_cb_81xx *)ha->init_cb;
4940 nv = ha->nvram;
4941
4942 /* Determine NVRAM starting address. */
4943 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 4944 ha->vpd_size = FA_NVRAM_VPD_SIZE;
3a03eb79
AV		 4945
4946 /* Get VPD data into cache */
4947 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 4948 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
4949 ha->vpd_size);
3a03eb79
AV		 4950
4951 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 4952 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 4953 ha->nvram_size);
3d79038f 4954 dptr = (uint32_t *)nv;
3a03eb79
AV		 4955 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4956 chksum += le32_to_cpu(*dptr++);
4957
7c3df132
SK		 4958 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
4959 "Contents of NVRAM:\n");
4960 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
4961 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 4962
4963 /* Bad NVRAM data, set defaults parameters. */
4964 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4965 || nv->id[3] != ' ' ||
4966 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4967 /* Reset NVRAM data. */
7c3df132 4968 ql_log(ql_log_info, vha, 0x0073,
9e336520 4969 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132 4970 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 4971 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 4972 ql_log(ql_log_info, vha, 0x0074,
4973 "Falling back to functioning (yet invalid -- WWPN) "
4974 "defaults.\n");
3a03eb79
AV		 4975
4976 /*
4977 * Set default initialization control block.
4978 */
4979 memset(nv, 0, ha->nvram_size);
4980 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4981 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4982 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4983 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4984 nv->exchange_count = __constant_cpu_to_le16(0);
4985 nv->port_name[0] = 0x21;
e5b68a61 4986 nv->port_name[1] = 0x00 + ha->port_no;
3a03eb79
AV		 4987 nv->port_name[2] = 0x00;
4988 nv->port_name[3] = 0xe0;
4989 nv->port_name[4] = 0x8b;
4990 nv->port_name[5] = 0x1c;
4991 nv->port_name[6] = 0x55;
4992 nv->port_name[7] = 0x86;
4993 nv->node_name[0] = 0x20;
4994 nv->node_name[1] = 0x00;
4995 nv->node_name[2] = 0x00;
4996 nv->node_name[3] = 0xe0;
4997 nv->node_name[4] = 0x8b;
4998 nv->node_name[5] = 0x1c;
4999 nv->node_name[6] = 0x55;
5000 nv->node_name[7] = 0x86;
5001 nv->login_retry_count = __constant_cpu_to_le16(8);
5002 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5003 nv->login_timeout = __constant_cpu_to_le16(0);
5004 nv->firmware_options_1 =
5005 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5006 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5007 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5008 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5009 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5010 nv->efi_parameters = __constant_cpu_to_le32(0);
5011 nv->reset_delay = 5;
5012 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5013 nv->port_down_retry_count = __constant_cpu_to_le16(30);
6246b8a1 5014 nv->link_down_timeout = __constant_cpu_to_le16(180);
eeebcc92 5015 nv->enode_mac[0] = 0x00;
6246b8a1
GM		 5016 nv->enode_mac[1] = 0xC0;
5017 nv->enode_mac[2] = 0xDD;
3a03eb79
AV		 5018 nv->enode_mac[3] = 0x04;
5019 nv->enode_mac[4] = 0x05;
e5b68a61 5020 nv->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5021
5022 rval = 1;
5023 }
5024
5025 /* Reset Initialization control block */
773120e4 5026 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 5027
5028 /* Copy 1st segment. */
5029 dptr1 = (uint8_t *)icb;
5030 dptr2 = (uint8_t *)&nv->version;
5031 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5032 while (cnt--)
5033 *dptr1++ = *dptr2++;
5034
5035 icb->login_retry_count = nv->login_retry_count;
5036
5037 /* Copy 2nd segment. */
5038 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5039 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5040 cnt = (uint8_t *)&icb->reserved_5 -
5041 (uint8_t *)&icb->interrupt_delay_timer;
5042 while (cnt--)
5043 *dptr1++ = *dptr2++;
5044
5045 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5046 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5047 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
69e5f1ea
AV		 5048 icb->enode_mac[0] = 0x00;
5049 icb->enode_mac[1] = 0xC0;
5050 icb->enode_mac[2] = 0xDD;
3a03eb79
AV		 5051 icb->enode_mac[3] = 0x04;
5052 icb->enode_mac[4] = 0x05;
e5b68a61 5053 icb->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5054 }
5055
b64b0e8f
AV		 5056 /* Use extended-initialization control block. */
5057 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5058
3a03eb79
AV		 5059 /*
5060 * Setup driver NVRAM options.
5061 */
5062 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 5063 "QLE8XXX");
3a03eb79
AV		 5064
5065 /* Use alternate WWN? */
5066 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5067 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5068 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5069 }
5070
5071 /* Prepare nodename */
5072 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5073 /*
5074 * Firmware will apply the following mask if the nodename was
5075 * not provided.
5076 */
5077 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5078 icb->node_name[0] &= 0xF0;
5079 }
5080
5081 /* Set host adapter parameters. */
5082 ha->flags.disable_risc_code_load = 0;
5083 ha->flags.enable_lip_reset = 0;
5084 ha->flags.enable_lip_full_login =
5085 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5086 ha->flags.enable_target_reset =
5087 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5088 ha->flags.enable_led_scheme = 0;
5089 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5090
5091 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5092 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5093
5094 /* save HBA serial number */
5095 ha->serial0 = icb->port_name[5];
5096 ha->serial1 = icb->port_name[6];
5097 ha->serial2 = icb->port_name[7];
5098 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5099 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5100
5101 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5102
5103 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5104
5105 /* Set minimum login_timeout to 4 seconds. */
5106 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5107 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5108 if (le16_to_cpu(nv->login_timeout) < 4)
5109 nv->login_timeout = __constant_cpu_to_le16(4);
5110 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5111 icb->login_timeout = nv->login_timeout;
5112
5113 /* Set minimum RATOV to 100 tenths of a second. */
5114 ha->r_a_tov = 100;
5115
5116 ha->loop_reset_delay = nv->reset_delay;
5117
5118 /* Link Down Timeout = 0:
5119 *
5120 * When Port Down timer expires we will start returning
5121 * I/O's to OS with "DID_NO_CONNECT".
5122 *
5123 * Link Down Timeout != 0:
5124 *
5125 * The driver waits for the link to come up after link down
5126 * before returning I/Os to OS with "DID_NO_CONNECT".
5127 */
5128 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5129 ha->loop_down_abort_time =
5130 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5131 } else {
5132 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5133 ha->loop_down_abort_time =
5134 (LOOP_DOWN_TIME - ha->link_down_timeout);
5135 }
5136
5137 /* Need enough time to try and get the port back. */
5138 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5139 if (qlport_down_retry)
5140 ha->port_down_retry_count = qlport_down_retry;
5141
5142 /* Set login_retry_count */
5143 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5144 if (ha->port_down_retry_count ==
5145 le16_to_cpu(nv->port_down_retry_count) &&
5146 ha->port_down_retry_count > 3)
5147 ha->login_retry_count = ha->port_down_retry_count;
5148 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5149 ha->login_retry_count = ha->port_down_retry_count;
5150 if (ql2xloginretrycount)
5151 ha->login_retry_count = ql2xloginretrycount;
5152
6246b8a1
GM		 5153 /* if not running MSI-X we need handshaking on interrupts */
5154 if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha))
5155 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
5156
3a03eb79
AV		 5157 /* Enable ZIO. */
5158 if (!vha->flags.init_done) {
5159 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5160 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5161 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5162 le16_to_cpu(icb->interrupt_delay_timer): 2;
5163 }
5164 icb->firmware_options_2 &= __constant_cpu_to_le32(
5165 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5166 vha->flags.process_response_queue = 0;
5167 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5168 ha->zio_mode = QLA_ZIO_MODE_6;
5169
7c3df132 5170 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 5171 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 5172 ha->zio_mode,
5173 ha->zio_timer * 100);
3a03eb79
AV		 5174
5175 icb->firmware_options_2 |= cpu_to_le32(
5176 (uint32_t)ha->zio_mode);
5177 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5178 vha->flags.process_response_queue = 1;
5179 }
5180
5181 if (rval) {
7c3df132
SK		 5182 ql_log(ql_log_warn, vha, 0x0076,
5183 "NVRAM configuration failed.\n");
3a03eb79
AV		 5184 }
5185 return (rval);
5186}
5187
a9083016
GM		 5188int
5189qla82xx_restart_isp(scsi_qla_host_t *vha)
5190{
5191 int status, rval;
5192 uint32_t wait_time;
5193 struct qla_hw_data *ha = vha->hw;
5194 struct req_que *req = ha->req_q_map[0];
5195 struct rsp_que *rsp = ha->rsp_q_map[0];
5196 struct scsi_qla_host *vp;
feafb7b1 5197 unsigned long flags;
a9083016
GM		 5198
5199 status = qla2x00_init_rings(vha);
5200 if (!status) {
5201 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5202 ha->flags.chip_reset_done = 1;
5203
5204 status = qla2x00_fw_ready(vha);
5205 if (!status) {
7c3df132
SK		 5206 ql_log(ql_log_info, vha, 0x803c,
5207 "Start configure loop, status =%d.\n", status);
a9083016
GM		 5208
5209 /* Issue a marker after FW becomes ready. */
5210 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5211
5212 vha->flags.online = 1;
5213 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5214 wait_time = 256;
5215 do {
5216 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5217 qla2x00_configure_loop(vha);
5218 wait_time--;
5219 } while (!atomic_read(&vha->loop_down_timer) &&
5220 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5221 wait_time &&
5222 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5223 }
5224
5225 /* if no cable then assume it's good */
5226 if ((vha->device_flags & DFLG_NO_CABLE))
5227 status = 0;
5228
cfb0919c 5229 ql_log(ql_log_info, vha, 0x8000,
7c3df132 5230 "Configure loop done, status = 0x%x.\n", status);
a9083016
GM		 5231 }
5232
5233 if (!status) {
5234 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5235
5236 if (!atomic_read(&vha->loop_down_timer)) {
5237 /*
5238 * Issue marker command only when we are going
5239 * to start the I/O .
5240 */
5241 vha->marker_needed = 1;
5242 }
5243
5244 vha->flags.online = 1;
5245
5246 ha->isp_ops->enable_intrs(ha);
5247
5248 ha->isp_abort_cnt = 0;
5249 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5250
53296788 5251 /* Update the firmware version */
3173167f 5252 status = qla82xx_check_md_needed(vha);
53296788 5253
a9083016
GM		 5254 if (ha->fce) {
5255 ha->flags.fce_enabled = 1;
5256 memset(ha->fce, 0,
5257 fce_calc_size(ha->fce_bufs));
5258 rval = qla2x00_enable_fce_trace(vha,
5259 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5260 &ha->fce_bufs);
5261 if (rval) {
cfb0919c 5262 ql_log(ql_log_warn, vha, 0x8001,
7c3df132
SK		 5263 "Unable to reinitialize FCE (%d).\n",
5264 rval);
a9083016
GM		 5265 ha->flags.fce_enabled = 0;
5266 }
5267 }
5268
5269 if (ha->eft) {
5270 memset(ha->eft, 0, EFT_SIZE);
5271 rval = qla2x00_enable_eft_trace(vha,
5272 ha->eft_dma, EFT_NUM_BUFFERS);
5273 if (rval) {
cfb0919c 5274 ql_log(ql_log_warn, vha, 0x8010,
7c3df132
SK		 5275 "Unable to reinitialize EFT (%d).\n",
5276 rval);
a9083016
GM		 5277 }
5278 }
a9083016
GM		 5279 }
5280
5281 if (!status) {
cfb0919c 5282 ql_dbg(ql_dbg_taskm, vha, 0x8011,
7c3df132 5283 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 5284
5285 spin_lock_irqsave(&ha->vport_slock, flags);
5286 list_for_each_entry(vp, &ha->vp_list, list) {
5287 if (vp->vp_idx) {
5288 atomic_inc(&vp->vref_count);
5289 spin_unlock_irqrestore(&ha->vport_slock, flags);
5290
a9083016 5291 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 5292
5293 spin_lock_irqsave(&ha->vport_slock, flags);
5294 atomic_dec(&vp->vref_count);
5295 }
a9083016 5296 }
feafb7b1
AE		 5297 spin_unlock_irqrestore(&ha->vport_slock, flags);
5298
a9083016 5299 } else {
cfb0919c 5300 ql_log(ql_log_warn, vha, 0x8016,
7c3df132 5301 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 5302 }
5303
5304 return status;
5305}
5306
3a03eb79 5307void
ae97c91e 5308qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 5309{
ae97c91e
AV		 5310 struct qla_hw_data *ha = vha->hw;
5311
5312 if (!ql2xetsenable)
5313 return;
5314
5315 /* Enable ETS Burst. */
5316 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5317 ha->fw_options[2] |= BIT_9;
5318 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 5319}
09ff701a
SR		 5320
5321/*
5322 * qla24xx_get_fcp_prio
5323 * Gets the fcp cmd priority value for the logged in port.
5324 * Looks for a match of the port descriptors within
5325 * each of the fcp prio config entries. If a match is found,
5326 * the tag (priority) value is returned.
5327 *
5328 * Input:
21090cbe 5329 * vha = scsi host structure pointer.
09ff701a
SR		 5330 * fcport = port structure pointer.
5331 *
5332 * Return:
6c452a45 5333 * non-zero (if found)
f28a0a96 5334 * -1 (if not found)
09ff701a
SR		 5335 *
5336 * Context:
5337 * Kernel context
5338 */
f28a0a96 5339static int
09ff701a
SR		 5340qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5341{
5342 int i, entries;
5343 uint8_t pid_match, wwn_match;
f28a0a96 5344 int priority;
09ff701a
SR		 5345 uint32_t pid1, pid2;
5346 uint64_t wwn1, wwn2;
5347 struct qla_fcp_prio_entry *pri_entry;
5348 struct qla_hw_data *ha = vha->hw;
5349
5350 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 5351 return -1;
09ff701a 5352
f28a0a96 5353 priority = -1;
09ff701a
SR		 5354 entries = ha->fcp_prio_cfg->num_entries;
5355 pri_entry = &ha->fcp_prio_cfg->entry[0];
5356
5357 for (i = 0; i < entries; i++) {
5358 pid_match = wwn_match = 0;
5359
5360 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5361 pri_entry++;
5362 continue;
5363 }
5364
5365 /* check source pid for a match */
5366 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5367 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5368 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
5369 if (pid1 == INVALID_PORT_ID)
5370 pid_match++;
5371 else if (pid1 == pid2)
5372 pid_match++;
5373 }
5374
5375 /* check destination pid for a match */
5376 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
5377 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
5378 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
5379 if (pid1 == INVALID_PORT_ID)
5380 pid_match++;
5381 else if (pid1 == pid2)
5382 pid_match++;
5383 }
5384
5385 /* check source WWN for a match */
5386 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
5387 wwn1 = wwn_to_u64(vha->port_name);
5388 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
5389 if (wwn2 == (uint64_t)-1)
5390 wwn_match++;
5391 else if (wwn1 == wwn2)
5392 wwn_match++;
5393 }
5394
5395 /* check destination WWN for a match */
5396 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
5397 wwn1 = wwn_to_u64(fcport->port_name);
5398 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
5399 if (wwn2 == (uint64_t)-1)
5400 wwn_match++;
5401 else if (wwn1 == wwn2)
5402 wwn_match++;
5403 }
5404
5405 if (pid_match == 2 || wwn_match == 2) {
5406 /* Found a matching entry */
5407 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
5408 priority = pri_entry->tag;
5409 break;
5410 }
5411
5412 pri_entry++;
5413 }
5414
5415 return priority;
5416}
5417
5418/*
5419 * qla24xx_update_fcport_fcp_prio
5420 * Activates fcp priority for the logged in fc port
5421 *
5422 * Input:
21090cbe 5423 * vha = scsi host structure pointer.
09ff701a
SR		 5424 * fcp = port structure pointer.
5425 *
5426 * Return:
5427 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5428 *
5429 * Context:
5430 * Kernel context.
5431 */
5432int
21090cbe 5433qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 5434{
5435 int ret;
f28a0a96 5436 int priority;
09ff701a
SR		 5437 uint16_t mb[5];
5438
21090cbe
MI		 5439 if (fcport->port_type != FCT_TARGET ||
5440 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 5441 return QLA_FUNCTION_FAILED;
5442
21090cbe 5443 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 5444 if (priority < 0)
5445 return QLA_FUNCTION_FAILED;
5446
a00f6296
SK		 5447 if (IS_QLA82XX(vha->hw)) {
5448 fcport->fcp_prio = priority & 0xf;
5449 return QLA_SUCCESS;
5450 }
5451
21090cbe 5452 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
cfb0919c
CD		 5453 if (ret == QLA_SUCCESS) {
5454 if (fcport->fcp_prio != priority)
5455 ql_dbg(ql_dbg_user, vha, 0x709e,
5456 "Updated FCP_CMND priority - value=%d loop_id=%d "
5457 "port_id=%02x%02x%02x.\n", priority,
5458 fcport->loop_id, fcport->d_id.b.domain,
5459 fcport->d_id.b.area, fcport->d_id.b.al_pa);
a00f6296 5460 fcport->fcp_prio = priority & 0xf;
cfb0919c 5461 } else
7c3df132 5462 ql_dbg(ql_dbg_user, vha, 0x704f,
cfb0919c
CD		 5463 "Unable to update FCP_CMND priority - ret=0x%x for "
5464 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
5465 fcport->d_id.b.domain, fcport->d_id.b.area,
5466 fcport->d_id.b.al_pa);
09ff701a
SR		 5467 return ret;
5468}
5469
5470/*
5471 * qla24xx_update_all_fcp_prio
5472 * Activates fcp priority for all the logged in ports
5473 *
5474 * Input:
5475 * ha = adapter block pointer.
5476 *
5477 * Return:
5478 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5479 *
5480 * Context:
5481 * Kernel context.
5482 */
5483int
5484qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
5485{
5486 int ret;
5487 fc_port_t *fcport;
5488
5489 ret = QLA_FUNCTION_FAILED;
5490 /* We need to set priority for all logged in ports */
5491 list_for_each_entry(fcport, &vha->vp_fcports, list)
5492 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
5493
5494 return ret;
5495}
Linux kernel - Deliverables
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