Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
de7c5d05 | 3 | * Copyright (c) 2003-2010 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0107109e | 12 | #include <linux/vmalloc.h> |
1da177e4 LT |
13 | |
14 | #include "qla_devtbl.h" | |
15 | ||
4e08df3f DM |
16 | #ifdef CONFIG_SPARC |
17 | #include <asm/prom.h> | |
4e08df3f DM |
18 | #endif |
19 | ||
1da177e4 LT |
20 | /* |
21 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
22 | */ | |
1da177e4 | 23 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 24 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
25 | static int qla2x00_init_rings(scsi_qla_host_t *); |
26 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
27 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
28 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
29 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
30 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
31 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
32 | static int qla2x00_device_resync(scsi_qla_host_t *); | |
33 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, | |
34 | uint16_t *); | |
1da177e4 LT |
35 | |
36 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 37 | |
e315cd28 | 38 | static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *); |
413975a0 | 39 | |
4d4df193 HK |
40 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
41 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 42 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 43 | |
ac280b67 AV |
44 | /* SRB Extensions ---------------------------------------------------------- */ |
45 | ||
46 | static void | |
47 | qla2x00_ctx_sp_timeout(unsigned long __data) | |
48 | { | |
49 | srb_t *sp = (srb_t *)__data; | |
50 | struct srb_ctx *ctx; | |
4916392b | 51 | struct srb_iocb *iocb; |
ac280b67 AV |
52 | fc_port_t *fcport = sp->fcport; |
53 | struct qla_hw_data *ha = fcport->vha->hw; | |
54 | struct req_que *req; | |
55 | unsigned long flags; | |
56 | ||
57 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
58 | req = ha->req_q_map[0]; | |
59 | req->outstanding_cmds[sp->handle] = NULL; | |
60 | ctx = sp->ctx; | |
4916392b MI |
61 | iocb = ctx->u.iocb_cmd; |
62 | iocb->timeout(sp); | |
4916392b | 63 | iocb->free(sp); |
6ac52608 | 64 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
ac280b67 AV |
65 | } |
66 | ||
3dbe756a | 67 | static void |
ac280b67 AV |
68 | qla2x00_ctx_sp_free(srb_t *sp) |
69 | { | |
70 | struct srb_ctx *ctx = sp->ctx; | |
4916392b | 71 | struct srb_iocb *iocb = ctx->u.iocb_cmd; |
feafb7b1 | 72 | struct scsi_qla_host *vha = sp->fcport->vha; |
ac280b67 | 73 | |
4916392b MI |
74 | del_timer_sync(&iocb->timer); |
75 | kfree(iocb); | |
ac280b67 AV |
76 | kfree(ctx); |
77 | mempool_free(sp, sp->fcport->vha->hw->srb_mempool); | |
feafb7b1 AE |
78 | |
79 | QLA_VHA_MARK_NOT_BUSY(vha); | |
ac280b67 AV |
80 | } |
81 | ||
82 | inline srb_t * | |
83 | qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size, | |
84 | unsigned long tmo) | |
85 | { | |
feafb7b1 | 86 | srb_t *sp = NULL; |
ac280b67 AV |
87 | struct qla_hw_data *ha = vha->hw; |
88 | struct srb_ctx *ctx; | |
4916392b | 89 | struct srb_iocb *iocb; |
feafb7b1 AE |
90 | uint8_t bail; |
91 | ||
92 | QLA_VHA_MARK_BUSY(vha, bail); | |
93 | if (bail) | |
94 | return NULL; | |
ac280b67 AV |
95 | |
96 | sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL); | |
97 | if (!sp) | |
98 | goto done; | |
99 | ctx = kzalloc(size, GFP_KERNEL); | |
100 | if (!ctx) { | |
101 | mempool_free(sp, ha->srb_mempool); | |
4916392b MI |
102 | sp = NULL; |
103 | goto done; | |
104 | } | |
105 | iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL); | |
106 | if (!iocb) { | |
107 | mempool_free(sp, ha->srb_mempool); | |
108 | sp = NULL; | |
109 | kfree(ctx); | |
ac280b67 AV |
110 | goto done; |
111 | } | |
112 | ||
113 | memset(sp, 0, sizeof(*sp)); | |
114 | sp->fcport = fcport; | |
115 | sp->ctx = ctx; | |
4916392b MI |
116 | ctx->u.iocb_cmd = iocb; |
117 | iocb->free = qla2x00_ctx_sp_free; | |
ac280b67 | 118 | |
4916392b | 119 | init_timer(&iocb->timer); |
ac280b67 AV |
120 | if (!tmo) |
121 | goto done; | |
4916392b MI |
122 | iocb->timer.expires = jiffies + tmo * HZ; |
123 | iocb->timer.data = (unsigned long)sp; | |
124 | iocb->timer.function = qla2x00_ctx_sp_timeout; | |
125 | add_timer(&iocb->timer); | |
ac280b67 | 126 | done: |
feafb7b1 AE |
127 | if (!sp) |
128 | QLA_VHA_MARK_NOT_BUSY(vha); | |
ac280b67 AV |
129 | return sp; |
130 | } | |
131 | ||
132 | /* Asynchronous Login/Logout Routines -------------------------------------- */ | |
133 | ||
5b91490e AV |
134 | static inline unsigned long |
135 | qla2x00_get_async_timeout(struct scsi_qla_host *vha) | |
136 | { | |
137 | unsigned long tmo; | |
138 | struct qla_hw_data *ha = vha->hw; | |
139 | ||
140 | /* Firmware should use switch negotiated r_a_tov for timeout. */ | |
141 | tmo = ha->r_a_tov / 10 * 2; | |
142 | if (!IS_FWI2_CAPABLE(ha)) { | |
143 | /* | |
144 | * Except for earlier ISPs where the timeout is seeded from the | |
145 | * initialization control block. | |
146 | */ | |
147 | tmo = ha->login_timeout; | |
148 | } | |
149 | return tmo; | |
150 | } | |
ac280b67 AV |
151 | |
152 | static void | |
3822263e | 153 | qla2x00_async_iocb_timeout(srb_t *sp) |
ac280b67 AV |
154 | { |
155 | fc_port_t *fcport = sp->fcport; | |
4916392b | 156 | struct srb_ctx *ctx = sp->ctx; |
ac280b67 AV |
157 | |
158 | DEBUG2(printk(KERN_WARNING | |
d3fa9e7d AV |
159 | "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n", |
160 | fcport->vha->host_no, sp->handle, | |
161 | ctx->name, fcport->d_id.b.domain, | |
162 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
ac280b67 | 163 | |
5ff1d584 | 164 | fcport->flags &= ~FCF_ASYNC_SENT; |
6ac52608 AV |
165 | if (ctx->type == SRB_LOGIN_CMD) { |
166 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
ac280b67 | 167 | qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); |
6ac52608 AV |
168 | /* Retry as needed. */ |
169 | lio->u.logio.data[0] = MBS_COMMAND_ERROR; | |
170 | lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? | |
171 | QLA_LOGIO_LOGIN_RETRIED : 0; | |
172 | qla2x00_post_async_login_done_work(fcport->vha, fcport, | |
173 | lio->u.logio.data); | |
174 | } | |
ac280b67 AV |
175 | } |
176 | ||
99b0bec7 AV |
177 | static void |
178 | qla2x00_async_login_ctx_done(srb_t *sp) | |
179 | { | |
4916392b MI |
180 | struct srb_ctx *ctx = sp->ctx; |
181 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
99b0bec7 AV |
182 | |
183 | qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
184 | lio->u.logio.data); |
185 | lio->free(sp); | |
99b0bec7 AV |
186 | } |
187 | ||
ac280b67 AV |
188 | int |
189 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
190 | uint16_t *data) | |
191 | { | |
ac280b67 | 192 | srb_t *sp; |
4916392b MI |
193 | struct srb_ctx *ctx; |
194 | struct srb_iocb *lio; | |
ac280b67 AV |
195 | int rval; |
196 | ||
197 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 198 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 199 | qla2x00_get_async_timeout(vha) + 2); |
ac280b67 AV |
200 | if (!sp) |
201 | goto done; | |
202 | ||
4916392b MI |
203 | ctx = sp->ctx; |
204 | ctx->type = SRB_LOGIN_CMD; | |
205 | ctx->name = "login"; | |
206 | lio = ctx->u.iocb_cmd; | |
3822263e | 207 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b MI |
208 | lio->done = qla2x00_async_login_ctx_done; |
209 | lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; | |
ac280b67 | 210 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 211 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
ac280b67 AV |
212 | rval = qla2x00_start_sp(sp); |
213 | if (rval != QLA_SUCCESS) | |
214 | goto done_free_sp; | |
215 | ||
216 | DEBUG2(printk(KERN_DEBUG | |
217 | "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x " | |
218 | "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id, | |
219 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
220 | fcport->login_retry)); | |
221 | return rval; | |
222 | ||
223 | done_free_sp: | |
4916392b | 224 | lio->free(sp); |
ac280b67 AV |
225 | done: |
226 | return rval; | |
227 | } | |
228 | ||
99b0bec7 AV |
229 | static void |
230 | qla2x00_async_logout_ctx_done(srb_t *sp) | |
231 | { | |
4916392b MI |
232 | struct srb_ctx *ctx = sp->ctx; |
233 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
99b0bec7 AV |
234 | |
235 | qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
236 | lio->u.logio.data); |
237 | lio->free(sp); | |
99b0bec7 AV |
238 | } |
239 | ||
ac280b67 AV |
240 | int |
241 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
242 | { | |
ac280b67 | 243 | srb_t *sp; |
4916392b MI |
244 | struct srb_ctx *ctx; |
245 | struct srb_iocb *lio; | |
ac280b67 AV |
246 | int rval; |
247 | ||
248 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 249 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 250 | qla2x00_get_async_timeout(vha) + 2); |
ac280b67 AV |
251 | if (!sp) |
252 | goto done; | |
253 | ||
4916392b MI |
254 | ctx = sp->ctx; |
255 | ctx->type = SRB_LOGOUT_CMD; | |
256 | ctx->name = "logout"; | |
257 | lio = ctx->u.iocb_cmd; | |
3822263e | 258 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b | 259 | lio->done = qla2x00_async_logout_ctx_done; |
ac280b67 AV |
260 | rval = qla2x00_start_sp(sp); |
261 | if (rval != QLA_SUCCESS) | |
262 | goto done_free_sp; | |
263 | ||
264 | DEBUG2(printk(KERN_DEBUG | |
265 | "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n", | |
266 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
267 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
268 | return rval; | |
269 | ||
270 | done_free_sp: | |
4916392b | 271 | lio->free(sp); |
ac280b67 AV |
272 | done: |
273 | return rval; | |
274 | } | |
275 | ||
5ff1d584 AV |
276 | static void |
277 | qla2x00_async_adisc_ctx_done(srb_t *sp) | |
278 | { | |
4916392b MI |
279 | struct srb_ctx *ctx = sp->ctx; |
280 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
5ff1d584 AV |
281 | |
282 | qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
283 | lio->u.logio.data); |
284 | lio->free(sp); | |
5ff1d584 AV |
285 | } |
286 | ||
287 | int | |
288 | qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, | |
289 | uint16_t *data) | |
290 | { | |
5ff1d584 | 291 | srb_t *sp; |
4916392b MI |
292 | struct srb_ctx *ctx; |
293 | struct srb_iocb *lio; | |
5ff1d584 AV |
294 | int rval; |
295 | ||
296 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 297 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 298 | qla2x00_get_async_timeout(vha) + 2); |
5ff1d584 AV |
299 | if (!sp) |
300 | goto done; | |
301 | ||
4916392b MI |
302 | ctx = sp->ctx; |
303 | ctx->type = SRB_ADISC_CMD; | |
304 | ctx->name = "adisc"; | |
305 | lio = ctx->u.iocb_cmd; | |
3822263e | 306 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b | 307 | lio->done = qla2x00_async_adisc_ctx_done; |
5ff1d584 | 308 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 309 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
5ff1d584 AV |
310 | rval = qla2x00_start_sp(sp); |
311 | if (rval != QLA_SUCCESS) | |
312 | goto done_free_sp; | |
313 | ||
314 | DEBUG2(printk(KERN_DEBUG | |
315 | "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n", | |
316 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
317 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
318 | ||
319 | return rval; | |
320 | ||
321 | done_free_sp: | |
4916392b | 322 | lio->free(sp); |
5ff1d584 AV |
323 | done: |
324 | return rval; | |
325 | } | |
326 | ||
3822263e MI |
327 | static void |
328 | qla2x00_async_tm_cmd_ctx_done(srb_t *sp) | |
329 | { | |
330 | struct srb_ctx *ctx = sp->ctx; | |
331 | struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd; | |
332 | ||
333 | qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb); | |
334 | iocb->free(sp); | |
335 | } | |
336 | ||
337 | int | |
338 | qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, | |
339 | uint32_t tag) | |
340 | { | |
341 | struct scsi_qla_host *vha = fcport->vha; | |
3822263e MI |
342 | srb_t *sp; |
343 | struct srb_ctx *ctx; | |
344 | struct srb_iocb *tcf; | |
345 | int rval; | |
346 | ||
347 | rval = QLA_FUNCTION_FAILED; | |
348 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), | |
5b91490e | 349 | qla2x00_get_async_timeout(vha) + 2); |
3822263e MI |
350 | if (!sp) |
351 | goto done; | |
352 | ||
353 | ctx = sp->ctx; | |
354 | ctx->type = SRB_TM_CMD; | |
355 | ctx->name = "tmf"; | |
356 | tcf = ctx->u.iocb_cmd; | |
357 | tcf->u.tmf.flags = flags; | |
358 | tcf->u.tmf.lun = lun; | |
359 | tcf->u.tmf.data = tag; | |
360 | tcf->timeout = qla2x00_async_iocb_timeout; | |
361 | tcf->done = qla2x00_async_tm_cmd_ctx_done; | |
362 | ||
363 | rval = qla2x00_start_sp(sp); | |
364 | if (rval != QLA_SUCCESS) | |
365 | goto done_free_sp; | |
366 | ||
367 | DEBUG2(printk(KERN_DEBUG | |
368 | "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n", | |
369 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
370 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
371 | ||
372 | return rval; | |
373 | ||
374 | done_free_sp: | |
375 | tcf->free(sp); | |
376 | done: | |
377 | return rval; | |
378 | } | |
379 | ||
4916392b | 380 | void |
ac280b67 AV |
381 | qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
382 | uint16_t *data) | |
383 | { | |
384 | int rval; | |
ac280b67 AV |
385 | |
386 | switch (data[0]) { | |
387 | case MBS_COMMAND_COMPLETE: | |
99b0bec7 | 388 | if (fcport->flags & FCF_FCP2_DEVICE) { |
5ff1d584 AV |
389 | fcport->flags |= FCF_ASYNC_SENT; |
390 | qla2x00_post_async_adisc_work(vha, fcport, data); | |
391 | break; | |
99b0bec7 AV |
392 | } |
393 | qla2x00_update_fcport(vha, fcport); | |
ac280b67 AV |
394 | break; |
395 | case MBS_COMMAND_ERROR: | |
5ff1d584 | 396 | fcport->flags &= ~FCF_ASYNC_SENT; |
ac280b67 AV |
397 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
398 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
399 | else | |
6ac52608 | 400 | qla2x00_mark_device_lost(vha, fcport, 1, 1); |
ac280b67 AV |
401 | break; |
402 | case MBS_PORT_ID_USED: | |
403 | fcport->loop_id = data[1]; | |
6ac52608 | 404 | qla2x00_post_async_logout_work(vha, fcport, NULL); |
ac280b67 AV |
405 | qla2x00_post_async_login_work(vha, fcport, NULL); |
406 | break; | |
407 | case MBS_LOOP_ID_USED: | |
408 | fcport->loop_id++; | |
409 | rval = qla2x00_find_new_loop_id(vha, fcport); | |
410 | if (rval != QLA_SUCCESS) { | |
5ff1d584 | 411 | fcport->flags &= ~FCF_ASYNC_SENT; |
6ac52608 | 412 | qla2x00_mark_device_lost(vha, fcport, 1, 1); |
ac280b67 AV |
413 | break; |
414 | } | |
415 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
416 | break; | |
417 | } | |
4916392b | 418 | return; |
ac280b67 AV |
419 | } |
420 | ||
4916392b | 421 | void |
ac280b67 AV |
422 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
423 | uint16_t *data) | |
424 | { | |
425 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
4916392b | 426 | return; |
ac280b67 AV |
427 | } |
428 | ||
4916392b | 429 | void |
5ff1d584 AV |
430 | qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
431 | uint16_t *data) | |
432 | { | |
433 | if (data[0] == MBS_COMMAND_COMPLETE) { | |
434 | qla2x00_update_fcport(vha, fcport); | |
435 | ||
4916392b | 436 | return; |
5ff1d584 AV |
437 | } |
438 | ||
439 | /* Retry login. */ | |
440 | fcport->flags &= ~FCF_ASYNC_SENT; | |
441 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
442 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
443 | else | |
6ac52608 | 444 | qla2x00_mark_device_lost(vha, fcport, 1, 1); |
5ff1d584 | 445 | |
4916392b | 446 | return; |
5ff1d584 AV |
447 | } |
448 | ||
3822263e MI |
449 | void |
450 | qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |
451 | struct srb_iocb *iocb) | |
452 | { | |
453 | int rval; | |
454 | uint32_t flags; | |
455 | uint16_t lun; | |
456 | ||
457 | flags = iocb->u.tmf.flags; | |
458 | lun = (uint16_t)iocb->u.tmf.lun; | |
459 | ||
460 | /* Issue Marker IOCB */ | |
d94d10e7 GM |
461 | rval = qla2x00_marker(vha, vha->hw->req_q_map[0], |
462 | vha->hw->rsp_q_map[0], fcport->loop_id, lun, | |
3822263e MI |
463 | flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); |
464 | ||
465 | if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { | |
466 | DEBUG2_3_11(printk(KERN_WARNING | |
467 | "%s(%ld): TM IOCB failed (%x).\n", | |
468 | __func__, vha->host_no, rval)); | |
469 | } | |
470 | ||
471 | return; | |
472 | } | |
473 | ||
1da177e4 LT |
474 | /****************************************************************************/ |
475 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
476 | /****************************************************************************/ | |
477 | ||
478 | /* | |
479 | * qla2x00_initialize_adapter | |
480 | * Initialize board. | |
481 | * | |
482 | * Input: | |
483 | * ha = adapter block pointer. | |
484 | * | |
485 | * Returns: | |
486 | * 0 = success | |
487 | */ | |
488 | int | |
e315cd28 | 489 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
490 | { |
491 | int rval; | |
e315cd28 | 492 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 493 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 494 | |
1da177e4 | 495 | /* Clear adapter flags. */ |
e315cd28 | 496 | vha->flags.online = 0; |
2533cf67 | 497 | ha->flags.chip_reset_done = 0; |
e315cd28 | 498 | vha->flags.reset_active = 0; |
85880801 AV |
499 | ha->flags.pci_channel_io_perm_failure = 0; |
500 | ha->flags.eeh_busy = 0; | |
e315cd28 AC |
501 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
502 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
503 | vha->device_flags = DFLG_NO_CABLE; | |
504 | vha->dpc_flags = 0; | |
505 | vha->flags.management_server_logged_in = 0; | |
506 | vha->marker_needed = 0; | |
1da177e4 LT |
507 | ha->isp_abort_cnt = 0; |
508 | ha->beacon_blink_led = 0; | |
509 | ||
73208dfd AC |
510 | set_bit(0, ha->req_qid_map); |
511 | set_bit(0, ha->rsp_qid_map); | |
512 | ||
0107109e | 513 | qla_printk(KERN_INFO, ha, "Configuring PCI space...\n"); |
e315cd28 | 514 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 515 | if (rval) { |
7c98a046 | 516 | DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n", |
e315cd28 | 517 | vha->host_no)); |
1da177e4 LT |
518 | return (rval); |
519 | } | |
520 | ||
e315cd28 | 521 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 522 | |
e315cd28 | 523 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 AV |
524 | if (rval) { |
525 | DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n", | |
e315cd28 | 526 | vha->host_no)); |
c00d8994 AV |
527 | return (rval); |
528 | } | |
529 | ||
73208dfd | 530 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 531 | |
1da177e4 | 532 | qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n"); |
0107109e | 533 | |
e315cd28 | 534 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 535 | |
d4c760c2 AV |
536 | if (ha->flags.disable_serdes) { |
537 | /* Mask HBA via NVRAM settings? */ | |
538 | qla_printk(KERN_INFO, ha, "Masking HBA WWPN " | |
539 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", | |
e315cd28 AC |
540 | vha->port_name[0], vha->port_name[1], |
541 | vha->port_name[2], vha->port_name[3], | |
542 | vha->port_name[4], vha->port_name[5], | |
543 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
544 | return QLA_FUNCTION_FAILED; |
545 | } | |
546 | ||
1da177e4 LT |
547 | qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n"); |
548 | ||
e315cd28 AC |
549 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
550 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
551 | if (rval) |
552 | return (rval); | |
e315cd28 | 553 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
554 | if (rval) |
555 | return (rval); | |
1da177e4 | 556 | } |
a9083016 | 557 | |
4d4df193 | 558 | if (IS_QLA84XX(ha)) { |
e315cd28 | 559 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 HK |
560 | if (!ha->cs84xx) { |
561 | qla_printk(KERN_ERR, ha, | |
562 | "Unable to configure ISP84XX.\n"); | |
563 | return QLA_FUNCTION_FAILED; | |
564 | } | |
565 | } | |
e315cd28 | 566 | rval = qla2x00_init_rings(vha); |
2533cf67 | 567 | ha->flags.chip_reset_done = 1; |
1da177e4 | 568 | |
9a069e19 | 569 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
6c452a45 | 570 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ |
9a069e19 GM |
571 | rval = qla84xx_init_chip(vha); |
572 | if (rval != QLA_SUCCESS) { | |
573 | qla_printk(KERN_ERR, ha, | |
574 | "Unable to initialize ISP84XX.\n"); | |
575 | qla84xx_put_chip(vha); | |
576 | } | |
577 | } | |
578 | ||
2f0f3f4f MI |
579 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) |
580 | qla24xx_read_fcp_prio_cfg(vha); | |
09ff701a | 581 | |
1da177e4 LT |
582 | return (rval); |
583 | } | |
584 | ||
585 | /** | |
abbd8870 | 586 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
587 | * @ha: HA context |
588 | * | |
589 | * Returns 0 on success. | |
590 | */ | |
abbd8870 | 591 | int |
e315cd28 | 592 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 593 | { |
a157b101 | 594 | uint16_t w; |
abbd8870 | 595 | unsigned long flags; |
e315cd28 | 596 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 597 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 598 | |
1da177e4 | 599 | pci_set_master(ha->pdev); |
af6177d8 | 600 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 601 | |
1da177e4 | 602 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 603 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
604 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
605 | ||
737faece | 606 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
607 | |
608 | /* Get PCI bus information. */ | |
609 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 610 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
611 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
612 | ||
abbd8870 AV |
613 | return QLA_SUCCESS; |
614 | } | |
1da177e4 | 615 | |
abbd8870 AV |
616 | /** |
617 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
618 | * @ha: HA context | |
619 | * | |
620 | * Returns 0 on success. | |
621 | */ | |
622 | int | |
e315cd28 | 623 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 624 | { |
a157b101 | 625 | uint16_t w; |
abbd8870 AV |
626 | unsigned long flags = 0; |
627 | uint32_t cnt; | |
e315cd28 | 628 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 629 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 630 | |
abbd8870 | 631 | pci_set_master(ha->pdev); |
af6177d8 | 632 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 633 | |
abbd8870 | 634 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 635 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 636 | |
abbd8870 AV |
637 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
638 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 639 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 640 | |
abbd8870 AV |
641 | /* |
642 | * If this is a 2300 card and not 2312, reset the | |
643 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
644 | * the 2310 also reports itself as a 2300 so we need to get the | |
645 | * fb revision level -- a 6 indicates it really is a 2300 and | |
646 | * not a 2310. | |
647 | */ | |
648 | if (IS_QLA2300(ha)) { | |
649 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 650 | |
abbd8870 | 651 | /* Pause RISC. */ |
3d71644c | 652 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 653 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 654 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 655 | break; |
1da177e4 | 656 | |
abbd8870 AV |
657 | udelay(10); |
658 | } | |
1da177e4 | 659 | |
abbd8870 | 660 | /* Select FPM registers. */ |
3d71644c AV |
661 | WRT_REG_WORD(®->ctrl_status, 0x20); |
662 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
663 | |
664 | /* Get the fb rev level */ | |
3d71644c | 665 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
666 | |
667 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 668 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
669 | |
670 | /* Deselect FPM registers. */ | |
3d71644c AV |
671 | WRT_REG_WORD(®->ctrl_status, 0x0); |
672 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
673 | |
674 | /* Release RISC module. */ | |
3d71644c | 675 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 676 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 677 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
678 | break; |
679 | ||
680 | udelay(10); | |
1da177e4 | 681 | } |
1da177e4 | 682 | |
abbd8870 AV |
683 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
684 | } | |
1da177e4 | 685 | |
abbd8870 AV |
686 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
687 | ||
737faece | 688 | pci_disable_rom(ha->pdev); |
1da177e4 | 689 | |
abbd8870 AV |
690 | /* Get PCI bus information. */ |
691 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 692 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
693 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
694 | ||
695 | return QLA_SUCCESS; | |
1da177e4 LT |
696 | } |
697 | ||
0107109e AV |
698 | /** |
699 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
700 | * @ha: HA context | |
701 | * | |
702 | * Returns 0 on success. | |
703 | */ | |
704 | int | |
e315cd28 | 705 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 706 | { |
a157b101 | 707 | uint16_t w; |
0107109e | 708 | unsigned long flags = 0; |
e315cd28 | 709 | struct qla_hw_data *ha = vha->hw; |
0107109e | 710 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
711 | |
712 | pci_set_master(ha->pdev); | |
af6177d8 | 713 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
714 | |
715 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 716 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
717 | w &= ~PCI_COMMAND_INTX_DISABLE; |
718 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
719 | ||
720 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
721 | ||
722 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
723 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
724 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
725 | |
726 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
727 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
728 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 729 | |
737faece | 730 | pci_disable_rom(ha->pdev); |
0107109e | 731 | |
44c10138 | 732 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 733 | |
0107109e AV |
734 | /* Get PCI bus information. */ |
735 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
736 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
737 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
738 | ||
739 | return QLA_SUCCESS; | |
740 | } | |
741 | ||
c3a2f0df AV |
742 | /** |
743 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
744 | * @ha: HA context | |
745 | * | |
746 | * Returns 0 on success. | |
747 | */ | |
748 | int | |
e315cd28 | 749 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
750 | { |
751 | uint16_t w; | |
e315cd28 | 752 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
753 | |
754 | pci_set_master(ha->pdev); | |
755 | pci_try_set_mwi(ha->pdev); | |
756 | ||
757 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
758 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
759 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
760 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
761 | ||
762 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
763 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
764 | pcie_set_readrq(ha->pdev, 2048); | |
765 | ||
737faece | 766 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
767 | |
768 | ha->chip_revision = ha->pdev->revision; | |
769 | ||
770 | return QLA_SUCCESS; | |
771 | } | |
772 | ||
1da177e4 LT |
773 | /** |
774 | * qla2x00_isp_firmware() - Choose firmware image. | |
775 | * @ha: HA context | |
776 | * | |
777 | * Returns 0 on success. | |
778 | */ | |
779 | static int | |
e315cd28 | 780 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
781 | { |
782 | int rval; | |
42e421b1 AV |
783 | uint16_t loop_id, topo, sw_cap; |
784 | uint8_t domain, area, al_pa; | |
e315cd28 | 785 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
786 | |
787 | /* Assume loading risc code */ | |
fa2a1ce5 | 788 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
789 | |
790 | if (ha->flags.disable_risc_code_load) { | |
791 | DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n", | |
e315cd28 | 792 | vha->host_no)); |
1da177e4 LT |
793 | qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n"); |
794 | ||
795 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 796 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
797 | if (rval == QLA_SUCCESS) { |
798 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 799 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
800 | &area, &domain, &topo, &sw_cap); |
801 | } | |
1da177e4 LT |
802 | } |
803 | ||
804 | if (rval) { | |
805 | DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n", | |
e315cd28 | 806 | vha->host_no)); |
1da177e4 LT |
807 | } |
808 | ||
809 | return (rval); | |
810 | } | |
811 | ||
812 | /** | |
813 | * qla2x00_reset_chip() - Reset ISP chip. | |
814 | * @ha: HA context | |
815 | * | |
816 | * Returns 0 on success. | |
817 | */ | |
abbd8870 | 818 | void |
e315cd28 | 819 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
820 | { |
821 | unsigned long flags = 0; | |
e315cd28 | 822 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 823 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 824 | uint32_t cnt; |
1da177e4 LT |
825 | uint16_t cmd; |
826 | ||
85880801 AV |
827 | if (unlikely(pci_channel_offline(ha->pdev))) |
828 | return; | |
829 | ||
fd34f556 | 830 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
831 | |
832 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
833 | ||
834 | /* Turn off master enable */ | |
835 | cmd = 0; | |
836 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
837 | cmd &= ~PCI_COMMAND_MASTER; | |
838 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
839 | ||
840 | if (!IS_QLA2100(ha)) { | |
841 | /* Pause RISC. */ | |
842 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
843 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
844 | for (cnt = 0; cnt < 30000; cnt++) { | |
845 | if ((RD_REG_WORD(®->hccr) & | |
846 | HCCR_RISC_PAUSE) != 0) | |
847 | break; | |
848 | udelay(100); | |
849 | } | |
850 | } else { | |
851 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
852 | udelay(10); | |
853 | } | |
854 | ||
855 | /* Select FPM registers. */ | |
856 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
857 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
858 | ||
859 | /* FPM Soft Reset. */ | |
860 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
861 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
862 | ||
863 | /* Toggle Fpm Reset. */ | |
864 | if (!IS_QLA2200(ha)) { | |
865 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
866 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
867 | } | |
868 | ||
869 | /* Select frame buffer registers. */ | |
870 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
871 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
872 | ||
873 | /* Reset frame buffer FIFOs. */ | |
874 | if (IS_QLA2200(ha)) { | |
875 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
876 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
877 | } else { | |
878 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
879 | ||
880 | /* Read back fb_cmd until zero or 3 seconds max */ | |
881 | for (cnt = 0; cnt < 3000; cnt++) { | |
882 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
883 | break; | |
884 | udelay(100); | |
885 | } | |
886 | } | |
887 | ||
888 | /* Select RISC module registers. */ | |
889 | WRT_REG_WORD(®->ctrl_status, 0); | |
890 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
891 | ||
892 | /* Reset RISC processor. */ | |
893 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
894 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
895 | ||
896 | /* Release RISC processor. */ | |
897 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
898 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
899 | } | |
900 | ||
901 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
902 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
903 | ||
904 | /* Reset ISP chip. */ | |
905 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
906 | ||
907 | /* Wait for RISC to recover from reset. */ | |
908 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
909 | /* | |
910 | * It is necessary to for a delay here since the card doesn't | |
911 | * respond to PCI reads during a reset. On some architectures | |
912 | * this will result in an MCA. | |
913 | */ | |
914 | udelay(20); | |
915 | for (cnt = 30000; cnt; cnt--) { | |
916 | if ((RD_REG_WORD(®->ctrl_status) & | |
917 | CSR_ISP_SOFT_RESET) == 0) | |
918 | break; | |
919 | udelay(100); | |
920 | } | |
921 | } else | |
922 | udelay(10); | |
923 | ||
924 | /* Reset RISC processor. */ | |
925 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
926 | ||
927 | WRT_REG_WORD(®->semaphore, 0); | |
928 | ||
929 | /* Release RISC processor. */ | |
930 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
931 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
932 | ||
933 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
934 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 935 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 936 | break; |
1da177e4 LT |
937 | |
938 | udelay(100); | |
939 | } | |
940 | } else | |
941 | udelay(100); | |
942 | ||
943 | /* Turn on master enable */ | |
944 | cmd |= PCI_COMMAND_MASTER; | |
945 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
946 | ||
947 | /* Disable RISC pause on FPM parity error. */ | |
948 | if (!IS_QLA2100(ha)) { | |
949 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
950 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
951 | } | |
952 | ||
953 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
954 | } | |
955 | ||
b1d46989 MI |
956 | /** |
957 | * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. | |
958 | * | |
959 | * Returns 0 on success. | |
960 | */ | |
961 | int | |
962 | qla81xx_reset_mpi(scsi_qla_host_t *vha) | |
963 | { | |
964 | uint16_t mb[4] = {0x1010, 0, 1, 0}; | |
965 | ||
966 | return qla81xx_write_mpi_register(vha, mb); | |
967 | } | |
968 | ||
0107109e | 969 | /** |
88c26663 | 970 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
971 | * @ha: HA context |
972 | * | |
973 | * Returns 0 on success. | |
974 | */ | |
88c26663 | 975 | static inline void |
e315cd28 | 976 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
977 | { |
978 | unsigned long flags = 0; | |
e315cd28 | 979 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
980 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
981 | uint32_t cnt, d2; | |
335a1cc9 | 982 | uint16_t wd; |
b1d46989 | 983 | static int abts_cnt; /* ISP abort retry counts */ |
0107109e | 984 | |
0107109e AV |
985 | spin_lock_irqsave(&ha->hardware_lock, flags); |
986 | ||
987 | /* Reset RISC. */ | |
988 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
989 | for (cnt = 0; cnt < 30000; cnt++) { | |
990 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
991 | break; | |
992 | ||
993 | udelay(10); | |
994 | } | |
995 | ||
996 | WRT_REG_DWORD(®->ctrl_status, | |
997 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 998 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 999 | |
335a1cc9 | 1000 | udelay(100); |
88c26663 | 1001 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
1002 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
1003 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
1004 | udelay(5); | |
1005 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1006 | barrier(); | |
1007 | } | |
1008 | ||
335a1cc9 | 1009 | /* Wait for soft-reset to complete. */ |
0107109e AV |
1010 | d2 = RD_REG_DWORD(®->ctrl_status); |
1011 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
1012 | udelay(5); | |
1013 | d2 = RD_REG_DWORD(®->ctrl_status); | |
1014 | barrier(); | |
1015 | } | |
1016 | ||
b1d46989 MI |
1017 | /* If required, do an MPI FW reset now */ |
1018 | if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { | |
1019 | if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { | |
1020 | if (++abts_cnt < 5) { | |
1021 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1022 | set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); | |
1023 | } else { | |
1024 | /* | |
1025 | * We exhausted the ISP abort retries. We have to | |
1026 | * set the board offline. | |
1027 | */ | |
1028 | abts_cnt = 0; | |
1029 | vha->flags.online = 0; | |
1030 | } | |
1031 | } | |
1032 | } | |
1033 | ||
0107109e AV |
1034 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); |
1035 | RD_REG_DWORD(®->hccr); | |
1036 | ||
1037 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
1038 | RD_REG_DWORD(®->hccr); | |
1039 | ||
1040 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
1041 | RD_REG_DWORD(®->hccr); | |
1042 | ||
1043 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1044 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
1045 | udelay(5); | |
1046 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1047 | barrier(); | |
1048 | } | |
1049 | ||
1050 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
1051 | |
1052 | if (IS_NOPOLLING_TYPE(ha)) | |
1053 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
1054 | } |
1055 | ||
88c26663 AV |
1056 | /** |
1057 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
1058 | * @ha: HA context | |
1059 | * | |
1060 | * Returns 0 on success. | |
1061 | */ | |
1062 | void | |
e315cd28 | 1063 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 1064 | { |
e315cd28 | 1065 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
1066 | |
1067 | if (pci_channel_offline(ha->pdev) && | |
1068 | ha->flags.pci_channel_io_perm_failure) { | |
1069 | return; | |
1070 | } | |
1071 | ||
fd34f556 | 1072 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
1073 | |
1074 | /* Perform RISC reset. */ | |
e315cd28 | 1075 | qla24xx_reset_risc(vha); |
88c26663 AV |
1076 | } |
1077 | ||
1da177e4 LT |
1078 | /** |
1079 | * qla2x00_chip_diag() - Test chip for proper operation. | |
1080 | * @ha: HA context | |
1081 | * | |
1082 | * Returns 0 on success. | |
1083 | */ | |
abbd8870 | 1084 | int |
e315cd28 | 1085 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
1086 | { |
1087 | int rval; | |
e315cd28 | 1088 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1089 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1090 | unsigned long flags = 0; |
1091 | uint16_t data; | |
1092 | uint32_t cnt; | |
1093 | uint16_t mb[5]; | |
73208dfd | 1094 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
1095 | |
1096 | /* Assume a failed state */ | |
1097 | rval = QLA_FUNCTION_FAILED; | |
1098 | ||
1099 | DEBUG3(printk("scsi(%ld): Testing device at %lx.\n", | |
e315cd28 | 1100 | vha->host_no, (u_long)®->flash_address)); |
1da177e4 LT |
1101 | |
1102 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1103 | ||
1104 | /* Reset ISP chip. */ | |
1105 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
1106 | ||
1107 | /* | |
1108 | * We need to have a delay here since the card will not respond while | |
1109 | * in reset causing an MCA on some architectures. | |
1110 | */ | |
1111 | udelay(20); | |
1112 | data = qla2x00_debounce_register(®->ctrl_status); | |
1113 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
1114 | udelay(5); | |
1115 | data = RD_REG_WORD(®->ctrl_status); | |
1116 | barrier(); | |
1117 | } | |
1118 | ||
1119 | if (!cnt) | |
1120 | goto chip_diag_failed; | |
1121 | ||
1122 | DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n", | |
7640335e | 1123 | vha->host_no)); |
1da177e4 LT |
1124 | |
1125 | /* Reset RISC processor. */ | |
1126 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
1127 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
1128 | ||
1129 | /* Workaround for QLA2312 PCI parity error */ | |
1130 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
1131 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
1132 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
1133 | udelay(5); | |
1134 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 1135 | barrier(); |
1da177e4 LT |
1136 | } |
1137 | } else | |
1138 | udelay(10); | |
1139 | ||
1140 | if (!cnt) | |
1141 | goto chip_diag_failed; | |
1142 | ||
1143 | /* Check product ID of chip */ | |
7640335e | 1144 | DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no)); |
1da177e4 LT |
1145 | |
1146 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
1147 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
1148 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
1149 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
1150 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
1151 | mb[3] != PROD_ID_3) { | |
1152 | qla_printk(KERN_WARNING, ha, | |
1153 | "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]); | |
1154 | ||
1155 | goto chip_diag_failed; | |
1156 | } | |
1157 | ha->product_id[0] = mb[1]; | |
1158 | ha->product_id[1] = mb[2]; | |
1159 | ha->product_id[2] = mb[3]; | |
1160 | ha->product_id[3] = mb[4]; | |
1161 | ||
1162 | /* Adjust fw RISC transfer size */ | |
73208dfd | 1163 | if (req->length > 1024) |
1da177e4 LT |
1164 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
1165 | else | |
1166 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 1167 | req->length; |
1da177e4 LT |
1168 | |
1169 | if (IS_QLA2200(ha) && | |
1170 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
1171 | /* Limit firmware transfer size with a 2200A */ | |
1172 | DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n", | |
e315cd28 | 1173 | vha->host_no)); |
1da177e4 | 1174 | |
ea5b6382 | 1175 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
1176 | ha->fw_transfer_size = 128; |
1177 | } | |
1178 | ||
1179 | /* Wrap Incoming Mailboxes Test. */ | |
1180 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1181 | ||
e315cd28 AC |
1182 | DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no)); |
1183 | rval = qla2x00_mbx_reg_test(vha); | |
1da177e4 LT |
1184 | if (rval) { |
1185 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 1186 | vha->host_no)); |
1da177e4 LT |
1187 | qla_printk(KERN_WARNING, ha, |
1188 | "Failed mailbox send register test\n"); | |
1189 | } | |
1190 | else { | |
1191 | /* Flag a successful rval */ | |
1192 | rval = QLA_SUCCESS; | |
1193 | } | |
1194 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1195 | ||
1196 | chip_diag_failed: | |
1197 | if (rval) | |
1198 | DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED " | |
e315cd28 | 1199 | "****\n", vha->host_no)); |
1da177e4 LT |
1200 | |
1201 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1202 | ||
1203 | return (rval); | |
1204 | } | |
1205 | ||
0107109e AV |
1206 | /** |
1207 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
1208 | * @ha: HA context | |
1209 | * | |
1210 | * Returns 0 on success. | |
1211 | */ | |
1212 | int | |
e315cd28 | 1213 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
1214 | { |
1215 | int rval; | |
e315cd28 | 1216 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 1217 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 1218 | |
a9083016 GM |
1219 | if (IS_QLA82XX(ha)) |
1220 | return QLA_SUCCESS; | |
1221 | ||
73208dfd | 1222 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 1223 | |
e315cd28 | 1224 | rval = qla2x00_mbx_reg_test(vha); |
0107109e AV |
1225 | if (rval) { |
1226 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 1227 | vha->host_no)); |
0107109e AV |
1228 | qla_printk(KERN_WARNING, ha, |
1229 | "Failed mailbox send register test\n"); | |
1230 | } else { | |
1231 | /* Flag a successful rval */ | |
1232 | rval = QLA_SUCCESS; | |
1233 | } | |
1234 | ||
1235 | return rval; | |
1236 | } | |
1237 | ||
a7a167bf | 1238 | void |
e315cd28 | 1239 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 1240 | { |
a7a167bf AV |
1241 | int rval; |
1242 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 1243 | eft_size, fce_size, mq_size; |
df613b96 AV |
1244 | dma_addr_t tc_dma; |
1245 | void *tc; | |
e315cd28 | 1246 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1247 | struct req_que *req = ha->req_q_map[0]; |
1248 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
1249 | |
1250 | if (ha->fw_dump) { | |
1251 | qla_printk(KERN_WARNING, ha, | |
1252 | "Firmware dump previously allocated.\n"); | |
1253 | return; | |
1254 | } | |
d4e3e04d | 1255 | |
0107109e | 1256 | ha->fw_dumped = 0; |
73208dfd | 1257 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 1258 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 1259 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 1260 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
1261 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
1262 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
1263 | sizeof(uint16_t); | |
e428924c | 1264 | } else if (IS_FWI2_CAPABLE(ha)) { |
3a03eb79 AV |
1265 | if (IS_QLA81XX(ha)) |
1266 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
1267 | else if (IS_QLA25XX(ha)) | |
1268 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
1269 | else | |
1270 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
1271 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
1272 | sizeof(uint32_t); | |
73208dfd AC |
1273 | if (ha->mqenable) |
1274 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
df613b96 | 1275 | /* Allocate memory for Fibre Channel Event Buffer. */ |
3a03eb79 | 1276 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
436a7b11 | 1277 | goto try_eft; |
df613b96 AV |
1278 | |
1279 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
1280 | GFP_KERNEL); | |
1281 | if (!tc) { | |
1282 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1283 | "(%d KB) for FCE.\n", FCE_SIZE / 1024); | |
17d98630 | 1284 | goto try_eft; |
df613b96 AV |
1285 | } |
1286 | ||
1287 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 1288 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
1289 | ha->fce_mb, &ha->fce_bufs); |
1290 | if (rval) { | |
1291 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1292 | "FCE (%d).\n", rval); | |
1293 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, | |
1294 | tc_dma); | |
1295 | ha->flags.fce_enabled = 0; | |
17d98630 | 1296 | goto try_eft; |
df613b96 AV |
1297 | } |
1298 | ||
1299 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n", | |
1300 | FCE_SIZE / 1024); | |
1301 | ||
7d9dade3 | 1302 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
1303 | ha->flags.fce_enabled = 1; |
1304 | ha->fce_dma = tc_dma; | |
1305 | ha->fce = tc; | |
436a7b11 AV |
1306 | try_eft: |
1307 | /* Allocate memory for Extended Trace Buffer. */ | |
1308 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
1309 | GFP_KERNEL); | |
1310 | if (!tc) { | |
1311 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1312 | "(%d KB) for EFT.\n", EFT_SIZE / 1024); | |
1313 | goto cont_alloc; | |
1314 | } | |
1315 | ||
1316 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 1317 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 AV |
1318 | if (rval) { |
1319 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1320 | "EFT (%d).\n", rval); | |
1321 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, | |
1322 | tc_dma); | |
1323 | goto cont_alloc; | |
1324 | } | |
1325 | ||
1326 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n", | |
1327 | EFT_SIZE / 1024); | |
1328 | ||
1329 | eft_size = EFT_SIZE; | |
1330 | ha->eft_dma = tc_dma; | |
1331 | ha->eft = tc; | |
d4e3e04d | 1332 | } |
a7a167bf | 1333 | cont_alloc: |
73208dfd AC |
1334 | req_q_size = req->length * sizeof(request_t); |
1335 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
1336 | |
1337 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 1338 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
1339 | ha->chain_offset = dump_size; |
1340 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
1341 | |
1342 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 1343 | if (!ha->fw_dump) { |
0107109e | 1344 | qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for " |
d4e3e04d | 1345 | "firmware dump!!!\n", dump_size / 1024); |
a7a167bf AV |
1346 | |
1347 | if (ha->eft) { | |
1348 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
1349 | ha->eft_dma); | |
1350 | ha->eft = NULL; | |
1351 | ha->eft_dma = 0; | |
1352 | } | |
1353 | return; | |
1354 | } | |
a7a167bf AV |
1355 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n", |
1356 | dump_size / 1024); | |
1357 | ||
1358 | ha->fw_dump_len = dump_size; | |
1359 | ha->fw_dump->signature[0] = 'Q'; | |
1360 | ha->fw_dump->signature[1] = 'L'; | |
1361 | ha->fw_dump->signature[2] = 'G'; | |
1362 | ha->fw_dump->signature[3] = 'C'; | |
1363 | ha->fw_dump->version = __constant_htonl(1); | |
1364 | ||
1365 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
1366 | ha->fw_dump->mem_size = htonl(mem_size); | |
1367 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
1368 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
1369 | ||
1370 | ha->fw_dump->eft_size = htonl(eft_size); | |
1371 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
1372 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
1373 | ||
1374 | ha->fw_dump->header_size = | |
1375 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
1376 | } |
1377 | ||
18e7555a AV |
1378 | static int |
1379 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
1380 | { | |
1381 | #define MPS_MASK 0xe0 | |
1382 | int rval; | |
1383 | uint16_t dc; | |
1384 | uint32_t dw; | |
1385 | struct qla_hw_data *ha = vha->hw; | |
1386 | ||
1387 | if (!IS_QLA81XX(vha->hw)) | |
1388 | return QLA_SUCCESS; | |
1389 | ||
1390 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
1391 | if (rval != QLA_SUCCESS) { | |
1392 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1393 | "Sync-MPI: Unable to acquire semaphore.\n")); | |
1394 | goto done; | |
1395 | } | |
1396 | ||
1397 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
1398 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
1399 | if (rval != QLA_SUCCESS) { | |
1400 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1401 | "Sync-MPI: Unable to read sync.\n")); | |
1402 | goto done_release; | |
1403 | } | |
1404 | ||
1405 | dc &= MPS_MASK; | |
1406 | if (dc == (dw & MPS_MASK)) | |
1407 | goto done_release; | |
1408 | ||
1409 | dw &= ~MPS_MASK; | |
1410 | dw |= dc; | |
1411 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
1412 | if (rval != QLA_SUCCESS) { | |
1413 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1414 | "Sync-MPI: Unable to gain sync.\n")); | |
1415 | } | |
1416 | ||
1417 | done_release: | |
1418 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
1419 | if (rval != QLA_SUCCESS) { | |
1420 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1421 | "Sync-MPI: Unable to release semaphore.\n")); | |
1422 | } | |
1423 | ||
1424 | done: | |
1425 | return rval; | |
1426 | } | |
1427 | ||
1da177e4 LT |
1428 | /** |
1429 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
1430 | * @ha: HA context | |
1431 | * | |
1432 | * Returns 0 on success. | |
1433 | */ | |
1434 | static int | |
e315cd28 | 1435 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 1436 | { |
0107109e AV |
1437 | int rval; |
1438 | uint32_t srisc_address = 0; | |
e315cd28 | 1439 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
1440 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1441 | unsigned long flags; | |
dda772e8 | 1442 | uint16_t fw_major_version; |
3db0652e | 1443 | |
a9083016 GM |
1444 | if (IS_QLA82XX(ha)) { |
1445 | rval = ha->isp_ops->load_risc(vha, &srisc_address); | |
14e303d9 AV |
1446 | if (rval == QLA_SUCCESS) { |
1447 | qla2x00_stop_firmware(vha); | |
a9083016 | 1448 | goto enable_82xx_npiv; |
14e303d9 | 1449 | } else |
b963752f | 1450 | goto failed; |
a9083016 GM |
1451 | } |
1452 | ||
3db0652e AV |
1453 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1454 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
1455 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1456 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
1457 | RD_REG_WORD(®->hccr); | |
1458 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1459 | } | |
1da177e4 | 1460 | |
18e7555a AV |
1461 | qla81xx_mpi_sync(vha); |
1462 | ||
1da177e4 | 1463 | /* Load firmware sequences */ |
e315cd28 | 1464 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 1465 | if (rval == QLA_SUCCESS) { |
1da177e4 | 1466 | DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC " |
e315cd28 | 1467 | "code.\n", vha->host_no)); |
1da177e4 | 1468 | |
e315cd28 | 1469 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
1470 | if (rval == QLA_SUCCESS) { |
1471 | /* Start firmware execution. */ | |
1472 | DEBUG(printk("scsi(%ld): Checksum OK, start " | |
e315cd28 | 1473 | "firmware.\n", vha->host_no)); |
1da177e4 | 1474 | |
e315cd28 | 1475 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 1476 | /* Retrieve firmware information. */ |
dda772e8 | 1477 | if (rval == QLA_SUCCESS) { |
a9083016 | 1478 | enable_82xx_npiv: |
dda772e8 | 1479 | fw_major_version = ha->fw_major_version; |
ca9e9c3e | 1480 | rval = qla2x00_get_fw_version(vha, |
1da177e4 LT |
1481 | &ha->fw_major_version, |
1482 | &ha->fw_minor_version, | |
1483 | &ha->fw_subminor_version, | |
3a03eb79 | 1484 | &ha->fw_attributes, &ha->fw_memory_size, |
55a96158 AV |
1485 | ha->mpi_version, &ha->mpi_capabilities, |
1486 | ha->phy_version); | |
ca9e9c3e AV |
1487 | if (rval != QLA_SUCCESS) |
1488 | goto failed; | |
2c3dfe3f | 1489 | ha->flags.npiv_supported = 0; |
e315cd28 | 1490 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1491 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1492 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1493 | if ((!ha->max_npiv_vports) || |
1494 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1495 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1496 | ha->max_npiv_vports = |
eb66dc60 | 1497 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1498 | } |
24a08138 AV |
1499 | qla2x00_get_resource_cnts(vha, NULL, |
1500 | &ha->fw_xcb_count, NULL, NULL, | |
f3a0a77e | 1501 | &ha->max_npiv_vports, NULL); |
d743de66 | 1502 | |
a9083016 GM |
1503 | if (!fw_major_version && ql2xallocfwdump) { |
1504 | if (!IS_QLA82XX(ha)) | |
1505 | qla2x00_alloc_fw_dump(vha); | |
1506 | } | |
1da177e4 LT |
1507 | } |
1508 | } else { | |
1509 | DEBUG2(printk(KERN_INFO | |
1510 | "scsi(%ld): ISP Firmware failed checksum.\n", | |
e315cd28 | 1511 | vha->host_no)); |
1da177e4 LT |
1512 | } |
1513 | } | |
1514 | ||
3db0652e AV |
1515 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1516 | /* Enable proper parity. */ | |
1517 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1518 | if (IS_QLA2300(ha)) | |
1519 | /* SRAM parity */ | |
1520 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1521 | else | |
1522 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1523 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1524 | RD_REG_WORD(®->hccr); | |
1525 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1526 | } | |
1527 | ||
1d2874de JC |
1528 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
1529 | uint32_t size; | |
1530 | ||
1531 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
1532 | if (rval == QLA_SUCCESS) { | |
1533 | ha->flags.fac_supported = 1; | |
1534 | ha->fdt_block_size = size << 2; | |
1535 | } else { | |
1536 | qla_printk(KERN_ERR, ha, | |
1537 | "Unsupported FAC firmware (%d.%02d.%02d).\n", | |
1538 | ha->fw_major_version, ha->fw_minor_version, | |
1539 | ha->fw_subminor_version); | |
1540 | } | |
1541 | } | |
ca9e9c3e | 1542 | failed: |
1da177e4 LT |
1543 | if (rval) { |
1544 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", | |
e315cd28 | 1545 | vha->host_no)); |
1da177e4 LT |
1546 | } |
1547 | ||
1548 | return (rval); | |
1549 | } | |
1550 | ||
1551 | /** | |
1552 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1553 | * @ha: HA context | |
1554 | * | |
1555 | * Beginning of request ring has initialization control block already built | |
1556 | * by nvram config routine. | |
1557 | * | |
1558 | * Returns 0 on success. | |
1559 | */ | |
73208dfd AC |
1560 | void |
1561 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1562 | { |
1563 | uint16_t cnt; | |
1564 | response_t *pkt; | |
1565 | ||
2afa19a9 AC |
1566 | rsp->ring_ptr = rsp->ring; |
1567 | rsp->ring_index = 0; | |
1568 | rsp->status_srb = NULL; | |
e315cd28 AC |
1569 | pkt = rsp->ring_ptr; |
1570 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1571 | pkt->signature = RESPONSE_PROCESSED; |
1572 | pkt++; | |
1573 | } | |
1da177e4 LT |
1574 | } |
1575 | ||
1576 | /** | |
1577 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1578 | * @ha: HA context | |
1579 | * | |
1580 | * Returns 0 on success. | |
1581 | */ | |
abbd8870 | 1582 | void |
e315cd28 | 1583 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1584 | { |
1585 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1586 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1587 | |
1588 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1589 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1590 | |
1591 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1592 | return; | |
1593 | ||
1594 | /* Serial Link options. */ | |
1595 | DEBUG3(printk("scsi(%ld): Serial link options:\n", | |
e315cd28 | 1596 | vha->host_no)); |
1da177e4 LT |
1597 | DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options, |
1598 | sizeof(ha->fw_seriallink_options))); | |
1599 | ||
1600 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1601 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1602 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1603 | ||
1604 | /* 1G settings */ | |
1605 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1606 | emphasis = (ha->fw_seriallink_options[2] & | |
1607 | (BIT_4 | BIT_3)) >> 3; | |
1608 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1609 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1610 | rx_sens = (ha->fw_seriallink_options[0] & |
1611 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1612 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1613 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1614 | if (rx_sens == 0x0) | |
1615 | rx_sens = 0x3; | |
1616 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1617 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1618 | ha->fw_options[10] |= BIT_5 | | |
1619 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1620 | (tx_sens & (BIT_1 | BIT_0)); | |
1621 | ||
1622 | /* 2G settings */ | |
1623 | swing = (ha->fw_seriallink_options[2] & | |
1624 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1625 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1626 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1627 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1628 | rx_sens = (ha->fw_seriallink_options[1] & |
1629 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1630 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1631 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1632 | if (rx_sens == 0x0) | |
1633 | rx_sens = 0x3; | |
1634 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1635 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1636 | ha->fw_options[11] |= BIT_5 | | |
1637 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1638 | (tx_sens & (BIT_1 | BIT_0)); | |
1639 | } | |
1640 | ||
1641 | /* FCP2 options. */ | |
1642 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1643 | ha->fw_options[3] |= BIT_13; | |
1644 | ||
1645 | /* LED scheme. */ | |
1646 | if (ha->flags.enable_led_scheme) | |
1647 | ha->fw_options[2] |= BIT_12; | |
1648 | ||
48c02fde | 1649 | /* Detect ISP6312. */ |
1650 | if (IS_QLA6312(ha)) | |
1651 | ha->fw_options[2] |= BIT_13; | |
1652 | ||
1da177e4 | 1653 | /* Update firmware options. */ |
e315cd28 | 1654 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1655 | } |
1656 | ||
0107109e | 1657 | void |
e315cd28 | 1658 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1659 | { |
1660 | int rval; | |
e315cd28 | 1661 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1662 | |
a9083016 GM |
1663 | if (IS_QLA82XX(ha)) |
1664 | return; | |
1665 | ||
0107109e | 1666 | /* Update Serial Link options. */ |
f94097ed | 1667 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1668 | return; |
1669 | ||
e315cd28 | 1670 | rval = qla2x00_set_serdes_params(vha, |
f94097ed | 1671 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1672 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1673 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e AV |
1674 | if (rval != QLA_SUCCESS) { |
1675 | qla_printk(KERN_WARNING, ha, | |
1676 | "Unable to update Serial Link options (%x).\n", rval); | |
1677 | } | |
1678 | } | |
1679 | ||
abbd8870 | 1680 | void |
e315cd28 | 1681 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1682 | { |
e315cd28 | 1683 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1684 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1685 | struct req_que *req = ha->req_q_map[0]; |
1686 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1687 | |
1688 | /* Setup ring parameters in initialization control block. */ | |
1689 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1690 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1691 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1692 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1693 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1694 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1695 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1696 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1697 | |
1698 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1699 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1700 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1701 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1702 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1703 | } | |
1704 | ||
0107109e | 1705 | void |
e315cd28 | 1706 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1707 | { |
e315cd28 | 1708 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1709 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1710 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1711 | struct qla_msix_entry *msix; | |
0107109e | 1712 | struct init_cb_24xx *icb; |
73208dfd AC |
1713 | uint16_t rid = 0; |
1714 | struct req_que *req = ha->req_q_map[0]; | |
1715 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1716 | |
73208dfd | 1717 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1718 | icb = (struct init_cb_24xx *)ha->init_cb; |
1719 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1720 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1721 | icb->request_q_length = cpu_to_le16(req->length); |
1722 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1723 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1724 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1725 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1726 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1727 | |
73208dfd AC |
1728 | if (ha->mqenable) { |
1729 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); | |
1730 | icb->rid = __constant_cpu_to_le16(rid); | |
1731 | if (ha->flags.msix_enabled) { | |
1732 | msix = &ha->msix_entries[1]; | |
1733 | DEBUG2_17(printk(KERN_INFO | |
2afa19a9 | 1734 | "Registering vector 0x%x for base que\n", msix->entry)); |
73208dfd AC |
1735 | icb->msix = cpu_to_le16(msix->entry); |
1736 | } | |
1737 | /* Use alternate PCI bus number */ | |
1738 | if (MSB(rid)) | |
1739 | icb->firmware_options_2 |= | |
1740 | __constant_cpu_to_le32(BIT_19); | |
1741 | /* Use alternate PCI devfn */ | |
1742 | if (LSB(rid)) | |
1743 | icb->firmware_options_2 |= | |
1744 | __constant_cpu_to_le32(BIT_18); | |
1745 | ||
3155754a AC |
1746 | /* Use Disable MSIX Handshake mode for capable adapters */ |
1747 | if (IS_MSIX_NACK_CAPABLE(ha)) { | |
1748 | icb->firmware_options_2 &= | |
1749 | __constant_cpu_to_le32(~BIT_22); | |
1750 | ha->flags.disable_msix_handshake = 1; | |
1751 | qla_printk(KERN_INFO, ha, | |
1752 | "MSIX Handshake Disable Mode turned on\n"); | |
1753 | } else { | |
1754 | icb->firmware_options_2 |= | |
1755 | __constant_cpu_to_le32(BIT_22); | |
1756 | } | |
73208dfd | 1757 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1758 | |
1759 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1760 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1761 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1762 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1763 | } else { | |
1764 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1765 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1766 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1767 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1768 | } | |
1769 | /* PCI posting */ | |
1770 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1771 | } |
1772 | ||
1da177e4 LT |
1773 | /** |
1774 | * qla2x00_init_rings() - Initializes firmware. | |
1775 | * @ha: HA context | |
1776 | * | |
1777 | * Beginning of request ring has initialization control block already built | |
1778 | * by nvram config routine. | |
1779 | * | |
1780 | * Returns 0 on success. | |
1781 | */ | |
1782 | static int | |
e315cd28 | 1783 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1784 | { |
1785 | int rval; | |
1786 | unsigned long flags = 0; | |
29bdccbe | 1787 | int cnt, que; |
e315cd28 | 1788 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1789 | struct req_que *req; |
1790 | struct rsp_que *rsp; | |
1791 | struct scsi_qla_host *vp; | |
2c3dfe3f SJ |
1792 | struct mid_init_cb_24xx *mid_init_cb = |
1793 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1794 | |
1795 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1796 | ||
1797 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1798 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1799 | req = ha->req_q_map[que]; |
1800 | if (!req) | |
1801 | continue; | |
2afa19a9 | 1802 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1803 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1804 | |
2afa19a9 | 1805 | req->current_outstanding_cmd = 1; |
1da177e4 | 1806 | |
29bdccbe AC |
1807 | /* Initialize firmware. */ |
1808 | req->ring_ptr = req->ring; | |
1809 | req->ring_index = 0; | |
1810 | req->cnt = req->length; | |
1811 | } | |
1da177e4 | 1812 | |
2afa19a9 | 1813 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1814 | rsp = ha->rsp_q_map[que]; |
1815 | if (!rsp) | |
1816 | continue; | |
29bdccbe AC |
1817 | /* Initialize response queue entries */ |
1818 | qla2x00_init_response_q_entries(rsp); | |
1819 | } | |
1da177e4 | 1820 | |
feafb7b1 | 1821 | spin_lock_irqsave(&ha->vport_slock, flags); |
29bdccbe AC |
1822 | /* Clear RSCN queue. */ |
1823 | list_for_each_entry(vp, &ha->vp_list, list) { | |
1824 | vp->rscn_in_ptr = 0; | |
1825 | vp->rscn_out_ptr = 0; | |
1826 | } | |
feafb7b1 AE |
1827 | |
1828 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
1829 | ||
e315cd28 | 1830 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1831 | |
1832 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1833 | ||
1834 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1835 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1836 | |
e315cd28 | 1837 | DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no)); |
2c3dfe3f | 1838 | |
605aa2bc LC |
1839 | if (ha->flags.npiv_supported) { |
1840 | if (ha->operating_mode == LOOP) | |
1841 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1842 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1843 | } |
1844 | ||
24a08138 AV |
1845 | if (IS_FWI2_CAPABLE(ha)) { |
1846 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1847 | mid_init_cb->init_cb.execution_throttle = | |
1848 | cpu_to_le16(ha->fw_xcb_count); | |
1849 | } | |
2c3dfe3f | 1850 | |
e315cd28 | 1851 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 LT |
1852 | if (rval) { |
1853 | DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n", | |
e315cd28 | 1854 | vha->host_no)); |
1da177e4 LT |
1855 | } else { |
1856 | DEBUG3(printk("scsi(%ld): Init firmware -- success.\n", | |
e315cd28 | 1857 | vha->host_no)); |
1da177e4 LT |
1858 | } |
1859 | ||
1860 | return (rval); | |
1861 | } | |
1862 | ||
1863 | /** | |
1864 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1865 | * @ha: HA context | |
1866 | * | |
1867 | * Returns 0 on success. | |
1868 | */ | |
1869 | static int | |
e315cd28 | 1870 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1871 | { |
1872 | int rval; | |
4d4df193 | 1873 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1874 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1875 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
656e8912 | 1876 | uint16_t state[5]; |
e315cd28 | 1877 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1878 | |
1879 | rval = QLA_SUCCESS; | |
1880 | ||
1881 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1882 | min_wait = 20; |
1da177e4 LT |
1883 | |
1884 | /* | |
1885 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1886 | * our own processing. | |
1887 | */ | |
1888 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1889 | wait_time = min_wait; | |
1890 | } | |
1891 | ||
1892 | /* Min wait time if loop down */ | |
1893 | mtime = jiffies + (min_wait * HZ); | |
1894 | ||
1895 | /* wait time before firmware ready */ | |
1896 | wtime = jiffies + (wait_time * HZ); | |
1897 | ||
1898 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1899 | if (!vha->flags.init_done) |
1da177e4 LT |
1900 | qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n"); |
1901 | ||
1902 | DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n", | |
e315cd28 | 1903 | vha->host_no)); |
1da177e4 LT |
1904 | |
1905 | do { | |
e315cd28 | 1906 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1907 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1908 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1909 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1910 | } |
4d4df193 HK |
1911 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
1912 | DEBUG16(printk("scsi(%ld): fw_state=%x " | |
e315cd28 | 1913 | "84xx=%x.\n", vha->host_no, state[0], |
4d4df193 HK |
1914 | state[2])); |
1915 | if ((state[2] & FSTATE_LOGGED_IN) && | |
1916 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
1917 | DEBUG16(printk("scsi(%ld): Sending " | |
e315cd28 | 1918 | "verify iocb.\n", vha->host_no)); |
4d4df193 HK |
1919 | |
1920 | cs84xx_time = jiffies; | |
e315cd28 | 1921 | rval = qla84xx_init_chip(vha); |
4d4df193 HK |
1922 | if (rval != QLA_SUCCESS) |
1923 | break; | |
1924 | ||
1925 | /* Add time taken to initialize. */ | |
1926 | cs84xx_time = jiffies - cs84xx_time; | |
1927 | wtime += cs84xx_time; | |
1928 | mtime += cs84xx_time; | |
1929 | DEBUG16(printk("scsi(%ld): Increasing " | |
1930 | "wait time by %ld. New time %ld\n", | |
e315cd28 | 1931 | vha->host_no, cs84xx_time, wtime)); |
4d4df193 HK |
1932 | } |
1933 | } else if (state[0] == FSTATE_READY) { | |
1da177e4 | 1934 | DEBUG(printk("scsi(%ld): F/W Ready - OK \n", |
e315cd28 | 1935 | vha->host_no)); |
1da177e4 | 1936 | |
e315cd28 | 1937 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1938 | &ha->login_timeout, &ha->r_a_tov); |
1939 | ||
1940 | rval = QLA_SUCCESS; | |
1941 | break; | |
1942 | } | |
1943 | ||
1944 | rval = QLA_FUNCTION_FAILED; | |
1945 | ||
e315cd28 | 1946 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1947 | state[0] != FSTATE_READY) { |
1da177e4 | 1948 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1949 | * other than Wait for Login. |
1950 | */ | |
1da177e4 LT |
1951 | if (time_after_eq(jiffies, mtime)) { |
1952 | qla_printk(KERN_INFO, ha, | |
1953 | "Cable is unplugged...\n"); | |
1954 | ||
e315cd28 | 1955 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1956 | break; |
1957 | } | |
1958 | } | |
1959 | } else { | |
1960 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
cdbb0a4f SV |
1961 | if (time_after_eq(jiffies, mtime) || |
1962 | (IS_QLA82XX(ha) && ha->flags.fw_hung)) | |
1da177e4 LT |
1963 | break; |
1964 | } | |
1965 | ||
1966 | if (time_after_eq(jiffies, wtime)) | |
1967 | break; | |
1968 | ||
1969 | /* Delay for a while */ | |
1970 | msleep(500); | |
1971 | ||
1972 | DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1973 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1974 | } while (1); |
1975 | ||
656e8912 AV |
1976 | DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n", |
1977 | vha->host_no, state[0], state[1], state[2], state[3], state[4], | |
1978 | jiffies)); | |
1da177e4 LT |
1979 | |
1980 | if (rval) { | |
1981 | DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n", | |
e315cd28 | 1982 | vha->host_no)); |
1da177e4 LT |
1983 | } |
1984 | ||
1985 | return (rval); | |
1986 | } | |
1987 | ||
1988 | /* | |
1989 | * qla2x00_configure_hba | |
1990 | * Setup adapter context. | |
1991 | * | |
1992 | * Input: | |
1993 | * ha = adapter state pointer. | |
1994 | * | |
1995 | * Returns: | |
1996 | * 0 = success | |
1997 | * | |
1998 | * Context: | |
1999 | * Kernel context. | |
2000 | */ | |
2001 | static int | |
e315cd28 | 2002 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
2003 | { |
2004 | int rval; | |
2005 | uint16_t loop_id; | |
2006 | uint16_t topo; | |
2c3dfe3f | 2007 | uint16_t sw_cap; |
1da177e4 LT |
2008 | uint8_t al_pa; |
2009 | uint8_t area; | |
2010 | uint8_t domain; | |
2011 | char connect_type[22]; | |
e315cd28 | 2012 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2013 | |
2014 | /* Get host addresses. */ | |
e315cd28 | 2015 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 2016 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 2017 | if (rval != QLA_SUCCESS) { |
e315cd28 | 2018 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
33135aa2 RA |
2019 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
2020 | DEBUG2(printk("%s(%ld) Loop is in a transition state\n", | |
e315cd28 | 2021 | __func__, vha->host_no)); |
33135aa2 RA |
2022 | } else { |
2023 | qla_printk(KERN_WARNING, ha, | |
2024 | "ERROR -- Unable to get host loop ID.\n"); | |
e315cd28 | 2025 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 2026 | } |
1da177e4 LT |
2027 | return (rval); |
2028 | } | |
2029 | ||
2030 | if (topo == 4) { | |
2031 | qla_printk(KERN_INFO, ha, | |
2032 | "Cannot get topology - retrying.\n"); | |
2033 | return (QLA_FUNCTION_FAILED); | |
2034 | } | |
2035 | ||
e315cd28 | 2036 | vha->loop_id = loop_id; |
1da177e4 LT |
2037 | |
2038 | /* initialize */ | |
2039 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
2040 | ha->operating_mode = LOOP; | |
2c3dfe3f | 2041 | ha->switch_cap = 0; |
1da177e4 LT |
2042 | |
2043 | switch (topo) { | |
2044 | case 0: | |
2045 | DEBUG3(printk("scsi(%ld): HBA in NL topology.\n", | |
e315cd28 | 2046 | vha->host_no)); |
1da177e4 LT |
2047 | ha->current_topology = ISP_CFG_NL; |
2048 | strcpy(connect_type, "(Loop)"); | |
2049 | break; | |
2050 | ||
2051 | case 1: | |
2052 | DEBUG3(printk("scsi(%ld): HBA in FL topology.\n", | |
e315cd28 | 2053 | vha->host_no)); |
2c3dfe3f | 2054 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2055 | ha->current_topology = ISP_CFG_FL; |
2056 | strcpy(connect_type, "(FL_Port)"); | |
2057 | break; | |
2058 | ||
2059 | case 2: | |
2060 | DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n", | |
e315cd28 | 2061 | vha->host_no)); |
1da177e4 LT |
2062 | ha->operating_mode = P2P; |
2063 | ha->current_topology = ISP_CFG_N; | |
2064 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
2065 | break; | |
2066 | ||
2067 | case 3: | |
2068 | DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n", | |
e315cd28 | 2069 | vha->host_no)); |
2c3dfe3f | 2070 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2071 | ha->operating_mode = P2P; |
2072 | ha->current_topology = ISP_CFG_F; | |
2073 | strcpy(connect_type, "(F_Port)"); | |
2074 | break; | |
2075 | ||
2076 | default: | |
2077 | DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. " | |
2078 | "Using NL.\n", | |
e315cd28 | 2079 | vha->host_no, topo)); |
1da177e4 LT |
2080 | ha->current_topology = ISP_CFG_NL; |
2081 | strcpy(connect_type, "(Loop)"); | |
2082 | break; | |
2083 | } | |
2084 | ||
2085 | /* Save Host port and loop ID. */ | |
2086 | /* byte order - Big Endian */ | |
e315cd28 AC |
2087 | vha->d_id.b.domain = domain; |
2088 | vha->d_id.b.area = area; | |
2089 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 2090 | |
e315cd28 | 2091 | if (!vha->flags.init_done) |
1da177e4 LT |
2092 | qla_printk(KERN_INFO, ha, |
2093 | "Topology - %s, Host Loop address 0x%x\n", | |
e315cd28 | 2094 | connect_type, vha->loop_id); |
1da177e4 LT |
2095 | |
2096 | if (rval) { | |
e315cd28 | 2097 | DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no)); |
1da177e4 | 2098 | } else { |
e315cd28 | 2099 | DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no)); |
1da177e4 LT |
2100 | } |
2101 | ||
2102 | return(rval); | |
2103 | } | |
2104 | ||
a9083016 | 2105 | inline void |
e315cd28 AC |
2106 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
2107 | char *def) | |
9bb9fcf2 AV |
2108 | { |
2109 | char *st, *en; | |
2110 | uint16_t index; | |
e315cd28 | 2111 | struct qla_hw_data *ha = vha->hw; |
ab671149 | 2112 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
a9083016 | 2113 | !IS_QLA8XXX_TYPE(ha); |
9bb9fcf2 AV |
2114 | |
2115 | if (memcmp(model, BINZERO, len) != 0) { | |
2116 | strncpy(ha->model_number, model, len); | |
2117 | st = en = ha->model_number; | |
2118 | en += len - 1; | |
2119 | while (en > st) { | |
2120 | if (*en != 0x20 && *en != 0x00) | |
2121 | break; | |
2122 | *en-- = '\0'; | |
2123 | } | |
2124 | ||
2125 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2126 | if (use_tbl && |
2127 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 2128 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
2129 | strncpy(ha->model_desc, |
2130 | qla2x00_model_name[index * 2 + 1], | |
2131 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2132 | } else { |
2133 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2134 | if (use_tbl && |
2135 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
2136 | index < QLA_MODEL_NAMES) { |
2137 | strcpy(ha->model_number, | |
2138 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
2139 | strncpy(ha->model_desc, |
2140 | qla2x00_model_name[index * 2 + 1], | |
2141 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2142 | } else { |
2143 | strcpy(ha->model_number, def); | |
2144 | } | |
2145 | } | |
1ee27146 | 2146 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 2147 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 2148 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
2149 | } |
2150 | ||
4e08df3f DM |
2151 | /* On sparc systems, obtain port and node WWN from firmware |
2152 | * properties. | |
2153 | */ | |
e315cd28 | 2154 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
2155 | { |
2156 | #ifdef CONFIG_SPARC | |
e315cd28 | 2157 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 2158 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
2159 | struct device_node *dp = pci_device_to_OF_node(pdev); |
2160 | const u8 *val; | |
4e08df3f DM |
2161 | int len; |
2162 | ||
2163 | val = of_get_property(dp, "port-wwn", &len); | |
2164 | if (val && len >= WWN_SIZE) | |
2165 | memcpy(nv->port_name, val, WWN_SIZE); | |
2166 | ||
2167 | val = of_get_property(dp, "node-wwn", &len); | |
2168 | if (val && len >= WWN_SIZE) | |
2169 | memcpy(nv->node_name, val, WWN_SIZE); | |
2170 | #endif | |
2171 | } | |
2172 | ||
1da177e4 LT |
2173 | /* |
2174 | * NVRAM configuration for ISP 2xxx | |
2175 | * | |
2176 | * Input: | |
2177 | * ha = adapter block pointer. | |
2178 | * | |
2179 | * Output: | |
2180 | * initialization control block in response_ring | |
2181 | * host adapters parameters in host adapter block | |
2182 | * | |
2183 | * Returns: | |
2184 | * 0 = success. | |
2185 | */ | |
abbd8870 | 2186 | int |
e315cd28 | 2187 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 2188 | { |
4e08df3f | 2189 | int rval; |
0107109e AV |
2190 | uint8_t chksum = 0; |
2191 | uint16_t cnt; | |
2192 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 2193 | struct qla_hw_data *ha = vha->hw; |
0107109e | 2194 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
2195 | nvram_t *nv = ha->nvram; |
2196 | uint8_t *ptr = ha->nvram; | |
3d71644c | 2197 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2198 | |
4e08df3f DM |
2199 | rval = QLA_SUCCESS; |
2200 | ||
1da177e4 | 2201 | /* Determine NVRAM starting address. */ |
0107109e | 2202 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
2203 | ha->nvram_base = 0; |
2204 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
2205 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
2206 | ha->nvram_base = 0x80; | |
2207 | ||
2208 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 2209 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
2210 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
2211 | chksum += *ptr++; | |
1da177e4 | 2212 | |
e315cd28 | 2213 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 2214 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
1da177e4 LT |
2215 | |
2216 | /* Bad NVRAM data, set defaults parameters. */ | |
2217 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
2218 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
2219 | /* Reset NVRAM data. */ | |
2220 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
2221 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
2222 | nv->nvram_version); | |
4e08df3f DM |
2223 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
2224 | "invalid -- WWPN) defaults.\n"); | |
2225 | ||
2226 | /* | |
2227 | * Set default initialization control block. | |
2228 | */ | |
2229 | memset(nv, 0, ha->nvram_size); | |
2230 | nv->parameter_block_version = ICB_VERSION; | |
2231 | ||
2232 | if (IS_QLA23XX(ha)) { | |
2233 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2234 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2235 | nv->add_firmware_options[0] = BIT_5; | |
2236 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2237 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2238 | nv->special_options[1] = BIT_7; | |
2239 | } else if (IS_QLA2200(ha)) { | |
2240 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2241 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2242 | nv->add_firmware_options[0] = BIT_5; | |
2243 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2244 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2245 | } else if (IS_QLA2100(ha)) { | |
2246 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
2247 | nv->firmware_options[1] = BIT_5; | |
2248 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2249 | } | |
2250 | ||
2251 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
2252 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
2253 | nv->retry_count = 8; | |
2254 | nv->retry_delay = 1; | |
2255 | ||
2256 | nv->port_name[0] = 33; | |
2257 | nv->port_name[3] = 224; | |
2258 | nv->port_name[4] = 139; | |
2259 | ||
e315cd28 | 2260 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
2261 | |
2262 | nv->login_timeout = 4; | |
2263 | ||
2264 | /* | |
2265 | * Set default host adapter parameters | |
2266 | */ | |
2267 | nv->host_p[1] = BIT_2; | |
2268 | nv->reset_delay = 5; | |
2269 | nv->port_down_retry_count = 8; | |
2270 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
2271 | nv->link_down_timeout = 60; | |
2272 | ||
2273 | rval = 1; | |
1da177e4 LT |
2274 | } |
2275 | ||
2276 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
2277 | /* | |
2278 | * The SN2 does not provide BIOS emulation which means you can't change | |
2279 | * potentially bogus BIOS settings. Force the use of default settings | |
2280 | * for link rate and frame size. Hope that the rest of the settings | |
2281 | * are valid. | |
2282 | */ | |
2283 | if (ia64_platform_is("sn2")) { | |
2284 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2285 | if (IS_QLA23XX(ha)) | |
2286 | nv->special_options[1] = BIT_7; | |
2287 | } | |
2288 | #endif | |
2289 | ||
2290 | /* Reset Initialization control block */ | |
0107109e | 2291 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
2292 | |
2293 | /* | |
2294 | * Setup driver NVRAM options. | |
2295 | */ | |
2296 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
2297 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
2298 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
2299 | nv->firmware_options[1] &= ~BIT_4; | |
2300 | ||
2301 | if (IS_QLA23XX(ha)) { | |
2302 | nv->firmware_options[0] |= BIT_2; | |
2303 | nv->firmware_options[0] &= ~BIT_3; | |
5ff1d584 | 2304 | nv->firmware_options[0] &= ~BIT_6; |
0107109e | 2305 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
2306 | |
2307 | if (IS_QLA2300(ha)) { | |
2308 | if (ha->fb_rev == FPM_2310) { | |
2309 | strcpy(ha->model_number, "QLA2310"); | |
2310 | } else { | |
2311 | strcpy(ha->model_number, "QLA2300"); | |
2312 | } | |
2313 | } else { | |
e315cd28 | 2314 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 2315 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
2316 | } |
2317 | } else if (IS_QLA2200(ha)) { | |
2318 | nv->firmware_options[0] |= BIT_2; | |
2319 | /* | |
2320 | * 'Point-to-point preferred, else loop' is not a safe | |
2321 | * connection mode setting. | |
2322 | */ | |
2323 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
2324 | (BIT_5 | BIT_4)) { | |
2325 | /* Force 'loop preferred, else point-to-point'. */ | |
2326 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
2327 | nv->add_firmware_options[0] |= BIT_5; | |
2328 | } | |
2329 | strcpy(ha->model_number, "QLA22xx"); | |
2330 | } else /*if (IS_QLA2100(ha))*/ { | |
2331 | strcpy(ha->model_number, "QLA2100"); | |
2332 | } | |
2333 | ||
2334 | /* | |
2335 | * Copy over NVRAM RISC parameter block to initialization control block. | |
2336 | */ | |
2337 | dptr1 = (uint8_t *)icb; | |
2338 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
2339 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
2340 | while (cnt--) | |
2341 | *dptr1++ = *dptr2++; | |
2342 | ||
2343 | /* Copy 2nd half. */ | |
2344 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
2345 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
2346 | while (cnt--) | |
2347 | *dptr1++ = *dptr2++; | |
2348 | ||
5341e868 AV |
2349 | /* Use alternate WWN? */ |
2350 | if (nv->host_p[1] & BIT_7) { | |
2351 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
2352 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
2353 | } | |
2354 | ||
1da177e4 LT |
2355 | /* Prepare nodename */ |
2356 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
2357 | /* | |
2358 | * Firmware will apply the following mask if the nodename was | |
2359 | * not provided. | |
2360 | */ | |
2361 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
2362 | icb->node_name[0] &= 0xF0; | |
2363 | } | |
2364 | ||
2365 | /* | |
2366 | * Set host adapter parameters. | |
2367 | */ | |
0181944f | 2368 | if (nv->host_p[0] & BIT_7) |
11010fec | 2369 | ql2xextended_error_logging = 1; |
1da177e4 LT |
2370 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
2371 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
2372 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
2373 | ha->flags.disable_risc_code_load = 0; | |
2374 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
2375 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
2376 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 2377 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 2378 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
2379 | |
2380 | ha->operating_mode = | |
2381 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
2382 | ||
2383 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
2384 | sizeof(ha->fw_seriallink_options)); | |
2385 | ||
2386 | /* save HBA serial number */ | |
2387 | ha->serial0 = icb->port_name[5]; | |
2388 | ha->serial1 = icb->port_name[6]; | |
2389 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
2390 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
2391 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
2392 | |
2393 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
2394 | ||
2395 | ha->retry_count = nv->retry_count; | |
2396 | ||
2397 | /* Set minimum login_timeout to 4 seconds. */ | |
5b91490e | 2398 | if (nv->login_timeout != ql2xlogintimeout) |
1da177e4 LT |
2399 | nv->login_timeout = ql2xlogintimeout; |
2400 | if (nv->login_timeout < 4) | |
2401 | nv->login_timeout = 4; | |
2402 | ha->login_timeout = nv->login_timeout; | |
2403 | icb->login_timeout = nv->login_timeout; | |
2404 | ||
00a537b8 AV |
2405 | /* Set minimum RATOV to 100 tenths of a second. */ |
2406 | ha->r_a_tov = 100; | |
1da177e4 | 2407 | |
1da177e4 LT |
2408 | ha->loop_reset_delay = nv->reset_delay; |
2409 | ||
1da177e4 LT |
2410 | /* Link Down Timeout = 0: |
2411 | * | |
2412 | * When Port Down timer expires we will start returning | |
2413 | * I/O's to OS with "DID_NO_CONNECT". | |
2414 | * | |
2415 | * Link Down Timeout != 0: | |
2416 | * | |
2417 | * The driver waits for the link to come up after link down | |
2418 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 2419 | */ |
1da177e4 LT |
2420 | if (nv->link_down_timeout == 0) { |
2421 | ha->loop_down_abort_time = | |
354d6b21 | 2422 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
2423 | } else { |
2424 | ha->link_down_timeout = nv->link_down_timeout; | |
2425 | ha->loop_down_abort_time = | |
2426 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 2427 | } |
1da177e4 | 2428 | |
1da177e4 LT |
2429 | /* |
2430 | * Need enough time to try and get the port back. | |
2431 | */ | |
2432 | ha->port_down_retry_count = nv->port_down_retry_count; | |
2433 | if (qlport_down_retry) | |
2434 | ha->port_down_retry_count = qlport_down_retry; | |
2435 | /* Set login_retry_count */ | |
2436 | ha->login_retry_count = nv->retry_count; | |
2437 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
2438 | ha->port_down_retry_count > 3) | |
2439 | ha->login_retry_count = ha->port_down_retry_count; | |
2440 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
2441 | ha->login_retry_count = ha->port_down_retry_count; | |
2442 | if (ql2xloginretrycount) | |
2443 | ha->login_retry_count = ql2xloginretrycount; | |
2444 | ||
1da177e4 LT |
2445 | icb->lun_enables = __constant_cpu_to_le16(0); |
2446 | icb->command_resource_count = 0; | |
2447 | icb->immediate_notify_resource_count = 0; | |
2448 | icb->timeout = __constant_cpu_to_le16(0); | |
2449 | ||
2450 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
2451 | /* Enable RIO */ | |
2452 | icb->firmware_options[0] &= ~BIT_3; | |
2453 | icb->add_firmware_options[0] &= | |
2454 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2455 | icb->add_firmware_options[0] |= BIT_2; | |
2456 | icb->response_accumulation_timer = 3; | |
2457 | icb->interrupt_delay_timer = 5; | |
2458 | ||
e315cd28 | 2459 | vha->flags.process_response_queue = 1; |
1da177e4 | 2460 | } else { |
4fdfefe5 | 2461 | /* Enable ZIO. */ |
e315cd28 | 2462 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
2463 | ha->zio_mode = icb->add_firmware_options[0] & |
2464 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2465 | ha->zio_timer = icb->interrupt_delay_timer ? | |
2466 | icb->interrupt_delay_timer: 2; | |
2467 | } | |
1da177e4 LT |
2468 | icb->add_firmware_options[0] &= |
2469 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 2470 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 2471 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 2472 | ha->zio_mode = QLA_ZIO_MODE_6; |
2473 | ||
4fdfefe5 | 2474 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer " |
e315cd28 | 2475 | "delay (%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 | 2476 | ha->zio_timer * 100)); |
1da177e4 | 2477 | qla_printk(KERN_INFO, ha, |
4fdfefe5 AV |
2478 | "ZIO mode %d enabled; timer delay (%d us).\n", |
2479 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 2480 | |
4fdfefe5 AV |
2481 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
2482 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 2483 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
2484 | } |
2485 | } | |
2486 | ||
4e08df3f DM |
2487 | if (rval) { |
2488 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 2489 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
2490 | } |
2491 | return (rval); | |
1da177e4 LT |
2492 | } |
2493 | ||
19a7b4ae JSEC |
2494 | static void |
2495 | qla2x00_rport_del(void *data) | |
2496 | { | |
2497 | fc_port_t *fcport = data; | |
d97994dc | 2498 | struct fc_rport *rport; |
d97994dc | 2499 | |
e315cd28 | 2500 | spin_lock_irq(fcport->vha->host->host_lock); |
ac280b67 | 2501 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 2502 | fcport->drport = NULL; |
e315cd28 | 2503 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2504 | if (rport) |
2505 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
2506 | } |
2507 | ||
1da177e4 LT |
2508 | /** |
2509 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2510 | * @ha: HA context | |
2511 | * @flags: allocation flags | |
2512 | * | |
2513 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
2514 | */ | |
9a069e19 | 2515 | fc_port_t * |
e315cd28 | 2516 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
2517 | { |
2518 | fc_port_t *fcport; | |
2519 | ||
bbfbbbc1 MK |
2520 | fcport = kzalloc(sizeof(fc_port_t), flags); |
2521 | if (!fcport) | |
2522 | return NULL; | |
1da177e4 LT |
2523 | |
2524 | /* Setup fcport template structure. */ | |
e315cd28 AC |
2525 | fcport->vha = vha; |
2526 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
2527 | fcport->port_type = FCT_UNKNOWN; |
2528 | fcport->loop_id = FC_NO_LOOP_ID; | |
1da177e4 | 2529 | atomic_set(&fcport->state, FCS_UNCONFIGURED); |
ad3e0eda | 2530 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 2531 | |
bbfbbbc1 | 2532 | return fcport; |
1da177e4 LT |
2533 | } |
2534 | ||
2535 | /* | |
2536 | * qla2x00_configure_loop | |
2537 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2538 | * | |
2539 | * Input: | |
2540 | * ha = adapter block pointer. | |
2541 | * | |
2542 | * Returns: | |
2543 | * 0 = success. | |
2544 | * 1 = error. | |
2545 | * 2 = database was full and device was not configured. | |
2546 | */ | |
2547 | static int | |
e315cd28 | 2548 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2549 | { |
2550 | int rval; | |
2551 | unsigned long flags, save_flags; | |
e315cd28 | 2552 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2553 | rval = QLA_SUCCESS; |
2554 | ||
2555 | /* Get Initiator ID */ | |
e315cd28 AC |
2556 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2557 | rval = qla2x00_configure_hba(vha); | |
1da177e4 LT |
2558 | if (rval != QLA_SUCCESS) { |
2559 | DEBUG(printk("scsi(%ld): Unable to configure HBA.\n", | |
e315cd28 | 2560 | vha->host_no)); |
1da177e4 LT |
2561 | return (rval); |
2562 | } | |
2563 | } | |
2564 | ||
e315cd28 | 2565 | save_flags = flags = vha->dpc_flags; |
1da177e4 | 2566 | DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n", |
e315cd28 | 2567 | vha->host_no, flags)); |
1da177e4 LT |
2568 | |
2569 | /* | |
2570 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2571 | * both at the same time. | |
2572 | */ | |
e315cd28 AC |
2573 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2574 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2575 | |
3064ff39 MH |
2576 | qla2x00_get_data_rate(vha); |
2577 | ||
1da177e4 LT |
2578 | /* Determine what we need to do */ |
2579 | if (ha->current_topology == ISP_CFG_FL && | |
2580 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2581 | ||
e315cd28 | 2582 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2583 | set_bit(RSCN_UPDATE, &flags); |
2584 | ||
2585 | } else if (ha->current_topology == ISP_CFG_F && | |
2586 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2587 | ||
e315cd28 | 2588 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2589 | set_bit(RSCN_UPDATE, &flags); |
2590 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2591 | |
2592 | } else if (ha->current_topology == ISP_CFG_N) { | |
2593 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2594 | |
e315cd28 | 2595 | } else if (!vha->flags.online || |
1da177e4 LT |
2596 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2597 | ||
e315cd28 | 2598 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2599 | set_bit(RSCN_UPDATE, &flags); |
2600 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2601 | } | |
2602 | ||
2603 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
e315cd28 | 2604 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
1da177e4 | 2605 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2606 | else |
2607 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2608 | } |
2609 | ||
2610 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
e315cd28 | 2611 | if (LOOP_TRANSITION(vha)) |
1da177e4 | 2612 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2613 | else |
2614 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2615 | } |
2616 | ||
2617 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2618 | if (atomic_read(&vha->loop_down_timer) || |
2619 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2620 | rval = QLA_FUNCTION_FAILED; |
2621 | } else { | |
e315cd28 | 2622 | atomic_set(&vha->loop_state, LOOP_READY); |
1da177e4 | 2623 | |
e315cd28 | 2624 | DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no)); |
1da177e4 LT |
2625 | } |
2626 | } | |
2627 | ||
2628 | if (rval) { | |
2629 | DEBUG2_3(printk("%s(%ld): *** FAILED ***\n", | |
e315cd28 | 2630 | __func__, vha->host_no)); |
1da177e4 LT |
2631 | } else { |
2632 | DEBUG3(printk("%s: exiting normally\n", __func__)); | |
2633 | } | |
2634 | ||
cc3ef7bc | 2635 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2636 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2637 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2638 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2639 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2640 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
3a6478df GM |
2641 | if (!IS_ALOGIO_CAPABLE(ha)) |
2642 | vha->flags.rscn_queue_overflow = 1; | |
f4658b6c | 2643 | } |
1da177e4 LT |
2644 | } |
2645 | ||
2646 | return (rval); | |
2647 | } | |
2648 | ||
2649 | ||
2650 | ||
2651 | /* | |
2652 | * qla2x00_configure_local_loop | |
2653 | * Updates Fibre Channel Device Database with local loop devices. | |
2654 | * | |
2655 | * Input: | |
2656 | * ha = adapter block pointer. | |
2657 | * | |
2658 | * Returns: | |
2659 | * 0 = success. | |
2660 | */ | |
2661 | static int | |
e315cd28 | 2662 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2663 | { |
2664 | int rval, rval2; | |
2665 | int found_devs; | |
2666 | int found; | |
2667 | fc_port_t *fcport, *new_fcport; | |
2668 | ||
2669 | uint16_t index; | |
2670 | uint16_t entries; | |
2671 | char *id_iter; | |
2672 | uint16_t loop_id; | |
2673 | uint8_t domain, area, al_pa; | |
e315cd28 | 2674 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2675 | |
2676 | found_devs = 0; | |
2677 | new_fcport = NULL; | |
2678 | entries = MAX_FIBRE_DEVICES; | |
2679 | ||
e315cd28 AC |
2680 | DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no)); |
2681 | DEBUG3(qla2x00_get_fcal_position_map(vha, NULL)); | |
1da177e4 LT |
2682 | |
2683 | /* Get list of logged in devices. */ | |
2684 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2685 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2686 | &entries); |
2687 | if (rval != QLA_SUCCESS) | |
2688 | goto cleanup_allocation; | |
2689 | ||
2690 | DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n", | |
7640335e | 2691 | vha->host_no, entries)); |
1da177e4 LT |
2692 | DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list, |
2693 | entries * sizeof(struct gid_list_info))); | |
2694 | ||
2695 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2696 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2697 | if (new_fcport == NULL) { |
2698 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2699 | goto cleanup_allocation; | |
2700 | } | |
2701 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2702 | ||
2703 | /* | |
2704 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2705 | */ | |
e315cd28 | 2706 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2707 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2708 | fcport->port_type != FCT_BROADCAST && | |
2709 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2710 | ||
2711 | DEBUG(printk("scsi(%ld): Marking port lost, " | |
2712 | "loop_id=0x%04x\n", | |
e315cd28 | 2713 | vha->host_no, fcport->loop_id)); |
1da177e4 LT |
2714 | |
2715 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
1da177e4 LT |
2716 | } |
2717 | } | |
2718 | ||
2719 | /* Add devices to port list. */ | |
2720 | id_iter = (char *)ha->gid_list; | |
2721 | for (index = 0; index < entries; index++) { | |
2722 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2723 | area = ((struct gid_list_info *)id_iter)->area; | |
2724 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2725 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2726 | loop_id = (uint16_t) |
2727 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2728 | else |
1da177e4 LT |
2729 | loop_id = le16_to_cpu( |
2730 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2731 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2732 | |
2733 | /* Bypass reserved domain fields. */ | |
2734 | if ((domain & 0xf0) == 0xf0) | |
2735 | continue; | |
2736 | ||
2737 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2738 | if (area && domain && |
e315cd28 | 2739 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2740 | continue; |
2741 | ||
2742 | /* Bypass invalid local loop ID. */ | |
2743 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2744 | continue; | |
2745 | ||
2746 | /* Fill in member data. */ | |
2747 | new_fcport->d_id.b.domain = domain; | |
2748 | new_fcport->d_id.b.area = area; | |
2749 | new_fcport->d_id.b.al_pa = al_pa; | |
2750 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2751 | new_fcport->vp_idx = vha->vp_idx; |
2752 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 LT |
2753 | if (rval2 != QLA_SUCCESS) { |
2754 | DEBUG2(printk("scsi(%ld): Failed to retrieve fcport " | |
2755 | "information -- get_port_database=%x, " | |
2756 | "loop_id=0x%04x\n", | |
e315cd28 | 2757 | vha->host_no, rval2, new_fcport->loop_id)); |
c9d02acf | 2758 | DEBUG2(printk("scsi(%ld): Scheduling resync...\n", |
e315cd28 AC |
2759 | vha->host_no)); |
2760 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
2761 | continue; |
2762 | } | |
2763 | ||
2764 | /* Check for matching device in port list. */ | |
2765 | found = 0; | |
2766 | fcport = NULL; | |
e315cd28 | 2767 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2768 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2769 | WWN_SIZE)) | |
2770 | continue; | |
2771 | ||
ddb9b126 | 2772 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2773 | fcport->loop_id = new_fcport->loop_id; |
2774 | fcport->port_type = new_fcport->port_type; | |
2775 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2776 | memcpy(fcport->node_name, new_fcport->node_name, | |
2777 | WWN_SIZE); | |
2778 | ||
2779 | found++; | |
2780 | break; | |
2781 | } | |
2782 | ||
2783 | if (!found) { | |
2784 | /* New device, add to fcports list. */ | |
e315cd28 AC |
2785 | if (vha->vp_idx) { |
2786 | new_fcport->vha = vha; | |
2787 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2788 | } |
e315cd28 | 2789 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2790 | |
2791 | /* Allocate a new replacement fcport. */ | |
2792 | fcport = new_fcport; | |
e315cd28 | 2793 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2794 | if (new_fcport == NULL) { |
2795 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2796 | goto cleanup_allocation; | |
2797 | } | |
2798 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2799 | } | |
2800 | ||
d8b45213 | 2801 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2802 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2803 | |
e315cd28 | 2804 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2805 | |
2806 | found_devs++; | |
2807 | } | |
2808 | ||
2809 | cleanup_allocation: | |
c9475cb0 | 2810 | kfree(new_fcport); |
1da177e4 LT |
2811 | |
2812 | if (rval != QLA_SUCCESS) { | |
2813 | DEBUG2(printk("scsi(%ld): Configure local loop error exit: " | |
e315cd28 | 2814 | "rval=%x\n", vha->host_no, rval)); |
1da177e4 LT |
2815 | } |
2816 | ||
1da177e4 LT |
2817 | return (rval); |
2818 | } | |
2819 | ||
d8b45213 | 2820 | static void |
e315cd28 | 2821 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2822 | { |
2823 | #define LS_UNKNOWN 2 | |
9f8fddee AV |
2824 | static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; |
2825 | char *link_speed; | |
d8b45213 | 2826 | int rval; |
1bb39548 | 2827 | uint16_t mb[4]; |
e315cd28 | 2828 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2829 | |
c76f2c01 | 2830 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2831 | return; |
2832 | ||
c9afb9a2 GM |
2833 | if (atomic_read(&fcport->state) != FCS_ONLINE) |
2834 | return; | |
2835 | ||
39bd9622 AV |
2836 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2837 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2838 | return; |
2839 | ||
e315cd28 | 2840 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2841 | mb); |
d8b45213 AV |
2842 | if (rval != QLA_SUCCESS) { |
2843 | DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA " | |
2844 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n", | |
e315cd28 | 2845 | vha->host_no, fcport->port_name[0], fcport->port_name[1], |
d8b45213 AV |
2846 | fcport->port_name[2], fcport->port_name[3], |
2847 | fcport->port_name[4], fcport->port_name[5], | |
2848 | fcport->port_name[6], fcport->port_name[7], rval, | |
a3cbdfad | 2849 | fcport->fp_speed, mb[0], mb[1])); |
d8b45213 | 2850 | } else { |
9f8fddee AV |
2851 | link_speed = link_speeds[LS_UNKNOWN]; |
2852 | if (fcport->fp_speed < 5) | |
2853 | link_speed = link_speeds[fcport->fp_speed]; | |
2854 | else if (fcport->fp_speed == 0x13) | |
2855 | link_speed = link_speeds[5]; | |
d8b45213 AV |
2856 | DEBUG2(qla_printk(KERN_INFO, ha, |
2857 | "iIDMA adjusted to %s GB/s on " | |
2858 | "%02x%02x%02x%02x%02x%02x%02x%02x.\n", | |
9f8fddee | 2859 | link_speed, fcport->port_name[0], |
d8b45213 AV |
2860 | fcport->port_name[1], fcport->port_name[2], |
2861 | fcport->port_name[3], fcport->port_name[4], | |
2862 | fcport->port_name[5], fcport->port_name[6], | |
2863 | fcport->port_name[7])); | |
2864 | } | |
2865 | } | |
2866 | ||
23be331d | 2867 | static void |
e315cd28 | 2868 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 | 2869 | { |
2870 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2871 | struct fc_rport *rport; |
e315cd28 | 2872 | struct qla_hw_data *ha = vha->hw; |
8482e118 | 2873 | |
ac280b67 | 2874 | qla2x00_rport_del(fcport); |
8482e118 | 2875 | |
f8b02a85 AV |
2876 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2877 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 | 2878 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2879 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2880 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2881 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 AV |
2882 | if (!rport) { |
2883 | qla_printk(KERN_WARNING, ha, | |
2884 | "Unable to allocate fc remote port!\n"); | |
2885 | return; | |
2886 | } | |
e315cd28 | 2887 | spin_lock_irq(fcport->vha->host->host_lock); |
19a7b4ae | 2888 | *((fc_port_t **)rport->dd_data) = fcport; |
e315cd28 | 2889 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2890 | |
ad3e0eda | 2891 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2892 | |
8482e118 | 2893 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2894 | if (fcport->port_type == FCT_INITIATOR) | |
2895 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2896 | if (fcport->port_type == FCT_TARGET) | |
2897 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2898 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2899 | } |
2900 | ||
23be331d AB |
2901 | /* |
2902 | * qla2x00_update_fcport | |
2903 | * Updates device on list. | |
2904 | * | |
2905 | * Input: | |
2906 | * ha = adapter block pointer. | |
2907 | * fcport = port structure pointer. | |
2908 | * | |
2909 | * Return: | |
2910 | * 0 - Success | |
2911 | * BIT_0 - error | |
2912 | * | |
2913 | * Context: | |
2914 | * Kernel context. | |
2915 | */ | |
2916 | void | |
e315cd28 | 2917 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2918 | { |
e315cd28 | 2919 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 2920 | |
e315cd28 | 2921 | fcport->vha = vha; |
23be331d | 2922 | fcport->login_retry = 0; |
e315cd28 | 2923 | fcport->port_login_retry_count = ha->port_down_retry_count * |
23be331d | 2924 | PORT_RETRY_TIME; |
e315cd28 | 2925 | atomic_set(&fcport->port_down_timer, ha->port_down_retry_count * |
23be331d | 2926 | PORT_RETRY_TIME); |
5ff1d584 | 2927 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); |
23be331d | 2928 | |
e315cd28 | 2929 | qla2x00_iidma_fcport(vha, fcport); |
23be331d AB |
2930 | |
2931 | atomic_set(&fcport->state, FCS_ONLINE); | |
2932 | ||
e315cd28 | 2933 | qla2x00_reg_remote_port(vha, fcport); |
23be331d AB |
2934 | } |
2935 | ||
1da177e4 LT |
2936 | /* |
2937 | * qla2x00_configure_fabric | |
2938 | * Setup SNS devices with loop ID's. | |
2939 | * | |
2940 | * Input: | |
2941 | * ha = adapter block pointer. | |
2942 | * | |
2943 | * Returns: | |
2944 | * 0 = success. | |
2945 | * BIT_0 = error | |
2946 | */ | |
2947 | static int | |
e315cd28 | 2948 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 LT |
2949 | { |
2950 | int rval, rval2; | |
2951 | fc_port_t *fcport, *fcptemp; | |
2952 | uint16_t next_loopid; | |
2953 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2954 | uint16_t loop_id; |
1da177e4 | 2955 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2956 | struct qla_hw_data *ha = vha->hw; |
2957 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2958 | |
2959 | /* If FL port exists, then SNS is present */ | |
e428924c | 2960 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2961 | loop_id = NPH_F_PORT; |
2962 | else | |
2963 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2964 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 LT |
2965 | if (rval != QLA_SUCCESS) { |
2966 | DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL " | |
e315cd28 | 2967 | "Port\n", vha->host_no)); |
1da177e4 | 2968 | |
e315cd28 | 2969 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2970 | return (QLA_SUCCESS); |
2971 | } | |
e315cd28 | 2972 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 LT |
2973 | |
2974 | /* Mark devices that need re-synchronization. */ | |
e315cd28 | 2975 | rval2 = qla2x00_device_resync(vha); |
1da177e4 LT |
2976 | if (rval2 == QLA_RSCNS_HANDLED) { |
2977 | /* No point doing the scan, just continue. */ | |
2978 | return (QLA_SUCCESS); | |
2979 | } | |
2980 | do { | |
cca5335c AV |
2981 | /* FDMI support. */ |
2982 | if (ql2xfdmienable && | |
e315cd28 AC |
2983 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2984 | qla2x00_fdmi_register(vha); | |
cca5335c | 2985 | |
1da177e4 | 2986 | /* Ensure we are logged into the SNS. */ |
e428924c | 2987 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2988 | loop_id = NPH_SNS; |
2989 | else | |
2990 | loop_id = SIMPLE_NAME_SERVER; | |
e315cd28 | 2991 | ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
abbd8870 | 2992 | 0xfc, mb, BIT_1 | BIT_0); |
1da177e4 LT |
2993 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
2994 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2995 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
0107109e | 2996 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id, |
1da177e4 LT |
2997 | mb[0], mb[1], mb[2], mb[6], mb[7])); |
2998 | return (QLA_SUCCESS); | |
2999 | } | |
3000 | ||
e315cd28 AC |
3001 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
3002 | if (qla2x00_rft_id(vha)) { | |
1da177e4 LT |
3003 | /* EMPTY */ |
3004 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 3005 | "TYPE failed.\n", vha->host_no)); |
1da177e4 | 3006 | } |
e315cd28 | 3007 | if (qla2x00_rff_id(vha)) { |
1da177e4 LT |
3008 | /* EMPTY */ |
3009 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 3010 | "Features failed.\n", vha->host_no)); |
1da177e4 | 3011 | } |
e315cd28 | 3012 | if (qla2x00_rnn_id(vha)) { |
1da177e4 LT |
3013 | /* EMPTY */ |
3014 | DEBUG2(printk("scsi(%ld): Register Node Name " | |
e315cd28 AC |
3015 | "failed.\n", vha->host_no)); |
3016 | } else if (qla2x00_rsnn_nn(vha)) { | |
1da177e4 LT |
3017 | /* EMPTY */ |
3018 | DEBUG2(printk("scsi(%ld): Register Symbolic " | |
e315cd28 | 3019 | "Node Name failed.\n", vha->host_no)); |
1da177e4 LT |
3020 | } |
3021 | } | |
3022 | ||
e315cd28 | 3023 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
3024 | if (rval != QLA_SUCCESS) |
3025 | break; | |
3026 | ||
3027 | /* | |
3028 | * Logout all previous fabric devices marked lost, except | |
f08b7251 | 3029 | * FCP2 devices. |
1da177e4 | 3030 | */ |
e315cd28 AC |
3031 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3032 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3033 | break; |
3034 | ||
3035 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
3036 | continue; | |
3037 | ||
3038 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
e315cd28 | 3039 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3040 | ql2xplogiabsentdevice, 0); |
1da177e4 | 3041 | if (fcport->loop_id != FC_NO_LOOP_ID && |
f08b7251 | 3042 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3043 | fcport->port_type != FCT_INITIATOR && |
3044 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3045 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
3046 | fcport->loop_id, |
3047 | fcport->d_id.b.domain, | |
3048 | fcport->d_id.b.area, | |
3049 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3050 | fcport->loop_id = FC_NO_LOOP_ID; |
3051 | } | |
3052 | } | |
3053 | } | |
3054 | ||
3055 | /* Starting free loop ID. */ | |
e315cd28 | 3056 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
3057 | |
3058 | /* | |
3059 | * Scan through our port list and login entries that need to be | |
3060 | * logged in. | |
3061 | */ | |
e315cd28 AC |
3062 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3063 | if (atomic_read(&vha->loop_down_timer) || | |
3064 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3065 | break; |
3066 | ||
3067 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
3068 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
3069 | continue; | |
3070 | ||
3071 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
3072 | fcport->loop_id = next_loopid; | |
d4486fd6 | 3073 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 3074 | base_vha, fcport); |
1da177e4 LT |
3075 | if (rval != QLA_SUCCESS) { |
3076 | /* Ran out of IDs to use */ | |
3077 | break; | |
3078 | } | |
3079 | } | |
1da177e4 | 3080 | /* Login and update database */ |
e315cd28 | 3081 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
3082 | } |
3083 | ||
3084 | /* Exit if out of loop IDs. */ | |
3085 | if (rval != QLA_SUCCESS) { | |
3086 | break; | |
3087 | } | |
3088 | ||
3089 | /* | |
3090 | * Login and add the new devices to our port list. | |
3091 | */ | |
3092 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
3093 | if (atomic_read(&vha->loop_down_timer) || |
3094 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3095 | break; |
3096 | ||
3097 | /* Find a new loop ID to use. */ | |
3098 | fcport->loop_id = next_loopid; | |
e315cd28 | 3099 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
3100 | if (rval != QLA_SUCCESS) { |
3101 | /* Ran out of IDs to use */ | |
3102 | break; | |
3103 | } | |
3104 | ||
bdf79621 | 3105 | /* Login and update database */ |
e315cd28 AC |
3106 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
3107 | ||
3108 | if (vha->vp_idx) { | |
3109 | fcport->vha = vha; | |
3110 | fcport->vp_idx = vha->vp_idx; | |
3111 | } | |
3112 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
3113 | } |
3114 | } while (0); | |
3115 | ||
3116 | /* Free all new device structures not processed. */ | |
3117 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
3118 | list_del(&fcport->list); | |
3119 | kfree(fcport); | |
3120 | } | |
3121 | ||
3122 | if (rval) { | |
3123 | DEBUG2(printk("scsi(%ld): Configure fabric error exit: " | |
e315cd28 | 3124 | "rval=%d\n", vha->host_no, rval)); |
1da177e4 LT |
3125 | } |
3126 | ||
3127 | return (rval); | |
3128 | } | |
3129 | ||
1da177e4 LT |
3130 | /* |
3131 | * qla2x00_find_all_fabric_devs | |
3132 | * | |
3133 | * Input: | |
3134 | * ha = adapter block pointer. | |
3135 | * dev = database device entry pointer. | |
3136 | * | |
3137 | * Returns: | |
3138 | * 0 = success. | |
3139 | * | |
3140 | * Context: | |
3141 | * Kernel context. | |
3142 | */ | |
3143 | static int | |
e315cd28 AC |
3144 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
3145 | struct list_head *new_fcports) | |
1da177e4 LT |
3146 | { |
3147 | int rval; | |
3148 | uint16_t loop_id; | |
3149 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
3150 | int found; | |
3151 | ||
3152 | sw_info_t *swl; | |
3153 | int swl_idx; | |
3154 | int first_dev, last_dev; | |
1516ef44 | 3155 | port_id_t wrap = {}, nxt_d_id; |
e315cd28 AC |
3156 | struct qla_hw_data *ha = vha->hw; |
3157 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 3158 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3159 | |
3160 | rval = QLA_SUCCESS; | |
3161 | ||
3162 | /* Try GID_PT to get device list, else GAN. */ | |
4b89258c | 3163 | swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); |
bbfbbbc1 | 3164 | if (!swl) { |
1da177e4 LT |
3165 | /*EMPTY*/ |
3166 | DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback " | |
e315cd28 | 3167 | "on GA_NXT\n", vha->host_no)); |
1da177e4 | 3168 | } else { |
e315cd28 | 3169 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3170 | kfree(swl); |
3171 | swl = NULL; | |
e315cd28 | 3172 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3173 | kfree(swl); |
3174 | swl = NULL; | |
e315cd28 | 3175 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3176 | kfree(swl); |
3177 | swl = NULL; | |
e5896bd5 | 3178 | } else if (ql2xiidmaenable && |
e315cd28 AC |
3179 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
3180 | qla2x00_gpsc(vha, swl); | |
1da177e4 | 3181 | } |
e8c72ba5 CD |
3182 | |
3183 | /* If other queries succeeded probe for FC-4 type */ | |
3184 | if (swl) | |
3185 | qla2x00_gff_id(vha, swl); | |
1da177e4 LT |
3186 | } |
3187 | swl_idx = 0; | |
3188 | ||
3189 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 3190 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3191 | if (new_fcport == NULL) { |
c9475cb0 | 3192 | kfree(swl); |
1da177e4 LT |
3193 | return (QLA_MEMORY_ALLOC_FAILED); |
3194 | } | |
3195 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3196 | /* Set start port ID scan at adapter ID. */ |
3197 | first_dev = 1; | |
3198 | last_dev = 0; | |
3199 | ||
3200 | /* Starting free loop ID. */ | |
e315cd28 AC |
3201 | loop_id = ha->min_external_loopid; |
3202 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
3203 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
3204 | continue; |
3205 | ||
3a6478df GM |
3206 | if (ha->current_topology == ISP_CFG_FL && |
3207 | (atomic_read(&vha->loop_down_timer) || | |
3208 | LOOP_TRANSITION(vha))) { | |
bb2d52b2 AV |
3209 | atomic_set(&vha->loop_down_timer, 0); |
3210 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
3211 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 3212 | break; |
bb2d52b2 | 3213 | } |
1da177e4 LT |
3214 | |
3215 | if (swl != NULL) { | |
3216 | if (last_dev) { | |
3217 | wrap.b24 = new_fcport->d_id.b24; | |
3218 | } else { | |
3219 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
3220 | memcpy(new_fcport->node_name, | |
3221 | swl[swl_idx].node_name, WWN_SIZE); | |
3222 | memcpy(new_fcport->port_name, | |
3223 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
3224 | memcpy(new_fcport->fabric_port_name, |
3225 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
3226 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
e8c72ba5 | 3227 | new_fcport->fc4_type = swl[swl_idx].fc4_type; |
1da177e4 LT |
3228 | |
3229 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
3230 | last_dev = 1; | |
3231 | } | |
3232 | swl_idx++; | |
3233 | } | |
3234 | } else { | |
3235 | /* Send GA_NXT to the switch */ | |
e315cd28 | 3236 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 LT |
3237 | if (rval != QLA_SUCCESS) { |
3238 | qla_printk(KERN_WARNING, ha, | |
3239 | "SNS scan failed -- assuming zero-entry " | |
3240 | "result...\n"); | |
3241 | list_for_each_entry_safe(fcport, fcptemp, | |
3242 | new_fcports, list) { | |
3243 | list_del(&fcport->list); | |
3244 | kfree(fcport); | |
3245 | } | |
3246 | rval = QLA_SUCCESS; | |
3247 | break; | |
3248 | } | |
3249 | } | |
3250 | ||
3251 | /* If wrap on switch device list, exit. */ | |
3252 | if (first_dev) { | |
3253 | wrap.b24 = new_fcport->d_id.b24; | |
3254 | first_dev = 0; | |
3255 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
3256 | DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n", | |
e315cd28 | 3257 | vha->host_no, new_fcport->d_id.b.domain, |
1da177e4 LT |
3258 | new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa)); |
3259 | break; | |
3260 | } | |
3261 | ||
2c3dfe3f | 3262 | /* Bypass if same physical adapter. */ |
e315cd28 | 3263 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
3264 | continue; |
3265 | ||
2c3dfe3f | 3266 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
3267 | found = 0; |
3268 | if (ha->num_vhosts) { | |
feafb7b1 AE |
3269 | unsigned long flags; |
3270 | ||
3271 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3272 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3273 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
3274 | found = 1; | |
2c3dfe3f | 3275 | break; |
e315cd28 | 3276 | } |
2c3dfe3f | 3277 | } |
feafb7b1 AE |
3278 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
3279 | ||
e315cd28 | 3280 | if (found) |
2c3dfe3f SJ |
3281 | continue; |
3282 | } | |
3283 | ||
f7d289f6 AV |
3284 | /* Bypass if same domain and area of adapter. */ |
3285 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 3286 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
3287 | ISP_CFG_FL) |
3288 | continue; | |
3289 | ||
1da177e4 LT |
3290 | /* Bypass reserved domain fields. */ |
3291 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
3292 | continue; | |
3293 | ||
e8c72ba5 CD |
3294 | /* Bypass ports whose FCP-4 type is not FCP_SCSI */ |
3295 | if (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && | |
3296 | new_fcport->fc4_type != FC4_TYPE_UNKNOWN) | |
3297 | continue; | |
3298 | ||
1da177e4 LT |
3299 | /* Locate matching device in database. */ |
3300 | found = 0; | |
e315cd28 | 3301 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3302 | if (memcmp(new_fcport->port_name, fcport->port_name, |
3303 | WWN_SIZE)) | |
3304 | continue; | |
3305 | ||
3306 | found++; | |
3307 | ||
d8b45213 AV |
3308 | /* Update port state. */ |
3309 | memcpy(fcport->fabric_port_name, | |
3310 | new_fcport->fabric_port_name, WWN_SIZE); | |
3311 | fcport->fp_speed = new_fcport->fp_speed; | |
3312 | ||
1da177e4 LT |
3313 | /* |
3314 | * If address the same and state FCS_ONLINE, nothing | |
3315 | * changed. | |
3316 | */ | |
3317 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
3318 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
3319 | break; | |
3320 | } | |
3321 | ||
3322 | /* | |
3323 | * If device was not a fabric device before. | |
3324 | */ | |
3325 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
3326 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3327 | fcport->loop_id = FC_NO_LOOP_ID; | |
3328 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
3329 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3330 | break; |
3331 | } | |
3332 | ||
3333 | /* | |
3334 | * Port ID changed or device was marked to be updated; | |
3335 | * Log it out if still logged in and mark it for | |
3336 | * relogin later. | |
3337 | */ | |
3338 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3339 | fcport->flags |= FCF_LOGIN_NEEDED; | |
3340 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
f08b7251 | 3341 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3342 | fcport->port_type != FCT_INITIATOR && |
3343 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3344 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3345 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3346 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3347 | fcport->loop_id = FC_NO_LOOP_ID; |
3348 | } | |
3349 | ||
3350 | break; | |
3351 | } | |
3352 | ||
3353 | if (found) | |
3354 | continue; | |
1da177e4 LT |
3355 | /* If device was not in our fcports list, then add it. */ |
3356 | list_add_tail(&new_fcport->list, new_fcports); | |
3357 | ||
3358 | /* Allocate a new replacement fcport. */ | |
3359 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 3360 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3361 | if (new_fcport == NULL) { |
c9475cb0 | 3362 | kfree(swl); |
1da177e4 LT |
3363 | return (QLA_MEMORY_ALLOC_FAILED); |
3364 | } | |
3365 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
3366 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
3367 | } | |
3368 | ||
c9475cb0 JJ |
3369 | kfree(swl); |
3370 | kfree(new_fcport); | |
1da177e4 | 3371 | |
1da177e4 LT |
3372 | return (rval); |
3373 | } | |
3374 | ||
3375 | /* | |
3376 | * qla2x00_find_new_loop_id | |
3377 | * Scan through our port list and find a new usable loop ID. | |
3378 | * | |
3379 | * Input: | |
3380 | * ha: adapter state pointer. | |
3381 | * dev: port structure pointer. | |
3382 | * | |
3383 | * Returns: | |
3384 | * qla2x00 local function return status code. | |
3385 | * | |
3386 | * Context: | |
3387 | * Kernel context. | |
3388 | */ | |
413975a0 | 3389 | static int |
e315cd28 | 3390 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
3391 | { |
3392 | int rval; | |
3393 | int found; | |
3394 | fc_port_t *fcport; | |
3395 | uint16_t first_loop_id; | |
e315cd28 AC |
3396 | struct qla_hw_data *ha = vha->hw; |
3397 | struct scsi_qla_host *vp; | |
ee546b6e | 3398 | struct scsi_qla_host *tvp; |
feafb7b1 | 3399 | unsigned long flags = 0; |
1da177e4 LT |
3400 | |
3401 | rval = QLA_SUCCESS; | |
3402 | ||
3403 | /* Save starting loop ID. */ | |
3404 | first_loop_id = dev->loop_id; | |
3405 | ||
3406 | for (;;) { | |
3407 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 3408 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 3409 | dev->loop_id++; |
1da177e4 LT |
3410 | |
3411 | /* Skip reserved loop IDs. */ | |
e315cd28 | 3412 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 3413 | dev->loop_id++; |
1da177e4 LT |
3414 | |
3415 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 3416 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
3417 | /* first loop ID. */ |
3418 | dev->loop_id = ha->min_external_loopid; | |
3419 | } | |
3420 | ||
3421 | /* Check for loop ID being already in use. */ | |
3422 | found = 0; | |
3423 | fcport = NULL; | |
feafb7b1 AE |
3424 | |
3425 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3426 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3427 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
3428 | if (fcport->loop_id == dev->loop_id && | |
3429 | fcport != dev) { | |
3430 | /* ID possibly in use */ | |
3431 | found++; | |
3432 | break; | |
3433 | } | |
1da177e4 | 3434 | } |
e315cd28 AC |
3435 | if (found) |
3436 | break; | |
1da177e4 | 3437 | } |
feafb7b1 | 3438 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
1da177e4 LT |
3439 | |
3440 | /* If not in use then it is free to use. */ | |
3441 | if (!found) { | |
3442 | break; | |
3443 | } | |
3444 | ||
3445 | /* ID in use. Try next value. */ | |
3446 | dev->loop_id++; | |
3447 | ||
3448 | /* If wrap around. No free ID to use. */ | |
3449 | if (dev->loop_id == first_loop_id) { | |
3450 | dev->loop_id = FC_NO_LOOP_ID; | |
3451 | rval = QLA_FUNCTION_FAILED; | |
3452 | break; | |
3453 | } | |
3454 | } | |
3455 | ||
3456 | return (rval); | |
3457 | } | |
3458 | ||
3459 | /* | |
3460 | * qla2x00_device_resync | |
3461 | * Marks devices in the database that needs resynchronization. | |
3462 | * | |
3463 | * Input: | |
3464 | * ha = adapter block pointer. | |
3465 | * | |
3466 | * Context: | |
3467 | * Kernel context. | |
3468 | */ | |
3469 | static int | |
e315cd28 | 3470 | qla2x00_device_resync(scsi_qla_host_t *vha) |
1da177e4 LT |
3471 | { |
3472 | int rval; | |
1da177e4 LT |
3473 | uint32_t mask; |
3474 | fc_port_t *fcport; | |
3475 | uint32_t rscn_entry; | |
3476 | uint8_t rscn_out_iter; | |
3477 | uint8_t format; | |
1516ef44 | 3478 | port_id_t d_id = {}; |
1da177e4 LT |
3479 | |
3480 | rval = QLA_RSCNS_HANDLED; | |
3481 | ||
e315cd28 AC |
3482 | while (vha->rscn_out_ptr != vha->rscn_in_ptr || |
3483 | vha->flags.rscn_queue_overflow) { | |
1da177e4 | 3484 | |
e315cd28 | 3485 | rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; |
1da177e4 LT |
3486 | format = MSB(MSW(rscn_entry)); |
3487 | d_id.b.domain = LSB(MSW(rscn_entry)); | |
3488 | d_id.b.area = MSB(LSW(rscn_entry)); | |
3489 | d_id.b.al_pa = LSB(LSW(rscn_entry)); | |
3490 | ||
3491 | DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = " | |
3492 | "[%02x/%02x%02x%02x].\n", | |
e315cd28 | 3493 | vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain, |
1da177e4 LT |
3494 | d_id.b.area, d_id.b.al_pa)); |
3495 | ||
e315cd28 AC |
3496 | vha->rscn_out_ptr++; |
3497 | if (vha->rscn_out_ptr == MAX_RSCN_COUNT) | |
3498 | vha->rscn_out_ptr = 0; | |
1da177e4 LT |
3499 | |
3500 | /* Skip duplicate entries. */ | |
e315cd28 AC |
3501 | for (rscn_out_iter = vha->rscn_out_ptr; |
3502 | !vha->flags.rscn_queue_overflow && | |
3503 | rscn_out_iter != vha->rscn_in_ptr; | |
1da177e4 LT |
3504 | rscn_out_iter = (rscn_out_iter == |
3505 | (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { | |
3506 | ||
e315cd28 | 3507 | if (rscn_entry != vha->rscn_queue[rscn_out_iter]) |
1da177e4 LT |
3508 | break; |
3509 | ||
3510 | DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue " | |
e315cd28 | 3511 | "entry found at [%d].\n", vha->host_no, |
1da177e4 LT |
3512 | rscn_out_iter)); |
3513 | ||
e315cd28 | 3514 | vha->rscn_out_ptr = rscn_out_iter; |
1da177e4 LT |
3515 | } |
3516 | ||
3517 | /* Queue overflow, set switch default case. */ | |
e315cd28 | 3518 | if (vha->flags.rscn_queue_overflow) { |
1da177e4 | 3519 | DEBUG(printk("scsi(%ld): device_resync: rscn " |
e315cd28 | 3520 | "overflow.\n", vha->host_no)); |
1da177e4 LT |
3521 | |
3522 | format = 3; | |
e315cd28 | 3523 | vha->flags.rscn_queue_overflow = 0; |
1da177e4 LT |
3524 | } |
3525 | ||
3526 | switch (format) { | |
3527 | case 0: | |
1da177e4 LT |
3528 | mask = 0xffffff; |
3529 | break; | |
3530 | case 1: | |
3531 | mask = 0xffff00; | |
3532 | break; | |
3533 | case 2: | |
3534 | mask = 0xff0000; | |
3535 | break; | |
3536 | default: | |
3537 | mask = 0x0; | |
3538 | d_id.b24 = 0; | |
e315cd28 | 3539 | vha->rscn_out_ptr = vha->rscn_in_ptr; |
1da177e4 LT |
3540 | break; |
3541 | } | |
3542 | ||
3543 | rval = QLA_SUCCESS; | |
3544 | ||
e315cd28 | 3545 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3546 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || |
3547 | (fcport->d_id.b24 & mask) != d_id.b24 || | |
3548 | fcport->port_type == FCT_BROADCAST) | |
3549 | continue; | |
3550 | ||
3551 | if (atomic_read(&fcport->state) == FCS_ONLINE) { | |
3552 | if (format != 3 || | |
3553 | fcport->port_type != FCT_INITIATOR) { | |
e315cd28 | 3554 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3555 | 0, 0); |
1da177e4 LT |
3556 | } |
3557 | } | |
1da177e4 LT |
3558 | } |
3559 | } | |
3560 | return (rval); | |
3561 | } | |
3562 | ||
3563 | /* | |
3564 | * qla2x00_fabric_dev_login | |
3565 | * Login fabric target device and update FC port database. | |
3566 | * | |
3567 | * Input: | |
3568 | * ha: adapter state pointer. | |
3569 | * fcport: port structure list pointer. | |
3570 | * next_loopid: contains value of a new loop ID that can be used | |
3571 | * by the next login attempt. | |
3572 | * | |
3573 | * Returns: | |
3574 | * qla2x00 local function return status code. | |
3575 | * | |
3576 | * Context: | |
3577 | * Kernel context. | |
3578 | */ | |
3579 | static int | |
e315cd28 | 3580 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3581 | uint16_t *next_loopid) |
3582 | { | |
3583 | int rval; | |
3584 | int retry; | |
0107109e | 3585 | uint8_t opts; |
e315cd28 | 3586 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3587 | |
3588 | rval = QLA_SUCCESS; | |
3589 | retry = 0; | |
3590 | ||
ac280b67 | 3591 | if (IS_ALOGIO_CAPABLE(ha)) { |
5ff1d584 AV |
3592 | if (fcport->flags & FCF_ASYNC_SENT) |
3593 | return rval; | |
3594 | fcport->flags |= FCF_ASYNC_SENT; | |
ac280b67 AV |
3595 | rval = qla2x00_post_async_login_work(vha, fcport, NULL); |
3596 | if (!rval) | |
3597 | return rval; | |
3598 | } | |
3599 | ||
5ff1d584 | 3600 | fcport->flags &= ~FCF_ASYNC_SENT; |
e315cd28 | 3601 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3602 | if (rval == QLA_SUCCESS) { |
f08b7251 | 3603 | /* Send an ADISC to FCP2 devices.*/ |
0107109e | 3604 | opts = 0; |
f08b7251 | 3605 | if (fcport->flags & FCF_FCP2_DEVICE) |
0107109e | 3606 | opts |= BIT_1; |
e315cd28 | 3607 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3608 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3609 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3610 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3611 | fcport->d_id.b.al_pa); | |
e315cd28 | 3612 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3613 | } else { |
e315cd28 | 3614 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
3615 | } |
3616 | } | |
3617 | ||
3618 | return (rval); | |
3619 | } | |
3620 | ||
3621 | /* | |
3622 | * qla2x00_fabric_login | |
3623 | * Issue fabric login command. | |
3624 | * | |
3625 | * Input: | |
3626 | * ha = adapter block pointer. | |
3627 | * device = pointer to FC device type structure. | |
3628 | * | |
3629 | * Returns: | |
3630 | * 0 - Login successfully | |
3631 | * 1 - Login failed | |
3632 | * 2 - Initiator device | |
3633 | * 3 - Fatal error | |
3634 | */ | |
3635 | int | |
e315cd28 | 3636 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3637 | uint16_t *next_loopid) |
3638 | { | |
3639 | int rval; | |
3640 | int retry; | |
3641 | uint16_t tmp_loopid; | |
3642 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3643 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3644 | |
3645 | retry = 0; | |
3646 | tmp_loopid = 0; | |
3647 | ||
3648 | for (;;) { | |
3649 | DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x " | |
3650 | "for port %02x%02x%02x.\n", | |
e315cd28 | 3651 | vha->host_no, fcport->loop_id, fcport->d_id.b.domain, |
1da177e4 LT |
3652 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); |
3653 | ||
3654 | /* Login fcport on switch. */ | |
e315cd28 | 3655 | ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3656 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3657 | fcport->d_id.b.al_pa, mb, BIT_0); | |
3658 | if (mb[0] == MBS_PORT_ID_USED) { | |
3659 | /* | |
3660 | * Device has another loop ID. The firmware team | |
0107109e AV |
3661 | * recommends the driver perform an implicit login with |
3662 | * the specified ID again. The ID we just used is save | |
3663 | * here so we return with an ID that can be tried by | |
3664 | * the next login. | |
1da177e4 LT |
3665 | */ |
3666 | retry++; | |
3667 | tmp_loopid = fcport->loop_id; | |
3668 | fcport->loop_id = mb[1]; | |
3669 | ||
3670 | DEBUG(printk("Fabric Login: port in use - next " | |
3671 | "loop id=0x%04x, port Id=%02x%02x%02x.\n", | |
3672 | fcport->loop_id, fcport->d_id.b.domain, | |
3673 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
3674 | ||
3675 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3676 | /* | |
3677 | * Login succeeded. | |
3678 | */ | |
3679 | if (retry) { | |
3680 | /* A retry occurred before. */ | |
3681 | *next_loopid = tmp_loopid; | |
3682 | } else { | |
3683 | /* | |
3684 | * No retry occurred before. Just increment the | |
3685 | * ID value for next login. | |
3686 | */ | |
3687 | *next_loopid = (fcport->loop_id + 1); | |
3688 | } | |
3689 | ||
3690 | if (mb[1] & BIT_0) { | |
3691 | fcport->port_type = FCT_INITIATOR; | |
3692 | } else { | |
3693 | fcport->port_type = FCT_TARGET; | |
3694 | if (mb[1] & BIT_1) { | |
8474f3a0 | 3695 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
3696 | } |
3697 | } | |
3698 | ||
ad3e0eda AV |
3699 | if (mb[10] & BIT_0) |
3700 | fcport->supported_classes |= FC_COS_CLASS2; | |
3701 | if (mb[10] & BIT_1) | |
3702 | fcport->supported_classes |= FC_COS_CLASS3; | |
3703 | ||
1da177e4 LT |
3704 | rval = QLA_SUCCESS; |
3705 | break; | |
3706 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3707 | /* | |
3708 | * Loop ID already used, try next loop ID. | |
3709 | */ | |
3710 | fcport->loop_id++; | |
e315cd28 | 3711 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3712 | if (rval != QLA_SUCCESS) { |
3713 | /* Ran out of loop IDs to use */ | |
3714 | break; | |
3715 | } | |
3716 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3717 | /* | |
3718 | * Firmware possibly timed out during login. If NO | |
3719 | * retries are left to do then the device is declared | |
3720 | * dead. | |
3721 | */ | |
3722 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3723 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3724 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3725 | fcport->d_id.b.al_pa); | |
e315cd28 | 3726 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3727 | |
3728 | rval = 1; | |
3729 | break; | |
3730 | } else { | |
3731 | /* | |
3732 | * unrecoverable / not handled error | |
3733 | */ | |
3734 | DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x " | |
fa2a1ce5 | 3735 | "loop_id=%x jiffies=%lx.\n", |
e315cd28 | 3736 | __func__, vha->host_no, mb[0], |
1da177e4 LT |
3737 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3738 | fcport->d_id.b.al_pa, fcport->loop_id, jiffies)); | |
3739 | ||
3740 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3741 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3742 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3743 | fcport->d_id.b.al_pa); | |
1da177e4 | 3744 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3745 | fcport->login_retry = 0; |
1da177e4 LT |
3746 | |
3747 | rval = 3; | |
3748 | break; | |
3749 | } | |
3750 | } | |
3751 | ||
3752 | return (rval); | |
3753 | } | |
3754 | ||
3755 | /* | |
3756 | * qla2x00_local_device_login | |
3757 | * Issue local device login command. | |
3758 | * | |
3759 | * Input: | |
3760 | * ha = adapter block pointer. | |
3761 | * loop_id = loop id of device to login to. | |
3762 | * | |
3763 | * Returns (Where's the #define!!!!): | |
3764 | * 0 - Login successfully | |
3765 | * 1 - Login failed | |
3766 | * 3 - Fatal error | |
3767 | */ | |
3768 | int | |
e315cd28 | 3769 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3770 | { |
3771 | int rval; | |
3772 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3773 | ||
3774 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3775 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3776 | if (rval == QLA_SUCCESS) { |
3777 | /* Interrogate mailbox registers for any errors */ | |
3778 | if (mb[0] == MBS_COMMAND_ERROR) | |
3779 | rval = 1; | |
3780 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3781 | /* device not in PCB table */ | |
3782 | rval = 3; | |
3783 | } | |
3784 | ||
3785 | return (rval); | |
3786 | } | |
3787 | ||
3788 | /* | |
3789 | * qla2x00_loop_resync | |
3790 | * Resync with fibre channel devices. | |
3791 | * | |
3792 | * Input: | |
3793 | * ha = adapter block pointer. | |
3794 | * | |
3795 | * Returns: | |
3796 | * 0 = success | |
3797 | */ | |
3798 | int | |
e315cd28 | 3799 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3800 | { |
73208dfd | 3801 | int rval = QLA_SUCCESS; |
1da177e4 | 3802 | uint32_t wait_time; |
67c2e93a AC |
3803 | struct req_que *req; |
3804 | struct rsp_que *rsp; | |
3805 | ||
7163ea81 | 3806 | if (vha->hw->flags.cpu_affinity_enabled) |
67c2e93a AC |
3807 | req = vha->hw->req_q_map[0]; |
3808 | else | |
3809 | req = vha->req; | |
3810 | rsp = req->rsp; | |
1da177e4 | 3811 | |
e315cd28 AC |
3812 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
3813 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3814 | if (vha->flags.online) { | |
3815 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3816 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3817 | wait_time = 256; | |
3818 | do { | |
e315cd28 | 3819 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
1da177e4 | 3820 | |
0107109e | 3821 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3822 | qla2x00_marker(vha, req, rsp, 0, 0, |
3823 | MK_SYNC_ALL); | |
e315cd28 | 3824 | vha->marker_needed = 0; |
1da177e4 LT |
3825 | |
3826 | /* Remap devices on Loop. */ | |
e315cd28 | 3827 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3828 | |
e315cd28 | 3829 | qla2x00_configure_loop(vha); |
1da177e4 | 3830 | wait_time--; |
e315cd28 AC |
3831 | } while (!atomic_read(&vha->loop_down_timer) && |
3832 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3833 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3834 | &vha->dpc_flags))); | |
1da177e4 | 3835 | } |
1da177e4 LT |
3836 | } |
3837 | ||
e315cd28 | 3838 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3839 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3840 | |
e315cd28 | 3841 | if (rval) |
1da177e4 | 3842 | DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__)); |
1da177e4 LT |
3843 | |
3844 | return (rval); | |
3845 | } | |
3846 | ||
d97994dc | 3847 | void |
67becc00 | 3848 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc | 3849 | { |
3850 | fc_port_t *fcport; | |
feafb7b1 AE |
3851 | struct scsi_qla_host *vha; |
3852 | struct qla_hw_data *ha = base_vha->hw; | |
3853 | unsigned long flags; | |
d97994dc | 3854 | |
feafb7b1 | 3855 | spin_lock_irqsave(&ha->vport_slock, flags); |
d97994dc | 3856 | /* Go with deferred removal of rport references. */ |
feafb7b1 AE |
3857 | list_for_each_entry(vha, &base_vha->hw->vp_list, list) { |
3858 | atomic_inc(&vha->vref_count); | |
3859 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
67becc00 | 3860 | if (fcport && fcport->drport && |
feafb7b1 AE |
3861 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) { |
3862 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3863 | ||
67becc00 | 3864 | qla2x00_rport_del(fcport); |
feafb7b1 AE |
3865 | |
3866 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3867 | } | |
3868 | } | |
3869 | atomic_dec(&vha->vref_count); | |
3870 | } | |
3871 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
d97994dc | 3872 | } |
3873 | ||
a9083016 GM |
3874 | void |
3875 | qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) | |
3876 | { | |
3877 | struct qla_hw_data *ha = vha->hw; | |
3878 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
feafb7b1 | 3879 | unsigned long flags; |
a9083016 GM |
3880 | |
3881 | vha->flags.online = 0; | |
3882 | ha->flags.chip_reset_done = 0; | |
3883 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
3884 | ha->qla_stats.total_isp_aborts++; | |
3885 | ||
3886 | qla_printk(KERN_INFO, ha, | |
3887 | "Performing ISP error recovery - ha= %p.\n", ha); | |
3888 | ||
3889 | /* Chip reset does not apply to 82XX */ | |
3890 | if (!IS_QLA82XX(ha)) | |
3891 | ha->isp_ops->reset_chip(vha); | |
3892 | ||
3893 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3894 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3895 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3896 | qla2x00_mark_all_devices_lost(vha, 0); | |
feafb7b1 AE |
3897 | |
3898 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3899 | list_for_each_entry(vp, &base_vha->hw->vp_list, list) { | |
3900 | atomic_inc(&vp->vref_count); | |
3901 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3902 | ||
a9083016 | 3903 | qla2x00_mark_all_devices_lost(vp, 0); |
feafb7b1 AE |
3904 | |
3905 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3906 | atomic_dec(&vp->vref_count); | |
3907 | } | |
3908 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
a9083016 GM |
3909 | } else { |
3910 | if (!atomic_read(&vha->loop_down_timer)) | |
3911 | atomic_set(&vha->loop_down_timer, | |
3912 | LOOP_DOWN_TIME); | |
3913 | } | |
3914 | ||
bddd2d65 LC |
3915 | if (!ha->flags.eeh_busy) { |
3916 | /* Make sure for ISP 82XX IO DMA is complete */ | |
3917 | if (IS_QLA82XX(ha)) { | |
3918 | if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, | |
3919 | WAIT_HOST) == QLA_SUCCESS) { | |
3920 | DEBUG2(qla_printk(KERN_INFO, ha, | |
3921 | "Done wait for pending commands\n")); | |
3922 | } | |
4d78c973 | 3923 | } |
a9083016 | 3924 | |
bddd2d65 LC |
3925 | /* Requeue all commands in outstanding command list. */ |
3926 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); | |
3927 | } | |
a9083016 GM |
3928 | } |
3929 | ||
1da177e4 LT |
3930 | /* |
3931 | * qla2x00_abort_isp | |
3932 | * Resets ISP and aborts all outstanding commands. | |
3933 | * | |
3934 | * Input: | |
3935 | * ha = adapter block pointer. | |
3936 | * | |
3937 | * Returns: | |
3938 | * 0 = success | |
3939 | */ | |
3940 | int | |
e315cd28 | 3941 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3942 | { |
476e8978 | 3943 | int rval; |
1da177e4 | 3944 | uint8_t status = 0; |
e315cd28 AC |
3945 | struct qla_hw_data *ha = vha->hw; |
3946 | struct scsi_qla_host *vp; | |
73208dfd | 3947 | struct req_que *req = ha->req_q_map[0]; |
feafb7b1 | 3948 | unsigned long flags; |
1da177e4 | 3949 | |
e315cd28 | 3950 | if (vha->flags.online) { |
a9083016 | 3951 | qla2x00_abort_isp_cleanup(vha); |
1da177e4 | 3952 | |
85880801 AV |
3953 | if (unlikely(pci_channel_offline(ha->pdev) && |
3954 | ha->flags.pci_channel_io_perm_failure)) { | |
3955 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3956 | status = 0; | |
3957 | return status; | |
3958 | } | |
3959 | ||
73208dfd | 3960 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3961 | |
e315cd28 | 3962 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3963 | |
e315cd28 AC |
3964 | if (!qla2x00_restart_isp(vha)) { |
3965 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3966 | |
e315cd28 | 3967 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3968 | /* |
3969 | * Issue marker command only when we are going | |
3970 | * to start the I/O . | |
3971 | */ | |
e315cd28 | 3972 | vha->marker_needed = 1; |
1da177e4 LT |
3973 | } |
3974 | ||
e315cd28 | 3975 | vha->flags.online = 1; |
1da177e4 | 3976 | |
fd34f556 | 3977 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3978 | |
fa2a1ce5 | 3979 | ha->isp_abort_cnt = 0; |
e315cd28 | 3980 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3981 | |
29c5397f LC |
3982 | if (IS_QLA81XX(ha)) |
3983 | qla2x00_get_fw_version(vha, | |
3984 | &ha->fw_major_version, | |
3985 | &ha->fw_minor_version, | |
3986 | &ha->fw_subminor_version, | |
3987 | &ha->fw_attributes, &ha->fw_memory_size, | |
3988 | ha->mpi_version, &ha->mpi_capabilities, | |
3989 | ha->phy_version); | |
3990 | ||
df613b96 AV |
3991 | if (ha->fce) { |
3992 | ha->flags.fce_enabled = 1; | |
3993 | memset(ha->fce, 0, | |
3994 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3995 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3996 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3997 | &ha->fce_bufs); | |
3998 | if (rval) { | |
3999 | qla_printk(KERN_WARNING, ha, | |
4000 | "Unable to reinitialize FCE " | |
4001 | "(%d).\n", rval); | |
4002 | ha->flags.fce_enabled = 0; | |
4003 | } | |
4004 | } | |
436a7b11 AV |
4005 | |
4006 | if (ha->eft) { | |
4007 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 4008 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
4009 | ha->eft_dma, EFT_NUM_BUFFERS); |
4010 | if (rval) { | |
4011 | qla_printk(KERN_WARNING, ha, | |
4012 | "Unable to reinitialize EFT " | |
4013 | "(%d).\n", rval); | |
4014 | } | |
4015 | } | |
1da177e4 | 4016 | } else { /* failed the ISP abort */ |
e315cd28 AC |
4017 | vha->flags.online = 1; |
4018 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 LT |
4019 | if (ha->isp_abort_cnt == 0) { |
4020 | qla_printk(KERN_WARNING, ha, | |
4021 | "ISP error recovery failed - " | |
4022 | "board disabled\n"); | |
fa2a1ce5 | 4023 | /* |
1da177e4 LT |
4024 | * The next call disables the board |
4025 | * completely. | |
4026 | */ | |
e315cd28 AC |
4027 | ha->isp_ops->reset_adapter(vha); |
4028 | vha->flags.online = 0; | |
1da177e4 | 4029 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 4030 | &vha->dpc_flags); |
1da177e4 LT |
4031 | status = 0; |
4032 | } else { /* schedule another ISP abort */ | |
4033 | ha->isp_abort_cnt--; | |
4034 | DEBUG(printk("qla%ld: ISP abort - " | |
0107109e | 4035 | "retry remaining %d\n", |
e315cd28 | 4036 | vha->host_no, ha->isp_abort_cnt)); |
1da177e4 LT |
4037 | status = 1; |
4038 | } | |
4039 | } else { | |
4040 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
4041 | DEBUG(printk("qla2x00(%ld): ISP error recovery " | |
4042 | "- retrying (%d) more times\n", | |
e315cd28 AC |
4043 | vha->host_no, ha->isp_abort_cnt)); |
4044 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
1da177e4 LT |
4045 | status = 1; |
4046 | } | |
4047 | } | |
fa2a1ce5 | 4048 | |
1da177e4 LT |
4049 | } |
4050 | ||
e315cd28 AC |
4051 | if (!status) { |
4052 | DEBUG(printk(KERN_INFO | |
4053 | "qla2x00_abort_isp(%ld): succeeded.\n", | |
4054 | vha->host_no)); | |
feafb7b1 AE |
4055 | |
4056 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4057 | list_for_each_entry(vp, &ha->vp_list, list) { | |
4058 | if (vp->vp_idx) { | |
4059 | atomic_inc(&vp->vref_count); | |
4060 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
4061 | ||
e315cd28 | 4062 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
4063 | |
4064 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4065 | atomic_dec(&vp->vref_count); | |
4066 | } | |
e315cd28 | 4067 | } |
feafb7b1 AE |
4068 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
4069 | ||
e315cd28 | 4070 | } else { |
1da177e4 LT |
4071 | qla_printk(KERN_INFO, ha, |
4072 | "qla2x00_abort_isp: **** FAILED ****\n"); | |
1da177e4 LT |
4073 | } |
4074 | ||
4075 | return(status); | |
4076 | } | |
4077 | ||
4078 | /* | |
4079 | * qla2x00_restart_isp | |
4080 | * restarts the ISP after a reset | |
4081 | * | |
4082 | * Input: | |
4083 | * ha = adapter block pointer. | |
4084 | * | |
4085 | * Returns: | |
4086 | * 0 = success | |
4087 | */ | |
4088 | static int | |
e315cd28 | 4089 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 4090 | { |
c6b2fca8 | 4091 | int status = 0; |
1da177e4 | 4092 | uint32_t wait_time; |
e315cd28 | 4093 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
4094 | struct req_que *req = ha->req_q_map[0]; |
4095 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
4096 | |
4097 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
4098 | if (qla2x00_isp_firmware(vha)) { |
4099 | vha->flags.online = 0; | |
4100 | status = ha->isp_ops->chip_diag(vha); | |
4101 | if (!status) | |
4102 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
4103 | } |
4104 | ||
e315cd28 AC |
4105 | if (!status && !(status = qla2x00_init_rings(vha))) { |
4106 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 4107 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
4108 | /* Initialize the queues in use */ |
4109 | qla25xx_init_queues(ha); | |
4110 | ||
e315cd28 AC |
4111 | status = qla2x00_fw_ready(vha); |
4112 | if (!status) { | |
1da177e4 | 4113 | DEBUG(printk("%s(): Start configure loop, " |
744f11fd | 4114 | "status = %d\n", __func__, status)); |
0107109e AV |
4115 | |
4116 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 4117 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 4118 | |
e315cd28 | 4119 | vha->flags.online = 1; |
1da177e4 LT |
4120 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
4121 | wait_time = 256; | |
4122 | do { | |
e315cd28 AC |
4123 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
4124 | qla2x00_configure_loop(vha); | |
1da177e4 | 4125 | wait_time--; |
e315cd28 AC |
4126 | } while (!atomic_read(&vha->loop_down_timer) && |
4127 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
4128 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
4129 | &vha->dpc_flags))); | |
1da177e4 LT |
4130 | } |
4131 | ||
4132 | /* if no cable then assume it's good */ | |
e315cd28 | 4133 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
4134 | status = 0; |
4135 | ||
4136 | DEBUG(printk("%s(): Configure loop done, status = 0x%x\n", | |
4137 | __func__, | |
744f11fd | 4138 | status)); |
1da177e4 LT |
4139 | } |
4140 | return (status); | |
4141 | } | |
4142 | ||
73208dfd AC |
4143 | static int |
4144 | qla25xx_init_queues(struct qla_hw_data *ha) | |
4145 | { | |
4146 | struct rsp_que *rsp = NULL; | |
4147 | struct req_que *req = NULL; | |
4148 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
4149 | int ret = -1; | |
4150 | int i; | |
4151 | ||
2afa19a9 | 4152 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
4153 | rsp = ha->rsp_q_map[i]; |
4154 | if (rsp) { | |
4155 | rsp->options &= ~BIT_0; | |
618a7523 | 4156 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd AC |
4157 | if (ret != QLA_SUCCESS) |
4158 | DEBUG2_17(printk(KERN_WARNING | |
4159 | "%s Rsp que:%d init failed\n", __func__, | |
4160 | rsp->id)); | |
4161 | else | |
4162 | DEBUG2_17(printk(KERN_INFO | |
4163 | "%s Rsp que:%d inited\n", __func__, | |
4164 | rsp->id)); | |
4165 | } | |
2afa19a9 AC |
4166 | } |
4167 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
4168 | req = ha->req_q_map[i]; |
4169 | if (req) { | |
29bdccbe | 4170 | /* Clear outstanding commands array. */ |
73208dfd | 4171 | req->options &= ~BIT_0; |
618a7523 | 4172 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd AC |
4173 | if (ret != QLA_SUCCESS) |
4174 | DEBUG2_17(printk(KERN_WARNING | |
4175 | "%s Req que:%d init failed\n", __func__, | |
4176 | req->id)); | |
4177 | else | |
4178 | DEBUG2_17(printk(KERN_WARNING | |
29bdccbe | 4179 | "%s Req que:%d inited\n", __func__, |
73208dfd AC |
4180 | req->id)); |
4181 | } | |
4182 | } | |
4183 | return ret; | |
4184 | } | |
4185 | ||
1da177e4 LT |
4186 | /* |
4187 | * qla2x00_reset_adapter | |
4188 | * Reset adapter. | |
4189 | * | |
4190 | * Input: | |
4191 | * ha = adapter block pointer. | |
4192 | */ | |
abbd8870 | 4193 | void |
e315cd28 | 4194 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
4195 | { |
4196 | unsigned long flags = 0; | |
e315cd28 | 4197 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 4198 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 4199 | |
e315cd28 | 4200 | vha->flags.online = 0; |
fd34f556 | 4201 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 4202 | |
1da177e4 LT |
4203 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4204 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
4205 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4206 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
4207 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4208 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4209 | } | |
0107109e AV |
4210 | |
4211 | void | |
e315cd28 | 4212 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
4213 | { |
4214 | unsigned long flags = 0; | |
e315cd28 | 4215 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
4216 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
4217 | ||
a9083016 GM |
4218 | if (IS_QLA82XX(ha)) |
4219 | return; | |
4220 | ||
e315cd28 | 4221 | vha->flags.online = 0; |
fd34f556 | 4222 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
4223 | |
4224 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
4225 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
4226 | RD_REG_DWORD(®->hccr); | |
4227 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
4228 | RD_REG_DWORD(®->hccr); | |
4229 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
4230 | |
4231 | if (IS_NOPOLLING_TYPE(ha)) | |
4232 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
4233 | } |
4234 | ||
4e08df3f DM |
4235 | /* On sparc systems, obtain port and node WWN from firmware |
4236 | * properties. | |
4237 | */ | |
e315cd28 AC |
4238 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
4239 | struct nvram_24xx *nv) | |
4e08df3f DM |
4240 | { |
4241 | #ifdef CONFIG_SPARC | |
e315cd28 | 4242 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 4243 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
4244 | struct device_node *dp = pci_device_to_OF_node(pdev); |
4245 | const u8 *val; | |
4e08df3f DM |
4246 | int len; |
4247 | ||
4248 | val = of_get_property(dp, "port-wwn", &len); | |
4249 | if (val && len >= WWN_SIZE) | |
4250 | memcpy(nv->port_name, val, WWN_SIZE); | |
4251 | ||
4252 | val = of_get_property(dp, "node-wwn", &len); | |
4253 | if (val && len >= WWN_SIZE) | |
4254 | memcpy(nv->node_name, val, WWN_SIZE); | |
4255 | #endif | |
4256 | } | |
4257 | ||
0107109e | 4258 | int |
e315cd28 | 4259 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 4260 | { |
4e08df3f | 4261 | int rval; |
0107109e AV |
4262 | struct init_cb_24xx *icb; |
4263 | struct nvram_24xx *nv; | |
4264 | uint32_t *dptr; | |
4265 | uint8_t *dptr1, *dptr2; | |
4266 | uint32_t chksum; | |
4267 | uint16_t cnt; | |
e315cd28 | 4268 | struct qla_hw_data *ha = vha->hw; |
0107109e | 4269 | |
4e08df3f | 4270 | rval = QLA_SUCCESS; |
0107109e | 4271 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 4272 | nv = ha->nvram; |
0107109e AV |
4273 | |
4274 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
4275 | if (ha->flags.port0) { |
4276 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
4277 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
4278 | } else { | |
0107109e | 4279 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 | 4280 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
4281 | } | |
e5b68a61 AC |
4282 | ha->nvram_size = sizeof(struct nvram_24xx); |
4283 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
a9083016 GM |
4284 | if (IS_QLA82XX(ha)) |
4285 | ha->vpd_size = FA_VPD_SIZE_82XX; | |
0107109e | 4286 | |
281afe19 SJ |
4287 | /* Get VPD data into cache */ |
4288 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 4289 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
4290 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
4291 | ||
4292 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 4293 | dptr = (uint32_t *)nv; |
e315cd28 | 4294 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
4295 | ha->nvram_size); |
4296 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
4297 | chksum += le32_to_cpu(*dptr++); | |
4298 | ||
7640335e | 4299 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 4300 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
0107109e AV |
4301 | |
4302 | /* Bad NVRAM data, set defaults parameters. */ | |
4303 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4304 | || nv->id[3] != ' ' || | |
4305 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4306 | /* Reset NVRAM data. */ | |
4307 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
4308 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
4309 | le16_to_cpu(nv->nvram_version)); | |
4e08df3f DM |
4310 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
4311 | "invalid -- WWPN) defaults.\n"); | |
4312 | ||
4313 | /* | |
4314 | * Set default initialization control block. | |
4315 | */ | |
4316 | memset(nv, 0, ha->nvram_size); | |
4317 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4318 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4319 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4320 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4321 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4322 | nv->hard_address = __constant_cpu_to_le16(124); | |
4323 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4324 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
4325 | nv->port_name[2] = 0x00; |
4326 | nv->port_name[3] = 0xe0; | |
4327 | nv->port_name[4] = 0x8b; | |
4328 | nv->port_name[5] = 0x1c; | |
4329 | nv->port_name[6] = 0x55; | |
4330 | nv->port_name[7] = 0x86; | |
4331 | nv->node_name[0] = 0x20; | |
4332 | nv->node_name[1] = 0x00; | |
4333 | nv->node_name[2] = 0x00; | |
4334 | nv->node_name[3] = 0xe0; | |
4335 | nv->node_name[4] = 0x8b; | |
4336 | nv->node_name[5] = 0x1c; | |
4337 | nv->node_name[6] = 0x55; | |
4338 | nv->node_name[7] = 0x86; | |
e315cd28 | 4339 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
4340 | nv->login_retry_count = __constant_cpu_to_le16(8); |
4341 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4342 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4343 | nv->firmware_options_1 = | |
4344 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4345 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4346 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4347 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4348 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4349 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4350 | nv->reset_delay = 5; | |
4351 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4352 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4353 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
4354 | ||
4355 | rval = 1; | |
0107109e AV |
4356 | } |
4357 | ||
4358 | /* Reset Initialization control block */ | |
e315cd28 | 4359 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
4360 | |
4361 | /* Copy 1st segment. */ | |
4362 | dptr1 = (uint8_t *)icb; | |
4363 | dptr2 = (uint8_t *)&nv->version; | |
4364 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4365 | while (cnt--) | |
4366 | *dptr1++ = *dptr2++; | |
4367 | ||
4368 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 4369 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
4370 | |
4371 | /* Copy 2nd segment. */ | |
4372 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4373 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4374 | cnt = (uint8_t *)&icb->reserved_3 - | |
4375 | (uint8_t *)&icb->interrupt_delay_timer; | |
4376 | while (cnt--) | |
4377 | *dptr1++ = *dptr2++; | |
4378 | ||
4379 | /* | |
4380 | * Setup driver NVRAM options. | |
4381 | */ | |
e315cd28 | 4382 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 4383 | "QLA2462"); |
0107109e | 4384 | |
5341e868 AV |
4385 | /* Use alternate WWN? */ |
4386 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4387 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4388 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4389 | } | |
4390 | ||
0107109e | 4391 | /* Prepare nodename */ |
fd0e7e4d | 4392 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
4393 | /* |
4394 | * Firmware will apply the following mask if the nodename was | |
4395 | * not provided. | |
4396 | */ | |
4397 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4398 | icb->node_name[0] &= 0xF0; | |
4399 | } | |
4400 | ||
4401 | /* Set host adapter parameters. */ | |
4402 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
4403 | ha->flags.enable_lip_reset = 0; |
4404 | ha->flags.enable_lip_full_login = | |
4405 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4406 | ha->flags.enable_target_reset = | |
4407 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 4408 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 4409 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 4410 | |
fd0e7e4d AV |
4411 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
4412 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
4413 | |
4414 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
4415 | sizeof(ha->fw_seriallink_options24)); | |
4416 | ||
4417 | /* save HBA serial number */ | |
4418 | ha->serial0 = icb->port_name[5]; | |
4419 | ha->serial1 = icb->port_name[6]; | |
4420 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4421 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4422 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 4423 | |
bc8fb3cb | 4424 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
4425 | ||
0107109e AV |
4426 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
4427 | ||
4428 | /* Set minimum login_timeout to 4 seconds. */ | |
4429 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4430 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4431 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4432 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4433 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 4434 | icb->login_timeout = nv->login_timeout; |
0107109e | 4435 | |
00a537b8 AV |
4436 | /* Set minimum RATOV to 100 tenths of a second. */ |
4437 | ha->r_a_tov = 100; | |
0107109e AV |
4438 | |
4439 | ha->loop_reset_delay = nv->reset_delay; | |
4440 | ||
4441 | /* Link Down Timeout = 0: | |
4442 | * | |
4443 | * When Port Down timer expires we will start returning | |
4444 | * I/O's to OS with "DID_NO_CONNECT". | |
4445 | * | |
4446 | * Link Down Timeout != 0: | |
4447 | * | |
4448 | * The driver waits for the link to come up after link down | |
4449 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4450 | */ | |
4451 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4452 | ha->loop_down_abort_time = | |
4453 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4454 | } else { | |
4455 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4456 | ha->loop_down_abort_time = | |
4457 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4458 | } | |
4459 | ||
4460 | /* Need enough time to try and get the port back. */ | |
4461 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4462 | if (qlport_down_retry) | |
4463 | ha->port_down_retry_count = qlport_down_retry; | |
4464 | ||
4465 | /* Set login_retry_count */ | |
4466 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4467 | if (ha->port_down_retry_count == | |
4468 | le16_to_cpu(nv->port_down_retry_count) && | |
4469 | ha->port_down_retry_count > 3) | |
4470 | ha->login_retry_count = ha->port_down_retry_count; | |
4471 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4472 | ha->login_retry_count = ha->port_down_retry_count; | |
4473 | if (ql2xloginretrycount) | |
4474 | ha->login_retry_count = ql2xloginretrycount; | |
4475 | ||
4fdfefe5 | 4476 | /* Enable ZIO. */ |
e315cd28 | 4477 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4478 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
4479 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4480 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4481 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4482 | } | |
4483 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4484 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 4485 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4486 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 4487 | ha->zio_mode = QLA_ZIO_MODE_6; |
4488 | ||
4fdfefe5 | 4489 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " |
e315cd28 | 4490 | "(%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 AV |
4491 | ha->zio_timer * 100)); |
4492 | qla_printk(KERN_INFO, ha, | |
4493 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4494 | ha->zio_mode, ha->zio_timer * 100); | |
4495 | ||
4496 | icb->firmware_options_2 |= cpu_to_le32( | |
4497 | (uint32_t)ha->zio_mode); | |
4498 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 4499 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
4500 | } |
4501 | ||
4e08df3f DM |
4502 | if (rval) { |
4503 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 4504 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
4505 | } |
4506 | return (rval); | |
0107109e AV |
4507 | } |
4508 | ||
413975a0 | 4509 | static int |
cbc8eb67 AV |
4510 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
4511 | uint32_t faddr) | |
d1c61909 | 4512 | { |
73208dfd | 4513 | int rval = QLA_SUCCESS; |
d1c61909 | 4514 | int segments, fragment; |
d1c61909 AV |
4515 | uint32_t *dcode, dlen; |
4516 | uint32_t risc_addr; | |
4517 | uint32_t risc_size; | |
4518 | uint32_t i; | |
e315cd28 | 4519 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4520 | struct req_que *req = ha->req_q_map[0]; |
eaac30be AV |
4521 | |
4522 | qla_printk(KERN_INFO, ha, | |
cbc8eb67 | 4523 | "FW: Loading from flash (%x)...\n", faddr); |
eaac30be | 4524 | |
d1c61909 AV |
4525 | rval = QLA_SUCCESS; |
4526 | ||
4527 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4528 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
4529 | *srisc_addr = 0; |
4530 | ||
4531 | /* Validate firmware image by checking version. */ | |
e315cd28 | 4532 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
4533 | for (i = 0; i < 4; i++) |
4534 | dcode[i] = be32_to_cpu(dcode[i]); | |
4535 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4536 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4537 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4538 | dcode[3] == 0)) { | |
4539 | qla_printk(KERN_WARNING, ha, | |
4540 | "Unable to verify integrity of flash firmware image!\n"); | |
4541 | qla_printk(KERN_WARNING, ha, | |
4542 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4543 | dcode[1], dcode[2], dcode[3]); | |
4544 | ||
4545 | return QLA_FUNCTION_FAILED; | |
4546 | } | |
4547 | ||
4548 | while (segments && rval == QLA_SUCCESS) { | |
4549 | /* Read segment's load information. */ | |
e315cd28 | 4550 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
4551 | |
4552 | risc_addr = be32_to_cpu(dcode[2]); | |
4553 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4554 | risc_size = be32_to_cpu(dcode[3]); | |
4555 | ||
4556 | fragment = 0; | |
4557 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4558 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4559 | if (dlen > risc_size) | |
4560 | dlen = risc_size; | |
4561 | ||
4562 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
4563 | "addr %x, number of dwords 0x%x, offset 0x%x.\n", | |
e315cd28 | 4564 | vha->host_no, risc_addr, dlen, faddr)); |
d1c61909 | 4565 | |
e315cd28 | 4566 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
4567 | for (i = 0; i < dlen; i++) |
4568 | dcode[i] = swab32(dcode[i]); | |
4569 | ||
73208dfd | 4570 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
4571 | dlen); |
4572 | if (rval) { | |
4573 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4574 | "segment %d of firmware\n", vha->host_no, |
d1c61909 AV |
4575 | fragment)); |
4576 | qla_printk(KERN_WARNING, ha, | |
4577 | "[ERROR] Failed to load segment %d of " | |
4578 | "firmware\n", fragment); | |
4579 | break; | |
4580 | } | |
4581 | ||
4582 | faddr += dlen; | |
4583 | risc_addr += dlen; | |
4584 | risc_size -= dlen; | |
4585 | fragment++; | |
4586 | } | |
4587 | ||
4588 | /* Next segment. */ | |
4589 | segments--; | |
4590 | } | |
4591 | ||
4592 | return rval; | |
4593 | } | |
4594 | ||
d1c61909 AV |
4595 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
4596 | ||
0107109e | 4597 | int |
e315cd28 | 4598 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
4599 | { |
4600 | int rval; | |
4601 | int i, fragment; | |
4602 | uint16_t *wcode, *fwcode; | |
4603 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
4604 | struct fw_blob *blob; | |
e315cd28 | 4605 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4606 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
4607 | |
4608 | /* Load firmware blob. */ | |
e315cd28 | 4609 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4610 | if (!blob) { |
4611 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4612 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4613 | "from: " QLA_FW_URL ".\n"); | |
5433383e AV |
4614 | return QLA_FUNCTION_FAILED; |
4615 | } | |
4616 | ||
4617 | rval = QLA_SUCCESS; | |
4618 | ||
73208dfd | 4619 | wcode = (uint16_t *)req->ring; |
5433383e AV |
4620 | *srisc_addr = 0; |
4621 | fwcode = (uint16_t *)blob->fw->data; | |
4622 | fwclen = 0; | |
4623 | ||
4624 | /* Validate firmware image by checking version. */ | |
4625 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
4626 | qla_printk(KERN_WARNING, ha, | |
4627 | "Unable to verify integrity of firmware image (%Zd)!\n", | |
4628 | blob->fw->size); | |
4629 | goto fail_fw_integrity; | |
4630 | } | |
4631 | for (i = 0; i < 4; i++) | |
4632 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
4633 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
4634 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
4635 | wcode[2] == 0 && wcode[3] == 0)) { | |
4636 | qla_printk(KERN_WARNING, ha, | |
4637 | "Unable to verify integrity of firmware image!\n"); | |
4638 | qla_printk(KERN_WARNING, ha, | |
4639 | "Firmware data: %04x %04x %04x %04x!\n", wcode[0], | |
4640 | wcode[1], wcode[2], wcode[3]); | |
4641 | goto fail_fw_integrity; | |
4642 | } | |
4643 | ||
4644 | seg = blob->segs; | |
4645 | while (*seg && rval == QLA_SUCCESS) { | |
4646 | risc_addr = *seg; | |
4647 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
4648 | risc_size = be16_to_cpu(fwcode[3]); | |
4649 | ||
4650 | /* Validate firmware image size. */ | |
4651 | fwclen += risc_size * sizeof(uint16_t); | |
4652 | if (blob->fw->size < fwclen) { | |
4653 | qla_printk(KERN_WARNING, ha, | |
4654 | "Unable to verify integrity of firmware image " | |
4655 | "(%Zd)!\n", blob->fw->size); | |
4656 | goto fail_fw_integrity; | |
4657 | } | |
4658 | ||
4659 | fragment = 0; | |
4660 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4661 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4662 | if (wlen > risc_size) | |
4663 | wlen = risc_size; | |
4664 | ||
4665 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4666 | "addr %x, number of words 0x%x.\n", vha->host_no, |
5433383e AV |
4667 | risc_addr, wlen)); |
4668 | ||
4669 | for (i = 0; i < wlen; i++) | |
4670 | wcode[i] = swab16(fwcode[i]); | |
4671 | ||
73208dfd | 4672 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4673 | wlen); |
4674 | if (rval) { | |
4675 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4676 | "segment %d of firmware\n", vha->host_no, |
5433383e AV |
4677 | fragment)); |
4678 | qla_printk(KERN_WARNING, ha, | |
4679 | "[ERROR] Failed to load segment %d of " | |
4680 | "firmware\n", fragment); | |
4681 | break; | |
4682 | } | |
4683 | ||
4684 | fwcode += wlen; | |
4685 | risc_addr += wlen; | |
4686 | risc_size -= wlen; | |
4687 | fragment++; | |
4688 | } | |
4689 | ||
4690 | /* Next segment. */ | |
4691 | seg++; | |
4692 | } | |
4693 | return rval; | |
4694 | ||
4695 | fail_fw_integrity: | |
4696 | return QLA_FUNCTION_FAILED; | |
4697 | } | |
4698 | ||
eaac30be AV |
4699 | static int |
4700 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4701 | { |
4702 | int rval; | |
4703 | int segments, fragment; | |
4704 | uint32_t *dcode, dlen; | |
4705 | uint32_t risc_addr; | |
4706 | uint32_t risc_size; | |
4707 | uint32_t i; | |
5433383e | 4708 | struct fw_blob *blob; |
0107109e | 4709 | uint32_t *fwcode, fwclen; |
e315cd28 | 4710 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4711 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4712 | |
5433383e | 4713 | /* Load firmware blob. */ |
e315cd28 | 4714 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4715 | if (!blob) { |
4716 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4717 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4718 | "from: " QLA_FW_URL ".\n"); | |
4719 | ||
eaac30be | 4720 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4721 | } |
4722 | ||
eaac30be AV |
4723 | qla_printk(KERN_INFO, ha, |
4724 | "FW: Loading via request-firmware...\n"); | |
4725 | ||
0107109e AV |
4726 | rval = QLA_SUCCESS; |
4727 | ||
4728 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4729 | dcode = (uint32_t *)req->ring; |
0107109e | 4730 | *srisc_addr = 0; |
5433383e | 4731 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4732 | fwclen = 0; |
4733 | ||
4734 | /* Validate firmware image by checking version. */ | |
5433383e | 4735 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
0107109e | 4736 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4737 | "Unable to verify integrity of firmware image (%Zd)!\n", |
4738 | blob->fw->size); | |
0107109e AV |
4739 | goto fail_fw_integrity; |
4740 | } | |
4741 | for (i = 0; i < 4; i++) | |
4742 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4743 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4744 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4745 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4746 | dcode[3] == 0)) { | |
4747 | qla_printk(KERN_WARNING, ha, | |
5433383e | 4748 | "Unable to verify integrity of firmware image!\n"); |
0107109e AV |
4749 | qla_printk(KERN_WARNING, ha, |
4750 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4751 | dcode[1], dcode[2], dcode[3]); | |
4752 | goto fail_fw_integrity; | |
4753 | } | |
4754 | ||
4755 | while (segments && rval == QLA_SUCCESS) { | |
4756 | risc_addr = be32_to_cpu(fwcode[2]); | |
4757 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4758 | risc_size = be32_to_cpu(fwcode[3]); | |
4759 | ||
4760 | /* Validate firmware image size. */ | |
4761 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4762 | if (blob->fw->size < fwclen) { |
0107109e | 4763 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4764 | "Unable to verify integrity of firmware image " |
4765 | "(%Zd)!\n", blob->fw->size); | |
4766 | ||
0107109e AV |
4767 | goto fail_fw_integrity; |
4768 | } | |
4769 | ||
4770 | fragment = 0; | |
4771 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4772 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4773 | if (dlen > risc_size) | |
4774 | dlen = risc_size; | |
4775 | ||
4776 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4777 | "addr %x, number of dwords 0x%x.\n", vha->host_no, |
0107109e AV |
4778 | risc_addr, dlen)); |
4779 | ||
4780 | for (i = 0; i < dlen; i++) | |
4781 | dcode[i] = swab32(fwcode[i]); | |
4782 | ||
73208dfd | 4783 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4784 | dlen); |
0107109e AV |
4785 | if (rval) { |
4786 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4787 | "segment %d of firmware\n", vha->host_no, |
0107109e AV |
4788 | fragment)); |
4789 | qla_printk(KERN_WARNING, ha, | |
4790 | "[ERROR] Failed to load segment %d of " | |
4791 | "firmware\n", fragment); | |
4792 | break; | |
4793 | } | |
4794 | ||
4795 | fwcode += dlen; | |
4796 | risc_addr += dlen; | |
4797 | risc_size -= dlen; | |
4798 | fragment++; | |
4799 | } | |
4800 | ||
4801 | /* Next segment. */ | |
4802 | segments--; | |
4803 | } | |
0107109e AV |
4804 | return rval; |
4805 | ||
4806 | fail_fw_integrity: | |
0107109e | 4807 | return QLA_FUNCTION_FAILED; |
0107109e | 4808 | } |
18c6c127 | 4809 | |
eaac30be AV |
4810 | int |
4811 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4812 | { | |
4813 | int rval; | |
4814 | ||
e337d907 AV |
4815 | if (ql2xfwloadbin == 1) |
4816 | return qla81xx_load_risc(vha, srisc_addr); | |
4817 | ||
eaac30be AV |
4818 | /* |
4819 | * FW Load priority: | |
4820 | * 1) Firmware via request-firmware interface (.bin file). | |
4821 | * 2) Firmware residing in flash. | |
4822 | */ | |
4823 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4824 | if (rval == QLA_SUCCESS) | |
4825 | return rval; | |
4826 | ||
cbc8eb67 AV |
4827 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4828 | vha->hw->flt_region_fw); | |
eaac30be AV |
4829 | } |
4830 | ||
4831 | int | |
4832 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4833 | { | |
4834 | int rval; | |
cbc8eb67 | 4835 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4836 | |
e337d907 | 4837 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4838 | goto try_blob_fw; |
e337d907 | 4839 | |
eaac30be AV |
4840 | /* |
4841 | * FW Load priority: | |
4842 | * 1) Firmware residing in flash. | |
4843 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4844 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4845 | */ |
cbc8eb67 | 4846 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4847 | if (rval == QLA_SUCCESS) |
4848 | return rval; | |
4849 | ||
cbc8eb67 AV |
4850 | try_blob_fw: |
4851 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4852 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4853 | return rval; | |
4854 | ||
4855 | qla_printk(KERN_ERR, ha, | |
4856 | "FW: Attempting to fallback to golden firmware...\n"); | |
4857 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); | |
4858 | if (rval != QLA_SUCCESS) | |
4859 | return rval; | |
4860 | ||
4861 | qla_printk(KERN_ERR, ha, | |
4862 | "FW: Please update operational firmware...\n"); | |
4863 | ha->flags.running_gold_fw = 1; | |
4864 | ||
4865 | return rval; | |
eaac30be AV |
4866 | } |
4867 | ||
18c6c127 | 4868 | void |
e315cd28 | 4869 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4870 | { |
4871 | int ret, retries; | |
e315cd28 | 4872 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4873 | |
85880801 AV |
4874 | if (ha->flags.pci_channel_io_perm_failure) |
4875 | return; | |
e428924c | 4876 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4877 | return; |
75edf81d AV |
4878 | if (!ha->fw_major_version) |
4879 | return; | |
18c6c127 | 4880 | |
e315cd28 | 4881 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4882 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4883 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4884 | ha->isp_ops->reset_chip(vha); |
4885 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4886 | continue; |
e315cd28 | 4887 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 AV |
4888 | continue; |
4889 | qla_printk(KERN_INFO, ha, | |
4890 | "Attempting retry of stop-firmware command...\n"); | |
e315cd28 | 4891 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4892 | } |
4893 | } | |
2c3dfe3f SJ |
4894 | |
4895 | int | |
e315cd28 | 4896 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4897 | { |
4898 | int rval = QLA_SUCCESS; | |
4899 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 AC |
4900 | struct qla_hw_data *ha = vha->hw; |
4901 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4902 | struct req_que *req; |
4903 | struct rsp_que *rsp; | |
2c3dfe3f | 4904 | |
e315cd28 | 4905 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4906 | return -EINVAL; |
4907 | ||
e315cd28 | 4908 | rval = qla2x00_fw_ready(base_vha); |
7163ea81 | 4909 | if (ha->flags.cpu_affinity_enabled) |
67c2e93a AC |
4910 | req = ha->req_q_map[0]; |
4911 | else | |
4912 | req = vha->req; | |
4913 | rsp = req->rsp; | |
4914 | ||
2c3dfe3f | 4915 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4916 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4917 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4918 | } |
4919 | ||
e315cd28 | 4920 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4921 | |
4922 | /* Login to SNS first */ | |
e315cd28 | 4923 | ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); |
2c3dfe3f SJ |
4924 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
4925 | DEBUG15(qla_printk(KERN_INFO, ha, | |
4926 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4927 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS, | |
4928 | mb[0], mb[1], mb[2], mb[6], mb[7])); | |
4929 | return (QLA_FUNCTION_FAILED); | |
4930 | } | |
4931 | ||
e315cd28 AC |
4932 | atomic_set(&vha->loop_down_timer, 0); |
4933 | atomic_set(&vha->loop_state, LOOP_UP); | |
4934 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4935 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4936 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4937 | |
4938 | return rval; | |
4939 | } | |
4d4df193 HK |
4940 | |
4941 | /* 84XX Support **************************************************************/ | |
4942 | ||
4943 | static LIST_HEAD(qla_cs84xx_list); | |
4944 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4945 | ||
4946 | static struct qla_chip_state_84xx * | |
e315cd28 | 4947 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4948 | { |
4949 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4950 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4951 | |
4952 | mutex_lock(&qla_cs84xx_mutex); | |
4953 | ||
4954 | /* Find any shared 84xx chip. */ | |
4955 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4956 | if (cs84xx->bus == ha->pdev->bus) { | |
4957 | kref_get(&cs84xx->kref); | |
4958 | goto done; | |
4959 | } | |
4960 | } | |
4961 | ||
4962 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4963 | if (!cs84xx) | |
4964 | goto done; | |
4965 | ||
4966 | kref_init(&cs84xx->kref); | |
4967 | spin_lock_init(&cs84xx->access_lock); | |
4968 | mutex_init(&cs84xx->fw_update_mutex); | |
4969 | cs84xx->bus = ha->pdev->bus; | |
4970 | ||
4971 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4972 | done: | |
4973 | mutex_unlock(&qla_cs84xx_mutex); | |
4974 | return cs84xx; | |
4975 | } | |
4976 | ||
4977 | static void | |
4978 | __qla84xx_chip_release(struct kref *kref) | |
4979 | { | |
4980 | struct qla_chip_state_84xx *cs84xx = | |
4981 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4982 | ||
4983 | mutex_lock(&qla_cs84xx_mutex); | |
4984 | list_del(&cs84xx->list); | |
4985 | mutex_unlock(&qla_cs84xx_mutex); | |
4986 | kfree(cs84xx); | |
4987 | } | |
4988 | ||
4989 | void | |
e315cd28 | 4990 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4991 | { |
e315cd28 | 4992 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4993 | if (ha->cs84xx) |
4994 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4995 | } | |
4996 | ||
4997 | static int | |
e315cd28 | 4998 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4999 | { |
5000 | int rval; | |
5001 | uint16_t status[2]; | |
e315cd28 | 5002 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
5003 | |
5004 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
5005 | ||
e315cd28 | 5006 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
5007 | |
5008 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
5009 | ||
5010 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
5011 | QLA_SUCCESS; | |
5012 | } | |
3a03eb79 AV |
5013 | |
5014 | /* 81XX Support **************************************************************/ | |
5015 | ||
5016 | int | |
5017 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
5018 | { | |
5019 | int rval; | |
5020 | struct init_cb_81xx *icb; | |
5021 | struct nvram_81xx *nv; | |
5022 | uint32_t *dptr; | |
5023 | uint8_t *dptr1, *dptr2; | |
5024 | uint32_t chksum; | |
5025 | uint16_t cnt; | |
5026 | struct qla_hw_data *ha = vha->hw; | |
5027 | ||
5028 | rval = QLA_SUCCESS; | |
5029 | icb = (struct init_cb_81xx *)ha->init_cb; | |
5030 | nv = ha->nvram; | |
5031 | ||
5032 | /* Determine NVRAM starting address. */ | |
5033 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 5034 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
5035 | |
5036 | /* Get VPD data into cache */ | |
5037 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
5038 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
5039 | ha->vpd_size); | |
3a03eb79 AV |
5040 | |
5041 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 5042 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 5043 | ha->nvram_size); |
3d79038f | 5044 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
5045 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
5046 | chksum += le32_to_cpu(*dptr++); | |
5047 | ||
7640335e | 5048 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
3a03eb79 AV |
5049 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
5050 | ||
5051 | /* Bad NVRAM data, set defaults parameters. */ | |
5052 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
5053 | || nv->id[3] != ' ' || | |
5054 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
5055 | /* Reset NVRAM data. */ | |
5056 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
5057 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
5058 | le16_to_cpu(nv->nvram_version)); | |
5059 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " | |
5060 | "invalid -- WWPN) defaults.\n"); | |
5061 | ||
5062 | /* | |
5063 | * Set default initialization control block. | |
5064 | */ | |
5065 | memset(nv, 0, ha->nvram_size); | |
5066 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
5067 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
5068 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
5069 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5070 | nv->exchange_count = __constant_cpu_to_le16(0); | |
5071 | nv->port_name[0] = 0x21; | |
e5b68a61 | 5072 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
5073 | nv->port_name[2] = 0x00; |
5074 | nv->port_name[3] = 0xe0; | |
5075 | nv->port_name[4] = 0x8b; | |
5076 | nv->port_name[5] = 0x1c; | |
5077 | nv->port_name[6] = 0x55; | |
5078 | nv->port_name[7] = 0x86; | |
5079 | nv->node_name[0] = 0x20; | |
5080 | nv->node_name[1] = 0x00; | |
5081 | nv->node_name[2] = 0x00; | |
5082 | nv->node_name[3] = 0xe0; | |
5083 | nv->node_name[4] = 0x8b; | |
5084 | nv->node_name[5] = 0x1c; | |
5085 | nv->node_name[6] = 0x55; | |
5086 | nv->node_name[7] = 0x86; | |
5087 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
5088 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
5089 | nv->login_timeout = __constant_cpu_to_le16(0); | |
5090 | nv->firmware_options_1 = | |
5091 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
5092 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
5093 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
5094 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
5095 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
5096 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
5097 | nv->reset_delay = 5; | |
5098 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
5099 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
5100 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
eeebcc92 | 5101 | nv->enode_mac[0] = 0x00; |
3a03eb79 AV |
5102 | nv->enode_mac[1] = 0x02; |
5103 | nv->enode_mac[2] = 0x03; | |
5104 | nv->enode_mac[3] = 0x04; | |
5105 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 5106 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5107 | |
5108 | rval = 1; | |
5109 | } | |
5110 | ||
5111 | /* Reset Initialization control block */ | |
5112 | memset(icb, 0, sizeof(struct init_cb_81xx)); | |
5113 | ||
5114 | /* Copy 1st segment. */ | |
5115 | dptr1 = (uint8_t *)icb; | |
5116 | dptr2 = (uint8_t *)&nv->version; | |
5117 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
5118 | while (cnt--) | |
5119 | *dptr1++ = *dptr2++; | |
5120 | ||
5121 | icb->login_retry_count = nv->login_retry_count; | |
5122 | ||
5123 | /* Copy 2nd segment. */ | |
5124 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
5125 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
5126 | cnt = (uint8_t *)&icb->reserved_5 - | |
5127 | (uint8_t *)&icb->interrupt_delay_timer; | |
5128 | while (cnt--) | |
5129 | *dptr1++ = *dptr2++; | |
5130 | ||
5131 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
5132 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
5133 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
5134 | icb->enode_mac[0] = 0x01; | |
5135 | icb->enode_mac[1] = 0x02; | |
5136 | icb->enode_mac[2] = 0x03; | |
5137 | icb->enode_mac[3] = 0x04; | |
5138 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 5139 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5140 | } |
5141 | ||
b64b0e8f AV |
5142 | /* Use extended-initialization control block. */ |
5143 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
5144 | ||
3a03eb79 AV |
5145 | /* |
5146 | * Setup driver NVRAM options. | |
5147 | */ | |
5148 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
a9083016 | 5149 | "QLE8XXX"); |
3a03eb79 AV |
5150 | |
5151 | /* Use alternate WWN? */ | |
5152 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
5153 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
5154 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
5155 | } | |
5156 | ||
5157 | /* Prepare nodename */ | |
5158 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
5159 | /* | |
5160 | * Firmware will apply the following mask if the nodename was | |
5161 | * not provided. | |
5162 | */ | |
5163 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
5164 | icb->node_name[0] &= 0xF0; | |
5165 | } | |
5166 | ||
5167 | /* Set host adapter parameters. */ | |
5168 | ha->flags.disable_risc_code_load = 0; | |
5169 | ha->flags.enable_lip_reset = 0; | |
5170 | ha->flags.enable_lip_full_login = | |
5171 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
5172 | ha->flags.enable_target_reset = | |
5173 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
5174 | ha->flags.enable_led_scheme = 0; | |
5175 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
5176 | ||
5177 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
5178 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
5179 | ||
5180 | /* save HBA serial number */ | |
5181 | ha->serial0 = icb->port_name[5]; | |
5182 | ha->serial1 = icb->port_name[6]; | |
5183 | ha->serial2 = icb->port_name[7]; | |
5184 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
5185 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
5186 | ||
5187 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5188 | ||
5189 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
5190 | ||
5191 | /* Set minimum login_timeout to 4 seconds. */ | |
5192 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
5193 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
5194 | if (le16_to_cpu(nv->login_timeout) < 4) | |
5195 | nv->login_timeout = __constant_cpu_to_le16(4); | |
5196 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
5197 | icb->login_timeout = nv->login_timeout; | |
5198 | ||
5199 | /* Set minimum RATOV to 100 tenths of a second. */ | |
5200 | ha->r_a_tov = 100; | |
5201 | ||
5202 | ha->loop_reset_delay = nv->reset_delay; | |
5203 | ||
5204 | /* Link Down Timeout = 0: | |
5205 | * | |
5206 | * When Port Down timer expires we will start returning | |
5207 | * I/O's to OS with "DID_NO_CONNECT". | |
5208 | * | |
5209 | * Link Down Timeout != 0: | |
5210 | * | |
5211 | * The driver waits for the link to come up after link down | |
5212 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
5213 | */ | |
5214 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
5215 | ha->loop_down_abort_time = | |
5216 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
5217 | } else { | |
5218 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
5219 | ha->loop_down_abort_time = | |
5220 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
5221 | } | |
5222 | ||
5223 | /* Need enough time to try and get the port back. */ | |
5224 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
5225 | if (qlport_down_retry) | |
5226 | ha->port_down_retry_count = qlport_down_retry; | |
5227 | ||
5228 | /* Set login_retry_count */ | |
5229 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
5230 | if (ha->port_down_retry_count == | |
5231 | le16_to_cpu(nv->port_down_retry_count) && | |
5232 | ha->port_down_retry_count > 3) | |
5233 | ha->login_retry_count = ha->port_down_retry_count; | |
5234 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
5235 | ha->login_retry_count = ha->port_down_retry_count; | |
5236 | if (ql2xloginretrycount) | |
5237 | ha->login_retry_count = ql2xloginretrycount; | |
5238 | ||
5239 | /* Enable ZIO. */ | |
5240 | if (!vha->flags.init_done) { | |
5241 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
5242 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
5243 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
5244 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
5245 | } | |
5246 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
5247 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
5248 | vha->flags.process_response_queue = 0; | |
5249 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
5250 | ha->zio_mode = QLA_ZIO_MODE_6; | |
5251 | ||
5252 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " | |
5253 | "(%d us).\n", vha->host_no, ha->zio_mode, | |
5254 | ha->zio_timer * 100)); | |
5255 | qla_printk(KERN_INFO, ha, | |
5256 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
5257 | ha->zio_mode, ha->zio_timer * 100); | |
5258 | ||
5259 | icb->firmware_options_2 |= cpu_to_le32( | |
5260 | (uint32_t)ha->zio_mode); | |
5261 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
5262 | vha->flags.process_response_queue = 1; | |
5263 | } | |
5264 | ||
5265 | if (rval) { | |
5266 | DEBUG2_3(printk(KERN_WARNING | |
5267 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); | |
5268 | } | |
5269 | return (rval); | |
5270 | } | |
5271 | ||
a9083016 GM |
5272 | int |
5273 | qla82xx_restart_isp(scsi_qla_host_t *vha) | |
5274 | { | |
5275 | int status, rval; | |
5276 | uint32_t wait_time; | |
5277 | struct qla_hw_data *ha = vha->hw; | |
5278 | struct req_que *req = ha->req_q_map[0]; | |
5279 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
5280 | struct scsi_qla_host *vp; | |
feafb7b1 | 5281 | unsigned long flags; |
a9083016 GM |
5282 | |
5283 | status = qla2x00_init_rings(vha); | |
5284 | if (!status) { | |
5285 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5286 | ha->flags.chip_reset_done = 1; | |
5287 | ||
5288 | status = qla2x00_fw_ready(vha); | |
5289 | if (!status) { | |
5290 | qla_printk(KERN_INFO, ha, | |
5291 | "%s(): Start configure loop, " | |
5292 | "status = %d\n", __func__, status); | |
5293 | ||
5294 | /* Issue a marker after FW becomes ready. */ | |
5295 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); | |
5296 | ||
5297 | vha->flags.online = 1; | |
5298 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ | |
5299 | wait_time = 256; | |
5300 | do { | |
5301 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5302 | qla2x00_configure_loop(vha); | |
5303 | wait_time--; | |
5304 | } while (!atomic_read(&vha->loop_down_timer) && | |
5305 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && | |
5306 | wait_time && | |
5307 | (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); | |
5308 | } | |
5309 | ||
5310 | /* if no cable then assume it's good */ | |
5311 | if ((vha->device_flags & DFLG_NO_CABLE)) | |
5312 | status = 0; | |
5313 | ||
5314 | qla_printk(KERN_INFO, ha, | |
5315 | "%s(): Configure loop done, status = 0x%x\n", | |
5316 | __func__, status); | |
5317 | } | |
5318 | ||
5319 | if (!status) { | |
5320 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5321 | ||
5322 | if (!atomic_read(&vha->loop_down_timer)) { | |
5323 | /* | |
5324 | * Issue marker command only when we are going | |
5325 | * to start the I/O . | |
5326 | */ | |
5327 | vha->marker_needed = 1; | |
5328 | } | |
5329 | ||
5330 | vha->flags.online = 1; | |
5331 | ||
5332 | ha->isp_ops->enable_intrs(ha); | |
5333 | ||
5334 | ha->isp_abort_cnt = 0; | |
5335 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
5336 | ||
5337 | if (ha->fce) { | |
5338 | ha->flags.fce_enabled = 1; | |
5339 | memset(ha->fce, 0, | |
5340 | fce_calc_size(ha->fce_bufs)); | |
5341 | rval = qla2x00_enable_fce_trace(vha, | |
5342 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, | |
5343 | &ha->fce_bufs); | |
5344 | if (rval) { | |
5345 | qla_printk(KERN_WARNING, ha, | |
5346 | "Unable to reinitialize FCE " | |
5347 | "(%d).\n", rval); | |
5348 | ha->flags.fce_enabled = 0; | |
5349 | } | |
5350 | } | |
5351 | ||
5352 | if (ha->eft) { | |
5353 | memset(ha->eft, 0, EFT_SIZE); | |
5354 | rval = qla2x00_enable_eft_trace(vha, | |
5355 | ha->eft_dma, EFT_NUM_BUFFERS); | |
5356 | if (rval) { | |
5357 | qla_printk(KERN_WARNING, ha, | |
5358 | "Unable to reinitialize EFT " | |
5359 | "(%d).\n", rval); | |
5360 | } | |
5361 | } | |
a9083016 GM |
5362 | } |
5363 | ||
5364 | if (!status) { | |
5365 | DEBUG(printk(KERN_INFO | |
5366 | "qla82xx_restart_isp(%ld): succeeded.\n", | |
5367 | vha->host_no)); | |
feafb7b1 AE |
5368 | |
5369 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5370 | list_for_each_entry(vp, &ha->vp_list, list) { | |
5371 | if (vp->vp_idx) { | |
5372 | atomic_inc(&vp->vref_count); | |
5373 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
5374 | ||
a9083016 | 5375 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
5376 | |
5377 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5378 | atomic_dec(&vp->vref_count); | |
5379 | } | |
a9083016 | 5380 | } |
feafb7b1 AE |
5381 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
5382 | ||
a9083016 GM |
5383 | } else { |
5384 | qla_printk(KERN_INFO, ha, | |
5385 | "qla82xx_restart_isp: **** FAILED ****\n"); | |
5386 | } | |
5387 | ||
5388 | return status; | |
5389 | } | |
5390 | ||
3a03eb79 | 5391 | void |
ae97c91e | 5392 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 5393 | { |
ae97c91e AV |
5394 | struct qla_hw_data *ha = vha->hw; |
5395 | ||
5396 | if (!ql2xetsenable) | |
5397 | return; | |
5398 | ||
5399 | /* Enable ETS Burst. */ | |
5400 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
5401 | ha->fw_options[2] |= BIT_9; | |
5402 | qla2x00_set_fw_options(vha, ha->fw_options); | |
3a03eb79 | 5403 | } |
09ff701a SR |
5404 | |
5405 | /* | |
5406 | * qla24xx_get_fcp_prio | |
5407 | * Gets the fcp cmd priority value for the logged in port. | |
5408 | * Looks for a match of the port descriptors within | |
5409 | * each of the fcp prio config entries. If a match is found, | |
5410 | * the tag (priority) value is returned. | |
5411 | * | |
5412 | * Input: | |
5413 | * ha = adapter block po | |
5414 | * fcport = port structure pointer. | |
5415 | * | |
5416 | * Return: | |
6c452a45 | 5417 | * non-zero (if found) |
09ff701a SR |
5418 | * 0 (if not found) |
5419 | * | |
5420 | * Context: | |
5421 | * Kernel context | |
5422 | */ | |
5423 | uint8_t | |
5424 | qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) | |
5425 | { | |
5426 | int i, entries; | |
5427 | uint8_t pid_match, wwn_match; | |
5428 | uint8_t priority; | |
5429 | uint32_t pid1, pid2; | |
5430 | uint64_t wwn1, wwn2; | |
5431 | struct qla_fcp_prio_entry *pri_entry; | |
5432 | struct qla_hw_data *ha = vha->hw; | |
5433 | ||
5434 | if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) | |
5435 | return 0; | |
5436 | ||
5437 | priority = 0; | |
5438 | entries = ha->fcp_prio_cfg->num_entries; | |
5439 | pri_entry = &ha->fcp_prio_cfg->entry[0]; | |
5440 | ||
5441 | for (i = 0; i < entries; i++) { | |
5442 | pid_match = wwn_match = 0; | |
5443 | ||
5444 | if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { | |
5445 | pri_entry++; | |
5446 | continue; | |
5447 | } | |
5448 | ||
5449 | /* check source pid for a match */ | |
5450 | if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { | |
5451 | pid1 = pri_entry->src_pid & INVALID_PORT_ID; | |
5452 | pid2 = vha->d_id.b24 & INVALID_PORT_ID; | |
5453 | if (pid1 == INVALID_PORT_ID) | |
5454 | pid_match++; | |
5455 | else if (pid1 == pid2) | |
5456 | pid_match++; | |
5457 | } | |
5458 | ||
5459 | /* check destination pid for a match */ | |
5460 | if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { | |
5461 | pid1 = pri_entry->dst_pid & INVALID_PORT_ID; | |
5462 | pid2 = fcport->d_id.b24 & INVALID_PORT_ID; | |
5463 | if (pid1 == INVALID_PORT_ID) | |
5464 | pid_match++; | |
5465 | else if (pid1 == pid2) | |
5466 | pid_match++; | |
5467 | } | |
5468 | ||
5469 | /* check source WWN for a match */ | |
5470 | if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { | |
5471 | wwn1 = wwn_to_u64(vha->port_name); | |
5472 | wwn2 = wwn_to_u64(pri_entry->src_wwpn); | |
5473 | if (wwn2 == (uint64_t)-1) | |
5474 | wwn_match++; | |
5475 | else if (wwn1 == wwn2) | |
5476 | wwn_match++; | |
5477 | } | |
5478 | ||
5479 | /* check destination WWN for a match */ | |
5480 | if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { | |
5481 | wwn1 = wwn_to_u64(fcport->port_name); | |
5482 | wwn2 = wwn_to_u64(pri_entry->dst_wwpn); | |
5483 | if (wwn2 == (uint64_t)-1) | |
5484 | wwn_match++; | |
5485 | else if (wwn1 == wwn2) | |
5486 | wwn_match++; | |
5487 | } | |
5488 | ||
5489 | if (pid_match == 2 || wwn_match == 2) { | |
5490 | /* Found a matching entry */ | |
5491 | if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) | |
5492 | priority = pri_entry->tag; | |
5493 | break; | |
5494 | } | |
5495 | ||
5496 | pri_entry++; | |
5497 | } | |
5498 | ||
5499 | return priority; | |
5500 | } | |
5501 | ||
5502 | /* | |
5503 | * qla24xx_update_fcport_fcp_prio | |
5504 | * Activates fcp priority for the logged in fc port | |
5505 | * | |
5506 | * Input: | |
5507 | * ha = adapter block pointer. | |
5508 | * fcp = port structure pointer. | |
5509 | * | |
5510 | * Return: | |
5511 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5512 | * | |
5513 | * Context: | |
5514 | * Kernel context. | |
5515 | */ | |
5516 | int | |
5517 | qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport) | |
5518 | { | |
5519 | int ret; | |
5520 | uint8_t priority; | |
5521 | uint16_t mb[5]; | |
5522 | ||
5523 | if (atomic_read(&fcport->state) == FCS_UNCONFIGURED || | |
5524 | fcport->port_type != FCT_TARGET || | |
5525 | fcport->loop_id == FC_NO_LOOP_ID) | |
5526 | return QLA_FUNCTION_FAILED; | |
5527 | ||
5528 | priority = qla24xx_get_fcp_prio(ha, fcport); | |
5529 | ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb); | |
5530 | if (ret == QLA_SUCCESS) | |
5531 | fcport->fcp_prio = priority; | |
5532 | else | |
5533 | DEBUG2(printk(KERN_WARNING | |
5534 | "scsi(%ld): Unable to activate fcp priority, " | |
5535 | " ret=0x%x\n", ha->host_no, ret)); | |
5536 | ||
5537 | return ret; | |
5538 | } | |
5539 | ||
5540 | /* | |
5541 | * qla24xx_update_all_fcp_prio | |
5542 | * Activates fcp priority for all the logged in ports | |
5543 | * | |
5544 | * Input: | |
5545 | * ha = adapter block pointer. | |
5546 | * | |
5547 | * Return: | |
5548 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5549 | * | |
5550 | * Context: | |
5551 | * Kernel context. | |
5552 | */ | |
5553 | int | |
5554 | qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) | |
5555 | { | |
5556 | int ret; | |
5557 | fc_port_t *fcport; | |
5558 | ||
5559 | ret = QLA_FUNCTION_FAILED; | |
5560 | /* We need to set priority for all logged in ports */ | |
5561 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
5562 | ret = qla24xx_update_fcport_fcp_prio(vha, fcport); | |
5563 | ||
5564 | return ret; | |
5565 | } |