Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
07e264b7 | 3 | * Copyright (c) 2003-2011 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0107109e | 12 | #include <linux/vmalloc.h> |
1da177e4 LT |
13 | |
14 | #include "qla_devtbl.h" | |
15 | ||
4e08df3f DM |
16 | #ifdef CONFIG_SPARC |
17 | #include <asm/prom.h> | |
4e08df3f DM |
18 | #endif |
19 | ||
1da177e4 LT |
20 | /* |
21 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
22 | */ | |
1da177e4 | 23 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 24 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
25 | static int qla2x00_init_rings(scsi_qla_host_t *); |
26 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
27 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
28 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
29 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
30 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
31 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
1da177e4 LT |
32 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, |
33 | uint16_t *); | |
1da177e4 LT |
34 | |
35 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 36 | |
4d4df193 HK |
37 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
38 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 39 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 40 | |
ac280b67 AV |
41 | /* SRB Extensions ---------------------------------------------------------- */ |
42 | ||
9ba56b95 GM |
43 | void |
44 | qla2x00_sp_timeout(unsigned long __data) | |
ac280b67 AV |
45 | { |
46 | srb_t *sp = (srb_t *)__data; | |
4916392b | 47 | struct srb_iocb *iocb; |
ac280b67 AV |
48 | fc_port_t *fcport = sp->fcport; |
49 | struct qla_hw_data *ha = fcport->vha->hw; | |
50 | struct req_que *req; | |
51 | unsigned long flags; | |
52 | ||
53 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
54 | req = ha->req_q_map[0]; | |
55 | req->outstanding_cmds[sp->handle] = NULL; | |
9ba56b95 | 56 | iocb = &sp->u.iocb_cmd; |
4916392b | 57 | iocb->timeout(sp); |
9ba56b95 | 58 | sp->free(fcport->vha, sp); |
6ac52608 | 59 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
ac280b67 AV |
60 | } |
61 | ||
9ba56b95 GM |
62 | void |
63 | qla2x00_sp_free(void *data, void *ptr) | |
ac280b67 | 64 | { |
9ba56b95 GM |
65 | srb_t *sp = (srb_t *)ptr; |
66 | struct srb_iocb *iocb = &sp->u.iocb_cmd; | |
67 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
ac280b67 | 68 | |
4d97cc53 | 69 | del_timer(&iocb->timer); |
9ba56b95 | 70 | mempool_free(sp, vha->hw->srb_mempool); |
feafb7b1 AE |
71 | |
72 | QLA_VHA_MARK_NOT_BUSY(vha); | |
ac280b67 AV |
73 | } |
74 | ||
ac280b67 AV |
75 | /* Asynchronous Login/Logout Routines -------------------------------------- */ |
76 | ||
5b91490e AV |
77 | static inline unsigned long |
78 | qla2x00_get_async_timeout(struct scsi_qla_host *vha) | |
79 | { | |
80 | unsigned long tmo; | |
81 | struct qla_hw_data *ha = vha->hw; | |
82 | ||
83 | /* Firmware should use switch negotiated r_a_tov for timeout. */ | |
84 | tmo = ha->r_a_tov / 10 * 2; | |
85 | if (!IS_FWI2_CAPABLE(ha)) { | |
86 | /* | |
87 | * Except for earlier ISPs where the timeout is seeded from the | |
88 | * initialization control block. | |
89 | */ | |
90 | tmo = ha->login_timeout; | |
91 | } | |
92 | return tmo; | |
93 | } | |
ac280b67 AV |
94 | |
95 | static void | |
9ba56b95 | 96 | qla2x00_async_iocb_timeout(void *data) |
ac280b67 | 97 | { |
9ba56b95 | 98 | srb_t *sp = (srb_t *)data; |
ac280b67 | 99 | fc_port_t *fcport = sp->fcport; |
ac280b67 | 100 | |
7c3df132 | 101 | ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, |
cfb0919c | 102 | "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n", |
9ba56b95 | 103 | sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area, |
7c3df132 | 104 | fcport->d_id.b.al_pa); |
ac280b67 | 105 | |
5ff1d584 | 106 | fcport->flags &= ~FCF_ASYNC_SENT; |
9ba56b95 GM |
107 | if (sp->type == SRB_LOGIN_CMD) { |
108 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
ac280b67 | 109 | qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); |
6ac52608 AV |
110 | /* Retry as needed. */ |
111 | lio->u.logio.data[0] = MBS_COMMAND_ERROR; | |
112 | lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? | |
113 | QLA_LOGIO_LOGIN_RETRIED : 0; | |
114 | qla2x00_post_async_login_done_work(fcport->vha, fcport, | |
115 | lio->u.logio.data); | |
116 | } | |
ac280b67 AV |
117 | } |
118 | ||
99b0bec7 | 119 | static void |
9ba56b95 | 120 | qla2x00_async_login_sp_done(void *data, void *ptr, int res) |
99b0bec7 | 121 | { |
9ba56b95 GM |
122 | srb_t *sp = (srb_t *)ptr; |
123 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
124 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
125 | ||
126 | if (!test_bit(UNLOADING, &vha->dpc_flags)) | |
127 | qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, | |
128 | lio->u.logio.data); | |
129 | sp->free(sp->fcport->vha, sp); | |
99b0bec7 AV |
130 | } |
131 | ||
ac280b67 AV |
132 | int |
133 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
134 | uint16_t *data) | |
135 | { | |
ac280b67 | 136 | srb_t *sp; |
4916392b | 137 | struct srb_iocb *lio; |
ac280b67 AV |
138 | int rval; |
139 | ||
140 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 141 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
ac280b67 AV |
142 | if (!sp) |
143 | goto done; | |
144 | ||
9ba56b95 GM |
145 | sp->type = SRB_LOGIN_CMD; |
146 | sp->name = "login"; | |
147 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
148 | ||
149 | lio = &sp->u.iocb_cmd; | |
3822263e | 150 | lio->timeout = qla2x00_async_iocb_timeout; |
9ba56b95 | 151 | sp->done = qla2x00_async_login_sp_done; |
4916392b | 152 | lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; |
ac280b67 | 153 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 154 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
ac280b67 AV |
155 | rval = qla2x00_start_sp(sp); |
156 | if (rval != QLA_SUCCESS) | |
157 | goto done_free_sp; | |
158 | ||
7c3df132 | 159 | ql_dbg(ql_dbg_disc, vha, 0x2072, |
cfb0919c CD |
160 | "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x " |
161 | "retries=%d.\n", sp->handle, fcport->loop_id, | |
162 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
163 | fcport->login_retry); | |
ac280b67 AV |
164 | return rval; |
165 | ||
166 | done_free_sp: | |
9ba56b95 | 167 | sp->free(fcport->vha, sp); |
ac280b67 AV |
168 | done: |
169 | return rval; | |
170 | } | |
171 | ||
99b0bec7 | 172 | static void |
9ba56b95 | 173 | qla2x00_async_logout_sp_done(void *data, void *ptr, int res) |
99b0bec7 | 174 | { |
9ba56b95 GM |
175 | srb_t *sp = (srb_t *)ptr; |
176 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
177 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
178 | ||
179 | if (!test_bit(UNLOADING, &vha->dpc_flags)) | |
180 | qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, | |
181 | lio->u.logio.data); | |
182 | sp->free(sp->fcport->vha, sp); | |
99b0bec7 AV |
183 | } |
184 | ||
ac280b67 AV |
185 | int |
186 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
187 | { | |
ac280b67 | 188 | srb_t *sp; |
4916392b | 189 | struct srb_iocb *lio; |
ac280b67 AV |
190 | int rval; |
191 | ||
192 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 193 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
ac280b67 AV |
194 | if (!sp) |
195 | goto done; | |
196 | ||
9ba56b95 GM |
197 | sp->type = SRB_LOGOUT_CMD; |
198 | sp->name = "logout"; | |
199 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
200 | ||
201 | lio = &sp->u.iocb_cmd; | |
3822263e | 202 | lio->timeout = qla2x00_async_iocb_timeout; |
9ba56b95 | 203 | sp->done = qla2x00_async_logout_sp_done; |
ac280b67 AV |
204 | rval = qla2x00_start_sp(sp); |
205 | if (rval != QLA_SUCCESS) | |
206 | goto done_free_sp; | |
207 | ||
7c3df132 | 208 | ql_dbg(ql_dbg_disc, vha, 0x2070, |
cfb0919c CD |
209 | "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", |
210 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
211 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
ac280b67 AV |
212 | return rval; |
213 | ||
214 | done_free_sp: | |
9ba56b95 | 215 | sp->free(fcport->vha, sp); |
ac280b67 AV |
216 | done: |
217 | return rval; | |
218 | } | |
219 | ||
5ff1d584 | 220 | static void |
9ba56b95 | 221 | qla2x00_async_adisc_sp_done(void *data, void *ptr, int res) |
5ff1d584 | 222 | { |
9ba56b95 GM |
223 | srb_t *sp = (srb_t *)ptr; |
224 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
225 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
226 | ||
227 | if (!test_bit(UNLOADING, &vha->dpc_flags)) | |
228 | qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, | |
229 | lio->u.logio.data); | |
230 | sp->free(sp->fcport->vha, sp); | |
5ff1d584 AV |
231 | } |
232 | ||
233 | int | |
234 | qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, | |
235 | uint16_t *data) | |
236 | { | |
5ff1d584 | 237 | srb_t *sp; |
4916392b | 238 | struct srb_iocb *lio; |
5ff1d584 AV |
239 | int rval; |
240 | ||
241 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 242 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
5ff1d584 AV |
243 | if (!sp) |
244 | goto done; | |
245 | ||
9ba56b95 GM |
246 | sp->type = SRB_ADISC_CMD; |
247 | sp->name = "adisc"; | |
248 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
249 | ||
250 | lio = &sp->u.iocb_cmd; | |
3822263e | 251 | lio->timeout = qla2x00_async_iocb_timeout; |
9ba56b95 | 252 | sp->done = qla2x00_async_adisc_sp_done; |
5ff1d584 | 253 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 254 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
5ff1d584 AV |
255 | rval = qla2x00_start_sp(sp); |
256 | if (rval != QLA_SUCCESS) | |
257 | goto done_free_sp; | |
258 | ||
7c3df132 | 259 | ql_dbg(ql_dbg_disc, vha, 0x206f, |
cfb0919c CD |
260 | "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", |
261 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
262 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
5ff1d584 AV |
263 | return rval; |
264 | ||
265 | done_free_sp: | |
9ba56b95 | 266 | sp->free(fcport->vha, sp); |
5ff1d584 AV |
267 | done: |
268 | return rval; | |
269 | } | |
270 | ||
3822263e | 271 | static void |
9ba56b95 | 272 | qla2x00_async_tm_cmd_done(void *data, void *ptr, int res) |
3822263e | 273 | { |
9ba56b95 GM |
274 | srb_t *sp = (srb_t *)ptr; |
275 | struct srb_iocb *iocb = &sp->u.iocb_cmd; | |
276 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
277 | uint32_t flags; | |
278 | uint16_t lun; | |
279 | int rval; | |
3822263e | 280 | |
9ba56b95 GM |
281 | if (!test_bit(UNLOADING, &vha->dpc_flags)) { |
282 | flags = iocb->u.tmf.flags; | |
283 | lun = (uint16_t)iocb->u.tmf.lun; | |
284 | ||
285 | /* Issue Marker IOCB */ | |
286 | rval = qla2x00_marker(vha, vha->hw->req_q_map[0], | |
287 | vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, | |
288 | flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); | |
289 | ||
290 | if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { | |
291 | ql_dbg(ql_dbg_taskm, vha, 0x8030, | |
292 | "TM IOCB failed (%x).\n", rval); | |
293 | } | |
294 | } | |
295 | sp->free(sp->fcport->vha, sp); | |
3822263e MI |
296 | } |
297 | ||
298 | int | |
9ba56b95 | 299 | qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun, |
3822263e MI |
300 | uint32_t tag) |
301 | { | |
302 | struct scsi_qla_host *vha = fcport->vha; | |
3822263e | 303 | srb_t *sp; |
3822263e MI |
304 | struct srb_iocb *tcf; |
305 | int rval; | |
306 | ||
307 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 308 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
3822263e MI |
309 | if (!sp) |
310 | goto done; | |
311 | ||
9ba56b95 GM |
312 | sp->type = SRB_TM_CMD; |
313 | sp->name = "tmf"; | |
314 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
315 | ||
316 | tcf = &sp->u.iocb_cmd; | |
317 | tcf->u.tmf.flags = tm_flags; | |
3822263e MI |
318 | tcf->u.tmf.lun = lun; |
319 | tcf->u.tmf.data = tag; | |
320 | tcf->timeout = qla2x00_async_iocb_timeout; | |
9ba56b95 | 321 | sp->done = qla2x00_async_tm_cmd_done; |
3822263e MI |
322 | |
323 | rval = qla2x00_start_sp(sp); | |
324 | if (rval != QLA_SUCCESS) | |
325 | goto done_free_sp; | |
326 | ||
7c3df132 | 327 | ql_dbg(ql_dbg_taskm, vha, 0x802f, |
cfb0919c CD |
328 | "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", |
329 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
330 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
3822263e MI |
331 | return rval; |
332 | ||
333 | done_free_sp: | |
9ba56b95 | 334 | sp->free(fcport->vha, sp); |
3822263e MI |
335 | done: |
336 | return rval; | |
337 | } | |
338 | ||
4916392b | 339 | void |
ac280b67 AV |
340 | qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
341 | uint16_t *data) | |
342 | { | |
343 | int rval; | |
ac280b67 AV |
344 | |
345 | switch (data[0]) { | |
346 | case MBS_COMMAND_COMPLETE: | |
a4f92a32 AV |
347 | /* |
348 | * Driver must validate login state - If PRLI not complete, | |
349 | * force a relogin attempt via implicit LOGO, PLOGI, and PRLI | |
350 | * requests. | |
351 | */ | |
352 | rval = qla2x00_get_port_database(vha, fcport, 0); | |
0eba25df AE |
353 | if (rval == QLA_NOT_LOGGED_IN) { |
354 | fcport->flags &= ~FCF_ASYNC_SENT; | |
355 | fcport->flags |= FCF_LOGIN_NEEDED; | |
356 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
357 | break; | |
358 | } | |
359 | ||
a4f92a32 AV |
360 | if (rval != QLA_SUCCESS) { |
361 | qla2x00_post_async_logout_work(vha, fcport, NULL); | |
362 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
363 | break; | |
364 | } | |
99b0bec7 | 365 | if (fcport->flags & FCF_FCP2_DEVICE) { |
5ff1d584 AV |
366 | qla2x00_post_async_adisc_work(vha, fcport, data); |
367 | break; | |
99b0bec7 AV |
368 | } |
369 | qla2x00_update_fcport(vha, fcport); | |
ac280b67 AV |
370 | break; |
371 | case MBS_COMMAND_ERROR: | |
5ff1d584 | 372 | fcport->flags &= ~FCF_ASYNC_SENT; |
ac280b67 AV |
373 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
374 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
375 | else | |
80d79440 | 376 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
ac280b67 AV |
377 | break; |
378 | case MBS_PORT_ID_USED: | |
379 | fcport->loop_id = data[1]; | |
6ac52608 | 380 | qla2x00_post_async_logout_work(vha, fcport, NULL); |
ac280b67 AV |
381 | qla2x00_post_async_login_work(vha, fcport, NULL); |
382 | break; | |
383 | case MBS_LOOP_ID_USED: | |
384 | fcport->loop_id++; | |
385 | rval = qla2x00_find_new_loop_id(vha, fcport); | |
386 | if (rval != QLA_SUCCESS) { | |
5ff1d584 | 387 | fcport->flags &= ~FCF_ASYNC_SENT; |
80d79440 | 388 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
ac280b67 AV |
389 | break; |
390 | } | |
391 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
392 | break; | |
393 | } | |
4916392b | 394 | return; |
ac280b67 AV |
395 | } |
396 | ||
4916392b | 397 | void |
ac280b67 AV |
398 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
399 | uint16_t *data) | |
400 | { | |
401 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
4916392b | 402 | return; |
ac280b67 AV |
403 | } |
404 | ||
4916392b | 405 | void |
5ff1d584 AV |
406 | qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
407 | uint16_t *data) | |
408 | { | |
409 | if (data[0] == MBS_COMMAND_COMPLETE) { | |
410 | qla2x00_update_fcport(vha, fcport); | |
411 | ||
4916392b | 412 | return; |
5ff1d584 AV |
413 | } |
414 | ||
415 | /* Retry login. */ | |
416 | fcport->flags &= ~FCF_ASYNC_SENT; | |
417 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
418 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
419 | else | |
80d79440 | 420 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
5ff1d584 | 421 | |
4916392b | 422 | return; |
5ff1d584 AV |
423 | } |
424 | ||
1da177e4 LT |
425 | /****************************************************************************/ |
426 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
427 | /****************************************************************************/ | |
428 | ||
429 | /* | |
430 | * qla2x00_initialize_adapter | |
431 | * Initialize board. | |
432 | * | |
433 | * Input: | |
434 | * ha = adapter block pointer. | |
435 | * | |
436 | * Returns: | |
437 | * 0 = success | |
438 | */ | |
439 | int | |
e315cd28 | 440 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
441 | { |
442 | int rval; | |
e315cd28 | 443 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 444 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 445 | |
1da177e4 | 446 | /* Clear adapter flags. */ |
e315cd28 | 447 | vha->flags.online = 0; |
2533cf67 | 448 | ha->flags.chip_reset_done = 0; |
e315cd28 | 449 | vha->flags.reset_active = 0; |
85880801 AV |
450 | ha->flags.pci_channel_io_perm_failure = 0; |
451 | ha->flags.eeh_busy = 0; | |
794a5691 | 452 | ha->flags.thermal_supported = 1; |
e315cd28 AC |
453 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
454 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
455 | vha->device_flags = DFLG_NO_CABLE; | |
456 | vha->dpc_flags = 0; | |
457 | vha->flags.management_server_logged_in = 0; | |
458 | vha->marker_needed = 0; | |
1da177e4 LT |
459 | ha->isp_abort_cnt = 0; |
460 | ha->beacon_blink_led = 0; | |
461 | ||
73208dfd AC |
462 | set_bit(0, ha->req_qid_map); |
463 | set_bit(0, ha->rsp_qid_map); | |
464 | ||
cfb0919c | 465 | ql_dbg(ql_dbg_init, vha, 0x0040, |
7c3df132 | 466 | "Configuring PCI space...\n"); |
e315cd28 | 467 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 468 | if (rval) { |
7c3df132 SK |
469 | ql_log(ql_log_warn, vha, 0x0044, |
470 | "Unable to configure PCI space.\n"); | |
1da177e4 LT |
471 | return (rval); |
472 | } | |
473 | ||
e315cd28 | 474 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 475 | |
e315cd28 | 476 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 | 477 | if (rval) { |
7c3df132 SK |
478 | ql_log(ql_log_fatal, vha, 0x004f, |
479 | "Unable to validate FLASH data.\n"); | |
c00d8994 AV |
480 | return (rval); |
481 | } | |
482 | ||
73208dfd | 483 | ha->isp_ops->get_flash_version(vha, req->ring); |
cfb0919c | 484 | ql_dbg(ql_dbg_init, vha, 0x0061, |
7c3df132 | 485 | "Configure NVRAM parameters...\n"); |
0107109e | 486 | |
e315cd28 | 487 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 488 | |
d4c760c2 AV |
489 | if (ha->flags.disable_serdes) { |
490 | /* Mask HBA via NVRAM settings? */ | |
7c3df132 SK |
491 | ql_log(ql_log_info, vha, 0x0077, |
492 | "Masking HBA WWPN " | |
d4c760c2 | 493 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", |
e315cd28 AC |
494 | vha->port_name[0], vha->port_name[1], |
495 | vha->port_name[2], vha->port_name[3], | |
496 | vha->port_name[4], vha->port_name[5], | |
497 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
498 | return QLA_FUNCTION_FAILED; |
499 | } | |
500 | ||
cfb0919c | 501 | ql_dbg(ql_dbg_init, vha, 0x0078, |
7c3df132 | 502 | "Verifying loaded RISC code...\n"); |
1da177e4 | 503 | |
e315cd28 AC |
504 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
505 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
506 | if (rval) |
507 | return (rval); | |
e315cd28 | 508 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
509 | if (rval) |
510 | return (rval); | |
1da177e4 | 511 | } |
a9083016 | 512 | |
4d4df193 | 513 | if (IS_QLA84XX(ha)) { |
e315cd28 | 514 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 | 515 | if (!ha->cs84xx) { |
7c3df132 | 516 | ql_log(ql_log_warn, vha, 0x00d0, |
4d4df193 HK |
517 | "Unable to configure ISP84XX.\n"); |
518 | return QLA_FUNCTION_FAILED; | |
519 | } | |
520 | } | |
e315cd28 | 521 | rval = qla2x00_init_rings(vha); |
2533cf67 | 522 | ha->flags.chip_reset_done = 1; |
1da177e4 | 523 | |
9a069e19 | 524 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
6c452a45 | 525 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ |
9a069e19 GM |
526 | rval = qla84xx_init_chip(vha); |
527 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
528 | ql_log(ql_log_warn, vha, 0x00d4, |
529 | "Unable to initialize ISP84XX.\n"); | |
9a069e19 GM |
530 | qla84xx_put_chip(vha); |
531 | } | |
532 | } | |
533 | ||
2f0f3f4f MI |
534 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) |
535 | qla24xx_read_fcp_prio_cfg(vha); | |
09ff701a | 536 | |
1da177e4 LT |
537 | return (rval); |
538 | } | |
539 | ||
540 | /** | |
abbd8870 | 541 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
542 | * @ha: HA context |
543 | * | |
544 | * Returns 0 on success. | |
545 | */ | |
abbd8870 | 546 | int |
e315cd28 | 547 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 548 | { |
a157b101 | 549 | uint16_t w; |
abbd8870 | 550 | unsigned long flags; |
e315cd28 | 551 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 552 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 553 | |
1da177e4 | 554 | pci_set_master(ha->pdev); |
af6177d8 | 555 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 556 | |
1da177e4 | 557 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 558 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
559 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
560 | ||
737faece | 561 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
562 | |
563 | /* Get PCI bus information. */ | |
564 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 565 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
566 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
567 | ||
abbd8870 AV |
568 | return QLA_SUCCESS; |
569 | } | |
1da177e4 | 570 | |
abbd8870 AV |
571 | /** |
572 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
573 | * @ha: HA context | |
574 | * | |
575 | * Returns 0 on success. | |
576 | */ | |
577 | int | |
e315cd28 | 578 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 579 | { |
a157b101 | 580 | uint16_t w; |
abbd8870 AV |
581 | unsigned long flags = 0; |
582 | uint32_t cnt; | |
e315cd28 | 583 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 584 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 585 | |
abbd8870 | 586 | pci_set_master(ha->pdev); |
af6177d8 | 587 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 588 | |
abbd8870 | 589 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 590 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 591 | |
abbd8870 AV |
592 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
593 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 594 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 595 | |
abbd8870 AV |
596 | /* |
597 | * If this is a 2300 card and not 2312, reset the | |
598 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
599 | * the 2310 also reports itself as a 2300 so we need to get the | |
600 | * fb revision level -- a 6 indicates it really is a 2300 and | |
601 | * not a 2310. | |
602 | */ | |
603 | if (IS_QLA2300(ha)) { | |
604 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 605 | |
abbd8870 | 606 | /* Pause RISC. */ |
3d71644c | 607 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 608 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 609 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 610 | break; |
1da177e4 | 611 | |
abbd8870 AV |
612 | udelay(10); |
613 | } | |
1da177e4 | 614 | |
abbd8870 | 615 | /* Select FPM registers. */ |
3d71644c AV |
616 | WRT_REG_WORD(®->ctrl_status, 0x20); |
617 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
618 | |
619 | /* Get the fb rev level */ | |
3d71644c | 620 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
621 | |
622 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 623 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
624 | |
625 | /* Deselect FPM registers. */ | |
3d71644c AV |
626 | WRT_REG_WORD(®->ctrl_status, 0x0); |
627 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
628 | |
629 | /* Release RISC module. */ | |
3d71644c | 630 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 631 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 632 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
633 | break; |
634 | ||
635 | udelay(10); | |
1da177e4 | 636 | } |
1da177e4 | 637 | |
abbd8870 AV |
638 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
639 | } | |
1da177e4 | 640 | |
abbd8870 AV |
641 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
642 | ||
737faece | 643 | pci_disable_rom(ha->pdev); |
1da177e4 | 644 | |
abbd8870 AV |
645 | /* Get PCI bus information. */ |
646 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 647 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
648 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
649 | ||
650 | return QLA_SUCCESS; | |
1da177e4 LT |
651 | } |
652 | ||
0107109e AV |
653 | /** |
654 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
655 | * @ha: HA context | |
656 | * | |
657 | * Returns 0 on success. | |
658 | */ | |
659 | int | |
e315cd28 | 660 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 661 | { |
a157b101 | 662 | uint16_t w; |
0107109e | 663 | unsigned long flags = 0; |
e315cd28 | 664 | struct qla_hw_data *ha = vha->hw; |
0107109e | 665 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
666 | |
667 | pci_set_master(ha->pdev); | |
af6177d8 | 668 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
669 | |
670 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 671 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
672 | w &= ~PCI_COMMAND_INTX_DISABLE; |
673 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
674 | ||
675 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
676 | ||
677 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
678 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
679 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
680 | |
681 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
682 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
683 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 684 | |
737faece | 685 | pci_disable_rom(ha->pdev); |
0107109e | 686 | |
44c10138 | 687 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 688 | |
0107109e AV |
689 | /* Get PCI bus information. */ |
690 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
691 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
692 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
693 | ||
694 | return QLA_SUCCESS; | |
695 | } | |
696 | ||
c3a2f0df AV |
697 | /** |
698 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
699 | * @ha: HA context | |
700 | * | |
701 | * Returns 0 on success. | |
702 | */ | |
703 | int | |
e315cd28 | 704 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
705 | { |
706 | uint16_t w; | |
e315cd28 | 707 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
708 | |
709 | pci_set_master(ha->pdev); | |
710 | pci_try_set_mwi(ha->pdev); | |
711 | ||
712 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
713 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
714 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
715 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
716 | ||
717 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
718 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
719 | pcie_set_readrq(ha->pdev, 2048); | |
720 | ||
737faece | 721 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
722 | |
723 | ha->chip_revision = ha->pdev->revision; | |
724 | ||
725 | return QLA_SUCCESS; | |
726 | } | |
727 | ||
1da177e4 LT |
728 | /** |
729 | * qla2x00_isp_firmware() - Choose firmware image. | |
730 | * @ha: HA context | |
731 | * | |
732 | * Returns 0 on success. | |
733 | */ | |
734 | static int | |
e315cd28 | 735 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
736 | { |
737 | int rval; | |
42e421b1 AV |
738 | uint16_t loop_id, topo, sw_cap; |
739 | uint8_t domain, area, al_pa; | |
e315cd28 | 740 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
741 | |
742 | /* Assume loading risc code */ | |
fa2a1ce5 | 743 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
744 | |
745 | if (ha->flags.disable_risc_code_load) { | |
7c3df132 | 746 | ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); |
1da177e4 LT |
747 | |
748 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 749 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
750 | if (rval == QLA_SUCCESS) { |
751 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 752 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
753 | &area, &domain, &topo, &sw_cap); |
754 | } | |
1da177e4 LT |
755 | } |
756 | ||
7c3df132 SK |
757 | if (rval) |
758 | ql_dbg(ql_dbg_init, vha, 0x007a, | |
759 | "**** Load RISC code ****.\n"); | |
1da177e4 LT |
760 | |
761 | return (rval); | |
762 | } | |
763 | ||
764 | /** | |
765 | * qla2x00_reset_chip() - Reset ISP chip. | |
766 | * @ha: HA context | |
767 | * | |
768 | * Returns 0 on success. | |
769 | */ | |
abbd8870 | 770 | void |
e315cd28 | 771 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
772 | { |
773 | unsigned long flags = 0; | |
e315cd28 | 774 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 775 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 776 | uint32_t cnt; |
1da177e4 LT |
777 | uint16_t cmd; |
778 | ||
85880801 AV |
779 | if (unlikely(pci_channel_offline(ha->pdev))) |
780 | return; | |
781 | ||
fd34f556 | 782 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
783 | |
784 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
785 | ||
786 | /* Turn off master enable */ | |
787 | cmd = 0; | |
788 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
789 | cmd &= ~PCI_COMMAND_MASTER; | |
790 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
791 | ||
792 | if (!IS_QLA2100(ha)) { | |
793 | /* Pause RISC. */ | |
794 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
795 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
796 | for (cnt = 0; cnt < 30000; cnt++) { | |
797 | if ((RD_REG_WORD(®->hccr) & | |
798 | HCCR_RISC_PAUSE) != 0) | |
799 | break; | |
800 | udelay(100); | |
801 | } | |
802 | } else { | |
803 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
804 | udelay(10); | |
805 | } | |
806 | ||
807 | /* Select FPM registers. */ | |
808 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
809 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
810 | ||
811 | /* FPM Soft Reset. */ | |
812 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
813 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
814 | ||
815 | /* Toggle Fpm Reset. */ | |
816 | if (!IS_QLA2200(ha)) { | |
817 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
818 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
819 | } | |
820 | ||
821 | /* Select frame buffer registers. */ | |
822 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
823 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
824 | ||
825 | /* Reset frame buffer FIFOs. */ | |
826 | if (IS_QLA2200(ha)) { | |
827 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
828 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
829 | } else { | |
830 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
831 | ||
832 | /* Read back fb_cmd until zero or 3 seconds max */ | |
833 | for (cnt = 0; cnt < 3000; cnt++) { | |
834 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
835 | break; | |
836 | udelay(100); | |
837 | } | |
838 | } | |
839 | ||
840 | /* Select RISC module registers. */ | |
841 | WRT_REG_WORD(®->ctrl_status, 0); | |
842 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
843 | ||
844 | /* Reset RISC processor. */ | |
845 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
846 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
847 | ||
848 | /* Release RISC processor. */ | |
849 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
850 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
851 | } | |
852 | ||
853 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
854 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
855 | ||
856 | /* Reset ISP chip. */ | |
857 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
858 | ||
859 | /* Wait for RISC to recover from reset. */ | |
860 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
861 | /* | |
862 | * It is necessary to for a delay here since the card doesn't | |
863 | * respond to PCI reads during a reset. On some architectures | |
864 | * this will result in an MCA. | |
865 | */ | |
866 | udelay(20); | |
867 | for (cnt = 30000; cnt; cnt--) { | |
868 | if ((RD_REG_WORD(®->ctrl_status) & | |
869 | CSR_ISP_SOFT_RESET) == 0) | |
870 | break; | |
871 | udelay(100); | |
872 | } | |
873 | } else | |
874 | udelay(10); | |
875 | ||
876 | /* Reset RISC processor. */ | |
877 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
878 | ||
879 | WRT_REG_WORD(®->semaphore, 0); | |
880 | ||
881 | /* Release RISC processor. */ | |
882 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
883 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
884 | ||
885 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
886 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 887 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 888 | break; |
1da177e4 LT |
889 | |
890 | udelay(100); | |
891 | } | |
892 | } else | |
893 | udelay(100); | |
894 | ||
895 | /* Turn on master enable */ | |
896 | cmd |= PCI_COMMAND_MASTER; | |
897 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
898 | ||
899 | /* Disable RISC pause on FPM parity error. */ | |
900 | if (!IS_QLA2100(ha)) { | |
901 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
902 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
903 | } | |
904 | ||
905 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
906 | } | |
907 | ||
b1d46989 MI |
908 | /** |
909 | * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. | |
910 | * | |
911 | * Returns 0 on success. | |
912 | */ | |
913 | int | |
914 | qla81xx_reset_mpi(scsi_qla_host_t *vha) | |
915 | { | |
916 | uint16_t mb[4] = {0x1010, 0, 1, 0}; | |
917 | ||
6246b8a1 GM |
918 | if (!IS_QLA81XX(vha->hw)) |
919 | return QLA_SUCCESS; | |
920 | ||
b1d46989 MI |
921 | return qla81xx_write_mpi_register(vha, mb); |
922 | } | |
923 | ||
0107109e | 924 | /** |
88c26663 | 925 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
926 | * @ha: HA context |
927 | * | |
928 | * Returns 0 on success. | |
929 | */ | |
88c26663 | 930 | static inline void |
e315cd28 | 931 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
932 | { |
933 | unsigned long flags = 0; | |
e315cd28 | 934 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
935 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
936 | uint32_t cnt, d2; | |
335a1cc9 | 937 | uint16_t wd; |
b1d46989 | 938 | static int abts_cnt; /* ISP abort retry counts */ |
0107109e | 939 | |
0107109e AV |
940 | spin_lock_irqsave(&ha->hardware_lock, flags); |
941 | ||
942 | /* Reset RISC. */ | |
943 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
944 | for (cnt = 0; cnt < 30000; cnt++) { | |
945 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
946 | break; | |
947 | ||
948 | udelay(10); | |
949 | } | |
950 | ||
951 | WRT_REG_DWORD(®->ctrl_status, | |
952 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 953 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 954 | |
335a1cc9 | 955 | udelay(100); |
88c26663 | 956 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
957 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
958 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
959 | udelay(5); | |
960 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
961 | barrier(); | |
962 | } | |
963 | ||
335a1cc9 | 964 | /* Wait for soft-reset to complete. */ |
0107109e AV |
965 | d2 = RD_REG_DWORD(®->ctrl_status); |
966 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
967 | udelay(5); | |
968 | d2 = RD_REG_DWORD(®->ctrl_status); | |
969 | barrier(); | |
970 | } | |
971 | ||
b1d46989 MI |
972 | /* If required, do an MPI FW reset now */ |
973 | if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { | |
974 | if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { | |
975 | if (++abts_cnt < 5) { | |
976 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
977 | set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); | |
978 | } else { | |
979 | /* | |
980 | * We exhausted the ISP abort retries. We have to | |
981 | * set the board offline. | |
982 | */ | |
983 | abts_cnt = 0; | |
984 | vha->flags.online = 0; | |
985 | } | |
986 | } | |
987 | } | |
988 | ||
0107109e AV |
989 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); |
990 | RD_REG_DWORD(®->hccr); | |
991 | ||
992 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
993 | RD_REG_DWORD(®->hccr); | |
994 | ||
995 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
996 | RD_REG_DWORD(®->hccr); | |
997 | ||
998 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
999 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
1000 | udelay(5); | |
1001 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1002 | barrier(); | |
1003 | } | |
1004 | ||
1005 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
1006 | |
1007 | if (IS_NOPOLLING_TYPE(ha)) | |
1008 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
1009 | } |
1010 | ||
88c26663 AV |
1011 | /** |
1012 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
1013 | * @ha: HA context | |
1014 | * | |
1015 | * Returns 0 on success. | |
1016 | */ | |
1017 | void | |
e315cd28 | 1018 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 1019 | { |
e315cd28 | 1020 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
1021 | |
1022 | if (pci_channel_offline(ha->pdev) && | |
1023 | ha->flags.pci_channel_io_perm_failure) { | |
1024 | return; | |
1025 | } | |
1026 | ||
fd34f556 | 1027 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
1028 | |
1029 | /* Perform RISC reset. */ | |
e315cd28 | 1030 | qla24xx_reset_risc(vha); |
88c26663 AV |
1031 | } |
1032 | ||
1da177e4 LT |
1033 | /** |
1034 | * qla2x00_chip_diag() - Test chip for proper operation. | |
1035 | * @ha: HA context | |
1036 | * | |
1037 | * Returns 0 on success. | |
1038 | */ | |
abbd8870 | 1039 | int |
e315cd28 | 1040 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
1041 | { |
1042 | int rval; | |
e315cd28 | 1043 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1044 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1045 | unsigned long flags = 0; |
1046 | uint16_t data; | |
1047 | uint32_t cnt; | |
1048 | uint16_t mb[5]; | |
73208dfd | 1049 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
1050 | |
1051 | /* Assume a failed state */ | |
1052 | rval = QLA_FUNCTION_FAILED; | |
1053 | ||
7c3df132 SK |
1054 | ql_dbg(ql_dbg_init, vha, 0x007b, |
1055 | "Testing device at %lx.\n", (u_long)®->flash_address); | |
1da177e4 LT |
1056 | |
1057 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1058 | ||
1059 | /* Reset ISP chip. */ | |
1060 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
1061 | ||
1062 | /* | |
1063 | * We need to have a delay here since the card will not respond while | |
1064 | * in reset causing an MCA on some architectures. | |
1065 | */ | |
1066 | udelay(20); | |
1067 | data = qla2x00_debounce_register(®->ctrl_status); | |
1068 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
1069 | udelay(5); | |
1070 | data = RD_REG_WORD(®->ctrl_status); | |
1071 | barrier(); | |
1072 | } | |
1073 | ||
1074 | if (!cnt) | |
1075 | goto chip_diag_failed; | |
1076 | ||
7c3df132 SK |
1077 | ql_dbg(ql_dbg_init, vha, 0x007c, |
1078 | "Reset register cleared by chip reset.\n"); | |
1da177e4 LT |
1079 | |
1080 | /* Reset RISC processor. */ | |
1081 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
1082 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
1083 | ||
1084 | /* Workaround for QLA2312 PCI parity error */ | |
1085 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
1086 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
1087 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
1088 | udelay(5); | |
1089 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 1090 | barrier(); |
1da177e4 LT |
1091 | } |
1092 | } else | |
1093 | udelay(10); | |
1094 | ||
1095 | if (!cnt) | |
1096 | goto chip_diag_failed; | |
1097 | ||
1098 | /* Check product ID of chip */ | |
7c3df132 | 1099 | ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); |
1da177e4 LT |
1100 | |
1101 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
1102 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
1103 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
1104 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
1105 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
1106 | mb[3] != PROD_ID_3) { | |
7c3df132 SK |
1107 | ql_log(ql_log_warn, vha, 0x0062, |
1108 | "Wrong product ID = 0x%x,0x%x,0x%x.\n", | |
1109 | mb[1], mb[2], mb[3]); | |
1da177e4 LT |
1110 | |
1111 | goto chip_diag_failed; | |
1112 | } | |
1113 | ha->product_id[0] = mb[1]; | |
1114 | ha->product_id[1] = mb[2]; | |
1115 | ha->product_id[2] = mb[3]; | |
1116 | ha->product_id[3] = mb[4]; | |
1117 | ||
1118 | /* Adjust fw RISC transfer size */ | |
73208dfd | 1119 | if (req->length > 1024) |
1da177e4 LT |
1120 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
1121 | else | |
1122 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 1123 | req->length; |
1da177e4 LT |
1124 | |
1125 | if (IS_QLA2200(ha) && | |
1126 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
1127 | /* Limit firmware transfer size with a 2200A */ | |
7c3df132 | 1128 | ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); |
1da177e4 | 1129 | |
ea5b6382 | 1130 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
1131 | ha->fw_transfer_size = 128; |
1132 | } | |
1133 | ||
1134 | /* Wrap Incoming Mailboxes Test. */ | |
1135 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1136 | ||
7c3df132 | 1137 | ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); |
e315cd28 | 1138 | rval = qla2x00_mbx_reg_test(vha); |
7c3df132 SK |
1139 | if (rval) |
1140 | ql_log(ql_log_warn, vha, 0x0080, | |
1141 | "Failed mailbox send register test.\n"); | |
1142 | else | |
1da177e4 LT |
1143 | /* Flag a successful rval */ |
1144 | rval = QLA_SUCCESS; | |
1da177e4 LT |
1145 | spin_lock_irqsave(&ha->hardware_lock, flags); |
1146 | ||
1147 | chip_diag_failed: | |
1148 | if (rval) | |
7c3df132 SK |
1149 | ql_log(ql_log_info, vha, 0x0081, |
1150 | "Chip diagnostics **** FAILED ****.\n"); | |
1da177e4 LT |
1151 | |
1152 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1153 | ||
1154 | return (rval); | |
1155 | } | |
1156 | ||
0107109e AV |
1157 | /** |
1158 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
1159 | * @ha: HA context | |
1160 | * | |
1161 | * Returns 0 on success. | |
1162 | */ | |
1163 | int | |
e315cd28 | 1164 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
1165 | { |
1166 | int rval; | |
e315cd28 | 1167 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 1168 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 1169 | |
a9083016 GM |
1170 | if (IS_QLA82XX(ha)) |
1171 | return QLA_SUCCESS; | |
1172 | ||
73208dfd | 1173 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 1174 | |
e315cd28 | 1175 | rval = qla2x00_mbx_reg_test(vha); |
0107109e | 1176 | if (rval) { |
7c3df132 SK |
1177 | ql_log(ql_log_warn, vha, 0x0082, |
1178 | "Failed mailbox send register test.\n"); | |
0107109e AV |
1179 | } else { |
1180 | /* Flag a successful rval */ | |
1181 | rval = QLA_SUCCESS; | |
1182 | } | |
1183 | ||
1184 | return rval; | |
1185 | } | |
1186 | ||
a7a167bf | 1187 | void |
e315cd28 | 1188 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 1189 | { |
a7a167bf AV |
1190 | int rval; |
1191 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 1192 | eft_size, fce_size, mq_size; |
df613b96 AV |
1193 | dma_addr_t tc_dma; |
1194 | void *tc; | |
e315cd28 | 1195 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1196 | struct req_que *req = ha->req_q_map[0]; |
1197 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
1198 | |
1199 | if (ha->fw_dump) { | |
7c3df132 SK |
1200 | ql_dbg(ql_dbg_init, vha, 0x00bd, |
1201 | "Firmware dump already allocated.\n"); | |
a7a167bf AV |
1202 | return; |
1203 | } | |
d4e3e04d | 1204 | |
0107109e | 1205 | ha->fw_dumped = 0; |
73208dfd | 1206 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 1207 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 1208 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 1209 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
1210 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
1211 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
1212 | sizeof(uint16_t); | |
e428924c | 1213 | } else if (IS_FWI2_CAPABLE(ha)) { |
6246b8a1 GM |
1214 | if (IS_QLA83XX(ha)) |
1215 | fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); | |
1216 | else if (IS_QLA81XX(ha)) | |
3a03eb79 AV |
1217 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); |
1218 | else if (IS_QLA25XX(ha)) | |
1219 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
1220 | else | |
1221 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
1222 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
1223 | sizeof(uint32_t); | |
050c9bb1 | 1224 | if (ha->mqenable) { |
6246b8a1 GM |
1225 | if (!IS_QLA83XX(ha)) |
1226 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
050c9bb1 GM |
1227 | /* |
1228 | * Allocate maximum buffer size for all queues. | |
1229 | * Resizing must be done at end-of-dump processing. | |
1230 | */ | |
1231 | mq_size += ha->max_req_queues * | |
1232 | (req->length * sizeof(request_t)); | |
1233 | mq_size += ha->max_rsp_queues * | |
1234 | (rsp->length * sizeof(response_t)); | |
1235 | } | |
df613b96 | 1236 | /* Allocate memory for Fibre Channel Event Buffer. */ |
6246b8a1 | 1237 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha)) |
436a7b11 | 1238 | goto try_eft; |
df613b96 AV |
1239 | |
1240 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
1241 | GFP_KERNEL); | |
1242 | if (!tc) { | |
7c3df132 SK |
1243 | ql_log(ql_log_warn, vha, 0x00be, |
1244 | "Unable to allocate (%d KB) for FCE.\n", | |
1245 | FCE_SIZE / 1024); | |
17d98630 | 1246 | goto try_eft; |
df613b96 AV |
1247 | } |
1248 | ||
1249 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 1250 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
1251 | ha->fce_mb, &ha->fce_bufs); |
1252 | if (rval) { | |
7c3df132 SK |
1253 | ql_log(ql_log_warn, vha, 0x00bf, |
1254 | "Unable to initialize FCE (%d).\n", rval); | |
df613b96 AV |
1255 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, |
1256 | tc_dma); | |
1257 | ha->flags.fce_enabled = 0; | |
17d98630 | 1258 | goto try_eft; |
df613b96 | 1259 | } |
cfb0919c | 1260 | ql_dbg(ql_dbg_init, vha, 0x00c0, |
7c3df132 | 1261 | "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); |
df613b96 | 1262 | |
7d9dade3 | 1263 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
1264 | ha->flags.fce_enabled = 1; |
1265 | ha->fce_dma = tc_dma; | |
1266 | ha->fce = tc; | |
436a7b11 AV |
1267 | try_eft: |
1268 | /* Allocate memory for Extended Trace Buffer. */ | |
1269 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
1270 | GFP_KERNEL); | |
1271 | if (!tc) { | |
7c3df132 SK |
1272 | ql_log(ql_log_warn, vha, 0x00c1, |
1273 | "Unable to allocate (%d KB) for EFT.\n", | |
1274 | EFT_SIZE / 1024); | |
436a7b11 AV |
1275 | goto cont_alloc; |
1276 | } | |
1277 | ||
1278 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 1279 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 | 1280 | if (rval) { |
7c3df132 SK |
1281 | ql_log(ql_log_warn, vha, 0x00c2, |
1282 | "Unable to initialize EFT (%d).\n", rval); | |
436a7b11 AV |
1283 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, |
1284 | tc_dma); | |
1285 | goto cont_alloc; | |
1286 | } | |
cfb0919c | 1287 | ql_dbg(ql_dbg_init, vha, 0x00c3, |
7c3df132 | 1288 | "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); |
436a7b11 AV |
1289 | |
1290 | eft_size = EFT_SIZE; | |
1291 | ha->eft_dma = tc_dma; | |
1292 | ha->eft = tc; | |
d4e3e04d | 1293 | } |
a7a167bf | 1294 | cont_alloc: |
73208dfd AC |
1295 | req_q_size = req->length * sizeof(request_t); |
1296 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
1297 | |
1298 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 1299 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
1300 | ha->chain_offset = dump_size; |
1301 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
1302 | |
1303 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 1304 | if (!ha->fw_dump) { |
7c3df132 SK |
1305 | ql_log(ql_log_warn, vha, 0x00c4, |
1306 | "Unable to allocate (%d KB) for firmware dump.\n", | |
1307 | dump_size / 1024); | |
a7a167bf | 1308 | |
e30d1756 MI |
1309 | if (ha->fce) { |
1310 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, | |
1311 | ha->fce_dma); | |
1312 | ha->fce = NULL; | |
1313 | ha->fce_dma = 0; | |
1314 | } | |
1315 | ||
a7a167bf AV |
1316 | if (ha->eft) { |
1317 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
1318 | ha->eft_dma); | |
1319 | ha->eft = NULL; | |
1320 | ha->eft_dma = 0; | |
1321 | } | |
1322 | return; | |
1323 | } | |
cfb0919c | 1324 | ql_dbg(ql_dbg_init, vha, 0x00c5, |
7c3df132 | 1325 | "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); |
a7a167bf AV |
1326 | |
1327 | ha->fw_dump_len = dump_size; | |
1328 | ha->fw_dump->signature[0] = 'Q'; | |
1329 | ha->fw_dump->signature[1] = 'L'; | |
1330 | ha->fw_dump->signature[2] = 'G'; | |
1331 | ha->fw_dump->signature[3] = 'C'; | |
1332 | ha->fw_dump->version = __constant_htonl(1); | |
1333 | ||
1334 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
1335 | ha->fw_dump->mem_size = htonl(mem_size); | |
1336 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
1337 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
1338 | ||
1339 | ha->fw_dump->eft_size = htonl(eft_size); | |
1340 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
1341 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
1342 | ||
1343 | ha->fw_dump->header_size = | |
1344 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
1345 | } |
1346 | ||
18e7555a AV |
1347 | static int |
1348 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
1349 | { | |
1350 | #define MPS_MASK 0xe0 | |
1351 | int rval; | |
1352 | uint16_t dc; | |
1353 | uint32_t dw; | |
18e7555a AV |
1354 | |
1355 | if (!IS_QLA81XX(vha->hw)) | |
1356 | return QLA_SUCCESS; | |
1357 | ||
1358 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
1359 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1360 | ql_log(ql_log_warn, vha, 0x0105, |
1361 | "Unable to acquire semaphore.\n"); | |
18e7555a AV |
1362 | goto done; |
1363 | } | |
1364 | ||
1365 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
1366 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
1367 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1368 | ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); |
18e7555a AV |
1369 | goto done_release; |
1370 | } | |
1371 | ||
1372 | dc &= MPS_MASK; | |
1373 | if (dc == (dw & MPS_MASK)) | |
1374 | goto done_release; | |
1375 | ||
1376 | dw &= ~MPS_MASK; | |
1377 | dw |= dc; | |
1378 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
1379 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1380 | ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); |
18e7555a AV |
1381 | } |
1382 | ||
1383 | done_release: | |
1384 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
1385 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1386 | ql_log(ql_log_warn, vha, 0x006d, |
1387 | "Unable to release semaphore.\n"); | |
18e7555a AV |
1388 | } |
1389 | ||
1390 | done: | |
1391 | return rval; | |
1392 | } | |
1393 | ||
1da177e4 LT |
1394 | /** |
1395 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
1396 | * @ha: HA context | |
1397 | * | |
1398 | * Returns 0 on success. | |
1399 | */ | |
1400 | static int | |
e315cd28 | 1401 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 1402 | { |
0107109e AV |
1403 | int rval; |
1404 | uint32_t srisc_address = 0; | |
e315cd28 | 1405 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
1406 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1407 | unsigned long flags; | |
dda772e8 | 1408 | uint16_t fw_major_version; |
3db0652e | 1409 | |
a9083016 GM |
1410 | if (IS_QLA82XX(ha)) { |
1411 | rval = ha->isp_ops->load_risc(vha, &srisc_address); | |
14e303d9 AV |
1412 | if (rval == QLA_SUCCESS) { |
1413 | qla2x00_stop_firmware(vha); | |
a9083016 | 1414 | goto enable_82xx_npiv; |
14e303d9 | 1415 | } else |
b963752f | 1416 | goto failed; |
a9083016 GM |
1417 | } |
1418 | ||
3db0652e AV |
1419 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1420 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
1421 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1422 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
1423 | RD_REG_WORD(®->hccr); | |
1424 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1425 | } | |
1da177e4 | 1426 | |
18e7555a AV |
1427 | qla81xx_mpi_sync(vha); |
1428 | ||
1da177e4 | 1429 | /* Load firmware sequences */ |
e315cd28 | 1430 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 1431 | if (rval == QLA_SUCCESS) { |
7c3df132 SK |
1432 | ql_dbg(ql_dbg_init, vha, 0x00c9, |
1433 | "Verifying Checksum of loaded RISC code.\n"); | |
1da177e4 | 1434 | |
e315cd28 | 1435 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
1436 | if (rval == QLA_SUCCESS) { |
1437 | /* Start firmware execution. */ | |
7c3df132 SK |
1438 | ql_dbg(ql_dbg_init, vha, 0x00ca, |
1439 | "Starting firmware.\n"); | |
1da177e4 | 1440 | |
e315cd28 | 1441 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 1442 | /* Retrieve firmware information. */ |
dda772e8 | 1443 | if (rval == QLA_SUCCESS) { |
a9083016 | 1444 | enable_82xx_npiv: |
dda772e8 | 1445 | fw_major_version = ha->fw_major_version; |
3173167f GM |
1446 | if (IS_QLA82XX(ha)) |
1447 | qla82xx_check_md_needed(vha); | |
6246b8a1 GM |
1448 | else |
1449 | rval = qla2x00_get_fw_version(vha); | |
ca9e9c3e AV |
1450 | if (rval != QLA_SUCCESS) |
1451 | goto failed; | |
2c3dfe3f | 1452 | ha->flags.npiv_supported = 0; |
e315cd28 | 1453 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1454 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1455 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1456 | if ((!ha->max_npiv_vports) || |
1457 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1458 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1459 | ha->max_npiv_vports = |
eb66dc60 | 1460 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1461 | } |
24a08138 AV |
1462 | qla2x00_get_resource_cnts(vha, NULL, |
1463 | &ha->fw_xcb_count, NULL, NULL, | |
f3a0a77e | 1464 | &ha->max_npiv_vports, NULL); |
d743de66 | 1465 | |
be5ea3cf SK |
1466 | if (!fw_major_version && ql2xallocfwdump |
1467 | && !IS_QLA82XX(ha)) | |
08de2844 | 1468 | qla2x00_alloc_fw_dump(vha); |
1da177e4 LT |
1469 | } |
1470 | } else { | |
7c3df132 SK |
1471 | ql_log(ql_log_fatal, vha, 0x00cd, |
1472 | "ISP Firmware failed checksum.\n"); | |
1473 | goto failed; | |
1da177e4 LT |
1474 | } |
1475 | } | |
1476 | ||
3db0652e AV |
1477 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1478 | /* Enable proper parity. */ | |
1479 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1480 | if (IS_QLA2300(ha)) | |
1481 | /* SRAM parity */ | |
1482 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1483 | else | |
1484 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1485 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1486 | RD_REG_WORD(®->hccr); | |
1487 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1488 | } | |
1489 | ||
6246b8a1 GM |
1490 | if (IS_QLA83XX(ha)) |
1491 | goto skip_fac_check; | |
1492 | ||
1d2874de JC |
1493 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
1494 | uint32_t size; | |
1495 | ||
1496 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
1497 | if (rval == QLA_SUCCESS) { | |
1498 | ha->flags.fac_supported = 1; | |
1499 | ha->fdt_block_size = size << 2; | |
1500 | } else { | |
7c3df132 | 1501 | ql_log(ql_log_warn, vha, 0x00ce, |
1d2874de JC |
1502 | "Unsupported FAC firmware (%d.%02d.%02d).\n", |
1503 | ha->fw_major_version, ha->fw_minor_version, | |
1504 | ha->fw_subminor_version); | |
6246b8a1 GM |
1505 | skip_fac_check: |
1506 | if (IS_QLA83XX(ha)) { | |
1507 | ha->flags.fac_supported = 0; | |
1508 | rval = QLA_SUCCESS; | |
1509 | } | |
1d2874de JC |
1510 | } |
1511 | } | |
ca9e9c3e | 1512 | failed: |
1da177e4 | 1513 | if (rval) { |
7c3df132 SK |
1514 | ql_log(ql_log_fatal, vha, 0x00cf, |
1515 | "Setup chip ****FAILED****.\n"); | |
1da177e4 LT |
1516 | } |
1517 | ||
1518 | return (rval); | |
1519 | } | |
1520 | ||
1521 | /** | |
1522 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1523 | * @ha: HA context | |
1524 | * | |
1525 | * Beginning of request ring has initialization control block already built | |
1526 | * by nvram config routine. | |
1527 | * | |
1528 | * Returns 0 on success. | |
1529 | */ | |
73208dfd AC |
1530 | void |
1531 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1532 | { |
1533 | uint16_t cnt; | |
1534 | response_t *pkt; | |
1535 | ||
2afa19a9 AC |
1536 | rsp->ring_ptr = rsp->ring; |
1537 | rsp->ring_index = 0; | |
1538 | rsp->status_srb = NULL; | |
e315cd28 AC |
1539 | pkt = rsp->ring_ptr; |
1540 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1541 | pkt->signature = RESPONSE_PROCESSED; |
1542 | pkt++; | |
1543 | } | |
1da177e4 LT |
1544 | } |
1545 | ||
1546 | /** | |
1547 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1548 | * @ha: HA context | |
1549 | * | |
1550 | * Returns 0 on success. | |
1551 | */ | |
abbd8870 | 1552 | void |
e315cd28 | 1553 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1554 | { |
1555 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1556 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1557 | |
1558 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1559 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1560 | |
1561 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1562 | return; | |
1563 | ||
1564 | /* Serial Link options. */ | |
7c3df132 SK |
1565 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, |
1566 | "Serial link options.\n"); | |
1567 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, | |
1568 | (uint8_t *)&ha->fw_seriallink_options, | |
1569 | sizeof(ha->fw_seriallink_options)); | |
1da177e4 LT |
1570 | |
1571 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1572 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1573 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1574 | ||
1575 | /* 1G settings */ | |
1576 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1577 | emphasis = (ha->fw_seriallink_options[2] & | |
1578 | (BIT_4 | BIT_3)) >> 3; | |
1579 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1580 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1581 | rx_sens = (ha->fw_seriallink_options[0] & |
1582 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1583 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1584 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1585 | if (rx_sens == 0x0) | |
1586 | rx_sens = 0x3; | |
1587 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1588 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1589 | ha->fw_options[10] |= BIT_5 | | |
1590 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1591 | (tx_sens & (BIT_1 | BIT_0)); | |
1592 | ||
1593 | /* 2G settings */ | |
1594 | swing = (ha->fw_seriallink_options[2] & | |
1595 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1596 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1597 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1598 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1599 | rx_sens = (ha->fw_seriallink_options[1] & |
1600 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1601 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1602 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1603 | if (rx_sens == 0x0) | |
1604 | rx_sens = 0x3; | |
1605 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1606 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1607 | ha->fw_options[11] |= BIT_5 | | |
1608 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1609 | (tx_sens & (BIT_1 | BIT_0)); | |
1610 | } | |
1611 | ||
1612 | /* FCP2 options. */ | |
1613 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1614 | ha->fw_options[3] |= BIT_13; | |
1615 | ||
1616 | /* LED scheme. */ | |
1617 | if (ha->flags.enable_led_scheme) | |
1618 | ha->fw_options[2] |= BIT_12; | |
1619 | ||
48c02fde | 1620 | /* Detect ISP6312. */ |
1621 | if (IS_QLA6312(ha)) | |
1622 | ha->fw_options[2] |= BIT_13; | |
1623 | ||
1da177e4 | 1624 | /* Update firmware options. */ |
e315cd28 | 1625 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1626 | } |
1627 | ||
0107109e | 1628 | void |
e315cd28 | 1629 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1630 | { |
1631 | int rval; | |
e315cd28 | 1632 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1633 | |
a9083016 GM |
1634 | if (IS_QLA82XX(ha)) |
1635 | return; | |
1636 | ||
0107109e | 1637 | /* Update Serial Link options. */ |
f94097ed | 1638 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1639 | return; |
1640 | ||
e315cd28 | 1641 | rval = qla2x00_set_serdes_params(vha, |
f94097ed | 1642 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1643 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1644 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e | 1645 | if (rval != QLA_SUCCESS) { |
7c3df132 | 1646 | ql_log(ql_log_warn, vha, 0x0104, |
0107109e AV |
1647 | "Unable to update Serial Link options (%x).\n", rval); |
1648 | } | |
1649 | } | |
1650 | ||
abbd8870 | 1651 | void |
e315cd28 | 1652 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1653 | { |
e315cd28 | 1654 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1655 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1656 | struct req_que *req = ha->req_q_map[0]; |
1657 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1658 | |
1659 | /* Setup ring parameters in initialization control block. */ | |
1660 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1661 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1662 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1663 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1664 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1665 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1666 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1667 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1668 | |
1669 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1670 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1671 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1672 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1673 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1674 | } | |
1675 | ||
0107109e | 1676 | void |
e315cd28 | 1677 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1678 | { |
e315cd28 | 1679 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1680 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1681 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1682 | struct qla_msix_entry *msix; | |
0107109e | 1683 | struct init_cb_24xx *icb; |
73208dfd AC |
1684 | uint16_t rid = 0; |
1685 | struct req_que *req = ha->req_q_map[0]; | |
1686 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1687 | |
6246b8a1 | 1688 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1689 | icb = (struct init_cb_24xx *)ha->init_cb; |
1690 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1691 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1692 | icb->request_q_length = cpu_to_le16(req->length); |
1693 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1694 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1695 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1696 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1697 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1698 | |
6246b8a1 | 1699 | if (ha->mqenable || IS_QLA83XX(ha)) { |
73208dfd AC |
1700 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); |
1701 | icb->rid = __constant_cpu_to_le16(rid); | |
1702 | if (ha->flags.msix_enabled) { | |
1703 | msix = &ha->msix_entries[1]; | |
7c3df132 SK |
1704 | ql_dbg(ql_dbg_init, vha, 0x00fd, |
1705 | "Registering vector 0x%x for base que.\n", | |
1706 | msix->entry); | |
73208dfd AC |
1707 | icb->msix = cpu_to_le16(msix->entry); |
1708 | } | |
1709 | /* Use alternate PCI bus number */ | |
1710 | if (MSB(rid)) | |
1711 | icb->firmware_options_2 |= | |
1712 | __constant_cpu_to_le32(BIT_19); | |
1713 | /* Use alternate PCI devfn */ | |
1714 | if (LSB(rid)) | |
1715 | icb->firmware_options_2 |= | |
1716 | __constant_cpu_to_le32(BIT_18); | |
1717 | ||
3155754a | 1718 | /* Use Disable MSIX Handshake mode for capable adapters */ |
6246b8a1 GM |
1719 | if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && |
1720 | (ha->flags.msix_enabled)) { | |
3155754a AC |
1721 | icb->firmware_options_2 &= |
1722 | __constant_cpu_to_le32(~BIT_22); | |
1723 | ha->flags.disable_msix_handshake = 1; | |
7c3df132 SK |
1724 | ql_dbg(ql_dbg_init, vha, 0x00fe, |
1725 | "MSIX Handshake Disable Mode turned on.\n"); | |
3155754a AC |
1726 | } else { |
1727 | icb->firmware_options_2 |= | |
1728 | __constant_cpu_to_le32(BIT_22); | |
1729 | } | |
73208dfd | 1730 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1731 | |
1732 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1733 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1734 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1735 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1736 | } else { | |
1737 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1738 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1739 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1740 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1741 | } | |
1742 | /* PCI posting */ | |
1743 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1744 | } |
1745 | ||
1da177e4 LT |
1746 | /** |
1747 | * qla2x00_init_rings() - Initializes firmware. | |
1748 | * @ha: HA context | |
1749 | * | |
1750 | * Beginning of request ring has initialization control block already built | |
1751 | * by nvram config routine. | |
1752 | * | |
1753 | * Returns 0 on success. | |
1754 | */ | |
1755 | static int | |
e315cd28 | 1756 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1757 | { |
1758 | int rval; | |
1759 | unsigned long flags = 0; | |
29bdccbe | 1760 | int cnt, que; |
e315cd28 | 1761 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1762 | struct req_que *req; |
1763 | struct rsp_que *rsp; | |
2c3dfe3f SJ |
1764 | struct mid_init_cb_24xx *mid_init_cb = |
1765 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1766 | |
1767 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1768 | ||
1769 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1770 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1771 | req = ha->req_q_map[que]; |
1772 | if (!req) | |
1773 | continue; | |
2afa19a9 | 1774 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1775 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1776 | |
2afa19a9 | 1777 | req->current_outstanding_cmd = 1; |
1da177e4 | 1778 | |
29bdccbe AC |
1779 | /* Initialize firmware. */ |
1780 | req->ring_ptr = req->ring; | |
1781 | req->ring_index = 0; | |
1782 | req->cnt = req->length; | |
1783 | } | |
1da177e4 | 1784 | |
2afa19a9 | 1785 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1786 | rsp = ha->rsp_q_map[que]; |
1787 | if (!rsp) | |
1788 | continue; | |
29bdccbe AC |
1789 | /* Initialize response queue entries */ |
1790 | qla2x00_init_response_q_entries(rsp); | |
1791 | } | |
1da177e4 | 1792 | |
542bce1f | 1793 | spin_lock(&ha->vport_slock); |
feafb7b1 | 1794 | |
542bce1f | 1795 | spin_unlock(&ha->vport_slock); |
feafb7b1 | 1796 | |
e315cd28 | 1797 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1798 | |
1799 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1800 | ||
1801 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1802 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1803 | |
7c3df132 | 1804 | ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); |
2c3dfe3f | 1805 | |
605aa2bc LC |
1806 | if (ha->flags.npiv_supported) { |
1807 | if (ha->operating_mode == LOOP) | |
1808 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1809 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1810 | } |
1811 | ||
24a08138 AV |
1812 | if (IS_FWI2_CAPABLE(ha)) { |
1813 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1814 | mid_init_cb->init_cb.execution_throttle = | |
1815 | cpu_to_le16(ha->fw_xcb_count); | |
1816 | } | |
2c3dfe3f | 1817 | |
e315cd28 | 1818 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 | 1819 | if (rval) { |
7c3df132 SK |
1820 | ql_log(ql_log_fatal, vha, 0x00d2, |
1821 | "Init Firmware **** FAILED ****.\n"); | |
1da177e4 | 1822 | } else { |
7c3df132 SK |
1823 | ql_dbg(ql_dbg_init, vha, 0x00d3, |
1824 | "Init Firmware -- success.\n"); | |
1da177e4 LT |
1825 | } |
1826 | ||
1827 | return (rval); | |
1828 | } | |
1829 | ||
1830 | /** | |
1831 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1832 | * @ha: HA context | |
1833 | * | |
1834 | * Returns 0 on success. | |
1835 | */ | |
1836 | static int | |
e315cd28 | 1837 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1838 | { |
1839 | int rval; | |
4d4df193 | 1840 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1841 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1842 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
656e8912 | 1843 | uint16_t state[5]; |
e315cd28 | 1844 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1845 | |
1846 | rval = QLA_SUCCESS; | |
1847 | ||
1848 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1849 | min_wait = 20; |
1da177e4 LT |
1850 | |
1851 | /* | |
1852 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1853 | * our own processing. | |
1854 | */ | |
1855 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1856 | wait_time = min_wait; | |
1857 | } | |
1858 | ||
1859 | /* Min wait time if loop down */ | |
1860 | mtime = jiffies + (min_wait * HZ); | |
1861 | ||
1862 | /* wait time before firmware ready */ | |
1863 | wtime = jiffies + (wait_time * HZ); | |
1864 | ||
1865 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1866 | if (!vha->flags.init_done) |
7c3df132 SK |
1867 | ql_log(ql_log_info, vha, 0x801e, |
1868 | "Waiting for LIP to complete.\n"); | |
1da177e4 LT |
1869 | |
1870 | do { | |
e315cd28 | 1871 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1872 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1873 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1874 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1875 | } |
4d4df193 | 1876 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
7c3df132 SK |
1877 | ql_dbg(ql_dbg_taskm, vha, 0x801f, |
1878 | "fw_state=%x 84xx=%x.\n", state[0], | |
1879 | state[2]); | |
4d4df193 HK |
1880 | if ((state[2] & FSTATE_LOGGED_IN) && |
1881 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
7c3df132 SK |
1882 | ql_dbg(ql_dbg_taskm, vha, 0x8028, |
1883 | "Sending verify iocb.\n"); | |
4d4df193 HK |
1884 | |
1885 | cs84xx_time = jiffies; | |
e315cd28 | 1886 | rval = qla84xx_init_chip(vha); |
7c3df132 SK |
1887 | if (rval != QLA_SUCCESS) { |
1888 | ql_log(ql_log_warn, | |
cfb0919c | 1889 | vha, 0x8007, |
7c3df132 | 1890 | "Init chip failed.\n"); |
4d4df193 | 1891 | break; |
7c3df132 | 1892 | } |
4d4df193 HK |
1893 | |
1894 | /* Add time taken to initialize. */ | |
1895 | cs84xx_time = jiffies - cs84xx_time; | |
1896 | wtime += cs84xx_time; | |
1897 | mtime += cs84xx_time; | |
cfb0919c | 1898 | ql_dbg(ql_dbg_taskm, vha, 0x8008, |
7c3df132 SK |
1899 | "Increasing wait time by %ld. " |
1900 | "New time %ld.\n", cs84xx_time, | |
1901 | wtime); | |
4d4df193 HK |
1902 | } |
1903 | } else if (state[0] == FSTATE_READY) { | |
7c3df132 SK |
1904 | ql_dbg(ql_dbg_taskm, vha, 0x8037, |
1905 | "F/W Ready - OK.\n"); | |
1da177e4 | 1906 | |
e315cd28 | 1907 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1908 | &ha->login_timeout, &ha->r_a_tov); |
1909 | ||
1910 | rval = QLA_SUCCESS; | |
1911 | break; | |
1912 | } | |
1913 | ||
1914 | rval = QLA_FUNCTION_FAILED; | |
1915 | ||
e315cd28 | 1916 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1917 | state[0] != FSTATE_READY) { |
1da177e4 | 1918 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1919 | * other than Wait for Login. |
1920 | */ | |
1da177e4 | 1921 | if (time_after_eq(jiffies, mtime)) { |
7c3df132 | 1922 | ql_log(ql_log_info, vha, 0x8038, |
1da177e4 LT |
1923 | "Cable is unplugged...\n"); |
1924 | ||
e315cd28 | 1925 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1926 | break; |
1927 | } | |
1928 | } | |
1929 | } else { | |
1930 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
cdbb0a4f | 1931 | if (time_after_eq(jiffies, mtime) || |
7190575f | 1932 | ha->flags.isp82xx_fw_hung) |
1da177e4 LT |
1933 | break; |
1934 | } | |
1935 | ||
1936 | if (time_after_eq(jiffies, wtime)) | |
1937 | break; | |
1938 | ||
1939 | /* Delay for a while */ | |
1940 | msleep(500); | |
1da177e4 LT |
1941 | } while (1); |
1942 | ||
7c3df132 SK |
1943 | ql_dbg(ql_dbg_taskm, vha, 0x803a, |
1944 | "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0], | |
1945 | state[1], state[2], state[3], state[4], jiffies); | |
1da177e4 | 1946 | |
cfb0919c | 1947 | if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { |
7c3df132 SK |
1948 | ql_log(ql_log_warn, vha, 0x803b, |
1949 | "Firmware ready **** FAILED ****.\n"); | |
1da177e4 LT |
1950 | } |
1951 | ||
1952 | return (rval); | |
1953 | } | |
1954 | ||
1955 | /* | |
1956 | * qla2x00_configure_hba | |
1957 | * Setup adapter context. | |
1958 | * | |
1959 | * Input: | |
1960 | * ha = adapter state pointer. | |
1961 | * | |
1962 | * Returns: | |
1963 | * 0 = success | |
1964 | * | |
1965 | * Context: | |
1966 | * Kernel context. | |
1967 | */ | |
1968 | static int | |
e315cd28 | 1969 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1970 | { |
1971 | int rval; | |
1972 | uint16_t loop_id; | |
1973 | uint16_t topo; | |
2c3dfe3f | 1974 | uint16_t sw_cap; |
1da177e4 LT |
1975 | uint8_t al_pa; |
1976 | uint8_t area; | |
1977 | uint8_t domain; | |
1978 | char connect_type[22]; | |
e315cd28 | 1979 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1980 | |
1981 | /* Get host addresses. */ | |
e315cd28 | 1982 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 1983 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 1984 | if (rval != QLA_SUCCESS) { |
e315cd28 | 1985 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
6246b8a1 | 1986 | IS_CNA_CAPABLE(ha) || |
33135aa2 | 1987 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
7c3df132 SK |
1988 | ql_dbg(ql_dbg_disc, vha, 0x2008, |
1989 | "Loop is in a transition state.\n"); | |
33135aa2 | 1990 | } else { |
7c3df132 SK |
1991 | ql_log(ql_log_warn, vha, 0x2009, |
1992 | "Unable to get host loop ID.\n"); | |
e315cd28 | 1993 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 1994 | } |
1da177e4 LT |
1995 | return (rval); |
1996 | } | |
1997 | ||
1998 | if (topo == 4) { | |
7c3df132 SK |
1999 | ql_log(ql_log_info, vha, 0x200a, |
2000 | "Cannot get topology - retrying.\n"); | |
1da177e4 LT |
2001 | return (QLA_FUNCTION_FAILED); |
2002 | } | |
2003 | ||
e315cd28 | 2004 | vha->loop_id = loop_id; |
1da177e4 LT |
2005 | |
2006 | /* initialize */ | |
2007 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
2008 | ha->operating_mode = LOOP; | |
2c3dfe3f | 2009 | ha->switch_cap = 0; |
1da177e4 LT |
2010 | |
2011 | switch (topo) { | |
2012 | case 0: | |
7c3df132 | 2013 | ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); |
1da177e4 LT |
2014 | ha->current_topology = ISP_CFG_NL; |
2015 | strcpy(connect_type, "(Loop)"); | |
2016 | break; | |
2017 | ||
2018 | case 1: | |
7c3df132 | 2019 | ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); |
2c3dfe3f | 2020 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2021 | ha->current_topology = ISP_CFG_FL; |
2022 | strcpy(connect_type, "(FL_Port)"); | |
2023 | break; | |
2024 | ||
2025 | case 2: | |
7c3df132 | 2026 | ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); |
1da177e4 LT |
2027 | ha->operating_mode = P2P; |
2028 | ha->current_topology = ISP_CFG_N; | |
2029 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
2030 | break; | |
2031 | ||
2032 | case 3: | |
7c3df132 | 2033 | ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); |
2c3dfe3f | 2034 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2035 | ha->operating_mode = P2P; |
2036 | ha->current_topology = ISP_CFG_F; | |
2037 | strcpy(connect_type, "(F_Port)"); | |
2038 | break; | |
2039 | ||
2040 | default: | |
7c3df132 SK |
2041 | ql_dbg(ql_dbg_disc, vha, 0x200f, |
2042 | "HBA in unknown topology %x, using NL.\n", topo); | |
1da177e4 LT |
2043 | ha->current_topology = ISP_CFG_NL; |
2044 | strcpy(connect_type, "(Loop)"); | |
2045 | break; | |
2046 | } | |
2047 | ||
2048 | /* Save Host port and loop ID. */ | |
2049 | /* byte order - Big Endian */ | |
e315cd28 AC |
2050 | vha->d_id.b.domain = domain; |
2051 | vha->d_id.b.area = area; | |
2052 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 2053 | |
e315cd28 | 2054 | if (!vha->flags.init_done) |
7c3df132 SK |
2055 | ql_log(ql_log_info, vha, 0x2010, |
2056 | "Topology - %s, Host Loop address 0x%x.\n", | |
e315cd28 | 2057 | connect_type, vha->loop_id); |
1da177e4 LT |
2058 | |
2059 | if (rval) { | |
7c3df132 SK |
2060 | ql_log(ql_log_warn, vha, 0x2011, |
2061 | "%s FAILED\n", __func__); | |
1da177e4 | 2062 | } else { |
7c3df132 SK |
2063 | ql_dbg(ql_dbg_disc, vha, 0x2012, |
2064 | "%s success\n", __func__); | |
1da177e4 LT |
2065 | } |
2066 | ||
2067 | return(rval); | |
2068 | } | |
2069 | ||
a9083016 | 2070 | inline void |
e315cd28 AC |
2071 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
2072 | char *def) | |
9bb9fcf2 AV |
2073 | { |
2074 | char *st, *en; | |
2075 | uint16_t index; | |
e315cd28 | 2076 | struct qla_hw_data *ha = vha->hw; |
ab671149 | 2077 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
6246b8a1 | 2078 | !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); |
9bb9fcf2 AV |
2079 | |
2080 | if (memcmp(model, BINZERO, len) != 0) { | |
2081 | strncpy(ha->model_number, model, len); | |
2082 | st = en = ha->model_number; | |
2083 | en += len - 1; | |
2084 | while (en > st) { | |
2085 | if (*en != 0x20 && *en != 0x00) | |
2086 | break; | |
2087 | *en-- = '\0'; | |
2088 | } | |
2089 | ||
2090 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2091 | if (use_tbl && |
2092 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 2093 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
2094 | strncpy(ha->model_desc, |
2095 | qla2x00_model_name[index * 2 + 1], | |
2096 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2097 | } else { |
2098 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2099 | if (use_tbl && |
2100 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
2101 | index < QLA_MODEL_NAMES) { |
2102 | strcpy(ha->model_number, | |
2103 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
2104 | strncpy(ha->model_desc, |
2105 | qla2x00_model_name[index * 2 + 1], | |
2106 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2107 | } else { |
2108 | strcpy(ha->model_number, def); | |
2109 | } | |
2110 | } | |
1ee27146 | 2111 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 2112 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 2113 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
2114 | } |
2115 | ||
4e08df3f DM |
2116 | /* On sparc systems, obtain port and node WWN from firmware |
2117 | * properties. | |
2118 | */ | |
e315cd28 | 2119 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
2120 | { |
2121 | #ifdef CONFIG_SPARC | |
e315cd28 | 2122 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 2123 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
2124 | struct device_node *dp = pci_device_to_OF_node(pdev); |
2125 | const u8 *val; | |
4e08df3f DM |
2126 | int len; |
2127 | ||
2128 | val = of_get_property(dp, "port-wwn", &len); | |
2129 | if (val && len >= WWN_SIZE) | |
2130 | memcpy(nv->port_name, val, WWN_SIZE); | |
2131 | ||
2132 | val = of_get_property(dp, "node-wwn", &len); | |
2133 | if (val && len >= WWN_SIZE) | |
2134 | memcpy(nv->node_name, val, WWN_SIZE); | |
2135 | #endif | |
2136 | } | |
2137 | ||
1da177e4 LT |
2138 | /* |
2139 | * NVRAM configuration for ISP 2xxx | |
2140 | * | |
2141 | * Input: | |
2142 | * ha = adapter block pointer. | |
2143 | * | |
2144 | * Output: | |
2145 | * initialization control block in response_ring | |
2146 | * host adapters parameters in host adapter block | |
2147 | * | |
2148 | * Returns: | |
2149 | * 0 = success. | |
2150 | */ | |
abbd8870 | 2151 | int |
e315cd28 | 2152 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 2153 | { |
4e08df3f | 2154 | int rval; |
0107109e AV |
2155 | uint8_t chksum = 0; |
2156 | uint16_t cnt; | |
2157 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 2158 | struct qla_hw_data *ha = vha->hw; |
0107109e | 2159 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
2160 | nvram_t *nv = ha->nvram; |
2161 | uint8_t *ptr = ha->nvram; | |
3d71644c | 2162 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2163 | |
4e08df3f DM |
2164 | rval = QLA_SUCCESS; |
2165 | ||
1da177e4 | 2166 | /* Determine NVRAM starting address. */ |
0107109e | 2167 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
2168 | ha->nvram_base = 0; |
2169 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
2170 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
2171 | ha->nvram_base = 0x80; | |
2172 | ||
2173 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 2174 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
2175 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
2176 | chksum += *ptr++; | |
1da177e4 | 2177 | |
7c3df132 SK |
2178 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, |
2179 | "Contents of NVRAM.\n"); | |
2180 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, | |
2181 | (uint8_t *)nv, ha->nvram_size); | |
1da177e4 LT |
2182 | |
2183 | /* Bad NVRAM data, set defaults parameters. */ | |
2184 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
2185 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
2186 | /* Reset NVRAM data. */ | |
7c3df132 | 2187 | ql_log(ql_log_warn, vha, 0x0064, |
9e336520 | 2188 | "Inconsistent NVRAM " |
7c3df132 SK |
2189 | "detected: checksum=0x%x id=%c version=0x%x.\n", |
2190 | chksum, nv->id[0], nv->nvram_version); | |
2191 | ql_log(ql_log_warn, vha, 0x0065, | |
2192 | "Falling back to " | |
2193 | "functioning (yet invalid -- WWPN) defaults.\n"); | |
4e08df3f DM |
2194 | |
2195 | /* | |
2196 | * Set default initialization control block. | |
2197 | */ | |
2198 | memset(nv, 0, ha->nvram_size); | |
2199 | nv->parameter_block_version = ICB_VERSION; | |
2200 | ||
2201 | if (IS_QLA23XX(ha)) { | |
2202 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2203 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2204 | nv->add_firmware_options[0] = BIT_5; | |
2205 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2206 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2207 | nv->special_options[1] = BIT_7; | |
2208 | } else if (IS_QLA2200(ha)) { | |
2209 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2210 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2211 | nv->add_firmware_options[0] = BIT_5; | |
2212 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2213 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2214 | } else if (IS_QLA2100(ha)) { | |
2215 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
2216 | nv->firmware_options[1] = BIT_5; | |
2217 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2218 | } | |
2219 | ||
2220 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
2221 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
2222 | nv->retry_count = 8; | |
2223 | nv->retry_delay = 1; | |
2224 | ||
2225 | nv->port_name[0] = 33; | |
2226 | nv->port_name[3] = 224; | |
2227 | nv->port_name[4] = 139; | |
2228 | ||
e315cd28 | 2229 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
2230 | |
2231 | nv->login_timeout = 4; | |
2232 | ||
2233 | /* | |
2234 | * Set default host adapter parameters | |
2235 | */ | |
2236 | nv->host_p[1] = BIT_2; | |
2237 | nv->reset_delay = 5; | |
2238 | nv->port_down_retry_count = 8; | |
2239 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
2240 | nv->link_down_timeout = 60; | |
2241 | ||
2242 | rval = 1; | |
1da177e4 LT |
2243 | } |
2244 | ||
2245 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
2246 | /* | |
2247 | * The SN2 does not provide BIOS emulation which means you can't change | |
2248 | * potentially bogus BIOS settings. Force the use of default settings | |
2249 | * for link rate and frame size. Hope that the rest of the settings | |
2250 | * are valid. | |
2251 | */ | |
2252 | if (ia64_platform_is("sn2")) { | |
2253 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2254 | if (IS_QLA23XX(ha)) | |
2255 | nv->special_options[1] = BIT_7; | |
2256 | } | |
2257 | #endif | |
2258 | ||
2259 | /* Reset Initialization control block */ | |
0107109e | 2260 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
2261 | |
2262 | /* | |
2263 | * Setup driver NVRAM options. | |
2264 | */ | |
2265 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
2266 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
2267 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
2268 | nv->firmware_options[1] &= ~BIT_4; | |
2269 | ||
2270 | if (IS_QLA23XX(ha)) { | |
2271 | nv->firmware_options[0] |= BIT_2; | |
2272 | nv->firmware_options[0] &= ~BIT_3; | |
5ff1d584 | 2273 | nv->firmware_options[0] &= ~BIT_6; |
0107109e | 2274 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
2275 | |
2276 | if (IS_QLA2300(ha)) { | |
2277 | if (ha->fb_rev == FPM_2310) { | |
2278 | strcpy(ha->model_number, "QLA2310"); | |
2279 | } else { | |
2280 | strcpy(ha->model_number, "QLA2300"); | |
2281 | } | |
2282 | } else { | |
e315cd28 | 2283 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 2284 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
2285 | } |
2286 | } else if (IS_QLA2200(ha)) { | |
2287 | nv->firmware_options[0] |= BIT_2; | |
2288 | /* | |
2289 | * 'Point-to-point preferred, else loop' is not a safe | |
2290 | * connection mode setting. | |
2291 | */ | |
2292 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
2293 | (BIT_5 | BIT_4)) { | |
2294 | /* Force 'loop preferred, else point-to-point'. */ | |
2295 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
2296 | nv->add_firmware_options[0] |= BIT_5; | |
2297 | } | |
2298 | strcpy(ha->model_number, "QLA22xx"); | |
2299 | } else /*if (IS_QLA2100(ha))*/ { | |
2300 | strcpy(ha->model_number, "QLA2100"); | |
2301 | } | |
2302 | ||
2303 | /* | |
2304 | * Copy over NVRAM RISC parameter block to initialization control block. | |
2305 | */ | |
2306 | dptr1 = (uint8_t *)icb; | |
2307 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
2308 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
2309 | while (cnt--) | |
2310 | *dptr1++ = *dptr2++; | |
2311 | ||
2312 | /* Copy 2nd half. */ | |
2313 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
2314 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
2315 | while (cnt--) | |
2316 | *dptr1++ = *dptr2++; | |
2317 | ||
5341e868 AV |
2318 | /* Use alternate WWN? */ |
2319 | if (nv->host_p[1] & BIT_7) { | |
2320 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
2321 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
2322 | } | |
2323 | ||
1da177e4 LT |
2324 | /* Prepare nodename */ |
2325 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
2326 | /* | |
2327 | * Firmware will apply the following mask if the nodename was | |
2328 | * not provided. | |
2329 | */ | |
2330 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
2331 | icb->node_name[0] &= 0xF0; | |
2332 | } | |
2333 | ||
2334 | /* | |
2335 | * Set host adapter parameters. | |
2336 | */ | |
3ce8866c SK |
2337 | |
2338 | /* | |
2339 | * BIT_7 in the host-parameters section allows for modification to | |
2340 | * internal driver logging. | |
2341 | */ | |
0181944f | 2342 | if (nv->host_p[0] & BIT_7) |
cfb0919c | 2343 | ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; |
1da177e4 LT |
2344 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
2345 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
2346 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
2347 | ha->flags.disable_risc_code_load = 0; | |
2348 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
2349 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
2350 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 2351 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 2352 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
2353 | |
2354 | ha->operating_mode = | |
2355 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
2356 | ||
2357 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
2358 | sizeof(ha->fw_seriallink_options)); | |
2359 | ||
2360 | /* save HBA serial number */ | |
2361 | ha->serial0 = icb->port_name[5]; | |
2362 | ha->serial1 = icb->port_name[6]; | |
2363 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
2364 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
2365 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
2366 | |
2367 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
2368 | ||
2369 | ha->retry_count = nv->retry_count; | |
2370 | ||
2371 | /* Set minimum login_timeout to 4 seconds. */ | |
5b91490e | 2372 | if (nv->login_timeout != ql2xlogintimeout) |
1da177e4 LT |
2373 | nv->login_timeout = ql2xlogintimeout; |
2374 | if (nv->login_timeout < 4) | |
2375 | nv->login_timeout = 4; | |
2376 | ha->login_timeout = nv->login_timeout; | |
2377 | icb->login_timeout = nv->login_timeout; | |
2378 | ||
00a537b8 AV |
2379 | /* Set minimum RATOV to 100 tenths of a second. */ |
2380 | ha->r_a_tov = 100; | |
1da177e4 | 2381 | |
1da177e4 LT |
2382 | ha->loop_reset_delay = nv->reset_delay; |
2383 | ||
1da177e4 LT |
2384 | /* Link Down Timeout = 0: |
2385 | * | |
2386 | * When Port Down timer expires we will start returning | |
2387 | * I/O's to OS with "DID_NO_CONNECT". | |
2388 | * | |
2389 | * Link Down Timeout != 0: | |
2390 | * | |
2391 | * The driver waits for the link to come up after link down | |
2392 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 2393 | */ |
1da177e4 LT |
2394 | if (nv->link_down_timeout == 0) { |
2395 | ha->loop_down_abort_time = | |
354d6b21 | 2396 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
2397 | } else { |
2398 | ha->link_down_timeout = nv->link_down_timeout; | |
2399 | ha->loop_down_abort_time = | |
2400 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 2401 | } |
1da177e4 | 2402 | |
1da177e4 LT |
2403 | /* |
2404 | * Need enough time to try and get the port back. | |
2405 | */ | |
2406 | ha->port_down_retry_count = nv->port_down_retry_count; | |
2407 | if (qlport_down_retry) | |
2408 | ha->port_down_retry_count = qlport_down_retry; | |
2409 | /* Set login_retry_count */ | |
2410 | ha->login_retry_count = nv->retry_count; | |
2411 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
2412 | ha->port_down_retry_count > 3) | |
2413 | ha->login_retry_count = ha->port_down_retry_count; | |
2414 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
2415 | ha->login_retry_count = ha->port_down_retry_count; | |
2416 | if (ql2xloginretrycount) | |
2417 | ha->login_retry_count = ql2xloginretrycount; | |
2418 | ||
1da177e4 LT |
2419 | icb->lun_enables = __constant_cpu_to_le16(0); |
2420 | icb->command_resource_count = 0; | |
2421 | icb->immediate_notify_resource_count = 0; | |
2422 | icb->timeout = __constant_cpu_to_le16(0); | |
2423 | ||
2424 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
2425 | /* Enable RIO */ | |
2426 | icb->firmware_options[0] &= ~BIT_3; | |
2427 | icb->add_firmware_options[0] &= | |
2428 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2429 | icb->add_firmware_options[0] |= BIT_2; | |
2430 | icb->response_accumulation_timer = 3; | |
2431 | icb->interrupt_delay_timer = 5; | |
2432 | ||
e315cd28 | 2433 | vha->flags.process_response_queue = 1; |
1da177e4 | 2434 | } else { |
4fdfefe5 | 2435 | /* Enable ZIO. */ |
e315cd28 | 2436 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
2437 | ha->zio_mode = icb->add_firmware_options[0] & |
2438 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2439 | ha->zio_timer = icb->interrupt_delay_timer ? | |
2440 | icb->interrupt_delay_timer: 2; | |
2441 | } | |
1da177e4 LT |
2442 | icb->add_firmware_options[0] &= |
2443 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 2444 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 2445 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 2446 | ha->zio_mode = QLA_ZIO_MODE_6; |
2447 | ||
7c3df132 | 2448 | ql_log(ql_log_info, vha, 0x0068, |
4fdfefe5 AV |
2449 | "ZIO mode %d enabled; timer delay (%d us).\n", |
2450 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 2451 | |
4fdfefe5 AV |
2452 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
2453 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 2454 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
2455 | } |
2456 | } | |
2457 | ||
4e08df3f | 2458 | if (rval) { |
7c3df132 SK |
2459 | ql_log(ql_log_warn, vha, 0x0069, |
2460 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
2461 | } |
2462 | return (rval); | |
1da177e4 LT |
2463 | } |
2464 | ||
19a7b4ae JSEC |
2465 | static void |
2466 | qla2x00_rport_del(void *data) | |
2467 | { | |
2468 | fc_port_t *fcport = data; | |
d97994dc | 2469 | struct fc_rport *rport; |
044d78e1 | 2470 | unsigned long flags; |
d97994dc | 2471 | |
044d78e1 | 2472 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
ac280b67 | 2473 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 2474 | fcport->drport = NULL; |
044d78e1 | 2475 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
d97994dc | 2476 | if (rport) |
2477 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
2478 | } |
2479 | ||
1da177e4 LT |
2480 | /** |
2481 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2482 | * @ha: HA context | |
2483 | * @flags: allocation flags | |
2484 | * | |
2485 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
2486 | */ | |
9a069e19 | 2487 | fc_port_t * |
e315cd28 | 2488 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
2489 | { |
2490 | fc_port_t *fcport; | |
2491 | ||
bbfbbbc1 MK |
2492 | fcport = kzalloc(sizeof(fc_port_t), flags); |
2493 | if (!fcport) | |
2494 | return NULL; | |
1da177e4 LT |
2495 | |
2496 | /* Setup fcport template structure. */ | |
e315cd28 | 2497 | fcport->vha = vha; |
1da177e4 LT |
2498 | fcport->port_type = FCT_UNKNOWN; |
2499 | fcport->loop_id = FC_NO_LOOP_ID; | |
ec426e10 | 2500 | qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); |
ad3e0eda | 2501 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 2502 | |
bbfbbbc1 | 2503 | return fcport; |
1da177e4 LT |
2504 | } |
2505 | ||
2506 | /* | |
2507 | * qla2x00_configure_loop | |
2508 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2509 | * | |
2510 | * Input: | |
2511 | * ha = adapter block pointer. | |
2512 | * | |
2513 | * Returns: | |
2514 | * 0 = success. | |
2515 | * 1 = error. | |
2516 | * 2 = database was full and device was not configured. | |
2517 | */ | |
2518 | static int | |
e315cd28 | 2519 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2520 | { |
2521 | int rval; | |
2522 | unsigned long flags, save_flags; | |
e315cd28 | 2523 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2524 | rval = QLA_SUCCESS; |
2525 | ||
2526 | /* Get Initiator ID */ | |
e315cd28 AC |
2527 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2528 | rval = qla2x00_configure_hba(vha); | |
1da177e4 | 2529 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2530 | ql_dbg(ql_dbg_disc, vha, 0x2013, |
2531 | "Unable to configure HBA.\n"); | |
1da177e4 LT |
2532 | return (rval); |
2533 | } | |
2534 | } | |
2535 | ||
e315cd28 | 2536 | save_flags = flags = vha->dpc_flags; |
7c3df132 SK |
2537 | ql_dbg(ql_dbg_disc, vha, 0x2014, |
2538 | "Configure loop -- dpc flags = 0x%lx.\n", flags); | |
1da177e4 LT |
2539 | |
2540 | /* | |
2541 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2542 | * both at the same time. | |
2543 | */ | |
e315cd28 AC |
2544 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2545 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2546 | |
3064ff39 MH |
2547 | qla2x00_get_data_rate(vha); |
2548 | ||
1da177e4 LT |
2549 | /* Determine what we need to do */ |
2550 | if (ha->current_topology == ISP_CFG_FL && | |
2551 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2552 | ||
1da177e4 LT |
2553 | set_bit(RSCN_UPDATE, &flags); |
2554 | ||
2555 | } else if (ha->current_topology == ISP_CFG_F && | |
2556 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2557 | ||
1da177e4 LT |
2558 | set_bit(RSCN_UPDATE, &flags); |
2559 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2560 | |
2561 | } else if (ha->current_topology == ISP_CFG_N) { | |
2562 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2563 | |
e315cd28 | 2564 | } else if (!vha->flags.online || |
1da177e4 LT |
2565 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2566 | ||
1da177e4 LT |
2567 | set_bit(RSCN_UPDATE, &flags); |
2568 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2569 | } | |
2570 | ||
2571 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
7c3df132 SK |
2572 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
2573 | ql_dbg(ql_dbg_disc, vha, 0x2015, | |
2574 | "Loop resync needed, failing.\n"); | |
1da177e4 | 2575 | rval = QLA_FUNCTION_FAILED; |
642ef983 | 2576 | } else |
e315cd28 | 2577 | rval = qla2x00_configure_local_loop(vha); |
1da177e4 LT |
2578 | } |
2579 | ||
2580 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
7c3df132 SK |
2581 | if (LOOP_TRANSITION(vha)) { |
2582 | ql_dbg(ql_dbg_disc, vha, 0x201e, | |
2583 | "Needs RSCN update and loop transition.\n"); | |
1da177e4 | 2584 | rval = QLA_FUNCTION_FAILED; |
7c3df132 | 2585 | } |
e315cd28 AC |
2586 | else |
2587 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2588 | } |
2589 | ||
2590 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2591 | if (atomic_read(&vha->loop_down_timer) || |
2592 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2593 | rval = QLA_FUNCTION_FAILED; |
2594 | } else { | |
e315cd28 | 2595 | atomic_set(&vha->loop_state, LOOP_READY); |
7c3df132 SK |
2596 | ql_dbg(ql_dbg_disc, vha, 0x2069, |
2597 | "LOOP READY.\n"); | |
1da177e4 LT |
2598 | } |
2599 | } | |
2600 | ||
2601 | if (rval) { | |
7c3df132 SK |
2602 | ql_dbg(ql_dbg_disc, vha, 0x206a, |
2603 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 | 2604 | } else { |
7c3df132 SK |
2605 | ql_dbg(ql_dbg_disc, vha, 0x206b, |
2606 | "%s: exiting normally.\n", __func__); | |
1da177e4 LT |
2607 | } |
2608 | ||
cc3ef7bc | 2609 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2610 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2611 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2612 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2613 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2614 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
f4658b6c | 2615 | } |
1da177e4 LT |
2616 | } |
2617 | ||
2618 | return (rval); | |
2619 | } | |
2620 | ||
2621 | ||
2622 | ||
2623 | /* | |
2624 | * qla2x00_configure_local_loop | |
2625 | * Updates Fibre Channel Device Database with local loop devices. | |
2626 | * | |
2627 | * Input: | |
2628 | * ha = adapter block pointer. | |
2629 | * | |
2630 | * Returns: | |
2631 | * 0 = success. | |
2632 | */ | |
2633 | static int | |
e315cd28 | 2634 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2635 | { |
2636 | int rval, rval2; | |
2637 | int found_devs; | |
2638 | int found; | |
2639 | fc_port_t *fcport, *new_fcport; | |
2640 | ||
2641 | uint16_t index; | |
2642 | uint16_t entries; | |
2643 | char *id_iter; | |
2644 | uint16_t loop_id; | |
2645 | uint8_t domain, area, al_pa; | |
e315cd28 | 2646 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2647 | |
2648 | found_devs = 0; | |
2649 | new_fcport = NULL; | |
642ef983 | 2650 | entries = MAX_FIBRE_DEVICES_LOOP; |
1da177e4 | 2651 | |
7c3df132 SK |
2652 | ql_dbg(ql_dbg_disc, vha, 0x2016, |
2653 | "Getting FCAL position map.\n"); | |
2654 | if (ql2xextended_error_logging & ql_dbg_disc) | |
2655 | qla2x00_get_fcal_position_map(vha, NULL); | |
1da177e4 LT |
2656 | |
2657 | /* Get list of logged in devices. */ | |
642ef983 | 2658 | memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); |
e315cd28 | 2659 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2660 | &entries); |
2661 | if (rval != QLA_SUCCESS) | |
2662 | goto cleanup_allocation; | |
2663 | ||
7c3df132 SK |
2664 | ql_dbg(ql_dbg_disc, vha, 0x2017, |
2665 | "Entries in ID list (%d).\n", entries); | |
2666 | ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, | |
2667 | (uint8_t *)ha->gid_list, | |
2668 | entries * sizeof(struct gid_list_info)); | |
1da177e4 LT |
2669 | |
2670 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2671 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2672 | if (new_fcport == NULL) { |
7c3df132 SK |
2673 | ql_log(ql_log_warn, vha, 0x2018, |
2674 | "Memory allocation failed for fcport.\n"); | |
1da177e4 LT |
2675 | rval = QLA_MEMORY_ALLOC_FAILED; |
2676 | goto cleanup_allocation; | |
2677 | } | |
2678 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2679 | ||
2680 | /* | |
2681 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2682 | */ | |
e315cd28 | 2683 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2684 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2685 | fcport->port_type != FCT_BROADCAST && | |
2686 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2687 | ||
7c3df132 SK |
2688 | ql_dbg(ql_dbg_disc, vha, 0x2019, |
2689 | "Marking port lost loop_id=0x%04x.\n", | |
2690 | fcport->loop_id); | |
1da177e4 | 2691 | |
ec426e10 | 2692 | qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); |
1da177e4 LT |
2693 | } |
2694 | } | |
2695 | ||
2696 | /* Add devices to port list. */ | |
2697 | id_iter = (char *)ha->gid_list; | |
2698 | for (index = 0; index < entries; index++) { | |
2699 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2700 | area = ((struct gid_list_info *)id_iter)->area; | |
2701 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2702 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2703 | loop_id = (uint16_t) |
2704 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2705 | else |
1da177e4 LT |
2706 | loop_id = le16_to_cpu( |
2707 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2708 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2709 | |
2710 | /* Bypass reserved domain fields. */ | |
2711 | if ((domain & 0xf0) == 0xf0) | |
2712 | continue; | |
2713 | ||
2714 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2715 | if (area && domain && |
e315cd28 | 2716 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2717 | continue; |
2718 | ||
2719 | /* Bypass invalid local loop ID. */ | |
2720 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2721 | continue; | |
2722 | ||
2723 | /* Fill in member data. */ | |
2724 | new_fcport->d_id.b.domain = domain; | |
2725 | new_fcport->d_id.b.area = area; | |
2726 | new_fcport->d_id.b.al_pa = al_pa; | |
2727 | new_fcport->loop_id = loop_id; | |
e315cd28 | 2728 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); |
1da177e4 | 2729 | if (rval2 != QLA_SUCCESS) { |
7c3df132 SK |
2730 | ql_dbg(ql_dbg_disc, vha, 0x201a, |
2731 | "Failed to retrieve fcport information " | |
2732 | "-- get_port_database=%x, loop_id=0x%04x.\n", | |
2733 | rval2, new_fcport->loop_id); | |
2734 | ql_dbg(ql_dbg_disc, vha, 0x201b, | |
2735 | "Scheduling resync.\n"); | |
e315cd28 | 2736 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
2737 | continue; |
2738 | } | |
2739 | ||
2740 | /* Check for matching device in port list. */ | |
2741 | found = 0; | |
2742 | fcport = NULL; | |
e315cd28 | 2743 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2744 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2745 | WWN_SIZE)) | |
2746 | continue; | |
2747 | ||
ddb9b126 | 2748 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2749 | fcport->loop_id = new_fcport->loop_id; |
2750 | fcport->port_type = new_fcport->port_type; | |
2751 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2752 | memcpy(fcport->node_name, new_fcport->node_name, | |
2753 | WWN_SIZE); | |
2754 | ||
2755 | found++; | |
2756 | break; | |
2757 | } | |
2758 | ||
2759 | if (!found) { | |
2760 | /* New device, add to fcports list. */ | |
e315cd28 | 2761 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2762 | |
2763 | /* Allocate a new replacement fcport. */ | |
2764 | fcport = new_fcport; | |
e315cd28 | 2765 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2766 | if (new_fcport == NULL) { |
7c3df132 SK |
2767 | ql_log(ql_log_warn, vha, 0x201c, |
2768 | "Failed to allocate memory for fcport.\n"); | |
1da177e4 LT |
2769 | rval = QLA_MEMORY_ALLOC_FAILED; |
2770 | goto cleanup_allocation; | |
2771 | } | |
2772 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2773 | } | |
2774 | ||
d8b45213 | 2775 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2776 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2777 | |
e315cd28 | 2778 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2779 | |
2780 | found_devs++; | |
2781 | } | |
2782 | ||
2783 | cleanup_allocation: | |
c9475cb0 | 2784 | kfree(new_fcport); |
1da177e4 LT |
2785 | |
2786 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
2787 | ql_dbg(ql_dbg_disc, vha, 0x201d, |
2788 | "Configure local loop error exit: rval=%x.\n", rval); | |
1da177e4 LT |
2789 | } |
2790 | ||
1da177e4 LT |
2791 | return (rval); |
2792 | } | |
2793 | ||
d8b45213 | 2794 | static void |
e315cd28 | 2795 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2796 | { |
2797 | #define LS_UNKNOWN 2 | |
9f8fddee AV |
2798 | static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; |
2799 | char *link_speed; | |
d8b45213 | 2800 | int rval; |
1bb39548 | 2801 | uint16_t mb[4]; |
e315cd28 | 2802 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2803 | |
c76f2c01 | 2804 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2805 | return; |
2806 | ||
c9afb9a2 GM |
2807 | if (atomic_read(&fcport->state) != FCS_ONLINE) |
2808 | return; | |
2809 | ||
39bd9622 AV |
2810 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2811 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2812 | return; |
2813 | ||
e315cd28 | 2814 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2815 | mb); |
d8b45213 | 2816 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2817 | ql_dbg(ql_dbg_disc, vha, 0x2004, |
2818 | "Unable to adjust iIDMA " | |
2819 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x " | |
2820 | "%04x.\n", fcport->port_name[0], fcport->port_name[1], | |
d8b45213 AV |
2821 | fcport->port_name[2], fcport->port_name[3], |
2822 | fcport->port_name[4], fcport->port_name[5], | |
2823 | fcport->port_name[6], fcport->port_name[7], rval, | |
7c3df132 | 2824 | fcport->fp_speed, mb[0], mb[1]); |
d8b45213 | 2825 | } else { |
9f8fddee AV |
2826 | link_speed = link_speeds[LS_UNKNOWN]; |
2827 | if (fcport->fp_speed < 5) | |
2828 | link_speed = link_speeds[fcport->fp_speed]; | |
2829 | else if (fcport->fp_speed == 0x13) | |
2830 | link_speed = link_speeds[5]; | |
7c3df132 SK |
2831 | ql_dbg(ql_dbg_disc, vha, 0x2005, |
2832 | "iIDMA adjusted to %s GB/s " | |
2833 | "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed, | |
2834 | fcport->port_name[0], fcport->port_name[1], | |
2835 | fcport->port_name[2], fcport->port_name[3], | |
2836 | fcport->port_name[4], fcport->port_name[5], | |
2837 | fcport->port_name[6], fcport->port_name[7]); | |
d8b45213 AV |
2838 | } |
2839 | } | |
2840 | ||
23be331d | 2841 | static void |
e315cd28 | 2842 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 | 2843 | { |
2844 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2845 | struct fc_rport *rport; |
044d78e1 | 2846 | unsigned long flags; |
8482e118 | 2847 | |
ac280b67 | 2848 | qla2x00_rport_del(fcport); |
8482e118 | 2849 | |
f8b02a85 AV |
2850 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2851 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 | 2852 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2853 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2854 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2855 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 | 2856 | if (!rport) { |
7c3df132 SK |
2857 | ql_log(ql_log_warn, vha, 0x2006, |
2858 | "Unable to allocate fc remote port.\n"); | |
77d74143 AV |
2859 | return; |
2860 | } | |
044d78e1 | 2861 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
19a7b4ae | 2862 | *((fc_port_t **)rport->dd_data) = fcport; |
044d78e1 | 2863 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
d97994dc | 2864 | |
ad3e0eda | 2865 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2866 | |
8482e118 | 2867 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2868 | if (fcport->port_type == FCT_INITIATOR) | |
2869 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2870 | if (fcport->port_type == FCT_TARGET) | |
2871 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2872 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2873 | } |
2874 | ||
23be331d AB |
2875 | /* |
2876 | * qla2x00_update_fcport | |
2877 | * Updates device on list. | |
2878 | * | |
2879 | * Input: | |
2880 | * ha = adapter block pointer. | |
2881 | * fcport = port structure pointer. | |
2882 | * | |
2883 | * Return: | |
2884 | * 0 - Success | |
2885 | * BIT_0 - error | |
2886 | * | |
2887 | * Context: | |
2888 | * Kernel context. | |
2889 | */ | |
2890 | void | |
e315cd28 | 2891 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2892 | { |
e315cd28 | 2893 | fcport->vha = vha; |
23be331d | 2894 | fcport->login_retry = 0; |
5ff1d584 | 2895 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); |
23be331d | 2896 | |
e315cd28 | 2897 | qla2x00_iidma_fcport(vha, fcport); |
21090cbe | 2898 | qla24xx_update_fcport_fcp_prio(vha, fcport); |
e315cd28 | 2899 | qla2x00_reg_remote_port(vha, fcport); |
ec426e10 | 2900 | qla2x00_set_fcport_state(fcport, FCS_ONLINE); |
23be331d AB |
2901 | } |
2902 | ||
1da177e4 LT |
2903 | /* |
2904 | * qla2x00_configure_fabric | |
2905 | * Setup SNS devices with loop ID's. | |
2906 | * | |
2907 | * Input: | |
2908 | * ha = adapter block pointer. | |
2909 | * | |
2910 | * Returns: | |
2911 | * 0 = success. | |
2912 | * BIT_0 = error | |
2913 | */ | |
2914 | static int | |
e315cd28 | 2915 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 | 2916 | { |
b3b02e6e | 2917 | int rval; |
1da177e4 LT |
2918 | fc_port_t *fcport, *fcptemp; |
2919 | uint16_t next_loopid; | |
2920 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2921 | uint16_t loop_id; |
1da177e4 | 2922 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2923 | struct qla_hw_data *ha = vha->hw; |
2924 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2925 | |
2926 | /* If FL port exists, then SNS is present */ | |
e428924c | 2927 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2928 | loop_id = NPH_F_PORT; |
2929 | else | |
2930 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2931 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 | 2932 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2933 | ql_dbg(ql_dbg_disc, vha, 0x201f, |
2934 | "MBX_GET_PORT_NAME failed, No FL Port.\n"); | |
1da177e4 | 2935 | |
e315cd28 | 2936 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2937 | return (QLA_SUCCESS); |
2938 | } | |
e315cd28 | 2939 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 | 2940 | |
1da177e4 | 2941 | do { |
cca5335c AV |
2942 | /* FDMI support. */ |
2943 | if (ql2xfdmienable && | |
e315cd28 AC |
2944 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2945 | qla2x00_fdmi_register(vha); | |
cca5335c | 2946 | |
1da177e4 | 2947 | /* Ensure we are logged into the SNS. */ |
e428924c | 2948 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2949 | loop_id = NPH_SNS; |
2950 | else | |
2951 | loop_id = SIMPLE_NAME_SERVER; | |
0b91d116 CD |
2952 | rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
2953 | 0xfc, mb, BIT_1|BIT_0); | |
2954 | if (rval != QLA_SUCCESS) { | |
2955 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
2956 | return rval; | |
2957 | } | |
1da177e4 | 2958 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
7c3df132 SK |
2959 | ql_dbg(ql_dbg_disc, vha, 0x2042, |
2960 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " | |
2961 | "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], | |
2962 | mb[2], mb[6], mb[7]); | |
1da177e4 LT |
2963 | return (QLA_SUCCESS); |
2964 | } | |
2965 | ||
e315cd28 AC |
2966 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
2967 | if (qla2x00_rft_id(vha)) { | |
1da177e4 | 2968 | /* EMPTY */ |
7c3df132 SK |
2969 | ql_dbg(ql_dbg_disc, vha, 0x2045, |
2970 | "Register FC-4 TYPE failed.\n"); | |
1da177e4 | 2971 | } |
e315cd28 | 2972 | if (qla2x00_rff_id(vha)) { |
1da177e4 | 2973 | /* EMPTY */ |
7c3df132 SK |
2974 | ql_dbg(ql_dbg_disc, vha, 0x2049, |
2975 | "Register FC-4 Features failed.\n"); | |
1da177e4 | 2976 | } |
e315cd28 | 2977 | if (qla2x00_rnn_id(vha)) { |
1da177e4 | 2978 | /* EMPTY */ |
7c3df132 SK |
2979 | ql_dbg(ql_dbg_disc, vha, 0x204f, |
2980 | "Register Node Name failed.\n"); | |
e315cd28 | 2981 | } else if (qla2x00_rsnn_nn(vha)) { |
1da177e4 | 2982 | /* EMPTY */ |
7c3df132 SK |
2983 | ql_dbg(ql_dbg_disc, vha, 0x2053, |
2984 | "Register Symobilic Node Name failed.\n"); | |
1da177e4 LT |
2985 | } |
2986 | } | |
2987 | ||
b3b02e6e AE |
2988 | #define QLA_FCPORT_SCAN 1 |
2989 | #define QLA_FCPORT_FOUND 2 | |
2990 | ||
2991 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
2992 | fcport->scan_state = QLA_FCPORT_SCAN; | |
2993 | } | |
2994 | ||
e315cd28 | 2995 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
2996 | if (rval != QLA_SUCCESS) |
2997 | break; | |
2998 | ||
2999 | /* | |
3000 | * Logout all previous fabric devices marked lost, except | |
f08b7251 | 3001 | * FCP2 devices. |
1da177e4 | 3002 | */ |
e315cd28 AC |
3003 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3004 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3005 | break; |
3006 | ||
3007 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
3008 | continue; | |
3009 | ||
b3b02e6e AE |
3010 | if (fcport->scan_state == QLA_FCPORT_SCAN && |
3011 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
e315cd28 | 3012 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3013 | ql2xplogiabsentdevice, 0); |
1da177e4 | 3014 | if (fcport->loop_id != FC_NO_LOOP_ID && |
f08b7251 | 3015 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3016 | fcport->port_type != FCT_INITIATOR && |
3017 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3018 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
3019 | fcport->loop_id, |
3020 | fcport->d_id.b.domain, | |
3021 | fcport->d_id.b.area, | |
3022 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3023 | fcport->loop_id = FC_NO_LOOP_ID; |
3024 | } | |
3025 | } | |
3026 | } | |
3027 | ||
3028 | /* Starting free loop ID. */ | |
e315cd28 | 3029 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
3030 | |
3031 | /* | |
3032 | * Scan through our port list and login entries that need to be | |
3033 | * logged in. | |
3034 | */ | |
e315cd28 AC |
3035 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3036 | if (atomic_read(&vha->loop_down_timer) || | |
3037 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3038 | break; |
3039 | ||
3040 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
3041 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
3042 | continue; | |
3043 | ||
3044 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
3045 | fcport->loop_id = next_loopid; | |
d4486fd6 | 3046 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 3047 | base_vha, fcport); |
1da177e4 LT |
3048 | if (rval != QLA_SUCCESS) { |
3049 | /* Ran out of IDs to use */ | |
3050 | break; | |
3051 | } | |
3052 | } | |
1da177e4 | 3053 | /* Login and update database */ |
e315cd28 | 3054 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
3055 | } |
3056 | ||
3057 | /* Exit if out of loop IDs. */ | |
3058 | if (rval != QLA_SUCCESS) { | |
3059 | break; | |
3060 | } | |
3061 | ||
3062 | /* | |
3063 | * Login and add the new devices to our port list. | |
3064 | */ | |
3065 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
3066 | if (atomic_read(&vha->loop_down_timer) || |
3067 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3068 | break; |
3069 | ||
3070 | /* Find a new loop ID to use. */ | |
3071 | fcport->loop_id = next_loopid; | |
e315cd28 | 3072 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
3073 | if (rval != QLA_SUCCESS) { |
3074 | /* Ran out of IDs to use */ | |
3075 | break; | |
3076 | } | |
3077 | ||
bdf79621 | 3078 | /* Login and update database */ |
e315cd28 AC |
3079 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
3080 | ||
e315cd28 | 3081 | list_move_tail(&fcport->list, &vha->vp_fcports); |
1da177e4 LT |
3082 | } |
3083 | } while (0); | |
3084 | ||
3085 | /* Free all new device structures not processed. */ | |
3086 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
3087 | list_del(&fcport->list); | |
3088 | kfree(fcport); | |
3089 | } | |
3090 | ||
3091 | if (rval) { | |
7c3df132 SK |
3092 | ql_dbg(ql_dbg_disc, vha, 0x2068, |
3093 | "Configure fabric error exit rval=%d.\n", rval); | |
1da177e4 LT |
3094 | } |
3095 | ||
3096 | return (rval); | |
3097 | } | |
3098 | ||
1da177e4 LT |
3099 | /* |
3100 | * qla2x00_find_all_fabric_devs | |
3101 | * | |
3102 | * Input: | |
3103 | * ha = adapter block pointer. | |
3104 | * dev = database device entry pointer. | |
3105 | * | |
3106 | * Returns: | |
3107 | * 0 = success. | |
3108 | * | |
3109 | * Context: | |
3110 | * Kernel context. | |
3111 | */ | |
3112 | static int | |
e315cd28 AC |
3113 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
3114 | struct list_head *new_fcports) | |
1da177e4 LT |
3115 | { |
3116 | int rval; | |
3117 | uint16_t loop_id; | |
3118 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
3119 | int found; | |
3120 | ||
3121 | sw_info_t *swl; | |
3122 | int swl_idx; | |
3123 | int first_dev, last_dev; | |
1516ef44 | 3124 | port_id_t wrap = {}, nxt_d_id; |
e315cd28 AC |
3125 | struct qla_hw_data *ha = vha->hw; |
3126 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 3127 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3128 | |
3129 | rval = QLA_SUCCESS; | |
3130 | ||
3131 | /* Try GID_PT to get device list, else GAN. */ | |
7a67735b | 3132 | if (!ha->swl) |
642ef983 | 3133 | ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), |
7a67735b AV |
3134 | GFP_KERNEL); |
3135 | swl = ha->swl; | |
bbfbbbc1 | 3136 | if (!swl) { |
1da177e4 | 3137 | /*EMPTY*/ |
7c3df132 SK |
3138 | ql_dbg(ql_dbg_disc, vha, 0x2054, |
3139 | "GID_PT allocations failed, fallback on GA_NXT.\n"); | |
1da177e4 | 3140 | } else { |
642ef983 | 3141 | memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); |
e315cd28 | 3142 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 3143 | swl = NULL; |
e315cd28 | 3144 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 3145 | swl = NULL; |
e315cd28 | 3146 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 3147 | swl = NULL; |
e5896bd5 | 3148 | } else if (ql2xiidmaenable && |
e315cd28 AC |
3149 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
3150 | qla2x00_gpsc(vha, swl); | |
1da177e4 | 3151 | } |
e8c72ba5 CD |
3152 | |
3153 | /* If other queries succeeded probe for FC-4 type */ | |
3154 | if (swl) | |
3155 | qla2x00_gff_id(vha, swl); | |
1da177e4 LT |
3156 | } |
3157 | swl_idx = 0; | |
3158 | ||
3159 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 3160 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3161 | if (new_fcport == NULL) { |
7c3df132 SK |
3162 | ql_log(ql_log_warn, vha, 0x205e, |
3163 | "Failed to allocate memory for fcport.\n"); | |
1da177e4 LT |
3164 | return (QLA_MEMORY_ALLOC_FAILED); |
3165 | } | |
3166 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3167 | /* Set start port ID scan at adapter ID. */ |
3168 | first_dev = 1; | |
3169 | last_dev = 0; | |
3170 | ||
3171 | /* Starting free loop ID. */ | |
e315cd28 AC |
3172 | loop_id = ha->min_external_loopid; |
3173 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
3174 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
3175 | continue; |
3176 | ||
3a6478df GM |
3177 | if (ha->current_topology == ISP_CFG_FL && |
3178 | (atomic_read(&vha->loop_down_timer) || | |
3179 | LOOP_TRANSITION(vha))) { | |
bb2d52b2 AV |
3180 | atomic_set(&vha->loop_down_timer, 0); |
3181 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
3182 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 3183 | break; |
bb2d52b2 | 3184 | } |
1da177e4 LT |
3185 | |
3186 | if (swl != NULL) { | |
3187 | if (last_dev) { | |
3188 | wrap.b24 = new_fcport->d_id.b24; | |
3189 | } else { | |
3190 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
3191 | memcpy(new_fcport->node_name, | |
3192 | swl[swl_idx].node_name, WWN_SIZE); | |
3193 | memcpy(new_fcport->port_name, | |
3194 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
3195 | memcpy(new_fcport->fabric_port_name, |
3196 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
3197 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
e8c72ba5 | 3198 | new_fcport->fc4_type = swl[swl_idx].fc4_type; |
1da177e4 LT |
3199 | |
3200 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
3201 | last_dev = 1; | |
3202 | } | |
3203 | swl_idx++; | |
3204 | } | |
3205 | } else { | |
3206 | /* Send GA_NXT to the switch */ | |
e315cd28 | 3207 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 | 3208 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3209 | ql_log(ql_log_warn, vha, 0x2064, |
3210 | "SNS scan failed -- assuming " | |
3211 | "zero-entry result.\n"); | |
1da177e4 LT |
3212 | list_for_each_entry_safe(fcport, fcptemp, |
3213 | new_fcports, list) { | |
3214 | list_del(&fcport->list); | |
3215 | kfree(fcport); | |
3216 | } | |
3217 | rval = QLA_SUCCESS; | |
3218 | break; | |
3219 | } | |
3220 | } | |
3221 | ||
3222 | /* If wrap on switch device list, exit. */ | |
3223 | if (first_dev) { | |
3224 | wrap.b24 = new_fcport->d_id.b24; | |
3225 | first_dev = 0; | |
3226 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
7c3df132 SK |
3227 | ql_dbg(ql_dbg_disc, vha, 0x2065, |
3228 | "Device wrap (%02x%02x%02x).\n", | |
3229 | new_fcport->d_id.b.domain, | |
3230 | new_fcport->d_id.b.area, | |
3231 | new_fcport->d_id.b.al_pa); | |
1da177e4 LT |
3232 | break; |
3233 | } | |
3234 | ||
2c3dfe3f | 3235 | /* Bypass if same physical adapter. */ |
e315cd28 | 3236 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
3237 | continue; |
3238 | ||
2c3dfe3f | 3239 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
3240 | found = 0; |
3241 | if (ha->num_vhosts) { | |
feafb7b1 AE |
3242 | unsigned long flags; |
3243 | ||
3244 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3245 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3246 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
3247 | found = 1; | |
2c3dfe3f | 3248 | break; |
e315cd28 | 3249 | } |
2c3dfe3f | 3250 | } |
feafb7b1 AE |
3251 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
3252 | ||
e315cd28 | 3253 | if (found) |
2c3dfe3f SJ |
3254 | continue; |
3255 | } | |
3256 | ||
f7d289f6 AV |
3257 | /* Bypass if same domain and area of adapter. */ |
3258 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 3259 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
3260 | ISP_CFG_FL) |
3261 | continue; | |
3262 | ||
1da177e4 LT |
3263 | /* Bypass reserved domain fields. */ |
3264 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
3265 | continue; | |
3266 | ||
e8c72ba5 | 3267 | /* Bypass ports whose FCP-4 type is not FCP_SCSI */ |
4da26e16 CD |
3268 | if (ql2xgffidenable && |
3269 | (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && | |
3270 | new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) | |
e8c72ba5 CD |
3271 | continue; |
3272 | ||
1da177e4 LT |
3273 | /* Locate matching device in database. */ |
3274 | found = 0; | |
e315cd28 | 3275 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3276 | if (memcmp(new_fcport->port_name, fcport->port_name, |
3277 | WWN_SIZE)) | |
3278 | continue; | |
3279 | ||
b3b02e6e AE |
3280 | fcport->scan_state = QLA_FCPORT_FOUND; |
3281 | ||
1da177e4 LT |
3282 | found++; |
3283 | ||
d8b45213 AV |
3284 | /* Update port state. */ |
3285 | memcpy(fcport->fabric_port_name, | |
3286 | new_fcport->fabric_port_name, WWN_SIZE); | |
3287 | fcport->fp_speed = new_fcport->fp_speed; | |
3288 | ||
1da177e4 LT |
3289 | /* |
3290 | * If address the same and state FCS_ONLINE, nothing | |
3291 | * changed. | |
3292 | */ | |
3293 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
3294 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
3295 | break; | |
3296 | } | |
3297 | ||
3298 | /* | |
3299 | * If device was not a fabric device before. | |
3300 | */ | |
3301 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
3302 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3303 | fcport->loop_id = FC_NO_LOOP_ID; | |
3304 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
3305 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3306 | break; |
3307 | } | |
3308 | ||
3309 | /* | |
3310 | * Port ID changed or device was marked to be updated; | |
3311 | * Log it out if still logged in and mark it for | |
3312 | * relogin later. | |
3313 | */ | |
3314 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3315 | fcport->flags |= FCF_LOGIN_NEEDED; | |
3316 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
f08b7251 | 3317 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
0eba25df | 3318 | (fcport->flags & FCF_ASYNC_SENT) == 0 && |
1da177e4 LT |
3319 | fcport->port_type != FCT_INITIATOR && |
3320 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3321 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3322 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3323 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3324 | fcport->loop_id = FC_NO_LOOP_ID; |
3325 | } | |
3326 | ||
3327 | break; | |
3328 | } | |
3329 | ||
3330 | if (found) | |
3331 | continue; | |
1da177e4 LT |
3332 | /* If device was not in our fcports list, then add it. */ |
3333 | list_add_tail(&new_fcport->list, new_fcports); | |
3334 | ||
3335 | /* Allocate a new replacement fcport. */ | |
3336 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 3337 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3338 | if (new_fcport == NULL) { |
7c3df132 SK |
3339 | ql_log(ql_log_warn, vha, 0x2066, |
3340 | "Memory allocation failed for fcport.\n"); | |
1da177e4 LT |
3341 | return (QLA_MEMORY_ALLOC_FAILED); |
3342 | } | |
3343 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
3344 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
3345 | } | |
3346 | ||
c9475cb0 | 3347 | kfree(new_fcport); |
1da177e4 | 3348 | |
1da177e4 LT |
3349 | return (rval); |
3350 | } | |
3351 | ||
3352 | /* | |
3353 | * qla2x00_find_new_loop_id | |
3354 | * Scan through our port list and find a new usable loop ID. | |
3355 | * | |
3356 | * Input: | |
3357 | * ha: adapter state pointer. | |
3358 | * dev: port structure pointer. | |
3359 | * | |
3360 | * Returns: | |
3361 | * qla2x00 local function return status code. | |
3362 | * | |
3363 | * Context: | |
3364 | * Kernel context. | |
3365 | */ | |
03bcfb57 | 3366 | int |
e315cd28 | 3367 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
3368 | { |
3369 | int rval; | |
3370 | int found; | |
3371 | fc_port_t *fcport; | |
3372 | uint16_t first_loop_id; | |
e315cd28 AC |
3373 | struct qla_hw_data *ha = vha->hw; |
3374 | struct scsi_qla_host *vp; | |
ee546b6e | 3375 | struct scsi_qla_host *tvp; |
feafb7b1 | 3376 | unsigned long flags = 0; |
1da177e4 LT |
3377 | |
3378 | rval = QLA_SUCCESS; | |
3379 | ||
3380 | /* Save starting loop ID. */ | |
3381 | first_loop_id = dev->loop_id; | |
3382 | ||
3383 | for (;;) { | |
3384 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 3385 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 3386 | dev->loop_id++; |
1da177e4 LT |
3387 | |
3388 | /* Skip reserved loop IDs. */ | |
e315cd28 | 3389 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 3390 | dev->loop_id++; |
1da177e4 LT |
3391 | |
3392 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 3393 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
3394 | /* first loop ID. */ |
3395 | dev->loop_id = ha->min_external_loopid; | |
3396 | } | |
3397 | ||
3398 | /* Check for loop ID being already in use. */ | |
3399 | found = 0; | |
3400 | fcport = NULL; | |
feafb7b1 AE |
3401 | |
3402 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3403 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3404 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
3405 | if (fcport->loop_id == dev->loop_id && | |
3406 | fcport != dev) { | |
3407 | /* ID possibly in use */ | |
3408 | found++; | |
3409 | break; | |
3410 | } | |
1da177e4 | 3411 | } |
e315cd28 AC |
3412 | if (found) |
3413 | break; | |
1da177e4 | 3414 | } |
feafb7b1 | 3415 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
1da177e4 LT |
3416 | |
3417 | /* If not in use then it is free to use. */ | |
3418 | if (!found) { | |
557cf785 AE |
3419 | ql_dbg(ql_dbg_disc, dev->vha, 0x2086, |
3420 | "Assigning new loopid=%x, portid=%x.\n", | |
3421 | dev->loop_id, dev->d_id.b24); | |
1da177e4 LT |
3422 | break; |
3423 | } | |
3424 | ||
3425 | /* ID in use. Try next value. */ | |
3426 | dev->loop_id++; | |
3427 | ||
3428 | /* If wrap around. No free ID to use. */ | |
3429 | if (dev->loop_id == first_loop_id) { | |
3430 | dev->loop_id = FC_NO_LOOP_ID; | |
3431 | rval = QLA_FUNCTION_FAILED; | |
3432 | break; | |
3433 | } | |
3434 | } | |
3435 | ||
3436 | return (rval); | |
3437 | } | |
3438 | ||
1da177e4 LT |
3439 | /* |
3440 | * qla2x00_fabric_dev_login | |
3441 | * Login fabric target device and update FC port database. | |
3442 | * | |
3443 | * Input: | |
3444 | * ha: adapter state pointer. | |
3445 | * fcport: port structure list pointer. | |
3446 | * next_loopid: contains value of a new loop ID that can be used | |
3447 | * by the next login attempt. | |
3448 | * | |
3449 | * Returns: | |
3450 | * qla2x00 local function return status code. | |
3451 | * | |
3452 | * Context: | |
3453 | * Kernel context. | |
3454 | */ | |
3455 | static int | |
e315cd28 | 3456 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3457 | uint16_t *next_loopid) |
3458 | { | |
3459 | int rval; | |
3460 | int retry; | |
0107109e | 3461 | uint8_t opts; |
e315cd28 | 3462 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3463 | |
3464 | rval = QLA_SUCCESS; | |
3465 | retry = 0; | |
3466 | ||
ac280b67 | 3467 | if (IS_ALOGIO_CAPABLE(ha)) { |
5ff1d584 AV |
3468 | if (fcport->flags & FCF_ASYNC_SENT) |
3469 | return rval; | |
3470 | fcport->flags |= FCF_ASYNC_SENT; | |
ac280b67 AV |
3471 | rval = qla2x00_post_async_login_work(vha, fcport, NULL); |
3472 | if (!rval) | |
3473 | return rval; | |
3474 | } | |
3475 | ||
5ff1d584 | 3476 | fcport->flags &= ~FCF_ASYNC_SENT; |
e315cd28 | 3477 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3478 | if (rval == QLA_SUCCESS) { |
f08b7251 | 3479 | /* Send an ADISC to FCP2 devices.*/ |
0107109e | 3480 | opts = 0; |
f08b7251 | 3481 | if (fcport->flags & FCF_FCP2_DEVICE) |
0107109e | 3482 | opts |= BIT_1; |
e315cd28 | 3483 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3484 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3485 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3486 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3487 | fcport->d_id.b.al_pa); | |
e315cd28 | 3488 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3489 | } else { |
e315cd28 | 3490 | qla2x00_update_fcport(vha, fcport); |
1da177e4 | 3491 | } |
0b91d116 CD |
3492 | } else { |
3493 | /* Retry Login. */ | |
3494 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
1da177e4 LT |
3495 | } |
3496 | ||
3497 | return (rval); | |
3498 | } | |
3499 | ||
3500 | /* | |
3501 | * qla2x00_fabric_login | |
3502 | * Issue fabric login command. | |
3503 | * | |
3504 | * Input: | |
3505 | * ha = adapter block pointer. | |
3506 | * device = pointer to FC device type structure. | |
3507 | * | |
3508 | * Returns: | |
3509 | * 0 - Login successfully | |
3510 | * 1 - Login failed | |
3511 | * 2 - Initiator device | |
3512 | * 3 - Fatal error | |
3513 | */ | |
3514 | int | |
e315cd28 | 3515 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3516 | uint16_t *next_loopid) |
3517 | { | |
3518 | int rval; | |
3519 | int retry; | |
3520 | uint16_t tmp_loopid; | |
3521 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3522 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3523 | |
3524 | retry = 0; | |
3525 | tmp_loopid = 0; | |
3526 | ||
3527 | for (;;) { | |
7c3df132 SK |
3528 | ql_dbg(ql_dbg_disc, vha, 0x2000, |
3529 | "Trying Fabric Login w/loop id 0x%04x for port " | |
3530 | "%02x%02x%02x.\n", | |
3531 | fcport->loop_id, fcport->d_id.b.domain, | |
3532 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
1da177e4 LT |
3533 | |
3534 | /* Login fcport on switch. */ | |
0b91d116 | 3535 | rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3536 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3537 | fcport->d_id.b.al_pa, mb, BIT_0); | |
0b91d116 CD |
3538 | if (rval != QLA_SUCCESS) { |
3539 | return rval; | |
3540 | } | |
1da177e4 LT |
3541 | if (mb[0] == MBS_PORT_ID_USED) { |
3542 | /* | |
3543 | * Device has another loop ID. The firmware team | |
0107109e AV |
3544 | * recommends the driver perform an implicit login with |
3545 | * the specified ID again. The ID we just used is save | |
3546 | * here so we return with an ID that can be tried by | |
3547 | * the next login. | |
1da177e4 LT |
3548 | */ |
3549 | retry++; | |
3550 | tmp_loopid = fcport->loop_id; | |
3551 | fcport->loop_id = mb[1]; | |
3552 | ||
7c3df132 SK |
3553 | ql_dbg(ql_dbg_disc, vha, 0x2001, |
3554 | "Fabric Login: port in use - next loop " | |
3555 | "id=0x%04x, port id= %02x%02x%02x.\n", | |
1da177e4 | 3556 | fcport->loop_id, fcport->d_id.b.domain, |
7c3df132 | 3557 | fcport->d_id.b.area, fcport->d_id.b.al_pa); |
1da177e4 LT |
3558 | |
3559 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3560 | /* | |
3561 | * Login succeeded. | |
3562 | */ | |
3563 | if (retry) { | |
3564 | /* A retry occurred before. */ | |
3565 | *next_loopid = tmp_loopid; | |
3566 | } else { | |
3567 | /* | |
3568 | * No retry occurred before. Just increment the | |
3569 | * ID value for next login. | |
3570 | */ | |
3571 | *next_loopid = (fcport->loop_id + 1); | |
3572 | } | |
3573 | ||
3574 | if (mb[1] & BIT_0) { | |
3575 | fcport->port_type = FCT_INITIATOR; | |
3576 | } else { | |
3577 | fcport->port_type = FCT_TARGET; | |
3578 | if (mb[1] & BIT_1) { | |
8474f3a0 | 3579 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
3580 | } |
3581 | } | |
3582 | ||
ad3e0eda AV |
3583 | if (mb[10] & BIT_0) |
3584 | fcport->supported_classes |= FC_COS_CLASS2; | |
3585 | if (mb[10] & BIT_1) | |
3586 | fcport->supported_classes |= FC_COS_CLASS3; | |
3587 | ||
1da177e4 LT |
3588 | rval = QLA_SUCCESS; |
3589 | break; | |
3590 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3591 | /* | |
3592 | * Loop ID already used, try next loop ID. | |
3593 | */ | |
3594 | fcport->loop_id++; | |
e315cd28 | 3595 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3596 | if (rval != QLA_SUCCESS) { |
3597 | /* Ran out of loop IDs to use */ | |
3598 | break; | |
3599 | } | |
3600 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3601 | /* | |
3602 | * Firmware possibly timed out during login. If NO | |
3603 | * retries are left to do then the device is declared | |
3604 | * dead. | |
3605 | */ | |
3606 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3607 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3608 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3609 | fcport->d_id.b.al_pa); | |
e315cd28 | 3610 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3611 | |
3612 | rval = 1; | |
3613 | break; | |
3614 | } else { | |
3615 | /* | |
3616 | * unrecoverable / not handled error | |
3617 | */ | |
7c3df132 SK |
3618 | ql_dbg(ql_dbg_disc, vha, 0x2002, |
3619 | "Failed=%x port_id=%02x%02x%02x loop_id=%x " | |
3620 | "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, | |
3621 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
3622 | fcport->loop_id, jiffies); | |
1da177e4 LT |
3623 | |
3624 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3625 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3626 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3627 | fcport->d_id.b.al_pa); | |
1da177e4 | 3628 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3629 | fcport->login_retry = 0; |
1da177e4 LT |
3630 | |
3631 | rval = 3; | |
3632 | break; | |
3633 | } | |
3634 | } | |
3635 | ||
3636 | return (rval); | |
3637 | } | |
3638 | ||
3639 | /* | |
3640 | * qla2x00_local_device_login | |
3641 | * Issue local device login command. | |
3642 | * | |
3643 | * Input: | |
3644 | * ha = adapter block pointer. | |
3645 | * loop_id = loop id of device to login to. | |
3646 | * | |
3647 | * Returns (Where's the #define!!!!): | |
3648 | * 0 - Login successfully | |
3649 | * 1 - Login failed | |
3650 | * 3 - Fatal error | |
3651 | */ | |
3652 | int | |
e315cd28 | 3653 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3654 | { |
3655 | int rval; | |
3656 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3657 | ||
3658 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3659 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3660 | if (rval == QLA_SUCCESS) { |
3661 | /* Interrogate mailbox registers for any errors */ | |
3662 | if (mb[0] == MBS_COMMAND_ERROR) | |
3663 | rval = 1; | |
3664 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3665 | /* device not in PCB table */ | |
3666 | rval = 3; | |
3667 | } | |
3668 | ||
3669 | return (rval); | |
3670 | } | |
3671 | ||
3672 | /* | |
3673 | * qla2x00_loop_resync | |
3674 | * Resync with fibre channel devices. | |
3675 | * | |
3676 | * Input: | |
3677 | * ha = adapter block pointer. | |
3678 | * | |
3679 | * Returns: | |
3680 | * 0 = success | |
3681 | */ | |
3682 | int | |
e315cd28 | 3683 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3684 | { |
73208dfd | 3685 | int rval = QLA_SUCCESS; |
1da177e4 | 3686 | uint32_t wait_time; |
67c2e93a AC |
3687 | struct req_que *req; |
3688 | struct rsp_que *rsp; | |
3689 | ||
7163ea81 | 3690 | if (vha->hw->flags.cpu_affinity_enabled) |
67c2e93a AC |
3691 | req = vha->hw->req_q_map[0]; |
3692 | else | |
3693 | req = vha->req; | |
3694 | rsp = req->rsp; | |
1da177e4 | 3695 | |
e315cd28 AC |
3696 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
3697 | if (vha->flags.online) { | |
3698 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3699 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3700 | wait_time = 256; | |
3701 | do { | |
0107109e | 3702 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3703 | qla2x00_marker(vha, req, rsp, 0, 0, |
3704 | MK_SYNC_ALL); | |
e315cd28 | 3705 | vha->marker_needed = 0; |
1da177e4 LT |
3706 | |
3707 | /* Remap devices on Loop. */ | |
e315cd28 | 3708 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3709 | |
e315cd28 | 3710 | qla2x00_configure_loop(vha); |
1da177e4 | 3711 | wait_time--; |
e315cd28 AC |
3712 | } while (!atomic_read(&vha->loop_down_timer) && |
3713 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3714 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3715 | &vha->dpc_flags))); | |
1da177e4 | 3716 | } |
1da177e4 LT |
3717 | } |
3718 | ||
e315cd28 | 3719 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3720 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3721 | |
e315cd28 | 3722 | if (rval) |
7c3df132 SK |
3723 | ql_dbg(ql_dbg_disc, vha, 0x206c, |
3724 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 LT |
3725 | |
3726 | return (rval); | |
3727 | } | |
3728 | ||
579d12b5 SK |
3729 | /* |
3730 | * qla2x00_perform_loop_resync | |
3731 | * Description: This function will set the appropriate flags and call | |
3732 | * qla2x00_loop_resync. If successful loop will be resynced | |
3733 | * Arguments : scsi_qla_host_t pointer | |
3734 | * returm : Success or Failure | |
3735 | */ | |
3736 | ||
3737 | int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) | |
3738 | { | |
3739 | int32_t rval = 0; | |
3740 | ||
3741 | if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { | |
3742 | /*Configure the flags so that resync happens properly*/ | |
3743 | atomic_set(&ha->loop_down_timer, 0); | |
3744 | if (!(ha->device_flags & DFLG_NO_CABLE)) { | |
3745 | atomic_set(&ha->loop_state, LOOP_UP); | |
3746 | set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); | |
3747 | set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); | |
3748 | set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); | |
3749 | ||
3750 | rval = qla2x00_loop_resync(ha); | |
3751 | } else | |
3752 | atomic_set(&ha->loop_state, LOOP_DEAD); | |
3753 | ||
3754 | clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); | |
3755 | } | |
3756 | ||
3757 | return rval; | |
3758 | } | |
3759 | ||
d97994dc | 3760 | void |
67becc00 | 3761 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc | 3762 | { |
3763 | fc_port_t *fcport; | |
feafb7b1 AE |
3764 | struct scsi_qla_host *vha; |
3765 | struct qla_hw_data *ha = base_vha->hw; | |
3766 | unsigned long flags; | |
d97994dc | 3767 | |
feafb7b1 | 3768 | spin_lock_irqsave(&ha->vport_slock, flags); |
d97994dc | 3769 | /* Go with deferred removal of rport references. */ |
feafb7b1 AE |
3770 | list_for_each_entry(vha, &base_vha->hw->vp_list, list) { |
3771 | atomic_inc(&vha->vref_count); | |
3772 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
8ae598d0 | 3773 | if (fcport->drport && |
feafb7b1 AE |
3774 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) { |
3775 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3776 | ||
67becc00 | 3777 | qla2x00_rport_del(fcport); |
feafb7b1 AE |
3778 | |
3779 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3780 | } | |
3781 | } | |
3782 | atomic_dec(&vha->vref_count); | |
3783 | } | |
3784 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
d97994dc | 3785 | } |
3786 | ||
579d12b5 SK |
3787 | /* |
3788 | * qla82xx_quiescent_state_cleanup | |
3789 | * Description: This function will block the new I/Os | |
3790 | * Its not aborting any I/Os as context | |
3791 | * is not destroyed during quiescence | |
3792 | * Arguments: scsi_qla_host_t | |
3793 | * return : void | |
3794 | */ | |
3795 | void | |
3796 | qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha) | |
3797 | { | |
3798 | struct qla_hw_data *ha = vha->hw; | |
3799 | struct scsi_qla_host *vp; | |
3800 | ||
7c3df132 SK |
3801 | ql_dbg(ql_dbg_p3p, vha, 0xb002, |
3802 | "Performing ISP error recovery - ha=%p.\n", ha); | |
579d12b5 SK |
3803 | |
3804 | atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); | |
3805 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3806 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3807 | qla2x00_mark_all_devices_lost(vha, 0); | |
3808 | list_for_each_entry(vp, &ha->vp_list, list) | |
3809 | qla2x00_mark_all_devices_lost(vha, 0); | |
3810 | } else { | |
3811 | if (!atomic_read(&vha->loop_down_timer)) | |
3812 | atomic_set(&vha->loop_down_timer, | |
3813 | LOOP_DOWN_TIME); | |
3814 | } | |
3815 | /* Wait for pending cmds to complete */ | |
3816 | qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); | |
3817 | } | |
3818 | ||
a9083016 GM |
3819 | void |
3820 | qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) | |
3821 | { | |
3822 | struct qla_hw_data *ha = vha->hw; | |
579d12b5 | 3823 | struct scsi_qla_host *vp; |
feafb7b1 | 3824 | unsigned long flags; |
6aef87be | 3825 | fc_port_t *fcport; |
a9083016 | 3826 | |
e46ef004 SK |
3827 | /* For ISP82XX, driver waits for completion of the commands. |
3828 | * online flag should be set. | |
3829 | */ | |
3830 | if (!IS_QLA82XX(ha)) | |
3831 | vha->flags.online = 0; | |
a9083016 GM |
3832 | ha->flags.chip_reset_done = 0; |
3833 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2be21fa2 | 3834 | vha->qla_stats.total_isp_aborts++; |
a9083016 | 3835 | |
7c3df132 SK |
3836 | ql_log(ql_log_info, vha, 0x00af, |
3837 | "Performing ISP error recovery - ha=%p.\n", ha); | |
a9083016 | 3838 | |
e46ef004 SK |
3839 | /* For ISP82XX, reset_chip is just disabling interrupts. |
3840 | * Driver waits for the completion of the commands. | |
3841 | * the interrupts need to be enabled. | |
3842 | */ | |
a9083016 GM |
3843 | if (!IS_QLA82XX(ha)) |
3844 | ha->isp_ops->reset_chip(vha); | |
3845 | ||
3846 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3847 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3848 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3849 | qla2x00_mark_all_devices_lost(vha, 0); | |
feafb7b1 AE |
3850 | |
3851 | spin_lock_irqsave(&ha->vport_slock, flags); | |
579d12b5 | 3852 | list_for_each_entry(vp, &ha->vp_list, list) { |
feafb7b1 AE |
3853 | atomic_inc(&vp->vref_count); |
3854 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3855 | ||
a9083016 | 3856 | qla2x00_mark_all_devices_lost(vp, 0); |
feafb7b1 AE |
3857 | |
3858 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3859 | atomic_dec(&vp->vref_count); | |
3860 | } | |
3861 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
a9083016 GM |
3862 | } else { |
3863 | if (!atomic_read(&vha->loop_down_timer)) | |
3864 | atomic_set(&vha->loop_down_timer, | |
3865 | LOOP_DOWN_TIME); | |
3866 | } | |
3867 | ||
6aef87be AV |
3868 | /* Clear all async request states across all VPs. */ |
3869 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
3870 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
3871 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3872 | list_for_each_entry(vp, &ha->vp_list, list) { | |
3873 | atomic_inc(&vp->vref_count); | |
3874 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3875 | ||
3876 | list_for_each_entry(fcport, &vp->vp_fcports, list) | |
3877 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
3878 | ||
3879 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3880 | atomic_dec(&vp->vref_count); | |
3881 | } | |
3882 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3883 | ||
bddd2d65 LC |
3884 | if (!ha->flags.eeh_busy) { |
3885 | /* Make sure for ISP 82XX IO DMA is complete */ | |
3886 | if (IS_QLA82XX(ha)) { | |
7190575f | 3887 | qla82xx_chip_reset_cleanup(vha); |
7c3df132 SK |
3888 | ql_log(ql_log_info, vha, 0x00b4, |
3889 | "Done chip reset cleanup.\n"); | |
a9083016 | 3890 | |
e46ef004 SK |
3891 | /* Done waiting for pending commands. |
3892 | * Reset the online flag. | |
3893 | */ | |
3894 | vha->flags.online = 0; | |
4d78c973 | 3895 | } |
a9083016 | 3896 | |
bddd2d65 LC |
3897 | /* Requeue all commands in outstanding command list. */ |
3898 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); | |
3899 | } | |
a9083016 GM |
3900 | } |
3901 | ||
1da177e4 LT |
3902 | /* |
3903 | * qla2x00_abort_isp | |
3904 | * Resets ISP and aborts all outstanding commands. | |
3905 | * | |
3906 | * Input: | |
3907 | * ha = adapter block pointer. | |
3908 | * | |
3909 | * Returns: | |
3910 | * 0 = success | |
3911 | */ | |
3912 | int | |
e315cd28 | 3913 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3914 | { |
476e8978 | 3915 | int rval; |
1da177e4 | 3916 | uint8_t status = 0; |
e315cd28 AC |
3917 | struct qla_hw_data *ha = vha->hw; |
3918 | struct scsi_qla_host *vp; | |
73208dfd | 3919 | struct req_que *req = ha->req_q_map[0]; |
feafb7b1 | 3920 | unsigned long flags; |
1da177e4 | 3921 | |
e315cd28 | 3922 | if (vha->flags.online) { |
a9083016 | 3923 | qla2x00_abort_isp_cleanup(vha); |
1da177e4 | 3924 | |
85880801 AV |
3925 | if (unlikely(pci_channel_offline(ha->pdev) && |
3926 | ha->flags.pci_channel_io_perm_failure)) { | |
3927 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3928 | status = 0; | |
3929 | return status; | |
3930 | } | |
3931 | ||
73208dfd | 3932 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3933 | |
e315cd28 | 3934 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3935 | |
e315cd28 AC |
3936 | if (!qla2x00_restart_isp(vha)) { |
3937 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3938 | |
e315cd28 | 3939 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3940 | /* |
3941 | * Issue marker command only when we are going | |
3942 | * to start the I/O . | |
3943 | */ | |
e315cd28 | 3944 | vha->marker_needed = 1; |
1da177e4 LT |
3945 | } |
3946 | ||
e315cd28 | 3947 | vha->flags.online = 1; |
1da177e4 | 3948 | |
fd34f556 | 3949 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3950 | |
fa2a1ce5 | 3951 | ha->isp_abort_cnt = 0; |
e315cd28 | 3952 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3953 | |
6246b8a1 GM |
3954 | if (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
3955 | qla2x00_get_fw_version(vha); | |
df613b96 AV |
3956 | if (ha->fce) { |
3957 | ha->flags.fce_enabled = 1; | |
3958 | memset(ha->fce, 0, | |
3959 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3960 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3961 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3962 | &ha->fce_bufs); | |
3963 | if (rval) { | |
7c3df132 | 3964 | ql_log(ql_log_warn, vha, 0x8033, |
df613b96 AV |
3965 | "Unable to reinitialize FCE " |
3966 | "(%d).\n", rval); | |
3967 | ha->flags.fce_enabled = 0; | |
3968 | } | |
3969 | } | |
436a7b11 AV |
3970 | |
3971 | if (ha->eft) { | |
3972 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3973 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3974 | ha->eft_dma, EFT_NUM_BUFFERS); |
3975 | if (rval) { | |
7c3df132 | 3976 | ql_log(ql_log_warn, vha, 0x8034, |
436a7b11 AV |
3977 | "Unable to reinitialize EFT " |
3978 | "(%d).\n", rval); | |
3979 | } | |
3980 | } | |
1da177e4 | 3981 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3982 | vha->flags.online = 1; |
3983 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 | 3984 | if (ha->isp_abort_cnt == 0) { |
7c3df132 SK |
3985 | ql_log(ql_log_fatal, vha, 0x8035, |
3986 | "ISP error recover failed - " | |
3987 | "board disabled.\n"); | |
fa2a1ce5 | 3988 | /* |
1da177e4 LT |
3989 | * The next call disables the board |
3990 | * completely. | |
3991 | */ | |
e315cd28 AC |
3992 | ha->isp_ops->reset_adapter(vha); |
3993 | vha->flags.online = 0; | |
1da177e4 | 3994 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3995 | &vha->dpc_flags); |
1da177e4 LT |
3996 | status = 0; |
3997 | } else { /* schedule another ISP abort */ | |
3998 | ha->isp_abort_cnt--; | |
7c3df132 SK |
3999 | ql_dbg(ql_dbg_taskm, vha, 0x8020, |
4000 | "ISP abort - retry remaining %d.\n", | |
4001 | ha->isp_abort_cnt); | |
1da177e4 LT |
4002 | status = 1; |
4003 | } | |
4004 | } else { | |
4005 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
7c3df132 SK |
4006 | ql_dbg(ql_dbg_taskm, vha, 0x8021, |
4007 | "ISP error recovery - retrying (%d) " | |
4008 | "more times.\n", ha->isp_abort_cnt); | |
e315cd28 | 4009 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
1da177e4 LT |
4010 | status = 1; |
4011 | } | |
4012 | } | |
fa2a1ce5 | 4013 | |
1da177e4 LT |
4014 | } |
4015 | ||
e315cd28 | 4016 | if (!status) { |
7c3df132 | 4017 | ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); |
feafb7b1 AE |
4018 | |
4019 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4020 | list_for_each_entry(vp, &ha->vp_list, list) { | |
4021 | if (vp->vp_idx) { | |
4022 | atomic_inc(&vp->vref_count); | |
4023 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
4024 | ||
e315cd28 | 4025 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
4026 | |
4027 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4028 | atomic_dec(&vp->vref_count); | |
4029 | } | |
e315cd28 | 4030 | } |
feafb7b1 AE |
4031 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
4032 | ||
e315cd28 | 4033 | } else { |
d8424f68 JP |
4034 | ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", |
4035 | __func__); | |
1da177e4 LT |
4036 | } |
4037 | ||
4038 | return(status); | |
4039 | } | |
4040 | ||
4041 | /* | |
4042 | * qla2x00_restart_isp | |
4043 | * restarts the ISP after a reset | |
4044 | * | |
4045 | * Input: | |
4046 | * ha = adapter block pointer. | |
4047 | * | |
4048 | * Returns: | |
4049 | * 0 = success | |
4050 | */ | |
4051 | static int | |
e315cd28 | 4052 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 4053 | { |
c6b2fca8 | 4054 | int status = 0; |
1da177e4 | 4055 | uint32_t wait_time; |
e315cd28 | 4056 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
4057 | struct req_que *req = ha->req_q_map[0]; |
4058 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
4059 | |
4060 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
4061 | if (qla2x00_isp_firmware(vha)) { |
4062 | vha->flags.online = 0; | |
4063 | status = ha->isp_ops->chip_diag(vha); | |
4064 | if (!status) | |
4065 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
4066 | } |
4067 | ||
e315cd28 AC |
4068 | if (!status && !(status = qla2x00_init_rings(vha))) { |
4069 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 4070 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
4071 | /* Initialize the queues in use */ |
4072 | qla25xx_init_queues(ha); | |
4073 | ||
e315cd28 AC |
4074 | status = qla2x00_fw_ready(vha); |
4075 | if (!status) { | |
7c3df132 SK |
4076 | ql_dbg(ql_dbg_taskm, vha, 0x8031, |
4077 | "Start configure loop status = %d.\n", status); | |
0107109e AV |
4078 | |
4079 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 4080 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 4081 | |
e315cd28 | 4082 | vha->flags.online = 1; |
1da177e4 LT |
4083 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
4084 | wait_time = 256; | |
4085 | do { | |
e315cd28 AC |
4086 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
4087 | qla2x00_configure_loop(vha); | |
1da177e4 | 4088 | wait_time--; |
e315cd28 AC |
4089 | } while (!atomic_read(&vha->loop_down_timer) && |
4090 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
4091 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
4092 | &vha->dpc_flags))); | |
1da177e4 LT |
4093 | } |
4094 | ||
4095 | /* if no cable then assume it's good */ | |
e315cd28 | 4096 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
4097 | status = 0; |
4098 | ||
7c3df132 SK |
4099 | ql_dbg(ql_dbg_taskm, vha, 0x8032, |
4100 | "Configure loop done, status = 0x%x.\n", status); | |
1da177e4 LT |
4101 | } |
4102 | return (status); | |
4103 | } | |
4104 | ||
73208dfd AC |
4105 | static int |
4106 | qla25xx_init_queues(struct qla_hw_data *ha) | |
4107 | { | |
4108 | struct rsp_que *rsp = NULL; | |
4109 | struct req_que *req = NULL; | |
4110 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
4111 | int ret = -1; | |
4112 | int i; | |
4113 | ||
2afa19a9 | 4114 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
4115 | rsp = ha->rsp_q_map[i]; |
4116 | if (rsp) { | |
4117 | rsp->options &= ~BIT_0; | |
618a7523 | 4118 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd | 4119 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
4120 | ql_dbg(ql_dbg_init, base_vha, 0x00ff, |
4121 | "%s Rsp que: %d init failed.\n", | |
4122 | __func__, rsp->id); | |
73208dfd | 4123 | else |
7c3df132 SK |
4124 | ql_dbg(ql_dbg_init, base_vha, 0x0100, |
4125 | "%s Rsp que: %d inited.\n", | |
4126 | __func__, rsp->id); | |
73208dfd | 4127 | } |
2afa19a9 AC |
4128 | } |
4129 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
4130 | req = ha->req_q_map[i]; |
4131 | if (req) { | |
29bdccbe | 4132 | /* Clear outstanding commands array. */ |
73208dfd | 4133 | req->options &= ~BIT_0; |
618a7523 | 4134 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd | 4135 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
4136 | ql_dbg(ql_dbg_init, base_vha, 0x0101, |
4137 | "%s Req que: %d init failed.\n", | |
4138 | __func__, req->id); | |
73208dfd | 4139 | else |
7c3df132 SK |
4140 | ql_dbg(ql_dbg_init, base_vha, 0x0102, |
4141 | "%s Req que: %d inited.\n", | |
4142 | __func__, req->id); | |
73208dfd AC |
4143 | } |
4144 | } | |
4145 | return ret; | |
4146 | } | |
4147 | ||
1da177e4 LT |
4148 | /* |
4149 | * qla2x00_reset_adapter | |
4150 | * Reset adapter. | |
4151 | * | |
4152 | * Input: | |
4153 | * ha = adapter block pointer. | |
4154 | */ | |
abbd8870 | 4155 | void |
e315cd28 | 4156 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
4157 | { |
4158 | unsigned long flags = 0; | |
e315cd28 | 4159 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 4160 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 4161 | |
e315cd28 | 4162 | vha->flags.online = 0; |
fd34f556 | 4163 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 4164 | |
1da177e4 LT |
4165 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4166 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
4167 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4168 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
4169 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4170 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4171 | } | |
0107109e AV |
4172 | |
4173 | void | |
e315cd28 | 4174 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
4175 | { |
4176 | unsigned long flags = 0; | |
e315cd28 | 4177 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
4178 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
4179 | ||
a9083016 GM |
4180 | if (IS_QLA82XX(ha)) |
4181 | return; | |
4182 | ||
e315cd28 | 4183 | vha->flags.online = 0; |
fd34f556 | 4184 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
4185 | |
4186 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
4187 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
4188 | RD_REG_DWORD(®->hccr); | |
4189 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
4190 | RD_REG_DWORD(®->hccr); | |
4191 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
4192 | |
4193 | if (IS_NOPOLLING_TYPE(ha)) | |
4194 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
4195 | } |
4196 | ||
4e08df3f DM |
4197 | /* On sparc systems, obtain port and node WWN from firmware |
4198 | * properties. | |
4199 | */ | |
e315cd28 AC |
4200 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
4201 | struct nvram_24xx *nv) | |
4e08df3f DM |
4202 | { |
4203 | #ifdef CONFIG_SPARC | |
e315cd28 | 4204 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 4205 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
4206 | struct device_node *dp = pci_device_to_OF_node(pdev); |
4207 | const u8 *val; | |
4e08df3f DM |
4208 | int len; |
4209 | ||
4210 | val = of_get_property(dp, "port-wwn", &len); | |
4211 | if (val && len >= WWN_SIZE) | |
4212 | memcpy(nv->port_name, val, WWN_SIZE); | |
4213 | ||
4214 | val = of_get_property(dp, "node-wwn", &len); | |
4215 | if (val && len >= WWN_SIZE) | |
4216 | memcpy(nv->node_name, val, WWN_SIZE); | |
4217 | #endif | |
4218 | } | |
4219 | ||
0107109e | 4220 | int |
e315cd28 | 4221 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 4222 | { |
4e08df3f | 4223 | int rval; |
0107109e AV |
4224 | struct init_cb_24xx *icb; |
4225 | struct nvram_24xx *nv; | |
4226 | uint32_t *dptr; | |
4227 | uint8_t *dptr1, *dptr2; | |
4228 | uint32_t chksum; | |
4229 | uint16_t cnt; | |
e315cd28 | 4230 | struct qla_hw_data *ha = vha->hw; |
0107109e | 4231 | |
4e08df3f | 4232 | rval = QLA_SUCCESS; |
0107109e | 4233 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 4234 | nv = ha->nvram; |
0107109e AV |
4235 | |
4236 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
4237 | if (ha->flags.port0) { |
4238 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
4239 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
4240 | } else { | |
0107109e | 4241 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 | 4242 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
4243 | } | |
e5b68a61 AC |
4244 | ha->nvram_size = sizeof(struct nvram_24xx); |
4245 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
a9083016 GM |
4246 | if (IS_QLA82XX(ha)) |
4247 | ha->vpd_size = FA_VPD_SIZE_82XX; | |
0107109e | 4248 | |
281afe19 SJ |
4249 | /* Get VPD data into cache */ |
4250 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 4251 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
4252 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
4253 | ||
4254 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 4255 | dptr = (uint32_t *)nv; |
e315cd28 | 4256 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
4257 | ha->nvram_size); |
4258 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
4259 | chksum += le32_to_cpu(*dptr++); | |
4260 | ||
7c3df132 SK |
4261 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, |
4262 | "Contents of NVRAM\n"); | |
4263 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, | |
4264 | (uint8_t *)nv, ha->nvram_size); | |
0107109e AV |
4265 | |
4266 | /* Bad NVRAM data, set defaults parameters. */ | |
4267 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4268 | || nv->id[3] != ' ' || | |
4269 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4270 | /* Reset NVRAM data. */ | |
7c3df132 | 4271 | ql_log(ql_log_warn, vha, 0x006b, |
9e336520 | 4272 | "Inconsistent NVRAM detected: checksum=0x%x id=%c " |
7c3df132 SK |
4273 | "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); |
4274 | ql_log(ql_log_warn, vha, 0x006c, | |
4275 | "Falling back to functioning (yet invalid -- WWPN) " | |
4276 | "defaults.\n"); | |
4e08df3f DM |
4277 | |
4278 | /* | |
4279 | * Set default initialization control block. | |
4280 | */ | |
4281 | memset(nv, 0, ha->nvram_size); | |
4282 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4283 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4284 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4285 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4286 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4287 | nv->hard_address = __constant_cpu_to_le16(124); | |
4288 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4289 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
4290 | nv->port_name[2] = 0x00; |
4291 | nv->port_name[3] = 0xe0; | |
4292 | nv->port_name[4] = 0x8b; | |
4293 | nv->port_name[5] = 0x1c; | |
4294 | nv->port_name[6] = 0x55; | |
4295 | nv->port_name[7] = 0x86; | |
4296 | nv->node_name[0] = 0x20; | |
4297 | nv->node_name[1] = 0x00; | |
4298 | nv->node_name[2] = 0x00; | |
4299 | nv->node_name[3] = 0xe0; | |
4300 | nv->node_name[4] = 0x8b; | |
4301 | nv->node_name[5] = 0x1c; | |
4302 | nv->node_name[6] = 0x55; | |
4303 | nv->node_name[7] = 0x86; | |
e315cd28 | 4304 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
4305 | nv->login_retry_count = __constant_cpu_to_le16(8); |
4306 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4307 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4308 | nv->firmware_options_1 = | |
4309 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4310 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4311 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4312 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4313 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4314 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4315 | nv->reset_delay = 5; | |
4316 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4317 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4318 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
4319 | ||
4320 | rval = 1; | |
0107109e AV |
4321 | } |
4322 | ||
4323 | /* Reset Initialization control block */ | |
e315cd28 | 4324 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
4325 | |
4326 | /* Copy 1st segment. */ | |
4327 | dptr1 = (uint8_t *)icb; | |
4328 | dptr2 = (uint8_t *)&nv->version; | |
4329 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4330 | while (cnt--) | |
4331 | *dptr1++ = *dptr2++; | |
4332 | ||
4333 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 4334 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
4335 | |
4336 | /* Copy 2nd segment. */ | |
4337 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4338 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4339 | cnt = (uint8_t *)&icb->reserved_3 - | |
4340 | (uint8_t *)&icb->interrupt_delay_timer; | |
4341 | while (cnt--) | |
4342 | *dptr1++ = *dptr2++; | |
4343 | ||
4344 | /* | |
4345 | * Setup driver NVRAM options. | |
4346 | */ | |
e315cd28 | 4347 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 4348 | "QLA2462"); |
0107109e | 4349 | |
5341e868 AV |
4350 | /* Use alternate WWN? */ |
4351 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4352 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4353 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4354 | } | |
4355 | ||
0107109e | 4356 | /* Prepare nodename */ |
fd0e7e4d | 4357 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
4358 | /* |
4359 | * Firmware will apply the following mask if the nodename was | |
4360 | * not provided. | |
4361 | */ | |
4362 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4363 | icb->node_name[0] &= 0xF0; | |
4364 | } | |
4365 | ||
4366 | /* Set host adapter parameters. */ | |
4367 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
4368 | ha->flags.enable_lip_reset = 0; |
4369 | ha->flags.enable_lip_full_login = | |
4370 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4371 | ha->flags.enable_target_reset = | |
4372 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 4373 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 4374 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 4375 | |
fd0e7e4d AV |
4376 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
4377 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
4378 | |
4379 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
4380 | sizeof(ha->fw_seriallink_options24)); | |
4381 | ||
4382 | /* save HBA serial number */ | |
4383 | ha->serial0 = icb->port_name[5]; | |
4384 | ha->serial1 = icb->port_name[6]; | |
4385 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4386 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4387 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 4388 | |
bc8fb3cb | 4389 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
4390 | ||
0107109e AV |
4391 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
4392 | ||
4393 | /* Set minimum login_timeout to 4 seconds. */ | |
4394 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4395 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4396 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4397 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4398 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 4399 | icb->login_timeout = nv->login_timeout; |
0107109e | 4400 | |
00a537b8 AV |
4401 | /* Set minimum RATOV to 100 tenths of a second. */ |
4402 | ha->r_a_tov = 100; | |
0107109e AV |
4403 | |
4404 | ha->loop_reset_delay = nv->reset_delay; | |
4405 | ||
4406 | /* Link Down Timeout = 0: | |
4407 | * | |
4408 | * When Port Down timer expires we will start returning | |
4409 | * I/O's to OS with "DID_NO_CONNECT". | |
4410 | * | |
4411 | * Link Down Timeout != 0: | |
4412 | * | |
4413 | * The driver waits for the link to come up after link down | |
4414 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4415 | */ | |
4416 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4417 | ha->loop_down_abort_time = | |
4418 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4419 | } else { | |
4420 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4421 | ha->loop_down_abort_time = | |
4422 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4423 | } | |
4424 | ||
4425 | /* Need enough time to try and get the port back. */ | |
4426 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4427 | if (qlport_down_retry) | |
4428 | ha->port_down_retry_count = qlport_down_retry; | |
4429 | ||
4430 | /* Set login_retry_count */ | |
4431 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4432 | if (ha->port_down_retry_count == | |
4433 | le16_to_cpu(nv->port_down_retry_count) && | |
4434 | ha->port_down_retry_count > 3) | |
4435 | ha->login_retry_count = ha->port_down_retry_count; | |
4436 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4437 | ha->login_retry_count = ha->port_down_retry_count; | |
4438 | if (ql2xloginretrycount) | |
4439 | ha->login_retry_count = ql2xloginretrycount; | |
4440 | ||
4fdfefe5 | 4441 | /* Enable ZIO. */ |
e315cd28 | 4442 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4443 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
4444 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4445 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4446 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4447 | } | |
4448 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4449 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 4450 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4451 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 4452 | ha->zio_mode = QLA_ZIO_MODE_6; |
4453 | ||
7c3df132 | 4454 | ql_log(ql_log_info, vha, 0x006f, |
4fdfefe5 AV |
4455 | "ZIO mode %d enabled; timer delay (%d us).\n", |
4456 | ha->zio_mode, ha->zio_timer * 100); | |
4457 | ||
4458 | icb->firmware_options_2 |= cpu_to_le32( | |
4459 | (uint32_t)ha->zio_mode); | |
4460 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 4461 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
4462 | } |
4463 | ||
4e08df3f | 4464 | if (rval) { |
7c3df132 SK |
4465 | ql_log(ql_log_warn, vha, 0x0070, |
4466 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
4467 | } |
4468 | return (rval); | |
0107109e AV |
4469 | } |
4470 | ||
413975a0 | 4471 | static int |
cbc8eb67 AV |
4472 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
4473 | uint32_t faddr) | |
d1c61909 | 4474 | { |
73208dfd | 4475 | int rval = QLA_SUCCESS; |
d1c61909 | 4476 | int segments, fragment; |
d1c61909 AV |
4477 | uint32_t *dcode, dlen; |
4478 | uint32_t risc_addr; | |
4479 | uint32_t risc_size; | |
4480 | uint32_t i; | |
e315cd28 | 4481 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4482 | struct req_que *req = ha->req_q_map[0]; |
eaac30be | 4483 | |
7c3df132 | 4484 | ql_dbg(ql_dbg_init, vha, 0x008b, |
cfb0919c | 4485 | "FW: Loading firmware from flash (%x).\n", faddr); |
eaac30be | 4486 | |
d1c61909 AV |
4487 | rval = QLA_SUCCESS; |
4488 | ||
4489 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4490 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
4491 | *srisc_addr = 0; |
4492 | ||
4493 | /* Validate firmware image by checking version. */ | |
e315cd28 | 4494 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
4495 | for (i = 0; i < 4; i++) |
4496 | dcode[i] = be32_to_cpu(dcode[i]); | |
4497 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4498 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4499 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4500 | dcode[3] == 0)) { | |
7c3df132 SK |
4501 | ql_log(ql_log_fatal, vha, 0x008c, |
4502 | "Unable to verify the integrity of flash firmware " | |
4503 | "image.\n"); | |
4504 | ql_log(ql_log_fatal, vha, 0x008d, | |
4505 | "Firmware data: %08x %08x %08x %08x.\n", | |
4506 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
d1c61909 AV |
4507 | |
4508 | return QLA_FUNCTION_FAILED; | |
4509 | } | |
4510 | ||
4511 | while (segments && rval == QLA_SUCCESS) { | |
4512 | /* Read segment's load information. */ | |
e315cd28 | 4513 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
4514 | |
4515 | risc_addr = be32_to_cpu(dcode[2]); | |
4516 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4517 | risc_size = be32_to_cpu(dcode[3]); | |
4518 | ||
4519 | fragment = 0; | |
4520 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4521 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4522 | if (dlen > risc_size) | |
4523 | dlen = risc_size; | |
4524 | ||
7c3df132 SK |
4525 | ql_dbg(ql_dbg_init, vha, 0x008e, |
4526 | "Loading risc segment@ risc addr %x " | |
4527 | "number of dwords 0x%x offset 0x%x.\n", | |
4528 | risc_addr, dlen, faddr); | |
d1c61909 | 4529 | |
e315cd28 | 4530 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
4531 | for (i = 0; i < dlen; i++) |
4532 | dcode[i] = swab32(dcode[i]); | |
4533 | ||
73208dfd | 4534 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
4535 | dlen); |
4536 | if (rval) { | |
7c3df132 SK |
4537 | ql_log(ql_log_fatal, vha, 0x008f, |
4538 | "Failed to load segment %d of firmware.\n", | |
4539 | fragment); | |
d1c61909 AV |
4540 | break; |
4541 | } | |
4542 | ||
4543 | faddr += dlen; | |
4544 | risc_addr += dlen; | |
4545 | risc_size -= dlen; | |
4546 | fragment++; | |
4547 | } | |
4548 | ||
4549 | /* Next segment. */ | |
4550 | segments--; | |
4551 | } | |
4552 | ||
4553 | return rval; | |
4554 | } | |
4555 | ||
d1c61909 AV |
4556 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
4557 | ||
0107109e | 4558 | int |
e315cd28 | 4559 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
4560 | { |
4561 | int rval; | |
4562 | int i, fragment; | |
4563 | uint16_t *wcode, *fwcode; | |
4564 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
4565 | struct fw_blob *blob; | |
e315cd28 | 4566 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4567 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
4568 | |
4569 | /* Load firmware blob. */ | |
e315cd28 | 4570 | blob = qla2x00_request_firmware(vha); |
5433383e | 4571 | if (!blob) { |
7c3df132 SK |
4572 | ql_log(ql_log_info, vha, 0x0083, |
4573 | "Fimware image unavailable.\n"); | |
4574 | ql_log(ql_log_info, vha, 0x0084, | |
4575 | "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); | |
5433383e AV |
4576 | return QLA_FUNCTION_FAILED; |
4577 | } | |
4578 | ||
4579 | rval = QLA_SUCCESS; | |
4580 | ||
73208dfd | 4581 | wcode = (uint16_t *)req->ring; |
5433383e AV |
4582 | *srisc_addr = 0; |
4583 | fwcode = (uint16_t *)blob->fw->data; | |
4584 | fwclen = 0; | |
4585 | ||
4586 | /* Validate firmware image by checking version. */ | |
4587 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
7c3df132 SK |
4588 | ql_log(ql_log_fatal, vha, 0x0085, |
4589 | "Unable to verify integrity of firmware image (%Zd).\n", | |
5433383e AV |
4590 | blob->fw->size); |
4591 | goto fail_fw_integrity; | |
4592 | } | |
4593 | for (i = 0; i < 4; i++) | |
4594 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
4595 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
4596 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
4597 | wcode[2] == 0 && wcode[3] == 0)) { | |
7c3df132 SK |
4598 | ql_log(ql_log_fatal, vha, 0x0086, |
4599 | "Unable to verify integrity of firmware image.\n"); | |
4600 | ql_log(ql_log_fatal, vha, 0x0087, | |
4601 | "Firmware data: %04x %04x %04x %04x.\n", | |
4602 | wcode[0], wcode[1], wcode[2], wcode[3]); | |
5433383e AV |
4603 | goto fail_fw_integrity; |
4604 | } | |
4605 | ||
4606 | seg = blob->segs; | |
4607 | while (*seg && rval == QLA_SUCCESS) { | |
4608 | risc_addr = *seg; | |
4609 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
4610 | risc_size = be16_to_cpu(fwcode[3]); | |
4611 | ||
4612 | /* Validate firmware image size. */ | |
4613 | fwclen += risc_size * sizeof(uint16_t); | |
4614 | if (blob->fw->size < fwclen) { | |
7c3df132 | 4615 | ql_log(ql_log_fatal, vha, 0x0088, |
5433383e | 4616 | "Unable to verify integrity of firmware image " |
7c3df132 | 4617 | "(%Zd).\n", blob->fw->size); |
5433383e AV |
4618 | goto fail_fw_integrity; |
4619 | } | |
4620 | ||
4621 | fragment = 0; | |
4622 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4623 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4624 | if (wlen > risc_size) | |
4625 | wlen = risc_size; | |
7c3df132 SK |
4626 | ql_dbg(ql_dbg_init, vha, 0x0089, |
4627 | "Loading risc segment@ risc addr %x number of " | |
4628 | "words 0x%x.\n", risc_addr, wlen); | |
5433383e AV |
4629 | |
4630 | for (i = 0; i < wlen; i++) | |
4631 | wcode[i] = swab16(fwcode[i]); | |
4632 | ||
73208dfd | 4633 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4634 | wlen); |
4635 | if (rval) { | |
7c3df132 SK |
4636 | ql_log(ql_log_fatal, vha, 0x008a, |
4637 | "Failed to load segment %d of firmware.\n", | |
4638 | fragment); | |
5433383e AV |
4639 | break; |
4640 | } | |
4641 | ||
4642 | fwcode += wlen; | |
4643 | risc_addr += wlen; | |
4644 | risc_size -= wlen; | |
4645 | fragment++; | |
4646 | } | |
4647 | ||
4648 | /* Next segment. */ | |
4649 | seg++; | |
4650 | } | |
4651 | return rval; | |
4652 | ||
4653 | fail_fw_integrity: | |
4654 | return QLA_FUNCTION_FAILED; | |
4655 | } | |
4656 | ||
eaac30be AV |
4657 | static int |
4658 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4659 | { |
4660 | int rval; | |
4661 | int segments, fragment; | |
4662 | uint32_t *dcode, dlen; | |
4663 | uint32_t risc_addr; | |
4664 | uint32_t risc_size; | |
4665 | uint32_t i; | |
5433383e | 4666 | struct fw_blob *blob; |
0107109e | 4667 | uint32_t *fwcode, fwclen; |
e315cd28 | 4668 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4669 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4670 | |
5433383e | 4671 | /* Load firmware blob. */ |
e315cd28 | 4672 | blob = qla2x00_request_firmware(vha); |
5433383e | 4673 | if (!blob) { |
7c3df132 SK |
4674 | ql_log(ql_log_warn, vha, 0x0090, |
4675 | "Fimware image unavailable.\n"); | |
4676 | ql_log(ql_log_warn, vha, 0x0091, | |
4677 | "Firmware images can be retrieved from: " | |
4678 | QLA_FW_URL ".\n"); | |
d1c61909 | 4679 | |
eaac30be | 4680 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4681 | } |
4682 | ||
cfb0919c CD |
4683 | ql_dbg(ql_dbg_init, vha, 0x0092, |
4684 | "FW: Loading via request-firmware.\n"); | |
eaac30be | 4685 | |
0107109e AV |
4686 | rval = QLA_SUCCESS; |
4687 | ||
4688 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4689 | dcode = (uint32_t *)req->ring; |
0107109e | 4690 | *srisc_addr = 0; |
5433383e | 4691 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4692 | fwclen = 0; |
4693 | ||
4694 | /* Validate firmware image by checking version. */ | |
5433383e | 4695 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
7c3df132 SK |
4696 | ql_log(ql_log_fatal, vha, 0x0093, |
4697 | "Unable to verify integrity of firmware image (%Zd).\n", | |
5433383e | 4698 | blob->fw->size); |
0107109e AV |
4699 | goto fail_fw_integrity; |
4700 | } | |
4701 | for (i = 0; i < 4; i++) | |
4702 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4703 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4704 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4705 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4706 | dcode[3] == 0)) { | |
7c3df132 SK |
4707 | ql_log(ql_log_fatal, vha, 0x0094, |
4708 | "Unable to verify integrity of firmware image (%Zd).\n", | |
4709 | blob->fw->size); | |
4710 | ql_log(ql_log_fatal, vha, 0x0095, | |
4711 | "Firmware data: %08x %08x %08x %08x.\n", | |
4712 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
0107109e AV |
4713 | goto fail_fw_integrity; |
4714 | } | |
4715 | ||
4716 | while (segments && rval == QLA_SUCCESS) { | |
4717 | risc_addr = be32_to_cpu(fwcode[2]); | |
4718 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4719 | risc_size = be32_to_cpu(fwcode[3]); | |
4720 | ||
4721 | /* Validate firmware image size. */ | |
4722 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4723 | if (blob->fw->size < fwclen) { |
7c3df132 | 4724 | ql_log(ql_log_fatal, vha, 0x0096, |
5433383e | 4725 | "Unable to verify integrity of firmware image " |
7c3df132 | 4726 | "(%Zd).\n", blob->fw->size); |
5433383e | 4727 | |
0107109e AV |
4728 | goto fail_fw_integrity; |
4729 | } | |
4730 | ||
4731 | fragment = 0; | |
4732 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4733 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4734 | if (dlen > risc_size) | |
4735 | dlen = risc_size; | |
4736 | ||
7c3df132 SK |
4737 | ql_dbg(ql_dbg_init, vha, 0x0097, |
4738 | "Loading risc segment@ risc addr %x " | |
4739 | "number of dwords 0x%x.\n", risc_addr, dlen); | |
0107109e AV |
4740 | |
4741 | for (i = 0; i < dlen; i++) | |
4742 | dcode[i] = swab32(fwcode[i]); | |
4743 | ||
73208dfd | 4744 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4745 | dlen); |
0107109e | 4746 | if (rval) { |
7c3df132 SK |
4747 | ql_log(ql_log_fatal, vha, 0x0098, |
4748 | "Failed to load segment %d of firmware.\n", | |
4749 | fragment); | |
0107109e AV |
4750 | break; |
4751 | } | |
4752 | ||
4753 | fwcode += dlen; | |
4754 | risc_addr += dlen; | |
4755 | risc_size -= dlen; | |
4756 | fragment++; | |
4757 | } | |
4758 | ||
4759 | /* Next segment. */ | |
4760 | segments--; | |
4761 | } | |
0107109e AV |
4762 | return rval; |
4763 | ||
4764 | fail_fw_integrity: | |
0107109e | 4765 | return QLA_FUNCTION_FAILED; |
0107109e | 4766 | } |
18c6c127 | 4767 | |
eaac30be AV |
4768 | int |
4769 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4770 | { | |
4771 | int rval; | |
4772 | ||
e337d907 AV |
4773 | if (ql2xfwloadbin == 1) |
4774 | return qla81xx_load_risc(vha, srisc_addr); | |
4775 | ||
eaac30be AV |
4776 | /* |
4777 | * FW Load priority: | |
4778 | * 1) Firmware via request-firmware interface (.bin file). | |
4779 | * 2) Firmware residing in flash. | |
4780 | */ | |
4781 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4782 | if (rval == QLA_SUCCESS) | |
4783 | return rval; | |
4784 | ||
cbc8eb67 AV |
4785 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4786 | vha->hw->flt_region_fw); | |
eaac30be AV |
4787 | } |
4788 | ||
4789 | int | |
4790 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4791 | { | |
4792 | int rval; | |
cbc8eb67 | 4793 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4794 | |
e337d907 | 4795 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4796 | goto try_blob_fw; |
e337d907 | 4797 | |
eaac30be AV |
4798 | /* |
4799 | * FW Load priority: | |
4800 | * 1) Firmware residing in flash. | |
4801 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4802 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4803 | */ |
cbc8eb67 | 4804 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4805 | if (rval == QLA_SUCCESS) |
4806 | return rval; | |
4807 | ||
cbc8eb67 AV |
4808 | try_blob_fw: |
4809 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4810 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4811 | return rval; | |
4812 | ||
7c3df132 SK |
4813 | ql_log(ql_log_info, vha, 0x0099, |
4814 | "Attempting to fallback to golden firmware.\n"); | |
cbc8eb67 AV |
4815 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); |
4816 | if (rval != QLA_SUCCESS) | |
4817 | return rval; | |
4818 | ||
7c3df132 | 4819 | ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); |
cbc8eb67 | 4820 | ha->flags.running_gold_fw = 1; |
cbc8eb67 | 4821 | return rval; |
eaac30be AV |
4822 | } |
4823 | ||
18c6c127 | 4824 | void |
e315cd28 | 4825 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4826 | { |
4827 | int ret, retries; | |
e315cd28 | 4828 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4829 | |
85880801 AV |
4830 | if (ha->flags.pci_channel_io_perm_failure) |
4831 | return; | |
e428924c | 4832 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4833 | return; |
75edf81d AV |
4834 | if (!ha->fw_major_version) |
4835 | return; | |
18c6c127 | 4836 | |
e315cd28 | 4837 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4838 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4839 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4840 | ha->isp_ops->reset_chip(vha); |
4841 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4842 | continue; |
e315cd28 | 4843 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 | 4844 | continue; |
7c3df132 SK |
4845 | ql_log(ql_log_info, vha, 0x8015, |
4846 | "Attempting retry of stop-firmware command.\n"); | |
e315cd28 | 4847 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4848 | } |
4849 | } | |
2c3dfe3f SJ |
4850 | |
4851 | int | |
e315cd28 | 4852 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4853 | { |
4854 | int rval = QLA_SUCCESS; | |
0b91d116 | 4855 | int rval2; |
2c3dfe3f | 4856 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
e315cd28 AC |
4857 | struct qla_hw_data *ha = vha->hw; |
4858 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4859 | struct req_que *req; |
4860 | struct rsp_que *rsp; | |
2c3dfe3f | 4861 | |
e315cd28 | 4862 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4863 | return -EINVAL; |
4864 | ||
e315cd28 | 4865 | rval = qla2x00_fw_ready(base_vha); |
7163ea81 | 4866 | if (ha->flags.cpu_affinity_enabled) |
67c2e93a AC |
4867 | req = ha->req_q_map[0]; |
4868 | else | |
4869 | req = vha->req; | |
4870 | rsp = req->rsp; | |
4871 | ||
2c3dfe3f | 4872 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4873 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4874 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4875 | } |
4876 | ||
e315cd28 | 4877 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4878 | |
4879 | /* Login to SNS first */ | |
0b91d116 CD |
4880 | rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, |
4881 | BIT_1); | |
4882 | if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { | |
4883 | if (rval2 == QLA_MEMORY_ALLOC_FAILED) | |
4884 | ql_dbg(ql_dbg_init, vha, 0x0120, | |
4885 | "Failed SNS login: loop_id=%x, rval2=%d\n", | |
4886 | NPH_SNS, rval2); | |
4887 | else | |
4888 | ql_dbg(ql_dbg_init, vha, 0x0103, | |
4889 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4890 | "mb[2]=%x mb[6]=%x mb[7]=%x.\n", | |
4891 | NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); | |
2c3dfe3f SJ |
4892 | return (QLA_FUNCTION_FAILED); |
4893 | } | |
4894 | ||
e315cd28 AC |
4895 | atomic_set(&vha->loop_down_timer, 0); |
4896 | atomic_set(&vha->loop_state, LOOP_UP); | |
4897 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4898 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4899 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4900 | |
4901 | return rval; | |
4902 | } | |
4d4df193 HK |
4903 | |
4904 | /* 84XX Support **************************************************************/ | |
4905 | ||
4906 | static LIST_HEAD(qla_cs84xx_list); | |
4907 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4908 | ||
4909 | static struct qla_chip_state_84xx * | |
e315cd28 | 4910 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4911 | { |
4912 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4913 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4914 | |
4915 | mutex_lock(&qla_cs84xx_mutex); | |
4916 | ||
4917 | /* Find any shared 84xx chip. */ | |
4918 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4919 | if (cs84xx->bus == ha->pdev->bus) { | |
4920 | kref_get(&cs84xx->kref); | |
4921 | goto done; | |
4922 | } | |
4923 | } | |
4924 | ||
4925 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4926 | if (!cs84xx) | |
4927 | goto done; | |
4928 | ||
4929 | kref_init(&cs84xx->kref); | |
4930 | spin_lock_init(&cs84xx->access_lock); | |
4931 | mutex_init(&cs84xx->fw_update_mutex); | |
4932 | cs84xx->bus = ha->pdev->bus; | |
4933 | ||
4934 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4935 | done: | |
4936 | mutex_unlock(&qla_cs84xx_mutex); | |
4937 | return cs84xx; | |
4938 | } | |
4939 | ||
4940 | static void | |
4941 | __qla84xx_chip_release(struct kref *kref) | |
4942 | { | |
4943 | struct qla_chip_state_84xx *cs84xx = | |
4944 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4945 | ||
4946 | mutex_lock(&qla_cs84xx_mutex); | |
4947 | list_del(&cs84xx->list); | |
4948 | mutex_unlock(&qla_cs84xx_mutex); | |
4949 | kfree(cs84xx); | |
4950 | } | |
4951 | ||
4952 | void | |
e315cd28 | 4953 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4954 | { |
e315cd28 | 4955 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4956 | if (ha->cs84xx) |
4957 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4958 | } | |
4959 | ||
4960 | static int | |
e315cd28 | 4961 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4962 | { |
4963 | int rval; | |
4964 | uint16_t status[2]; | |
e315cd28 | 4965 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4966 | |
4967 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4968 | ||
e315cd28 | 4969 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4970 | |
4971 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4972 | ||
4973 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4974 | QLA_SUCCESS; | |
4975 | } | |
3a03eb79 AV |
4976 | |
4977 | /* 81XX Support **************************************************************/ | |
4978 | ||
4979 | int | |
4980 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4981 | { | |
4982 | int rval; | |
4983 | struct init_cb_81xx *icb; | |
4984 | struct nvram_81xx *nv; | |
4985 | uint32_t *dptr; | |
4986 | uint8_t *dptr1, *dptr2; | |
4987 | uint32_t chksum; | |
4988 | uint16_t cnt; | |
4989 | struct qla_hw_data *ha = vha->hw; | |
4990 | ||
4991 | rval = QLA_SUCCESS; | |
4992 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4993 | nv = ha->nvram; | |
4994 | ||
4995 | /* Determine NVRAM starting address. */ | |
4996 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 4997 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
4998 | |
4999 | /* Get VPD data into cache */ | |
5000 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
5001 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
5002 | ha->vpd_size); | |
3a03eb79 AV |
5003 | |
5004 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 5005 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 5006 | ha->nvram_size); |
3d79038f | 5007 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
5008 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
5009 | chksum += le32_to_cpu(*dptr++); | |
5010 | ||
7c3df132 SK |
5011 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, |
5012 | "Contents of NVRAM:\n"); | |
5013 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, | |
5014 | (uint8_t *)nv, ha->nvram_size); | |
3a03eb79 AV |
5015 | |
5016 | /* Bad NVRAM data, set defaults parameters. */ | |
5017 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
5018 | || nv->id[3] != ' ' || | |
5019 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
5020 | /* Reset NVRAM data. */ | |
7c3df132 | 5021 | ql_log(ql_log_info, vha, 0x0073, |
9e336520 | 5022 | "Inconsistent NVRAM detected: checksum=0x%x id=%c " |
7c3df132 | 5023 | "version=0x%x.\n", chksum, nv->id[0], |
3a03eb79 | 5024 | le16_to_cpu(nv->nvram_version)); |
7c3df132 SK |
5025 | ql_log(ql_log_info, vha, 0x0074, |
5026 | "Falling back to functioning (yet invalid -- WWPN) " | |
5027 | "defaults.\n"); | |
3a03eb79 AV |
5028 | |
5029 | /* | |
5030 | * Set default initialization control block. | |
5031 | */ | |
5032 | memset(nv, 0, ha->nvram_size); | |
5033 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
5034 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
5035 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
5036 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5037 | nv->exchange_count = __constant_cpu_to_le16(0); | |
5038 | nv->port_name[0] = 0x21; | |
e5b68a61 | 5039 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
5040 | nv->port_name[2] = 0x00; |
5041 | nv->port_name[3] = 0xe0; | |
5042 | nv->port_name[4] = 0x8b; | |
5043 | nv->port_name[5] = 0x1c; | |
5044 | nv->port_name[6] = 0x55; | |
5045 | nv->port_name[7] = 0x86; | |
5046 | nv->node_name[0] = 0x20; | |
5047 | nv->node_name[1] = 0x00; | |
5048 | nv->node_name[2] = 0x00; | |
5049 | nv->node_name[3] = 0xe0; | |
5050 | nv->node_name[4] = 0x8b; | |
5051 | nv->node_name[5] = 0x1c; | |
5052 | nv->node_name[6] = 0x55; | |
5053 | nv->node_name[7] = 0x86; | |
5054 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
5055 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
5056 | nv->login_timeout = __constant_cpu_to_le16(0); | |
5057 | nv->firmware_options_1 = | |
5058 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
5059 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
5060 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
5061 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
5062 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
5063 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
5064 | nv->reset_delay = 5; | |
5065 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
5066 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
6246b8a1 | 5067 | nv->link_down_timeout = __constant_cpu_to_le16(180); |
eeebcc92 | 5068 | nv->enode_mac[0] = 0x00; |
6246b8a1 GM |
5069 | nv->enode_mac[1] = 0xC0; |
5070 | nv->enode_mac[2] = 0xDD; | |
3a03eb79 AV |
5071 | nv->enode_mac[3] = 0x04; |
5072 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 5073 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5074 | |
5075 | rval = 1; | |
5076 | } | |
5077 | ||
5078 | /* Reset Initialization control block */ | |
773120e4 | 5079 | memset(icb, 0, ha->init_cb_size); |
3a03eb79 AV |
5080 | |
5081 | /* Copy 1st segment. */ | |
5082 | dptr1 = (uint8_t *)icb; | |
5083 | dptr2 = (uint8_t *)&nv->version; | |
5084 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
5085 | while (cnt--) | |
5086 | *dptr1++ = *dptr2++; | |
5087 | ||
5088 | icb->login_retry_count = nv->login_retry_count; | |
5089 | ||
5090 | /* Copy 2nd segment. */ | |
5091 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
5092 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
5093 | cnt = (uint8_t *)&icb->reserved_5 - | |
5094 | (uint8_t *)&icb->interrupt_delay_timer; | |
5095 | while (cnt--) | |
5096 | *dptr1++ = *dptr2++; | |
5097 | ||
5098 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
5099 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
5100 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
69e5f1ea AV |
5101 | icb->enode_mac[0] = 0x00; |
5102 | icb->enode_mac[1] = 0xC0; | |
5103 | icb->enode_mac[2] = 0xDD; | |
3a03eb79 AV |
5104 | icb->enode_mac[3] = 0x04; |
5105 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 5106 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5107 | } |
5108 | ||
b64b0e8f AV |
5109 | /* Use extended-initialization control block. */ |
5110 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
5111 | ||
3a03eb79 AV |
5112 | /* |
5113 | * Setup driver NVRAM options. | |
5114 | */ | |
5115 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
a9083016 | 5116 | "QLE8XXX"); |
3a03eb79 AV |
5117 | |
5118 | /* Use alternate WWN? */ | |
5119 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
5120 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
5121 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
5122 | } | |
5123 | ||
5124 | /* Prepare nodename */ | |
5125 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
5126 | /* | |
5127 | * Firmware will apply the following mask if the nodename was | |
5128 | * not provided. | |
5129 | */ | |
5130 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
5131 | icb->node_name[0] &= 0xF0; | |
5132 | } | |
5133 | ||
5134 | /* Set host adapter parameters. */ | |
5135 | ha->flags.disable_risc_code_load = 0; | |
5136 | ha->flags.enable_lip_reset = 0; | |
5137 | ha->flags.enable_lip_full_login = | |
5138 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
5139 | ha->flags.enable_target_reset = | |
5140 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
5141 | ha->flags.enable_led_scheme = 0; | |
5142 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
5143 | ||
5144 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
5145 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
5146 | ||
5147 | /* save HBA serial number */ | |
5148 | ha->serial0 = icb->port_name[5]; | |
5149 | ha->serial1 = icb->port_name[6]; | |
5150 | ha->serial2 = icb->port_name[7]; | |
5151 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
5152 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
5153 | ||
5154 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5155 | ||
5156 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
5157 | ||
5158 | /* Set minimum login_timeout to 4 seconds. */ | |
5159 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
5160 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
5161 | if (le16_to_cpu(nv->login_timeout) < 4) | |
5162 | nv->login_timeout = __constant_cpu_to_le16(4); | |
5163 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
5164 | icb->login_timeout = nv->login_timeout; | |
5165 | ||
5166 | /* Set minimum RATOV to 100 tenths of a second. */ | |
5167 | ha->r_a_tov = 100; | |
5168 | ||
5169 | ha->loop_reset_delay = nv->reset_delay; | |
5170 | ||
5171 | /* Link Down Timeout = 0: | |
5172 | * | |
5173 | * When Port Down timer expires we will start returning | |
5174 | * I/O's to OS with "DID_NO_CONNECT". | |
5175 | * | |
5176 | * Link Down Timeout != 0: | |
5177 | * | |
5178 | * The driver waits for the link to come up after link down | |
5179 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
5180 | */ | |
5181 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
5182 | ha->loop_down_abort_time = | |
5183 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
5184 | } else { | |
5185 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
5186 | ha->loop_down_abort_time = | |
5187 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
5188 | } | |
5189 | ||
5190 | /* Need enough time to try and get the port back. */ | |
5191 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
5192 | if (qlport_down_retry) | |
5193 | ha->port_down_retry_count = qlport_down_retry; | |
5194 | ||
5195 | /* Set login_retry_count */ | |
5196 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
5197 | if (ha->port_down_retry_count == | |
5198 | le16_to_cpu(nv->port_down_retry_count) && | |
5199 | ha->port_down_retry_count > 3) | |
5200 | ha->login_retry_count = ha->port_down_retry_count; | |
5201 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
5202 | ha->login_retry_count = ha->port_down_retry_count; | |
5203 | if (ql2xloginretrycount) | |
5204 | ha->login_retry_count = ql2xloginretrycount; | |
5205 | ||
6246b8a1 GM |
5206 | /* if not running MSI-X we need handshaking on interrupts */ |
5207 | if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha)) | |
5208 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22); | |
5209 | ||
3a03eb79 AV |
5210 | /* Enable ZIO. */ |
5211 | if (!vha->flags.init_done) { | |
5212 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
5213 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
5214 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
5215 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
5216 | } | |
5217 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
5218 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
5219 | vha->flags.process_response_queue = 0; | |
5220 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
5221 | ha->zio_mode = QLA_ZIO_MODE_6; | |
5222 | ||
7c3df132 | 5223 | ql_log(ql_log_info, vha, 0x0075, |
3a03eb79 | 5224 | "ZIO mode %d enabled; timer delay (%d us).\n", |
7c3df132 SK |
5225 | ha->zio_mode, |
5226 | ha->zio_timer * 100); | |
3a03eb79 AV |
5227 | |
5228 | icb->firmware_options_2 |= cpu_to_le32( | |
5229 | (uint32_t)ha->zio_mode); | |
5230 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
5231 | vha->flags.process_response_queue = 1; | |
5232 | } | |
5233 | ||
5234 | if (rval) { | |
7c3df132 SK |
5235 | ql_log(ql_log_warn, vha, 0x0076, |
5236 | "NVRAM configuration failed.\n"); | |
3a03eb79 AV |
5237 | } |
5238 | return (rval); | |
5239 | } | |
5240 | ||
a9083016 GM |
5241 | int |
5242 | qla82xx_restart_isp(scsi_qla_host_t *vha) | |
5243 | { | |
5244 | int status, rval; | |
5245 | uint32_t wait_time; | |
5246 | struct qla_hw_data *ha = vha->hw; | |
5247 | struct req_que *req = ha->req_q_map[0]; | |
5248 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
5249 | struct scsi_qla_host *vp; | |
feafb7b1 | 5250 | unsigned long flags; |
a9083016 GM |
5251 | |
5252 | status = qla2x00_init_rings(vha); | |
5253 | if (!status) { | |
5254 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5255 | ha->flags.chip_reset_done = 1; | |
5256 | ||
5257 | status = qla2x00_fw_ready(vha); | |
5258 | if (!status) { | |
7c3df132 SK |
5259 | ql_log(ql_log_info, vha, 0x803c, |
5260 | "Start configure loop, status =%d.\n", status); | |
a9083016 GM |
5261 | |
5262 | /* Issue a marker after FW becomes ready. */ | |
5263 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); | |
5264 | ||
5265 | vha->flags.online = 1; | |
5266 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ | |
5267 | wait_time = 256; | |
5268 | do { | |
5269 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5270 | qla2x00_configure_loop(vha); | |
5271 | wait_time--; | |
5272 | } while (!atomic_read(&vha->loop_down_timer) && | |
5273 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && | |
5274 | wait_time && | |
5275 | (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); | |
5276 | } | |
5277 | ||
5278 | /* if no cable then assume it's good */ | |
5279 | if ((vha->device_flags & DFLG_NO_CABLE)) | |
5280 | status = 0; | |
5281 | ||
cfb0919c | 5282 | ql_log(ql_log_info, vha, 0x8000, |
7c3df132 | 5283 | "Configure loop done, status = 0x%x.\n", status); |
a9083016 GM |
5284 | } |
5285 | ||
5286 | if (!status) { | |
5287 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5288 | ||
5289 | if (!atomic_read(&vha->loop_down_timer)) { | |
5290 | /* | |
5291 | * Issue marker command only when we are going | |
5292 | * to start the I/O . | |
5293 | */ | |
5294 | vha->marker_needed = 1; | |
5295 | } | |
5296 | ||
5297 | vha->flags.online = 1; | |
5298 | ||
5299 | ha->isp_ops->enable_intrs(ha); | |
5300 | ||
5301 | ha->isp_abort_cnt = 0; | |
5302 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
5303 | ||
53296788 | 5304 | /* Update the firmware version */ |
3173167f | 5305 | status = qla82xx_check_md_needed(vha); |
53296788 | 5306 | |
a9083016 GM |
5307 | if (ha->fce) { |
5308 | ha->flags.fce_enabled = 1; | |
5309 | memset(ha->fce, 0, | |
5310 | fce_calc_size(ha->fce_bufs)); | |
5311 | rval = qla2x00_enable_fce_trace(vha, | |
5312 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, | |
5313 | &ha->fce_bufs); | |
5314 | if (rval) { | |
cfb0919c | 5315 | ql_log(ql_log_warn, vha, 0x8001, |
7c3df132 SK |
5316 | "Unable to reinitialize FCE (%d).\n", |
5317 | rval); | |
a9083016 GM |
5318 | ha->flags.fce_enabled = 0; |
5319 | } | |
5320 | } | |
5321 | ||
5322 | if (ha->eft) { | |
5323 | memset(ha->eft, 0, EFT_SIZE); | |
5324 | rval = qla2x00_enable_eft_trace(vha, | |
5325 | ha->eft_dma, EFT_NUM_BUFFERS); | |
5326 | if (rval) { | |
cfb0919c | 5327 | ql_log(ql_log_warn, vha, 0x8010, |
7c3df132 SK |
5328 | "Unable to reinitialize EFT (%d).\n", |
5329 | rval); | |
a9083016 GM |
5330 | } |
5331 | } | |
a9083016 GM |
5332 | } |
5333 | ||
5334 | if (!status) { | |
cfb0919c | 5335 | ql_dbg(ql_dbg_taskm, vha, 0x8011, |
7c3df132 | 5336 | "qla82xx_restart_isp succeeded.\n"); |
feafb7b1 AE |
5337 | |
5338 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5339 | list_for_each_entry(vp, &ha->vp_list, list) { | |
5340 | if (vp->vp_idx) { | |
5341 | atomic_inc(&vp->vref_count); | |
5342 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
5343 | ||
a9083016 | 5344 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
5345 | |
5346 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5347 | atomic_dec(&vp->vref_count); | |
5348 | } | |
a9083016 | 5349 | } |
feafb7b1 AE |
5350 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
5351 | ||
a9083016 | 5352 | } else { |
cfb0919c | 5353 | ql_log(ql_log_warn, vha, 0x8016, |
7c3df132 | 5354 | "qla82xx_restart_isp **** FAILED ****.\n"); |
a9083016 GM |
5355 | } |
5356 | ||
5357 | return status; | |
5358 | } | |
5359 | ||
3a03eb79 | 5360 | void |
ae97c91e | 5361 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 5362 | { |
ae97c91e AV |
5363 | struct qla_hw_data *ha = vha->hw; |
5364 | ||
5365 | if (!ql2xetsenable) | |
5366 | return; | |
5367 | ||
5368 | /* Enable ETS Burst. */ | |
5369 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
5370 | ha->fw_options[2] |= BIT_9; | |
5371 | qla2x00_set_fw_options(vha, ha->fw_options); | |
3a03eb79 | 5372 | } |
09ff701a SR |
5373 | |
5374 | /* | |
5375 | * qla24xx_get_fcp_prio | |
5376 | * Gets the fcp cmd priority value for the logged in port. | |
5377 | * Looks for a match of the port descriptors within | |
5378 | * each of the fcp prio config entries. If a match is found, | |
5379 | * the tag (priority) value is returned. | |
5380 | * | |
5381 | * Input: | |
21090cbe | 5382 | * vha = scsi host structure pointer. |
09ff701a SR |
5383 | * fcport = port structure pointer. |
5384 | * | |
5385 | * Return: | |
6c452a45 | 5386 | * non-zero (if found) |
f28a0a96 | 5387 | * -1 (if not found) |
09ff701a SR |
5388 | * |
5389 | * Context: | |
5390 | * Kernel context | |
5391 | */ | |
f28a0a96 | 5392 | static int |
09ff701a SR |
5393 | qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
5394 | { | |
5395 | int i, entries; | |
5396 | uint8_t pid_match, wwn_match; | |
f28a0a96 | 5397 | int priority; |
09ff701a SR |
5398 | uint32_t pid1, pid2; |
5399 | uint64_t wwn1, wwn2; | |
5400 | struct qla_fcp_prio_entry *pri_entry; | |
5401 | struct qla_hw_data *ha = vha->hw; | |
5402 | ||
5403 | if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) | |
f28a0a96 | 5404 | return -1; |
09ff701a | 5405 | |
f28a0a96 | 5406 | priority = -1; |
09ff701a SR |
5407 | entries = ha->fcp_prio_cfg->num_entries; |
5408 | pri_entry = &ha->fcp_prio_cfg->entry[0]; | |
5409 | ||
5410 | for (i = 0; i < entries; i++) { | |
5411 | pid_match = wwn_match = 0; | |
5412 | ||
5413 | if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { | |
5414 | pri_entry++; | |
5415 | continue; | |
5416 | } | |
5417 | ||
5418 | /* check source pid for a match */ | |
5419 | if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { | |
5420 | pid1 = pri_entry->src_pid & INVALID_PORT_ID; | |
5421 | pid2 = vha->d_id.b24 & INVALID_PORT_ID; | |
5422 | if (pid1 == INVALID_PORT_ID) | |
5423 | pid_match++; | |
5424 | else if (pid1 == pid2) | |
5425 | pid_match++; | |
5426 | } | |
5427 | ||
5428 | /* check destination pid for a match */ | |
5429 | if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { | |
5430 | pid1 = pri_entry->dst_pid & INVALID_PORT_ID; | |
5431 | pid2 = fcport->d_id.b24 & INVALID_PORT_ID; | |
5432 | if (pid1 == INVALID_PORT_ID) | |
5433 | pid_match++; | |
5434 | else if (pid1 == pid2) | |
5435 | pid_match++; | |
5436 | } | |
5437 | ||
5438 | /* check source WWN for a match */ | |
5439 | if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { | |
5440 | wwn1 = wwn_to_u64(vha->port_name); | |
5441 | wwn2 = wwn_to_u64(pri_entry->src_wwpn); | |
5442 | if (wwn2 == (uint64_t)-1) | |
5443 | wwn_match++; | |
5444 | else if (wwn1 == wwn2) | |
5445 | wwn_match++; | |
5446 | } | |
5447 | ||
5448 | /* check destination WWN for a match */ | |
5449 | if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { | |
5450 | wwn1 = wwn_to_u64(fcport->port_name); | |
5451 | wwn2 = wwn_to_u64(pri_entry->dst_wwpn); | |
5452 | if (wwn2 == (uint64_t)-1) | |
5453 | wwn_match++; | |
5454 | else if (wwn1 == wwn2) | |
5455 | wwn_match++; | |
5456 | } | |
5457 | ||
5458 | if (pid_match == 2 || wwn_match == 2) { | |
5459 | /* Found a matching entry */ | |
5460 | if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) | |
5461 | priority = pri_entry->tag; | |
5462 | break; | |
5463 | } | |
5464 | ||
5465 | pri_entry++; | |
5466 | } | |
5467 | ||
5468 | return priority; | |
5469 | } | |
5470 | ||
5471 | /* | |
5472 | * qla24xx_update_fcport_fcp_prio | |
5473 | * Activates fcp priority for the logged in fc port | |
5474 | * | |
5475 | * Input: | |
21090cbe | 5476 | * vha = scsi host structure pointer. |
09ff701a SR |
5477 | * fcp = port structure pointer. |
5478 | * | |
5479 | * Return: | |
5480 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5481 | * | |
5482 | * Context: | |
5483 | * Kernel context. | |
5484 | */ | |
5485 | int | |
21090cbe | 5486 | qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
09ff701a SR |
5487 | { |
5488 | int ret; | |
f28a0a96 | 5489 | int priority; |
09ff701a SR |
5490 | uint16_t mb[5]; |
5491 | ||
21090cbe MI |
5492 | if (fcport->port_type != FCT_TARGET || |
5493 | fcport->loop_id == FC_NO_LOOP_ID) | |
09ff701a SR |
5494 | return QLA_FUNCTION_FAILED; |
5495 | ||
21090cbe | 5496 | priority = qla24xx_get_fcp_prio(vha, fcport); |
f28a0a96 AV |
5497 | if (priority < 0) |
5498 | return QLA_FUNCTION_FAILED; | |
5499 | ||
a00f6296 SK |
5500 | if (IS_QLA82XX(vha->hw)) { |
5501 | fcport->fcp_prio = priority & 0xf; | |
5502 | return QLA_SUCCESS; | |
5503 | } | |
5504 | ||
21090cbe | 5505 | ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); |
cfb0919c CD |
5506 | if (ret == QLA_SUCCESS) { |
5507 | if (fcport->fcp_prio != priority) | |
5508 | ql_dbg(ql_dbg_user, vha, 0x709e, | |
5509 | "Updated FCP_CMND priority - value=%d loop_id=%d " | |
5510 | "port_id=%02x%02x%02x.\n", priority, | |
5511 | fcport->loop_id, fcport->d_id.b.domain, | |
5512 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
a00f6296 | 5513 | fcport->fcp_prio = priority & 0xf; |
cfb0919c | 5514 | } else |
7c3df132 | 5515 | ql_dbg(ql_dbg_user, vha, 0x704f, |
cfb0919c CD |
5516 | "Unable to update FCP_CMND priority - ret=0x%x for " |
5517 | "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, | |
5518 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
5519 | fcport->d_id.b.al_pa); | |
09ff701a SR |
5520 | return ret; |
5521 | } | |
5522 | ||
5523 | /* | |
5524 | * qla24xx_update_all_fcp_prio | |
5525 | * Activates fcp priority for all the logged in ports | |
5526 | * | |
5527 | * Input: | |
5528 | * ha = adapter block pointer. | |
5529 | * | |
5530 | * Return: | |
5531 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5532 | * | |
5533 | * Context: | |
5534 | * Kernel context. | |
5535 | */ | |
5536 | int | |
5537 | qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) | |
5538 | { | |
5539 | int ret; | |
5540 | fc_port_t *fcport; | |
5541 | ||
5542 | ret = QLA_FUNCTION_FAILED; | |
5543 | /* We need to set priority for all logged in ports */ | |
5544 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
5545 | ret = qla24xx_update_fcport_fcp_prio(vha, fcport); | |
5546 | ||
5547 | return ret; | |
5548 | } |