Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
01e58d8e | 3 | * Copyright (c) 2003-2008 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
0107109e | 11 | #include <linux/vmalloc.h> |
1da177e4 LT |
12 | |
13 | #include "qla_devtbl.h" | |
14 | ||
4e08df3f DM |
15 | #ifdef CONFIG_SPARC |
16 | #include <asm/prom.h> | |
4e08df3f DM |
17 | #endif |
18 | ||
1da177e4 LT |
19 | /* |
20 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
21 | */ | |
1da177e4 | 22 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 23 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
24 | static int qla2x00_init_rings(scsi_qla_host_t *); |
25 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
26 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
27 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
28 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
29 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
30 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
31 | static int qla2x00_device_resync(scsi_qla_host_t *); | |
32 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, | |
33 | uint16_t *); | |
1da177e4 LT |
34 | |
35 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 36 | |
e315cd28 | 37 | static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *); |
413975a0 | 38 | |
4d4df193 HK |
39 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
40 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 41 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 42 | |
1da177e4 LT |
43 | /****************************************************************************/ |
44 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
45 | /****************************************************************************/ | |
46 | ||
47 | /* | |
48 | * qla2x00_initialize_adapter | |
49 | * Initialize board. | |
50 | * | |
51 | * Input: | |
52 | * ha = adapter block pointer. | |
53 | * | |
54 | * Returns: | |
55 | * 0 = success | |
56 | */ | |
57 | int | |
e315cd28 | 58 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
59 | { |
60 | int rval; | |
e315cd28 | 61 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 62 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 63 | |
1da177e4 | 64 | /* Clear adapter flags. */ |
e315cd28 | 65 | vha->flags.online = 0; |
2533cf67 | 66 | ha->flags.chip_reset_done = 0; |
e315cd28 AC |
67 | vha->flags.reset_active = 0; |
68 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
69 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
70 | vha->device_flags = DFLG_NO_CABLE; | |
71 | vha->dpc_flags = 0; | |
72 | vha->flags.management_server_logged_in = 0; | |
73 | vha->marker_needed = 0; | |
1da177e4 LT |
74 | ha->isp_abort_cnt = 0; |
75 | ha->beacon_blink_led = 0; | |
e315cd28 | 76 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); |
1da177e4 | 77 | |
73208dfd AC |
78 | set_bit(0, ha->req_qid_map); |
79 | set_bit(0, ha->rsp_qid_map); | |
80 | ||
0107109e | 81 | qla_printk(KERN_INFO, ha, "Configuring PCI space...\n"); |
e315cd28 | 82 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 83 | if (rval) { |
7c98a046 | 84 | DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n", |
e315cd28 | 85 | vha->host_no)); |
1da177e4 LT |
86 | return (rval); |
87 | } | |
88 | ||
e315cd28 | 89 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 90 | |
e315cd28 | 91 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 AV |
92 | if (rval) { |
93 | DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n", | |
e315cd28 | 94 | vha->host_no)); |
c00d8994 AV |
95 | return (rval); |
96 | } | |
97 | ||
73208dfd | 98 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 99 | |
1da177e4 | 100 | qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n"); |
0107109e | 101 | |
e315cd28 | 102 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 103 | |
d4c760c2 AV |
104 | if (ha->flags.disable_serdes) { |
105 | /* Mask HBA via NVRAM settings? */ | |
106 | qla_printk(KERN_INFO, ha, "Masking HBA WWPN " | |
107 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", | |
e315cd28 AC |
108 | vha->port_name[0], vha->port_name[1], |
109 | vha->port_name[2], vha->port_name[3], | |
110 | vha->port_name[4], vha->port_name[5], | |
111 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
112 | return QLA_FUNCTION_FAILED; |
113 | } | |
114 | ||
1da177e4 LT |
115 | qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n"); |
116 | ||
e315cd28 AC |
117 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
118 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
119 | if (rval) |
120 | return (rval); | |
e315cd28 | 121 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
122 | if (rval) |
123 | return (rval); | |
1da177e4 | 124 | } |
4d4df193 | 125 | if (IS_QLA84XX(ha)) { |
e315cd28 | 126 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 HK |
127 | if (!ha->cs84xx) { |
128 | qla_printk(KERN_ERR, ha, | |
129 | "Unable to configure ISP84XX.\n"); | |
130 | return QLA_FUNCTION_FAILED; | |
131 | } | |
132 | } | |
e315cd28 | 133 | rval = qla2x00_init_rings(vha); |
2533cf67 | 134 | ha->flags.chip_reset_done = 1; |
1da177e4 LT |
135 | |
136 | return (rval); | |
137 | } | |
138 | ||
139 | /** | |
abbd8870 | 140 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
141 | * @ha: HA context |
142 | * | |
143 | * Returns 0 on success. | |
144 | */ | |
abbd8870 | 145 | int |
e315cd28 | 146 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 147 | { |
a157b101 | 148 | uint16_t w; |
abbd8870 | 149 | unsigned long flags; |
e315cd28 | 150 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 151 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 152 | |
1da177e4 | 153 | pci_set_master(ha->pdev); |
af6177d8 | 154 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 155 | |
1da177e4 | 156 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 157 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
158 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
159 | ||
737faece | 160 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
161 | |
162 | /* Get PCI bus information. */ | |
163 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 164 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
165 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
166 | ||
abbd8870 AV |
167 | return QLA_SUCCESS; |
168 | } | |
1da177e4 | 169 | |
abbd8870 AV |
170 | /** |
171 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
172 | * @ha: HA context | |
173 | * | |
174 | * Returns 0 on success. | |
175 | */ | |
176 | int | |
e315cd28 | 177 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 178 | { |
a157b101 | 179 | uint16_t w; |
abbd8870 AV |
180 | unsigned long flags = 0; |
181 | uint32_t cnt; | |
e315cd28 | 182 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 183 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 184 | |
abbd8870 | 185 | pci_set_master(ha->pdev); |
af6177d8 | 186 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 187 | |
abbd8870 | 188 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 189 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 190 | |
abbd8870 AV |
191 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
192 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 193 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 194 | |
abbd8870 AV |
195 | /* |
196 | * If this is a 2300 card and not 2312, reset the | |
197 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
198 | * the 2310 also reports itself as a 2300 so we need to get the | |
199 | * fb revision level -- a 6 indicates it really is a 2300 and | |
200 | * not a 2310. | |
201 | */ | |
202 | if (IS_QLA2300(ha)) { | |
203 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 204 | |
abbd8870 | 205 | /* Pause RISC. */ |
3d71644c | 206 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 207 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 208 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 209 | break; |
1da177e4 | 210 | |
abbd8870 AV |
211 | udelay(10); |
212 | } | |
1da177e4 | 213 | |
abbd8870 | 214 | /* Select FPM registers. */ |
3d71644c AV |
215 | WRT_REG_WORD(®->ctrl_status, 0x20); |
216 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
217 | |
218 | /* Get the fb rev level */ | |
3d71644c | 219 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
220 | |
221 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 222 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
223 | |
224 | /* Deselect FPM registers. */ | |
3d71644c AV |
225 | WRT_REG_WORD(®->ctrl_status, 0x0); |
226 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
227 | |
228 | /* Release RISC module. */ | |
3d71644c | 229 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 230 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 231 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
232 | break; |
233 | ||
234 | udelay(10); | |
1da177e4 | 235 | } |
1da177e4 | 236 | |
abbd8870 AV |
237 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
238 | } | |
1da177e4 | 239 | |
abbd8870 AV |
240 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
241 | ||
737faece | 242 | pci_disable_rom(ha->pdev); |
1da177e4 | 243 | |
abbd8870 AV |
244 | /* Get PCI bus information. */ |
245 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 246 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
247 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
248 | ||
249 | return QLA_SUCCESS; | |
1da177e4 LT |
250 | } |
251 | ||
0107109e AV |
252 | /** |
253 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
254 | * @ha: HA context | |
255 | * | |
256 | * Returns 0 on success. | |
257 | */ | |
258 | int | |
e315cd28 | 259 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 260 | { |
a157b101 | 261 | uint16_t w; |
0107109e | 262 | unsigned long flags = 0; |
e315cd28 | 263 | struct qla_hw_data *ha = vha->hw; |
0107109e | 264 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
265 | |
266 | pci_set_master(ha->pdev); | |
af6177d8 | 267 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
268 | |
269 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 270 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
271 | w &= ~PCI_COMMAND_INTX_DISABLE; |
272 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
273 | ||
274 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
275 | ||
276 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
277 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
278 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
279 | |
280 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
281 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
282 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 283 | |
737faece | 284 | pci_disable_rom(ha->pdev); |
0107109e | 285 | |
44c10138 | 286 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 287 | |
0107109e AV |
288 | /* Get PCI bus information. */ |
289 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
290 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
291 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
292 | ||
293 | return QLA_SUCCESS; | |
294 | } | |
295 | ||
c3a2f0df AV |
296 | /** |
297 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
298 | * @ha: HA context | |
299 | * | |
300 | * Returns 0 on success. | |
301 | */ | |
302 | int | |
e315cd28 | 303 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
304 | { |
305 | uint16_t w; | |
e315cd28 | 306 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
307 | |
308 | pci_set_master(ha->pdev); | |
309 | pci_try_set_mwi(ha->pdev); | |
310 | ||
311 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
312 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
313 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
314 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
315 | ||
316 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
317 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
318 | pcie_set_readrq(ha->pdev, 2048); | |
319 | ||
737faece | 320 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
321 | |
322 | ha->chip_revision = ha->pdev->revision; | |
323 | ||
324 | return QLA_SUCCESS; | |
325 | } | |
326 | ||
1da177e4 LT |
327 | /** |
328 | * qla2x00_isp_firmware() - Choose firmware image. | |
329 | * @ha: HA context | |
330 | * | |
331 | * Returns 0 on success. | |
332 | */ | |
333 | static int | |
e315cd28 | 334 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
335 | { |
336 | int rval; | |
42e421b1 AV |
337 | uint16_t loop_id, topo, sw_cap; |
338 | uint8_t domain, area, al_pa; | |
e315cd28 | 339 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
340 | |
341 | /* Assume loading risc code */ | |
fa2a1ce5 | 342 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
343 | |
344 | if (ha->flags.disable_risc_code_load) { | |
345 | DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n", | |
e315cd28 | 346 | vha->host_no)); |
1da177e4 LT |
347 | qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n"); |
348 | ||
349 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 350 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
351 | if (rval == QLA_SUCCESS) { |
352 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 353 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
354 | &area, &domain, &topo, &sw_cap); |
355 | } | |
1da177e4 LT |
356 | } |
357 | ||
358 | if (rval) { | |
359 | DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n", | |
e315cd28 | 360 | vha->host_no)); |
1da177e4 LT |
361 | } |
362 | ||
363 | return (rval); | |
364 | } | |
365 | ||
366 | /** | |
367 | * qla2x00_reset_chip() - Reset ISP chip. | |
368 | * @ha: HA context | |
369 | * | |
370 | * Returns 0 on success. | |
371 | */ | |
abbd8870 | 372 | void |
e315cd28 | 373 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
374 | { |
375 | unsigned long flags = 0; | |
e315cd28 | 376 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 377 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 378 | uint32_t cnt; |
1da177e4 LT |
379 | uint16_t cmd; |
380 | ||
fd34f556 | 381 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
382 | |
383 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
384 | ||
385 | /* Turn off master enable */ | |
386 | cmd = 0; | |
387 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
388 | cmd &= ~PCI_COMMAND_MASTER; | |
389 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
390 | ||
391 | if (!IS_QLA2100(ha)) { | |
392 | /* Pause RISC. */ | |
393 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
394 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
395 | for (cnt = 0; cnt < 30000; cnt++) { | |
396 | if ((RD_REG_WORD(®->hccr) & | |
397 | HCCR_RISC_PAUSE) != 0) | |
398 | break; | |
399 | udelay(100); | |
400 | } | |
401 | } else { | |
402 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
403 | udelay(10); | |
404 | } | |
405 | ||
406 | /* Select FPM registers. */ | |
407 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
408 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
409 | ||
410 | /* FPM Soft Reset. */ | |
411 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
412 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
413 | ||
414 | /* Toggle Fpm Reset. */ | |
415 | if (!IS_QLA2200(ha)) { | |
416 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
417 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
418 | } | |
419 | ||
420 | /* Select frame buffer registers. */ | |
421 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
422 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
423 | ||
424 | /* Reset frame buffer FIFOs. */ | |
425 | if (IS_QLA2200(ha)) { | |
426 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
427 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
428 | } else { | |
429 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
430 | ||
431 | /* Read back fb_cmd until zero or 3 seconds max */ | |
432 | for (cnt = 0; cnt < 3000; cnt++) { | |
433 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
434 | break; | |
435 | udelay(100); | |
436 | } | |
437 | } | |
438 | ||
439 | /* Select RISC module registers. */ | |
440 | WRT_REG_WORD(®->ctrl_status, 0); | |
441 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
442 | ||
443 | /* Reset RISC processor. */ | |
444 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
445 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
446 | ||
447 | /* Release RISC processor. */ | |
448 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
449 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
450 | } | |
451 | ||
452 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
453 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
454 | ||
455 | /* Reset ISP chip. */ | |
456 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
457 | ||
458 | /* Wait for RISC to recover from reset. */ | |
459 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
460 | /* | |
461 | * It is necessary to for a delay here since the card doesn't | |
462 | * respond to PCI reads during a reset. On some architectures | |
463 | * this will result in an MCA. | |
464 | */ | |
465 | udelay(20); | |
466 | for (cnt = 30000; cnt; cnt--) { | |
467 | if ((RD_REG_WORD(®->ctrl_status) & | |
468 | CSR_ISP_SOFT_RESET) == 0) | |
469 | break; | |
470 | udelay(100); | |
471 | } | |
472 | } else | |
473 | udelay(10); | |
474 | ||
475 | /* Reset RISC processor. */ | |
476 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
477 | ||
478 | WRT_REG_WORD(®->semaphore, 0); | |
479 | ||
480 | /* Release RISC processor. */ | |
481 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
482 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
483 | ||
484 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
485 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 486 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 487 | break; |
1da177e4 LT |
488 | |
489 | udelay(100); | |
490 | } | |
491 | } else | |
492 | udelay(100); | |
493 | ||
494 | /* Turn on master enable */ | |
495 | cmd |= PCI_COMMAND_MASTER; | |
496 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
497 | ||
498 | /* Disable RISC pause on FPM parity error. */ | |
499 | if (!IS_QLA2100(ha)) { | |
500 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
501 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
502 | } | |
503 | ||
504 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
505 | } | |
506 | ||
0107109e | 507 | /** |
88c26663 | 508 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
509 | * @ha: HA context |
510 | * | |
511 | * Returns 0 on success. | |
512 | */ | |
88c26663 | 513 | static inline void |
e315cd28 | 514 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
515 | { |
516 | unsigned long flags = 0; | |
e315cd28 | 517 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
518 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
519 | uint32_t cnt, d2; | |
335a1cc9 | 520 | uint16_t wd; |
0107109e | 521 | |
0107109e AV |
522 | spin_lock_irqsave(&ha->hardware_lock, flags); |
523 | ||
524 | /* Reset RISC. */ | |
525 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
526 | for (cnt = 0; cnt < 30000; cnt++) { | |
527 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
528 | break; | |
529 | ||
530 | udelay(10); | |
531 | } | |
532 | ||
533 | WRT_REG_DWORD(®->ctrl_status, | |
534 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 535 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 536 | |
335a1cc9 | 537 | udelay(100); |
88c26663 | 538 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
539 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
540 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
541 | udelay(5); | |
542 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
543 | barrier(); | |
544 | } | |
545 | ||
335a1cc9 | 546 | /* Wait for soft-reset to complete. */ |
0107109e AV |
547 | d2 = RD_REG_DWORD(®->ctrl_status); |
548 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
549 | udelay(5); | |
550 | d2 = RD_REG_DWORD(®->ctrl_status); | |
551 | barrier(); | |
552 | } | |
553 | ||
554 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
555 | RD_REG_DWORD(®->hccr); | |
556 | ||
557 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
558 | RD_REG_DWORD(®->hccr); | |
559 | ||
560 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
561 | RD_REG_DWORD(®->hccr); | |
562 | ||
563 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
564 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
565 | udelay(5); | |
566 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
567 | barrier(); | |
568 | } | |
569 | ||
570 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
571 | |
572 | if (IS_NOPOLLING_TYPE(ha)) | |
573 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
574 | } |
575 | ||
88c26663 AV |
576 | /** |
577 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
578 | * @ha: HA context | |
579 | * | |
580 | * Returns 0 on success. | |
581 | */ | |
582 | void | |
e315cd28 | 583 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 584 | { |
e315cd28 | 585 | struct qla_hw_data *ha = vha->hw; |
fd34f556 | 586 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
587 | |
588 | /* Perform RISC reset. */ | |
e315cd28 | 589 | qla24xx_reset_risc(vha); |
88c26663 AV |
590 | } |
591 | ||
1da177e4 LT |
592 | /** |
593 | * qla2x00_chip_diag() - Test chip for proper operation. | |
594 | * @ha: HA context | |
595 | * | |
596 | * Returns 0 on success. | |
597 | */ | |
abbd8870 | 598 | int |
e315cd28 | 599 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
600 | { |
601 | int rval; | |
e315cd28 | 602 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 603 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
604 | unsigned long flags = 0; |
605 | uint16_t data; | |
606 | uint32_t cnt; | |
607 | uint16_t mb[5]; | |
73208dfd | 608 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
609 | |
610 | /* Assume a failed state */ | |
611 | rval = QLA_FUNCTION_FAILED; | |
612 | ||
613 | DEBUG3(printk("scsi(%ld): Testing device at %lx.\n", | |
e315cd28 | 614 | vha->host_no, (u_long)®->flash_address)); |
1da177e4 LT |
615 | |
616 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
617 | ||
618 | /* Reset ISP chip. */ | |
619 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
620 | ||
621 | /* | |
622 | * We need to have a delay here since the card will not respond while | |
623 | * in reset causing an MCA on some architectures. | |
624 | */ | |
625 | udelay(20); | |
626 | data = qla2x00_debounce_register(®->ctrl_status); | |
627 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
628 | udelay(5); | |
629 | data = RD_REG_WORD(®->ctrl_status); | |
630 | barrier(); | |
631 | } | |
632 | ||
633 | if (!cnt) | |
634 | goto chip_diag_failed; | |
635 | ||
636 | DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n", | |
7640335e | 637 | vha->host_no)); |
1da177e4 LT |
638 | |
639 | /* Reset RISC processor. */ | |
640 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
641 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
642 | ||
643 | /* Workaround for QLA2312 PCI parity error */ | |
644 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
645 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
646 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
647 | udelay(5); | |
648 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 649 | barrier(); |
1da177e4 LT |
650 | } |
651 | } else | |
652 | udelay(10); | |
653 | ||
654 | if (!cnt) | |
655 | goto chip_diag_failed; | |
656 | ||
657 | /* Check product ID of chip */ | |
7640335e | 658 | DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no)); |
1da177e4 LT |
659 | |
660 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
661 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
662 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
663 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
664 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
665 | mb[3] != PROD_ID_3) { | |
666 | qla_printk(KERN_WARNING, ha, | |
667 | "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]); | |
668 | ||
669 | goto chip_diag_failed; | |
670 | } | |
671 | ha->product_id[0] = mb[1]; | |
672 | ha->product_id[1] = mb[2]; | |
673 | ha->product_id[2] = mb[3]; | |
674 | ha->product_id[3] = mb[4]; | |
675 | ||
676 | /* Adjust fw RISC transfer size */ | |
73208dfd | 677 | if (req->length > 1024) |
1da177e4 LT |
678 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
679 | else | |
680 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 681 | req->length; |
1da177e4 LT |
682 | |
683 | if (IS_QLA2200(ha) && | |
684 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
685 | /* Limit firmware transfer size with a 2200A */ | |
686 | DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n", | |
e315cd28 | 687 | vha->host_no)); |
1da177e4 | 688 | |
ea5b6382 | 689 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
690 | ha->fw_transfer_size = 128; |
691 | } | |
692 | ||
693 | /* Wrap Incoming Mailboxes Test. */ | |
694 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
695 | ||
e315cd28 AC |
696 | DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no)); |
697 | rval = qla2x00_mbx_reg_test(vha); | |
1da177e4 LT |
698 | if (rval) { |
699 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 700 | vha->host_no)); |
1da177e4 LT |
701 | qla_printk(KERN_WARNING, ha, |
702 | "Failed mailbox send register test\n"); | |
703 | } | |
704 | else { | |
705 | /* Flag a successful rval */ | |
706 | rval = QLA_SUCCESS; | |
707 | } | |
708 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
709 | ||
710 | chip_diag_failed: | |
711 | if (rval) | |
712 | DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED " | |
e315cd28 | 713 | "****\n", vha->host_no)); |
1da177e4 LT |
714 | |
715 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
716 | ||
717 | return (rval); | |
718 | } | |
719 | ||
0107109e AV |
720 | /** |
721 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
722 | * @ha: HA context | |
723 | * | |
724 | * Returns 0 on success. | |
725 | */ | |
726 | int | |
e315cd28 | 727 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
728 | { |
729 | int rval; | |
e315cd28 | 730 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 731 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 732 | |
73208dfd | 733 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 734 | |
e315cd28 | 735 | rval = qla2x00_mbx_reg_test(vha); |
0107109e AV |
736 | if (rval) { |
737 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 738 | vha->host_no)); |
0107109e AV |
739 | qla_printk(KERN_WARNING, ha, |
740 | "Failed mailbox send register test\n"); | |
741 | } else { | |
742 | /* Flag a successful rval */ | |
743 | rval = QLA_SUCCESS; | |
744 | } | |
745 | ||
746 | return rval; | |
747 | } | |
748 | ||
a7a167bf | 749 | void |
e315cd28 | 750 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 751 | { |
a7a167bf AV |
752 | int rval; |
753 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 754 | eft_size, fce_size, mq_size; |
df613b96 AV |
755 | dma_addr_t tc_dma; |
756 | void *tc; | |
e315cd28 | 757 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
758 | struct req_que *req = ha->req_q_map[0]; |
759 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
760 | |
761 | if (ha->fw_dump) { | |
762 | qla_printk(KERN_WARNING, ha, | |
763 | "Firmware dump previously allocated.\n"); | |
764 | return; | |
765 | } | |
d4e3e04d | 766 | |
0107109e | 767 | ha->fw_dumped = 0; |
73208dfd | 768 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 769 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 770 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 771 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
772 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
773 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
774 | sizeof(uint16_t); | |
e428924c | 775 | } else if (IS_FWI2_CAPABLE(ha)) { |
3a03eb79 AV |
776 | if (IS_QLA81XX(ha)) |
777 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
778 | else if (IS_QLA25XX(ha)) | |
779 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
780 | else | |
781 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
782 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
783 | sizeof(uint32_t); | |
73208dfd AC |
784 | if (ha->mqenable) |
785 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
df613b96 | 786 | /* Allocate memory for Fibre Channel Event Buffer. */ |
3a03eb79 | 787 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
436a7b11 | 788 | goto try_eft; |
df613b96 AV |
789 | |
790 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
791 | GFP_KERNEL); | |
792 | if (!tc) { | |
793 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
794 | "(%d KB) for FCE.\n", FCE_SIZE / 1024); | |
17d98630 | 795 | goto try_eft; |
df613b96 AV |
796 | } |
797 | ||
798 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 799 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
800 | ha->fce_mb, &ha->fce_bufs); |
801 | if (rval) { | |
802 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
803 | "FCE (%d).\n", rval); | |
804 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, | |
805 | tc_dma); | |
806 | ha->flags.fce_enabled = 0; | |
17d98630 | 807 | goto try_eft; |
df613b96 AV |
808 | } |
809 | ||
810 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n", | |
811 | FCE_SIZE / 1024); | |
812 | ||
7d9dade3 | 813 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
814 | ha->flags.fce_enabled = 1; |
815 | ha->fce_dma = tc_dma; | |
816 | ha->fce = tc; | |
436a7b11 AV |
817 | try_eft: |
818 | /* Allocate memory for Extended Trace Buffer. */ | |
819 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
820 | GFP_KERNEL); | |
821 | if (!tc) { | |
822 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
823 | "(%d KB) for EFT.\n", EFT_SIZE / 1024); | |
824 | goto cont_alloc; | |
825 | } | |
826 | ||
827 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 828 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 AV |
829 | if (rval) { |
830 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
831 | "EFT (%d).\n", rval); | |
832 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, | |
833 | tc_dma); | |
834 | goto cont_alloc; | |
835 | } | |
836 | ||
837 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n", | |
838 | EFT_SIZE / 1024); | |
839 | ||
840 | eft_size = EFT_SIZE; | |
841 | ha->eft_dma = tc_dma; | |
842 | ha->eft = tc; | |
d4e3e04d | 843 | } |
a7a167bf | 844 | cont_alloc: |
73208dfd AC |
845 | req_q_size = req->length * sizeof(request_t); |
846 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
847 | |
848 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 849 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
850 | ha->chain_offset = dump_size; |
851 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
852 | |
853 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 854 | if (!ha->fw_dump) { |
0107109e | 855 | qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for " |
d4e3e04d | 856 | "firmware dump!!!\n", dump_size / 1024); |
a7a167bf AV |
857 | |
858 | if (ha->eft) { | |
859 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
860 | ha->eft_dma); | |
861 | ha->eft = NULL; | |
862 | ha->eft_dma = 0; | |
863 | } | |
864 | return; | |
865 | } | |
a7a167bf AV |
866 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n", |
867 | dump_size / 1024); | |
868 | ||
869 | ha->fw_dump_len = dump_size; | |
870 | ha->fw_dump->signature[0] = 'Q'; | |
871 | ha->fw_dump->signature[1] = 'L'; | |
872 | ha->fw_dump->signature[2] = 'G'; | |
873 | ha->fw_dump->signature[3] = 'C'; | |
874 | ha->fw_dump->version = __constant_htonl(1); | |
875 | ||
876 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
877 | ha->fw_dump->mem_size = htonl(mem_size); | |
878 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
879 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
880 | ||
881 | ha->fw_dump->eft_size = htonl(eft_size); | |
882 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
883 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
884 | ||
885 | ha->fw_dump->header_size = | |
886 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
887 | } |
888 | ||
1da177e4 LT |
889 | /** |
890 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
891 | * @ha: HA context | |
892 | * | |
893 | * Returns 0 on success. | |
894 | */ | |
895 | static int | |
e315cd28 | 896 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 897 | { |
0107109e AV |
898 | int rval; |
899 | uint32_t srisc_address = 0; | |
e315cd28 | 900 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
901 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
902 | unsigned long flags; | |
dda772e8 | 903 | uint16_t fw_major_version; |
3db0652e AV |
904 | |
905 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { | |
906 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
907 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
908 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
909 | RD_REG_WORD(®->hccr); | |
910 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
911 | } | |
1da177e4 LT |
912 | |
913 | /* Load firmware sequences */ | |
e315cd28 | 914 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 915 | if (rval == QLA_SUCCESS) { |
1da177e4 | 916 | DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC " |
e315cd28 | 917 | "code.\n", vha->host_no)); |
1da177e4 | 918 | |
e315cd28 | 919 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
920 | if (rval == QLA_SUCCESS) { |
921 | /* Start firmware execution. */ | |
922 | DEBUG(printk("scsi(%ld): Checksum OK, start " | |
e315cd28 | 923 | "firmware.\n", vha->host_no)); |
1da177e4 | 924 | |
e315cd28 | 925 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 926 | /* Retrieve firmware information. */ |
dda772e8 AV |
927 | if (rval == QLA_SUCCESS) { |
928 | fw_major_version = ha->fw_major_version; | |
ca9e9c3e | 929 | rval = qla2x00_get_fw_version(vha, |
1da177e4 LT |
930 | &ha->fw_major_version, |
931 | &ha->fw_minor_version, | |
932 | &ha->fw_subminor_version, | |
3a03eb79 | 933 | &ha->fw_attributes, &ha->fw_memory_size, |
55a96158 AV |
934 | ha->mpi_version, &ha->mpi_capabilities, |
935 | ha->phy_version); | |
ca9e9c3e AV |
936 | if (rval != QLA_SUCCESS) |
937 | goto failed; | |
938 | ||
2c3dfe3f | 939 | ha->flags.npiv_supported = 0; |
e315cd28 | 940 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 941 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 942 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
943 | if ((!ha->max_npiv_vports) || |
944 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 945 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 946 | ha->max_npiv_vports = |
eb66dc60 | 947 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 948 | } |
24a08138 AV |
949 | qla2x00_get_resource_cnts(vha, NULL, |
950 | &ha->fw_xcb_count, NULL, NULL, | |
951 | &ha->max_npiv_vports); | |
d743de66 AV |
952 | |
953 | if (!fw_major_version && ql2xallocfwdump) | |
954 | qla2x00_alloc_fw_dump(vha); | |
1da177e4 LT |
955 | } |
956 | } else { | |
957 | DEBUG2(printk(KERN_INFO | |
958 | "scsi(%ld): ISP Firmware failed checksum.\n", | |
e315cd28 | 959 | vha->host_no)); |
1da177e4 LT |
960 | } |
961 | } | |
962 | ||
3db0652e AV |
963 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
964 | /* Enable proper parity. */ | |
965 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
966 | if (IS_QLA2300(ha)) | |
967 | /* SRAM parity */ | |
968 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
969 | else | |
970 | /* SRAM, Instruction RAM and GP RAM parity */ | |
971 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
972 | RD_REG_WORD(®->hccr); | |
973 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
974 | } | |
975 | ||
1d2874de JC |
976 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
977 | uint32_t size; | |
978 | ||
979 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
980 | if (rval == QLA_SUCCESS) { | |
981 | ha->flags.fac_supported = 1; | |
982 | ha->fdt_block_size = size << 2; | |
983 | } else { | |
984 | qla_printk(KERN_ERR, ha, | |
985 | "Unsupported FAC firmware (%d.%02d.%02d).\n", | |
986 | ha->fw_major_version, ha->fw_minor_version, | |
987 | ha->fw_subminor_version); | |
988 | } | |
989 | } | |
ca9e9c3e | 990 | failed: |
1da177e4 LT |
991 | if (rval) { |
992 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", | |
e315cd28 | 993 | vha->host_no)); |
1da177e4 LT |
994 | } |
995 | ||
996 | return (rval); | |
997 | } | |
998 | ||
999 | /** | |
1000 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1001 | * @ha: HA context | |
1002 | * | |
1003 | * Beginning of request ring has initialization control block already built | |
1004 | * by nvram config routine. | |
1005 | * | |
1006 | * Returns 0 on success. | |
1007 | */ | |
73208dfd AC |
1008 | void |
1009 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1010 | { |
1011 | uint16_t cnt; | |
1012 | response_t *pkt; | |
1013 | ||
2afa19a9 AC |
1014 | rsp->ring_ptr = rsp->ring; |
1015 | rsp->ring_index = 0; | |
1016 | rsp->status_srb = NULL; | |
e315cd28 AC |
1017 | pkt = rsp->ring_ptr; |
1018 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1019 | pkt->signature = RESPONSE_PROCESSED; |
1020 | pkt++; | |
1021 | } | |
1da177e4 LT |
1022 | } |
1023 | ||
1024 | /** | |
1025 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1026 | * @ha: HA context | |
1027 | * | |
1028 | * Returns 0 on success. | |
1029 | */ | |
abbd8870 | 1030 | void |
e315cd28 | 1031 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1032 | { |
1033 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1034 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1035 | |
1036 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1037 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1038 | |
1039 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1040 | return; | |
1041 | ||
1042 | /* Serial Link options. */ | |
1043 | DEBUG3(printk("scsi(%ld): Serial link options:\n", | |
e315cd28 | 1044 | vha->host_no)); |
1da177e4 LT |
1045 | DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options, |
1046 | sizeof(ha->fw_seriallink_options))); | |
1047 | ||
1048 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1049 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1050 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1051 | ||
1052 | /* 1G settings */ | |
1053 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1054 | emphasis = (ha->fw_seriallink_options[2] & | |
1055 | (BIT_4 | BIT_3)) >> 3; | |
1056 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1057 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1058 | rx_sens = (ha->fw_seriallink_options[0] & |
1059 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1060 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1061 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1062 | if (rx_sens == 0x0) | |
1063 | rx_sens = 0x3; | |
1064 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1065 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1066 | ha->fw_options[10] |= BIT_5 | | |
1067 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1068 | (tx_sens & (BIT_1 | BIT_0)); | |
1069 | ||
1070 | /* 2G settings */ | |
1071 | swing = (ha->fw_seriallink_options[2] & | |
1072 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1073 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1074 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1075 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1076 | rx_sens = (ha->fw_seriallink_options[1] & |
1077 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1078 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1079 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1080 | if (rx_sens == 0x0) | |
1081 | rx_sens = 0x3; | |
1082 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1083 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1084 | ha->fw_options[11] |= BIT_5 | | |
1085 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1086 | (tx_sens & (BIT_1 | BIT_0)); | |
1087 | } | |
1088 | ||
1089 | /* FCP2 options. */ | |
1090 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1091 | ha->fw_options[3] |= BIT_13; | |
1092 | ||
1093 | /* LED scheme. */ | |
1094 | if (ha->flags.enable_led_scheme) | |
1095 | ha->fw_options[2] |= BIT_12; | |
1096 | ||
48c02fde | 1097 | /* Detect ISP6312. */ |
1098 | if (IS_QLA6312(ha)) | |
1099 | ha->fw_options[2] |= BIT_13; | |
1100 | ||
1da177e4 | 1101 | /* Update firmware options. */ |
e315cd28 | 1102 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1103 | } |
1104 | ||
0107109e | 1105 | void |
e315cd28 | 1106 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1107 | { |
1108 | int rval; | |
e315cd28 | 1109 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
1110 | |
1111 | /* Update Serial Link options. */ | |
f94097ed | 1112 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1113 | return; |
1114 | ||
e315cd28 | 1115 | rval = qla2x00_set_serdes_params(vha, |
f94097ed | 1116 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1117 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1118 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e AV |
1119 | if (rval != QLA_SUCCESS) { |
1120 | qla_printk(KERN_WARNING, ha, | |
1121 | "Unable to update Serial Link options (%x).\n", rval); | |
1122 | } | |
1123 | } | |
1124 | ||
abbd8870 | 1125 | void |
e315cd28 | 1126 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1127 | { |
e315cd28 | 1128 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1129 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1130 | struct req_que *req = ha->req_q_map[0]; |
1131 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1132 | |
1133 | /* Setup ring parameters in initialization control block. */ | |
1134 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1135 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1136 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1137 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1138 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1139 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1140 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1141 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1142 | |
1143 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1144 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1145 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1146 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1147 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1148 | } | |
1149 | ||
0107109e | 1150 | void |
e315cd28 | 1151 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1152 | { |
e315cd28 | 1153 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1154 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1155 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1156 | struct qla_msix_entry *msix; | |
0107109e | 1157 | struct init_cb_24xx *icb; |
73208dfd AC |
1158 | uint16_t rid = 0; |
1159 | struct req_que *req = ha->req_q_map[0]; | |
1160 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1161 | |
73208dfd | 1162 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1163 | icb = (struct init_cb_24xx *)ha->init_cb; |
1164 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1165 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1166 | icb->request_q_length = cpu_to_le16(req->length); |
1167 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1168 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1169 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1170 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1171 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1172 | |
73208dfd AC |
1173 | if (ha->mqenable) { |
1174 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); | |
1175 | icb->rid = __constant_cpu_to_le16(rid); | |
1176 | if (ha->flags.msix_enabled) { | |
1177 | msix = &ha->msix_entries[1]; | |
1178 | DEBUG2_17(printk(KERN_INFO | |
2afa19a9 | 1179 | "Registering vector 0x%x for base que\n", msix->entry)); |
73208dfd AC |
1180 | icb->msix = cpu_to_le16(msix->entry); |
1181 | } | |
1182 | /* Use alternate PCI bus number */ | |
1183 | if (MSB(rid)) | |
1184 | icb->firmware_options_2 |= | |
1185 | __constant_cpu_to_le32(BIT_19); | |
1186 | /* Use alternate PCI devfn */ | |
1187 | if (LSB(rid)) | |
1188 | icb->firmware_options_2 |= | |
1189 | __constant_cpu_to_le32(BIT_18); | |
1190 | ||
618a7523 | 1191 | icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22); |
73208dfd | 1192 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1193 | |
1194 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1195 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1196 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1197 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1198 | } else { | |
1199 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1200 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1201 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1202 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1203 | } | |
1204 | /* PCI posting */ | |
1205 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1206 | } |
1207 | ||
1da177e4 LT |
1208 | /** |
1209 | * qla2x00_init_rings() - Initializes firmware. | |
1210 | * @ha: HA context | |
1211 | * | |
1212 | * Beginning of request ring has initialization control block already built | |
1213 | * by nvram config routine. | |
1214 | * | |
1215 | * Returns 0 on success. | |
1216 | */ | |
1217 | static int | |
e315cd28 | 1218 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1219 | { |
1220 | int rval; | |
1221 | unsigned long flags = 0; | |
29bdccbe | 1222 | int cnt, que; |
e315cd28 | 1223 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1224 | struct req_que *req; |
1225 | struct rsp_que *rsp; | |
1226 | struct scsi_qla_host *vp; | |
2c3dfe3f SJ |
1227 | struct mid_init_cb_24xx *mid_init_cb = |
1228 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1229 | |
1230 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1231 | ||
1232 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1233 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1234 | req = ha->req_q_map[que]; |
1235 | if (!req) | |
1236 | continue; | |
2afa19a9 | 1237 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1238 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1239 | |
2afa19a9 | 1240 | req->current_outstanding_cmd = 1; |
1da177e4 | 1241 | |
29bdccbe AC |
1242 | /* Initialize firmware. */ |
1243 | req->ring_ptr = req->ring; | |
1244 | req->ring_index = 0; | |
1245 | req->cnt = req->length; | |
1246 | } | |
1da177e4 | 1247 | |
2afa19a9 | 1248 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1249 | rsp = ha->rsp_q_map[que]; |
1250 | if (!rsp) | |
1251 | continue; | |
29bdccbe AC |
1252 | /* Initialize response queue entries */ |
1253 | qla2x00_init_response_q_entries(rsp); | |
1254 | } | |
1da177e4 | 1255 | |
29bdccbe AC |
1256 | /* Clear RSCN queue. */ |
1257 | list_for_each_entry(vp, &ha->vp_list, list) { | |
1258 | vp->rscn_in_ptr = 0; | |
1259 | vp->rscn_out_ptr = 0; | |
1260 | } | |
e315cd28 | 1261 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1262 | |
1263 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1264 | ||
1265 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1266 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1267 | |
e315cd28 | 1268 | DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no)); |
2c3dfe3f | 1269 | |
605aa2bc LC |
1270 | if (ha->flags.npiv_supported) { |
1271 | if (ha->operating_mode == LOOP) | |
1272 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1273 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1274 | } |
1275 | ||
24a08138 AV |
1276 | if (IS_FWI2_CAPABLE(ha)) { |
1277 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1278 | mid_init_cb->init_cb.execution_throttle = | |
1279 | cpu_to_le16(ha->fw_xcb_count); | |
1280 | } | |
2c3dfe3f | 1281 | |
e315cd28 | 1282 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 LT |
1283 | if (rval) { |
1284 | DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n", | |
e315cd28 | 1285 | vha->host_no)); |
1da177e4 LT |
1286 | } else { |
1287 | DEBUG3(printk("scsi(%ld): Init firmware -- success.\n", | |
e315cd28 | 1288 | vha->host_no)); |
1da177e4 LT |
1289 | } |
1290 | ||
1291 | return (rval); | |
1292 | } | |
1293 | ||
1294 | /** | |
1295 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1296 | * @ha: HA context | |
1297 | * | |
1298 | * Returns 0 on success. | |
1299 | */ | |
1300 | static int | |
e315cd28 | 1301 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1302 | { |
1303 | int rval; | |
4d4df193 | 1304 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1305 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1306 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
4d4df193 | 1307 | uint16_t state[3]; |
e315cd28 | 1308 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1309 | |
1310 | rval = QLA_SUCCESS; | |
1311 | ||
1312 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1313 | min_wait = 20; |
1da177e4 LT |
1314 | |
1315 | /* | |
1316 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1317 | * our own processing. | |
1318 | */ | |
1319 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1320 | wait_time = min_wait; | |
1321 | } | |
1322 | ||
1323 | /* Min wait time if loop down */ | |
1324 | mtime = jiffies + (min_wait * HZ); | |
1325 | ||
1326 | /* wait time before firmware ready */ | |
1327 | wtime = jiffies + (wait_time * HZ); | |
1328 | ||
1329 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1330 | if (!vha->flags.init_done) |
1da177e4 LT |
1331 | qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n"); |
1332 | ||
1333 | DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n", | |
e315cd28 | 1334 | vha->host_no)); |
1da177e4 LT |
1335 | |
1336 | do { | |
e315cd28 | 1337 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1338 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1339 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1340 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1341 | } |
4d4df193 HK |
1342 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
1343 | DEBUG16(printk("scsi(%ld): fw_state=%x " | |
e315cd28 | 1344 | "84xx=%x.\n", vha->host_no, state[0], |
4d4df193 HK |
1345 | state[2])); |
1346 | if ((state[2] & FSTATE_LOGGED_IN) && | |
1347 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
1348 | DEBUG16(printk("scsi(%ld): Sending " | |
e315cd28 | 1349 | "verify iocb.\n", vha->host_no)); |
4d4df193 HK |
1350 | |
1351 | cs84xx_time = jiffies; | |
e315cd28 | 1352 | rval = qla84xx_init_chip(vha); |
4d4df193 HK |
1353 | if (rval != QLA_SUCCESS) |
1354 | break; | |
1355 | ||
1356 | /* Add time taken to initialize. */ | |
1357 | cs84xx_time = jiffies - cs84xx_time; | |
1358 | wtime += cs84xx_time; | |
1359 | mtime += cs84xx_time; | |
1360 | DEBUG16(printk("scsi(%ld): Increasing " | |
1361 | "wait time by %ld. New time %ld\n", | |
e315cd28 | 1362 | vha->host_no, cs84xx_time, wtime)); |
4d4df193 HK |
1363 | } |
1364 | } else if (state[0] == FSTATE_READY) { | |
1da177e4 | 1365 | DEBUG(printk("scsi(%ld): F/W Ready - OK \n", |
e315cd28 | 1366 | vha->host_no)); |
1da177e4 | 1367 | |
e315cd28 | 1368 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1369 | &ha->login_timeout, &ha->r_a_tov); |
1370 | ||
1371 | rval = QLA_SUCCESS; | |
1372 | break; | |
1373 | } | |
1374 | ||
1375 | rval = QLA_FUNCTION_FAILED; | |
1376 | ||
e315cd28 | 1377 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1378 | state[0] != FSTATE_READY) { |
1da177e4 | 1379 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1380 | * other than Wait for Login. |
1381 | */ | |
1da177e4 LT |
1382 | if (time_after_eq(jiffies, mtime)) { |
1383 | qla_printk(KERN_INFO, ha, | |
1384 | "Cable is unplugged...\n"); | |
1385 | ||
e315cd28 | 1386 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1387 | break; |
1388 | } | |
1389 | } | |
1390 | } else { | |
1391 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
1392 | if (time_after_eq(jiffies, mtime)) | |
1393 | break; | |
1394 | } | |
1395 | ||
1396 | if (time_after_eq(jiffies, wtime)) | |
1397 | break; | |
1398 | ||
1399 | /* Delay for a while */ | |
1400 | msleep(500); | |
1401 | ||
1402 | DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1403 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1404 | } while (1); |
1405 | ||
1406 | DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1407 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1408 | |
1409 | if (rval) { | |
1410 | DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n", | |
e315cd28 | 1411 | vha->host_no)); |
1da177e4 LT |
1412 | } |
1413 | ||
1414 | return (rval); | |
1415 | } | |
1416 | ||
1417 | /* | |
1418 | * qla2x00_configure_hba | |
1419 | * Setup adapter context. | |
1420 | * | |
1421 | * Input: | |
1422 | * ha = adapter state pointer. | |
1423 | * | |
1424 | * Returns: | |
1425 | * 0 = success | |
1426 | * | |
1427 | * Context: | |
1428 | * Kernel context. | |
1429 | */ | |
1430 | static int | |
e315cd28 | 1431 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1432 | { |
1433 | int rval; | |
1434 | uint16_t loop_id; | |
1435 | uint16_t topo; | |
2c3dfe3f | 1436 | uint16_t sw_cap; |
1da177e4 LT |
1437 | uint8_t al_pa; |
1438 | uint8_t area; | |
1439 | uint8_t domain; | |
1440 | char connect_type[22]; | |
e315cd28 | 1441 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1442 | |
1443 | /* Get host addresses. */ | |
e315cd28 | 1444 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 1445 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 1446 | if (rval != QLA_SUCCESS) { |
e315cd28 | 1447 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
33135aa2 RA |
1448 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
1449 | DEBUG2(printk("%s(%ld) Loop is in a transition state\n", | |
e315cd28 | 1450 | __func__, vha->host_no)); |
33135aa2 RA |
1451 | } else { |
1452 | qla_printk(KERN_WARNING, ha, | |
1453 | "ERROR -- Unable to get host loop ID.\n"); | |
e315cd28 | 1454 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 1455 | } |
1da177e4 LT |
1456 | return (rval); |
1457 | } | |
1458 | ||
1459 | if (topo == 4) { | |
1460 | qla_printk(KERN_INFO, ha, | |
1461 | "Cannot get topology - retrying.\n"); | |
1462 | return (QLA_FUNCTION_FAILED); | |
1463 | } | |
1464 | ||
e315cd28 | 1465 | vha->loop_id = loop_id; |
1da177e4 LT |
1466 | |
1467 | /* initialize */ | |
1468 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
1469 | ha->operating_mode = LOOP; | |
2c3dfe3f | 1470 | ha->switch_cap = 0; |
1da177e4 LT |
1471 | |
1472 | switch (topo) { | |
1473 | case 0: | |
1474 | DEBUG3(printk("scsi(%ld): HBA in NL topology.\n", | |
e315cd28 | 1475 | vha->host_no)); |
1da177e4 LT |
1476 | ha->current_topology = ISP_CFG_NL; |
1477 | strcpy(connect_type, "(Loop)"); | |
1478 | break; | |
1479 | ||
1480 | case 1: | |
1481 | DEBUG3(printk("scsi(%ld): HBA in FL topology.\n", | |
e315cd28 | 1482 | vha->host_no)); |
2c3dfe3f | 1483 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1484 | ha->current_topology = ISP_CFG_FL; |
1485 | strcpy(connect_type, "(FL_Port)"); | |
1486 | break; | |
1487 | ||
1488 | case 2: | |
1489 | DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n", | |
e315cd28 | 1490 | vha->host_no)); |
1da177e4 LT |
1491 | ha->operating_mode = P2P; |
1492 | ha->current_topology = ISP_CFG_N; | |
1493 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
1494 | break; | |
1495 | ||
1496 | case 3: | |
1497 | DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n", | |
e315cd28 | 1498 | vha->host_no)); |
2c3dfe3f | 1499 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1500 | ha->operating_mode = P2P; |
1501 | ha->current_topology = ISP_CFG_F; | |
1502 | strcpy(connect_type, "(F_Port)"); | |
1503 | break; | |
1504 | ||
1505 | default: | |
1506 | DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. " | |
1507 | "Using NL.\n", | |
e315cd28 | 1508 | vha->host_no, topo)); |
1da177e4 LT |
1509 | ha->current_topology = ISP_CFG_NL; |
1510 | strcpy(connect_type, "(Loop)"); | |
1511 | break; | |
1512 | } | |
1513 | ||
1514 | /* Save Host port and loop ID. */ | |
1515 | /* byte order - Big Endian */ | |
e315cd28 AC |
1516 | vha->d_id.b.domain = domain; |
1517 | vha->d_id.b.area = area; | |
1518 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 1519 | |
e315cd28 | 1520 | if (!vha->flags.init_done) |
1da177e4 LT |
1521 | qla_printk(KERN_INFO, ha, |
1522 | "Topology - %s, Host Loop address 0x%x\n", | |
e315cd28 | 1523 | connect_type, vha->loop_id); |
1da177e4 LT |
1524 | |
1525 | if (rval) { | |
e315cd28 | 1526 | DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no)); |
1da177e4 | 1527 | } else { |
e315cd28 | 1528 | DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no)); |
1da177e4 LT |
1529 | } |
1530 | ||
1531 | return(rval); | |
1532 | } | |
1533 | ||
9bb9fcf2 | 1534 | static inline void |
e315cd28 AC |
1535 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
1536 | char *def) | |
9bb9fcf2 AV |
1537 | { |
1538 | char *st, *en; | |
1539 | uint16_t index; | |
e315cd28 | 1540 | struct qla_hw_data *ha = vha->hw; |
1b91a2e6 | 1541 | int use_tbl = !IS_QLA25XX(ha) && !IS_QLA81XX(ha); |
9bb9fcf2 AV |
1542 | |
1543 | if (memcmp(model, BINZERO, len) != 0) { | |
1544 | strncpy(ha->model_number, model, len); | |
1545 | st = en = ha->model_number; | |
1546 | en += len - 1; | |
1547 | while (en > st) { | |
1548 | if (*en != 0x20 && *en != 0x00) | |
1549 | break; | |
1550 | *en-- = '\0'; | |
1551 | } | |
1552 | ||
1553 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
1554 | if (use_tbl && |
1555 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 1556 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
1557 | strncpy(ha->model_desc, |
1558 | qla2x00_model_name[index * 2 + 1], | |
1559 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1560 | } else { |
1561 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
1562 | if (use_tbl && |
1563 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
1564 | index < QLA_MODEL_NAMES) { |
1565 | strcpy(ha->model_number, | |
1566 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
1567 | strncpy(ha->model_desc, |
1568 | qla2x00_model_name[index * 2 + 1], | |
1569 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1570 | } else { |
1571 | strcpy(ha->model_number, def); | |
1572 | } | |
1573 | } | |
1ee27146 | 1574 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 1575 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 1576 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
1577 | } |
1578 | ||
4e08df3f DM |
1579 | /* On sparc systems, obtain port and node WWN from firmware |
1580 | * properties. | |
1581 | */ | |
e315cd28 | 1582 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
1583 | { |
1584 | #ifdef CONFIG_SPARC | |
e315cd28 | 1585 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 1586 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
1587 | struct device_node *dp = pci_device_to_OF_node(pdev); |
1588 | const u8 *val; | |
4e08df3f DM |
1589 | int len; |
1590 | ||
1591 | val = of_get_property(dp, "port-wwn", &len); | |
1592 | if (val && len >= WWN_SIZE) | |
1593 | memcpy(nv->port_name, val, WWN_SIZE); | |
1594 | ||
1595 | val = of_get_property(dp, "node-wwn", &len); | |
1596 | if (val && len >= WWN_SIZE) | |
1597 | memcpy(nv->node_name, val, WWN_SIZE); | |
1598 | #endif | |
1599 | } | |
1600 | ||
1da177e4 LT |
1601 | /* |
1602 | * NVRAM configuration for ISP 2xxx | |
1603 | * | |
1604 | * Input: | |
1605 | * ha = adapter block pointer. | |
1606 | * | |
1607 | * Output: | |
1608 | * initialization control block in response_ring | |
1609 | * host adapters parameters in host adapter block | |
1610 | * | |
1611 | * Returns: | |
1612 | * 0 = success. | |
1613 | */ | |
abbd8870 | 1614 | int |
e315cd28 | 1615 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 1616 | { |
4e08df3f | 1617 | int rval; |
0107109e AV |
1618 | uint8_t chksum = 0; |
1619 | uint16_t cnt; | |
1620 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 1621 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1622 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
1623 | nvram_t *nv = ha->nvram; |
1624 | uint8_t *ptr = ha->nvram; | |
3d71644c | 1625 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 1626 | |
4e08df3f DM |
1627 | rval = QLA_SUCCESS; |
1628 | ||
1da177e4 | 1629 | /* Determine NVRAM starting address. */ |
0107109e | 1630 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
1631 | ha->nvram_base = 0; |
1632 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
1633 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
1634 | ha->nvram_base = 0x80; | |
1635 | ||
1636 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 1637 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
1638 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
1639 | chksum += *ptr++; | |
1da177e4 | 1640 | |
e315cd28 | 1641 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 1642 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
1da177e4 LT |
1643 | |
1644 | /* Bad NVRAM data, set defaults parameters. */ | |
1645 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
1646 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
1647 | /* Reset NVRAM data. */ | |
1648 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
1649 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
1650 | nv->nvram_version); | |
4e08df3f DM |
1651 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
1652 | "invalid -- WWPN) defaults.\n"); | |
1653 | ||
1654 | /* | |
1655 | * Set default initialization control block. | |
1656 | */ | |
1657 | memset(nv, 0, ha->nvram_size); | |
1658 | nv->parameter_block_version = ICB_VERSION; | |
1659 | ||
1660 | if (IS_QLA23XX(ha)) { | |
1661 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1662 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1663 | nv->add_firmware_options[0] = BIT_5; | |
1664 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1665 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
1666 | nv->special_options[1] = BIT_7; | |
1667 | } else if (IS_QLA2200(ha)) { | |
1668 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1669 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1670 | nv->add_firmware_options[0] = BIT_5; | |
1671 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1672 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1673 | } else if (IS_QLA2100(ha)) { | |
1674 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
1675 | nv->firmware_options[1] = BIT_5; | |
1676 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1677 | } | |
1678 | ||
1679 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
1680 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
1681 | nv->retry_count = 8; | |
1682 | nv->retry_delay = 1; | |
1683 | ||
1684 | nv->port_name[0] = 33; | |
1685 | nv->port_name[3] = 224; | |
1686 | nv->port_name[4] = 139; | |
1687 | ||
e315cd28 | 1688 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
1689 | |
1690 | nv->login_timeout = 4; | |
1691 | ||
1692 | /* | |
1693 | * Set default host adapter parameters | |
1694 | */ | |
1695 | nv->host_p[1] = BIT_2; | |
1696 | nv->reset_delay = 5; | |
1697 | nv->port_down_retry_count = 8; | |
1698 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
1699 | nv->link_down_timeout = 60; | |
1700 | ||
1701 | rval = 1; | |
1da177e4 LT |
1702 | } |
1703 | ||
1704 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
1705 | /* | |
1706 | * The SN2 does not provide BIOS emulation which means you can't change | |
1707 | * potentially bogus BIOS settings. Force the use of default settings | |
1708 | * for link rate and frame size. Hope that the rest of the settings | |
1709 | * are valid. | |
1710 | */ | |
1711 | if (ia64_platform_is("sn2")) { | |
1712 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
1713 | if (IS_QLA23XX(ha)) | |
1714 | nv->special_options[1] = BIT_7; | |
1715 | } | |
1716 | #endif | |
1717 | ||
1718 | /* Reset Initialization control block */ | |
0107109e | 1719 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
1720 | |
1721 | /* | |
1722 | * Setup driver NVRAM options. | |
1723 | */ | |
1724 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
1725 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
1726 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
1727 | nv->firmware_options[1] &= ~BIT_4; | |
1728 | ||
1729 | if (IS_QLA23XX(ha)) { | |
1730 | nv->firmware_options[0] |= BIT_2; | |
1731 | nv->firmware_options[0] &= ~BIT_3; | |
0107109e | 1732 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
1733 | |
1734 | if (IS_QLA2300(ha)) { | |
1735 | if (ha->fb_rev == FPM_2310) { | |
1736 | strcpy(ha->model_number, "QLA2310"); | |
1737 | } else { | |
1738 | strcpy(ha->model_number, "QLA2300"); | |
1739 | } | |
1740 | } else { | |
e315cd28 | 1741 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 1742 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
1743 | } |
1744 | } else if (IS_QLA2200(ha)) { | |
1745 | nv->firmware_options[0] |= BIT_2; | |
1746 | /* | |
1747 | * 'Point-to-point preferred, else loop' is not a safe | |
1748 | * connection mode setting. | |
1749 | */ | |
1750 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
1751 | (BIT_5 | BIT_4)) { | |
1752 | /* Force 'loop preferred, else point-to-point'. */ | |
1753 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
1754 | nv->add_firmware_options[0] |= BIT_5; | |
1755 | } | |
1756 | strcpy(ha->model_number, "QLA22xx"); | |
1757 | } else /*if (IS_QLA2100(ha))*/ { | |
1758 | strcpy(ha->model_number, "QLA2100"); | |
1759 | } | |
1760 | ||
1761 | /* | |
1762 | * Copy over NVRAM RISC parameter block to initialization control block. | |
1763 | */ | |
1764 | dptr1 = (uint8_t *)icb; | |
1765 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
1766 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
1767 | while (cnt--) | |
1768 | *dptr1++ = *dptr2++; | |
1769 | ||
1770 | /* Copy 2nd half. */ | |
1771 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
1772 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
1773 | while (cnt--) | |
1774 | *dptr1++ = *dptr2++; | |
1775 | ||
5341e868 AV |
1776 | /* Use alternate WWN? */ |
1777 | if (nv->host_p[1] & BIT_7) { | |
1778 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
1779 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
1780 | } | |
1781 | ||
1da177e4 LT |
1782 | /* Prepare nodename */ |
1783 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
1784 | /* | |
1785 | * Firmware will apply the following mask if the nodename was | |
1786 | * not provided. | |
1787 | */ | |
1788 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
1789 | icb->node_name[0] &= 0xF0; | |
1790 | } | |
1791 | ||
1792 | /* | |
1793 | * Set host adapter parameters. | |
1794 | */ | |
0181944f | 1795 | if (nv->host_p[0] & BIT_7) |
11010fec | 1796 | ql2xextended_error_logging = 1; |
1da177e4 LT |
1797 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
1798 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
1799 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
1800 | ha->flags.disable_risc_code_load = 0; | |
1801 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
1802 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
1803 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 1804 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 1805 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
1806 | |
1807 | ha->operating_mode = | |
1808 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1809 | ||
1810 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
1811 | sizeof(ha->fw_seriallink_options)); | |
1812 | ||
1813 | /* save HBA serial number */ | |
1814 | ha->serial0 = icb->port_name[5]; | |
1815 | ha->serial1 = icb->port_name[6]; | |
1816 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
1817 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
1818 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
1819 | |
1820 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
1821 | ||
1822 | ha->retry_count = nv->retry_count; | |
1823 | ||
1824 | /* Set minimum login_timeout to 4 seconds. */ | |
1825 | if (nv->login_timeout < ql2xlogintimeout) | |
1826 | nv->login_timeout = ql2xlogintimeout; | |
1827 | if (nv->login_timeout < 4) | |
1828 | nv->login_timeout = 4; | |
1829 | ha->login_timeout = nv->login_timeout; | |
1830 | icb->login_timeout = nv->login_timeout; | |
1831 | ||
00a537b8 AV |
1832 | /* Set minimum RATOV to 100 tenths of a second. */ |
1833 | ha->r_a_tov = 100; | |
1da177e4 | 1834 | |
1da177e4 LT |
1835 | ha->loop_reset_delay = nv->reset_delay; |
1836 | ||
1da177e4 LT |
1837 | /* Link Down Timeout = 0: |
1838 | * | |
1839 | * When Port Down timer expires we will start returning | |
1840 | * I/O's to OS with "DID_NO_CONNECT". | |
1841 | * | |
1842 | * Link Down Timeout != 0: | |
1843 | * | |
1844 | * The driver waits for the link to come up after link down | |
1845 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 1846 | */ |
1da177e4 LT |
1847 | if (nv->link_down_timeout == 0) { |
1848 | ha->loop_down_abort_time = | |
354d6b21 | 1849 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
1850 | } else { |
1851 | ha->link_down_timeout = nv->link_down_timeout; | |
1852 | ha->loop_down_abort_time = | |
1853 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 1854 | } |
1da177e4 | 1855 | |
1da177e4 LT |
1856 | /* |
1857 | * Need enough time to try and get the port back. | |
1858 | */ | |
1859 | ha->port_down_retry_count = nv->port_down_retry_count; | |
1860 | if (qlport_down_retry) | |
1861 | ha->port_down_retry_count = qlport_down_retry; | |
1862 | /* Set login_retry_count */ | |
1863 | ha->login_retry_count = nv->retry_count; | |
1864 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
1865 | ha->port_down_retry_count > 3) | |
1866 | ha->login_retry_count = ha->port_down_retry_count; | |
1867 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
1868 | ha->login_retry_count = ha->port_down_retry_count; | |
1869 | if (ql2xloginretrycount) | |
1870 | ha->login_retry_count = ql2xloginretrycount; | |
1871 | ||
1da177e4 LT |
1872 | icb->lun_enables = __constant_cpu_to_le16(0); |
1873 | icb->command_resource_count = 0; | |
1874 | icb->immediate_notify_resource_count = 0; | |
1875 | icb->timeout = __constant_cpu_to_le16(0); | |
1876 | ||
1877 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
1878 | /* Enable RIO */ | |
1879 | icb->firmware_options[0] &= ~BIT_3; | |
1880 | icb->add_firmware_options[0] &= | |
1881 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
1882 | icb->add_firmware_options[0] |= BIT_2; | |
1883 | icb->response_accumulation_timer = 3; | |
1884 | icb->interrupt_delay_timer = 5; | |
1885 | ||
e315cd28 | 1886 | vha->flags.process_response_queue = 1; |
1da177e4 | 1887 | } else { |
4fdfefe5 | 1888 | /* Enable ZIO. */ |
e315cd28 | 1889 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
1890 | ha->zio_mode = icb->add_firmware_options[0] & |
1891 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
1892 | ha->zio_timer = icb->interrupt_delay_timer ? | |
1893 | icb->interrupt_delay_timer: 2; | |
1894 | } | |
1da177e4 LT |
1895 | icb->add_firmware_options[0] &= |
1896 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 1897 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 1898 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 1899 | ha->zio_mode = QLA_ZIO_MODE_6; |
1900 | ||
4fdfefe5 | 1901 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer " |
e315cd28 | 1902 | "delay (%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 | 1903 | ha->zio_timer * 100)); |
1da177e4 | 1904 | qla_printk(KERN_INFO, ha, |
4fdfefe5 AV |
1905 | "ZIO mode %d enabled; timer delay (%d us).\n", |
1906 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 1907 | |
4fdfefe5 AV |
1908 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
1909 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 1910 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
1911 | } |
1912 | } | |
1913 | ||
4e08df3f DM |
1914 | if (rval) { |
1915 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 1916 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
1917 | } |
1918 | return (rval); | |
1da177e4 LT |
1919 | } |
1920 | ||
19a7b4ae JSEC |
1921 | static void |
1922 | qla2x00_rport_del(void *data) | |
1923 | { | |
1924 | fc_port_t *fcport = data; | |
d97994dc | 1925 | struct fc_rport *rport; |
d97994dc | 1926 | |
e315cd28 | 1927 | spin_lock_irq(fcport->vha->host->host_lock); |
d97994dc | 1928 | rport = fcport->drport; |
1929 | fcport->drport = NULL; | |
e315cd28 | 1930 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 1931 | if (rport) |
1932 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
1933 | } |
1934 | ||
1da177e4 LT |
1935 | /** |
1936 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
1937 | * @ha: HA context | |
1938 | * @flags: allocation flags | |
1939 | * | |
1940 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
1941 | */ | |
413975a0 | 1942 | static fc_port_t * |
e315cd28 | 1943 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
1944 | { |
1945 | fc_port_t *fcport; | |
1946 | ||
bbfbbbc1 MK |
1947 | fcport = kzalloc(sizeof(fc_port_t), flags); |
1948 | if (!fcport) | |
1949 | return NULL; | |
1da177e4 LT |
1950 | |
1951 | /* Setup fcport template structure. */ | |
e315cd28 AC |
1952 | fcport->vha = vha; |
1953 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
1954 | fcport->port_type = FCT_UNKNOWN; |
1955 | fcport->loop_id = FC_NO_LOOP_ID; | |
1da177e4 | 1956 | atomic_set(&fcport->state, FCS_UNCONFIGURED); |
ad3e0eda | 1957 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 1958 | |
bbfbbbc1 | 1959 | return fcport; |
1da177e4 LT |
1960 | } |
1961 | ||
1962 | /* | |
1963 | * qla2x00_configure_loop | |
1964 | * Updates Fibre Channel Device Database with what is actually on loop. | |
1965 | * | |
1966 | * Input: | |
1967 | * ha = adapter block pointer. | |
1968 | * | |
1969 | * Returns: | |
1970 | * 0 = success. | |
1971 | * 1 = error. | |
1972 | * 2 = database was full and device was not configured. | |
1973 | */ | |
1974 | static int | |
e315cd28 | 1975 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
1976 | { |
1977 | int rval; | |
1978 | unsigned long flags, save_flags; | |
e315cd28 | 1979 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1980 | rval = QLA_SUCCESS; |
1981 | ||
1982 | /* Get Initiator ID */ | |
e315cd28 AC |
1983 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
1984 | rval = qla2x00_configure_hba(vha); | |
1da177e4 LT |
1985 | if (rval != QLA_SUCCESS) { |
1986 | DEBUG(printk("scsi(%ld): Unable to configure HBA.\n", | |
e315cd28 | 1987 | vha->host_no)); |
1da177e4 LT |
1988 | return (rval); |
1989 | } | |
1990 | } | |
1991 | ||
e315cd28 | 1992 | save_flags = flags = vha->dpc_flags; |
1da177e4 | 1993 | DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n", |
e315cd28 | 1994 | vha->host_no, flags)); |
1da177e4 LT |
1995 | |
1996 | /* | |
1997 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
1998 | * both at the same time. | |
1999 | */ | |
e315cd28 AC |
2000 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2001 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 LT |
2002 | |
2003 | /* Determine what we need to do */ | |
2004 | if (ha->current_topology == ISP_CFG_FL && | |
2005 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2006 | ||
e315cd28 | 2007 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2008 | set_bit(RSCN_UPDATE, &flags); |
2009 | ||
2010 | } else if (ha->current_topology == ISP_CFG_F && | |
2011 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2012 | ||
e315cd28 | 2013 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2014 | set_bit(RSCN_UPDATE, &flags); |
2015 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2016 | |
2017 | } else if (ha->current_topology == ISP_CFG_N) { | |
2018 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2019 | |
e315cd28 | 2020 | } else if (!vha->flags.online || |
1da177e4 LT |
2021 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2022 | ||
e315cd28 | 2023 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2024 | set_bit(RSCN_UPDATE, &flags); |
2025 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2026 | } | |
2027 | ||
2028 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
e315cd28 | 2029 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
1da177e4 | 2030 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2031 | else |
2032 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2033 | } |
2034 | ||
2035 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
e315cd28 | 2036 | if (LOOP_TRANSITION(vha)) |
1da177e4 | 2037 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2038 | else |
2039 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2040 | } |
2041 | ||
2042 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2043 | if (atomic_read(&vha->loop_down_timer) || |
2044 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2045 | rval = QLA_FUNCTION_FAILED; |
2046 | } else { | |
e315cd28 | 2047 | atomic_set(&vha->loop_state, LOOP_READY); |
1da177e4 | 2048 | |
e315cd28 | 2049 | DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no)); |
1da177e4 LT |
2050 | } |
2051 | } | |
2052 | ||
2053 | if (rval) { | |
2054 | DEBUG2_3(printk("%s(%ld): *** FAILED ***\n", | |
e315cd28 | 2055 | __func__, vha->host_no)); |
1da177e4 LT |
2056 | } else { |
2057 | DEBUG3(printk("%s: exiting normally\n", __func__)); | |
2058 | } | |
2059 | ||
cc3ef7bc | 2060 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2061 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2062 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2063 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2064 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2065 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
f4658b6c AV |
2066 | vha->flags.rscn_queue_overflow = 1; |
2067 | } | |
1da177e4 LT |
2068 | } |
2069 | ||
2070 | return (rval); | |
2071 | } | |
2072 | ||
2073 | ||
2074 | ||
2075 | /* | |
2076 | * qla2x00_configure_local_loop | |
2077 | * Updates Fibre Channel Device Database with local loop devices. | |
2078 | * | |
2079 | * Input: | |
2080 | * ha = adapter block pointer. | |
2081 | * | |
2082 | * Returns: | |
2083 | * 0 = success. | |
2084 | */ | |
2085 | static int | |
e315cd28 | 2086 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2087 | { |
2088 | int rval, rval2; | |
2089 | int found_devs; | |
2090 | int found; | |
2091 | fc_port_t *fcport, *new_fcport; | |
2092 | ||
2093 | uint16_t index; | |
2094 | uint16_t entries; | |
2095 | char *id_iter; | |
2096 | uint16_t loop_id; | |
2097 | uint8_t domain, area, al_pa; | |
e315cd28 | 2098 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2099 | |
2100 | found_devs = 0; | |
2101 | new_fcport = NULL; | |
2102 | entries = MAX_FIBRE_DEVICES; | |
2103 | ||
e315cd28 AC |
2104 | DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no)); |
2105 | DEBUG3(qla2x00_get_fcal_position_map(vha, NULL)); | |
1da177e4 LT |
2106 | |
2107 | /* Get list of logged in devices. */ | |
2108 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2109 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2110 | &entries); |
2111 | if (rval != QLA_SUCCESS) | |
2112 | goto cleanup_allocation; | |
2113 | ||
2114 | DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n", | |
7640335e | 2115 | vha->host_no, entries)); |
1da177e4 LT |
2116 | DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list, |
2117 | entries * sizeof(struct gid_list_info))); | |
2118 | ||
2119 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2120 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2121 | if (new_fcport == NULL) { |
2122 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2123 | goto cleanup_allocation; | |
2124 | } | |
2125 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2126 | ||
2127 | /* | |
2128 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2129 | */ | |
e315cd28 | 2130 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2131 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2132 | fcport->port_type != FCT_BROADCAST && | |
2133 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2134 | ||
2135 | DEBUG(printk("scsi(%ld): Marking port lost, " | |
2136 | "loop_id=0x%04x\n", | |
e315cd28 | 2137 | vha->host_no, fcport->loop_id)); |
1da177e4 LT |
2138 | |
2139 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
1da177e4 LT |
2140 | } |
2141 | } | |
2142 | ||
2143 | /* Add devices to port list. */ | |
2144 | id_iter = (char *)ha->gid_list; | |
2145 | for (index = 0; index < entries; index++) { | |
2146 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2147 | area = ((struct gid_list_info *)id_iter)->area; | |
2148 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2149 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2150 | loop_id = (uint16_t) |
2151 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2152 | else |
1da177e4 LT |
2153 | loop_id = le16_to_cpu( |
2154 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2155 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2156 | |
2157 | /* Bypass reserved domain fields. */ | |
2158 | if ((domain & 0xf0) == 0xf0) | |
2159 | continue; | |
2160 | ||
2161 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2162 | if (area && domain && |
e315cd28 | 2163 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2164 | continue; |
2165 | ||
2166 | /* Bypass invalid local loop ID. */ | |
2167 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2168 | continue; | |
2169 | ||
2170 | /* Fill in member data. */ | |
2171 | new_fcport->d_id.b.domain = domain; | |
2172 | new_fcport->d_id.b.area = area; | |
2173 | new_fcport->d_id.b.al_pa = al_pa; | |
2174 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2175 | new_fcport->vp_idx = vha->vp_idx; |
2176 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 LT |
2177 | if (rval2 != QLA_SUCCESS) { |
2178 | DEBUG2(printk("scsi(%ld): Failed to retrieve fcport " | |
2179 | "information -- get_port_database=%x, " | |
2180 | "loop_id=0x%04x\n", | |
e315cd28 | 2181 | vha->host_no, rval2, new_fcport->loop_id)); |
c9d02acf | 2182 | DEBUG2(printk("scsi(%ld): Scheduling resync...\n", |
e315cd28 AC |
2183 | vha->host_no)); |
2184 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
2185 | continue; |
2186 | } | |
2187 | ||
2188 | /* Check for matching device in port list. */ | |
2189 | found = 0; | |
2190 | fcport = NULL; | |
e315cd28 | 2191 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2192 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2193 | WWN_SIZE)) | |
2194 | continue; | |
2195 | ||
ddb9b126 | 2196 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2197 | fcport->loop_id = new_fcport->loop_id; |
2198 | fcport->port_type = new_fcport->port_type; | |
2199 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2200 | memcpy(fcport->node_name, new_fcport->node_name, | |
2201 | WWN_SIZE); | |
2202 | ||
2203 | found++; | |
2204 | break; | |
2205 | } | |
2206 | ||
2207 | if (!found) { | |
2208 | /* New device, add to fcports list. */ | |
e315cd28 AC |
2209 | if (vha->vp_idx) { |
2210 | new_fcport->vha = vha; | |
2211 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2212 | } |
e315cd28 | 2213 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2214 | |
2215 | /* Allocate a new replacement fcport. */ | |
2216 | fcport = new_fcport; | |
e315cd28 | 2217 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2218 | if (new_fcport == NULL) { |
2219 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2220 | goto cleanup_allocation; | |
2221 | } | |
2222 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2223 | } | |
2224 | ||
d8b45213 | 2225 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2226 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2227 | |
e315cd28 | 2228 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2229 | |
2230 | found_devs++; | |
2231 | } | |
2232 | ||
2233 | cleanup_allocation: | |
c9475cb0 | 2234 | kfree(new_fcport); |
1da177e4 LT |
2235 | |
2236 | if (rval != QLA_SUCCESS) { | |
2237 | DEBUG2(printk("scsi(%ld): Configure local loop error exit: " | |
e315cd28 | 2238 | "rval=%x\n", vha->host_no, rval)); |
1da177e4 LT |
2239 | } |
2240 | ||
1da177e4 LT |
2241 | return (rval); |
2242 | } | |
2243 | ||
d8b45213 | 2244 | static void |
e315cd28 | 2245 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2246 | { |
2247 | #define LS_UNKNOWN 2 | |
9f8fddee AV |
2248 | static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; |
2249 | char *link_speed; | |
d8b45213 | 2250 | int rval; |
a3cbdfad | 2251 | uint16_t mb[6]; |
e315cd28 | 2252 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2253 | |
c76f2c01 | 2254 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2255 | return; |
2256 | ||
39bd9622 AV |
2257 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2258 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2259 | return; |
2260 | ||
e315cd28 | 2261 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2262 | mb); |
d8b45213 AV |
2263 | if (rval != QLA_SUCCESS) { |
2264 | DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA " | |
2265 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n", | |
e315cd28 | 2266 | vha->host_no, fcport->port_name[0], fcport->port_name[1], |
d8b45213 AV |
2267 | fcport->port_name[2], fcport->port_name[3], |
2268 | fcport->port_name[4], fcport->port_name[5], | |
2269 | fcport->port_name[6], fcport->port_name[7], rval, | |
a3cbdfad | 2270 | fcport->fp_speed, mb[0], mb[1])); |
d8b45213 | 2271 | } else { |
9f8fddee AV |
2272 | link_speed = link_speeds[LS_UNKNOWN]; |
2273 | if (fcport->fp_speed < 5) | |
2274 | link_speed = link_speeds[fcport->fp_speed]; | |
2275 | else if (fcport->fp_speed == 0x13) | |
2276 | link_speed = link_speeds[5]; | |
d8b45213 AV |
2277 | DEBUG2(qla_printk(KERN_INFO, ha, |
2278 | "iIDMA adjusted to %s GB/s on " | |
2279 | "%02x%02x%02x%02x%02x%02x%02x%02x.\n", | |
9f8fddee | 2280 | link_speed, fcport->port_name[0], |
d8b45213 AV |
2281 | fcport->port_name[1], fcport->port_name[2], |
2282 | fcport->port_name[3], fcport->port_name[4], | |
2283 | fcport->port_name[5], fcport->port_name[6], | |
2284 | fcport->port_name[7])); | |
2285 | } | |
2286 | } | |
2287 | ||
23be331d | 2288 | static void |
e315cd28 | 2289 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 | 2290 | { |
2291 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2292 | struct fc_rport *rport; |
e315cd28 | 2293 | struct qla_hw_data *ha = vha->hw; |
8482e118 | 2294 | |
d97994dc | 2295 | if (fcport->drport) |
2296 | qla2x00_rport_del(fcport); | |
8482e118 | 2297 | |
f8b02a85 AV |
2298 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2299 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 | 2300 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2301 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2302 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2303 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 AV |
2304 | if (!rport) { |
2305 | qla_printk(KERN_WARNING, ha, | |
2306 | "Unable to allocate fc remote port!\n"); | |
2307 | return; | |
2308 | } | |
e315cd28 | 2309 | spin_lock_irq(fcport->vha->host->host_lock); |
19a7b4ae | 2310 | *((fc_port_t **)rport->dd_data) = fcport; |
e315cd28 | 2311 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2312 | |
ad3e0eda | 2313 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2314 | |
8482e118 | 2315 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2316 | if (fcport->port_type == FCT_INITIATOR) | |
2317 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2318 | if (fcport->port_type == FCT_TARGET) | |
2319 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2320 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2321 | } |
2322 | ||
23be331d AB |
2323 | /* |
2324 | * qla2x00_update_fcport | |
2325 | * Updates device on list. | |
2326 | * | |
2327 | * Input: | |
2328 | * ha = adapter block pointer. | |
2329 | * fcport = port structure pointer. | |
2330 | * | |
2331 | * Return: | |
2332 | * 0 - Success | |
2333 | * BIT_0 - error | |
2334 | * | |
2335 | * Context: | |
2336 | * Kernel context. | |
2337 | */ | |
2338 | void | |
e315cd28 | 2339 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2340 | { |
e315cd28 | 2341 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 2342 | |
e315cd28 | 2343 | fcport->vha = vha; |
23be331d | 2344 | fcport->login_retry = 0; |
e315cd28 | 2345 | fcport->port_login_retry_count = ha->port_down_retry_count * |
23be331d | 2346 | PORT_RETRY_TIME; |
e315cd28 | 2347 | atomic_set(&fcport->port_down_timer, ha->port_down_retry_count * |
23be331d AB |
2348 | PORT_RETRY_TIME); |
2349 | fcport->flags &= ~FCF_LOGIN_NEEDED; | |
2350 | ||
e315cd28 | 2351 | qla2x00_iidma_fcport(vha, fcport); |
23be331d AB |
2352 | |
2353 | atomic_set(&fcport->state, FCS_ONLINE); | |
2354 | ||
e315cd28 | 2355 | qla2x00_reg_remote_port(vha, fcport); |
23be331d AB |
2356 | } |
2357 | ||
1da177e4 LT |
2358 | /* |
2359 | * qla2x00_configure_fabric | |
2360 | * Setup SNS devices with loop ID's. | |
2361 | * | |
2362 | * Input: | |
2363 | * ha = adapter block pointer. | |
2364 | * | |
2365 | * Returns: | |
2366 | * 0 = success. | |
2367 | * BIT_0 = error | |
2368 | */ | |
2369 | static int | |
e315cd28 | 2370 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 LT |
2371 | { |
2372 | int rval, rval2; | |
2373 | fc_port_t *fcport, *fcptemp; | |
2374 | uint16_t next_loopid; | |
2375 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2376 | uint16_t loop_id; |
1da177e4 | 2377 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2378 | struct qla_hw_data *ha = vha->hw; |
2379 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2380 | |
2381 | /* If FL port exists, then SNS is present */ | |
e428924c | 2382 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2383 | loop_id = NPH_F_PORT; |
2384 | else | |
2385 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2386 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 LT |
2387 | if (rval != QLA_SUCCESS) { |
2388 | DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL " | |
e315cd28 | 2389 | "Port\n", vha->host_no)); |
1da177e4 | 2390 | |
e315cd28 | 2391 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2392 | return (QLA_SUCCESS); |
2393 | } | |
e315cd28 | 2394 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 LT |
2395 | |
2396 | /* Mark devices that need re-synchronization. */ | |
e315cd28 | 2397 | rval2 = qla2x00_device_resync(vha); |
1da177e4 LT |
2398 | if (rval2 == QLA_RSCNS_HANDLED) { |
2399 | /* No point doing the scan, just continue. */ | |
2400 | return (QLA_SUCCESS); | |
2401 | } | |
2402 | do { | |
cca5335c AV |
2403 | /* FDMI support. */ |
2404 | if (ql2xfdmienable && | |
e315cd28 AC |
2405 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2406 | qla2x00_fdmi_register(vha); | |
cca5335c | 2407 | |
1da177e4 | 2408 | /* Ensure we are logged into the SNS. */ |
e428924c | 2409 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2410 | loop_id = NPH_SNS; |
2411 | else | |
2412 | loop_id = SIMPLE_NAME_SERVER; | |
e315cd28 | 2413 | ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
abbd8870 | 2414 | 0xfc, mb, BIT_1 | BIT_0); |
1da177e4 LT |
2415 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
2416 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2417 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
0107109e | 2418 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id, |
1da177e4 LT |
2419 | mb[0], mb[1], mb[2], mb[6], mb[7])); |
2420 | return (QLA_SUCCESS); | |
2421 | } | |
2422 | ||
e315cd28 AC |
2423 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
2424 | if (qla2x00_rft_id(vha)) { | |
1da177e4 LT |
2425 | /* EMPTY */ |
2426 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2427 | "TYPE failed.\n", vha->host_no)); |
1da177e4 | 2428 | } |
e315cd28 | 2429 | if (qla2x00_rff_id(vha)) { |
1da177e4 LT |
2430 | /* EMPTY */ |
2431 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2432 | "Features failed.\n", vha->host_no)); |
1da177e4 | 2433 | } |
e315cd28 | 2434 | if (qla2x00_rnn_id(vha)) { |
1da177e4 LT |
2435 | /* EMPTY */ |
2436 | DEBUG2(printk("scsi(%ld): Register Node Name " | |
e315cd28 AC |
2437 | "failed.\n", vha->host_no)); |
2438 | } else if (qla2x00_rsnn_nn(vha)) { | |
1da177e4 LT |
2439 | /* EMPTY */ |
2440 | DEBUG2(printk("scsi(%ld): Register Symbolic " | |
e315cd28 | 2441 | "Node Name failed.\n", vha->host_no)); |
1da177e4 LT |
2442 | } |
2443 | } | |
2444 | ||
e315cd28 | 2445 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
2446 | if (rval != QLA_SUCCESS) |
2447 | break; | |
2448 | ||
2449 | /* | |
2450 | * Logout all previous fabric devices marked lost, except | |
2451 | * tape devices. | |
2452 | */ | |
e315cd28 AC |
2453 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2454 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2455 | break; |
2456 | ||
2457 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
2458 | continue; | |
2459 | ||
2460 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
e315cd28 | 2461 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 2462 | ql2xplogiabsentdevice, 0); |
1da177e4 LT |
2463 | if (fcport->loop_id != FC_NO_LOOP_ID && |
2464 | (fcport->flags & FCF_TAPE_PRESENT) == 0 && | |
2465 | fcport->port_type != FCT_INITIATOR && | |
2466 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 2467 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
2468 | fcport->loop_id, |
2469 | fcport->d_id.b.domain, | |
2470 | fcport->d_id.b.area, | |
2471 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
2472 | fcport->loop_id = FC_NO_LOOP_ID; |
2473 | } | |
2474 | } | |
2475 | } | |
2476 | ||
2477 | /* Starting free loop ID. */ | |
e315cd28 | 2478 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
2479 | |
2480 | /* | |
2481 | * Scan through our port list and login entries that need to be | |
2482 | * logged in. | |
2483 | */ | |
e315cd28 AC |
2484 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2485 | if (atomic_read(&vha->loop_down_timer) || | |
2486 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2487 | break; |
2488 | ||
2489 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
2490 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
2491 | continue; | |
2492 | ||
2493 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
2494 | fcport->loop_id = next_loopid; | |
d4486fd6 | 2495 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 2496 | base_vha, fcport); |
1da177e4 LT |
2497 | if (rval != QLA_SUCCESS) { |
2498 | /* Ran out of IDs to use */ | |
2499 | break; | |
2500 | } | |
2501 | } | |
1da177e4 | 2502 | /* Login and update database */ |
e315cd28 | 2503 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
2504 | } |
2505 | ||
2506 | /* Exit if out of loop IDs. */ | |
2507 | if (rval != QLA_SUCCESS) { | |
2508 | break; | |
2509 | } | |
2510 | ||
2511 | /* | |
2512 | * Login and add the new devices to our port list. | |
2513 | */ | |
2514 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
2515 | if (atomic_read(&vha->loop_down_timer) || |
2516 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2517 | break; |
2518 | ||
2519 | /* Find a new loop ID to use. */ | |
2520 | fcport->loop_id = next_loopid; | |
e315cd28 | 2521 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
2522 | if (rval != QLA_SUCCESS) { |
2523 | /* Ran out of IDs to use */ | |
2524 | break; | |
2525 | } | |
2526 | ||
bdf79621 | 2527 | /* Login and update database */ |
e315cd28 AC |
2528 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
2529 | ||
2530 | if (vha->vp_idx) { | |
2531 | fcport->vha = vha; | |
2532 | fcport->vp_idx = vha->vp_idx; | |
2533 | } | |
2534 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
2535 | } |
2536 | } while (0); | |
2537 | ||
2538 | /* Free all new device structures not processed. */ | |
2539 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
2540 | list_del(&fcport->list); | |
2541 | kfree(fcport); | |
2542 | } | |
2543 | ||
2544 | if (rval) { | |
2545 | DEBUG2(printk("scsi(%ld): Configure fabric error exit: " | |
e315cd28 | 2546 | "rval=%d\n", vha->host_no, rval)); |
1da177e4 LT |
2547 | } |
2548 | ||
2549 | return (rval); | |
2550 | } | |
2551 | ||
2552 | ||
2553 | /* | |
2554 | * qla2x00_find_all_fabric_devs | |
2555 | * | |
2556 | * Input: | |
2557 | * ha = adapter block pointer. | |
2558 | * dev = database device entry pointer. | |
2559 | * | |
2560 | * Returns: | |
2561 | * 0 = success. | |
2562 | * | |
2563 | * Context: | |
2564 | * Kernel context. | |
2565 | */ | |
2566 | static int | |
e315cd28 AC |
2567 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
2568 | struct list_head *new_fcports) | |
1da177e4 LT |
2569 | { |
2570 | int rval; | |
2571 | uint16_t loop_id; | |
2572 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
2573 | int found; | |
2574 | ||
2575 | sw_info_t *swl; | |
2576 | int swl_idx; | |
2577 | int first_dev, last_dev; | |
2578 | port_id_t wrap, nxt_d_id; | |
e315cd28 AC |
2579 | struct qla_hw_data *ha = vha->hw; |
2580 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 2581 | struct scsi_qla_host *tvp; |
1da177e4 LT |
2582 | |
2583 | rval = QLA_SUCCESS; | |
2584 | ||
2585 | /* Try GID_PT to get device list, else GAN. */ | |
4b89258c | 2586 | swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); |
bbfbbbc1 | 2587 | if (!swl) { |
1da177e4 LT |
2588 | /*EMPTY*/ |
2589 | DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback " | |
e315cd28 | 2590 | "on GA_NXT\n", vha->host_no)); |
1da177e4 | 2591 | } else { |
e315cd28 | 2592 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2593 | kfree(swl); |
2594 | swl = NULL; | |
e315cd28 | 2595 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2596 | kfree(swl); |
2597 | swl = NULL; | |
e315cd28 | 2598 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2599 | kfree(swl); |
2600 | swl = NULL; | |
e5896bd5 | 2601 | } else if (ql2xiidmaenable && |
e315cd28 AC |
2602 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
2603 | qla2x00_gpsc(vha, swl); | |
1da177e4 LT |
2604 | } |
2605 | } | |
2606 | swl_idx = 0; | |
2607 | ||
2608 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2609 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2610 | if (new_fcport == NULL) { |
c9475cb0 | 2611 | kfree(swl); |
1da177e4 LT |
2612 | return (QLA_MEMORY_ALLOC_FAILED); |
2613 | } | |
2614 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
2615 | /* Set start port ID scan at adapter ID. */ |
2616 | first_dev = 1; | |
2617 | last_dev = 0; | |
2618 | ||
2619 | /* Starting free loop ID. */ | |
e315cd28 AC |
2620 | loop_id = ha->min_external_loopid; |
2621 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
2622 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
2623 | continue; |
2624 | ||
e315cd28 | 2625 | if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha)) |
1da177e4 LT |
2626 | break; |
2627 | ||
2628 | if (swl != NULL) { | |
2629 | if (last_dev) { | |
2630 | wrap.b24 = new_fcport->d_id.b24; | |
2631 | } else { | |
2632 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
2633 | memcpy(new_fcport->node_name, | |
2634 | swl[swl_idx].node_name, WWN_SIZE); | |
2635 | memcpy(new_fcport->port_name, | |
2636 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
2637 | memcpy(new_fcport->fabric_port_name, |
2638 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
2639 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
1da177e4 LT |
2640 | |
2641 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
2642 | last_dev = 1; | |
2643 | } | |
2644 | swl_idx++; | |
2645 | } | |
2646 | } else { | |
2647 | /* Send GA_NXT to the switch */ | |
e315cd28 | 2648 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 LT |
2649 | if (rval != QLA_SUCCESS) { |
2650 | qla_printk(KERN_WARNING, ha, | |
2651 | "SNS scan failed -- assuming zero-entry " | |
2652 | "result...\n"); | |
2653 | list_for_each_entry_safe(fcport, fcptemp, | |
2654 | new_fcports, list) { | |
2655 | list_del(&fcport->list); | |
2656 | kfree(fcport); | |
2657 | } | |
2658 | rval = QLA_SUCCESS; | |
2659 | break; | |
2660 | } | |
2661 | } | |
2662 | ||
2663 | /* If wrap on switch device list, exit. */ | |
2664 | if (first_dev) { | |
2665 | wrap.b24 = new_fcport->d_id.b24; | |
2666 | first_dev = 0; | |
2667 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
2668 | DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n", | |
e315cd28 | 2669 | vha->host_no, new_fcport->d_id.b.domain, |
1da177e4 LT |
2670 | new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa)); |
2671 | break; | |
2672 | } | |
2673 | ||
2c3dfe3f | 2674 | /* Bypass if same physical adapter. */ |
e315cd28 | 2675 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
2676 | continue; |
2677 | ||
2c3dfe3f | 2678 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
2679 | found = 0; |
2680 | if (ha->num_vhosts) { | |
ee546b6e | 2681 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
2682 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
2683 | found = 1; | |
2c3dfe3f | 2684 | break; |
e315cd28 | 2685 | } |
2c3dfe3f | 2686 | } |
e315cd28 | 2687 | if (found) |
2c3dfe3f SJ |
2688 | continue; |
2689 | } | |
2690 | ||
f7d289f6 AV |
2691 | /* Bypass if same domain and area of adapter. */ |
2692 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 2693 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
2694 | ISP_CFG_FL) |
2695 | continue; | |
2696 | ||
1da177e4 LT |
2697 | /* Bypass reserved domain fields. */ |
2698 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
2699 | continue; | |
2700 | ||
2701 | /* Locate matching device in database. */ | |
2702 | found = 0; | |
e315cd28 | 2703 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2704 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2705 | WWN_SIZE)) | |
2706 | continue; | |
2707 | ||
2708 | found++; | |
2709 | ||
d8b45213 AV |
2710 | /* Update port state. */ |
2711 | memcpy(fcport->fabric_port_name, | |
2712 | new_fcport->fabric_port_name, WWN_SIZE); | |
2713 | fcport->fp_speed = new_fcport->fp_speed; | |
2714 | ||
1da177e4 LT |
2715 | /* |
2716 | * If address the same and state FCS_ONLINE, nothing | |
2717 | * changed. | |
2718 | */ | |
2719 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
2720 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
2721 | break; | |
2722 | } | |
2723 | ||
2724 | /* | |
2725 | * If device was not a fabric device before. | |
2726 | */ | |
2727 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2728 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2729 | fcport->loop_id = FC_NO_LOOP_ID; | |
2730 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
2731 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
2732 | break; |
2733 | } | |
2734 | ||
2735 | /* | |
2736 | * Port ID changed or device was marked to be updated; | |
2737 | * Log it out if still logged in and mark it for | |
2738 | * relogin later. | |
2739 | */ | |
2740 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2741 | fcport->flags |= FCF_LOGIN_NEEDED; | |
2742 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
2743 | (fcport->flags & FCF_TAPE_PRESENT) == 0 && | |
2744 | fcport->port_type != FCT_INITIATOR && | |
2745 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 2746 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
2747 | fcport->d_id.b.domain, fcport->d_id.b.area, |
2748 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
2749 | fcport->loop_id = FC_NO_LOOP_ID; |
2750 | } | |
2751 | ||
2752 | break; | |
2753 | } | |
2754 | ||
2755 | if (found) | |
2756 | continue; | |
1da177e4 LT |
2757 | /* If device was not in our fcports list, then add it. */ |
2758 | list_add_tail(&new_fcport->list, new_fcports); | |
2759 | ||
2760 | /* Allocate a new replacement fcport. */ | |
2761 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 2762 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2763 | if (new_fcport == NULL) { |
c9475cb0 | 2764 | kfree(swl); |
1da177e4 LT |
2765 | return (QLA_MEMORY_ALLOC_FAILED); |
2766 | } | |
2767 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
2768 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
2769 | } | |
2770 | ||
c9475cb0 JJ |
2771 | kfree(swl); |
2772 | kfree(new_fcport); | |
1da177e4 | 2773 | |
1da177e4 LT |
2774 | return (rval); |
2775 | } | |
2776 | ||
2777 | /* | |
2778 | * qla2x00_find_new_loop_id | |
2779 | * Scan through our port list and find a new usable loop ID. | |
2780 | * | |
2781 | * Input: | |
2782 | * ha: adapter state pointer. | |
2783 | * dev: port structure pointer. | |
2784 | * | |
2785 | * Returns: | |
2786 | * qla2x00 local function return status code. | |
2787 | * | |
2788 | * Context: | |
2789 | * Kernel context. | |
2790 | */ | |
413975a0 | 2791 | static int |
e315cd28 | 2792 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
2793 | { |
2794 | int rval; | |
2795 | int found; | |
2796 | fc_port_t *fcport; | |
2797 | uint16_t first_loop_id; | |
e315cd28 AC |
2798 | struct qla_hw_data *ha = vha->hw; |
2799 | struct scsi_qla_host *vp; | |
ee546b6e | 2800 | struct scsi_qla_host *tvp; |
1da177e4 LT |
2801 | |
2802 | rval = QLA_SUCCESS; | |
2803 | ||
2804 | /* Save starting loop ID. */ | |
2805 | first_loop_id = dev->loop_id; | |
2806 | ||
2807 | for (;;) { | |
2808 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 2809 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 2810 | dev->loop_id++; |
1da177e4 LT |
2811 | |
2812 | /* Skip reserved loop IDs. */ | |
e315cd28 | 2813 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 2814 | dev->loop_id++; |
1da177e4 LT |
2815 | |
2816 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 2817 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
2818 | /* first loop ID. */ |
2819 | dev->loop_id = ha->min_external_loopid; | |
2820 | } | |
2821 | ||
2822 | /* Check for loop ID being already in use. */ | |
2823 | found = 0; | |
2824 | fcport = NULL; | |
ee546b6e | 2825 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
2826 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
2827 | if (fcport->loop_id == dev->loop_id && | |
2828 | fcport != dev) { | |
2829 | /* ID possibly in use */ | |
2830 | found++; | |
2831 | break; | |
2832 | } | |
1da177e4 | 2833 | } |
e315cd28 AC |
2834 | if (found) |
2835 | break; | |
1da177e4 LT |
2836 | } |
2837 | ||
2838 | /* If not in use then it is free to use. */ | |
2839 | if (!found) { | |
2840 | break; | |
2841 | } | |
2842 | ||
2843 | /* ID in use. Try next value. */ | |
2844 | dev->loop_id++; | |
2845 | ||
2846 | /* If wrap around. No free ID to use. */ | |
2847 | if (dev->loop_id == first_loop_id) { | |
2848 | dev->loop_id = FC_NO_LOOP_ID; | |
2849 | rval = QLA_FUNCTION_FAILED; | |
2850 | break; | |
2851 | } | |
2852 | } | |
2853 | ||
2854 | return (rval); | |
2855 | } | |
2856 | ||
2857 | /* | |
2858 | * qla2x00_device_resync | |
2859 | * Marks devices in the database that needs resynchronization. | |
2860 | * | |
2861 | * Input: | |
2862 | * ha = adapter block pointer. | |
2863 | * | |
2864 | * Context: | |
2865 | * Kernel context. | |
2866 | */ | |
2867 | static int | |
e315cd28 | 2868 | qla2x00_device_resync(scsi_qla_host_t *vha) |
1da177e4 LT |
2869 | { |
2870 | int rval; | |
1da177e4 LT |
2871 | uint32_t mask; |
2872 | fc_port_t *fcport; | |
2873 | uint32_t rscn_entry; | |
2874 | uint8_t rscn_out_iter; | |
2875 | uint8_t format; | |
2876 | port_id_t d_id; | |
2877 | ||
2878 | rval = QLA_RSCNS_HANDLED; | |
2879 | ||
e315cd28 AC |
2880 | while (vha->rscn_out_ptr != vha->rscn_in_ptr || |
2881 | vha->flags.rscn_queue_overflow) { | |
1da177e4 | 2882 | |
e315cd28 | 2883 | rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; |
1da177e4 LT |
2884 | format = MSB(MSW(rscn_entry)); |
2885 | d_id.b.domain = LSB(MSW(rscn_entry)); | |
2886 | d_id.b.area = MSB(LSW(rscn_entry)); | |
2887 | d_id.b.al_pa = LSB(LSW(rscn_entry)); | |
2888 | ||
2889 | DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = " | |
2890 | "[%02x/%02x%02x%02x].\n", | |
e315cd28 | 2891 | vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain, |
1da177e4 LT |
2892 | d_id.b.area, d_id.b.al_pa)); |
2893 | ||
e315cd28 AC |
2894 | vha->rscn_out_ptr++; |
2895 | if (vha->rscn_out_ptr == MAX_RSCN_COUNT) | |
2896 | vha->rscn_out_ptr = 0; | |
1da177e4 LT |
2897 | |
2898 | /* Skip duplicate entries. */ | |
e315cd28 AC |
2899 | for (rscn_out_iter = vha->rscn_out_ptr; |
2900 | !vha->flags.rscn_queue_overflow && | |
2901 | rscn_out_iter != vha->rscn_in_ptr; | |
1da177e4 LT |
2902 | rscn_out_iter = (rscn_out_iter == |
2903 | (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { | |
2904 | ||
e315cd28 | 2905 | if (rscn_entry != vha->rscn_queue[rscn_out_iter]) |
1da177e4 LT |
2906 | break; |
2907 | ||
2908 | DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue " | |
e315cd28 | 2909 | "entry found at [%d].\n", vha->host_no, |
1da177e4 LT |
2910 | rscn_out_iter)); |
2911 | ||
e315cd28 | 2912 | vha->rscn_out_ptr = rscn_out_iter; |
1da177e4 LT |
2913 | } |
2914 | ||
2915 | /* Queue overflow, set switch default case. */ | |
e315cd28 | 2916 | if (vha->flags.rscn_queue_overflow) { |
1da177e4 | 2917 | DEBUG(printk("scsi(%ld): device_resync: rscn " |
e315cd28 | 2918 | "overflow.\n", vha->host_no)); |
1da177e4 LT |
2919 | |
2920 | format = 3; | |
e315cd28 | 2921 | vha->flags.rscn_queue_overflow = 0; |
1da177e4 LT |
2922 | } |
2923 | ||
2924 | switch (format) { | |
2925 | case 0: | |
1da177e4 LT |
2926 | mask = 0xffffff; |
2927 | break; | |
2928 | case 1: | |
2929 | mask = 0xffff00; | |
2930 | break; | |
2931 | case 2: | |
2932 | mask = 0xff0000; | |
2933 | break; | |
2934 | default: | |
2935 | mask = 0x0; | |
2936 | d_id.b24 = 0; | |
e315cd28 | 2937 | vha->rscn_out_ptr = vha->rscn_in_ptr; |
1da177e4 LT |
2938 | break; |
2939 | } | |
2940 | ||
2941 | rval = QLA_SUCCESS; | |
2942 | ||
e315cd28 | 2943 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2944 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || |
2945 | (fcport->d_id.b24 & mask) != d_id.b24 || | |
2946 | fcport->port_type == FCT_BROADCAST) | |
2947 | continue; | |
2948 | ||
2949 | if (atomic_read(&fcport->state) == FCS_ONLINE) { | |
2950 | if (format != 3 || | |
2951 | fcport->port_type != FCT_INITIATOR) { | |
e315cd28 | 2952 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 2953 | 0, 0); |
1da177e4 LT |
2954 | } |
2955 | } | |
1da177e4 LT |
2956 | } |
2957 | } | |
2958 | return (rval); | |
2959 | } | |
2960 | ||
2961 | /* | |
2962 | * qla2x00_fabric_dev_login | |
2963 | * Login fabric target device and update FC port database. | |
2964 | * | |
2965 | * Input: | |
2966 | * ha: adapter state pointer. | |
2967 | * fcport: port structure list pointer. | |
2968 | * next_loopid: contains value of a new loop ID that can be used | |
2969 | * by the next login attempt. | |
2970 | * | |
2971 | * Returns: | |
2972 | * qla2x00 local function return status code. | |
2973 | * | |
2974 | * Context: | |
2975 | * Kernel context. | |
2976 | */ | |
2977 | static int | |
e315cd28 | 2978 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
2979 | uint16_t *next_loopid) |
2980 | { | |
2981 | int rval; | |
2982 | int retry; | |
0107109e | 2983 | uint8_t opts; |
e315cd28 | 2984 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2985 | |
2986 | rval = QLA_SUCCESS; | |
2987 | retry = 0; | |
2988 | ||
e315cd28 | 2989 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 2990 | if (rval == QLA_SUCCESS) { |
0107109e AV |
2991 | /* Send an ADISC to tape devices.*/ |
2992 | opts = 0; | |
2993 | if (fcport->flags & FCF_TAPE_PRESENT) | |
2994 | opts |= BIT_1; | |
e315cd28 | 2995 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 2996 | if (rval != QLA_SUCCESS) { |
e315cd28 | 2997 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
2998 | fcport->d_id.b.domain, fcport->d_id.b.area, |
2999 | fcport->d_id.b.al_pa); | |
e315cd28 | 3000 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3001 | } else { |
e315cd28 | 3002 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
3003 | } |
3004 | } | |
3005 | ||
3006 | return (rval); | |
3007 | } | |
3008 | ||
3009 | /* | |
3010 | * qla2x00_fabric_login | |
3011 | * Issue fabric login command. | |
3012 | * | |
3013 | * Input: | |
3014 | * ha = adapter block pointer. | |
3015 | * device = pointer to FC device type structure. | |
3016 | * | |
3017 | * Returns: | |
3018 | * 0 - Login successfully | |
3019 | * 1 - Login failed | |
3020 | * 2 - Initiator device | |
3021 | * 3 - Fatal error | |
3022 | */ | |
3023 | int | |
e315cd28 | 3024 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3025 | uint16_t *next_loopid) |
3026 | { | |
3027 | int rval; | |
3028 | int retry; | |
3029 | uint16_t tmp_loopid; | |
3030 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3031 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3032 | |
3033 | retry = 0; | |
3034 | tmp_loopid = 0; | |
3035 | ||
3036 | for (;;) { | |
3037 | DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x " | |
3038 | "for port %02x%02x%02x.\n", | |
e315cd28 | 3039 | vha->host_no, fcport->loop_id, fcport->d_id.b.domain, |
1da177e4 LT |
3040 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); |
3041 | ||
3042 | /* Login fcport on switch. */ | |
e315cd28 | 3043 | ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3044 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3045 | fcport->d_id.b.al_pa, mb, BIT_0); | |
3046 | if (mb[0] == MBS_PORT_ID_USED) { | |
3047 | /* | |
3048 | * Device has another loop ID. The firmware team | |
0107109e AV |
3049 | * recommends the driver perform an implicit login with |
3050 | * the specified ID again. The ID we just used is save | |
3051 | * here so we return with an ID that can be tried by | |
3052 | * the next login. | |
1da177e4 LT |
3053 | */ |
3054 | retry++; | |
3055 | tmp_loopid = fcport->loop_id; | |
3056 | fcport->loop_id = mb[1]; | |
3057 | ||
3058 | DEBUG(printk("Fabric Login: port in use - next " | |
3059 | "loop id=0x%04x, port Id=%02x%02x%02x.\n", | |
3060 | fcport->loop_id, fcport->d_id.b.domain, | |
3061 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
3062 | ||
3063 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3064 | /* | |
3065 | * Login succeeded. | |
3066 | */ | |
3067 | if (retry) { | |
3068 | /* A retry occurred before. */ | |
3069 | *next_loopid = tmp_loopid; | |
3070 | } else { | |
3071 | /* | |
3072 | * No retry occurred before. Just increment the | |
3073 | * ID value for next login. | |
3074 | */ | |
3075 | *next_loopid = (fcport->loop_id + 1); | |
3076 | } | |
3077 | ||
3078 | if (mb[1] & BIT_0) { | |
3079 | fcport->port_type = FCT_INITIATOR; | |
3080 | } else { | |
3081 | fcport->port_type = FCT_TARGET; | |
3082 | if (mb[1] & BIT_1) { | |
3083 | fcport->flags |= FCF_TAPE_PRESENT; | |
3084 | } | |
3085 | } | |
3086 | ||
ad3e0eda AV |
3087 | if (mb[10] & BIT_0) |
3088 | fcport->supported_classes |= FC_COS_CLASS2; | |
3089 | if (mb[10] & BIT_1) | |
3090 | fcport->supported_classes |= FC_COS_CLASS3; | |
3091 | ||
1da177e4 LT |
3092 | rval = QLA_SUCCESS; |
3093 | break; | |
3094 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3095 | /* | |
3096 | * Loop ID already used, try next loop ID. | |
3097 | */ | |
3098 | fcport->loop_id++; | |
e315cd28 | 3099 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3100 | if (rval != QLA_SUCCESS) { |
3101 | /* Ran out of loop IDs to use */ | |
3102 | break; | |
3103 | } | |
3104 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3105 | /* | |
3106 | * Firmware possibly timed out during login. If NO | |
3107 | * retries are left to do then the device is declared | |
3108 | * dead. | |
3109 | */ | |
3110 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3111 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3112 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3113 | fcport->d_id.b.al_pa); | |
e315cd28 | 3114 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3115 | |
3116 | rval = 1; | |
3117 | break; | |
3118 | } else { | |
3119 | /* | |
3120 | * unrecoverable / not handled error | |
3121 | */ | |
3122 | DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x " | |
fa2a1ce5 | 3123 | "loop_id=%x jiffies=%lx.\n", |
e315cd28 | 3124 | __func__, vha->host_no, mb[0], |
1da177e4 LT |
3125 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3126 | fcport->d_id.b.al_pa, fcport->loop_id, jiffies)); | |
3127 | ||
3128 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3129 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3130 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3131 | fcport->d_id.b.al_pa); | |
1da177e4 | 3132 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3133 | fcport->login_retry = 0; |
1da177e4 LT |
3134 | |
3135 | rval = 3; | |
3136 | break; | |
3137 | } | |
3138 | } | |
3139 | ||
3140 | return (rval); | |
3141 | } | |
3142 | ||
3143 | /* | |
3144 | * qla2x00_local_device_login | |
3145 | * Issue local device login command. | |
3146 | * | |
3147 | * Input: | |
3148 | * ha = adapter block pointer. | |
3149 | * loop_id = loop id of device to login to. | |
3150 | * | |
3151 | * Returns (Where's the #define!!!!): | |
3152 | * 0 - Login successfully | |
3153 | * 1 - Login failed | |
3154 | * 3 - Fatal error | |
3155 | */ | |
3156 | int | |
e315cd28 | 3157 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3158 | { |
3159 | int rval; | |
3160 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3161 | ||
3162 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3163 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3164 | if (rval == QLA_SUCCESS) { |
3165 | /* Interrogate mailbox registers for any errors */ | |
3166 | if (mb[0] == MBS_COMMAND_ERROR) | |
3167 | rval = 1; | |
3168 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3169 | /* device not in PCB table */ | |
3170 | rval = 3; | |
3171 | } | |
3172 | ||
3173 | return (rval); | |
3174 | } | |
3175 | ||
3176 | /* | |
3177 | * qla2x00_loop_resync | |
3178 | * Resync with fibre channel devices. | |
3179 | * | |
3180 | * Input: | |
3181 | * ha = adapter block pointer. | |
3182 | * | |
3183 | * Returns: | |
3184 | * 0 = success | |
3185 | */ | |
3186 | int | |
e315cd28 | 3187 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3188 | { |
73208dfd | 3189 | int rval = QLA_SUCCESS; |
1da177e4 | 3190 | uint32_t wait_time; |
67c2e93a AC |
3191 | struct req_que *req; |
3192 | struct rsp_que *rsp; | |
3193 | ||
3194 | if (ql2xmultique_tag) | |
3195 | req = vha->hw->req_q_map[0]; | |
3196 | else | |
3197 | req = vha->req; | |
3198 | rsp = req->rsp; | |
1da177e4 | 3199 | |
e315cd28 AC |
3200 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
3201 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3202 | if (vha->flags.online) { | |
3203 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3204 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3205 | wait_time = 256; | |
3206 | do { | |
e315cd28 | 3207 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
1da177e4 | 3208 | |
0107109e | 3209 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3210 | qla2x00_marker(vha, req, rsp, 0, 0, |
3211 | MK_SYNC_ALL); | |
e315cd28 | 3212 | vha->marker_needed = 0; |
1da177e4 LT |
3213 | |
3214 | /* Remap devices on Loop. */ | |
e315cd28 | 3215 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3216 | |
e315cd28 | 3217 | qla2x00_configure_loop(vha); |
1da177e4 | 3218 | wait_time--; |
e315cd28 AC |
3219 | } while (!atomic_read(&vha->loop_down_timer) && |
3220 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3221 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3222 | &vha->dpc_flags))); | |
1da177e4 | 3223 | } |
1da177e4 LT |
3224 | } |
3225 | ||
e315cd28 | 3226 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3227 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3228 | |
e315cd28 | 3229 | if (rval) |
1da177e4 | 3230 | DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__)); |
1da177e4 LT |
3231 | |
3232 | return (rval); | |
3233 | } | |
3234 | ||
d97994dc | 3235 | void |
e315cd28 | 3236 | qla2x00_update_fcports(scsi_qla_host_t *vha) |
d97994dc | 3237 | { |
3238 | fc_port_t *fcport; | |
3239 | ||
3240 | /* Go with deferred removal of rport references. */ | |
e315cd28 AC |
3241 | list_for_each_entry(fcport, &vha->vp_fcports, list) |
3242 | if (fcport && fcport->drport && | |
c9c5ced9 | 3243 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) |
d97994dc | 3244 | qla2x00_rport_del(fcport); |
3245 | } | |
3246 | ||
1da177e4 LT |
3247 | /* |
3248 | * qla2x00_abort_isp | |
3249 | * Resets ISP and aborts all outstanding commands. | |
3250 | * | |
3251 | * Input: | |
3252 | * ha = adapter block pointer. | |
3253 | * | |
3254 | * Returns: | |
3255 | * 0 = success | |
3256 | */ | |
3257 | int | |
e315cd28 | 3258 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3259 | { |
476e8978 | 3260 | int rval; |
1da177e4 | 3261 | uint8_t status = 0; |
e315cd28 AC |
3262 | struct qla_hw_data *ha = vha->hw; |
3263 | struct scsi_qla_host *vp; | |
ee546b6e | 3264 | struct scsi_qla_host *tvp; |
73208dfd | 3265 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 | 3266 | |
e315cd28 AC |
3267 | if (vha->flags.online) { |
3268 | vha->flags.online = 0; | |
2533cf67 | 3269 | ha->flags.chip_reset_done = 0; |
e315cd28 | 3270 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
e5f5f6f7 | 3271 | ha->qla_stats.total_isp_aborts++; |
1da177e4 LT |
3272 | |
3273 | qla_printk(KERN_INFO, ha, | |
3274 | "Performing ISP error recovery - ha= %p.\n", ha); | |
e315cd28 AC |
3275 | ha->isp_ops->reset_chip(vha); |
3276 | ||
3277 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3278 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3279 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3280 | qla2x00_mark_all_devices_lost(vha, 0); | |
ee546b6e | 3281 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) |
e315cd28 | 3282 | qla2x00_mark_all_devices_lost(vp, 0); |
1da177e4 | 3283 | } else { |
e315cd28 AC |
3284 | if (!atomic_read(&vha->loop_down_timer)) |
3285 | atomic_set(&vha->loop_down_timer, | |
1da177e4 LT |
3286 | LOOP_DOWN_TIME); |
3287 | } | |
3288 | ||
1da177e4 | 3289 | /* Requeue all commands in outstanding command list. */ |
e315cd28 | 3290 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); |
1da177e4 | 3291 | |
73208dfd | 3292 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3293 | |
e315cd28 | 3294 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3295 | |
e315cd28 AC |
3296 | if (!qla2x00_restart_isp(vha)) { |
3297 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3298 | |
e315cd28 | 3299 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3300 | /* |
3301 | * Issue marker command only when we are going | |
3302 | * to start the I/O . | |
3303 | */ | |
e315cd28 | 3304 | vha->marker_needed = 1; |
1da177e4 LT |
3305 | } |
3306 | ||
e315cd28 | 3307 | vha->flags.online = 1; |
1da177e4 | 3308 | |
fd34f556 | 3309 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3310 | |
fa2a1ce5 | 3311 | ha->isp_abort_cnt = 0; |
e315cd28 | 3312 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3313 | |
df613b96 AV |
3314 | if (ha->fce) { |
3315 | ha->flags.fce_enabled = 1; | |
3316 | memset(ha->fce, 0, | |
3317 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3318 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3319 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3320 | &ha->fce_bufs); | |
3321 | if (rval) { | |
3322 | qla_printk(KERN_WARNING, ha, | |
3323 | "Unable to reinitialize FCE " | |
3324 | "(%d).\n", rval); | |
3325 | ha->flags.fce_enabled = 0; | |
3326 | } | |
3327 | } | |
436a7b11 AV |
3328 | |
3329 | if (ha->eft) { | |
3330 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3331 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3332 | ha->eft_dma, EFT_NUM_BUFFERS); |
3333 | if (rval) { | |
3334 | qla_printk(KERN_WARNING, ha, | |
3335 | "Unable to reinitialize EFT " | |
3336 | "(%d).\n", rval); | |
3337 | } | |
3338 | } | |
1da177e4 | 3339 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3340 | vha->flags.online = 1; |
3341 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 LT |
3342 | if (ha->isp_abort_cnt == 0) { |
3343 | qla_printk(KERN_WARNING, ha, | |
3344 | "ISP error recovery failed - " | |
3345 | "board disabled\n"); | |
fa2a1ce5 | 3346 | /* |
1da177e4 LT |
3347 | * The next call disables the board |
3348 | * completely. | |
3349 | */ | |
e315cd28 AC |
3350 | ha->isp_ops->reset_adapter(vha); |
3351 | vha->flags.online = 0; | |
1da177e4 | 3352 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3353 | &vha->dpc_flags); |
1da177e4 LT |
3354 | status = 0; |
3355 | } else { /* schedule another ISP abort */ | |
3356 | ha->isp_abort_cnt--; | |
3357 | DEBUG(printk("qla%ld: ISP abort - " | |
0107109e | 3358 | "retry remaining %d\n", |
e315cd28 | 3359 | vha->host_no, ha->isp_abort_cnt)); |
1da177e4 LT |
3360 | status = 1; |
3361 | } | |
3362 | } else { | |
3363 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
3364 | DEBUG(printk("qla2x00(%ld): ISP error recovery " | |
3365 | "- retrying (%d) more times\n", | |
e315cd28 AC |
3366 | vha->host_no, ha->isp_abort_cnt)); |
3367 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
1da177e4 LT |
3368 | status = 1; |
3369 | } | |
3370 | } | |
fa2a1ce5 | 3371 | |
1da177e4 LT |
3372 | } |
3373 | ||
e315cd28 AC |
3374 | if (!status) { |
3375 | DEBUG(printk(KERN_INFO | |
3376 | "qla2x00_abort_isp(%ld): succeeded.\n", | |
3377 | vha->host_no)); | |
ee546b6e | 3378 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3379 | if (vp->vp_idx) |
3380 | qla2x00_vp_abort_isp(vp); | |
3381 | } | |
3382 | } else { | |
1da177e4 LT |
3383 | qla_printk(KERN_INFO, ha, |
3384 | "qla2x00_abort_isp: **** FAILED ****\n"); | |
1da177e4 LT |
3385 | } |
3386 | ||
3387 | return(status); | |
3388 | } | |
3389 | ||
3390 | /* | |
3391 | * qla2x00_restart_isp | |
3392 | * restarts the ISP after a reset | |
3393 | * | |
3394 | * Input: | |
3395 | * ha = adapter block pointer. | |
3396 | * | |
3397 | * Returns: | |
3398 | * 0 = success | |
3399 | */ | |
3400 | static int | |
e315cd28 | 3401 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 3402 | { |
c6b2fca8 | 3403 | int status = 0; |
1da177e4 | 3404 | uint32_t wait_time; |
e315cd28 | 3405 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
3406 | struct req_que *req = ha->req_q_map[0]; |
3407 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
3408 | |
3409 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
3410 | if (qla2x00_isp_firmware(vha)) { |
3411 | vha->flags.online = 0; | |
3412 | status = ha->isp_ops->chip_diag(vha); | |
3413 | if (!status) | |
3414 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
3415 | } |
3416 | ||
e315cd28 AC |
3417 | if (!status && !(status = qla2x00_init_rings(vha))) { |
3418 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 3419 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
3420 | /* Initialize the queues in use */ |
3421 | qla25xx_init_queues(ha); | |
3422 | ||
e315cd28 AC |
3423 | status = qla2x00_fw_ready(vha); |
3424 | if (!status) { | |
1da177e4 | 3425 | DEBUG(printk("%s(): Start configure loop, " |
744f11fd | 3426 | "status = %d\n", __func__, status)); |
0107109e AV |
3427 | |
3428 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 3429 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 3430 | |
e315cd28 | 3431 | vha->flags.online = 1; |
1da177e4 LT |
3432 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3433 | wait_time = 256; | |
3434 | do { | |
e315cd28 AC |
3435 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
3436 | qla2x00_configure_loop(vha); | |
1da177e4 | 3437 | wait_time--; |
e315cd28 AC |
3438 | } while (!atomic_read(&vha->loop_down_timer) && |
3439 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3440 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3441 | &vha->dpc_flags))); | |
1da177e4 LT |
3442 | } |
3443 | ||
3444 | /* if no cable then assume it's good */ | |
e315cd28 | 3445 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
3446 | status = 0; |
3447 | ||
3448 | DEBUG(printk("%s(): Configure loop done, status = 0x%x\n", | |
3449 | __func__, | |
744f11fd | 3450 | status)); |
1da177e4 LT |
3451 | } |
3452 | return (status); | |
3453 | } | |
3454 | ||
73208dfd AC |
3455 | static int |
3456 | qla25xx_init_queues(struct qla_hw_data *ha) | |
3457 | { | |
3458 | struct rsp_que *rsp = NULL; | |
3459 | struct req_que *req = NULL; | |
3460 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
3461 | int ret = -1; | |
3462 | int i; | |
3463 | ||
2afa19a9 | 3464 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
3465 | rsp = ha->rsp_q_map[i]; |
3466 | if (rsp) { | |
3467 | rsp->options &= ~BIT_0; | |
618a7523 | 3468 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd AC |
3469 | if (ret != QLA_SUCCESS) |
3470 | DEBUG2_17(printk(KERN_WARNING | |
3471 | "%s Rsp que:%d init failed\n", __func__, | |
3472 | rsp->id)); | |
3473 | else | |
3474 | DEBUG2_17(printk(KERN_INFO | |
3475 | "%s Rsp que:%d inited\n", __func__, | |
3476 | rsp->id)); | |
3477 | } | |
2afa19a9 AC |
3478 | } |
3479 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
3480 | req = ha->req_q_map[i]; |
3481 | if (req) { | |
29bdccbe | 3482 | /* Clear outstanding commands array. */ |
73208dfd | 3483 | req->options &= ~BIT_0; |
618a7523 | 3484 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd AC |
3485 | if (ret != QLA_SUCCESS) |
3486 | DEBUG2_17(printk(KERN_WARNING | |
3487 | "%s Req que:%d init failed\n", __func__, | |
3488 | req->id)); | |
3489 | else | |
3490 | DEBUG2_17(printk(KERN_WARNING | |
29bdccbe | 3491 | "%s Req que:%d inited\n", __func__, |
73208dfd AC |
3492 | req->id)); |
3493 | } | |
3494 | } | |
3495 | return ret; | |
3496 | } | |
3497 | ||
1da177e4 LT |
3498 | /* |
3499 | * qla2x00_reset_adapter | |
3500 | * Reset adapter. | |
3501 | * | |
3502 | * Input: | |
3503 | * ha = adapter block pointer. | |
3504 | */ | |
abbd8870 | 3505 | void |
e315cd28 | 3506 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
3507 | { |
3508 | unsigned long flags = 0; | |
e315cd28 | 3509 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 3510 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 3511 | |
e315cd28 | 3512 | vha->flags.online = 0; |
fd34f556 | 3513 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 3514 | |
1da177e4 LT |
3515 | spin_lock_irqsave(&ha->hardware_lock, flags); |
3516 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
3517 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3518 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
3519 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3520 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3521 | } | |
0107109e AV |
3522 | |
3523 | void | |
e315cd28 | 3524 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
3525 | { |
3526 | unsigned long flags = 0; | |
e315cd28 | 3527 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
3528 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
3529 | ||
e315cd28 | 3530 | vha->flags.online = 0; |
fd34f556 | 3531 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
3532 | |
3533 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3534 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
3535 | RD_REG_DWORD(®->hccr); | |
3536 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
3537 | RD_REG_DWORD(®->hccr); | |
3538 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
3539 | |
3540 | if (IS_NOPOLLING_TYPE(ha)) | |
3541 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
3542 | } |
3543 | ||
4e08df3f DM |
3544 | /* On sparc systems, obtain port and node WWN from firmware |
3545 | * properties. | |
3546 | */ | |
e315cd28 AC |
3547 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
3548 | struct nvram_24xx *nv) | |
4e08df3f DM |
3549 | { |
3550 | #ifdef CONFIG_SPARC | |
e315cd28 | 3551 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 3552 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
3553 | struct device_node *dp = pci_device_to_OF_node(pdev); |
3554 | const u8 *val; | |
4e08df3f DM |
3555 | int len; |
3556 | ||
3557 | val = of_get_property(dp, "port-wwn", &len); | |
3558 | if (val && len >= WWN_SIZE) | |
3559 | memcpy(nv->port_name, val, WWN_SIZE); | |
3560 | ||
3561 | val = of_get_property(dp, "node-wwn", &len); | |
3562 | if (val && len >= WWN_SIZE) | |
3563 | memcpy(nv->node_name, val, WWN_SIZE); | |
3564 | #endif | |
3565 | } | |
3566 | ||
0107109e | 3567 | int |
e315cd28 | 3568 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 3569 | { |
4e08df3f | 3570 | int rval; |
0107109e AV |
3571 | struct init_cb_24xx *icb; |
3572 | struct nvram_24xx *nv; | |
3573 | uint32_t *dptr; | |
3574 | uint8_t *dptr1, *dptr2; | |
3575 | uint32_t chksum; | |
3576 | uint16_t cnt; | |
e315cd28 | 3577 | struct qla_hw_data *ha = vha->hw; |
0107109e | 3578 | |
4e08df3f | 3579 | rval = QLA_SUCCESS; |
0107109e | 3580 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 3581 | nv = ha->nvram; |
0107109e AV |
3582 | |
3583 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
3584 | if (ha->flags.port0) { |
3585 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
3586 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
3587 | } else { | |
0107109e | 3588 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 | 3589 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
3590 | } | |
e5b68a61 AC |
3591 | ha->nvram_size = sizeof(struct nvram_24xx); |
3592 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
0107109e | 3593 | |
281afe19 SJ |
3594 | /* Get VPD data into cache */ |
3595 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 3596 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
3597 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
3598 | ||
3599 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 3600 | dptr = (uint32_t *)nv; |
e315cd28 | 3601 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
3602 | ha->nvram_size); |
3603 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
3604 | chksum += le32_to_cpu(*dptr++); | |
3605 | ||
7640335e | 3606 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 3607 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
0107109e AV |
3608 | |
3609 | /* Bad NVRAM data, set defaults parameters. */ | |
3610 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
3611 | || nv->id[3] != ' ' || | |
3612 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
3613 | /* Reset NVRAM data. */ | |
3614 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
3615 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
3616 | le16_to_cpu(nv->nvram_version)); | |
4e08df3f DM |
3617 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
3618 | "invalid -- WWPN) defaults.\n"); | |
3619 | ||
3620 | /* | |
3621 | * Set default initialization control block. | |
3622 | */ | |
3623 | memset(nv, 0, ha->nvram_size); | |
3624 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
3625 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
3626 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
3627 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
3628 | nv->exchange_count = __constant_cpu_to_le16(0); | |
3629 | nv->hard_address = __constant_cpu_to_le16(124); | |
3630 | nv->port_name[0] = 0x21; | |
e5b68a61 | 3631 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
3632 | nv->port_name[2] = 0x00; |
3633 | nv->port_name[3] = 0xe0; | |
3634 | nv->port_name[4] = 0x8b; | |
3635 | nv->port_name[5] = 0x1c; | |
3636 | nv->port_name[6] = 0x55; | |
3637 | nv->port_name[7] = 0x86; | |
3638 | nv->node_name[0] = 0x20; | |
3639 | nv->node_name[1] = 0x00; | |
3640 | nv->node_name[2] = 0x00; | |
3641 | nv->node_name[3] = 0xe0; | |
3642 | nv->node_name[4] = 0x8b; | |
3643 | nv->node_name[5] = 0x1c; | |
3644 | nv->node_name[6] = 0x55; | |
3645 | nv->node_name[7] = 0x86; | |
e315cd28 | 3646 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
3647 | nv->login_retry_count = __constant_cpu_to_le16(8); |
3648 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
3649 | nv->login_timeout = __constant_cpu_to_le16(0); | |
3650 | nv->firmware_options_1 = | |
3651 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
3652 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
3653 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
3654 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
3655 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
3656 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
3657 | nv->reset_delay = 5; | |
3658 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
3659 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
3660 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
3661 | ||
3662 | rval = 1; | |
0107109e AV |
3663 | } |
3664 | ||
3665 | /* Reset Initialization control block */ | |
e315cd28 | 3666 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
3667 | |
3668 | /* Copy 1st segment. */ | |
3669 | dptr1 = (uint8_t *)icb; | |
3670 | dptr2 = (uint8_t *)&nv->version; | |
3671 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
3672 | while (cnt--) | |
3673 | *dptr1++ = *dptr2++; | |
3674 | ||
3675 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 3676 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
3677 | |
3678 | /* Copy 2nd segment. */ | |
3679 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
3680 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
3681 | cnt = (uint8_t *)&icb->reserved_3 - | |
3682 | (uint8_t *)&icb->interrupt_delay_timer; | |
3683 | while (cnt--) | |
3684 | *dptr1++ = *dptr2++; | |
3685 | ||
3686 | /* | |
3687 | * Setup driver NVRAM options. | |
3688 | */ | |
e315cd28 | 3689 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 3690 | "QLA2462"); |
0107109e | 3691 | |
5341e868 AV |
3692 | /* Use alternate WWN? */ |
3693 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
3694 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
3695 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
3696 | } | |
3697 | ||
0107109e | 3698 | /* Prepare nodename */ |
fd0e7e4d | 3699 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
3700 | /* |
3701 | * Firmware will apply the following mask if the nodename was | |
3702 | * not provided. | |
3703 | */ | |
3704 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
3705 | icb->node_name[0] &= 0xF0; | |
3706 | } | |
3707 | ||
3708 | /* Set host adapter parameters. */ | |
3709 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
3710 | ha->flags.enable_lip_reset = 0; |
3711 | ha->flags.enable_lip_full_login = | |
3712 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
3713 | ha->flags.enable_target_reset = | |
3714 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 3715 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 3716 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 3717 | |
fd0e7e4d AV |
3718 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
3719 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
3720 | |
3721 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
3722 | sizeof(ha->fw_seriallink_options24)); | |
3723 | ||
3724 | /* save HBA serial number */ | |
3725 | ha->serial0 = icb->port_name[5]; | |
3726 | ha->serial1 = icb->port_name[6]; | |
3727 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
3728 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
3729 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 3730 | |
bc8fb3cb | 3731 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
3732 | ||
0107109e AV |
3733 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
3734 | ||
3735 | /* Set minimum login_timeout to 4 seconds. */ | |
3736 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
3737 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
3738 | if (le16_to_cpu(nv->login_timeout) < 4) | |
3739 | nv->login_timeout = __constant_cpu_to_le16(4); | |
3740 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 3741 | icb->login_timeout = nv->login_timeout; |
0107109e | 3742 | |
00a537b8 AV |
3743 | /* Set minimum RATOV to 100 tenths of a second. */ |
3744 | ha->r_a_tov = 100; | |
0107109e AV |
3745 | |
3746 | ha->loop_reset_delay = nv->reset_delay; | |
3747 | ||
3748 | /* Link Down Timeout = 0: | |
3749 | * | |
3750 | * When Port Down timer expires we will start returning | |
3751 | * I/O's to OS with "DID_NO_CONNECT". | |
3752 | * | |
3753 | * Link Down Timeout != 0: | |
3754 | * | |
3755 | * The driver waits for the link to come up after link down | |
3756 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
3757 | */ | |
3758 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
3759 | ha->loop_down_abort_time = | |
3760 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
3761 | } else { | |
3762 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
3763 | ha->loop_down_abort_time = | |
3764 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
3765 | } | |
3766 | ||
3767 | /* Need enough time to try and get the port back. */ | |
3768 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
3769 | if (qlport_down_retry) | |
3770 | ha->port_down_retry_count = qlport_down_retry; | |
3771 | ||
3772 | /* Set login_retry_count */ | |
3773 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
3774 | if (ha->port_down_retry_count == | |
3775 | le16_to_cpu(nv->port_down_retry_count) && | |
3776 | ha->port_down_retry_count > 3) | |
3777 | ha->login_retry_count = ha->port_down_retry_count; | |
3778 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
3779 | ha->login_retry_count = ha->port_down_retry_count; | |
3780 | if (ql2xloginretrycount) | |
3781 | ha->login_retry_count = ql2xloginretrycount; | |
3782 | ||
4fdfefe5 | 3783 | /* Enable ZIO. */ |
e315cd28 | 3784 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
3785 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
3786 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
3787 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
3788 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
3789 | } | |
3790 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
3791 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 3792 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 3793 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 3794 | ha->zio_mode = QLA_ZIO_MODE_6; |
3795 | ||
4fdfefe5 | 3796 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " |
e315cd28 | 3797 | "(%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 AV |
3798 | ha->zio_timer * 100)); |
3799 | qla_printk(KERN_INFO, ha, | |
3800 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
3801 | ha->zio_mode, ha->zio_timer * 100); | |
3802 | ||
3803 | icb->firmware_options_2 |= cpu_to_le32( | |
3804 | (uint32_t)ha->zio_mode); | |
3805 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 3806 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
3807 | } |
3808 | ||
4e08df3f DM |
3809 | if (rval) { |
3810 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 3811 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
3812 | } |
3813 | return (rval); | |
0107109e AV |
3814 | } |
3815 | ||
413975a0 | 3816 | static int |
cbc8eb67 AV |
3817 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
3818 | uint32_t faddr) | |
d1c61909 | 3819 | { |
73208dfd | 3820 | int rval = QLA_SUCCESS; |
d1c61909 | 3821 | int segments, fragment; |
d1c61909 AV |
3822 | uint32_t *dcode, dlen; |
3823 | uint32_t risc_addr; | |
3824 | uint32_t risc_size; | |
3825 | uint32_t i; | |
e315cd28 | 3826 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 3827 | struct req_que *req = ha->req_q_map[0]; |
eaac30be AV |
3828 | |
3829 | qla_printk(KERN_INFO, ha, | |
cbc8eb67 | 3830 | "FW: Loading from flash (%x)...\n", faddr); |
eaac30be | 3831 | |
d1c61909 AV |
3832 | rval = QLA_SUCCESS; |
3833 | ||
3834 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 3835 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
3836 | *srisc_addr = 0; |
3837 | ||
3838 | /* Validate firmware image by checking version. */ | |
e315cd28 | 3839 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
3840 | for (i = 0; i < 4; i++) |
3841 | dcode[i] = be32_to_cpu(dcode[i]); | |
3842 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
3843 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
3844 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
3845 | dcode[3] == 0)) { | |
3846 | qla_printk(KERN_WARNING, ha, | |
3847 | "Unable to verify integrity of flash firmware image!\n"); | |
3848 | qla_printk(KERN_WARNING, ha, | |
3849 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
3850 | dcode[1], dcode[2], dcode[3]); | |
3851 | ||
3852 | return QLA_FUNCTION_FAILED; | |
3853 | } | |
3854 | ||
3855 | while (segments && rval == QLA_SUCCESS) { | |
3856 | /* Read segment's load information. */ | |
e315cd28 | 3857 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
3858 | |
3859 | risc_addr = be32_to_cpu(dcode[2]); | |
3860 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
3861 | risc_size = be32_to_cpu(dcode[3]); | |
3862 | ||
3863 | fragment = 0; | |
3864 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
3865 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
3866 | if (dlen > risc_size) | |
3867 | dlen = risc_size; | |
3868 | ||
3869 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
3870 | "addr %x, number of dwords 0x%x, offset 0x%x.\n", | |
e315cd28 | 3871 | vha->host_no, risc_addr, dlen, faddr)); |
d1c61909 | 3872 | |
e315cd28 | 3873 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
3874 | for (i = 0; i < dlen; i++) |
3875 | dcode[i] = swab32(dcode[i]); | |
3876 | ||
73208dfd | 3877 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
3878 | dlen); |
3879 | if (rval) { | |
3880 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 3881 | "segment %d of firmware\n", vha->host_no, |
d1c61909 AV |
3882 | fragment)); |
3883 | qla_printk(KERN_WARNING, ha, | |
3884 | "[ERROR] Failed to load segment %d of " | |
3885 | "firmware\n", fragment); | |
3886 | break; | |
3887 | } | |
3888 | ||
3889 | faddr += dlen; | |
3890 | risc_addr += dlen; | |
3891 | risc_size -= dlen; | |
3892 | fragment++; | |
3893 | } | |
3894 | ||
3895 | /* Next segment. */ | |
3896 | segments--; | |
3897 | } | |
3898 | ||
3899 | return rval; | |
3900 | } | |
3901 | ||
d1c61909 AV |
3902 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
3903 | ||
0107109e | 3904 | int |
e315cd28 | 3905 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
3906 | { |
3907 | int rval; | |
3908 | int i, fragment; | |
3909 | uint16_t *wcode, *fwcode; | |
3910 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
3911 | struct fw_blob *blob; | |
e315cd28 | 3912 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 3913 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
3914 | |
3915 | /* Load firmware blob. */ | |
e315cd28 | 3916 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
3917 | if (!blob) { |
3918 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
3919 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
3920 | "from: " QLA_FW_URL ".\n"); | |
5433383e AV |
3921 | return QLA_FUNCTION_FAILED; |
3922 | } | |
3923 | ||
3924 | rval = QLA_SUCCESS; | |
3925 | ||
73208dfd | 3926 | wcode = (uint16_t *)req->ring; |
5433383e AV |
3927 | *srisc_addr = 0; |
3928 | fwcode = (uint16_t *)blob->fw->data; | |
3929 | fwclen = 0; | |
3930 | ||
3931 | /* Validate firmware image by checking version. */ | |
3932 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
3933 | qla_printk(KERN_WARNING, ha, | |
3934 | "Unable to verify integrity of firmware image (%Zd)!\n", | |
3935 | blob->fw->size); | |
3936 | goto fail_fw_integrity; | |
3937 | } | |
3938 | for (i = 0; i < 4; i++) | |
3939 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
3940 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
3941 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
3942 | wcode[2] == 0 && wcode[3] == 0)) { | |
3943 | qla_printk(KERN_WARNING, ha, | |
3944 | "Unable to verify integrity of firmware image!\n"); | |
3945 | qla_printk(KERN_WARNING, ha, | |
3946 | "Firmware data: %04x %04x %04x %04x!\n", wcode[0], | |
3947 | wcode[1], wcode[2], wcode[3]); | |
3948 | goto fail_fw_integrity; | |
3949 | } | |
3950 | ||
3951 | seg = blob->segs; | |
3952 | while (*seg && rval == QLA_SUCCESS) { | |
3953 | risc_addr = *seg; | |
3954 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
3955 | risc_size = be16_to_cpu(fwcode[3]); | |
3956 | ||
3957 | /* Validate firmware image size. */ | |
3958 | fwclen += risc_size * sizeof(uint16_t); | |
3959 | if (blob->fw->size < fwclen) { | |
3960 | qla_printk(KERN_WARNING, ha, | |
3961 | "Unable to verify integrity of firmware image " | |
3962 | "(%Zd)!\n", blob->fw->size); | |
3963 | goto fail_fw_integrity; | |
3964 | } | |
3965 | ||
3966 | fragment = 0; | |
3967 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
3968 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
3969 | if (wlen > risc_size) | |
3970 | wlen = risc_size; | |
3971 | ||
3972 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 3973 | "addr %x, number of words 0x%x.\n", vha->host_no, |
5433383e AV |
3974 | risc_addr, wlen)); |
3975 | ||
3976 | for (i = 0; i < wlen; i++) | |
3977 | wcode[i] = swab16(fwcode[i]); | |
3978 | ||
73208dfd | 3979 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
3980 | wlen); |
3981 | if (rval) { | |
3982 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 3983 | "segment %d of firmware\n", vha->host_no, |
5433383e AV |
3984 | fragment)); |
3985 | qla_printk(KERN_WARNING, ha, | |
3986 | "[ERROR] Failed to load segment %d of " | |
3987 | "firmware\n", fragment); | |
3988 | break; | |
3989 | } | |
3990 | ||
3991 | fwcode += wlen; | |
3992 | risc_addr += wlen; | |
3993 | risc_size -= wlen; | |
3994 | fragment++; | |
3995 | } | |
3996 | ||
3997 | /* Next segment. */ | |
3998 | seg++; | |
3999 | } | |
4000 | return rval; | |
4001 | ||
4002 | fail_fw_integrity: | |
4003 | return QLA_FUNCTION_FAILED; | |
4004 | } | |
4005 | ||
eaac30be AV |
4006 | static int |
4007 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4008 | { |
4009 | int rval; | |
4010 | int segments, fragment; | |
4011 | uint32_t *dcode, dlen; | |
4012 | uint32_t risc_addr; | |
4013 | uint32_t risc_size; | |
4014 | uint32_t i; | |
5433383e | 4015 | struct fw_blob *blob; |
0107109e | 4016 | uint32_t *fwcode, fwclen; |
e315cd28 | 4017 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4018 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4019 | |
5433383e | 4020 | /* Load firmware blob. */ |
e315cd28 | 4021 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4022 | if (!blob) { |
4023 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4024 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4025 | "from: " QLA_FW_URL ".\n"); | |
4026 | ||
eaac30be | 4027 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4028 | } |
4029 | ||
eaac30be AV |
4030 | qla_printk(KERN_INFO, ha, |
4031 | "FW: Loading via request-firmware...\n"); | |
4032 | ||
0107109e AV |
4033 | rval = QLA_SUCCESS; |
4034 | ||
4035 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4036 | dcode = (uint32_t *)req->ring; |
0107109e | 4037 | *srisc_addr = 0; |
5433383e | 4038 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4039 | fwclen = 0; |
4040 | ||
4041 | /* Validate firmware image by checking version. */ | |
5433383e | 4042 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
0107109e | 4043 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4044 | "Unable to verify integrity of firmware image (%Zd)!\n", |
4045 | blob->fw->size); | |
0107109e AV |
4046 | goto fail_fw_integrity; |
4047 | } | |
4048 | for (i = 0; i < 4; i++) | |
4049 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4050 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4051 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4052 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4053 | dcode[3] == 0)) { | |
4054 | qla_printk(KERN_WARNING, ha, | |
5433383e | 4055 | "Unable to verify integrity of firmware image!\n"); |
0107109e AV |
4056 | qla_printk(KERN_WARNING, ha, |
4057 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4058 | dcode[1], dcode[2], dcode[3]); | |
4059 | goto fail_fw_integrity; | |
4060 | } | |
4061 | ||
4062 | while (segments && rval == QLA_SUCCESS) { | |
4063 | risc_addr = be32_to_cpu(fwcode[2]); | |
4064 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4065 | risc_size = be32_to_cpu(fwcode[3]); | |
4066 | ||
4067 | /* Validate firmware image size. */ | |
4068 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4069 | if (blob->fw->size < fwclen) { |
0107109e | 4070 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4071 | "Unable to verify integrity of firmware image " |
4072 | "(%Zd)!\n", blob->fw->size); | |
4073 | ||
0107109e AV |
4074 | goto fail_fw_integrity; |
4075 | } | |
4076 | ||
4077 | fragment = 0; | |
4078 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4079 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4080 | if (dlen > risc_size) | |
4081 | dlen = risc_size; | |
4082 | ||
4083 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4084 | "addr %x, number of dwords 0x%x.\n", vha->host_no, |
0107109e AV |
4085 | risc_addr, dlen)); |
4086 | ||
4087 | for (i = 0; i < dlen; i++) | |
4088 | dcode[i] = swab32(fwcode[i]); | |
4089 | ||
73208dfd | 4090 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4091 | dlen); |
0107109e AV |
4092 | if (rval) { |
4093 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4094 | "segment %d of firmware\n", vha->host_no, |
0107109e AV |
4095 | fragment)); |
4096 | qla_printk(KERN_WARNING, ha, | |
4097 | "[ERROR] Failed to load segment %d of " | |
4098 | "firmware\n", fragment); | |
4099 | break; | |
4100 | } | |
4101 | ||
4102 | fwcode += dlen; | |
4103 | risc_addr += dlen; | |
4104 | risc_size -= dlen; | |
4105 | fragment++; | |
4106 | } | |
4107 | ||
4108 | /* Next segment. */ | |
4109 | segments--; | |
4110 | } | |
0107109e AV |
4111 | return rval; |
4112 | ||
4113 | fail_fw_integrity: | |
0107109e | 4114 | return QLA_FUNCTION_FAILED; |
0107109e | 4115 | } |
18c6c127 | 4116 | |
eaac30be AV |
4117 | int |
4118 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4119 | { | |
4120 | int rval; | |
4121 | ||
e337d907 AV |
4122 | if (ql2xfwloadbin == 1) |
4123 | return qla81xx_load_risc(vha, srisc_addr); | |
4124 | ||
eaac30be AV |
4125 | /* |
4126 | * FW Load priority: | |
4127 | * 1) Firmware via request-firmware interface (.bin file). | |
4128 | * 2) Firmware residing in flash. | |
4129 | */ | |
4130 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4131 | if (rval == QLA_SUCCESS) | |
4132 | return rval; | |
4133 | ||
cbc8eb67 AV |
4134 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4135 | vha->hw->flt_region_fw); | |
eaac30be AV |
4136 | } |
4137 | ||
4138 | int | |
4139 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4140 | { | |
4141 | int rval; | |
cbc8eb67 | 4142 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4143 | |
e337d907 | 4144 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4145 | goto try_blob_fw; |
e337d907 | 4146 | |
eaac30be AV |
4147 | /* |
4148 | * FW Load priority: | |
4149 | * 1) Firmware residing in flash. | |
4150 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4151 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4152 | */ |
cbc8eb67 | 4153 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4154 | if (rval == QLA_SUCCESS) |
4155 | return rval; | |
4156 | ||
cbc8eb67 AV |
4157 | try_blob_fw: |
4158 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4159 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4160 | return rval; | |
4161 | ||
4162 | qla_printk(KERN_ERR, ha, | |
4163 | "FW: Attempting to fallback to golden firmware...\n"); | |
4164 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); | |
4165 | if (rval != QLA_SUCCESS) | |
4166 | return rval; | |
4167 | ||
4168 | qla_printk(KERN_ERR, ha, | |
4169 | "FW: Please update operational firmware...\n"); | |
4170 | ha->flags.running_gold_fw = 1; | |
4171 | ||
4172 | return rval; | |
eaac30be AV |
4173 | } |
4174 | ||
18c6c127 | 4175 | void |
e315cd28 | 4176 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4177 | { |
4178 | int ret, retries; | |
e315cd28 | 4179 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4180 | |
e428924c | 4181 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4182 | return; |
75edf81d AV |
4183 | if (!ha->fw_major_version) |
4184 | return; | |
18c6c127 | 4185 | |
e315cd28 | 4186 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4187 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4188 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4189 | ha->isp_ops->reset_chip(vha); |
4190 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4191 | continue; |
e315cd28 | 4192 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 AV |
4193 | continue; |
4194 | qla_printk(KERN_INFO, ha, | |
4195 | "Attempting retry of stop-firmware command...\n"); | |
e315cd28 | 4196 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4197 | } |
4198 | } | |
2c3dfe3f SJ |
4199 | |
4200 | int | |
e315cd28 | 4201 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4202 | { |
4203 | int rval = QLA_SUCCESS; | |
4204 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 AC |
4205 | struct qla_hw_data *ha = vha->hw; |
4206 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4207 | struct req_que *req; |
4208 | struct rsp_que *rsp; | |
2c3dfe3f | 4209 | |
e315cd28 | 4210 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4211 | return -EINVAL; |
4212 | ||
e315cd28 | 4213 | rval = qla2x00_fw_ready(base_vha); |
67c2e93a AC |
4214 | if (ql2xmultique_tag) |
4215 | req = ha->req_q_map[0]; | |
4216 | else | |
4217 | req = vha->req; | |
4218 | rsp = req->rsp; | |
4219 | ||
2c3dfe3f | 4220 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4221 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4222 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4223 | } |
4224 | ||
e315cd28 | 4225 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4226 | |
4227 | /* Login to SNS first */ | |
e315cd28 | 4228 | ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); |
2c3dfe3f SJ |
4229 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
4230 | DEBUG15(qla_printk(KERN_INFO, ha, | |
4231 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4232 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS, | |
4233 | mb[0], mb[1], mb[2], mb[6], mb[7])); | |
4234 | return (QLA_FUNCTION_FAILED); | |
4235 | } | |
4236 | ||
e315cd28 AC |
4237 | atomic_set(&vha->loop_down_timer, 0); |
4238 | atomic_set(&vha->loop_state, LOOP_UP); | |
4239 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4240 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4241 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4242 | |
4243 | return rval; | |
4244 | } | |
4d4df193 HK |
4245 | |
4246 | /* 84XX Support **************************************************************/ | |
4247 | ||
4248 | static LIST_HEAD(qla_cs84xx_list); | |
4249 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4250 | ||
4251 | static struct qla_chip_state_84xx * | |
e315cd28 | 4252 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4253 | { |
4254 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4255 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4256 | |
4257 | mutex_lock(&qla_cs84xx_mutex); | |
4258 | ||
4259 | /* Find any shared 84xx chip. */ | |
4260 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4261 | if (cs84xx->bus == ha->pdev->bus) { | |
4262 | kref_get(&cs84xx->kref); | |
4263 | goto done; | |
4264 | } | |
4265 | } | |
4266 | ||
4267 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4268 | if (!cs84xx) | |
4269 | goto done; | |
4270 | ||
4271 | kref_init(&cs84xx->kref); | |
4272 | spin_lock_init(&cs84xx->access_lock); | |
4273 | mutex_init(&cs84xx->fw_update_mutex); | |
4274 | cs84xx->bus = ha->pdev->bus; | |
4275 | ||
4276 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4277 | done: | |
4278 | mutex_unlock(&qla_cs84xx_mutex); | |
4279 | return cs84xx; | |
4280 | } | |
4281 | ||
4282 | static void | |
4283 | __qla84xx_chip_release(struct kref *kref) | |
4284 | { | |
4285 | struct qla_chip_state_84xx *cs84xx = | |
4286 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4287 | ||
4288 | mutex_lock(&qla_cs84xx_mutex); | |
4289 | list_del(&cs84xx->list); | |
4290 | mutex_unlock(&qla_cs84xx_mutex); | |
4291 | kfree(cs84xx); | |
4292 | } | |
4293 | ||
4294 | void | |
e315cd28 | 4295 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4296 | { |
e315cd28 | 4297 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4298 | if (ha->cs84xx) |
4299 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4300 | } | |
4301 | ||
4302 | static int | |
e315cd28 | 4303 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4304 | { |
4305 | int rval; | |
4306 | uint16_t status[2]; | |
e315cd28 | 4307 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4308 | |
4309 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4310 | ||
e315cd28 | 4311 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4312 | |
4313 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4314 | ||
4315 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4316 | QLA_SUCCESS; | |
4317 | } | |
3a03eb79 AV |
4318 | |
4319 | /* 81XX Support **************************************************************/ | |
4320 | ||
4321 | int | |
4322 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4323 | { | |
4324 | int rval; | |
4325 | struct init_cb_81xx *icb; | |
4326 | struct nvram_81xx *nv; | |
4327 | uint32_t *dptr; | |
4328 | uint8_t *dptr1, *dptr2; | |
4329 | uint32_t chksum; | |
4330 | uint16_t cnt; | |
4331 | struct qla_hw_data *ha = vha->hw; | |
4332 | ||
4333 | rval = QLA_SUCCESS; | |
4334 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4335 | nv = ha->nvram; | |
4336 | ||
4337 | /* Determine NVRAM starting address. */ | |
4338 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 4339 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
4340 | |
4341 | /* Get VPD data into cache */ | |
4342 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
4343 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
4344 | ha->vpd_size); | |
3a03eb79 AV |
4345 | |
4346 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 4347 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 4348 | ha->nvram_size); |
3d79038f | 4349 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
4350 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
4351 | chksum += le32_to_cpu(*dptr++); | |
4352 | ||
7640335e | 4353 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
3a03eb79 AV |
4354 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
4355 | ||
4356 | /* Bad NVRAM data, set defaults parameters. */ | |
4357 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4358 | || nv->id[3] != ' ' || | |
4359 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4360 | /* Reset NVRAM data. */ | |
4361 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
4362 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
4363 | le16_to_cpu(nv->nvram_version)); | |
4364 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " | |
4365 | "invalid -- WWPN) defaults.\n"); | |
4366 | ||
4367 | /* | |
4368 | * Set default initialization control block. | |
4369 | */ | |
4370 | memset(nv, 0, ha->nvram_size); | |
4371 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4372 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4373 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4374 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4375 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4376 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4377 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
4378 | nv->port_name[2] = 0x00; |
4379 | nv->port_name[3] = 0xe0; | |
4380 | nv->port_name[4] = 0x8b; | |
4381 | nv->port_name[5] = 0x1c; | |
4382 | nv->port_name[6] = 0x55; | |
4383 | nv->port_name[7] = 0x86; | |
4384 | nv->node_name[0] = 0x20; | |
4385 | nv->node_name[1] = 0x00; | |
4386 | nv->node_name[2] = 0x00; | |
4387 | nv->node_name[3] = 0xe0; | |
4388 | nv->node_name[4] = 0x8b; | |
4389 | nv->node_name[5] = 0x1c; | |
4390 | nv->node_name[6] = 0x55; | |
4391 | nv->node_name[7] = 0x86; | |
4392 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
4393 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4394 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4395 | nv->firmware_options_1 = | |
4396 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4397 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4398 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4399 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4400 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4401 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4402 | nv->reset_delay = 5; | |
4403 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4404 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4405 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
eeebcc92 | 4406 | nv->enode_mac[0] = 0x00; |
3a03eb79 AV |
4407 | nv->enode_mac[1] = 0x02; |
4408 | nv->enode_mac[2] = 0x03; | |
4409 | nv->enode_mac[3] = 0x04; | |
4410 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 4411 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
4412 | |
4413 | rval = 1; | |
4414 | } | |
4415 | ||
4416 | /* Reset Initialization control block */ | |
4417 | memset(icb, 0, sizeof(struct init_cb_81xx)); | |
4418 | ||
4419 | /* Copy 1st segment. */ | |
4420 | dptr1 = (uint8_t *)icb; | |
4421 | dptr2 = (uint8_t *)&nv->version; | |
4422 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4423 | while (cnt--) | |
4424 | *dptr1++ = *dptr2++; | |
4425 | ||
4426 | icb->login_retry_count = nv->login_retry_count; | |
4427 | ||
4428 | /* Copy 2nd segment. */ | |
4429 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4430 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4431 | cnt = (uint8_t *)&icb->reserved_5 - | |
4432 | (uint8_t *)&icb->interrupt_delay_timer; | |
4433 | while (cnt--) | |
4434 | *dptr1++ = *dptr2++; | |
4435 | ||
4436 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
4437 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
4438 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
4439 | icb->enode_mac[0] = 0x01; | |
4440 | icb->enode_mac[1] = 0x02; | |
4441 | icb->enode_mac[2] = 0x03; | |
4442 | icb->enode_mac[3] = 0x04; | |
4443 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 4444 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
4445 | } |
4446 | ||
b64b0e8f AV |
4447 | /* Use extended-initialization control block. */ |
4448 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
4449 | ||
3a03eb79 AV |
4450 | /* |
4451 | * Setup driver NVRAM options. | |
4452 | */ | |
4453 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
4454 | "QLE81XX"); | |
4455 | ||
4456 | /* Use alternate WWN? */ | |
4457 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4458 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4459 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4460 | } | |
4461 | ||
4462 | /* Prepare nodename */ | |
4463 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
4464 | /* | |
4465 | * Firmware will apply the following mask if the nodename was | |
4466 | * not provided. | |
4467 | */ | |
4468 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4469 | icb->node_name[0] &= 0xF0; | |
4470 | } | |
4471 | ||
4472 | /* Set host adapter parameters. */ | |
4473 | ha->flags.disable_risc_code_load = 0; | |
4474 | ha->flags.enable_lip_reset = 0; | |
4475 | ha->flags.enable_lip_full_login = | |
4476 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4477 | ha->flags.enable_target_reset = | |
4478 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
4479 | ha->flags.enable_led_scheme = 0; | |
4480 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
4481 | ||
4482 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
4483 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
4484 | ||
4485 | /* save HBA serial number */ | |
4486 | ha->serial0 = icb->port_name[5]; | |
4487 | ha->serial1 = icb->port_name[6]; | |
4488 | ha->serial2 = icb->port_name[7]; | |
4489 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
4490 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
4491 | ||
4492 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4493 | ||
4494 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
4495 | ||
4496 | /* Set minimum login_timeout to 4 seconds. */ | |
4497 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4498 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4499 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4500 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4501 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
4502 | icb->login_timeout = nv->login_timeout; | |
4503 | ||
4504 | /* Set minimum RATOV to 100 tenths of a second. */ | |
4505 | ha->r_a_tov = 100; | |
4506 | ||
4507 | ha->loop_reset_delay = nv->reset_delay; | |
4508 | ||
4509 | /* Link Down Timeout = 0: | |
4510 | * | |
4511 | * When Port Down timer expires we will start returning | |
4512 | * I/O's to OS with "DID_NO_CONNECT". | |
4513 | * | |
4514 | * Link Down Timeout != 0: | |
4515 | * | |
4516 | * The driver waits for the link to come up after link down | |
4517 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4518 | */ | |
4519 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4520 | ha->loop_down_abort_time = | |
4521 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4522 | } else { | |
4523 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4524 | ha->loop_down_abort_time = | |
4525 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4526 | } | |
4527 | ||
4528 | /* Need enough time to try and get the port back. */ | |
4529 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4530 | if (qlport_down_retry) | |
4531 | ha->port_down_retry_count = qlport_down_retry; | |
4532 | ||
4533 | /* Set login_retry_count */ | |
4534 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4535 | if (ha->port_down_retry_count == | |
4536 | le16_to_cpu(nv->port_down_retry_count) && | |
4537 | ha->port_down_retry_count > 3) | |
4538 | ha->login_retry_count = ha->port_down_retry_count; | |
4539 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4540 | ha->login_retry_count = ha->port_down_retry_count; | |
4541 | if (ql2xloginretrycount) | |
4542 | ha->login_retry_count = ql2xloginretrycount; | |
4543 | ||
4544 | /* Enable ZIO. */ | |
4545 | if (!vha->flags.init_done) { | |
4546 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
4547 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4548 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4549 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4550 | } | |
4551 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4552 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
4553 | vha->flags.process_response_queue = 0; | |
4554 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
4555 | ha->zio_mode = QLA_ZIO_MODE_6; | |
4556 | ||
4557 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " | |
4558 | "(%d us).\n", vha->host_no, ha->zio_mode, | |
4559 | ha->zio_timer * 100)); | |
4560 | qla_printk(KERN_INFO, ha, | |
4561 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4562 | ha->zio_mode, ha->zio_timer * 100); | |
4563 | ||
4564 | icb->firmware_options_2 |= cpu_to_le32( | |
4565 | (uint32_t)ha->zio_mode); | |
4566 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
4567 | vha->flags.process_response_queue = 1; | |
4568 | } | |
4569 | ||
4570 | if (rval) { | |
4571 | DEBUG2_3(printk(KERN_WARNING | |
4572 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); | |
4573 | } | |
4574 | return (rval); | |
4575 | } | |
4576 | ||
4577 | void | |
4578 | qla81xx_update_fw_options(scsi_qla_host_t *ha) | |
4579 | { | |
4580 | } |