qla2xxx: Collect PCI register checks and board_disable scheduling
[deliverable/linux.git] / drivers / scsi / qla2xxx / qla_isr.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT
6 */
7#include "qla_def.h"
2d70c103 8#include "qla_target.h"
1da177e4 9
05236a05 10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
df7baa50 12#include <scsi/scsi_tcq.h>
9a069e19 13#include <scsi/scsi_bsg_fc.h>
bad75002 14#include <scsi/scsi_eh.h>
df7baa50 15
1da177e4 16static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
73208dfd 17static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
2afa19a9 18static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
73208dfd
AC
19static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
20 sts_entry_t *);
9a853f71 21
1da177e4
LT
22/**
23 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
24 * @irq:
25 * @dev_id: SCSI driver HA context
1da177e4
LT
26 *
27 * Called by system whenever the host adapter generates an interrupt.
28 *
29 * Returns handled flag.
30 */
31irqreturn_t
7d12e780 32qla2100_intr_handler(int irq, void *dev_id)
1da177e4 33{
e315cd28
AC
34 scsi_qla_host_t *vha;
35 struct qla_hw_data *ha;
3d71644c 36 struct device_reg_2xxx __iomem *reg;
1da177e4 37 int status;
1da177e4 38 unsigned long iter;
14e660e6 39 uint16_t hccr;
9a853f71 40 uint16_t mb[4];
e315cd28 41 struct rsp_que *rsp;
43fac4d9 42 unsigned long flags;
1da177e4 43
e315cd28
AC
44 rsp = (struct rsp_que *) dev_id;
45 if (!rsp) {
3256b435
CD
46 ql_log(ql_log_info, NULL, 0x505d,
47 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT
48 return (IRQ_NONE);
49 }
50
e315cd28 51 ha = rsp->hw;
3d71644c 52 reg = &ha->iobase->isp;
1da177e4
LT
53 status = 0;
54
43fac4d9 55 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 56 vha = pci_get_drvdata(ha->pdev);
1da177e4 57 for (iter = 50; iter--; ) {
14e660e6 58 hccr = RD_REG_WORD(&reg->hccr);
c821e0d5 59 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
f3ddac19 60 break;
14e660e6
SJ
61 if (hccr & HCCR_RISC_PAUSE) {
62 if (pci_channel_offline(ha->pdev))
63 break;
64
65 /*
66 * Issue a "HARD" reset in order for the RISC interrupt
a06a0f8e 67 * bit to be cleared. Schedule a big hammer to get
14e660e6
SJ
68 * out of the RISC PAUSED state.
69 */
70 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
71 RD_REG_WORD(&reg->hccr);
72
e315cd28
AC
73 ha->isp_ops->fw_dump(vha, 1);
74 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
14e660e6
SJ
75 break;
76 } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
1da177e4
LT
77 break;
78
79 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
80 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
81 RD_REG_WORD(&reg->hccr);
82
83 /* Get mailbox data. */
9a853f71
AV
84 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
85 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
e315cd28 86 qla2x00_mbx_completion(vha, mb[0]);
1da177e4 87 status |= MBX_INTERRUPT;
9a853f71
AV
88 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
89 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
90 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
91 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 92 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT
93 } else {
94 /*EMPTY*/
7c3df132
SK
95 ql_dbg(ql_dbg_async, vha, 0x5025,
96 "Unrecognized interrupt type (%d).\n",
97 mb[0]);
1da177e4
LT
98 }
99 /* Release mailbox registers. */
100 WRT_REG_WORD(&reg->semaphore, 0);
101 RD_REG_WORD(&reg->semaphore);
102 } else {
73208dfd 103 qla2x00_process_response_queue(rsp);
1da177e4
LT
104
105 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
106 RD_REG_WORD(&reg->hccr);
107 }
108 }
36439832 109 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 110 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 111
1da177e4
LT
112 return (IRQ_HANDLED);
113}
114
f3ddac19 115bool
c821e0d5 116qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
f3ddac19
CD
117{
118 /* Check for PCI disconnection */
119 if (reg == 0xffffffff) {
120 /*
121 * Schedule this on the default system workqueue so that all the
122 * adapter workqueues and the DPC thread can be shutdown
123 * cleanly.
124 */
125 schedule_work(&vha->hw->board_disable);
126 return true;
127 } else
128 return false;
129}
130
c821e0d5
JL
131bool
132qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
133{
134 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
135}
136
1da177e4
LT
137/**
138 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
139 * @irq:
140 * @dev_id: SCSI driver HA context
1da177e4
LT
141 *
142 * Called by system whenever the host adapter generates an interrupt.
143 *
144 * Returns handled flag.
145 */
146irqreturn_t
7d12e780 147qla2300_intr_handler(int irq, void *dev_id)
1da177e4 148{
e315cd28 149 scsi_qla_host_t *vha;
3d71644c 150 struct device_reg_2xxx __iomem *reg;
1da177e4 151 int status;
1da177e4
LT
152 unsigned long iter;
153 uint32_t stat;
1da177e4 154 uint16_t hccr;
9a853f71 155 uint16_t mb[4];
e315cd28
AC
156 struct rsp_que *rsp;
157 struct qla_hw_data *ha;
43fac4d9 158 unsigned long flags;
1da177e4 159
e315cd28
AC
160 rsp = (struct rsp_que *) dev_id;
161 if (!rsp) {
3256b435
CD
162 ql_log(ql_log_info, NULL, 0x5058,
163 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT
164 return (IRQ_NONE);
165 }
166
e315cd28 167 ha = rsp->hw;
3d71644c 168 reg = &ha->iobase->isp;
1da177e4
LT
169 status = 0;
170
43fac4d9 171 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 172 vha = pci_get_drvdata(ha->pdev);
1da177e4
LT
173 for (iter = 50; iter--; ) {
174 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
c821e0d5 175 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 176 break;
1da177e4 177 if (stat & HSR_RISC_PAUSED) {
85880801 178 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ
179 break;
180
1da177e4 181 hccr = RD_REG_WORD(&reg->hccr);
f3ddac19 182
1da177e4 183 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
7c3df132
SK
184 ql_log(ql_log_warn, vha, 0x5026,
185 "Parity error -- HCCR=%x, Dumping "
186 "firmware.\n", hccr);
1da177e4 187 else
7c3df132
SK
188 ql_log(ql_log_warn, vha, 0x5027,
189 "RISC paused -- HCCR=%x, Dumping "
190 "firmware.\n", hccr);
1da177e4
LT
191
192 /*
193 * Issue a "HARD" reset in order for the RISC
194 * interrupt bit to be cleared. Schedule a big
a06a0f8e 195 * hammer to get out of the RISC PAUSED state.
1da177e4
LT
196 */
197 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
198 RD_REG_WORD(&reg->hccr);
07f31805 199
e315cd28
AC
200 ha->isp_ops->fw_dump(vha, 1);
201 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
202 break;
203 } else if ((stat & HSR_RISC_INT) == 0)
204 break;
205
1da177e4 206 switch (stat & 0xff) {
1da177e4
LT
207 case 0x1:
208 case 0x2:
209 case 0x10:
210 case 0x11:
e315cd28 211 qla2x00_mbx_completion(vha, MSW(stat));
1da177e4
LT
212 status |= MBX_INTERRUPT;
213
214 /* Release mailbox registers. */
215 WRT_REG_WORD(&reg->semaphore, 0);
216 break;
217 case 0x12:
9a853f71
AV
218 mb[0] = MSW(stat);
219 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
220 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
221 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 222 qla2x00_async_event(vha, rsp, mb);
9a853f71
AV
223 break;
224 case 0x13:
73208dfd 225 qla2x00_process_response_queue(rsp);
1da177e4
LT
226 break;
227 case 0x15:
9a853f71
AV
228 mb[0] = MBA_CMPLT_1_16BIT;
229 mb[1] = MSW(stat);
73208dfd 230 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT
231 break;
232 case 0x16:
9a853f71
AV
233 mb[0] = MBA_SCSI_COMPLETION;
234 mb[1] = MSW(stat);
235 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
73208dfd 236 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT
237 break;
238 default:
7c3df132
SK
239 ql_dbg(ql_dbg_async, vha, 0x5028,
240 "Unrecognized interrupt type (%d).\n", stat & 0xff);
1da177e4
LT
241 break;
242 }
243 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
244 RD_REG_WORD_RELAXED(&reg->hccr);
245 }
36439832 246 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 247 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 248
1da177e4
LT
249 return (IRQ_HANDLED);
250}
251
252/**
253 * qla2x00_mbx_completion() - Process mailbox command completions.
254 * @ha: SCSI driver HA context
255 * @mb0: Mailbox0 register
256 */
257static void
e315cd28 258qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
1da177e4
LT
259{
260 uint16_t cnt;
4fa94f83 261 uint32_t mboxes;
1da177e4 262 uint16_t __iomem *wptr;
e315cd28 263 struct qla_hw_data *ha = vha->hw;
3d71644c 264 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 265
4fa94f83
AV
266 /* Read all mbox registers? */
267 mboxes = (1 << ha->mbx_count) - 1;
268 if (!ha->mcp)
a720101d 269 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
4fa94f83
AV
270 else
271 mboxes = ha->mcp->in_mb;
272
1da177e4
LT
273 /* Load return mailbox registers. */
274 ha->flags.mbox_int = 1;
275 ha->mailbox_out[0] = mb0;
4fa94f83 276 mboxes >>= 1;
1da177e4
LT
277 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
278
279 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
fa2a1ce5 280 if (IS_QLA2200(ha) && cnt == 8)
1da177e4 281 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
4fa94f83 282 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
1da177e4 283 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
4fa94f83 284 else if (mboxes & BIT_0)
1da177e4 285 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
fa2a1ce5 286
1da177e4 287 wptr++;
4fa94f83 288 mboxes >>= 1;
1da177e4 289 }
1da177e4
LT
290}
291
8a659571
AV
292static void
293qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
294{
295 static char *event[] =
296 { "Complete", "Request Notification", "Time Extension" };
297 int rval;
298 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
9e5054ec 299 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
8a659571
AV
300 uint16_t __iomem *wptr;
301 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
302
303 /* Seed data -- mailbox1 -> mailbox7. */
9e5054ec
CD
304 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
305 wptr = (uint16_t __iomem *)&reg24->mailbox1;
306 else if (IS_QLA8044(vha->hw))
307 wptr = (uint16_t __iomem *)&reg82->mailbox_out[1];
308 else
309 return;
310
8a659571
AV
311 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
312 mb[cnt] = RD_REG_WORD(wptr);
313
7c3df132 314 ql_dbg(ql_dbg_async, vha, 0x5021,
6246b8a1 315 "Inter-Driver Communication %s -- "
7c3df132
SK
316 "%04x %04x %04x %04x %04x %04x %04x.\n",
317 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
318 mb[4], mb[5], mb[6]);
454073c9
SV
319 switch (aen) {
320 /* Handle IDC Error completion case. */
321 case MBA_IDC_COMPLETE:
322 if (mb[1] >> 15) {
323 vha->hw->flags.idc_compl_status = 1;
9aaf2cea 324 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
454073c9
SV
325 complete(&vha->hw->dcbx_comp);
326 }
327 break;
328
329 case MBA_IDC_NOTIFY:
330 /* Acknowledgement needed? [Notify && non-zero timeout]. */
331 timeout = (descr >> 8) & 0xf;
332 ql_dbg(ql_dbg_async, vha, 0x5022,
333 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
334 vha->host_no, event[aen & 0xff], timeout);
335
336 if (!timeout)
337 return;
338 rval = qla2x00_post_idc_ack_work(vha, mb);
339 if (rval != QLA_SUCCESS)
340 ql_log(ql_log_warn, vha, 0x5023,
341 "IDC failed to post ACK.\n");
342 break;
343 case MBA_IDC_TIME_EXT:
344 vha->hw->idc_extend_tmo = descr;
345 ql_dbg(ql_dbg_async, vha, 0x5087,
346 "%lu Inter-Driver Communication %s -- "
347 "Extend timeout by=%d.\n",
348 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
349 break;
bf5b8ad7 350 }
8a659571
AV
351}
352
daae62a3 353#define LS_UNKNOWN 2
d0297c9a
JC
354const char *
355qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
daae62a3 356{
f73cb695
CD
357 static const char *const link_speeds[] = {
358 "1", "2", "?", "4", "8", "16", "32", "10"
d0297c9a 359 };
f73cb695 360#define QLA_LAST_SPEED 7
daae62a3
CD
361
362 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d0297c9a
JC
363 return link_speeds[0];
364 else if (speed == 0x13)
f73cb695
CD
365 return link_speeds[QLA_LAST_SPEED];
366 else if (speed < QLA_LAST_SPEED)
d0297c9a
JC
367 return link_speeds[speed];
368 else
369 return link_speeds[LS_UNKNOWN];
daae62a3
CD
370}
371
fa492630 372static void
7d613ac6
SV
373qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
374{
375 struct qla_hw_data *ha = vha->hw;
376
377 /*
378 * 8200 AEN Interpretation:
379 * mb[0] = AEN code
380 * mb[1] = AEN Reason code
381 * mb[2] = LSW of Peg-Halt Status-1 Register
382 * mb[6] = MSW of Peg-Halt Status-1 Register
383 * mb[3] = LSW of Peg-Halt Status-2 register
384 * mb[7] = MSW of Peg-Halt Status-2 register
385 * mb[4] = IDC Device-State Register value
386 * mb[5] = IDC Driver-Presence Register value
387 */
388 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
389 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
390 mb[0], mb[1], mb[2], mb[6]);
391 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
392 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
393 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
394
395 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
396 IDC_HEARTBEAT_FAILURE)) {
397 ha->flags.nic_core_hung = 1;
398 ql_log(ql_log_warn, vha, 0x5060,
399 "83XX: F/W Error Reported: Check if reset required.\n");
400
401 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
402 uint32_t protocol_engine_id, fw_err_code, err_level;
403
404 /*
405 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
406 * - PEG-Halt Status-1 Register:
407 * (LSW = mb[2], MSW = mb[6])
408 * Bits 0-7 = protocol-engine ID
409 * Bits 8-28 = f/w error code
410 * Bits 29-31 = Error-level
411 * Error-level 0x1 = Non-Fatal error
412 * Error-level 0x2 = Recoverable Fatal error
413 * Error-level 0x4 = UnRecoverable Fatal error
414 * - PEG-Halt Status-2 Register:
415 * (LSW = mb[3], MSW = mb[7])
416 */
417 protocol_engine_id = (mb[2] & 0xff);
418 fw_err_code = (((mb[2] & 0xff00) >> 8) |
419 ((mb[6] & 0x1fff) << 8));
420 err_level = ((mb[6] & 0xe000) >> 13);
421 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
422 "Register: protocol_engine_id=0x%x "
423 "fw_err_code=0x%x err_level=0x%x.\n",
424 protocol_engine_id, fw_err_code, err_level);
425 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
426 "Register: 0x%x%x.\n", mb[7], mb[3]);
427 if (err_level == ERR_LEVEL_NON_FATAL) {
428 ql_log(ql_log_warn, vha, 0x5063,
429 "Not a fatal error, f/w has recovered "
430 "iteself.\n");
431 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
432 ql_log(ql_log_fatal, vha, 0x5064,
433 "Recoverable Fatal error: Chip reset "
434 "required.\n");
435 qla83xx_schedule_work(vha,
436 QLA83XX_NIC_CORE_RESET);
437 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
438 ql_log(ql_log_fatal, vha, 0x5065,
439 "Unrecoverable Fatal error: Set FAILED "
440 "state, reboot required.\n");
441 qla83xx_schedule_work(vha,
442 QLA83XX_NIC_CORE_UNRECOVERABLE);
443 }
444 }
445
446 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
447 uint16_t peg_fw_state, nw_interface_link_up;
448 uint16_t nw_interface_signal_detect, sfp_status;
449 uint16_t htbt_counter, htbt_monitor_enable;
450 uint16_t sfp_additonal_info, sfp_multirate;
451 uint16_t sfp_tx_fault, link_speed, dcbx_status;
452
453 /*
454 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
455 * - PEG-to-FC Status Register:
456 * (LSW = mb[2], MSW = mb[6])
457 * Bits 0-7 = Peg-Firmware state
458 * Bit 8 = N/W Interface Link-up
459 * Bit 9 = N/W Interface signal detected
460 * Bits 10-11 = SFP Status
461 * SFP Status 0x0 = SFP+ transceiver not expected
462 * SFP Status 0x1 = SFP+ transceiver not present
463 * SFP Status 0x2 = SFP+ transceiver invalid
464 * SFP Status 0x3 = SFP+ transceiver present and
465 * valid
466 * Bits 12-14 = Heartbeat Counter
467 * Bit 15 = Heartbeat Monitor Enable
468 * Bits 16-17 = SFP Additional Info
469 * SFP info 0x0 = Unregocnized transceiver for
470 * Ethernet
471 * SFP info 0x1 = SFP+ brand validation failed
472 * SFP info 0x2 = SFP+ speed validation failed
473 * SFP info 0x3 = SFP+ access error
474 * Bit 18 = SFP Multirate
475 * Bit 19 = SFP Tx Fault
476 * Bits 20-22 = Link Speed
477 * Bits 23-27 = Reserved
478 * Bits 28-30 = DCBX Status
479 * DCBX Status 0x0 = DCBX Disabled
480 * DCBX Status 0x1 = DCBX Enabled
481 * DCBX Status 0x2 = DCBX Exchange error
482 * Bit 31 = Reserved
483 */
484 peg_fw_state = (mb[2] & 0x00ff);
485 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
486 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
487 sfp_status = ((mb[2] & 0x0c00) >> 10);
488 htbt_counter = ((mb[2] & 0x7000) >> 12);
489 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
490 sfp_additonal_info = (mb[6] & 0x0003);
491 sfp_multirate = ((mb[6] & 0x0004) >> 2);
492 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
493 link_speed = ((mb[6] & 0x0070) >> 4);
494 dcbx_status = ((mb[6] & 0x7000) >> 12);
495
496 ql_log(ql_log_warn, vha, 0x5066,
497 "Peg-to-Fc Status Register:\n"
498 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
499 "nw_interface_signal_detect=0x%x"
500 "\nsfp_statis=0x%x.\n ", peg_fw_state,
501 nw_interface_link_up, nw_interface_signal_detect,
502 sfp_status);
503 ql_log(ql_log_warn, vha, 0x5067,
504 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
505 "sfp_additonal_info=0x%x, sfp_multirate=0x%x.\n ",
506 htbt_counter, htbt_monitor_enable,
507 sfp_additonal_info, sfp_multirate);
508 ql_log(ql_log_warn, vha, 0x5068,
509 "sfp_tx_fault=0x%x, link_state=0x%x, "
510 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
511 dcbx_status);
512
513 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
514 }
515
516 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
517 ql_log(ql_log_warn, vha, 0x5069,
518 "Heartbeat Failure encountered, chip reset "
519 "required.\n");
520
521 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
522 }
523 }
524
525 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
526 ql_log(ql_log_info, vha, 0x506a,
527 "IDC Device-State changed = 0x%x.\n", mb[4]);
6c3943cd
SK
528 if (ha->flags.nic_core_reset_owner)
529 return;
7d613ac6
SV
530 qla83xx_schedule_work(vha, MBA_IDC_AEN);
531 }
532}
533
bb4cf5b7
CD
534int
535qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
536{
537 struct qla_hw_data *ha = vha->hw;
538 scsi_qla_host_t *vp;
539 uint32_t vp_did;
540 unsigned long flags;
541 int ret = 0;
542
543 if (!ha->num_vhosts)
544 return ret;
545
546 spin_lock_irqsave(&ha->vport_slock, flags);
547 list_for_each_entry(vp, &ha->vp_list, list) {
548 vp_did = vp->d_id.b24;
549 if (vp_did == rscn_entry) {
550 ret = 1;
551 break;
552 }
553 }
554 spin_unlock_irqrestore(&ha->vport_slock, flags);
555
556 return ret;
557}
558
1da177e4
LT
559/**
560 * qla2x00_async_event() - Process aynchronous events.
561 * @ha: SCSI driver HA context
9a853f71 562 * @mb: Mailbox registers (0 - 3)
1da177e4 563 */
2c3dfe3f 564void
73208dfd 565qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
1da177e4 566{
1da177e4 567 uint16_t handle_cnt;
bdab23da 568 uint16_t cnt, mbx;
1da177e4 569 uint32_t handles[5];
e315cd28 570 struct qla_hw_data *ha = vha->hw;
3d71644c 571 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
bdab23da 572 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
bc5c2aad 573 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1da177e4 574 uint32_t rscn_entry, host_pid;
4d4df193 575 unsigned long flags;
1da177e4
LT
576
577 /* Setup to process RIO completion. */
578 handle_cnt = 0;
6246b8a1 579 if (IS_CNA_CAPABLE(ha))
3a03eb79 580 goto skip_rio;
1da177e4
LT
581 switch (mb[0]) {
582 case MBA_SCSI_COMPLETION:
9a853f71 583 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT
584 handle_cnt = 1;
585 break;
586 case MBA_CMPLT_1_16BIT:
9a853f71 587 handles[0] = mb[1];
1da177e4
LT
588 handle_cnt = 1;
589 mb[0] = MBA_SCSI_COMPLETION;
590 break;
591 case MBA_CMPLT_2_16BIT:
9a853f71
AV
592 handles[0] = mb[1];
593 handles[1] = mb[2];
1da177e4
LT
594 handle_cnt = 2;
595 mb[0] = MBA_SCSI_COMPLETION;
596 break;
597 case MBA_CMPLT_3_16BIT:
9a853f71
AV
598 handles[0] = mb[1];
599 handles[1] = mb[2];
600 handles[2] = mb[3];
1da177e4
LT
601 handle_cnt = 3;
602 mb[0] = MBA_SCSI_COMPLETION;
603 break;
604 case MBA_CMPLT_4_16BIT:
9a853f71
AV
605 handles[0] = mb[1];
606 handles[1] = mb[2];
607 handles[2] = mb[3];
1da177e4
LT
608 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
609 handle_cnt = 4;
610 mb[0] = MBA_SCSI_COMPLETION;
611 break;
612 case MBA_CMPLT_5_16BIT:
9a853f71
AV
613 handles[0] = mb[1];
614 handles[1] = mb[2];
615 handles[2] = mb[3];
1da177e4
LT
616 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
617 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
618 handle_cnt = 5;
619 mb[0] = MBA_SCSI_COMPLETION;
620 break;
621 case MBA_CMPLT_2_32BIT:
9a853f71 622 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT
623 handles[1] = le32_to_cpu(
624 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
625 RD_MAILBOX_REG(ha, reg, 6));
626 handle_cnt = 2;
627 mb[0] = MBA_SCSI_COMPLETION;
628 break;
629 default:
630 break;
631 }
3a03eb79 632skip_rio:
1da177e4
LT
633 switch (mb[0]) {
634 case MBA_SCSI_COMPLETION: /* Fast Post */
e315cd28 635 if (!vha->flags.online)
1da177e4
LT
636 break;
637
638 for (cnt = 0; cnt < handle_cnt; cnt++)
73208dfd
AC
639 qla2x00_process_completed_request(vha, rsp->req,
640 handles[cnt]);
1da177e4
LT
641 break;
642
643 case MBA_RESET: /* Reset */
7c3df132
SK
644 ql_dbg(ql_dbg_async, vha, 0x5002,
645 "Asynchronous RESET.\n");
1da177e4 646
e315cd28 647 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT
648 break;
649
650 case MBA_SYSTEM_ERR: /* System Error */
f73cb695 651 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) ?
6246b8a1 652 RD_REG_WORD(&reg24->mailbox7) : 0;
7c3df132 653 ql_log(ql_log_warn, vha, 0x5003,
bdab23da
AV
654 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
655 "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
1da177e4 656
e315cd28 657 ha->isp_ops->fw_dump(vha, 1);
1da177e4 658
e428924c 659 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 660 if (mb[1] == 0 && mb[2] == 0) {
7c3df132 661 ql_log(ql_log_fatal, vha, 0x5004,
9a853f71
AV
662 "Unrecoverable Hardware Error: adapter "
663 "marked OFFLINE!\n");
e315cd28 664 vha->flags.online = 0;
6246b8a1 665 vha->device_flags |= DFLG_DEV_FAILED;
b1d46989 666 } else {
25985edc 667 /* Check to see if MPI timeout occurred */
f73cb695 668 if ((mbx & MBX_3) && (ha->port_no == 0))
b1d46989
MI
669 set_bit(MPI_RESET_NEEDED,
670 &vha->dpc_flags);
671
e315cd28 672 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
b1d46989 673 }
9a853f71 674 } else if (mb[1] == 0) {
7c3df132 675 ql_log(ql_log_fatal, vha, 0x5005,
1da177e4
LT
676 "Unrecoverable Hardware Error: adapter marked "
677 "OFFLINE!\n");
e315cd28 678 vha->flags.online = 0;
6246b8a1 679 vha->device_flags |= DFLG_DEV_FAILED;
1da177e4 680 } else
e315cd28 681 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
682 break;
683
684 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
7c3df132
SK
685 ql_log(ql_log_warn, vha, 0x5006,
686 "ISP Request Transfer Error (%x).\n", mb[1]);
1da177e4 687
e315cd28 688 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
689 break;
690
691 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
7c3df132
SK
692 ql_log(ql_log_warn, vha, 0x5007,
693 "ISP Response Transfer Error.\n");
1da177e4 694
e315cd28 695 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
696 break;
697
698 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
7c3df132
SK
699 ql_dbg(ql_dbg_async, vha, 0x5008,
700 "Asynchronous WAKEUP_THRES.\n");
1da177e4 701
2d70c103 702 break;
1da177e4 703 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
cfb0919c 704 ql_dbg(ql_dbg_async, vha, 0x5009,
7c3df132 705 "LIP occurred (%x).\n", mb[1]);
1da177e4 706
e315cd28
AC
707 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
708 atomic_set(&vha->loop_state, LOOP_DOWN);
709 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
710 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
711 }
712
e315cd28
AC
713 if (vha->vp_idx) {
714 atomic_set(&vha->vp_state, VP_FAILED);
715 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
716 }
717
e315cd28
AC
718 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
719 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1da177e4 720
e315cd28
AC
721 vha->flags.management_server_logged_in = 0;
722 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1da177e4
LT
723 break;
724
725 case MBA_LOOP_UP: /* Loop Up Event */
daae62a3 726 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d8b45213 727 ha->link_data_rate = PORT_SPEED_1GB;
daae62a3 728 else
1da177e4 729 ha->link_data_rate = mb[1];
1da177e4 730
8e5a9484 731 ql_log(ql_log_info, vha, 0x500a,
daae62a3 732 "LOOP UP detected (%s Gbps).\n",
d0297c9a 733 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1da177e4 734
e315cd28
AC
735 vha->flags.management_server_logged_in = 0;
736 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
1da177e4
LT
737 break;
738
739 case MBA_LOOP_DOWN: /* Loop Down Event */
6246b8a1
GM
740 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
741 ? RD_REG_WORD(&reg24->mailbox4) : 0;
7ec0effd
AD
742 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(&reg82->mailbox_out[4])
743 : mbx;
8e5a9484 744 ql_log(ql_log_info, vha, 0x500b,
7c3df132
SK
745 "LOOP DOWN detected (%x %x %x %x).\n",
746 mb[1], mb[2], mb[3], mbx);
1da177e4 747
e315cd28
AC
748 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
749 atomic_set(&vha->loop_state, LOOP_DOWN);
750 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
751 vha->device_flags |= DFLG_NO_CABLE;
752 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
753 }
754
e315cd28
AC
755 if (vha->vp_idx) {
756 atomic_set(&vha->vp_state, VP_FAILED);
757 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
758 }
759
e315cd28 760 vha->flags.management_server_logged_in = 0;
d8b45213 761 ha->link_data_rate = PORT_SPEED_UNKNOWN;
e315cd28 762 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1da177e4
LT
763 break;
764
765 case MBA_LIP_RESET: /* LIP reset occurred */
cfb0919c 766 ql_dbg(ql_dbg_async, vha, 0x500c,
cc3ef7bc 767 "LIP reset occurred (%x).\n", mb[1]);
1da177e4 768
e315cd28
AC
769 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
770 atomic_set(&vha->loop_state, LOOP_DOWN);
771 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
772 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
773 }
774
e315cd28
AC
775 if (vha->vp_idx) {
776 atomic_set(&vha->vp_state, VP_FAILED);
777 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
778 }
779
e315cd28 780 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT
781
782 ha->operating_mode = LOOP;
e315cd28
AC
783 vha->flags.management_server_logged_in = 0;
784 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1da177e4
LT
785 break;
786
3a03eb79 787 /* case MBA_DCBX_COMPLETE: */
1da177e4
LT
788 case MBA_POINT_TO_POINT: /* Point-to-Point */
789 if (IS_QLA2100(ha))
790 break;
791
7ec0effd 792 if (IS_CNA_CAPABLE(ha)) {
7c3df132
SK
793 ql_dbg(ql_dbg_async, vha, 0x500d,
794 "DCBX Completed -- %04x %04x %04x.\n",
795 mb[1], mb[2], mb[3]);
9aaf2cea 796 if (ha->notify_dcbx_comp && !vha->vp_idx)
23f2ebd1
SR
797 complete(&ha->dcbx_comp);
798
799 } else
7c3df132
SK
800 ql_dbg(ql_dbg_async, vha, 0x500e,
801 "Asynchronous P2P MODE received.\n");
1da177e4
LT
802
803 /*
804 * Until there's a transition from loop down to loop up, treat
805 * this as loop down only.
806 */
e315cd28
AC
807 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
808 atomic_set(&vha->loop_state, LOOP_DOWN);
809 if (!atomic_read(&vha->loop_down_timer))
810 atomic_set(&vha->loop_down_timer,
1da177e4 811 LOOP_DOWN_TIME);
e315cd28 812 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
813 }
814
e315cd28
AC
815 if (vha->vp_idx) {
816 atomic_set(&vha->vp_state, VP_FAILED);
817 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
818 }
819
e315cd28
AC
820 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
821 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
822
823 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
824 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
4346b149
AV
825
826 ha->flags.gpsc_supported = 1;
e315cd28 827 vha->flags.management_server_logged_in = 0;
1da177e4
LT
828 break;
829
830 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
831 if (IS_QLA2100(ha))
832 break;
833
cfb0919c 834 ql_dbg(ql_dbg_async, vha, 0x500f,
1da177e4
LT
835 "Configuration change detected: value=%x.\n", mb[1]);
836
e315cd28
AC
837 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
838 atomic_set(&vha->loop_state, LOOP_DOWN);
839 if (!atomic_read(&vha->loop_down_timer))
840 atomic_set(&vha->loop_down_timer,
1da177e4 841 LOOP_DOWN_TIME);
e315cd28 842 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
843 }
844
e315cd28
AC
845 if (vha->vp_idx) {
846 atomic_set(&vha->vp_state, VP_FAILED);
847 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
848 }
849
e315cd28
AC
850 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
851 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4
LT
852 break;
853
854 case MBA_PORT_UPDATE: /* Port database update */
55903b9d
SV
855 /*
856 * Handle only global and vn-port update events
857 *
858 * Relevant inputs:
859 * mb[1] = N_Port handle of changed port
860 * OR 0xffff for global event
861 * mb[2] = New login state
862 * 7 = Port logged out
863 * mb[3] = LSB is vp_idx, 0xff = all vps
864 *
865 * Skip processing if:
866 * Event is global, vp_idx is NOT all vps,
867 * vp_idx does not match
868 * Event is not global, vp_idx does not match
869 */
12cec63e
AV
870 if (IS_QLA2XXX_MIDTYPE(ha) &&
871 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
872 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
873 break;
73208dfd 874
9764ff88
AV
875 /* Global event -- port logout or port unavailable. */
876 if (mb[1] == 0xffff && mb[2] == 0x7) {
7c3df132
SK
877 ql_dbg(ql_dbg_async, vha, 0x5010,
878 "Port unavailable %04x %04x %04x.\n",
879 mb[1], mb[2], mb[3]);
daae62a3
CD
880 ql_log(ql_log_warn, vha, 0x505e,
881 "Link is offline.\n");
9764ff88
AV
882
883 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
884 atomic_set(&vha->loop_state, LOOP_DOWN);
885 atomic_set(&vha->loop_down_timer,
886 LOOP_DOWN_TIME);
887 vha->device_flags |= DFLG_NO_CABLE;
888 qla2x00_mark_all_devices_lost(vha, 1);
889 }
890
891 if (vha->vp_idx) {
892 atomic_set(&vha->vp_state, VP_FAILED);
893 fc_vport_set_state(vha->fc_vport,
894 FC_VPORT_FAILED);
faadc5e7 895 qla2x00_mark_all_devices_lost(vha, 1);
9764ff88
AV
896 }
897
898 vha->flags.management_server_logged_in = 0;
899 ha->link_data_rate = PORT_SPEED_UNKNOWN;
900 break;
901 }
902
1da177e4 903 /*
cc3ef7bc 904 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1da177e4
LT
905 * event etc. earlier indicating loop is down) then process
906 * it. Otherwise ignore it and Wait for RSCN to come in.
907 */
e315cd28 908 atomic_set(&vha->loop_down_timer, 0);
8e5a9484
CD
909 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
910 atomic_read(&vha->loop_state) != LOOP_DEAD) {
7c3df132
SK
911 ql_dbg(ql_dbg_async, vha, 0x5011,
912 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
913 mb[1], mb[2], mb[3]);
2d70c103
NB
914
915 qlt_async_event(mb[0], vha, mb);
1da177e4
LT
916 break;
917 }
918
7c3df132
SK
919 ql_dbg(ql_dbg_async, vha, 0x5012,
920 "Port database changed %04x %04x %04x.\n",
921 mb[1], mb[2], mb[3]);
1da177e4
LT
922
923 /*
924 * Mark all devices as missing so we will login again.
925 */
e315cd28 926 atomic_set(&vha->loop_state, LOOP_UP);
1da177e4 927
e315cd28 928 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4 929
2d70c103
NB
930 if (vha->vp_idx == 0 && !qla_ini_mode_enabled(vha))
931 set_bit(SCR_PENDING, &vha->dpc_flags);
932
e315cd28
AC
933 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
934 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2d70c103
NB
935
936 qlt_async_event(mb[0], vha, mb);
1da177e4
LT
937 break;
938
939 case MBA_RSCN_UPDATE: /* State Change Registration */
3c397400 940 /* Check if the Vport has issued a SCR */
e315cd28 941 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
3c397400
SJ
942 break;
943 /* Only handle SCNs for our Vport index. */
0d6e61bc 944 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
3c397400 945 break;
0d6e61bc 946
7c3df132
SK
947 ql_dbg(ql_dbg_async, vha, 0x5013,
948 "RSCN database changed -- %04x %04x %04x.\n",
949 mb[1], mb[2], mb[3]);
1da177e4 950
59d72d87 951 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
e315cd28
AC
952 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
953 | vha->d_id.b.al_pa;
1da177e4 954 if (rscn_entry == host_pid) {
7c3df132
SK
955 ql_dbg(ql_dbg_async, vha, 0x5014,
956 "Ignoring RSCN update to local host "
957 "port ID (%06x).\n", host_pid);
1da177e4
LT
958 break;
959 }
960
59d72d87
RA
961 /* Ignore reserved bits from RSCN-payload. */
962 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1da177e4 963
bb4cf5b7
CD
964 /* Skip RSCNs for virtual ports on the same physical port */
965 if (qla2x00_is_a_vp_did(vha, rscn_entry))
966 break;
967
e315cd28
AC
968 atomic_set(&vha->loop_down_timer, 0);
969 vha->flags.management_server_logged_in = 0;
1da177e4 970
e315cd28
AC
971 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
972 set_bit(RSCN_UPDATE, &vha->dpc_flags);
973 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
1da177e4
LT
974 break;
975
976 /* case MBA_RIO_RESPONSE: */
977 case MBA_ZIO_RESPONSE:
7c3df132
SK
978 ql_dbg(ql_dbg_async, vha, 0x5015,
979 "[R|Z]IO update completion.\n");
1da177e4 980
e428924c 981 if (IS_FWI2_CAPABLE(ha))
2afa19a9 982 qla24xx_process_response_queue(vha, rsp);
4fdfefe5 983 else
73208dfd 984 qla2x00_process_response_queue(rsp);
1da177e4 985 break;
9a853f71
AV
986
987 case MBA_DISCARD_RND_FRAME:
7c3df132
SK
988 ql_dbg(ql_dbg_async, vha, 0x5016,
989 "Discard RND Frame -- %04x %04x %04x.\n",
990 mb[1], mb[2], mb[3]);
9a853f71 991 break;
45ebeb56
AV
992
993 case MBA_TRACE_NOTIFICATION:
7c3df132
SK
994 ql_dbg(ql_dbg_async, vha, 0x5017,
995 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
45ebeb56 996 break;
4d4df193
HK
997
998 case MBA_ISP84XX_ALERT:
7c3df132
SK
999 ql_dbg(ql_dbg_async, vha, 0x5018,
1000 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1001 mb[1], mb[2], mb[3]);
4d4df193
HK
1002
1003 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1004 switch (mb[1]) {
1005 case A84_PANIC_RECOVERY:
7c3df132
SK
1006 ql_log(ql_log_info, vha, 0x5019,
1007 "Alert 84XX: panic recovery %04x %04x.\n",
1008 mb[2], mb[3]);
4d4df193
HK
1009 break;
1010 case A84_OP_LOGIN_COMPLETE:
1011 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK
1012 ql_log(ql_log_info, vha, 0x501a,
1013 "Alert 84XX: firmware version %x.\n",
1014 ha->cs84xx->op_fw_version);
4d4df193
HK
1015 break;
1016 case A84_DIAG_LOGIN_COMPLETE:
1017 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK
1018 ql_log(ql_log_info, vha, 0x501b,
1019 "Alert 84XX: diagnostic firmware version %x.\n",
1020 ha->cs84xx->diag_fw_version);
4d4df193
HK
1021 break;
1022 case A84_GOLD_LOGIN_COMPLETE:
1023 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1024 ha->cs84xx->fw_update = 1;
7c3df132
SK
1025 ql_log(ql_log_info, vha, 0x501c,
1026 "Alert 84XX: gold firmware version %x.\n",
1027 ha->cs84xx->gold_fw_version);
4d4df193
HK
1028 break;
1029 default:
7c3df132
SK
1030 ql_log(ql_log_warn, vha, 0x501d,
1031 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
4d4df193
HK
1032 mb[1], mb[2], mb[3]);
1033 }
1034 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1035 break;
3a03eb79 1036 case MBA_DCBX_START:
7c3df132
SK
1037 ql_dbg(ql_dbg_async, vha, 0x501e,
1038 "DCBX Started -- %04x %04x %04x.\n",
1039 mb[1], mb[2], mb[3]);
3a03eb79
AV
1040 break;
1041 case MBA_DCBX_PARAM_UPDATE:
7c3df132
SK
1042 ql_dbg(ql_dbg_async, vha, 0x501f,
1043 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1044 mb[1], mb[2], mb[3]);
3a03eb79
AV
1045 break;
1046 case MBA_FCF_CONF_ERR:
7c3df132
SK
1047 ql_dbg(ql_dbg_async, vha, 0x5020,
1048 "FCF Configuration Error -- %04x %04x %04x.\n",
1049 mb[1], mb[2], mb[3]);
3a03eb79 1050 break;
3a03eb79 1051 case MBA_IDC_NOTIFY:
7ec0effd 1052 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
67b2a31f
CD
1053 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1054 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1055 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1056 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
8fcd6b8b 1057 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
67b2a31f
CD
1058 /*
1059 * Extend loop down timer since port is active.
1060 */
1061 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1062 atomic_set(&vha->loop_down_timer,
1063 LOOP_DOWN_TIME);
8fcd6b8b
CD
1064 qla2xxx_wake_dpc(vha);
1065 }
67b2a31f 1066 }
8fcd6b8b 1067 case MBA_IDC_COMPLETE:
9aaf2cea 1068 if (ha->notify_lb_portup_comp && !vha->vp_idx)
f356bef1
CD
1069 complete(&ha->lb_portup_comp);
1070 /* Fallthru */
3a03eb79 1071 case MBA_IDC_TIME_EXT:
7ec0effd
AD
1072 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1073 IS_QLA8044(ha))
7d613ac6
SV
1074 qla81xx_idc_event(vha, mb[0], mb[1]);
1075 break;
1076
1077 case MBA_IDC_AEN:
1078 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1079 mb[5] = RD_REG_WORD(&reg24->mailbox5);
1080 mb[6] = RD_REG_WORD(&reg24->mailbox6);
1081 mb[7] = RD_REG_WORD(&reg24->mailbox7);
1082 qla83xx_handle_8200_aen(vha, mb);
3a03eb79 1083 break;
7d613ac6 1084
6246b8a1
GM
1085 default:
1086 ql_dbg(ql_dbg_async, vha, 0x5057,
1087 "Unknown AEN:%04x %04x %04x %04x\n",
1088 mb[0], mb[1], mb[2], mb[3]);
1da177e4 1089 }
2c3dfe3f 1090
2d70c103
NB
1091 qlt_async_event(mb[0], vha, mb);
1092
e315cd28 1093 if (!vha->vp_idx && ha->num_vhosts)
73208dfd 1094 qla2x00_alert_all_vps(rsp, mb);
1da177e4
LT
1095}
1096
1097/**
1098 * qla2x00_process_completed_request() - Process a Fast Post response.
1099 * @ha: SCSI driver HA context
1100 * @index: SRB index
1101 */
8ae6d9c7 1102void
73208dfd 1103qla2x00_process_completed_request(struct scsi_qla_host *vha,
8ae6d9c7 1104 struct req_que *req, uint32_t index)
1da177e4
LT
1105{
1106 srb_t *sp;
e315cd28 1107 struct qla_hw_data *ha = vha->hw;
1da177e4
LT
1108
1109 /* Validate handle. */
8d93f550 1110 if (index >= req->num_outstanding_cmds) {
7c3df132
SK
1111 ql_log(ql_log_warn, vha, 0x3014,
1112 "Invalid SCSI command index (%x).\n", index);
1da177e4 1113
7ec0effd 1114 if (IS_P3P_TYPE(ha))
8f7daead
GM
1115 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1116 else
1117 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
1118 return;
1119 }
1120
e315cd28 1121 sp = req->outstanding_cmds[index];
1da177e4
LT
1122 if (sp) {
1123 /* Free outstanding command slot. */
e315cd28 1124 req->outstanding_cmds[index] = NULL;
1da177e4 1125
1da177e4 1126 /* Save ISP completion status */
9ba56b95 1127 sp->done(ha, sp, DID_OK << 16);
1da177e4 1128 } else {
7c3df132 1129 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1da177e4 1130
7ec0effd 1131 if (IS_P3P_TYPE(ha))
8f7daead
GM
1132 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1133 else
1134 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
1135 }
1136}
1137
8ae6d9c7 1138srb_t *
ac280b67
AV
1139qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1140 struct req_que *req, void *iocb)
1141{
1142 struct qla_hw_data *ha = vha->hw;
1143 sts_entry_t *pkt = iocb;
1144 srb_t *sp = NULL;
1145 uint16_t index;
1146
1147 index = LSW(pkt->handle);
8d93f550 1148 if (index >= req->num_outstanding_cmds) {
7c3df132
SK
1149 ql_log(ql_log_warn, vha, 0x5031,
1150 "Invalid command index (%x).\n", index);
7ec0effd 1151 if (IS_P3P_TYPE(ha))
8f7daead
GM
1152 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1153 else
1154 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
ac280b67
AV
1155 goto done;
1156 }
1157 sp = req->outstanding_cmds[index];
1158 if (!sp) {
7c3df132
SK
1159 ql_log(ql_log_warn, vha, 0x5032,
1160 "Invalid completion handle (%x) -- timed-out.\n", index);
ac280b67
AV
1161 return sp;
1162 }
1163 if (sp->handle != index) {
7c3df132
SK
1164 ql_log(ql_log_warn, vha, 0x5033,
1165 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
ac280b67
AV
1166 return NULL;
1167 }
9a069e19 1168
ac280b67 1169 req->outstanding_cmds[index] = NULL;
9a069e19 1170
ac280b67
AV
1171done:
1172 return sp;
1173}
1174
1175static void
1176qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1177 struct mbx_entry *mbx)
1178{
1179 const char func[] = "MBX-IOCB";
1180 const char *type;
ac280b67
AV
1181 fc_port_t *fcport;
1182 srb_t *sp;
4916392b 1183 struct srb_iocb *lio;
99b0bec7 1184 uint16_t *data;
5ff1d584 1185 uint16_t status;
ac280b67
AV
1186
1187 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1188 if (!sp)
1189 return;
1190
9ba56b95
GM
1191 lio = &sp->u.iocb_cmd;
1192 type = sp->name;
ac280b67 1193 fcport = sp->fcport;
4916392b 1194 data = lio->u.logio.data;
ac280b67 1195
5ff1d584 1196 data[0] = MBS_COMMAND_ERROR;
4916392b 1197 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1198 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1199 if (mbx->entry_status) {
7c3df132 1200 ql_dbg(ql_dbg_async, vha, 0x5043,
cfb0919c 1201 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
d3fa9e7d 1202 "entry-status=%x status=%x state-flag=%x "
cfb0919c
CD
1203 "status-flags=%x.\n", type, sp->handle,
1204 fcport->d_id.b.domain, fcport->d_id.b.area,
d3fa9e7d
AV
1205 fcport->d_id.b.al_pa, mbx->entry_status,
1206 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
7c3df132 1207 le16_to_cpu(mbx->status_flags));
d3fa9e7d 1208
cfb0919c 1209 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
7c3df132 1210 (uint8_t *)mbx, sizeof(*mbx));
ac280b67 1211
99b0bec7 1212 goto logio_done;
ac280b67
AV
1213 }
1214
5ff1d584 1215 status = le16_to_cpu(mbx->status);
9ba56b95 1216 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
5ff1d584
AV
1217 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1218 status = 0;
1219 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
7c3df132 1220 ql_dbg(ql_dbg_async, vha, 0x5045,
cfb0919c
CD
1221 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1222 type, sp->handle, fcport->d_id.b.domain,
1223 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1224 le16_to_cpu(mbx->mb1));
ac280b67
AV
1225
1226 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1227 if (sp->type == SRB_LOGIN_CMD) {
99b0bec7
AV
1228 fcport->port_type = FCT_TARGET;
1229 if (le16_to_cpu(mbx->mb1) & BIT_0)
1230 fcport->port_type = FCT_INITIATOR;
6ac52608 1231 else if (le16_to_cpu(mbx->mb1) & BIT_1)
99b0bec7 1232 fcport->flags |= FCF_FCP2_DEVICE;
5ff1d584 1233 }
99b0bec7 1234 goto logio_done;
ac280b67
AV
1235 }
1236
1237 data[0] = le16_to_cpu(mbx->mb0);
1238 switch (data[0]) {
1239 case MBS_PORT_ID_USED:
1240 data[1] = le16_to_cpu(mbx->mb1);
1241 break;
1242 case MBS_LOOP_ID_USED:
1243 break;
1244 default:
1245 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV
1246 break;
1247 }
1248
7c3df132 1249 ql_log(ql_log_warn, vha, 0x5046,
cfb0919c
CD
1250 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1251 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1252 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1253 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
ac280b67 1254 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
7c3df132 1255 le16_to_cpu(mbx->mb7));
ac280b67 1256
99b0bec7 1257logio_done:
9ba56b95 1258 sp->done(vha, sp, 0);
ac280b67
AV
1259}
1260
9bc4f4fb
HZ
1261static void
1262qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1263 sts_entry_t *pkt, int iocb_type)
1264{
1265 const char func[] = "CT_IOCB";
1266 const char *type;
9bc4f4fb 1267 srb_t *sp;
9bc4f4fb
HZ
1268 struct fc_bsg_job *bsg_job;
1269 uint16_t comp_status;
9ba56b95 1270 int res;
9bc4f4fb
HZ
1271
1272 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1273 if (!sp)
1274 return;
1275
9ba56b95 1276 bsg_job = sp->u.bsg_job;
9bc4f4fb 1277
9ba56b95 1278 type = "ct pass-through";
9bc4f4fb
HZ
1279
1280 comp_status = le16_to_cpu(pkt->comp_status);
1281
1282 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1283 * fc payload to the caller
1284 */
1285 bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1286 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1287
1288 if (comp_status != CS_COMPLETE) {
1289 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 1290 res = DID_OK << 16;
9bc4f4fb
HZ
1291 bsg_job->reply->reply_payload_rcv_len =
1292 le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
1293
7c3df132
SK
1294 ql_log(ql_log_warn, vha, 0x5048,
1295 "CT pass-through-%s error "
9bc4f4fb 1296 "comp_status-status=0x%x total_byte = 0x%x.\n",
7c3df132
SK
1297 type, comp_status,
1298 bsg_job->reply->reply_payload_rcv_len);
9bc4f4fb 1299 } else {
7c3df132
SK
1300 ql_log(ql_log_warn, vha, 0x5049,
1301 "CT pass-through-%s error "
1302 "comp_status-status=0x%x.\n", type, comp_status);
9ba56b95 1303 res = DID_ERROR << 16;
9bc4f4fb
HZ
1304 bsg_job->reply->reply_payload_rcv_len = 0;
1305 }
cfb0919c 1306 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
7c3df132 1307 (uint8_t *)pkt, sizeof(*pkt));
9bc4f4fb 1308 } else {
9ba56b95 1309 res = DID_OK << 16;
9bc4f4fb
HZ
1310 bsg_job->reply->reply_payload_rcv_len =
1311 bsg_job->reply_payload.payload_len;
1312 bsg_job->reply_len = 0;
1313 }
1314
9ba56b95 1315 sp->done(vha, sp, res);
9bc4f4fb
HZ
1316}
1317
9a069e19
GM
1318static void
1319qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1320 struct sts_entry_24xx *pkt, int iocb_type)
1321{
1322 const char func[] = "ELS_CT_IOCB";
1323 const char *type;
9a069e19 1324 srb_t *sp;
9a069e19
GM
1325 struct fc_bsg_job *bsg_job;
1326 uint16_t comp_status;
1327 uint32_t fw_status[3];
1328 uint8_t* fw_sts_ptr;
9ba56b95 1329 int res;
9a069e19
GM
1330
1331 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1332 if (!sp)
1333 return;
9ba56b95 1334 bsg_job = sp->u.bsg_job;
9a069e19
GM
1335
1336 type = NULL;
9ba56b95 1337 switch (sp->type) {
9a069e19
GM
1338 case SRB_ELS_CMD_RPT:
1339 case SRB_ELS_CMD_HST:
1340 type = "els";
1341 break;
1342 case SRB_CT_CMD:
1343 type = "ct pass-through";
1344 break;
1345 default:
37fed3ee 1346 ql_dbg(ql_dbg_user, vha, 0x503e,
9ba56b95 1347 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
9a069e19
GM
1348 return;
1349 }
1350
1351 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
1352 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
1353 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
1354
1355 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1356 * fc payload to the caller
1357 */
1358 bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1359 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1360
1361 if (comp_status != CS_COMPLETE) {
1362 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 1363 res = DID_OK << 16;
9a069e19 1364 bsg_job->reply->reply_payload_rcv_len =
9ba56b95 1365 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
9a069e19 1366
37fed3ee 1367 ql_dbg(ql_dbg_user, vha, 0x503f,
cfb0919c 1368 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1369 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
cfb0919c 1370 type, sp->handle, comp_status, fw_status[1], fw_status[2],
7c3df132
SK
1371 le16_to_cpu(((struct els_sts_entry_24xx *)
1372 pkt)->total_byte_count));
9a069e19
GM
1373 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1374 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1375 }
1376 else {
37fed3ee 1377 ql_dbg(ql_dbg_user, vha, 0x5040,
cfb0919c 1378 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1379 "error subcode 1=0x%x error subcode 2=0x%x.\n",
cfb0919c 1380 type, sp->handle, comp_status,
7c3df132
SK
1381 le16_to_cpu(((struct els_sts_entry_24xx *)
1382 pkt)->error_subcode_1),
1383 le16_to_cpu(((struct els_sts_entry_24xx *)
1384 pkt)->error_subcode_2));
9ba56b95 1385 res = DID_ERROR << 16;
9a069e19
GM
1386 bsg_job->reply->reply_payload_rcv_len = 0;
1387 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1388 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1389 }
37fed3ee 1390 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
7c3df132 1391 (uint8_t *)pkt, sizeof(*pkt));
9a069e19
GM
1392 }
1393 else {
9ba56b95 1394 res = DID_OK << 16;
9a069e19
GM
1395 bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
1396 bsg_job->reply_len = 0;
1397 }
1398
9ba56b95 1399 sp->done(vha, sp, res);
9a069e19
GM
1400}
1401
ac280b67
AV
1402static void
1403qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
1404 struct logio_entry_24xx *logio)
1405{
1406 const char func[] = "LOGIO-IOCB";
1407 const char *type;
ac280b67
AV
1408 fc_port_t *fcport;
1409 srb_t *sp;
4916392b 1410 struct srb_iocb *lio;
99b0bec7 1411 uint16_t *data;
ac280b67
AV
1412 uint32_t iop[2];
1413
1414 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
1415 if (!sp)
1416 return;
1417
9ba56b95
GM
1418 lio = &sp->u.iocb_cmd;
1419 type = sp->name;
ac280b67 1420 fcport = sp->fcport;
4916392b 1421 data = lio->u.logio.data;
ac280b67 1422
5ff1d584 1423 data[0] = MBS_COMMAND_ERROR;
4916392b 1424 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1425 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1426 if (logio->entry_status) {
5e19ed90 1427 ql_log(ql_log_warn, fcport->vha, 0x5034,
cfb0919c 1428 "Async-%s error entry - hdl=%x"
d3fa9e7d 1429 "portid=%02x%02x%02x entry-status=%x.\n",
cfb0919c
CD
1430 type, sp->handle, fcport->d_id.b.domain,
1431 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1432 logio->entry_status);
1433 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
7c3df132 1434 (uint8_t *)logio, sizeof(*logio));
ac280b67 1435
99b0bec7 1436 goto logio_done;
ac280b67
AV
1437 }
1438
1439 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
5e19ed90 1440 ql_dbg(ql_dbg_async, fcport->vha, 0x5036,
cfb0919c
CD
1441 "Async-%s complete - hdl=%x portid=%02x%02x%02x "
1442 "iop0=%x.\n", type, sp->handle, fcport->d_id.b.domain,
1443 fcport->d_id.b.area, fcport->d_id.b.al_pa,
7c3df132 1444 le32_to_cpu(logio->io_parameter[0]));
ac280b67
AV
1445
1446 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1447 if (sp->type != SRB_LOGIN_CMD)
99b0bec7 1448 goto logio_done;
ac280b67
AV
1449
1450 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1451 if (iop[0] & BIT_4) {
1452 fcport->port_type = FCT_TARGET;
1453 if (iop[0] & BIT_8)
8474f3a0 1454 fcport->flags |= FCF_FCP2_DEVICE;
b0cd579c 1455 } else if (iop[0] & BIT_5)
ac280b67 1456 fcport->port_type = FCT_INITIATOR;
b0cd579c 1457
2d70c103
NB
1458 if (iop[0] & BIT_7)
1459 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1460
ac280b67
AV
1461 if (logio->io_parameter[7] || logio->io_parameter[8])
1462 fcport->supported_classes |= FC_COS_CLASS2;
1463 if (logio->io_parameter[9] || logio->io_parameter[10])
1464 fcport->supported_classes |= FC_COS_CLASS3;
1465
99b0bec7 1466 goto logio_done;
ac280b67
AV
1467 }
1468
1469 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1470 iop[1] = le32_to_cpu(logio->io_parameter[1]);
1471 switch (iop[0]) {
1472 case LSC_SCODE_PORTID_USED:
1473 data[0] = MBS_PORT_ID_USED;
1474 data[1] = LSW(iop[1]);
1475 break;
1476 case LSC_SCODE_NPORT_USED:
1477 data[0] = MBS_LOOP_ID_USED;
1478 break;
ac280b67
AV
1479 default:
1480 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV
1481 break;
1482 }
1483
5e19ed90 1484 ql_dbg(ql_dbg_async, fcport->vha, 0x5037,
cfb0919c
CD
1485 "Async-%s failed - hdl=%x portid=%02x%02x%02x comp=%x "
1486 "iop0=%x iop1=%x.\n", type, sp->handle, fcport->d_id.b.domain,
d3fa9e7d 1487 fcport->d_id.b.area, fcport->d_id.b.al_pa,
ac280b67
AV
1488 le16_to_cpu(logio->comp_status),
1489 le32_to_cpu(logio->io_parameter[0]),
7c3df132 1490 le32_to_cpu(logio->io_parameter[1]));
ac280b67 1491
99b0bec7 1492logio_done:
9ba56b95 1493 sp->done(vha, sp, 0);
ac280b67
AV
1494}
1495
3822263e 1496static void
faef62d1 1497qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
3822263e
MI
1498{
1499 const char func[] = "TMF-IOCB";
1500 const char *type;
1501 fc_port_t *fcport;
1502 srb_t *sp;
1503 struct srb_iocb *iocb;
3822263e 1504 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
3822263e
MI
1505
1506 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
1507 if (!sp)
1508 return;
1509
9ba56b95
GM
1510 iocb = &sp->u.iocb_cmd;
1511 type = sp->name;
3822263e 1512 fcport = sp->fcport;
faef62d1 1513 iocb->u.tmf.data = QLA_SUCCESS;
3822263e
MI
1514
1515 if (sts->entry_status) {
5e19ed90 1516 ql_log(ql_log_warn, fcport->vha, 0x5038,
cfb0919c
CD
1517 "Async-%s error - hdl=%x entry-status(%x).\n",
1518 type, sp->handle, sts->entry_status);
faef62d1 1519 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
3822263e 1520 } else if (sts->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
5e19ed90 1521 ql_log(ql_log_warn, fcport->vha, 0x5039,
cfb0919c
CD
1522 "Async-%s error - hdl=%x completion status(%x).\n",
1523 type, sp->handle, sts->comp_status);
faef62d1
AB
1524 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1525 } else if ((le16_to_cpu(sts->scsi_status) &
3822263e 1526 SS_RESPONSE_INFO_LEN_VALID)) {
faef62d1
AB
1527 if (le32_to_cpu(sts->rsp_data_len) < 4) {
1528 ql_log(ql_log_warn, fcport->vha, 0x503b,
1529 "Async-%s error - hdl=%x not enough response(%d).\n",
1530 type, sp->handle, sts->rsp_data_len);
1531 } else if (sts->data[3]) {
1532 ql_log(ql_log_warn, fcport->vha, 0x503c,
1533 "Async-%s error - hdl=%x response(%x).\n",
1534 type, sp->handle, sts->data[3]);
1535 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1536 }
3822263e
MI
1537 }
1538
faef62d1 1539 if (iocb->u.tmf.data != QLA_SUCCESS)
7c3df132
SK
1540 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055,
1541 (uint8_t *)sts, sizeof(*sts));
3822263e 1542
9ba56b95 1543 sp->done(vha, sp, 0);
3822263e
MI
1544}
1545
1da177e4
LT
1546/**
1547 * qla2x00_process_response_queue() - Process response queue entries.
1548 * @ha: SCSI driver HA context
1549 */
1550void
73208dfd 1551qla2x00_process_response_queue(struct rsp_que *rsp)
1da177e4 1552{
73208dfd
AC
1553 struct scsi_qla_host *vha;
1554 struct qla_hw_data *ha = rsp->hw;
3d71644c 1555 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT
1556 sts_entry_t *pkt;
1557 uint16_t handle_cnt;
1558 uint16_t cnt;
73208dfd 1559
2afa19a9 1560 vha = pci_get_drvdata(ha->pdev);
1da177e4 1561
e315cd28 1562 if (!vha->flags.online)
1da177e4
LT
1563 return;
1564
e315cd28
AC
1565 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
1566 pkt = (sts_entry_t *)rsp->ring_ptr;
1da177e4 1567
e315cd28
AC
1568 rsp->ring_index++;
1569 if (rsp->ring_index == rsp->length) {
1570 rsp->ring_index = 0;
1571 rsp->ring_ptr = rsp->ring;
1da177e4 1572 } else {
e315cd28 1573 rsp->ring_ptr++;
1da177e4
LT
1574 }
1575
1576 if (pkt->entry_status != 0) {
73208dfd 1577 qla2x00_error_entry(vha, rsp, pkt);
1da177e4
LT
1578 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
1579 wmb();
1580 continue;
1581 }
1582
1583 switch (pkt->entry_type) {
1584 case STATUS_TYPE:
73208dfd 1585 qla2x00_status_entry(vha, rsp, pkt);
1da177e4
LT
1586 break;
1587 case STATUS_TYPE_21:
1588 handle_cnt = ((sts21_entry_t *)pkt)->handle_count;
1589 for (cnt = 0; cnt < handle_cnt; cnt++) {
73208dfd 1590 qla2x00_process_completed_request(vha, rsp->req,
1da177e4
LT
1591 ((sts21_entry_t *)pkt)->handle[cnt]);
1592 }
1593 break;
1594 case STATUS_TYPE_22:
1595 handle_cnt = ((sts22_entry_t *)pkt)->handle_count;
1596 for (cnt = 0; cnt < handle_cnt; cnt++) {
73208dfd 1597 qla2x00_process_completed_request(vha, rsp->req,
1da177e4
LT
1598 ((sts22_entry_t *)pkt)->handle[cnt]);
1599 }
1600 break;
1601 case STATUS_CONT_TYPE:
2afa19a9 1602 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
1da177e4 1603 break;
ac280b67
AV
1604 case MBX_IOCB_TYPE:
1605 qla2x00_mbx_iocb_entry(vha, rsp->req,
1606 (struct mbx_entry *)pkt);
3822263e 1607 break;
9bc4f4fb
HZ
1608 case CT_IOCB_TYPE:
1609 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
1610 break;
1da177e4
LT
1611 default:
1612 /* Type Not Supported. */
7c3df132
SK
1613 ql_log(ql_log_warn, vha, 0x504a,
1614 "Received unknown response pkt type %x "
1da177e4 1615 "entry status=%x.\n",
7c3df132 1616 pkt->entry_type, pkt->entry_status);
1da177e4
LT
1617 break;
1618 }
1619 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
1620 wmb();
1621 }
1622
1623 /* Adjust ring index */
e315cd28 1624 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
1da177e4
LT
1625}
1626
4733fcb1 1627static inline void
5544213b 1628qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
9ba56b95 1629 uint32_t sense_len, struct rsp_que *rsp, int res)
4733fcb1 1630{
7c3df132 1631 struct scsi_qla_host *vha = sp->fcport->vha;
9ba56b95
GM
1632 struct scsi_cmnd *cp = GET_CMD_SP(sp);
1633 uint32_t track_sense_len;
4733fcb1
AV
1634
1635 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
1636 sense_len = SCSI_SENSE_BUFFERSIZE;
1637
9ba56b95
GM
1638 SET_CMD_SENSE_LEN(sp, sense_len);
1639 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
1640 track_sense_len = sense_len;
1641
1642 if (sense_len > par_sense_len)
5544213b 1643 sense_len = par_sense_len;
4733fcb1
AV
1644
1645 memcpy(cp->sense_buffer, sense_data, sense_len);
1646
9ba56b95
GM
1647 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
1648 track_sense_len -= sense_len;
1649 SET_CMD_SENSE_LEN(sp, track_sense_len);
1650
1651 if (track_sense_len != 0) {
2afa19a9 1652 rsp->status_srb = sp;
9ba56b95
GM
1653 cp->result = res;
1654 }
4733fcb1 1655
cfb0919c
CD
1656 if (sense_len) {
1657 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
9cb78c16 1658 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
cfb0919c
CD
1659 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
1660 cp);
7c3df132
SK
1661 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
1662 cp->sense_buffer, sense_len);
cfb0919c 1663 }
4733fcb1
AV
1664}
1665
bad75002
AE
1666struct scsi_dif_tuple {
1667 __be16 guard; /* Checksum */
d6a03581 1668 __be16 app_tag; /* APPL identifier */
bad75002
AE
1669 __be32 ref_tag; /* Target LBA or indirect LBA */
1670};
1671
1672/*
1673 * Checks the guard or meta-data for the type of error
1674 * detected by the HBA. In case of errors, we set the
1675 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
1676 * to indicate to the kernel that the HBA detected error.
1677 */
8cb2049c 1678static inline int
bad75002
AE
1679qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
1680{
7c3df132 1681 struct scsi_qla_host *vha = sp->fcport->vha;
9ba56b95 1682 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
8cb2049c
AE
1683 uint8_t *ap = &sts24->data[12];
1684 uint8_t *ep = &sts24->data[20];
bad75002
AE
1685 uint32_t e_ref_tag, a_ref_tag;
1686 uint16_t e_app_tag, a_app_tag;
1687 uint16_t e_guard, a_guard;
1688
8cb2049c
AE
1689 /*
1690 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
1691 * would make guard field appear at offset 2
1692 */
1693 a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
1694 a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
1695 a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
1696 e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
1697 e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
1698 e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
bad75002 1699
7c3df132
SK
1700 ql_dbg(ql_dbg_io, vha, 0x3023,
1701 "iocb(s) %p Returned STATUS.\n", sts24);
bad75002 1702
7c3df132
SK
1703 ql_dbg(ql_dbg_io, vha, 0x3024,
1704 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
bad75002 1705 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
7c3df132 1706 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
bad75002 1707 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
7c3df132 1708 a_app_tag, e_app_tag, a_guard, e_guard);
bad75002 1709
8cb2049c
AE
1710 /*
1711 * Ignore sector if:
1712 * For type 3: ref & app tag is all 'f's
1713 * For type 0,1,2: app tag is all 'f's
1714 */
1715 if ((a_app_tag == 0xffff) &&
1716 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
1717 (a_ref_tag == 0xffffffff))) {
1718 uint32_t blocks_done, resid;
1719 sector_t lba_s = scsi_get_lba(cmd);
1720
1721 /* 2TB boundary case covered automatically with this */
1722 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
1723
1724 resid = scsi_bufflen(cmd) - (blocks_done *
1725 cmd->device->sector_size);
1726
1727 scsi_set_resid(cmd, resid);
1728 cmd->result = DID_OK << 16;
1729
1730 /* Update protection tag */
1731 if (scsi_prot_sg_count(cmd)) {
1732 uint32_t i, j = 0, k = 0, num_ent;
1733 struct scatterlist *sg;
1734 struct sd_dif_tuple *spt;
1735
1736 /* Patch the corresponding protection tags */
1737 scsi_for_each_prot_sg(cmd, sg,
1738 scsi_prot_sg_count(cmd), i) {
1739 num_ent = sg_dma_len(sg) / 8;
1740 if (k + num_ent < blocks_done) {
1741 k += num_ent;
1742 continue;
1743 }
1744 j = blocks_done - k - 1;
1745 k = blocks_done;
1746 break;
1747 }
1748
1749 if (k != blocks_done) {
cfb0919c 1750 ql_log(ql_log_warn, vha, 0x302f,
8ec9c7fb
RD
1751 "unexpected tag values tag:lba=%x:%llx)\n",
1752 e_ref_tag, (unsigned long long)lba_s);
8cb2049c
AE
1753 return 1;
1754 }
1755
1756 spt = page_address(sg_page(sg)) + sg->offset;
1757 spt += j;
1758
1759 spt->app_tag = 0xffff;
1760 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
1761 spt->ref_tag = 0xffffffff;
1762 }
1763
1764 return 0;
1765 }
1766
bad75002
AE
1767 /* check guard */
1768 if (e_guard != a_guard) {
1769 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
1770 0x10, 0x1);
1771 set_driver_byte(cmd, DRIVER_SENSE);
1772 set_host_byte(cmd, DID_ABORT);
1773 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
8cb2049c 1774 return 1;
bad75002
AE
1775 }
1776
e02587d7
AE
1777 /* check ref tag */
1778 if (e_ref_tag != a_ref_tag) {
bad75002 1779 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 1780 0x10, 0x3);
bad75002
AE
1781 set_driver_byte(cmd, DRIVER_SENSE);
1782 set_host_byte(cmd, DID_ABORT);
1783 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
8cb2049c 1784 return 1;
bad75002
AE
1785 }
1786
e02587d7
AE
1787 /* check appl tag */
1788 if (e_app_tag != a_app_tag) {
bad75002 1789 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 1790 0x10, 0x2);
bad75002
AE
1791 set_driver_byte(cmd, DRIVER_SENSE);
1792 set_host_byte(cmd, DID_ABORT);
1793 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
8cb2049c 1794 return 1;
bad75002 1795 }
e02587d7 1796
8cb2049c 1797 return 1;
bad75002
AE
1798}
1799
a9b6f722
SK
1800static void
1801qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
1802 struct req_que *req, uint32_t index)
1803{
1804 struct qla_hw_data *ha = vha->hw;
1805 srb_t *sp;
1806 uint16_t comp_status;
1807 uint16_t scsi_status;
1808 uint16_t thread_id;
1809 uint32_t rval = EXT_STATUS_OK;
1810 struct fc_bsg_job *bsg_job = NULL;
1811 sts_entry_t *sts;
1812 struct sts_entry_24xx *sts24;
1813 sts = (sts_entry_t *) pkt;
1814 sts24 = (struct sts_entry_24xx *) pkt;
1815
1816 /* Validate handle. */
8d93f550 1817 if (index >= req->num_outstanding_cmds) {
a9b6f722
SK
1818 ql_log(ql_log_warn, vha, 0x70af,
1819 "Invalid SCSI completion handle 0x%x.\n", index);
1820 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1821 return;
1822 }
1823
1824 sp = req->outstanding_cmds[index];
1825 if (sp) {
1826 /* Free outstanding command slot. */
1827 req->outstanding_cmds[index] = NULL;
1828 bsg_job = sp->u.bsg_job;
1829 } else {
1830 ql_log(ql_log_warn, vha, 0x70b0,
1831 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
1832 req->id, index);
1833
1834 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1835 return;
1836 }
1837
1838 if (IS_FWI2_CAPABLE(ha)) {
1839 comp_status = le16_to_cpu(sts24->comp_status);
1840 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
1841 } else {
1842 comp_status = le16_to_cpu(sts->comp_status);
1843 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
1844 }
1845
1846 thread_id = bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
1847 switch (comp_status) {
1848 case CS_COMPLETE:
1849 if (scsi_status == 0) {
1850 bsg_job->reply->reply_payload_rcv_len =
1851 bsg_job->reply_payload.payload_len;
fabbb8df
JC
1852 vha->qla_stats.input_bytes +=
1853 bsg_job->reply->reply_payload_rcv_len;
1854 vha->qla_stats.input_requests++;
a9b6f722
SK
1855 rval = EXT_STATUS_OK;
1856 }
1857 goto done;
1858
1859 case CS_DATA_OVERRUN:
1860 ql_dbg(ql_dbg_user, vha, 0x70b1,
1861 "Command completed with date overrun thread_id=%d\n",
1862 thread_id);
1863 rval = EXT_STATUS_DATA_OVERRUN;
1864 break;
1865
1866 case CS_DATA_UNDERRUN:
1867 ql_dbg(ql_dbg_user, vha, 0x70b2,
1868 "Command completed with date underrun thread_id=%d\n",
1869 thread_id);
1870 rval = EXT_STATUS_DATA_UNDERRUN;
1871 break;
1872 case CS_BIDIR_RD_OVERRUN:
1873 ql_dbg(ql_dbg_user, vha, 0x70b3,
1874 "Command completed with read data overrun thread_id=%d\n",
1875 thread_id);
1876 rval = EXT_STATUS_DATA_OVERRUN;
1877 break;
1878
1879 case CS_BIDIR_RD_WR_OVERRUN:
1880 ql_dbg(ql_dbg_user, vha, 0x70b4,
1881 "Command completed with read and write data overrun "
1882 "thread_id=%d\n", thread_id);
1883 rval = EXT_STATUS_DATA_OVERRUN;
1884 break;
1885
1886 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
1887 ql_dbg(ql_dbg_user, vha, 0x70b5,
1888 "Command completed with read data over and write data "
1889 "underrun thread_id=%d\n", thread_id);
1890 rval = EXT_STATUS_DATA_OVERRUN;
1891 break;
1892
1893 case CS_BIDIR_RD_UNDERRUN:
1894 ql_dbg(ql_dbg_user, vha, 0x70b6,
1895 "Command completed with read data data underrun "
1896 "thread_id=%d\n", thread_id);
1897 rval = EXT_STATUS_DATA_UNDERRUN;
1898 break;
1899
1900 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
1901 ql_dbg(ql_dbg_user, vha, 0x70b7,
1902 "Command completed with read data under and write data "
1903 "overrun thread_id=%d\n", thread_id);
1904 rval = EXT_STATUS_DATA_UNDERRUN;
1905 break;
1906
1907 case CS_BIDIR_RD_WR_UNDERRUN:
1908 ql_dbg(ql_dbg_user, vha, 0x70b8,
1909 "Command completed with read and write data underrun "
1910 "thread_id=%d\n", thread_id);
1911 rval = EXT_STATUS_DATA_UNDERRUN;
1912 break;
1913
1914 case CS_BIDIR_DMA:
1915 ql_dbg(ql_dbg_user, vha, 0x70b9,
1916 "Command completed with data DMA error thread_id=%d\n",
1917 thread_id);
1918 rval = EXT_STATUS_DMA_ERR;
1919 break;
1920
1921 case CS_TIMEOUT:
1922 ql_dbg(ql_dbg_user, vha, 0x70ba,
1923 "Command completed with timeout thread_id=%d\n",
1924 thread_id);
1925 rval = EXT_STATUS_TIMEOUT;
1926 break;
1927 default:
1928 ql_dbg(ql_dbg_user, vha, 0x70bb,
1929 "Command completed with completion status=0x%x "
1930 "thread_id=%d\n", comp_status, thread_id);
1931 rval = EXT_STATUS_ERR;
1932 break;
1933 }
1934 bsg_job->reply->reply_payload_rcv_len = 0;
1935
1936done:
1937 /* Return the vendor specific reply to API */
1938 bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
1939 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1940 /* Always return DID_OK, bsg will send the vendor specific response
1941 * in this case only */
1942 sp->done(vha, sp, (DID_OK << 6));
1943
1944}
1945
1da177e4
LT
1946/**
1947 * qla2x00_status_entry() - Process a Status IOCB entry.
1948 * @ha: SCSI driver HA context
1949 * @pkt: Entry pointer
1950 */
1951static void
73208dfd 1952qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1da177e4 1953{
1da177e4 1954 srb_t *sp;
1da177e4
LT
1955 fc_port_t *fcport;
1956 struct scsi_cmnd *cp;
9a853f71
AV
1957 sts_entry_t *sts;
1958 struct sts_entry_24xx *sts24;
1da177e4
LT
1959 uint16_t comp_status;
1960 uint16_t scsi_status;
b7d2280c 1961 uint16_t ox_id;
1da177e4
LT
1962 uint8_t lscsi_status;
1963 int32_t resid;
5544213b
AV
1964 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
1965 fw_resid_len;
9a853f71 1966 uint8_t *rsp_info, *sense_data;
e315cd28 1967 struct qla_hw_data *ha = vha->hw;
2afa19a9
AC
1968 uint32_t handle;
1969 uint16_t que;
1970 struct req_que *req;
b7d2280c 1971 int logit = 1;
9ba56b95 1972 int res = 0;
a9b6f722 1973 uint16_t state_flags = 0;
9a853f71
AV
1974
1975 sts = (sts_entry_t *) pkt;
1976 sts24 = (struct sts_entry_24xx *) pkt;
e428924c 1977 if (IS_FWI2_CAPABLE(ha)) {
9a853f71
AV
1978 comp_status = le16_to_cpu(sts24->comp_status);
1979 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
a9b6f722 1980 state_flags = le16_to_cpu(sts24->state_flags);
9a853f71
AV
1981 } else {
1982 comp_status = le16_to_cpu(sts->comp_status);
1983 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
1984 }
2afa19a9
AC
1985 handle = (uint32_t) LSW(sts->handle);
1986 que = MSW(sts->handle);
1987 req = ha->req_q_map[que];
a9083016 1988
36008cf1
CD
1989 /* Check for invalid queue pointer */
1990 if (req == NULL ||
1991 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
1992 ql_dbg(ql_dbg_io, vha, 0x3059,
1993 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
1994 "que=%u.\n", sts->handle, req, que);
1995 return;
1996 }
1997
1da177e4 1998 /* Validate handle. */
8d93f550 1999 if (handle < req->num_outstanding_cmds)
2afa19a9 2000 sp = req->outstanding_cmds[handle];
8d93f550 2001 else
1da177e4
LT
2002 sp = NULL;
2003
2004 if (sp == NULL) {
cfb0919c 2005 ql_dbg(ql_dbg_io, vha, 0x3017,
7c3df132 2006 "Invalid status handle (0x%x).\n", sts->handle);
1da177e4 2007
acd3ce88
CD
2008 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2009 if (IS_P3P_TYPE(ha))
2010 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2011 else
2012 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2013 qla2xxx_wake_dpc(vha);
2014 }
1da177e4
LT
2015 return;
2016 }
a9b6f722
SK
2017
2018 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2019 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2020 return;
2021 }
2022
faef62d1
AB
2023 /* Task Management completion. */
2024 if (sp->type == SRB_TM_CMD) {
2025 qla24xx_tm_iocb_entry(vha, req, pkt);
2026 return;
2027 }
2028
a9b6f722
SK
2029 /* Fast path completion. */
2030 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2031 qla2x00_process_completed_request(vha, req, handle);
2032
2033 return;
2034 }
2035
2036 req->outstanding_cmds[handle] = NULL;
9ba56b95 2037 cp = GET_CMD_SP(sp);
1da177e4 2038 if (cp == NULL) {
cfb0919c 2039 ql_dbg(ql_dbg_io, vha, 0x3018,
7c3df132
SK
2040 "Command already returned (0x%x/%p).\n",
2041 sts->handle, sp);
1da177e4
LT
2042
2043 return;
2044 }
2045
8ae6d9c7 2046 lscsi_status = scsi_status & STATUS_MASK;
1da177e4 2047
bdf79621 2048 fcport = sp->fcport;
1da177e4 2049
b7d2280c 2050 ox_id = 0;
5544213b
AV
2051 sense_len = par_sense_len = rsp_info_len = resid_len =
2052 fw_resid_len = 0;
e428924c 2053 if (IS_FWI2_CAPABLE(ha)) {
0f00a206
LC
2054 if (scsi_status & SS_SENSE_LEN_VALID)
2055 sense_len = le32_to_cpu(sts24->sense_len);
2056 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2057 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2058 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2059 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2060 if (comp_status == CS_DATA_UNDERRUN)
2061 fw_resid_len = le32_to_cpu(sts24->residual_len);
9a853f71
AV
2062 rsp_info = sts24->data;
2063 sense_data = sts24->data;
2064 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
b7d2280c 2065 ox_id = le16_to_cpu(sts24->ox_id);
5544213b 2066 par_sense_len = sizeof(sts24->data);
9a853f71 2067 } else {
0f00a206
LC
2068 if (scsi_status & SS_SENSE_LEN_VALID)
2069 sense_len = le16_to_cpu(sts->req_sense_length);
2070 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2071 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
9a853f71
AV
2072 resid_len = le32_to_cpu(sts->residual_length);
2073 rsp_info = sts->rsp_info;
2074 sense_data = sts->req_sense_data;
5544213b 2075 par_sense_len = sizeof(sts->req_sense_data);
9a853f71
AV
2076 }
2077
1da177e4
LT
2078 /* Check for any FCP transport errors. */
2079 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
9a853f71 2080 /* Sense data lies beyond any FCP RESPONSE data. */
5544213b 2081 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 2082 sense_data += rsp_info_len;
5544213b
AV
2083 par_sense_len -= rsp_info_len;
2084 }
9a853f71 2085 if (rsp_info_len > 3 && rsp_info[3]) {
5e19ed90 2086 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
7c3df132
SK
2087 "FCP I/O protocol failure (0x%x/0x%x).\n",
2088 rsp_info_len, rsp_info[3]);
1da177e4 2089
9ba56b95 2090 res = DID_BUS_BUSY << 16;
b7d2280c 2091 goto out;
1da177e4
LT
2092 }
2093 }
2094
3e8ce320
AV
2095 /* Check for overrun. */
2096 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
2097 scsi_status & SS_RESIDUAL_OVER)
2098 comp_status = CS_DATA_OVERRUN;
2099
1da177e4
LT
2100 /*
2101 * Based on Host and scsi status generate status code for Linux
2102 */
2103 switch (comp_status) {
2104 case CS_COMPLETE:
df7baa50 2105 case CS_QUEUE_FULL:
1da177e4 2106 if (scsi_status == 0) {
9ba56b95 2107 res = DID_OK << 16;
1da177e4
LT
2108 break;
2109 }
2110 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
9a853f71 2111 resid = resid_len;
385d70b4 2112 scsi_set_resid(cp, resid);
0da69df1
AV
2113
2114 if (!lscsi_status &&
385d70b4 2115 ((unsigned)(scsi_bufflen(cp) - resid) <
0da69df1 2116 cp->underflow)) {
5e19ed90 2117 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
7c3df132 2118 "Mid-layer underflow "
b7d2280c 2119 "detected (0x%x of 0x%x bytes).\n",
7c3df132 2120 resid, scsi_bufflen(cp));
0da69df1 2121
9ba56b95 2122 res = DID_ERROR << 16;
0da69df1
AV
2123 break;
2124 }
1da177e4 2125 }
9ba56b95 2126 res = DID_OK << 16 | lscsi_status;
1da177e4 2127
df7baa50 2128 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2129 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
7c3df132 2130 "QUEUE FULL detected.\n");
df7baa50
AV
2131 break;
2132 }
b7d2280c 2133 logit = 0;
1da177e4
LT
2134 if (lscsi_status != SS_CHECK_CONDITION)
2135 break;
2136
b80ca4f7 2137 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT
2138 if (!(scsi_status & SS_SENSE_LEN_VALID))
2139 break;
2140
5544213b 2141 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
9ba56b95 2142 rsp, res);
1da177e4
LT
2143 break;
2144
2145 case CS_DATA_UNDERRUN:
ed17c71b 2146 /* Use F/W calculated residual length. */
0f00a206
LC
2147 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
2148 scsi_set_resid(cp, resid);
2149 if (scsi_status & SS_RESIDUAL_UNDER) {
2150 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
5e19ed90 2151 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
7c3df132
SK
2152 "Dropped frame(s) detected "
2153 "(0x%x of 0x%x bytes).\n",
2154 resid, scsi_bufflen(cp));
0f00a206 2155
9ba56b95 2156 res = DID_ERROR << 16 | lscsi_status;
4e85e3d9 2157 goto check_scsi_status;
6acf8190 2158 }
ed17c71b 2159
0f00a206
LC
2160 if (!lscsi_status &&
2161 ((unsigned)(scsi_bufflen(cp) - resid) <
2162 cp->underflow)) {
5e19ed90 2163 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
7c3df132 2164 "Mid-layer underflow "
b7d2280c 2165 "detected (0x%x of 0x%x bytes).\n",
7c3df132 2166 resid, scsi_bufflen(cp));
e038a1be 2167
9ba56b95 2168 res = DID_ERROR << 16;
0f00a206
LC
2169 break;
2170 }
4aee5766
GM
2171 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
2172 lscsi_status != SAM_STAT_BUSY) {
2173 /*
2174 * scsi status of task set and busy are considered to be
2175 * task not completed.
2176 */
2177
5e19ed90 2178 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
7c3df132 2179 "Dropped frame(s) detected (0x%x "
4aee5766
GM
2180 "of 0x%x bytes).\n", resid,
2181 scsi_bufflen(cp));
0f00a206 2182
9ba56b95 2183 res = DID_ERROR << 16 | lscsi_status;
0374f55e 2184 goto check_scsi_status;
4aee5766
GM
2185 } else {
2186 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
2187 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2188 scsi_status, lscsi_status);
1da177e4
LT
2189 }
2190
9ba56b95 2191 res = DID_OK << 16 | lscsi_status;
b7d2280c 2192 logit = 0;
0f00a206 2193
0374f55e 2194check_scsi_status:
1da177e4 2195 /*
fa2a1ce5 2196 * Check to see if SCSI Status is non zero. If so report SCSI
1da177e4
LT
2197 * Status.
2198 */
2199 if (lscsi_status != 0) {
ffec28a3 2200 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2201 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
7c3df132 2202 "QUEUE FULL detected.\n");
b7d2280c 2203 logit = 1;
ffec28a3
AV
2204 break;
2205 }
1da177e4
LT
2206 if (lscsi_status != SS_CHECK_CONDITION)
2207 break;
2208
b80ca4f7 2209 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT
2210 if (!(scsi_status & SS_SENSE_LEN_VALID))
2211 break;
2212
5544213b 2213 qla2x00_handle_sense(sp, sense_data, par_sense_len,
9ba56b95 2214 sense_len, rsp, res);
1da177e4
LT
2215 }
2216 break;
2217
1da177e4
LT
2218 case CS_PORT_LOGGED_OUT:
2219 case CS_PORT_CONFIG_CHG:
2220 case CS_PORT_BUSY:
2221 case CS_INCOMPLETE:
2222 case CS_PORT_UNAVAILABLE:
b7d2280c 2223 case CS_TIMEOUT:
ff454b01
CD
2224 case CS_RESET:
2225
056a4483
MC
2226 /*
2227 * We are going to have the fc class block the rport
2228 * while we try to recover so instruct the mid layer
2229 * to requeue until the class decides how to handle this.
2230 */
9ba56b95 2231 res = DID_TRANSPORT_DISRUPTED << 16;
b7d2280c
AV
2232
2233 if (comp_status == CS_TIMEOUT) {
2234 if (IS_FWI2_CAPABLE(ha))
2235 break;
2236 else if ((le16_to_cpu(sts->status_flags) &
2237 SF_LOGOUT_SENT) == 0)
2238 break;
2239 }
2240
5e19ed90 2241 ql_dbg(ql_dbg_io, fcport->vha, 0x3021,
0e948975
CD
2242 "Port to be marked lost on fcport=%02x%02x%02x, current "
2243 "port state= %s.\n", fcport->d_id.b.domain,
2244 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2245 port_state_str[atomic_read(&fcport->state)]);
b7d2280c 2246
a7a28504 2247 if (atomic_read(&fcport->state) == FCS_ONLINE)
e315cd28 2248 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
1da177e4
LT
2249 break;
2250
1da177e4 2251 case CS_ABORTED:
9ba56b95 2252 res = DID_RESET << 16;
1da177e4 2253 break;
bad75002
AE
2254
2255 case CS_DIF_ERROR:
8cb2049c 2256 logit = qla2x00_handle_dif_error(sp, sts24);
fb6e4668 2257 res = cp->result;
bad75002 2258 break;
9e522cd8
AE
2259
2260 case CS_TRANSPORT:
2261 res = DID_ERROR << 16;
2262
2263 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
2264 break;
2265
2266 if (state_flags & BIT_4)
2267 scmd_printk(KERN_WARNING, cp,
2268 "Unsupported device '%s' found.\n",
2269 cp->device->vendor);
2270 break;
2271
1da177e4 2272 default:
9ba56b95 2273 res = DID_ERROR << 16;
1da177e4
LT
2274 break;
2275 }
2276
b7d2280c
AV
2277out:
2278 if (logit)
5e19ed90 2279 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
9cb78c16 2280 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
7b833558 2281 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
7c3df132 2282 "rsp_info=0x%x resid=0x%x fw_resid=0x%x.\n",
9ba56b95 2283 comp_status, scsi_status, res, vha->host_no,
cfb0919c
CD
2284 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
2285 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
7b833558 2286 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
7c3df132 2287 resid_len, fw_resid_len);
b7d2280c 2288
2afa19a9 2289 if (rsp->status_srb == NULL)
9ba56b95 2290 sp->done(ha, sp, res);
1da177e4
LT
2291}
2292
2293/**
2294 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
2295 * @ha: SCSI driver HA context
2296 * @pkt: Entry pointer
2297 *
2298 * Extended sense data.
2299 */
2300static void
2afa19a9 2301qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
1da177e4 2302{
9ba56b95 2303 uint8_t sense_sz = 0;
2afa19a9 2304 struct qla_hw_data *ha = rsp->hw;
7c3df132 2305 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
9ba56b95 2306 srb_t *sp = rsp->status_srb;
1da177e4 2307 struct scsi_cmnd *cp;
9ba56b95
GM
2308 uint32_t sense_len;
2309 uint8_t *sense_ptr;
1da177e4 2310
9ba56b95
GM
2311 if (!sp || !GET_CMD_SENSE_LEN(sp))
2312 return;
1da177e4 2313
9ba56b95
GM
2314 sense_len = GET_CMD_SENSE_LEN(sp);
2315 sense_ptr = GET_CMD_SENSE_PTR(sp);
1da177e4 2316
9ba56b95
GM
2317 cp = GET_CMD_SP(sp);
2318 if (cp == NULL) {
2319 ql_log(ql_log_warn, vha, 0x3025,
2320 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
1da177e4 2321
9ba56b95
GM
2322 rsp->status_srb = NULL;
2323 return;
1da177e4 2324 }
1da177e4 2325
9ba56b95
GM
2326 if (sense_len > sizeof(pkt->data))
2327 sense_sz = sizeof(pkt->data);
2328 else
2329 sense_sz = sense_len;
c4631191 2330
9ba56b95
GM
2331 /* Move sense data. */
2332 if (IS_FWI2_CAPABLE(ha))
2333 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
2334 memcpy(sense_ptr, pkt->data, sense_sz);
2335 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
2336 sense_ptr, sense_sz);
c4631191 2337
9ba56b95
GM
2338 sense_len -= sense_sz;
2339 sense_ptr += sense_sz;
c4631191 2340
9ba56b95
GM
2341 SET_CMD_SENSE_PTR(sp, sense_ptr);
2342 SET_CMD_SENSE_LEN(sp, sense_len);
2343
2344 /* Place command on done queue. */
2345 if (sense_len == 0) {
2346 rsp->status_srb = NULL;
2347 sp->done(ha, sp, cp->result);
c4631191 2348 }
c4631191
GM
2349}
2350
1da177e4
LT
2351/**
2352 * qla2x00_error_entry() - Process an error entry.
2353 * @ha: SCSI driver HA context
2354 * @pkt: Entry pointer
2355 */
2356static void
73208dfd 2357qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
1da177e4
LT
2358{
2359 srb_t *sp;
e315cd28 2360 struct qla_hw_data *ha = vha->hw;
c4631191 2361 const char func[] = "ERROR-IOCB";
2afa19a9 2362 uint16_t que = MSW(pkt->handle);
a6fe35c0 2363 struct req_que *req = NULL;
9ba56b95 2364 int res = DID_ERROR << 16;
7c3df132 2365
9ba56b95
GM
2366 ql_dbg(ql_dbg_async, vha, 0x502a,
2367 "type of error status in response: 0x%x\n", pkt->entry_status);
2368
a6fe35c0
AE
2369 if (que >= ha->max_req_queues || !ha->req_q_map[que])
2370 goto fatal;
2371
2372 req = ha->req_q_map[que];
2373
9ba56b95
GM
2374 if (pkt->entry_status & RF_BUSY)
2375 res = DID_BUS_BUSY << 16;
1da177e4 2376
c4631191 2377 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
a6fe35c0 2378 if (sp) {
9ba56b95 2379 sp->done(ha, sp, res);
a6fe35c0 2380 return;
1da177e4 2381 }
a6fe35c0
AE
2382fatal:
2383 ql_log(ql_log_warn, vha, 0x5030,
2384 "Error entry - invalid handle/queue.\n");
2385
7ec0effd 2386 if (IS_P3P_TYPE(ha))
a6fe35c0
AE
2387 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2388 else
2389 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2390 qla2xxx_wake_dpc(vha);
1da177e4
LT
2391}
2392
9a853f71
AV
2393/**
2394 * qla24xx_mbx_completion() - Process mailbox command completions.
2395 * @ha: SCSI driver HA context
2396 * @mb0: Mailbox0 register
2397 */
2398static void
e315cd28 2399qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
9a853f71
AV
2400{
2401 uint16_t cnt;
4fa94f83 2402 uint32_t mboxes;
9a853f71 2403 uint16_t __iomem *wptr;
e315cd28 2404 struct qla_hw_data *ha = vha->hw;
9a853f71
AV
2405 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2406
4fa94f83
AV
2407 /* Read all mbox registers? */
2408 mboxes = (1 << ha->mbx_count) - 1;
2409 if (!ha->mcp)
a720101d 2410 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
4fa94f83
AV
2411 else
2412 mboxes = ha->mcp->in_mb;
2413
9a853f71
AV
2414 /* Load return mailbox registers. */
2415 ha->flags.mbox_int = 1;
2416 ha->mailbox_out[0] = mb0;
4fa94f83 2417 mboxes >>= 1;
9a853f71
AV
2418 wptr = (uint16_t __iomem *)&reg->mailbox1;
2419
2420 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
4fa94f83
AV
2421 if (mboxes & BIT_0)
2422 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
2423
2424 mboxes >>= 1;
9a853f71
AV
2425 wptr++;
2426 }
9a853f71
AV
2427}
2428
4440e46d
AB
2429static void
2430qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2431 struct abort_entry_24xx *pkt)
2432{
2433 const char func[] = "ABT_IOCB";
2434 srb_t *sp;
2435 struct srb_iocb *abt;
2436
2437 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2438 if (!sp)
2439 return;
2440
2441 abt = &sp->u.iocb_cmd;
2442 abt->u.abt.comp_status = le32_to_cpu(pkt->nport_handle);
2443 sp->done(vha, sp, 0);
2444}
2445
9a853f71
AV
2446/**
2447 * qla24xx_process_response_queue() - Process response queue entries.
2448 * @ha: SCSI driver HA context
2449 */
2afa19a9
AC
2450void qla24xx_process_response_queue(struct scsi_qla_host *vha,
2451 struct rsp_que *rsp)
9a853f71 2452{
9a853f71 2453 struct sts_entry_24xx *pkt;
a9083016 2454 struct qla_hw_data *ha = vha->hw;
9a853f71 2455
e315cd28 2456 if (!vha->flags.online)
9a853f71
AV
2457 return;
2458
e315cd28
AC
2459 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2460 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
9a853f71 2461
e315cd28
AC
2462 rsp->ring_index++;
2463 if (rsp->ring_index == rsp->length) {
2464 rsp->ring_index = 0;
2465 rsp->ring_ptr = rsp->ring;
9a853f71 2466 } else {
e315cd28 2467 rsp->ring_ptr++;
9a853f71
AV
2468 }
2469
2470 if (pkt->entry_status != 0) {
73208dfd 2471 qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt);
2d70c103 2472
f83adb61
QT
2473 if (qlt_24xx_process_response_error(vha, pkt))
2474 goto process_err;
2d70c103 2475
9a853f71
AV
2476 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2477 wmb();
2478 continue;
2479 }
f83adb61 2480process_err:
9a853f71
AV
2481
2482 switch (pkt->entry_type) {
2483 case STATUS_TYPE:
73208dfd 2484 qla2x00_status_entry(vha, rsp, pkt);
9a853f71
AV
2485 break;
2486 case STATUS_CONT_TYPE:
2afa19a9 2487 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
9a853f71 2488 break;
2c3dfe3f 2489 case VP_RPT_ID_IOCB_TYPE:
e315cd28 2490 qla24xx_report_id_acquisition(vha,
2c3dfe3f
SJ
2491 (struct vp_rpt_id_entry_24xx *)pkt);
2492 break;
ac280b67
AV
2493 case LOGINOUT_PORT_IOCB_TYPE:
2494 qla24xx_logio_entry(vha, rsp->req,
2495 (struct logio_entry_24xx *)pkt);
2496 break;
f83adb61 2497 case CT_IOCB_TYPE:
9a069e19 2498 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
9a069e19 2499 break;
f83adb61 2500 case ELS_IOCB_TYPE:
9a069e19
GM
2501 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
2502 break;
2d70c103
NB
2503 case ABTS_RECV_24XX:
2504 /* ensure that the ATIO queue is empty */
2505 qlt_24xx_process_atio_queue(vha);
2506 case ABTS_RESP_24XX:
2507 case CTIO_TYPE7:
2508 case NOTIFY_ACK_TYPE:
f83adb61 2509 case CTIO_CRC2:
2d70c103
NB
2510 qlt_response_pkt_all_vps(vha, (response_t *)pkt);
2511 break;
54883291
SK
2512 case MARKER_TYPE:
2513 /* Do nothing in this case, this check is to prevent it
2514 * from falling into default case
2515 */
2516 break;
4440e46d
AB
2517 case ABORT_IOCB_TYPE:
2518 qla24xx_abort_iocb_entry(vha, rsp->req,
2519 (struct abort_entry_24xx *)pkt);
2520 break;
9a853f71
AV
2521 default:
2522 /* Type Not Supported. */
7c3df132
SK
2523 ql_dbg(ql_dbg_async, vha, 0x5042,
2524 "Received unknown response pkt type %x "
9a853f71 2525 "entry status=%x.\n",
7c3df132 2526 pkt->entry_type, pkt->entry_status);
9a853f71
AV
2527 break;
2528 }
2529 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2530 wmb();
2531 }
2532
2533 /* Adjust ring index */
7ec0effd 2534 if (IS_P3P_TYPE(ha)) {
a9083016
GM
2535 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
2536 WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
2537 } else
2538 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
9a853f71
AV
2539}
2540
05236a05 2541static void
e315cd28 2542qla2xxx_check_risc_status(scsi_qla_host_t *vha)
05236a05
AV
2543{
2544 int rval;
2545 uint32_t cnt;
e315cd28 2546 struct qla_hw_data *ha = vha->hw;
05236a05
AV
2547 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2548
f73cb695
CD
2549 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
2550 !IS_QLA27XX(ha))
05236a05
AV
2551 return;
2552
2553 rval = QLA_SUCCESS;
2554 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
2555 RD_REG_DWORD(&reg->iobase_addr);
2556 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
2557 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2558 rval == QLA_SUCCESS; cnt--) {
2559 if (cnt) {
2560 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
2561 udelay(10);
2562 } else
2563 rval = QLA_FUNCTION_TIMEOUT;
2564 }
2565 if (rval == QLA_SUCCESS)
2566 goto next_test;
2567
b2ec76c5 2568 rval = QLA_SUCCESS;
05236a05
AV
2569 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
2570 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2571 rval == QLA_SUCCESS; cnt--) {
2572 if (cnt) {
2573 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
2574 udelay(10);
2575 } else
2576 rval = QLA_FUNCTION_TIMEOUT;
2577 }
2578 if (rval != QLA_SUCCESS)
2579 goto done;
2580
2581next_test:
2582 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
7c3df132
SK
2583 ql_log(ql_log_info, vha, 0x504c,
2584 "Additional code -- 0x55AA.\n");
05236a05
AV
2585
2586done:
2587 WRT_REG_DWORD(&reg->iobase_window, 0x0000);
2588 RD_REG_DWORD(&reg->iobase_window);
2589}
2590
9a853f71 2591/**
6246b8a1 2592 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
9a853f71
AV
2593 * @irq:
2594 * @dev_id: SCSI driver HA context
9a853f71
AV
2595 *
2596 * Called by system whenever the host adapter generates an interrupt.
2597 *
2598 * Returns handled flag.
2599 */
2600irqreturn_t
7d12e780 2601qla24xx_intr_handler(int irq, void *dev_id)
9a853f71 2602{
e315cd28
AC
2603 scsi_qla_host_t *vha;
2604 struct qla_hw_data *ha;
9a853f71
AV
2605 struct device_reg_24xx __iomem *reg;
2606 int status;
9a853f71
AV
2607 unsigned long iter;
2608 uint32_t stat;
2609 uint32_t hccr;
7d613ac6 2610 uint16_t mb[8];
e315cd28 2611 struct rsp_que *rsp;
43fac4d9 2612 unsigned long flags;
9a853f71 2613
e315cd28
AC
2614 rsp = (struct rsp_que *) dev_id;
2615 if (!rsp) {
3256b435
CD
2616 ql_log(ql_log_info, NULL, 0x5059,
2617 "%s: NULL response queue pointer.\n", __func__);
9a853f71
AV
2618 return IRQ_NONE;
2619 }
2620
e315cd28 2621 ha = rsp->hw;
9a853f71
AV
2622 reg = &ha->iobase->isp24;
2623 status = 0;
2624
85880801
AV
2625 if (unlikely(pci_channel_offline(ha->pdev)))
2626 return IRQ_HANDLED;
2627
43fac4d9 2628 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 2629 vha = pci_get_drvdata(ha->pdev);
9a853f71
AV
2630 for (iter = 50; iter--; ) {
2631 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 2632 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 2633 break;
9a853f71 2634 if (stat & HSRX_RISC_PAUSED) {
85880801 2635 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ
2636 break;
2637
9a853f71
AV
2638 hccr = RD_REG_DWORD(&reg->hccr);
2639
7c3df132
SK
2640 ql_log(ql_log_warn, vha, 0x504b,
2641 "RISC paused -- HCCR=%x, Dumping firmware.\n",
2642 hccr);
05236a05 2643
e315cd28 2644 qla2xxx_check_risc_status(vha);
05236a05 2645
e315cd28
AC
2646 ha->isp_ops->fw_dump(vha, 1);
2647 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
9a853f71
AV
2648 break;
2649 } else if ((stat & HSRX_RISC_INT) == 0)
2650 break;
2651
2652 switch (stat & 0xff) {
fafbda9f
AE
2653 case INTR_ROM_MB_SUCCESS:
2654 case INTR_ROM_MB_FAILED:
2655 case INTR_MB_SUCCESS:
2656 case INTR_MB_FAILED:
e315cd28 2657 qla24xx_mbx_completion(vha, MSW(stat));
9a853f71
AV
2658 status |= MBX_INTERRUPT;
2659
2660 break;
fafbda9f 2661 case INTR_ASYNC_EVENT:
9a853f71
AV
2662 mb[0] = MSW(stat);
2663 mb[1] = RD_REG_WORD(&reg->mailbox1);
2664 mb[2] = RD_REG_WORD(&reg->mailbox2);
2665 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 2666 qla2x00_async_event(vha, rsp, mb);
9a853f71 2667 break;
fafbda9f
AE
2668 case INTR_RSP_QUE_UPDATE:
2669 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 2670 qla24xx_process_response_queue(vha, rsp);
9a853f71 2671 break;
fafbda9f 2672 case INTR_ATIO_QUE_UPDATE:
2d70c103
NB
2673 qlt_24xx_process_atio_queue(vha);
2674 break;
fafbda9f 2675 case INTR_ATIO_RSP_QUE_UPDATE:
2d70c103
NB
2676 qlt_24xx_process_atio_queue(vha);
2677 qla24xx_process_response_queue(vha, rsp);
2678 break;
9a853f71 2679 default:
7c3df132
SK
2680 ql_dbg(ql_dbg_async, vha, 0x504f,
2681 "Unrecognized interrupt type (%d).\n", stat * 0xff);
9a853f71
AV
2682 break;
2683 }
2684 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2685 RD_REG_DWORD_RELAXED(&reg->hccr);
cb860bbd
GM
2686 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
2687 ndelay(3500);
9a853f71 2688 }
36439832 2689 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 2690 spin_unlock_irqrestore(&ha->hardware_lock, flags);
9a853f71 2691
9a853f71
AV
2692 return IRQ_HANDLED;
2693}
2694
a8488abe
AV
2695static irqreturn_t
2696qla24xx_msix_rsp_q(int irq, void *dev_id)
2697{
e315cd28
AC
2698 struct qla_hw_data *ha;
2699 struct rsp_que *rsp;
a8488abe 2700 struct device_reg_24xx __iomem *reg;
2afa19a9 2701 struct scsi_qla_host *vha;
0f19bc68 2702 unsigned long flags;
f3ddac19 2703 uint32_t stat = 0;
a8488abe 2704
e315cd28
AC
2705 rsp = (struct rsp_que *) dev_id;
2706 if (!rsp) {
3256b435
CD
2707 ql_log(ql_log_info, NULL, 0x505a,
2708 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC
2709 return IRQ_NONE;
2710 }
2711 ha = rsp->hw;
a8488abe
AV
2712 reg = &ha->iobase->isp24;
2713
0f19bc68 2714 spin_lock_irqsave(&ha->hardware_lock, flags);
a8488abe 2715
a67093d4 2716 vha = pci_get_drvdata(ha->pdev);
f3ddac19
CD
2717 /*
2718 * Use host_status register to check to PCI disconnection before we
2719 * we process the response queue.
2720 */
2721 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 2722 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 2723 goto out;
2afa19a9 2724 qla24xx_process_response_queue(vha, rsp);
3155754a 2725 if (!ha->flags.disable_msix_handshake) {
eb94114b
AC
2726 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2727 RD_REG_DWORD_RELAXED(&reg->hccr);
2728 }
f3ddac19 2729out:
0f19bc68 2730 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe
AV
2731
2732 return IRQ_HANDLED;
2733}
2734
68ca949c
AC
2735static irqreturn_t
2736qla25xx_msix_rsp_q(int irq, void *dev_id)
2737{
2738 struct qla_hw_data *ha;
f3ddac19 2739 scsi_qla_host_t *vha;
68ca949c 2740 struct rsp_que *rsp;
3155754a 2741 struct device_reg_24xx __iomem *reg;
0f19bc68 2742 unsigned long flags;
f3ddac19 2743 uint32_t hccr = 0;
68ca949c
AC
2744
2745 rsp = (struct rsp_que *) dev_id;
2746 if (!rsp) {
3256b435
CD
2747 ql_log(ql_log_info, NULL, 0x505b,
2748 "%s: NULL response queue pointer.\n", __func__);
68ca949c
AC
2749 return IRQ_NONE;
2750 }
2751 ha = rsp->hw;
f3ddac19 2752 vha = pci_get_drvdata(ha->pdev);
68ca949c 2753
3155754a 2754 /* Clear the interrupt, if enabled, for this response queue */
d424754c 2755 if (!ha->flags.disable_msix_handshake) {
3155754a 2756 reg = &ha->iobase->isp24;
0f19bc68 2757 spin_lock_irqsave(&ha->hardware_lock, flags);
3155754a 2758 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
f3ddac19 2759 hccr = RD_REG_DWORD_RELAXED(&reg->hccr);
0f19bc68 2760 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3155754a 2761 }
c821e0d5 2762 if (qla2x00_check_reg32_for_disconnect(vha, hccr))
f3ddac19 2763 goto out;
68ca949c
AC
2764 queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
2765
f3ddac19 2766out:
68ca949c
AC
2767 return IRQ_HANDLED;
2768}
2769
a8488abe
AV
2770static irqreturn_t
2771qla24xx_msix_default(int irq, void *dev_id)
2772{
e315cd28
AC
2773 scsi_qla_host_t *vha;
2774 struct qla_hw_data *ha;
2775 struct rsp_que *rsp;
a8488abe
AV
2776 struct device_reg_24xx __iomem *reg;
2777 int status;
a8488abe
AV
2778 uint32_t stat;
2779 uint32_t hccr;
7d613ac6 2780 uint16_t mb[8];
0f19bc68 2781 unsigned long flags;
a8488abe 2782
e315cd28
AC
2783 rsp = (struct rsp_que *) dev_id;
2784 if (!rsp) {
3256b435
CD
2785 ql_log(ql_log_info, NULL, 0x505c,
2786 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC
2787 return IRQ_NONE;
2788 }
2789 ha = rsp->hw;
a8488abe
AV
2790 reg = &ha->iobase->isp24;
2791 status = 0;
2792
0f19bc68 2793 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 2794 vha = pci_get_drvdata(ha->pdev);
87f27015 2795 do {
a8488abe 2796 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 2797 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 2798 break;
a8488abe 2799 if (stat & HSRX_RISC_PAUSED) {
85880801 2800 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ
2801 break;
2802
a8488abe
AV
2803 hccr = RD_REG_DWORD(&reg->hccr);
2804
7c3df132
SK
2805 ql_log(ql_log_info, vha, 0x5050,
2806 "RISC paused -- HCCR=%x, Dumping firmware.\n",
2807 hccr);
05236a05 2808
e315cd28 2809 qla2xxx_check_risc_status(vha);
05236a05 2810
e315cd28
AC
2811 ha->isp_ops->fw_dump(vha, 1);
2812 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
a8488abe
AV
2813 break;
2814 } else if ((stat & HSRX_RISC_INT) == 0)
2815 break;
2816
2817 switch (stat & 0xff) {
fafbda9f
AE
2818 case INTR_ROM_MB_SUCCESS:
2819 case INTR_ROM_MB_FAILED:
2820 case INTR_MB_SUCCESS:
2821 case INTR_MB_FAILED:
e315cd28 2822 qla24xx_mbx_completion(vha, MSW(stat));
a8488abe
AV
2823 status |= MBX_INTERRUPT;
2824
2825 break;
fafbda9f 2826 case INTR_ASYNC_EVENT:
a8488abe
AV
2827 mb[0] = MSW(stat);
2828 mb[1] = RD_REG_WORD(&reg->mailbox1);
2829 mb[2] = RD_REG_WORD(&reg->mailbox2);
2830 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 2831 qla2x00_async_event(vha, rsp, mb);
a8488abe 2832 break;
fafbda9f
AE
2833 case INTR_RSP_QUE_UPDATE:
2834 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 2835 qla24xx_process_response_queue(vha, rsp);
a8488abe 2836 break;
fafbda9f 2837 case INTR_ATIO_QUE_UPDATE:
2d70c103
NB
2838 qlt_24xx_process_atio_queue(vha);
2839 break;
fafbda9f 2840 case INTR_ATIO_RSP_QUE_UPDATE:
2d70c103
NB
2841 qlt_24xx_process_atio_queue(vha);
2842 qla24xx_process_response_queue(vha, rsp);
2843 break;
a8488abe 2844 default:
7c3df132
SK
2845 ql_dbg(ql_dbg_async, vha, 0x5051,
2846 "Unrecognized interrupt type (%d).\n", stat & 0xff);
a8488abe
AV
2847 break;
2848 }
2849 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
87f27015 2850 } while (0);
36439832 2851 qla2x00_handle_mbx_completion(ha, status);
0f19bc68 2852 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe 2853
a8488abe
AV
2854 return IRQ_HANDLED;
2855}
2856
2857/* Interrupt handling helpers. */
2858
2859struct qla_init_msix_entry {
a8488abe 2860 const char *name;
476834c2 2861 irq_handler_t handler;
a8488abe
AV
2862};
2863
68ca949c 2864static struct qla_init_msix_entry msix_entries[3] = {
2afa19a9
AC
2865 { "qla2xxx (default)", qla24xx_msix_default },
2866 { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
68ca949c 2867 { "qla2xxx (multiq)", qla25xx_msix_rsp_q },
a8488abe
AV
2868};
2869
a9083016
GM
2870static struct qla_init_msix_entry qla82xx_msix_entries[2] = {
2871 { "qla2xxx (default)", qla82xx_msix_default },
2872 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
2873};
2874
aa230bc5
AE
2875static struct qla_init_msix_entry qla83xx_msix_entries[3] = {
2876 { "qla2xxx (default)", qla24xx_msix_default },
2877 { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
2878 { "qla2xxx (atio_q)", qla83xx_msix_atio_q },
2879};
2880
a8488abe 2881static void
e315cd28 2882qla24xx_disable_msix(struct qla_hw_data *ha)
a8488abe
AV
2883{
2884 int i;
2885 struct qla_msix_entry *qentry;
7c3df132 2886 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe 2887
73208dfd
AC
2888 for (i = 0; i < ha->msix_count; i++) {
2889 qentry = &ha->msix_entries[i];
a8488abe 2890 if (qentry->have_irq)
73208dfd 2891 free_irq(qentry->vector, qentry->rsp);
a8488abe
AV
2892 }
2893 pci_disable_msix(ha->pdev);
73208dfd
AC
2894 kfree(ha->msix_entries);
2895 ha->msix_entries = NULL;
2896 ha->flags.msix_enabled = 0;
7c3df132
SK
2897 ql_dbg(ql_dbg_init, vha, 0x0042,
2898 "Disabled the MSI.\n");
a8488abe
AV
2899}
2900
2901static int
73208dfd 2902qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 2903{
ad038fa8 2904#define MIN_MSIX_COUNT 2
f324777e 2905#define ATIO_VECTOR 2
a8488abe 2906 int i, ret;
73208dfd 2907 struct msix_entry *entries;
a8488abe 2908 struct qla_msix_entry *qentry;
7c3df132 2909 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC
2910
2911 entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count,
a9083016 2912 GFP_KERNEL);
7c3df132
SK
2913 if (!entries) {
2914 ql_log(ql_log_warn, vha, 0x00bc,
2915 "Failed to allocate memory for msix_entry.\n");
73208dfd 2916 return -ENOMEM;
7c3df132 2917 }
a8488abe 2918
73208dfd
AC
2919 for (i = 0; i < ha->msix_count; i++)
2920 entries[i].entry = i;
a8488abe 2921
84e32a06
AG
2922 ret = pci_enable_msix_range(ha->pdev,
2923 entries, MIN_MSIX_COUNT, ha->msix_count);
2924 if (ret < 0) {
2925 ql_log(ql_log_fatal, vha, 0x00c7,
2926 "MSI-X: Failed to enable support, "
2927 "giving up -- %d/%d.\n",
2928 ha->msix_count, ret);
2929 goto msix_out;
2930 } else if (ret < ha->msix_count) {
7c3df132
SK
2931 ql_log(ql_log_warn, vha, 0x00c6,
2932 "MSI-X: Failed to enable support "
2933 "-- %d/%d\n Retry with %d vectors.\n",
2934 ha->msix_count, ret, ret);
73208dfd 2935 }
84e32a06
AG
2936 ha->msix_count = ret;
2937 ha->max_rsp_queues = ha->msix_count - 1;
73208dfd
AC
2938 ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) *
2939 ha->msix_count, GFP_KERNEL);
2940 if (!ha->msix_entries) {
7c3df132
SK
2941 ql_log(ql_log_fatal, vha, 0x00c8,
2942 "Failed to allocate memory for ha->msix_entries.\n");
73208dfd 2943 ret = -ENOMEM;
a8488abe
AV
2944 goto msix_out;
2945 }
2946 ha->flags.msix_enabled = 1;
2947
73208dfd
AC
2948 for (i = 0; i < ha->msix_count; i++) {
2949 qentry = &ha->msix_entries[i];
2950 qentry->vector = entries[i].vector;
2951 qentry->entry = entries[i].entry;
a8488abe 2952 qentry->have_irq = 0;
73208dfd 2953 qentry->rsp = NULL;
a8488abe
AV
2954 }
2955
2afa19a9 2956 /* Enable MSI-X vectors for the base queue */
f324777e 2957 for (i = 0; i < 2; i++) {
2afa19a9 2958 qentry = &ha->msix_entries[i];
f324777e 2959 if (IS_P3P_TYPE(ha))
a9083016
GM
2960 ret = request_irq(qentry->vector,
2961 qla82xx_msix_entries[i].handler,
2962 0, qla82xx_msix_entries[i].name, rsp);
f324777e 2963 else
a9083016
GM
2964 ret = request_irq(qentry->vector,
2965 msix_entries[i].handler,
2966 0, msix_entries[i].name, rsp);
f324777e
CD
2967 if (ret)
2968 goto msix_register_fail;
2969 qentry->have_irq = 1;
2970 qentry->rsp = rsp;
2971 rsp->msix = qentry;
2972 }
2973
2974 /*
2975 * If target mode is enable, also request the vector for the ATIO
2976 * queue.
2977 */
2978 if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) {
2979 qentry = &ha->msix_entries[ATIO_VECTOR];
2980 ret = request_irq(qentry->vector,
2981 qla83xx_msix_entries[ATIO_VECTOR].handler,
2982 0, qla83xx_msix_entries[ATIO_VECTOR].name, rsp);
2afa19a9
AC
2983 qentry->have_irq = 1;
2984 qentry->rsp = rsp;
2985 rsp->msix = qentry;
73208dfd 2986 }
73208dfd 2987
f324777e
CD
2988msix_register_fail:
2989 if (ret) {
2990 ql_log(ql_log_fatal, vha, 0x00cb,
2991 "MSI-X: unable to register handler -- %x/%d.\n",
2992 qentry->vector, ret);
2993 qla24xx_disable_msix(ha);
2994 ha->mqenable = 0;
2995 goto msix_out;
2996 }
2997
73208dfd 2998 /* Enable MSI-X vector for response queue update for queue 0 */
f73cb695 2999 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
6246b8a1
GM
3000 if (ha->msixbase && ha->mqiobase &&
3001 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
3002 ha->mqenable = 1;
3003 } else
3004 if (ha->mqiobase
3005 && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
3006 ha->mqenable = 1;
7c3df132
SK
3007 ql_dbg(ql_dbg_multiq, vha, 0xc005,
3008 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3009 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3010 ql_dbg(ql_dbg_init, vha, 0x0055,
3011 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3012 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
73208dfd 3013
a8488abe 3014msix_out:
73208dfd 3015 kfree(entries);
a8488abe
AV
3016 return ret;
3017}
3018
3019int
73208dfd 3020qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 3021{
7fa3e239 3022 int ret = QLA_FUNCTION_FAILED;
f73cb695 3023 device_reg_t *reg = ha->iobase;
7c3df132 3024 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe
AV
3025
3026 /* If possible, enable MSI-X. */
6246b8a1 3027 if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695
CD
3028 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && !IS_QLAFX00(ha) &&
3029 !IS_QLA27XX(ha))
6377a7ae
BH
3030 goto skip_msi;
3031
3032 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
3033 (ha->pdev->subsystem_device == 0x7040 ||
3034 ha->pdev->subsystem_device == 0x7041 ||
3035 ha->pdev->subsystem_device == 0x1705)) {
7c3df132
SK
3036 ql_log(ql_log_warn, vha, 0x0034,
3037 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
6377a7ae 3038 ha->pdev->subsystem_vendor,
7c3df132 3039 ha->pdev->subsystem_device);
6377a7ae
BH
3040 goto skip_msi;
3041 }
a8488abe 3042
42cd4f5d 3043 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
7c3df132
SK
3044 ql_log(ql_log_warn, vha, 0x0035,
3045 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
42cd4f5d 3046 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
a8488abe
AV
3047 goto skip_msix;
3048 }
3049
73208dfd 3050 ret = qla24xx_enable_msix(ha, rsp);
a8488abe 3051 if (!ret) {
7c3df132
SK
3052 ql_dbg(ql_dbg_init, vha, 0x0036,
3053 "MSI-X: Enabled (0x%X, 0x%X).\n",
3054 ha->chip_revision, ha->fw_attributes);
963b0fdd 3055 goto clear_risc_ints;
a8488abe 3056 }
7fa3e239 3057
a8488abe 3058skip_msix:
cbedb601 3059
7fa3e239
SC
3060 ql_log(ql_log_info, vha, 0x0037,
3061 "Falling back-to MSI mode -%d.\n", ret);
3062
3a03eb79 3063 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695
CD
3064 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
3065 !IS_QLA27XX(ha))
cbedb601
AV
3066 goto skip_msi;
3067
3068 ret = pci_enable_msi(ha->pdev);
3069 if (!ret) {
7c3df132
SK
3070 ql_dbg(ql_dbg_init, vha, 0x0038,
3071 "MSI: Enabled.\n");
cbedb601 3072 ha->flags.msi_enabled = 1;
a9083016 3073 } else
7c3df132 3074 ql_log(ql_log_warn, vha, 0x0039,
7fa3e239
SC
3075 "Falling back-to INTa mode -- %d.\n", ret);
3076skip_msi:
a033b655
GM
3077
3078 /* Skip INTx on ISP82xx. */
3079 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
3080 return QLA_FUNCTION_FAILED;
3081
fd34f556 3082 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
7992abfc
MH
3083 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
3084 QLA2XXX_DRIVER_NAME, rsp);
963b0fdd 3085 if (ret) {
7c3df132 3086 ql_log(ql_log_warn, vha, 0x003a,
a8488abe
AV
3087 "Failed to reserve interrupt %d already in use.\n",
3088 ha->pdev->irq);
963b0fdd 3089 goto fail;
8ae6d9c7 3090 } else if (!ha->flags.msi_enabled) {
68d91cbd
SK
3091 ql_dbg(ql_dbg_init, vha, 0x0125,
3092 "INTa mode: Enabled.\n");
8ae6d9c7
GM
3093 ha->flags.mr_intr_valid = 1;
3094 }
7992abfc 3095
963b0fdd
AV
3096clear_risc_ints:
3097
c6952483 3098 spin_lock_irq(&ha->hardware_lock);
c1114953 3099 if (!IS_FWI2_CAPABLE(ha))
963b0fdd 3100 WRT_REG_WORD(&reg->isp.semaphore, 0);
c6952483 3101 spin_unlock_irq(&ha->hardware_lock);
a8488abe 3102
963b0fdd 3103fail:
a8488abe
AV
3104 return ret;
3105}
3106
3107void
e315cd28 3108qla2x00_free_irqs(scsi_qla_host_t *vha)
a8488abe 3109{
e315cd28 3110 struct qla_hw_data *ha = vha->hw;
9a347ff4
CD
3111 struct rsp_que *rsp;
3112
3113 /*
3114 * We need to check that ha->rsp_q_map is valid in case we are called
3115 * from a probe failure context.
3116 */
3117 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
3118 return;
3119 rsp = ha->rsp_q_map[0];
a8488abe
AV
3120
3121 if (ha->flags.msix_enabled)
3122 qla24xx_disable_msix(ha);
90a86fc0 3123 else if (ha->flags.msi_enabled) {
e315cd28 3124 free_irq(ha->pdev->irq, rsp);
cbedb601 3125 pci_disable_msi(ha->pdev);
90a86fc0
JC
3126 } else
3127 free_irq(ha->pdev->irq, rsp);
a8488abe 3128}
e315cd28 3129
73208dfd
AC
3130
3131int qla25xx_request_irq(struct rsp_que *rsp)
3132{
3133 struct qla_hw_data *ha = rsp->hw;
2afa19a9 3134 struct qla_init_msix_entry *intr = &msix_entries[2];
73208dfd 3135 struct qla_msix_entry *msix = rsp->msix;
7c3df132 3136 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC
3137 int ret;
3138
3139 ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp);
3140 if (ret) {
7c3df132
SK
3141 ql_log(ql_log_fatal, vha, 0x00e6,
3142 "MSI-X: Unable to register handler -- %x/%d.\n",
3143 msix->vector, ret);
73208dfd
AC
3144 return ret;
3145 }
3146 msix->have_irq = 1;
3147 msix->rsp = rsp;
3148 return ret;
3149}
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