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misc/iwmc3200top: use system_wq instead of dedicated workqueues
[deliverable/linux.git] / drivers / scsi / qla2xxx / qla_os.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
de7c5d05 3 * Copyright (c) 2003-2010 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
1da177e4 11#include <linux/delay.h>
39a11240 12#include <linux/kthread.h>
e1e82b6f 13#include <linux/mutex.h>
3420d36c 14#include <linux/kobject.h>
5a0e3ad6 15#include <linux/slab.h>
1da177e4
LT		 16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22/*
23 * Driver version
24 */
25char qla2x00_version_str[40];
26
6a03b4cd
HZ		 27static int apidev_major;
28
1da177e4
LT		 29/*
30 * SRB allocation cache
31 */
e18b890b 32static struct kmem_cache *srb_cachep;
1da177e4 33
a9083016
GM		 34/*
35 * CT6 CTX allocation cache
36 */
37static struct kmem_cache *ctx_cachep;
38
1da177e4 39int ql2xlogintimeout = 20;
f2019cb1 40module_param(ql2xlogintimeout, int, S_IRUGO);
1da177e4
LT		 41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
a7b61842 44int qlport_down_retry;
f2019cb1 45module_param(qlport_down_retry, int, S_IRUGO);
1da177e4 46MODULE_PARM_DESC(qlport_down_retry,
900d9f98 47 "Maximum number of command retries to a port that returns "
1da177e4
LT		 48 "a PORT-DOWN status.");
49
1da177e4
LT		 50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
900d9f98 54 "a Fabric scan. This is needed for several broken switches. "
1da177e4
LT		 55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
1da177e4 57int ql2xloginretrycount = 0;
f2019cb1 58module_param(ql2xloginretrycount, int, S_IRUGO);
1da177e4
LT		 59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
a7a167bf 62int ql2xallocfwdump = 1;
f2019cb1 63module_param(ql2xallocfwdump, int, S_IRUGO);
a7a167bf
AV		 64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
11010fec 69int ql2xextended_error_logging;
27d94035 70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
11010fec 71MODULE_PARM_DESC(ql2xextended_error_logging,
0181944f
AV		 72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
a9083016 75int ql2xshiftctondsd = 6;
f2019cb1 76module_param(ql2xshiftctondsd, int, S_IRUGO);
a9083016
GM		 77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
1da177e4
LT		 81static void qla2x00_free_device(scsi_qla_host_t *);
82
7e47e5ca 83int ql2xfdmienable=1;
f2019cb1 84module_param(ql2xfdmienable, int, S_IRUGO);
cca5335c 85MODULE_PARM_DESC(ql2xfdmienable,
7794a5af
FW		 86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
cca5335c 88
df7baa50
AV		 89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
bad75002
AE		 95/* Do not change the value of this after module load */
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
e5896bd5 108int ql2xiidmaenable=1;
f2019cb1 109module_param(ql2xiidmaenable, int, S_IRUGO);
e5896bd5
AV		 110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
73208dfd 114int ql2xmaxqueues = 1;
f2019cb1 115module_param(ql2xmaxqueues, int, S_IRUGO);
73208dfd
AC		 116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
ae68230c
JP		 118 "Default is 1 for single queue. Set it to number "
119 "of queues in MQ mode.");
68ca949c
AC		 120
121int ql2xmultique_tag;
f2019cb1 122module_param(ql2xmultique_tag, int, S_IRUGO);
68ca949c
AC		 123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
e337d907
AV		 127
128int ql2xfwloadbin;
f2019cb1 129module_param(ql2xfwloadbin, int, S_IRUGO);
e337d907
AV		 130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
ae97c91e 137int ql2xetsenable;
f2019cb1 138module_param(ql2xetsenable, int, S_IRUGO);
ae97c91e
AV		 139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
6907869d 143int ql2xdbwr = 1;
f2019cb1 144module_param(ql2xdbwr, int, S_IRUGO);
a9083016
GM		 145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
f4c496c1 150int ql2xtargetreset = 1;
f2019cb1 151module_param(ql2xtargetreset, int, S_IRUGO);
f4c496c1
GM		 152MODULE_PARM_DESC(ql2xtargetreset,
153 "Enable target reset."
154 "Default is 1 - use hw defaults.");
155
4da26e16 156int ql2xgffidenable;
f2019cb1 157module_param(ql2xgffidenable, int, S_IRUGO);
4da26e16
CD		 158MODULE_PARM_DESC(ql2xgffidenable,
159 "Enables GFF_ID checks of port type. "
160 "Default is 0 - Do not use GFF_ID information.");
a9083016 161
3822263e 162int ql2xasynctmfenable;
f2019cb1 163module_param(ql2xasynctmfenable, int, S_IRUGO);
3822263e
MI		 164MODULE_PARM_DESC(ql2xasynctmfenable,
165 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
166 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
1da177e4 167/*
fa2a1ce5 168 * SCSI host template entry points
1da177e4
LT		 169 */
170static int qla2xxx_slave_configure(struct scsi_device * device);
f4f051eb 171static int qla2xxx_slave_alloc(struct scsi_device *);
1e99e33a
AV		 172static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
173static void qla2xxx_scan_start(struct Scsi_Host *);
f4f051eb 174static void qla2xxx_slave_destroy(struct scsi_device *);
f281233d 175static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
1da177e4
LT		 176static int qla2xxx_eh_abort(struct scsi_cmnd *);
177static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
523ec773 178static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
1da177e4
LT		 179static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
180static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
1da177e4 181
e881a172 182static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
ce7e4af7
AV		 183static int qla2x00_change_queue_type(struct scsi_device *, int);
184
a5326f86 185struct scsi_host_template qla2xxx_driver_template = {
1da177e4 186 .module = THIS_MODULE,
cb63067a 187 .name = QLA2XXX_DRIVER_NAME,
a5326f86 188 .queuecommand = qla2xxx_queuecommand,
fca29703
AV		 189
190 .eh_abort_handler = qla2xxx_eh_abort,
191 .eh_device_reset_handler = qla2xxx_eh_device_reset,
523ec773 192 .eh_target_reset_handler = qla2xxx_eh_target_reset,
fca29703
AV		 193 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
194 .eh_host_reset_handler = qla2xxx_eh_host_reset,
195
196 .slave_configure = qla2xxx_slave_configure,
197
198 .slave_alloc = qla2xxx_slave_alloc,
199 .slave_destroy = qla2xxx_slave_destroy,
ed677086
AV		 200 .scan_finished = qla2xxx_scan_finished,
201 .scan_start = qla2xxx_scan_start,
ce7e4af7
AV		 202 .change_queue_depth = qla2x00_change_queue_depth,
203 .change_queue_type = qla2x00_change_queue_type,
fca29703
AV		 204 .this_id = -1,
205 .cmd_per_lun = 3,
206 .use_clustering = ENABLE_CLUSTERING,
207 .sg_tablesize = SG_ALL,
208
209 .max_sectors = 0xFFFF,
afb046e2 210 .shost_attrs = qla2x00_host_attrs,
fca29703
AV		 211};
212
1da177e4 213static struct scsi_transport_template *qla2xxx_transport_template = NULL;
2c3dfe3f 214struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
1da177e4 215
1da177e4
LT		 216/* TODO Convert to inlines
217 *
218 * Timer routines
219 */
1da177e4 220
2c3dfe3f 221__inline__ void
e315cd28 222qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
1da177e4 223{
e315cd28
AC		 224 init_timer(&vha->timer);
225 vha->timer.expires = jiffies + interval * HZ;
226 vha->timer.data = (unsigned long)vha;
227 vha->timer.function = (void (*)(unsigned long))func;
228 add_timer(&vha->timer);
229 vha->timer_active = 1;
1da177e4
LT		 230}
231
232static inline void
e315cd28 233qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
1da177e4 234{
a9083016
GM		 235 /* Currently used for 82XX only. */
236 if (vha->device_flags & DFLG_DEV_FAILED)
237 return;
238
e315cd28 239 mod_timer(&vha->timer, jiffies + interval * HZ);
1da177e4
LT		 240}
241
a824ebb3 242static __inline__ void
e315cd28 243qla2x00_stop_timer(scsi_qla_host_t *vha)
1da177e4 244{
e315cd28
AC		 245 del_timer_sync(&vha->timer);
246 vha->timer_active = 0;
1da177e4
LT		 247}
248
1da177e4
LT		 249static int qla2x00_do_dpc(void *data);
250
251static void qla2x00_rst_aen(scsi_qla_host_t *);
252
73208dfd
AC		 253static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
254 struct req_que **, struct rsp_que **);
e30d1756 255static void qla2x00_free_fw_dump(struct qla_hw_data *);
e315cd28
AC		 256static void qla2x00_mem_free(struct qla_hw_data *);
257static void qla2x00_sp_free_dma(srb_t *);
1da177e4 258
1da177e4 259/* -------------------------------------------------------------------------- */
73208dfd
AC		 260static int qla2x00_alloc_queues(struct qla_hw_data *ha)
261{
2afa19a9 262 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
73208dfd
AC		 263 GFP_KERNEL);
264 if (!ha->req_q_map) {
265 qla_printk(KERN_WARNING, ha,
266 "Unable to allocate memory for request queue ptrs\n");
267 goto fail_req_map;
268 }
269
2afa19a9 270 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
73208dfd
AC		 271 GFP_KERNEL);
272 if (!ha->rsp_q_map) {
273 qla_printk(KERN_WARNING, ha,
274 "Unable to allocate memory for response queue ptrs\n");
275 goto fail_rsp_map;
276 }
277 set_bit(0, ha->rsp_qid_map);
278 set_bit(0, ha->req_qid_map);
279 return 1;
280
281fail_rsp_map:
282 kfree(ha->req_q_map);
283 ha->req_q_map = NULL;
284fail_req_map:
285 return -ENOMEM;
286}
287
2afa19a9 288static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
73208dfd 289{
73208dfd
AC		 290 if (req && req->ring)
291 dma_free_coherent(&ha->pdev->dev,
292 (req->length + 1) * sizeof(request_t),
293 req->ring, req->dma);
294
295 kfree(req);
296 req = NULL;
297}
298
2afa19a9
AC		 299static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
300{
301 if (rsp && rsp->ring)
302 dma_free_coherent(&ha->pdev->dev,
303 (rsp->length + 1) * sizeof(response_t),
304 rsp->ring, rsp->dma);
305
306 kfree(rsp);
307 rsp = NULL;
308}
309
73208dfd
AC		 310static void qla2x00_free_queues(struct qla_hw_data *ha)
311{
312 struct req_que *req;
313 struct rsp_que *rsp;
314 int cnt;
315
2afa19a9 316 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
73208dfd 317 req = ha->req_q_map[cnt];
2afa19a9 318 qla2x00_free_req_que(ha, req);
73208dfd 319 }
73208dfd
AC		 320 kfree(ha->req_q_map);
321 ha->req_q_map = NULL;
2afa19a9
AC		 322
323 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
324 rsp = ha->rsp_q_map[cnt];
325 qla2x00_free_rsp_que(ha, rsp);
326 }
327 kfree(ha->rsp_q_map);
328 ha->rsp_q_map = NULL;
73208dfd
AC		 329}
330
68ca949c
AC		 331static int qla25xx_setup_mode(struct scsi_qla_host *vha)
332{
333 uint16_t options = 0;
334 int ques, req, ret;
335 struct qla_hw_data *ha = vha->hw;
336
7163ea81
AC		 337 if (!(ha->fw_attributes & BIT_6)) {
338 qla_printk(KERN_INFO, ha,
339 "Firmware is not multi-queue capable\n");
340 goto fail;
341 }
68ca949c 342 if (ql2xmultique_tag) {
68ca949c
AC		 343 /* create a request queue for IO */
344 options |= BIT_7;
345 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
346 QLA_DEFAULT_QUE_QOS);
347 if (!req) {
348 qla_printk(KERN_WARNING, ha,
349 "Can't create request queue\n");
350 goto fail;
351 }
7163ea81 352 ha->wq = create_workqueue("qla2xxx_wq");
68ca949c
AC		 353 vha->req = ha->req_q_map[req];
354 options |= BIT_1;
355 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
356 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
357 if (!ret) {
358 qla_printk(KERN_WARNING, ha,
359 "Response Queue create failed\n");
360 goto fail2;
361 }
362 }
7163ea81
AC		 363 ha->flags.cpu_affinity_enabled = 1;
364
68ca949c
AC		 365 DEBUG2(qla_printk(KERN_INFO, ha,
366 "CPU affinity mode enabled, no. of response"
367 " queues:%d, no. of request queues:%d\n",
368 ha->max_rsp_queues, ha->max_req_queues));
369 }
370 return 0;
371fail2:
372 qla25xx_delete_queues(vha);
7163ea81
AC		 373 destroy_workqueue(ha->wq);
374 ha->wq = NULL;
68ca949c
AC		 375fail:
376 ha->mqenable = 0;
7163ea81
AC		 377 kfree(ha->req_q_map);
378 kfree(ha->rsp_q_map);
379 ha->max_req_queues = ha->max_rsp_queues = 1;
68ca949c
AC		 380 return 1;
381}
382
1da177e4 383static char *
e315cd28 384qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
1da177e4 385{
e315cd28 386 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 387 static char *pci_bus_modes[] = {
388 "33", "66", "100", "133",
389 };
390 uint16_t pci_bus;
391
392 strcpy(str, "PCI");
393 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
394 if (pci_bus) {
395 strcat(str, "-X (");
396 strcat(str, pci_bus_modes[pci_bus]);
397 } else {
398 pci_bus = (ha->pci_attr & BIT_8) >> 8;
399 strcat(str, " (");
400 strcat(str, pci_bus_modes[pci_bus]);
401 }
402 strcat(str, " MHz)");
403
404 return (str);
405}
406
fca29703 407static char *
e315cd28 408qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
fca29703
AV		 409{
410 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
e315cd28 411 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 412 uint32_t pci_bus;
413 int pcie_reg;
414
415 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
416 if (pcie_reg) {
417 char lwstr[6];
418 uint16_t pcie_lstat, lspeed, lwidth;
419
420 pcie_reg += 0x12;
421 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
422 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
423 lwidth = (pcie_lstat &
424 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
425
426 strcpy(str, "PCIe (");
427 if (lspeed == 1)
c87a0d8c 428 strcat(str, "2.5GT/s ");
c3a2f0df 429 else if (lspeed == 2)
c87a0d8c 430 strcat(str, "5.0GT/s ");
fca29703
AV		 431 else
432 strcat(str, "<unknown> ");
433 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
434 strcat(str, lwstr);
435
436 return str;
437 }
438
439 strcpy(str, "PCI");
440 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
441 if (pci_bus == 0 || pci_bus == 8) {
442 strcat(str, " (");
443 strcat(str, pci_bus_modes[pci_bus >> 3]);
444 } else {
445 strcat(str, "-X ");
446 if (pci_bus & BIT_2)
447 strcat(str, "Mode 2");
448 else
449 strcat(str, "Mode 1");
450 strcat(str, " (");
451 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
452 }
453 strcat(str, " MHz)");
454
455 return str;
456}
457
e5f82ab8 458static char *
e315cd28 459qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
1da177e4
LT		 460{
461 char un_str[10];
e315cd28 462 struct qla_hw_data *ha = vha->hw;
fa2a1ce5 463
1da177e4
LT		 464 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
465 ha->fw_minor_version,
466 ha->fw_subminor_version);
467
468 if (ha->fw_attributes & BIT_9) {
469 strcat(str, "FLX");
470 return (str);
471 }
472
473 switch (ha->fw_attributes & 0xFF) {
474 case 0x7:
475 strcat(str, "EF");
476 break;
477 case 0x17:
478 strcat(str, "TP");
479 break;
480 case 0x37:
481 strcat(str, "IP");
482 break;
483 case 0x77:
484 strcat(str, "VI");
485 break;
486 default:
487 sprintf(un_str, "(%x)", ha->fw_attributes);
488 strcat(str, un_str);
489 break;
490 }
491 if (ha->fw_attributes & 0x100)
492 strcat(str, "X");
493
494 return (str);
495}
496
e5f82ab8 497static char *
e315cd28 498qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
fca29703 499{
e315cd28 500 struct qla_hw_data *ha = vha->hw;
f0883ac6 501
3a03eb79
AV		 502 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
503 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
fca29703 504 return str;
fca29703
AV		 505}
506
507static inline srb_t *
e315cd28 508qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
fca29703
AV		 509 struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
510{
511 srb_t *sp;
e315cd28 512 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 513
514 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
515 if (!sp)
516 return sp;
517
083a469d 518 atomic_set(&sp->ref_count, 1);
fca29703
AV		 519 sp->fcport = fcport;
520 sp->cmd = cmd;
521 sp->flags = 0;
522 CMD_SP(cmd) = (void *)sp;
523 cmd->scsi_done = done;
cf53b069 524 sp->ctx = NULL;
fca29703
AV		 525
526 return sp;
527}
528
1da177e4 529static int
f281233d 530qla2xxx_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
fca29703 531{
e315cd28 532 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
fca29703 533 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
19a7b4ae 534 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
e315cd28
AC		 535 struct qla_hw_data *ha = vha->hw;
536 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
fca29703
AV		 537 srb_t *sp;
538 int rval;
539
38170fa8 540 spin_unlock_irq(vha->host->host_lock);
85880801
AV		 541 if (ha->flags.eeh_busy) {
542 if (ha->flags.pci_channel_io_perm_failure)
b9b12f73 543 cmd->result = DID_NO_CONNECT << 16;
85880801
AV		 544 else
545 cmd->result = DID_REQUEUE << 16;
14e660e6
SJ		 546 goto qc24_fail_command;
547 }
548
19a7b4ae
JSEC		 549 rval = fc_remote_port_chkready(rport);
550 if (rval) {
551 cmd->result = rval;
fca29703
AV		 552 goto qc24_fail_command;
553 }
554
bad75002
AE		 555 if (!vha->flags.difdix_supported &&
556 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
557 DEBUG2(qla_printk(KERN_ERR, ha,
558 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
559 cmd->cmnd[0]));
560 cmd->result = DID_NO_CONNECT << 16;
561 goto qc24_fail_command;
562 }
fca29703
AV		 563 if (atomic_read(&fcport->state) != FCS_ONLINE) {
564 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
38170fa8
GM		 565 atomic_read(&fcport->state) == FCS_DEVICE_LOST ||
566 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
fca29703
AV		 567 cmd->result = DID_NO_CONNECT << 16;
568 goto qc24_fail_command;
569 }
7b594131 570 goto qc24_target_busy;
fca29703
AV		 571 }
572
e315cd28 573 sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
fca29703
AV		 574 if (!sp)
575 goto qc24_host_busy_lock;
576
e315cd28 577 rval = ha->isp_ops->start_scsi(sp);
fca29703
AV		 578 if (rval != QLA_SUCCESS)
579 goto qc24_host_busy_free_sp;
580
e315cd28 581 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 582
583 return 0;
584
585qc24_host_busy_free_sp:
e315cd28
AC		 586 qla2x00_sp_free_dma(sp);
587 mempool_free(sp, ha->srb_mempool);
fca29703
AV		 588
589qc24_host_busy_lock:
e315cd28 590 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 591 return SCSI_MLQUEUE_HOST_BUSY;
592
7b594131 593qc24_target_busy:
38170fa8 594 spin_lock_irq(vha->host->host_lock);
7b594131
MC		 595 return SCSI_MLQUEUE_TARGET_BUSY;
596
fca29703 597qc24_fail_command:
38170fa8 598 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 599 done(cmd);
600
601 return 0;
602}
603
f281233d
JG		 604static DEF_SCSI_QCMD(qla2xxx_queuecommand)
605
fca29703 606
1da177e4
LT		 607/*
608 * qla2x00_eh_wait_on_command
609 * Waits for the command to be returned by the Firmware for some
610 * max time.
611 *
612 * Input:
1da177e4 613 * cmd = Scsi Command to wait on.
1da177e4
LT		 614 *
615 * Return:
616 * Not Found : 0
617 * Found : 1
618 */
619static int
e315cd28 620qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1da177e4 621{
fe74c71f
AV		 622#define ABORT_POLLING_PERIOD 1000
623#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
f4f051eb 624 unsigned long wait_iter = ABORT_WAIT_ITER;
85880801
AV		 625 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
626 struct qla_hw_data *ha = vha->hw;
f4f051eb 627 int ret = QLA_SUCCESS;
1da177e4 628
85880801
AV		 629 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
630 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
631 return ret;
632 }
633
d970432c 634 while (CMD_SP(cmd) && wait_iter--) {
fe74c71f 635 msleep(ABORT_POLLING_PERIOD);
f4f051eb 636 }
637 if (CMD_SP(cmd))
638 ret = QLA_FUNCTION_FAILED;
1da177e4 639
f4f051eb 640 return ret;
1da177e4
LT		 641}
642
643/*
644 * qla2x00_wait_for_hba_online
fa2a1ce5 645 * Wait till the HBA is online after going through
1da177e4
LT		 646 * <= MAX_RETRIES_OF_ISP_ABORT or
647 * finally HBA is disabled ie marked offline
648 *
649 * Input:
650 * ha - pointer to host adapter structure
fa2a1ce5
AV		 651 *
652 * Note:
1da177e4
LT		 653 * Does context switching-Release SPIN_LOCK
654 * (if any) before calling this routine.
655 *
656 * Return:
657 * Success (Adapter is online) : 0
658 * Failed (Adapter is offline/disabled) : 1
659 */
854165f4 660int
e315cd28 661qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1da177e4 662{
fca29703
AV		 663 int return_status;
664 unsigned long wait_online;
e315cd28
AC		 665 struct qla_hw_data *ha = vha->hw;
666 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 667
fa2a1ce5 668 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
e315cd28
AC		 669 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
670 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
671 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
672 ha->dpc_active) && time_before(jiffies, wait_online)) {
1da177e4
LT		 673
674 msleep(1000);
675 }
e315cd28 676 if (base_vha->flags.online)
fa2a1ce5 677 return_status = QLA_SUCCESS;
1da177e4
LT		 678 else
679 return_status = QLA_FUNCTION_FAILED;
680
1da177e4
LT		 681 return (return_status);
682}
683
86fbee86
LC		 684/*
685 * qla2x00_wait_for_reset_ready
686 * Wait till the HBA is online after going through
687 * <= MAX_RETRIES_OF_ISP_ABORT or
688 * finally HBA is disabled ie marked offline or flash
689 * operations are in progress.
690 *
691 * Input:
692 * ha - pointer to host adapter structure
693 *
694 * Note:
695 * Does context switching-Release SPIN_LOCK
696 * (if any) before calling this routine.
697 *
698 * Return:
699 * Success (Adapter is online/no flash ops) : 0
700 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
701 */
3dbe756a 702static int
86fbee86
LC		 703qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
704{
705 int return_status;
706 unsigned long wait_online;
707 struct qla_hw_data *ha = vha->hw;
708 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
709
710 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
711 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
712 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
713 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
714 ha->optrom_state != QLA_SWAITING ||
715 ha->dpc_active) && time_before(jiffies, wait_online))
716 msleep(1000);
717
718 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
719 return_status = QLA_SUCCESS;
720 else
721 return_status = QLA_FUNCTION_FAILED;
722
723 DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
724
725 return return_status;
726}
727
2533cf67
LC		 728int
729qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
730{
731 int return_status;
732 unsigned long wait_reset;
733 struct qla_hw_data *ha = vha->hw;
734 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
735
736 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
737 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
738 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
739 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
740 ha->dpc_active) && time_before(jiffies, wait_reset)) {
741
742 msleep(1000);
743
744 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
745 ha->flags.chip_reset_done)
746 break;
747 }
748 if (ha->flags.chip_reset_done)
749 return_status = QLA_SUCCESS;
750 else
751 return_status = QLA_FUNCTION_FAILED;
752
753 return return_status;
754}
755
1da177e4
LT		 756/*
757 * qla2x00_wait_for_loop_ready
758 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
fa2a1ce5 759 * to be in LOOP_READY state.
1da177e4
LT		 760 * Input:
761 * ha - pointer to host adapter structure
fa2a1ce5
AV		 762 *
763 * Note:
1da177e4
LT		 764 * Does context switching-Release SPIN_LOCK
765 * (if any) before calling this routine.
fa2a1ce5 766 *
1da177e4
LT		 767 *
768 * Return:
769 * Success (LOOP_READY) : 0
770 * Failed (LOOP_NOT_READY) : 1
771 */
fa2a1ce5 772static inline int
e315cd28 773qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
1da177e4
LT		 774{
775 int return_status = QLA_SUCCESS;
776 unsigned long loop_timeout ;
e315cd28
AC		 777 struct qla_hw_data *ha = vha->hw;
778 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 779
780 /* wait for 5 min at the max for loop to be ready */
fa2a1ce5 781 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1da177e4 782
e315cd28
AC		 783 while ((!atomic_read(&base_vha->loop_down_timer) &&
784 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
785 atomic_read(&base_vha->loop_state) != LOOP_READY) {
786 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
57680080
RA		 787 return_status = QLA_FUNCTION_FAILED;
788 break;
789 }
1da177e4
LT		 790 msleep(1000);
791 if (time_after_eq(jiffies, loop_timeout)) {
792 return_status = QLA_FUNCTION_FAILED;
793 break;
794 }
795 }
fa2a1ce5 796 return (return_status);
1da177e4
LT		 797}
798
083a469d
GM		 799static void
800sp_get(struct srb *sp)
801{
802 atomic_inc(&sp->ref_count);
803}
804
1da177e4
LT		 805/**************************************************************************
806* qla2xxx_eh_abort
807*
808* Description:
809* The abort function will abort the specified command.
810*
811* Input:
812* cmd = Linux SCSI command packet to be aborted.
813*
814* Returns:
815* Either SUCCESS or FAILED.
816*
817* Note:
2ea00202 818* Only return FAILED if command not returned by firmware.
1da177e4 819**************************************************************************/
e5f82ab8 820static int
1da177e4
LT		 821qla2xxx_eh_abort(struct scsi_cmnd *cmd)
822{
e315cd28 823 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
f4f051eb 824 srb_t *sp;
69abf61e 825 int ret = SUCCESS;
f4f051eb 826 unsigned int id, lun;
18e144d3 827 unsigned long flags;
2ea00202 828 int wait = 0;
e315cd28 829 struct qla_hw_data *ha = vha->hw;
1da177e4 830
65d430fa 831 fc_block_scsi_eh(cmd);
07db5183 832
f4f051eb 833 if (!CMD_SP(cmd))
2ea00202 834 return SUCCESS;
1da177e4 835
f4f051eb 836 id = cmd->device->id;
837 lun = cmd->device->lun;
1da177e4 838
e315cd28 839 spin_lock_irqsave(&ha->hardware_lock, flags);
170babc3
MC		 840 sp = (srb_t *) CMD_SP(cmd);
841 if (!sp) {
842 spin_unlock_irqrestore(&ha->hardware_lock, flags);
843 return SUCCESS;
844 }
1da177e4 845
170babc3
MC		 846 DEBUG2(printk("%s(%ld): aborting sp %p from RISC.",
847 __func__, vha->host_no, sp));
17d98630 848
170babc3
MC		 849 /* Get a reference to the sp and drop the lock.*/
850 sp_get(sp);
083a469d 851
e315cd28 852 spin_unlock_irqrestore(&ha->hardware_lock, flags);
170babc3
MC		 853 if (ha->isp_ops->abort_command(sp)) {
854 DEBUG2(printk("%s(%ld): abort_command "
855 "mbx failed.\n", __func__, vha->host_no));
856 ret = FAILED;
857 } else {
858 DEBUG3(printk("%s(%ld): abort_command "
859 "mbx success.\n", __func__, vha->host_no));
860 wait = 1;
861 }
862 qla2x00_sp_compl(ha, sp);
1da177e4 863
f4f051eb 864 /* Wait for the command to be returned. */
2ea00202 865 if (wait) {
e315cd28 866 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
fa2a1ce5 867 qla_printk(KERN_ERR, ha,
09d1dc2a
MI		 868 "scsi(%ld:%d:%d): Abort handler timed out -- %x.\n",
869 vha->host_no, id, lun, ret);
2ea00202 870 ret = FAILED;
f4f051eb 871 }
1da177e4 872 }
1da177e4 873
fa2a1ce5 874 qla_printk(KERN_INFO, ha,
09d1dc2a
MI		 875 "scsi(%ld:%d:%d): Abort command issued -- %d %x.\n",
876 vha->host_no, id, lun, wait, ret);
1da177e4 877
f4f051eb 878 return ret;
879}
1da177e4 880
4d78c973 881int
e315cd28 882qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
4d78c973 883 unsigned int l, enum nexus_wait_type type)
f4f051eb 884{
17d98630 885 int cnt, match, status;
18e144d3 886 unsigned long flags;
e315cd28 887 struct qla_hw_data *ha = vha->hw;
73208dfd 888 struct req_que *req;
4d78c973 889 srb_t *sp;
1da177e4 890
523ec773 891 status = QLA_SUCCESS;
17d98630 892
e315cd28 893 spin_lock_irqsave(&ha->hardware_lock, flags);
67c2e93a 894 req = vha->req;
17d98630
AC		 895 for (cnt = 1; status == QLA_SUCCESS &&
896 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
897 sp = req->outstanding_cmds[cnt];
898 if (!sp)
523ec773 899 continue;
bad75002 900 if ((sp->ctx) && !IS_PROT_IO(sp))
cf53b069 901 continue;
17d98630
AC		 902 if (vha->vp_idx != sp->fcport->vha->vp_idx)
903 continue;
904 match = 0;
905 switch (type) {
906 case WAIT_HOST:
907 match = 1;
908 break;
909 case WAIT_TARGET:
910 match = sp->cmd->device->id == t;
911 break;
912 case WAIT_LUN:
913 match = (sp->cmd->device->id == t &&
914 sp->cmd->device->lun == l);
915 break;
73208dfd 916 }
17d98630
AC		 917 if (!match)
918 continue;
919
920 spin_unlock_irqrestore(&ha->hardware_lock, flags);
921 status = qla2x00_eh_wait_on_command(sp->cmd);
922 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 923 }
e315cd28 924 spin_unlock_irqrestore(&ha->hardware_lock, flags);
523ec773
AV		 925
926 return status;
1da177e4
LT		 927}
928
523ec773
AV		 929static char *reset_errors[] = {
930 "HBA not online",
931 "HBA not ready",
932 "Task management failed",
933 "Waiting for command completions",
934};
1da177e4 935
e5f82ab8 936static int
523ec773 937__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
2afa19a9 938 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1da177e4 939{
e315cd28 940 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 941 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
523ec773 942 int err;
1da177e4 943
65d430fa 944 fc_block_scsi_eh(cmd);
07db5183 945
b0328bee 946 if (!fcport)
523ec773 947 return FAILED;
1da177e4 948
e315cd28
AC		 949 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
950 vha->host_no, cmd->device->id, cmd->device->lun, name);
1da177e4 951
523ec773 952 err = 0;
e315cd28 953 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
523ec773
AV		 954 goto eh_reset_failed;
955 err = 1;
e315cd28 956 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
523ec773
AV		 957 goto eh_reset_failed;
958 err = 2;
2afa19a9
AC		 959 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
960 != QLA_SUCCESS)
523ec773
AV		 961 goto eh_reset_failed;
962 err = 3;
e315cd28 963 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
4d78c973 964 cmd->device->lun, type) != QLA_SUCCESS)
523ec773
AV		 965 goto eh_reset_failed;
966
e315cd28
AC		 967 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
968 vha->host_no, cmd->device->id, cmd->device->lun, name);
523ec773
AV		 969
970 return SUCCESS;
971
4d78c973 972eh_reset_failed:
e315cd28
AC		 973 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
974 , vha->host_no, cmd->device->id, cmd->device->lun, name,
523ec773
AV		 975 reset_errors[err]);
976 return FAILED;
977}
1da177e4 978
523ec773
AV		 979static int
980qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
981{
e315cd28
AC		 982 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
983 struct qla_hw_data *ha = vha->hw;
1da177e4 984
523ec773
AV		 985 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
986 ha->isp_ops->lun_reset);
1da177e4
LT		 987}
988
1da177e4 989static int
523ec773 990qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1da177e4 991{
e315cd28
AC		 992 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
993 struct qla_hw_data *ha = vha->hw;
1da177e4 994
523ec773
AV		 995 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
996 ha->isp_ops->target_reset);
1da177e4
LT		 997}
998
1da177e4
LT		 999/**************************************************************************
1000* qla2xxx_eh_bus_reset
1001*
1002* Description:
1003* The bus reset function will reset the bus and abort any executing
1004* commands.
1005*
1006* Input:
1007* cmd = Linux SCSI command packet of the command that cause the
1008* bus reset.
1009*
1010* Returns:
1011* SUCCESS/FAILURE (defined as macro in scsi.h).
1012*
1013**************************************************************************/
e5f82ab8 1014static int
1da177e4
LT		 1015qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1016{
e315cd28 1017 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1018 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
2c3dfe3f 1019 int ret = FAILED;
f4f051eb 1020 unsigned int id, lun;
f4f051eb 1021
65d430fa 1022 fc_block_scsi_eh(cmd);
07db5183 1023
f4f051eb 1024 id = cmd->device->id;
1025 lun = cmd->device->lun;
1da177e4 1026
b0328bee 1027 if (!fcport)
f4f051eb 1028 return ret;
1da177e4 1029
e315cd28 1030 qla_printk(KERN_INFO, vha->hw,
749af3d5 1031 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1032
e315cd28 1033 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1da177e4 1034 DEBUG2(printk("%s failed:board disabled\n",__func__));
f4f051eb 1035 goto eh_bus_reset_done;
1da177e4
LT		 1036 }
1037
e315cd28
AC		 1038 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1039 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
f4f051eb 1040 ret = SUCCESS;
1da177e4 1041 }
f4f051eb 1042 if (ret == FAILED)
1043 goto eh_bus_reset_done;
1da177e4 1044
9a41a62b 1045 /* Flush outstanding commands. */
4d78c973 1046 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
523ec773 1047 QLA_SUCCESS)
9a41a62b 1048 ret = FAILED;
1da177e4 1049
f4f051eb 1050eh_bus_reset_done:
e315cd28 1051 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
f4f051eb 1052 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1053
f4f051eb 1054 return ret;
1da177e4
LT		 1055}
1056
1057/**************************************************************************
1058* qla2xxx_eh_host_reset
1059*
1060* Description:
1061* The reset function will reset the Adapter.
1062*
1063* Input:
1064* cmd = Linux SCSI command packet of the command that cause the
1065* adapter reset.
1066*
1067* Returns:
1068* Either SUCCESS or FAILED.
1069*
1070* Note:
1071**************************************************************************/
e5f82ab8 1072static int
1da177e4
LT		 1073qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1074{
e315cd28 1075 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1076 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
e315cd28 1077 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 1078 int ret = FAILED;
f4f051eb 1079 unsigned int id, lun;
e315cd28 1080 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 1081
65d430fa 1082 fc_block_scsi_eh(cmd);
07db5183 1083
f4f051eb 1084 id = cmd->device->id;
1085 lun = cmd->device->lun;
f4f051eb 1086
b0328bee 1087 if (!fcport)
f4f051eb 1088 return ret;
1da177e4 1089
1da177e4 1090 qla_printk(KERN_INFO, ha,
e315cd28 1091 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1092
86fbee86 1093 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
f4f051eb 1094 goto eh_host_reset_lock;
1da177e4
LT		 1095
1096 /*
1097 * Fixme-may be dpc thread is active and processing
fa2a1ce5 1098 * loop_resync,so wait a while for it to
1da177e4
LT		 1099 * be completed and then issue big hammer.Otherwise
1100 * it may cause I/O failure as big hammer marks the
1101 * devices as lost kicking of the port_down_timer
1102 * while dpc is stuck for the mailbox to complete.
1103 */
e315cd28
AC		 1104 qla2x00_wait_for_loop_ready(vha);
1105 if (vha != base_vha) {
1106 if (qla2x00_vp_abort_isp(vha))
f4f051eb 1107 goto eh_host_reset_lock;
e315cd28 1108 } else {
a9083016
GM		 1109 if (IS_QLA82XX(vha->hw)) {
1110 if (!qla82xx_fcoe_ctx_reset(vha)) {
1111 /* Ctx reset success */
1112 ret = SUCCESS;
1113 goto eh_host_reset_lock;
1114 }
1115 /* fall thru if ctx reset failed */
1116 }
68ca949c
AC		 1117 if (ha->wq)
1118 flush_workqueue(ha->wq);
1119
e315cd28 1120 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 1121 if (ha->isp_ops->abort_isp(base_vha)) {
e315cd28
AC		 1122 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1123 /* failed. schedule dpc to try */
1124 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1125
1126 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1127 goto eh_host_reset_lock;
1128 }
1129 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
fa2a1ce5 1130 }
1da177e4 1131
e315cd28 1132 /* Waiting for command to be returned to OS.*/
4d78c973 1133 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
e315cd28 1134 QLA_SUCCESS)
f4f051eb 1135 ret = SUCCESS;
1da177e4 1136
f4f051eb 1137eh_host_reset_lock:
f4f051eb 1138 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
1139 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1140
f4f051eb 1141 return ret;
1142}
1da177e4
LT		 1143
1144/*
1145* qla2x00_loop_reset
1146* Issue loop reset.
1147*
1148* Input:
1149* ha = adapter block pointer.
1150*
1151* Returns:
1152* 0 = success
1153*/
a4722cf2 1154int
e315cd28 1155qla2x00_loop_reset(scsi_qla_host_t *vha)
1da177e4 1156{
0c8c39af 1157 int ret;
bdf79621 1158 struct fc_port *fcport;
e315cd28 1159 struct qla_hw_data *ha = vha->hw;
1da177e4 1160
f4c496c1 1161 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
55e5ed27
AV		 1162 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1163 if (fcport->port_type != FCT_TARGET)
1164 continue;
1165
1166 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1167 if (ret != QLA_SUCCESS) {
1168 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1169 "target_reset=%d d_id=%x.\n", __func__,
1170 vha->host_no, ret, fcport->d_id.b24));
1171 }
1172 }
1173 }
1174
a9083016 1175 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
e315cd28 1176 ret = qla2x00_full_login_lip(vha);
0c8c39af 1177 if (ret != QLA_SUCCESS) {
749af3d5 1178 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28 1179 "full_login_lip=%d.\n", __func__, vha->host_no,
0c8c39af 1180 ret));
749af3d5
AC		 1181 }
1182 atomic_set(&vha->loop_state, LOOP_DOWN);
1183 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1184 qla2x00_mark_all_devices_lost(vha, 0);
1185 qla2x00_wait_for_loop_ready(vha);
0c8c39af
AV		 1186 }
1187
0d6e61bc 1188 if (ha->flags.enable_lip_reset) {
e315cd28 1189 ret = qla2x00_lip_reset(vha);
0c8c39af 1190 if (ret != QLA_SUCCESS) {
749af3d5 1191 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28
AC		 1192 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1193 } else
1194 qla2x00_wait_for_loop_ready(vha);
1da177e4
LT		 1195 }
1196
1da177e4 1197 /* Issue marker command only when we are going to start the I/O */
e315cd28 1198 vha->marker_needed = 1;
1da177e4 1199
0c8c39af 1200 return QLA_SUCCESS;
1da177e4
LT		 1201}
1202
df4bf0bb 1203void
e315cd28 1204qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
df4bf0bb 1205{
73208dfd 1206 int que, cnt;
df4bf0bb
AV		 1207 unsigned long flags;
1208 srb_t *sp;
ac280b67 1209 struct srb_ctx *ctx;
e315cd28 1210 struct qla_hw_data *ha = vha->hw;
73208dfd 1211 struct req_que *req;
df4bf0bb
AV		 1212
1213 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 1214 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 1215 req = ha->req_q_map[que];
73208dfd
AC		 1216 if (!req)
1217 continue;
1218 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1219 sp = req->outstanding_cmds[cnt];
e612d465 1220 if (sp) {
73208dfd 1221 req->outstanding_cmds[cnt] = NULL;
a9083016 1222 if (!sp->ctx ||
bad75002
AE		 1223 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1224 IS_PROT_IO(sp)) {
ac280b67
AV		 1225 sp->cmd->result = res;
1226 qla2x00_sp_compl(ha, sp);
1227 } else {
1228 ctx = sp->ctx;
6c452a45
AV		 1229 if (ctx->type == SRB_LOGIN_CMD ||
1230 ctx->type == SRB_LOGOUT_CMD) {
4916392b 1231 ctx->u.iocb_cmd->free(sp);
db3ad7f8 1232 } else {
6c452a45 1233 struct fc_bsg_job *bsg_job =
4916392b 1234 ctx->u.bsg_job;
6c452a45
AV		 1235 if (bsg_job->request->msgcode
1236 == FC_BSG_HST_CT)
db3ad7f8 1237 kfree(sp->fcport);
6c452a45
AV		 1238 bsg_job->req->errors = 0;
1239 bsg_job->reply->result = res;
4916392b 1240 bsg_job->job_done(bsg_job);
db3ad7f8 1241 kfree(sp->ctx);
6c452a45 1242 mempool_free(sp,
4916392b 1243 ha->srb_mempool);
db3ad7f8 1244 }
ac280b67 1245 }
73208dfd 1246 }
df4bf0bb
AV		 1247 }
1248 }
1249 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1250}
1251
f4f051eb 1252static int
1253qla2xxx_slave_alloc(struct scsi_device *sdev)
1da177e4 1254{
bdf79621 1255 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1da177e4 1256
19a7b4ae 1257 if (!rport || fc_remote_port_chkready(rport))
f4f051eb 1258 return -ENXIO;
bdf79621 1259
19a7b4ae 1260 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1da177e4 1261
f4f051eb 1262 return 0;
1263}
1da177e4 1264
f4f051eb 1265static int
1266qla2xxx_slave_configure(struct scsi_device *sdev)
1267{
e315cd28 1268 scsi_qla_host_t *vha = shost_priv(sdev->host);
2afa19a9 1269 struct req_que *req = vha->req;
8482e118 1270
f4f051eb 1271 if (sdev->tagged_supported)
73208dfd 1272 scsi_activate_tcq(sdev, req->max_q_depth);
f4f051eb 1273 else
73208dfd 1274 scsi_deactivate_tcq(sdev, req->max_q_depth);
f4f051eb 1275 return 0;
1276}
1da177e4 1277
f4f051eb 1278static void
1279qla2xxx_slave_destroy(struct scsi_device *sdev)
1280{
1281 sdev->hostdata = NULL;
1da177e4
LT		 1282}
1283
c45dd305
GM		 1284static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1285{
1286 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1287
1288 if (!scsi_track_queue_full(sdev, qdepth))
1289 return;
1290
1291 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1292 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1293 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1294 sdev->queue_depth));
1295}
1296
1297static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1298{
1299 fc_port_t *fcport = sdev->hostdata;
1300 struct scsi_qla_host *vha = fcport->vha;
1301 struct qla_hw_data *ha = vha->hw;
1302 struct req_que *req = NULL;
1303
1304 req = vha->req;
1305 if (!req)
1306 return;
1307
1308 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1309 return;
1310
1311 if (sdev->ordered_tags)
1312 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1313 else
1314 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1315
1316 DEBUG2(qla_printk(KERN_INFO, ha,
1317 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1318 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1319 sdev->queue_depth));
1320}
1321
ce7e4af7 1322static int
e881a172 1323qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
ce7e4af7 1324{
c45dd305
GM		 1325 switch (reason) {
1326 case SCSI_QDEPTH_DEFAULT:
1327 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1328 break;
1329 case SCSI_QDEPTH_QFULL:
1330 qla2x00_handle_queue_full(sdev, qdepth);
1331 break;
1332 case SCSI_QDEPTH_RAMP_UP:
1333 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1334 break;
1335 default:
08002af2 1336 return -EOPNOTSUPP;
c45dd305 1337 }
e881a172 1338
ce7e4af7
AV		 1339 return sdev->queue_depth;
1340}
1341
1342static int
1343qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1344{
1345 if (sdev->tagged_supported) {
1346 scsi_set_tag_type(sdev, tag_type);
1347 if (tag_type)
1348 scsi_activate_tcq(sdev, sdev->queue_depth);
1349 else
1350 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1351 } else
1352 tag_type = 0;
1353
1354 return tag_type;
1355}
1356
1da177e4
LT		 1357/**
1358 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1359 * @ha: HA context
1360 *
1361 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1362 * supported addressing method.
1363 */
1364static void
53303c42 1365qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1da177e4 1366{
7524f9b9 1367 /* Assume a 32bit DMA mask. */
1da177e4 1368 ha->flags.enable_64bit_addressing = 0;
1da177e4 1369
6a35528a 1370 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
7524f9b9
AV		 1371 /* Any upper-dword bits set? */
1372 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
6a35528a 1373 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
7524f9b9 1374 /* Ok, a 64bit DMA mask is applicable. */
1da177e4 1375 ha->flags.enable_64bit_addressing = 1;
fd34f556
AV		 1376 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1377 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
7524f9b9 1378 return;
1da177e4 1379 }
1da177e4 1380 }
7524f9b9 1381
284901a9
YH		 1382 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1383 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1da177e4
LT		 1384}
1385
fd34f556 1386static void
e315cd28 1387qla2x00_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1388{
1389 unsigned long flags = 0;
1390 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1391
1392 spin_lock_irqsave(&ha->hardware_lock, flags);
1393 ha->interrupts_on = 1;
1394 /* enable risc and host interrupts */
1395 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1396 RD_REG_WORD(&reg->ictrl);
1397 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1398
1399}
1400
1401static void
e315cd28 1402qla2x00_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1403{
1404 unsigned long flags = 0;
1405 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1406
1407 spin_lock_irqsave(&ha->hardware_lock, flags);
1408 ha->interrupts_on = 0;
1409 /* disable risc and host interrupts */
1410 WRT_REG_WORD(&reg->ictrl, 0);
1411 RD_REG_WORD(&reg->ictrl);
1412 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1413}
1414
1415static void
e315cd28 1416qla24xx_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1417{
1418 unsigned long flags = 0;
1419 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1420
1421 spin_lock_irqsave(&ha->hardware_lock, flags);
1422 ha->interrupts_on = 1;
1423 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1424 RD_REG_DWORD(&reg->ictrl);
1425 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1426}
1427
1428static void
e315cd28 1429qla24xx_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1430{
1431 unsigned long flags = 0;
1432 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1433
124f85e6
AV		 1434 if (IS_NOPOLLING_TYPE(ha))
1435 return;
fd34f556
AV		 1436 spin_lock_irqsave(&ha->hardware_lock, flags);
1437 ha->interrupts_on = 0;
1438 WRT_REG_DWORD(&reg->ictrl, 0);
1439 RD_REG_DWORD(&reg->ictrl);
1440 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1441}
1442
1443static struct isp_operations qla2100_isp_ops = {
1444 .pci_config = qla2100_pci_config,
1445 .reset_chip = qla2x00_reset_chip,
1446 .chip_diag = qla2x00_chip_diag,
1447 .config_rings = qla2x00_config_rings,
1448 .reset_adapter = qla2x00_reset_adapter,
1449 .nvram_config = qla2x00_nvram_config,
1450 .update_fw_options = qla2x00_update_fw_options,
1451 .load_risc = qla2x00_load_risc,
1452 .pci_info_str = qla2x00_pci_info_str,
1453 .fw_version_str = qla2x00_fw_version_str,
1454 .intr_handler = qla2100_intr_handler,
1455 .enable_intrs = qla2x00_enable_intrs,
1456 .disable_intrs = qla2x00_disable_intrs,
1457 .abort_command = qla2x00_abort_command,
523ec773
AV		 1458 .target_reset = qla2x00_abort_target,
1459 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1460 .fabric_login = qla2x00_login_fabric,
1461 .fabric_logout = qla2x00_fabric_logout,
1462 .calc_req_entries = qla2x00_calc_iocbs_32,
1463 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1464 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1465 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1466 .read_nvram = qla2x00_read_nvram_data,
1467 .write_nvram = qla2x00_write_nvram_data,
1468 .fw_dump = qla2100_fw_dump,
1469 .beacon_on = NULL,
1470 .beacon_off = NULL,
1471 .beacon_blink = NULL,
1472 .read_optrom = qla2x00_read_optrom_data,
1473 .write_optrom = qla2x00_write_optrom_data,
1474 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1475 .start_scsi = qla2x00_start_scsi,
a9083016 1476 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1477};
1478
1479static struct isp_operations qla2300_isp_ops = {
1480 .pci_config = qla2300_pci_config,
1481 .reset_chip = qla2x00_reset_chip,
1482 .chip_diag = qla2x00_chip_diag,
1483 .config_rings = qla2x00_config_rings,
1484 .reset_adapter = qla2x00_reset_adapter,
1485 .nvram_config = qla2x00_nvram_config,
1486 .update_fw_options = qla2x00_update_fw_options,
1487 .load_risc = qla2x00_load_risc,
1488 .pci_info_str = qla2x00_pci_info_str,
1489 .fw_version_str = qla2x00_fw_version_str,
1490 .intr_handler = qla2300_intr_handler,
1491 .enable_intrs = qla2x00_enable_intrs,
1492 .disable_intrs = qla2x00_disable_intrs,
1493 .abort_command = qla2x00_abort_command,
523ec773
AV		 1494 .target_reset = qla2x00_abort_target,
1495 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1496 .fabric_login = qla2x00_login_fabric,
1497 .fabric_logout = qla2x00_fabric_logout,
1498 .calc_req_entries = qla2x00_calc_iocbs_32,
1499 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1500 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1501 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1502 .read_nvram = qla2x00_read_nvram_data,
1503 .write_nvram = qla2x00_write_nvram_data,
1504 .fw_dump = qla2300_fw_dump,
1505 .beacon_on = qla2x00_beacon_on,
1506 .beacon_off = qla2x00_beacon_off,
1507 .beacon_blink = qla2x00_beacon_blink,
1508 .read_optrom = qla2x00_read_optrom_data,
1509 .write_optrom = qla2x00_write_optrom_data,
1510 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1511 .start_scsi = qla2x00_start_scsi,
a9083016 1512 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1513};
1514
1515static struct isp_operations qla24xx_isp_ops = {
1516 .pci_config = qla24xx_pci_config,
1517 .reset_chip = qla24xx_reset_chip,
1518 .chip_diag = qla24xx_chip_diag,
1519 .config_rings = qla24xx_config_rings,
1520 .reset_adapter = qla24xx_reset_adapter,
1521 .nvram_config = qla24xx_nvram_config,
1522 .update_fw_options = qla24xx_update_fw_options,
1523 .load_risc = qla24xx_load_risc,
1524 .pci_info_str = qla24xx_pci_info_str,
1525 .fw_version_str = qla24xx_fw_version_str,
1526 .intr_handler = qla24xx_intr_handler,
1527 .enable_intrs = qla24xx_enable_intrs,
1528 .disable_intrs = qla24xx_disable_intrs,
1529 .abort_command = qla24xx_abort_command,
523ec773
AV		 1530 .target_reset = qla24xx_abort_target,
1531 .lun_reset = qla24xx_lun_reset,
fd34f556
AV		 1532 .fabric_login = qla24xx_login_fabric,
1533 .fabric_logout = qla24xx_fabric_logout,
1534 .calc_req_entries = NULL,
1535 .build_iocbs = NULL,
1536 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1537 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1538 .read_nvram = qla24xx_read_nvram_data,
1539 .write_nvram = qla24xx_write_nvram_data,
1540 .fw_dump = qla24xx_fw_dump,
1541 .beacon_on = qla24xx_beacon_on,
1542 .beacon_off = qla24xx_beacon_off,
1543 .beacon_blink = qla24xx_beacon_blink,
1544 .read_optrom = qla24xx_read_optrom_data,
1545 .write_optrom = qla24xx_write_optrom_data,
1546 .get_flash_version = qla24xx_get_flash_version,
e315cd28 1547 .start_scsi = qla24xx_start_scsi,
a9083016 1548 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1549};
1550
c3a2f0df
AV		 1551static struct isp_operations qla25xx_isp_ops = {
1552 .pci_config = qla25xx_pci_config,
1553 .reset_chip = qla24xx_reset_chip,
1554 .chip_diag = qla24xx_chip_diag,
1555 .config_rings = qla24xx_config_rings,
1556 .reset_adapter = qla24xx_reset_adapter,
1557 .nvram_config = qla24xx_nvram_config,
1558 .update_fw_options = qla24xx_update_fw_options,
1559 .load_risc = qla24xx_load_risc,
1560 .pci_info_str = qla24xx_pci_info_str,
1561 .fw_version_str = qla24xx_fw_version_str,
1562 .intr_handler = qla24xx_intr_handler,
1563 .enable_intrs = qla24xx_enable_intrs,
1564 .disable_intrs = qla24xx_disable_intrs,
1565 .abort_command = qla24xx_abort_command,
523ec773
AV		 1566 .target_reset = qla24xx_abort_target,
1567 .lun_reset = qla24xx_lun_reset,
c3a2f0df
AV		 1568 .fabric_login = qla24xx_login_fabric,
1569 .fabric_logout = qla24xx_fabric_logout,
1570 .calc_req_entries = NULL,
1571 .build_iocbs = NULL,
1572 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1573 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1574 .read_nvram = qla25xx_read_nvram_data,
1575 .write_nvram = qla25xx_write_nvram_data,
1576 .fw_dump = qla25xx_fw_dump,
1577 .beacon_on = qla24xx_beacon_on,
1578 .beacon_off = qla24xx_beacon_off,
1579 .beacon_blink = qla24xx_beacon_blink,
338c9161 1580 .read_optrom = qla25xx_read_optrom_data,
c3a2f0df
AV		 1581 .write_optrom = qla24xx_write_optrom_data,
1582 .get_flash_version = qla24xx_get_flash_version,
bad75002 1583 .start_scsi = qla24xx_dif_start_scsi,
a9083016 1584 .abort_isp = qla2x00_abort_isp,
c3a2f0df
AV		 1585};
1586
3a03eb79
AV		 1587static struct isp_operations qla81xx_isp_ops = {
1588 .pci_config = qla25xx_pci_config,
1589 .reset_chip = qla24xx_reset_chip,
1590 .chip_diag = qla24xx_chip_diag,
1591 .config_rings = qla24xx_config_rings,
1592 .reset_adapter = qla24xx_reset_adapter,
1593 .nvram_config = qla81xx_nvram_config,
1594 .update_fw_options = qla81xx_update_fw_options,
eaac30be 1595 .load_risc = qla81xx_load_risc,
3a03eb79
AV		 1596 .pci_info_str = qla24xx_pci_info_str,
1597 .fw_version_str = qla24xx_fw_version_str,
1598 .intr_handler = qla24xx_intr_handler,
1599 .enable_intrs = qla24xx_enable_intrs,
1600 .disable_intrs = qla24xx_disable_intrs,
1601 .abort_command = qla24xx_abort_command,
1602 .target_reset = qla24xx_abort_target,
1603 .lun_reset = qla24xx_lun_reset,
1604 .fabric_login = qla24xx_login_fabric,
1605 .fabric_logout = qla24xx_fabric_logout,
1606 .calc_req_entries = NULL,
1607 .build_iocbs = NULL,
1608 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1609 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
3d79038f
AV		 1610 .read_nvram = NULL,
1611 .write_nvram = NULL,
3a03eb79
AV		 1612 .fw_dump = qla81xx_fw_dump,
1613 .beacon_on = qla24xx_beacon_on,
1614 .beacon_off = qla24xx_beacon_off,
1615 .beacon_blink = qla24xx_beacon_blink,
1616 .read_optrom = qla25xx_read_optrom_data,
1617 .write_optrom = qla24xx_write_optrom_data,
1618 .get_flash_version = qla24xx_get_flash_version,
ba77ef53 1619 .start_scsi = qla24xx_dif_start_scsi,
a9083016
GM		 1620 .abort_isp = qla2x00_abort_isp,
1621};
1622
1623static struct isp_operations qla82xx_isp_ops = {
1624 .pci_config = qla82xx_pci_config,
1625 .reset_chip = qla82xx_reset_chip,
1626 .chip_diag = qla24xx_chip_diag,
1627 .config_rings = qla82xx_config_rings,
1628 .reset_adapter = qla24xx_reset_adapter,
1629 .nvram_config = qla81xx_nvram_config,
1630 .update_fw_options = qla24xx_update_fw_options,
1631 .load_risc = qla82xx_load_risc,
1632 .pci_info_str = qla82xx_pci_info_str,
1633 .fw_version_str = qla24xx_fw_version_str,
1634 .intr_handler = qla82xx_intr_handler,
1635 .enable_intrs = qla82xx_enable_intrs,
1636 .disable_intrs = qla82xx_disable_intrs,
1637 .abort_command = qla24xx_abort_command,
1638 .target_reset = qla24xx_abort_target,
1639 .lun_reset = qla24xx_lun_reset,
1640 .fabric_login = qla24xx_login_fabric,
1641 .fabric_logout = qla24xx_fabric_logout,
1642 .calc_req_entries = NULL,
1643 .build_iocbs = NULL,
1644 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1645 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1646 .read_nvram = qla24xx_read_nvram_data,
1647 .write_nvram = qla24xx_write_nvram_data,
1648 .fw_dump = qla24xx_fw_dump,
1649 .beacon_on = qla24xx_beacon_on,
1650 .beacon_off = qla24xx_beacon_off,
1651 .beacon_blink = qla24xx_beacon_blink,
1652 .read_optrom = qla82xx_read_optrom_data,
1653 .write_optrom = qla82xx_write_optrom_data,
1654 .get_flash_version = qla24xx_get_flash_version,
1655 .start_scsi = qla82xx_start_scsi,
1656 .abort_isp = qla82xx_abort_isp,
3a03eb79
AV		 1657};
1658
ea5b6382 1659static inline void
e315cd28 1660qla2x00_set_isp_flags(struct qla_hw_data *ha)
ea5b6382 1661{
1662 ha->device_type = DT_EXTENDED_IDS;
1663 switch (ha->pdev->device) {
1664 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1665 ha->device_type |= DT_ISP2100;
1666 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1667 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1668 break;
1669 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1670 ha->device_type |= DT_ISP2200;
1671 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1672 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1673 break;
1674 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1675 ha->device_type |= DT_ISP2300;
4a59f71d 1676 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1677 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1678 break;
1679 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1680 ha->device_type |= DT_ISP2312;
4a59f71d 1681 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1682 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1683 break;
1684 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1685 ha->device_type |= DT_ISP2322;
4a59f71d 1686 ha->device_type |= DT_ZIO_SUPPORTED;
ea5b6382 1687 if (ha->pdev->subsystem_vendor == 0x1028 &&
1688 ha->pdev->subsystem_device == 0x0170)
1689 ha->device_type |= DT_OEM_001;
441d1072 1690 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1691 break;
1692 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1693 ha->device_type |= DT_ISP6312;
441d1072 1694 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1695 break;
1696 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1697 ha->device_type |= DT_ISP6322;
441d1072 1698 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1699 break;
1700 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1701 ha->device_type |= DT_ISP2422;
4a59f71d 1702 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1703 ha->device_type |= DT_FWI2;
c76f2c01 1704 ha->device_type |= DT_IIDMA;
441d1072 1705 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1706 break;
1707 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1708 ha->device_type |= DT_ISP2432;
4a59f71d 1709 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1710 ha->device_type |= DT_FWI2;
c76f2c01 1711 ha->device_type |= DT_IIDMA;
441d1072 1712 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1713 break;
4d4df193
HK		 1714 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1715 ha->device_type |= DT_ISP8432;
1716 ha->device_type |= DT_ZIO_SUPPORTED;
1717 ha->device_type |= DT_FWI2;
1718 ha->device_type |= DT_IIDMA;
1719 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1720 break;
044cc6c8 1721 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1722 ha->device_type |= DT_ISP5422;
e428924c 1723 ha->device_type |= DT_FWI2;
441d1072 1724 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1725 break;
044cc6c8 1726 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1727 ha->device_type |= DT_ISP5432;
e428924c 1728 ha->device_type |= DT_FWI2;
441d1072 1729 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1730 break;
c3a2f0df
AV		 1731 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1732 ha->device_type |= DT_ISP2532;
1733 ha->device_type |= DT_ZIO_SUPPORTED;
1734 ha->device_type |= DT_FWI2;
1735 ha->device_type |= DT_IIDMA;
441d1072 1736 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1737 break;
3a03eb79
AV		 1738 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1739 ha->device_type |= DT_ISP8001;
1740 ha->device_type |= DT_ZIO_SUPPORTED;
1741 ha->device_type |= DT_FWI2;
1742 ha->device_type |= DT_IIDMA;
1743 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1744 break;
a9083016
GM		 1745 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1746 ha->device_type |= DT_ISP8021;
1747 ha->device_type |= DT_ZIO_SUPPORTED;
1748 ha->device_type |= DT_FWI2;
1749 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1750 /* Initialize 82XX ISP flags */
1751 qla82xx_init_flags(ha);
1752 break;
ea5b6382 1753 }
e5b68a61 1754
a9083016
GM		 1755 if (IS_QLA82XX(ha))
1756 ha->port_no = !(ha->portnum & 1);
1757 else
1758 /* Get adapter physical port no from interrupt pin register. */
1759 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1760
e5b68a61
AC		 1761 if (ha->port_no & 1)
1762 ha->flags.port0 = 1;
1763 else
1764 ha->flags.port0 = 0;
ea5b6382 1765}
1766
1da177e4 1767static int
e315cd28 1768qla2x00_iospace_config(struct qla_hw_data *ha)
1da177e4 1769{
3776541d 1770 resource_size_t pio;
73208dfd 1771 uint16_t msix;
68ca949c 1772 int cpus;
1da177e4 1773
a9083016
GM		 1774 if (IS_QLA82XX(ha))
1775 return qla82xx_iospace_config(ha);
1776
285d0321
AV		 1777 if (pci_request_selected_regions(ha->pdev, ha->bars,
1778 QLA2XXX_DRIVER_NAME)) {
1779 qla_printk(KERN_WARNING, ha,
1780 "Failed to reserve PIO/MMIO regions (%s)\n",
1781 pci_name(ha->pdev));
1782
1783 goto iospace_error_exit;
1784 }
1785 if (!(ha->bars & 1))
1786 goto skip_pio;
1787
1da177e4
LT		 1788 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1789 pio = pci_resource_start(ha->pdev, 0);
3776541d
AV		 1790 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1791 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1da177e4
LT		 1792 qla_printk(KERN_WARNING, ha,
1793 "Invalid PCI I/O region size (%s)...\n",
1794 pci_name(ha->pdev));
1795 pio = 0;
1796 }
1797 } else {
1798 qla_printk(KERN_WARNING, ha,
1799 "region #0 not a PIO resource (%s)...\n",
1800 pci_name(ha->pdev));
1801 pio = 0;
1802 }
285d0321 1803 ha->pio_address = pio;
1da177e4 1804
285d0321 1805skip_pio:
1da177e4 1806 /* Use MMIO operations for all accesses. */
3776541d 1807 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1da177e4 1808 qla_printk(KERN_ERR, ha,
3776541d 1809 "region #1 not an MMIO resource (%s), aborting\n",
1da177e4
LT		 1810 pci_name(ha->pdev));
1811 goto iospace_error_exit;
1812 }
3776541d 1813 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1da177e4
LT		 1814 qla_printk(KERN_ERR, ha,
1815 "Invalid PCI mem region size (%s), aborting\n",
1816 pci_name(ha->pdev));
1817 goto iospace_error_exit;
1818 }
1819
3776541d 1820 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1da177e4
LT		 1821 if (!ha->iobase) {
1822 qla_printk(KERN_ERR, ha,
1823 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1824
1825 goto iospace_error_exit;
1826 }
1827
73208dfd 1828 /* Determine queue resources */
2afa19a9 1829 ha->max_req_queues = ha->max_rsp_queues = 1;
d84a47c2
MH		 1830 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1831 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
2afa19a9 1832 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
17d98630 1833 goto mqiobase_exit;
d84a47c2 1834
17d98630
AC		 1835 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1836 pci_resource_len(ha->pdev, 3));
1837 if (ha->mqiobase) {
1838 /* Read MSIX vector size of the board */
1839 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1840 ha->msix_count = msix;
68ca949c
AC		 1841 /* Max queues are bounded by available msix vectors */
1842 /* queue 0 uses two msix vectors */
1843 if (ql2xmultique_tag) {
1844 cpus = num_online_cpus();
27dc9c5a 1845 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
68ca949c
AC		 1846 (cpus + 1) : (ha->msix_count - 1);
1847 ha->max_req_queues = 2;
1848 } else if (ql2xmaxqueues > 1) {
2afa19a9
AC		 1849 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1850 QLA_MQ_SIZE : ql2xmaxqueues;
1851 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1852 " of request queues:%d\n", ha->max_req_queues));
1853 }
68ca949c
AC		 1854 qla_printk(KERN_INFO, ha,
1855 "MSI-X vector count: %d\n", msix);
2afa19a9
AC		 1856 } else
1857 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
17d98630
AC		 1858
1859mqiobase_exit:
2afa19a9 1860 ha->msix_count = ha->max_rsp_queues + 1;
1da177e4
LT		 1861 return (0);
1862
1863iospace_error_exit:
1864 return (-ENOMEM);
1865}
1866
1e99e33a
AV		 1867static void
1868qla2xxx_scan_start(struct Scsi_Host *shost)
1869{
e315cd28 1870 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1871
cbc8eb67
AV		 1872 if (vha->hw->flags.running_gold_fw)
1873 return;
1874
e315cd28
AC		 1875 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1876 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1877 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1878 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1e99e33a
AV		 1879}
1880
1881static int
1882qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1883{
e315cd28 1884 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1885
e315cd28 1886 if (!vha->host)
1e99e33a 1887 return 1;
e315cd28 1888 if (time > vha->hw->loop_reset_delay * HZ)
1e99e33a
AV		 1889 return 1;
1890
e315cd28 1891 return atomic_read(&vha->loop_state) == LOOP_READY;
1e99e33a
AV		 1892}
1893
1da177e4
LT		 1894/*
1895 * PCI driver interface
1896 */
7ee61397
AV		 1897static int __devinit
1898qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4 1899{
a1541d5a 1900 int ret = -ENODEV;
1da177e4 1901 struct Scsi_Host *host;
e315cd28
AC		 1902 scsi_qla_host_t *base_vha = NULL;
1903 struct qla_hw_data *ha;
29856e28 1904 char pci_info[30];
1da177e4 1905 char fw_str[30];
5433383e 1906 struct scsi_host_template *sht;
c51da4ec 1907 int bars, max_id, mem_only = 0;
e315cd28 1908 uint16_t req_length = 0, rsp_length = 0;
73208dfd
AC		 1909 struct req_que *req = NULL;
1910 struct rsp_que *rsp = NULL;
1da177e4 1911
285d0321 1912 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
a5326f86 1913 sht = &qla2xxx_driver_template;
5433383e 1914 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
8bc69e7d 1915 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
4d4df193 1916 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
8bc69e7d 1917 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
c3a2f0df 1918 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
3a03eb79 1919 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
a9083016
GM		 1920 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1921 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
285d0321 1922 bars = pci_select_bars(pdev, IORESOURCE_MEM);
09483916 1923 mem_only = 1;
285d0321
AV		 1924 }
1925
09483916
BH		 1926 if (mem_only) {
1927 if (pci_enable_device_mem(pdev))
1928 goto probe_out;
1929 } else {
1930 if (pci_enable_device(pdev))
1931 goto probe_out;
1932 }
285d0321 1933
0927678f
JB		 1934 /* This may fail but that's ok */
1935 pci_enable_pcie_error_reporting(pdev);
285d0321 1936
e315cd28
AC		 1937 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1938 if (!ha) {
1939 DEBUG(printk("Unable to allocate memory for ha\n"));
1940 goto probe_out;
1da177e4 1941 }
e315cd28 1942 ha->pdev = pdev;
1da177e4
LT		 1943
1944 /* Clear our data area */
285d0321 1945 ha->bars = bars;
09483916 1946 ha->mem_only = mem_only;
df4bf0bb 1947 spin_lock_init(&ha->hardware_lock);
339aa70e 1948 spin_lock_init(&ha->vport_slock);
1da177e4 1949
ea5b6382 1950 /* Set ISP-type information. */
1951 qla2x00_set_isp_flags(ha);
ca79cf66
DG		 1952
1953 /* Set EEH reset type to fundamental if required by hba */
1954 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1955 pdev->needs_freset = 1;
ca79cf66
DG		 1956 }
1957
1da177e4
LT		 1958 /* Configure PCI I/O space */
1959 ret = qla2x00_iospace_config(ha);
a1541d5a 1960 if (ret)
e315cd28 1961 goto probe_hw_failed;
1da177e4 1962
1da177e4 1963 qla_printk(KERN_INFO, ha,
5433383e
AV		 1964 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1965 ha->iobase);
1da177e4 1966
1da177e4 1967 ha->prev_topology = 0;
fca29703 1968 ha->init_cb_size = sizeof(init_cb_t);
d8b45213 1969 ha->link_data_rate = PORT_SPEED_UNKNOWN;
854165f4 1970 ha->optrom_size = OPTROM_SIZE_2300;
1da177e4 1971
abbd8870 1972 /* Assign ISP specific operations. */
e315cd28 1973 max_id = MAX_TARGETS_2200;
1da177e4 1974 if (IS_QLA2100(ha)) {
e315cd28 1975 max_id = MAX_TARGETS_2100;
1da177e4 1976 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
e315cd28
AC		 1977 req_length = REQUEST_ENTRY_CNT_2100;
1978 rsp_length = RESPONSE_ENTRY_CNT_2100;
1979 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1980 ha->gid_list_info_size = 4;
3a03eb79
AV		 1981 ha->flash_conf_off = ~0;
1982 ha->flash_data_off = ~0;
1983 ha->nvram_conf_off = ~0;
1984 ha->nvram_data_off = ~0;
fd34f556 1985 ha->isp_ops = &qla2100_isp_ops;
1da177e4 1986 } else if (IS_QLA2200(ha)) {
1da177e4 1987 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1988 req_length = REQUEST_ENTRY_CNT_2200;
1989 rsp_length = RESPONSE_ENTRY_CNT_2100;
1990 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1991 ha->gid_list_info_size = 4;
3a03eb79
AV		 1992 ha->flash_conf_off = ~0;
1993 ha->flash_data_off = ~0;
1994 ha->nvram_conf_off = ~0;
1995 ha->nvram_data_off = ~0;
fd34f556 1996 ha->isp_ops = &qla2100_isp_ops;
fca29703 1997 } else if (IS_QLA23XX(ha)) {
1da177e4 1998 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1999 req_length = REQUEST_ENTRY_CNT_2200;
2000 rsp_length = RESPONSE_ENTRY_CNT_2300;
2001 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
abbd8870 2002 ha->gid_list_info_size = 6;
854165f4 2003 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2004 ha->optrom_size = OPTROM_SIZE_2322;
3a03eb79
AV		 2005 ha->flash_conf_off = ~0;
2006 ha->flash_data_off = ~0;
2007 ha->nvram_conf_off = ~0;
2008 ha->nvram_data_off = ~0;
fd34f556 2009 ha->isp_ops = &qla2300_isp_ops;
4d4df193 2010 } else if (IS_QLA24XX_TYPE(ha)) {
fca29703 2011 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2012 req_length = REQUEST_ENTRY_CNT_24XX;
2013 rsp_length = RESPONSE_ENTRY_CNT_2300;
2014 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2c3dfe3f 2015 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
fca29703 2016 ha->gid_list_info_size = 8;
854165f4 2017 ha->optrom_size = OPTROM_SIZE_24XX;
73208dfd 2018 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
fd34f556 2019 ha->isp_ops = &qla24xx_isp_ops;
3a03eb79
AV		 2020 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2021 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2022 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2023 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
c3a2f0df 2024 } else if (IS_QLA25XX(ha)) {
c3a2f0df 2025 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2026 req_length = REQUEST_ENTRY_CNT_24XX;
2027 rsp_length = RESPONSE_ENTRY_CNT_2300;
2028 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
c3a2f0df 2029 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
c3a2f0df
AV		 2030 ha->gid_list_info_size = 8;
2031 ha->optrom_size = OPTROM_SIZE_25XX;
73208dfd 2032 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
c3a2f0df 2033 ha->isp_ops = &qla25xx_isp_ops;
3a03eb79
AV		 2034 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2035 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2036 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2037 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2038 } else if (IS_QLA81XX(ha)) {
2039 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2040 req_length = REQUEST_ENTRY_CNT_24XX;
2041 rsp_length = RESPONSE_ENTRY_CNT_2300;
2042 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2043 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2044 ha->gid_list_info_size = 8;
2045 ha->optrom_size = OPTROM_SIZE_81XX;
40859ae5 2046 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3a03eb79
AV		 2047 ha->isp_ops = &qla81xx_isp_ops;
2048 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2049 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2050 ha->nvram_conf_off = ~0;
2051 ha->nvram_data_off = ~0;
a9083016
GM		 2052 } else if (IS_QLA82XX(ha)) {
2053 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2054 req_length = REQUEST_ENTRY_CNT_82XX;
2055 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2056 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2057 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2058 ha->gid_list_info_size = 8;
2059 ha->optrom_size = OPTROM_SIZE_82XX;
087c621e 2060 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
a9083016
GM		 2061 ha->isp_ops = &qla82xx_isp_ops;
2062 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2063 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2064 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2065 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
1da177e4 2066 }
1da177e4 2067
6c2f527c 2068 mutex_init(&ha->vport_lock);
0b05a1f0
MB		 2069 init_completion(&ha->mbx_cmd_comp);
2070 complete(&ha->mbx_cmd_comp);
2071 init_completion(&ha->mbx_intr_comp);
23f2ebd1 2072 init_completion(&ha->dcbx_comp);
1da177e4 2073
2c3dfe3f 2074 set_bit(0, (unsigned long *) ha->vp_idx_map);
1da177e4 2075
53303c42 2076 qla2x00_config_dma_addressing(ha);
73208dfd 2077 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
e315cd28 2078 if (!ret) {
1da177e4
LT		 2079 qla_printk(KERN_WARNING, ha,
2080 "[ERROR] Failed to allocate memory for adapter\n");
2081
e315cd28
AC		 2082 goto probe_hw_failed;
2083 }
2084
73208dfd 2085 req->max_q_depth = MAX_Q_DEPTH;
e315cd28 2086 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
73208dfd
AC		 2087 req->max_q_depth = ql2xmaxqdepth;
2088
e315cd28
AC		 2089
2090 base_vha = qla2x00_create_host(sht, ha);
2091 if (!base_vha) {
2092 qla_printk(KERN_WARNING, ha,
2093 "[ERROR] Failed to allocate memory for scsi_host\n");
2094
a1541d5a 2095 ret = -ENOMEM;
6e9f21f3 2096 qla2x00_mem_free(ha);
2afa19a9
AC		 2097 qla2x00_free_req_que(ha, req);
2098 qla2x00_free_rsp_que(ha, rsp);
e315cd28 2099 goto probe_hw_failed;
1da177e4
LT		 2100 }
2101
e315cd28
AC		 2102 pci_set_drvdata(pdev, base_vha);
2103
e315cd28 2104 host = base_vha->host;
2afa19a9 2105 base_vha->req = req;
73208dfd
AC		 2106 host->can_queue = req->length + 128;
2107 if (IS_QLA2XXX_MIDTYPE(ha))
e315cd28 2108 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
73208dfd 2109 else
e315cd28
AC		 2110 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2111 base_vha->vp_idx;
58548cb5
GM		 2112
2113 /* Set the SG table size based on ISP type */
2114 if (!IS_FWI2_CAPABLE(ha)) {
2115 if (IS_QLA2100(ha))
2116 host->sg_tablesize = 32;
2117 } else {
2118 if (!IS_QLA82XX(ha))
2119 host->sg_tablesize = QLA_SG_ALL;
2120 }
2121
e315cd28
AC		 2122 host->max_id = max_id;
2123 host->this_id = 255;
2124 host->cmd_per_lun = 3;
2125 host->unique_id = host->host_no;
0c470874
AE		 2126 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
2127 host->max_cmd_len = 32;
2128 else
2129 host->max_cmd_len = MAX_CMDSZ;
e315cd28
AC		 2130 host->max_channel = MAX_BUSES - 1;
2131 host->max_lun = MAX_LUNS;
2132 host->transportt = qla2xxx_transport_template;
9a069e19 2133 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
e315cd28 2134
73208dfd
AC		 2135 /* Set up the irqs */
2136 ret = qla2x00_request_irqs(ha, rsp);
2137 if (ret)
6e9f21f3 2138 goto probe_init_failed;
90a86fc0
JC		 2139
2140 pci_save_state(pdev);
2141
73208dfd 2142 /* Alloc arrays of request and response ring ptrs */
7163ea81 2143que_init:
73208dfd
AC		 2144 if (!qla2x00_alloc_queues(ha)) {
2145 qla_printk(KERN_WARNING, ha,
2146 "[ERROR] Failed to allocate memory for queue"
2147 " pointers\n");
6e9f21f3 2148 goto probe_init_failed;
73208dfd 2149 }
a9083016 2150
73208dfd
AC		 2151 ha->rsp_q_map[0] = rsp;
2152 ha->req_q_map[0] = req;
2afa19a9
AC		 2153 rsp->req = req;
2154 req->rsp = rsp;
2155 set_bit(0, ha->req_qid_map);
2156 set_bit(0, ha->rsp_qid_map);
08029990
AV		 2157 /* FWI2-capable only. */
2158 req->req_q_in = &ha->iobase->isp24.req_q_in;
2159 req->req_q_out = &ha->iobase->isp24.req_q_out;
2160 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2161 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
17d98630 2162 if (ha->mqenable) {
08029990
AV		 2163 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2164 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2165 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2166 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
17d98630
AC		 2167 }
2168
a9083016
GM		 2169 if (IS_QLA82XX(ha)) {
2170 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2171 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2172 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2173 }
2174
e315cd28 2175 if (qla2x00_initialize_adapter(base_vha)) {
1da177e4
LT		 2176 qla_printk(KERN_WARNING, ha,
2177 "Failed to initialize adapter\n");
2178
2179 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2180 "Adapter flags %x.\n",
e315cd28 2181 base_vha->host_no, base_vha->device_flags));
1da177e4 2182
a9083016
GM		 2183 if (IS_QLA82XX(ha)) {
2184 qla82xx_idc_lock(ha);
2185 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2186 QLA82XX_DEV_FAILED);
2187 qla82xx_idc_unlock(ha);
2188 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2189 }
2190
a1541d5a 2191 ret = -ENODEV;
1da177e4
LT		 2192 goto probe_failed;
2193 }
2194
7163ea81
AC		 2195 if (ha->mqenable) {
2196 if (qla25xx_setup_mode(base_vha)) {
68ca949c
AC		 2197 qla_printk(KERN_WARNING, ha,
2198 "Can't create queues, falling back to single"
2199 " queue mode\n");
7163ea81
AC		 2200 goto que_init;
2201 }
2202 }
68ca949c 2203
cbc8eb67
AV		 2204 if (ha->flags.running_gold_fw)
2205 goto skip_dpc;
2206
1da177e4
LT		 2207 /*
2208 * Startup the kernel thread for this host adapter
2209 */
39a11240 2210 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
e315cd28 2211 "%s_dpc", base_vha->host_str);
39a11240 2212 if (IS_ERR(ha->dpc_thread)) {
1da177e4
LT		 2213 qla_printk(KERN_WARNING, ha,
2214 "Unable to start DPC thread!\n");
39a11240 2215 ret = PTR_ERR(ha->dpc_thread);
1da177e4
LT		 2216 goto probe_failed;
2217 }
1da177e4 2218
cbc8eb67 2219skip_dpc:
e315cd28
AC		 2220 list_add_tail(&base_vha->list, &ha->vp_list);
2221 base_vha->host->irq = ha->pdev->irq;
1da177e4
LT		 2222
2223 /* Initialized the timer */
e315cd28 2224 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
1da177e4
LT		 2225
2226 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
e315cd28 2227 base_vha->host_no, ha));
d19044c3 2228
ba77ef53 2229 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
bad75002
AE		 2230 if (ha->fw_attributes & BIT_4) {
2231 base_vha->flags.difdix_supported = 1;
2232 DEBUG18(qla_printk(KERN_INFO, ha,
2233 "Registering for DIF/DIX type 1 and 3"
2234 " protection.\n"));
2235 scsi_host_set_prot(host,
2236 SHOST_DIF_TYPE1_PROTECTION
0c470874 2237 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE		 2238 | SHOST_DIF_TYPE3_PROTECTION
2239 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2240 | SHOST_DIX_TYPE2_PROTECTION
bad75002
AE		 2241 | SHOST_DIX_TYPE3_PROTECTION);
2242 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2243 } else
2244 base_vha->flags.difdix_supported = 0;
2245 }
2246
a9083016
GM		 2247 ha->isp_ops->enable_intrs(ha);
2248
a1541d5a
AV		 2249 ret = scsi_add_host(host, &pdev->dev);
2250 if (ret)
2251 goto probe_failed;
2252
1486400f
MR		 2253 base_vha->flags.init_done = 1;
2254 base_vha->flags.online = 1;
2255
1e99e33a
AV		 2256 scsi_scan_host(host);
2257
e315cd28 2258 qla2x00_alloc_sysfs_attr(base_vha);
a1541d5a 2259
e315cd28 2260 qla2x00_init_host_attr(base_vha);
a1541d5a 2261
e315cd28 2262 qla2x00_dfs_setup(base_vha);
df613b96 2263
1da177e4
LT		 2264 qla_printk(KERN_INFO, ha, "\n"
2265 " QLogic Fibre Channel HBA Driver: %s\n"
2266 " QLogic %s - %s\n"
5433383e
AV		 2267 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2268 qla2x00_version_str, ha->model_number,
e315cd28
AC		 2269 ha->model_desc ? ha->model_desc : "", pdev->device,
2270 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2271 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2272 ha->isp_ops->fw_version_str(base_vha, fw_str));
1da177e4 2273
1da177e4
LT		 2274 return 0;
2275
6e9f21f3 2276probe_init_failed:
2afa19a9
AC		 2277 qla2x00_free_req_que(ha, req);
2278 qla2x00_free_rsp_que(ha, rsp);
2279 ha->max_req_queues = ha->max_rsp_queues = 0;
6e9f21f3 2280
1da177e4 2281probe_failed:
b9978769
AV		 2282 if (base_vha->timer_active)
2283 qla2x00_stop_timer(base_vha);
2284 base_vha->flags.online = 0;
2285 if (ha->dpc_thread) {
2286 struct task_struct *t = ha->dpc_thread;
2287
2288 ha->dpc_thread = NULL;
2289 kthread_stop(t);
2290 }
2291
e315cd28 2292 qla2x00_free_device(base_vha);
1da177e4 2293
e315cd28 2294 scsi_host_put(base_vha->host);
1da177e4 2295
e315cd28 2296probe_hw_failed:
a9083016
GM		 2297 if (IS_QLA82XX(ha)) {
2298 qla82xx_idc_lock(ha);
2299 qla82xx_clear_drv_active(ha);
2300 qla82xx_idc_unlock(ha);
2301 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2302 if (!ql2xdbwr)
2303 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2304 } else {
2305 if (ha->iobase)
2306 iounmap(ha->iobase);
2307 }
e315cd28
AC		 2308 pci_release_selected_regions(ha->pdev, ha->bars);
2309 kfree(ha);
2310 ha = NULL;
1da177e4 2311
a1541d5a 2312probe_out:
e315cd28 2313 pci_disable_device(pdev);
a1541d5a 2314 return ret;
1da177e4 2315}
1da177e4 2316
e30d1756
MI		 2317static void
2318qla2x00_shutdown(struct pci_dev *pdev)
2319{
2320 scsi_qla_host_t *vha;
2321 struct qla_hw_data *ha;
2322
2323 vha = pci_get_drvdata(pdev);
2324 ha = vha->hw;
2325
2326 /* Turn-off FCE trace */
2327 if (ha->flags.fce_enabled) {
2328 qla2x00_disable_fce_trace(vha, NULL, NULL);
2329 ha->flags.fce_enabled = 0;
2330 }
2331
2332 /* Turn-off EFT trace */
2333 if (ha->eft)
2334 qla2x00_disable_eft_trace(vha);
2335
2336 /* Stop currently executing firmware. */
2337 qla2x00_try_to_stop_firmware(vha);
2338
2339 /* Turn adapter off line */
2340 vha->flags.online = 0;
2341
2342 /* turn-off interrupts on the card */
2343 if (ha->interrupts_on) {
2344 vha->flags.init_done = 0;
2345 ha->isp_ops->disable_intrs(ha);
2346 }
2347
2348 qla2x00_free_irqs(vha);
2349
2350 qla2x00_free_fw_dump(ha);
2351}
2352
4c993f76 2353static void
7ee61397 2354qla2x00_remove_one(struct pci_dev *pdev)
1da177e4 2355{
feafb7b1 2356 scsi_qla_host_t *base_vha, *vha;
e315cd28 2357 struct qla_hw_data *ha;
feafb7b1 2358 unsigned long flags;
e315cd28
AC		 2359
2360 base_vha = pci_get_drvdata(pdev);
2361 ha = base_vha->hw;
2362
feafb7b1
AE		 2363 spin_lock_irqsave(&ha->vport_slock, flags);
2364 list_for_each_entry(vha, &ha->vp_list, list) {
2365 atomic_inc(&vha->vref_count);
2366
8ae598d0 2367 if (vha->fc_vport) {
feafb7b1
AE		 2368 spin_unlock_irqrestore(&ha->vport_slock, flags);
2369
e315cd28 2370 fc_vport_terminate(vha->fc_vport);
feafb7b1
AE		 2371
2372 spin_lock_irqsave(&ha->vport_slock, flags);
2373 }
2374
2375 atomic_dec(&vha->vref_count);
e315cd28 2376 }
feafb7b1 2377 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 2378
e315cd28 2379 set_bit(UNLOADING, &base_vha->dpc_flags);
1da177e4 2380
b9978769
AV		 2381 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2382
e315cd28 2383 qla2x00_dfs_remove(base_vha);
c795c1e4 2384
e315cd28 2385 qla84xx_put_chip(base_vha);
c795c1e4 2386
b9978769
AV		 2387 /* Disable timer */
2388 if (base_vha->timer_active)
2389 qla2x00_stop_timer(base_vha);
2390
2391 base_vha->flags.online = 0;
2392
68ca949c
AC		 2393 /* Flush the work queue and remove it */
2394 if (ha->wq) {
2395 flush_workqueue(ha->wq);
2396 destroy_workqueue(ha->wq);
2397 ha->wq = NULL;
2398 }
2399
b9978769
AV		 2400 /* Kill the kernel thread for this host */
2401 if (ha->dpc_thread) {
2402 struct task_struct *t = ha->dpc_thread;
2403
2404 /*
2405 * qla2xxx_wake_dpc checks for ->dpc_thread
2406 * so we need to zero it out.
2407 */
2408 ha->dpc_thread = NULL;
2409 kthread_stop(t);
2410 }
2411
e315cd28 2412 qla2x00_free_sysfs_attr(base_vha);
df613b96 2413
e315cd28 2414 fc_remove_host(base_vha->host);
4d4df193 2415
e315cd28 2416 scsi_remove_host(base_vha->host);
1da177e4 2417
e315cd28 2418 qla2x00_free_device(base_vha);
bdf79621 2419
e315cd28 2420 scsi_host_put(base_vha->host);
1da177e4 2421
a9083016 2422 if (IS_QLA82XX(ha)) {
b963752f
GM		 2423 qla82xx_idc_lock(ha);
2424 qla82xx_clear_drv_active(ha);
2425 qla82xx_idc_unlock(ha);
2426
a9083016
GM		 2427 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2428 if (!ql2xdbwr)
2429 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2430 } else {
2431 if (ha->iobase)
2432 iounmap(ha->iobase);
1da177e4 2433
a9083016
GM		 2434 if (ha->mqiobase)
2435 iounmap(ha->mqiobase);
2436 }
73208dfd 2437
e315cd28
AC		 2438 pci_release_selected_regions(ha->pdev, ha->bars);
2439 kfree(ha);
2440 ha = NULL;
1da177e4 2441
90a86fc0
JC		 2442 pci_disable_pcie_error_reporting(pdev);
2443
665db93b 2444 pci_disable_device(pdev);
1da177e4
LT		 2445 pci_set_drvdata(pdev, NULL);
2446}
1da177e4
LT		 2447
2448static void
e315cd28 2449qla2x00_free_device(scsi_qla_host_t *vha)
1da177e4 2450{
e315cd28 2451 struct qla_hw_data *ha = vha->hw;
1da177e4 2452
85880801
AV		 2453 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2454
2455 /* Disable timer */
2456 if (vha->timer_active)
2457 qla2x00_stop_timer(vha);
2458
2459 /* Kill the kernel thread for this host */
2460 if (ha->dpc_thread) {
2461 struct task_struct *t = ha->dpc_thread;
2462
2463 /*
2464 * qla2xxx_wake_dpc checks for ->dpc_thread
2465 * so we need to zero it out.
2466 */
2467 ha->dpc_thread = NULL;
2468 kthread_stop(t);
2469 }
2470
2afa19a9
AC		 2471 qla25xx_delete_queues(vha);
2472
df613b96 2473 if (ha->flags.fce_enabled)
e315cd28 2474 qla2x00_disable_fce_trace(vha, NULL, NULL);
df613b96 2475
a7a167bf 2476 if (ha->eft)
e315cd28 2477 qla2x00_disable_eft_trace(vha);
a7a167bf 2478
f6ef3b18 2479 /* Stop currently executing firmware. */
e315cd28 2480 qla2x00_try_to_stop_firmware(vha);
1da177e4 2481
85880801
AV		 2482 vha->flags.online = 0;
2483
f6ef3b18 2484 /* turn-off interrupts on the card */
a9083016
GM		 2485 if (ha->interrupts_on) {
2486 vha->flags.init_done = 0;
fd34f556 2487 ha->isp_ops->disable_intrs(ha);
a9083016 2488 }
f6ef3b18 2489
e315cd28 2490 qla2x00_free_irqs(vha);
1da177e4 2491
8867048b
CD		 2492 qla2x00_free_fcports(vha);
2493
e315cd28 2494 qla2x00_mem_free(ha);
73208dfd
AC		 2495
2496 qla2x00_free_queues(ha);
1da177e4
LT		 2497}
2498
8867048b
CD		 2499void qla2x00_free_fcports(struct scsi_qla_host *vha)
2500{
2501 fc_port_t *fcport, *tfcport;
2502
2503 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2504 list_del(&fcport->list);
2505 kfree(fcport);
2506 fcport = NULL;
2507 }
2508}
2509
d97994dc 2510static inline void
e315cd28 2511qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
d97994dc 2512 int defer)
2513{
d97994dc 2514 struct fc_rport *rport;
67becc00 2515 scsi_qla_host_t *base_vha;
d97994dc 2516
2517 if (!fcport->rport)
2518 return;
2519
2520 rport = fcport->rport;
2521 if (defer) {
67becc00 2522 base_vha = pci_get_drvdata(vha->hw->pdev);
e315cd28 2523 spin_lock_irq(vha->host->host_lock);
d97994dc 2524 fcport->drport = rport;
e315cd28 2525 spin_unlock_irq(vha->host->host_lock);
67becc00
AV		 2526 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2527 qla2xxx_wake_dpc(base_vha);
5f3a9a20 2528 } else
d97994dc 2529 fc_remote_port_delete(rport);
d97994dc 2530}
2531
1da177e4
LT		 2532/*
2533 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2534 *
2535 * Input: ha = adapter block pointer. fcport = port structure pointer.
2536 *
2537 * Return: None.
2538 *
2539 * Context:
2540 */
e315cd28 2541void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
d97994dc 2542 int do_login, int defer)
1da177e4 2543{
2c3dfe3f 2544 if (atomic_read(&fcport->state) == FCS_ONLINE &&
e315cd28
AC		 2545 vha->vp_idx == fcport->vp_idx) {
2546 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2547 qla2x00_schedule_rport_del(vha, fcport, defer);
2548 }
fa2a1ce5 2549 /*
1da177e4
LT		 2550 * We may need to retry the login, so don't change the state of the
2551 * port but do the retries.
2552 */
2553 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2554 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2555
2556 if (!do_login)
2557 return;
2558
2559 if (fcport->login_retry == 0) {
e315cd28
AC		 2560 fcport->login_retry = vha->hw->login_retry_count;
2561 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2562
2563 DEBUG(printk("scsi(%ld): Port login retry: "
2564 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2565 "id = 0x%04x retry cnt=%d\n",
e315cd28 2566 vha->host_no,
1da177e4
LT		 2567 fcport->port_name[0],
2568 fcport->port_name[1],
2569 fcport->port_name[2],
2570 fcport->port_name[3],
2571 fcport->port_name[4],
2572 fcport->port_name[5],
2573 fcport->port_name[6],
2574 fcport->port_name[7],
2575 fcport->loop_id,
2576 fcport->login_retry));
2577 }
2578}
2579
2580/*
2581 * qla2x00_mark_all_devices_lost
2582 * Updates fcport state when device goes offline.
2583 *
2584 * Input:
2585 * ha = adapter block pointer.
2586 * fcport = port structure pointer.
2587 *
2588 * Return:
2589 * None.
2590 *
2591 * Context:
2592 */
2593void
e315cd28 2594qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
1da177e4
LT		 2595{
2596 fc_port_t *fcport;
2597
e315cd28 2598 list_for_each_entry(fcport, &vha->vp_fcports, list) {
0d6e61bc 2599 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
1da177e4 2600 continue;
0d6e61bc 2601
1da177e4
LT		 2602 /*
2603 * No point in marking the device as lost, if the device is
2604 * already DEAD.
2605 */
2606 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2607 continue;
e315cd28 2608 if (atomic_read(&fcport->state) == FCS_ONLINE) {
38170fa8 2609 atomic_set(&fcport->state, FCS_DEVICE_LOST);
0d6e61bc
AV		 2610 if (defer)
2611 qla2x00_schedule_rport_del(vha, fcport, defer);
2612 else if (vha->vp_idx == fcport->vp_idx)
2613 qla2x00_schedule_rport_del(vha, fcport, defer);
2614 }
1da177e4
LT		 2615 }
2616}
2617
2618/*
2619* qla2x00_mem_alloc
2620* Allocates adapter memory.
2621*
2622* Returns:
2623* 0 = success.
e8711085 2624* !0 = failure.
1da177e4 2625*/
e8711085 2626static int
73208dfd
AC		 2627qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2628 struct req_que **req, struct rsp_que **rsp)
1da177e4
LT		 2629{
2630 char name[16];
1da177e4 2631
e8711085 2632 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
e315cd28 2633 &ha->init_cb_dma, GFP_KERNEL);
e8711085 2634 if (!ha->init_cb)
e315cd28 2635 goto fail;
e8711085 2636
e315cd28
AC		 2637 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2638 &ha->gid_list_dma, GFP_KERNEL);
2639 if (!ha->gid_list)
e8711085 2640 goto fail_free_init_cb;
1da177e4 2641
e8711085
AV		 2642 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2643 if (!ha->srb_mempool)
e315cd28 2644 goto fail_free_gid_list;
e8711085 2645
a9083016
GM		 2646 if (IS_QLA82XX(ha)) {
2647 /* Allocate cache for CT6 Ctx. */
2648 if (!ctx_cachep) {
2649 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2650 sizeof(struct ct6_dsd), 0,
2651 SLAB_HWCACHE_ALIGN, NULL);
2652 if (!ctx_cachep)
2653 goto fail_free_gid_list;
2654 }
2655 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2656 ctx_cachep);
2657 if (!ha->ctx_mempool)
2658 goto fail_free_srb_mempool;
2659 }
2660
e8711085
AV		 2661 /* Get memory for cached NVRAM */
2662 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2663 if (!ha->nvram)
a9083016 2664 goto fail_free_ctx_mempool;
e8711085 2665
e315cd28
AC		 2666 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2667 ha->pdev->device);
2668 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2669 DMA_POOL_SIZE, 8, 0);
2670 if (!ha->s_dma_pool)
2671 goto fail_free_nvram;
2672
bad75002 2673 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2674 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2675 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2676 if (!ha->dl_dma_pool) {
2677 qla_printk(KERN_WARNING, ha,
2678 "Memory Allocation failed - dl_dma_pool\n");
2679 goto fail_s_dma_pool;
2680 }
2681
2682 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2683 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2684 if (!ha->fcp_cmnd_dma_pool) {
2685 qla_printk(KERN_WARNING, ha,
2686 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2687 goto fail_dl_dma_pool;
2688 }
2689 }
2690
e8711085
AV		 2691 /* Allocate memory for SNS commands */
2692 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
e315cd28 2693 /* Get consistent memory allocated for SNS commands */
e8711085 2694 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2695 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
e8711085 2696 if (!ha->sns_cmd)
e315cd28 2697 goto fail_dma_pool;
e8711085 2698 } else {
e315cd28 2699 /* Get consistent memory allocated for MS IOCB */
e8711085 2700 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
e315cd28 2701 &ha->ms_iocb_dma);
e8711085 2702 if (!ha->ms_iocb)
e315cd28
AC		 2703 goto fail_dma_pool;
2704 /* Get consistent memory allocated for CT SNS commands */
e8711085 2705 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2706 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
e8711085
AV		 2707 if (!ha->ct_sns)
2708 goto fail_free_ms_iocb;
1da177e4
LT		 2709 }
2710
e315cd28 2711 /* Allocate memory for request ring */
73208dfd
AC		 2712 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2713 if (!*req) {
e315cd28
AC		 2714 DEBUG(printk("Unable to allocate memory for req\n"));
2715 goto fail_req;
2716 }
73208dfd
AC		 2717 (*req)->length = req_len;
2718 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2719 ((*req)->length + 1) * sizeof(request_t),
2720 &(*req)->dma, GFP_KERNEL);
2721 if (!(*req)->ring) {
e315cd28
AC		 2722 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2723 goto fail_req_ring;
2724 }
2725 /* Allocate memory for response ring */
73208dfd
AC		 2726 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2727 if (!*rsp) {
2728 qla_printk(KERN_WARNING, ha,
2729 "Unable to allocate memory for rsp\n");
e315cd28
AC		 2730 goto fail_rsp;
2731 }
73208dfd
AC		 2732 (*rsp)->hw = ha;
2733 (*rsp)->length = rsp_len;
2734 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2735 ((*rsp)->length + 1) * sizeof(response_t),
2736 &(*rsp)->dma, GFP_KERNEL);
2737 if (!(*rsp)->ring) {
2738 qla_printk(KERN_WARNING, ha,
2739 "Unable to allocate memory for rsp_ring\n");
e315cd28
AC		 2740 goto fail_rsp_ring;
2741 }
73208dfd
AC		 2742 (*req)->rsp = *rsp;
2743 (*rsp)->req = *req;
2744 /* Allocate memory for NVRAM data for vports */
2745 if (ha->nvram_npiv_size) {
2746 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2747 ha->nvram_npiv_size, GFP_KERNEL);
2748 if (!ha->npiv_info) {
2749 qla_printk(KERN_WARNING, ha,
2750 "Unable to allocate memory for npiv info\n");
2751 goto fail_npiv_info;
2752 }
2753 } else
2754 ha->npiv_info = NULL;
e8711085 2755
b64b0e8f 2756 /* Get consistent memory allocated for EX-INIT-CB. */
a9083016 2757 if (IS_QLA8XXX_TYPE(ha)) {
b64b0e8f
AV		 2758 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2759 &ha->ex_init_cb_dma);
2760 if (!ha->ex_init_cb)
2761 goto fail_ex_init_cb;
2762 }
2763
a9083016
GM		 2764 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2765
5ff1d584
AV		 2766 /* Get consistent memory allocated for Async Port-Database. */
2767 if (!IS_FWI2_CAPABLE(ha)) {
2768 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2769 &ha->async_pd_dma);
2770 if (!ha->async_pd)
2771 goto fail_async_pd;
2772 }
2773
e315cd28
AC		 2774 INIT_LIST_HEAD(&ha->vp_list);
2775 return 1;
2776
5ff1d584
AV		 2777fail_async_pd:
2778 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f
AV		 2779fail_ex_init_cb:
2780 kfree(ha->npiv_info);
73208dfd
AC		 2781fail_npiv_info:
2782 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2783 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2784 (*rsp)->ring = NULL;
2785 (*rsp)->dma = 0;
e315cd28 2786fail_rsp_ring:
73208dfd 2787 kfree(*rsp);
e315cd28 2788fail_rsp:
73208dfd
AC		 2789 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2790 sizeof(request_t), (*req)->ring, (*req)->dma);
2791 (*req)->ring = NULL;
2792 (*req)->dma = 0;
e315cd28 2793fail_req_ring:
73208dfd 2794 kfree(*req);
e315cd28
AC		 2795fail_req:
2796 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2797 ha->ct_sns, ha->ct_sns_dma);
2798 ha->ct_sns = NULL;
2799 ha->ct_sns_dma = 0;
e8711085
AV		 2800fail_free_ms_iocb:
2801 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2802 ha->ms_iocb = NULL;
2803 ha->ms_iocb_dma = 0;
e315cd28 2804fail_dma_pool:
bad75002 2805 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2806 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2807 ha->fcp_cmnd_dma_pool = NULL;
2808 }
2809fail_dl_dma_pool:
bad75002 2810 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2811 dma_pool_destroy(ha->dl_dma_pool);
2812 ha->dl_dma_pool = NULL;
2813 }
2814fail_s_dma_pool:
e315cd28
AC		 2815 dma_pool_destroy(ha->s_dma_pool);
2816 ha->s_dma_pool = NULL;
e8711085
AV		 2817fail_free_nvram:
2818 kfree(ha->nvram);
2819 ha->nvram = NULL;
a9083016
GM		 2820fail_free_ctx_mempool:
2821 mempool_destroy(ha->ctx_mempool);
2822 ha->ctx_mempool = NULL;
e8711085
AV		 2823fail_free_srb_mempool:
2824 mempool_destroy(ha->srb_mempool);
2825 ha->srb_mempool = NULL;
e8711085
AV		 2826fail_free_gid_list:
2827 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2828 ha->gid_list_dma);
e8711085
AV		 2829 ha->gid_list = NULL;
2830 ha->gid_list_dma = 0;
e315cd28
AC		 2831fail_free_init_cb:
2832 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2833 ha->init_cb_dma);
2834 ha->init_cb = NULL;
2835 ha->init_cb_dma = 0;
e8711085 2836fail:
e315cd28 2837 DEBUG(printk("%s: Memory allocation failure\n", __func__));
e8711085 2838 return -ENOMEM;
1da177e4
LT		 2839}
2840
2841/*
e30d1756
MI		 2842* qla2x00_free_fw_dump
2843* Frees fw dump stuff.
1da177e4
LT		 2844*
2845* Input:
e30d1756 2846* ha = adapter block pointer.
1da177e4 2847*/
a824ebb3 2848static void
e30d1756 2849qla2x00_free_fw_dump(struct qla_hw_data *ha)
1da177e4 2850{
df613b96
AV		 2851 if (ha->fce)
2852 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
e30d1756 2853 ha->fce_dma);
df613b96 2854
a7a167bf
AV		 2855 if (ha->fw_dump) {
2856 if (ha->eft)
2857 dma_free_coherent(&ha->pdev->dev,
e30d1756 2858 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
a7a167bf
AV		 2859 vfree(ha->fw_dump);
2860 }
e30d1756
MI		 2861 ha->fce = NULL;
2862 ha->fce_dma = 0;
2863 ha->eft = NULL;
2864 ha->eft_dma = 0;
2865 ha->fw_dump = NULL;
2866 ha->fw_dumped = 0;
2867 ha->fw_dump_reading = 0;
2868}
2869
2870/*
2871* qla2x00_mem_free
2872* Frees all adapter allocated memory.
2873*
2874* Input:
2875* ha = adapter block pointer.
2876*/
2877static void
2878qla2x00_mem_free(struct qla_hw_data *ha)
2879{
2880 qla2x00_free_fw_dump(ha);
2881
2882 if (ha->srb_mempool)
2883 mempool_destroy(ha->srb_mempool);
a7a167bf 2884
11bbc1d8
AV		 2885 if (ha->dcbx_tlv)
2886 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2887 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2888
ce0423f4
AV		 2889 if (ha->xgmac_data)
2890 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2891 ha->xgmac_data, ha->xgmac_data_dma);
2892
1da177e4
LT		 2893 if (ha->sns_cmd)
2894 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
e315cd28 2895 ha->sns_cmd, ha->sns_cmd_dma);
1da177e4
LT		 2896
2897 if (ha->ct_sns)
2898 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
e315cd28 2899 ha->ct_sns, ha->ct_sns_dma);
1da177e4 2900
88729e53
AV		 2901 if (ha->sfp_data)
2902 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2903
ad0ecd61
JC		 2904 if (ha->edc_data)
2905 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2906
1da177e4
LT		 2907 if (ha->ms_iocb)
2908 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2909
b64b0e8f 2910 if (ha->ex_init_cb)
a9083016
GM		 2911 dma_pool_free(ha->s_dma_pool,
2912 ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f 2913
5ff1d584
AV		 2914 if (ha->async_pd)
2915 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2916
1da177e4
LT		 2917 if (ha->s_dma_pool)
2918 dma_pool_destroy(ha->s_dma_pool);
2919
1da177e4
LT		 2920 if (ha->gid_list)
2921 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2922 ha->gid_list_dma);
1da177e4 2923
a9083016
GM		 2924 if (IS_QLA82XX(ha)) {
2925 if (!list_empty(&ha->gbl_dsd_list)) {
2926 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2927
2928 /* clean up allocated prev pool */
2929 list_for_each_entry_safe(dsd_ptr,
2930 tdsd_ptr, &ha->gbl_dsd_list, list) {
2931 dma_pool_free(ha->dl_dma_pool,
2932 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2933 list_del(&dsd_ptr->list);
2934 kfree(dsd_ptr);
2935 }
2936 }
2937 }
2938
2939 if (ha->dl_dma_pool)
2940 dma_pool_destroy(ha->dl_dma_pool);
2941
2942 if (ha->fcp_cmnd_dma_pool)
2943 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2944
2945 if (ha->ctx_mempool)
2946 mempool_destroy(ha->ctx_mempool);
2947
e315cd28
AC		 2948 if (ha->init_cb)
2949 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
a9083016 2950 ha->init_cb, ha->init_cb_dma);
e315cd28
AC		 2951 vfree(ha->optrom_buffer);
2952 kfree(ha->nvram);
73208dfd 2953 kfree(ha->npiv_info);
1da177e4 2954
e8711085 2955 ha->srb_mempool = NULL;
a9083016 2956 ha->ctx_mempool = NULL;
1da177e4
LT		 2957 ha->sns_cmd = NULL;
2958 ha->sns_cmd_dma = 0;
2959 ha->ct_sns = NULL;
2960 ha->ct_sns_dma = 0;
2961 ha->ms_iocb = NULL;
2962 ha->ms_iocb_dma = 0;
1da177e4
LT		 2963 ha->init_cb = NULL;
2964 ha->init_cb_dma = 0;
b64b0e8f
AV		 2965 ha->ex_init_cb = NULL;
2966 ha->ex_init_cb_dma = 0;
5ff1d584
AV		 2967 ha->async_pd = NULL;
2968 ha->async_pd_dma = 0;
1da177e4
LT		 2969
2970 ha->s_dma_pool = NULL;
a9083016
GM		 2971 ha->dl_dma_pool = NULL;
2972 ha->fcp_cmnd_dma_pool = NULL;
1da177e4 2973
1da177e4
LT		 2974 ha->gid_list = NULL;
2975 ha->gid_list_dma = 0;
e315cd28 2976}
1da177e4 2977
e315cd28
AC		 2978struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2979 struct qla_hw_data *ha)
2980{
2981 struct Scsi_Host *host;
2982 struct scsi_qla_host *vha = NULL;
854165f4 2983
e315cd28
AC		 2984 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2985 if (host == NULL) {
2986 printk(KERN_WARNING
2987 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2988 goto fail;
2989 }
2990
2991 /* Clear our data area */
2992 vha = shost_priv(host);
2993 memset(vha, 0, sizeof(scsi_qla_host_t));
2994
2995 vha->host = host;
2996 vha->host_no = host->host_no;
2997 vha->hw = ha;
2998
2999 INIT_LIST_HEAD(&vha->vp_fcports);
3000 INIT_LIST_HEAD(&vha->work_list);
3001 INIT_LIST_HEAD(&vha->list);
3002
f999f4c1
AV		 3003 spin_lock_init(&vha->work_lock);
3004
e315cd28
AC		 3005 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3006 return vha;
3007
3008fail:
3009 return vha;
1da177e4
LT		 3010}
3011
01ef66bb 3012static struct qla_work_evt *
f999f4c1 3013qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
0971de7f
AV		 3014{
3015 struct qla_work_evt *e;
feafb7b1
AE		 3016 uint8_t bail;
3017
3018 QLA_VHA_MARK_BUSY(vha, bail);
3019 if (bail)
3020 return NULL;
0971de7f 3021
f999f4c1 3022 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
feafb7b1
AE		 3023 if (!e) {
3024 QLA_VHA_MARK_NOT_BUSY(vha);
0971de7f 3025 return NULL;
feafb7b1 3026 }
0971de7f
AV		 3027
3028 INIT_LIST_HEAD(&e->list);
3029 e->type = type;
3030 e->flags = QLA_EVT_FLAG_FREE;
3031 return e;
3032}
3033
01ef66bb 3034static int
f999f4c1 3035qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
0971de7f 3036{
f999f4c1 3037 unsigned long flags;
0971de7f 3038
f999f4c1 3039 spin_lock_irqsave(&vha->work_lock, flags);
e315cd28 3040 list_add_tail(&e->list, &vha->work_list);
f999f4c1 3041 spin_unlock_irqrestore(&vha->work_lock, flags);
e315cd28 3042 qla2xxx_wake_dpc(vha);
f999f4c1 3043
0971de7f
AV		 3044 return QLA_SUCCESS;
3045}
3046
3047int
e315cd28 3048qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
0971de7f
AV		 3049 u32 data)
3050{
3051 struct qla_work_evt *e;
3052
f999f4c1 3053 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
0971de7f
AV		 3054 if (!e)
3055 return QLA_FUNCTION_FAILED;
3056
3057 e->u.aen.code = code;
3058 e->u.aen.data = data;
f999f4c1 3059 return qla2x00_post_work(vha, e);
0971de7f
AV		 3060}
3061
8a659571
AV		 3062int
3063qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3064{
3065 struct qla_work_evt *e;
3066
f999f4c1 3067 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
8a659571
AV		 3068 if (!e)
3069 return QLA_FUNCTION_FAILED;
3070
3071 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
f999f4c1 3072 return qla2x00_post_work(vha, e);
8a659571
AV		 3073}
3074
ac280b67
AV		 3075#define qla2x00_post_async_work(name, type) \
3076int qla2x00_post_async_##name##_work( \
3077 struct scsi_qla_host *vha, \
3078 fc_port_t *fcport, uint16_t *data) \
3079{ \
3080 struct qla_work_evt *e; \
3081 \
3082 e = qla2x00_alloc_work(vha, type); \
3083 if (!e) \
3084 return QLA_FUNCTION_FAILED; \
3085 \
3086 e->u.logio.fcport = fcport; \
3087 if (data) { \
3088 e->u.logio.data[0] = data[0]; \
3089 e->u.logio.data[1] = data[1]; \
3090 } \
3091 return qla2x00_post_work(vha, e); \
3092}
3093
3094qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3095qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3096qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3097qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
5ff1d584
AV		 3098qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3099qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
ac280b67 3100
3420d36c
AV		 3101int
3102qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3103{
3104 struct qla_work_evt *e;
3105
3106 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3107 if (!e)
3108 return QLA_FUNCTION_FAILED;
3109
3110 e->u.uevent.code = code;
3111 return qla2x00_post_work(vha, e);
3112}
3113
3114static void
3115qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3116{
3117 char event_string[40];
3118 char *envp[] = { event_string, NULL };
3119
3120 switch (code) {
3121 case QLA_UEVENT_CODE_FW_DUMP:
3122 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3123 vha->host_no);
3124 break;
3125 default:
3126 /* do nothing */
3127 break;
3128 }
3129 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3130}
3131
ac280b67 3132void
e315cd28 3133qla2x00_do_work(struct scsi_qla_host *vha)
0971de7f 3134{
f999f4c1
AV		 3135 struct qla_work_evt *e, *tmp;
3136 unsigned long flags;
3137 LIST_HEAD(work);
0971de7f 3138
f999f4c1
AV		 3139 spin_lock_irqsave(&vha->work_lock, flags);
3140 list_splice_init(&vha->work_list, &work);
3141 spin_unlock_irqrestore(&vha->work_lock, flags);
3142
3143 list_for_each_entry_safe(e, tmp, &work, list) {
0971de7f 3144 list_del_init(&e->list);
0971de7f
AV		 3145
3146 switch (e->type) {
3147 case QLA_EVT_AEN:
e315cd28 3148 fc_host_post_event(vha->host, fc_get_event_number(),
0971de7f
AV		 3149 e->u.aen.code, e->u.aen.data);
3150 break;
8a659571
AV		 3151 case QLA_EVT_IDC_ACK:
3152 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3153 break;
ac280b67
AV		 3154 case QLA_EVT_ASYNC_LOGIN:
3155 qla2x00_async_login(vha, e->u.logio.fcport,
3156 e->u.logio.data);
3157 break;
3158 case QLA_EVT_ASYNC_LOGIN_DONE:
3159 qla2x00_async_login_done(vha, e->u.logio.fcport,
3160 e->u.logio.data);
3161 break;
3162 case QLA_EVT_ASYNC_LOGOUT:
3163 qla2x00_async_logout(vha, e->u.logio.fcport);
3164 break;
3165 case QLA_EVT_ASYNC_LOGOUT_DONE:
3166 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3167 e->u.logio.data);
3168 break;
5ff1d584
AV		 3169 case QLA_EVT_ASYNC_ADISC:
3170 qla2x00_async_adisc(vha, e->u.logio.fcport,
3171 e->u.logio.data);
3172 break;
3173 case QLA_EVT_ASYNC_ADISC_DONE:
3174 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3175 e->u.logio.data);
3176 break;
3420d36c
AV		 3177 case QLA_EVT_UEVENT:
3178 qla2x00_uevent_emit(vha, e->u.uevent.code);
3179 break;
0971de7f
AV		 3180 }
3181 if (e->flags & QLA_EVT_FLAG_FREE)
3182 kfree(e);
feafb7b1
AE		 3183
3184 /* For each work completed decrement vha ref count */
3185 QLA_VHA_MARK_NOT_BUSY(vha);
e315cd28 3186 }
e315cd28 3187}
f999f4c1 3188
e315cd28
AC		 3189/* Relogins all the fcports of a vport
3190 * Context: dpc thread
3191 */
3192void qla2x00_relogin(struct scsi_qla_host *vha)
3193{
3194 fc_port_t *fcport;
c6b2fca8 3195 int status;
e315cd28
AC		 3196 uint16_t next_loopid = 0;
3197 struct qla_hw_data *ha = vha->hw;
ac280b67 3198 uint16_t data[2];
e315cd28
AC		 3199
3200 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3201 /*
3202 * If the port is not ONLINE then try to login
3203 * to it if we haven't run out of retries.
3204 */
5ff1d584
AV		 3205 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3206 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
ac280b67 3207 fcport->login_retry--;
e315cd28 3208 if (fcport->flags & FCF_FABRIC_DEVICE) {
f08b7251 3209 if (fcport->flags & FCF_FCP2_DEVICE)
e315cd28
AC		 3210 ha->isp_ops->fabric_logout(vha,
3211 fcport->loop_id,
3212 fcport->d_id.b.domain,
3213 fcport->d_id.b.area,
3214 fcport->d_id.b.al_pa);
3215
ac280b67 3216 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584 3217 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3218 data[0] = 0;
3219 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3220 status = qla2x00_post_async_login_work(
3221 vha, fcport, data);
3222 if (status == QLA_SUCCESS)
3223 continue;
3224 /* Attempt a retry. */
3225 status = 1;
3226 } else
3227 status = qla2x00_fabric_login(vha,
3228 fcport, &next_loopid);
e315cd28
AC		 3229 } else
3230 status = qla2x00_local_device_login(vha,
3231 fcport);
3232
e315cd28
AC		 3233 if (status == QLA_SUCCESS) {
3234 fcport->old_loop_id = fcport->loop_id;
3235
3236 DEBUG(printk("scsi(%ld): port login OK: logged "
3237 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3238
3239 qla2x00_update_fcport(vha, fcport);
3240
3241 } else if (status == 1) {
3242 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3243 /* retry the login again */
3244 DEBUG(printk("scsi(%ld): Retrying"
3245 " %d login again loop_id 0x%x\n",
3246 vha->host_no, fcport->login_retry,
3247 fcport->loop_id));
3248 } else {
3249 fcport->login_retry = 0;
3250 }
3251
3252 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3253 fcport->loop_id = FC_NO_LOOP_ID;
3254 }
3255 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3256 break;
0971de7f 3257 }
0971de7f
AV		 3258}
3259
1da177e4
LT		 3260/**************************************************************************
3261* qla2x00_do_dpc
3262* This kernel thread is a task that is schedule by the interrupt handler
3263* to perform the background processing for interrupts.
3264*
3265* Notes:
3266* This task always run in the context of a kernel thread. It
3267* is kick-off by the driver's detect code and starts up
3268* up one per adapter. It immediately goes to sleep and waits for
3269* some fibre event. When either the interrupt handler or
3270* the timer routine detects a event it will one of the task
3271* bits then wake us up.
3272**************************************************************************/
3273static int
3274qla2x00_do_dpc(void *data)
3275{
2c3dfe3f 3276 int rval;
e315cd28
AC		 3277 scsi_qla_host_t *base_vha;
3278 struct qla_hw_data *ha;
1da177e4 3279
e315cd28
AC		 3280 ha = (struct qla_hw_data *)data;
3281 base_vha = pci_get_drvdata(ha->pdev);
1da177e4 3282
1da177e4
LT		 3283 set_user_nice(current, -20);
3284
39a11240 3285 while (!kthread_should_stop()) {
1da177e4
LT		 3286 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3287
39a11240
CH		 3288 set_current_state(TASK_INTERRUPTIBLE);
3289 schedule();
3290 __set_current_state(TASK_RUNNING);
1da177e4
LT		 3291
3292 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3293
3294 /* Initialization not yet finished. Don't do anything yet. */
e315cd28 3295 if (!base_vha->flags.init_done)
1da177e4
LT		 3296 continue;
3297
85880801
AV		 3298 if (ha->flags.eeh_busy) {
3299 DEBUG17(qla_printk(KERN_WARNING, ha,
3300 "qla2x00_do_dpc: dpc_flags: %lx\n",
3301 base_vha->dpc_flags));
3302 continue;
3303 }
3304
e315cd28 3305 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
1da177e4
LT		 3306
3307 ha->dpc_active = 1;
3308
1da177e4 3309 if (ha->flags.mbox_busy) {
1da177e4
LT		 3310 ha->dpc_active = 0;
3311 continue;
3312 }
3313
e315cd28 3314 qla2x00_do_work(base_vha);
0971de7f 3315
a9083016
GM		 3316 if (IS_QLA82XX(ha)) {
3317 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3318 &base_vha->dpc_flags)) {
3319 qla82xx_idc_lock(ha);
3320 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3321 QLA82XX_DEV_FAILED);
3322 qla82xx_idc_unlock(ha);
3323 qla_printk(KERN_INFO, ha,
3324 "HW State: FAILED\n");
3325 qla82xx_device_state_handler(base_vha);
3326 continue;
3327 }
3328
3329 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3330 &base_vha->dpc_flags)) {
3331
3332 DEBUG(printk(KERN_INFO
3333 "scsi(%ld): dpc: sched "
3334 "qla82xx_fcoe_ctx_reset ha = %p\n",
3335 base_vha->host_no, ha));
3336 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3337 &base_vha->dpc_flags))) {
3338 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3339 /* FCoE-ctx reset failed.
3340 * Escalate to chip-reset
3341 */
3342 set_bit(ISP_ABORT_NEEDED,
3343 &base_vha->dpc_flags);
3344 }
3345 clear_bit(ABORT_ISP_ACTIVE,
3346 &base_vha->dpc_flags);
3347 }
3348
3349 DEBUG(printk("scsi(%ld): dpc:"
3350 " qla82xx_fcoe_ctx_reset end\n",
3351 base_vha->host_no));
3352 }
3353 }
3354
e315cd28
AC		 3355 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3356 &base_vha->dpc_flags)) {
1da177e4
LT		 3357
3358 DEBUG(printk("scsi(%ld): dpc: sched "
3359 "qla2x00_abort_isp ha = %p\n",
e315cd28 3360 base_vha->host_no, ha));
1da177e4 3361 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
e315cd28 3362 &base_vha->dpc_flags))) {
1da177e4 3363
a9083016 3364 if (ha->isp_ops->abort_isp(base_vha)) {
1da177e4
LT		 3365 /* failed. retry later */
3366 set_bit(ISP_ABORT_NEEDED,
e315cd28 3367 &base_vha->dpc_flags);
99363ef8 3368 }
e315cd28
AC		 3369 clear_bit(ABORT_ISP_ACTIVE,
3370 &base_vha->dpc_flags);
99363ef8
SJ		 3371 }
3372
1da177e4 3373 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
e315cd28 3374 base_vha->host_no));
1da177e4
LT		 3375 }
3376
e315cd28
AC		 3377 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3378 qla2x00_update_fcports(base_vha);
3379 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
c9c5ced9 3380 }
d97994dc 3381
579d12b5
SK		 3382 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
3383 DEBUG(printk(KERN_INFO "scsi(%ld): dpc: sched "
3384 "qla2x00_quiesce_needed ha = %p\n",
3385 base_vha->host_no, ha));
3386 qla82xx_device_state_handler(base_vha);
3387 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags);
3388 if (!ha->flags.quiesce_owner) {
3389 qla2x00_perform_loop_resync(base_vha);
3390
3391 qla82xx_idc_lock(ha);
3392 qla82xx_clear_qsnt_ready(base_vha);
3393 qla82xx_idc_unlock(ha);
3394 }
3395 }
3396
e315cd28
AC		 3397 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3398 &base_vha->dpc_flags) &&
3399 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
1da177e4
LT		 3400
3401 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
e315cd28 3402 base_vha->host_no));
1da177e4 3403
e315cd28
AC		 3404 qla2x00_rst_aen(base_vha);
3405 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
1da177e4
LT		 3406 }
3407
3408 /* Retry each device up to login retry count */
e315cd28
AC		 3409 if ((test_and_clear_bit(RELOGIN_NEEDED,
3410 &base_vha->dpc_flags)) &&
3411 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3412 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
1da177e4
LT		 3413
3414 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
e315cd28
AC		 3415 base_vha->host_no));
3416 qla2x00_relogin(base_vha);
3417
1da177e4 3418 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
e315cd28 3419 base_vha->host_no));
1da177e4
LT		 3420 }
3421
e315cd28
AC		 3422 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3423 &base_vha->dpc_flags)) {
1da177e4
LT		 3424
3425 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
e315cd28 3426 base_vha->host_no));
1da177e4
LT		 3427
3428 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
e315cd28 3429 &base_vha->dpc_flags))) {
1da177e4 3430
e315cd28 3431 rval = qla2x00_loop_resync(base_vha);
1da177e4 3432
e315cd28
AC		 3433 clear_bit(LOOP_RESYNC_ACTIVE,
3434 &base_vha->dpc_flags);
1da177e4
LT		 3435 }
3436
3437 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
e315cd28 3438 base_vha->host_no));
1da177e4
LT		 3439 }
3440
e315cd28
AC		 3441 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3442 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3443 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3444 qla2xxx_flash_npiv_conf(base_vha);
272976ca
AV		 3445 }
3446
1da177e4 3447 if (!ha->interrupts_on)
fd34f556 3448 ha->isp_ops->enable_intrs(ha);
1da177e4 3449
e315cd28
AC		 3450 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3451 &base_vha->dpc_flags))
3452 ha->isp_ops->beacon_blink(base_vha);
f6df144c 3453
e315cd28 3454 qla2x00_do_dpc_all_vps(base_vha);
2c3dfe3f 3455
1da177e4
LT		 3456 ha->dpc_active = 0;
3457 } /* End of while(1) */
3458
e315cd28 3459 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
1da177e4
LT		 3460
3461 /*
3462 * Make sure that nobody tries to wake us up again.
3463 */
1da177e4
LT		 3464 ha->dpc_active = 0;
3465
ac280b67
AV		 3466 /* Cleanup any residual CTX SRBs. */
3467 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3468
39a11240
CH		 3469 return 0;
3470}
3471
3472void
e315cd28 3473qla2xxx_wake_dpc(struct scsi_qla_host *vha)
39a11240 3474{
e315cd28 3475 struct qla_hw_data *ha = vha->hw;
c795c1e4
AV		 3476 struct task_struct *t = ha->dpc_thread;
3477
e315cd28 3478 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
c795c1e4 3479 wake_up_process(t);
1da177e4
LT		 3480}
3481
1da177e4
LT		 3482/*
3483* qla2x00_rst_aen
3484* Processes asynchronous reset.
3485*
3486* Input:
3487* ha = adapter block pointer.
3488*/
3489static void
e315cd28 3490qla2x00_rst_aen(scsi_qla_host_t *vha)
1da177e4 3491{
e315cd28
AC		 3492 if (vha->flags.online && !vha->flags.reset_active &&
3493 !atomic_read(&vha->loop_down_timer) &&
3494 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
1da177e4 3495 do {
e315cd28 3496 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3497
3498 /*
3499 * Issue marker command only when we are going to start
3500 * the I/O.
3501 */
e315cd28
AC		 3502 vha->marker_needed = 1;
3503 } while (!atomic_read(&vha->loop_down_timer) &&
3504 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
1da177e4
LT		 3505 }
3506}
3507
f4f051eb 3508static void
e315cd28 3509qla2x00_sp_free_dma(srb_t *sp)
f4f051eb 3510{
3511 struct scsi_cmnd *cmd = sp->cmd;
bad75002 3512 struct qla_hw_data *ha = sp->fcport->vha->hw;
f4f051eb 3513
3514 if (sp->flags & SRB_DMA_VALID) {
385d70b4 3515 scsi_dma_unmap(cmd);
f4f051eb 3516 sp->flags &= ~SRB_DMA_VALID;
3517 }
bad75002
AE		 3518
3519 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3520 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3521 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3522 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3523 }
3524
3525 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3526 /* List assured to be having elements */
3527 qla2x00_clean_dsd_pool(ha, sp);
3528 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3529 }
3530
3531 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3532 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3533 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3534 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3535 }
3536
fca29703 3537 CMD_SP(cmd) = NULL;
f4f051eb 3538}
3539
3dbe756a 3540static void
083a469d 3541qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
f4f051eb 3542{
3543 struct scsi_cmnd *cmd = sp->cmd;
3544
e315cd28 3545 qla2x00_sp_free_dma(sp);
f4f051eb 3546
a9083016
GM		 3547 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3548 struct ct6_dsd *ctx = sp->ctx;
3549 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3550 ctx->fcp_cmnd_dma);
3551 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3552 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3553 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3554 mempool_free(sp->ctx, ha->ctx_mempool);
3555 sp->ctx = NULL;
3556 }
f4f051eb 3557
a9083016 3558 mempool_free(sp, ha->srb_mempool);
f4f051eb 3559 cmd->scsi_done(cmd);
3560}
bdf79621 3561
083a469d
GM		 3562void
3563qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3564{
3565 if (atomic_read(&sp->ref_count) == 0) {
3566 DEBUG2(qla_printk(KERN_WARNING, ha,
3567 "SP reference-count to ZERO -- sp=%p\n", sp));
3568 DEBUG2(BUG());
3569 return;
3570 }
3571 if (!atomic_dec_and_test(&sp->ref_count))
3572 return;
3573 qla2x00_sp_final_compl(ha, sp);
3574}
3575
1da177e4
LT		 3576/**************************************************************************
3577* qla2x00_timer
3578*
3579* Description:
3580* One second timer
3581*
3582* Context: Interrupt
3583***************************************************************************/
2c3dfe3f 3584void
e315cd28 3585qla2x00_timer(scsi_qla_host_t *vha)
1da177e4 3586{
1da177e4 3587 unsigned long cpu_flags = 0;
1da177e4
LT		 3588 int start_dpc = 0;
3589 int index;
3590 srb_t *sp;
85880801 3591 uint16_t w;
e315cd28 3592 struct qla_hw_data *ha = vha->hw;
73208dfd 3593 struct req_que *req;
85880801 3594
a5b36321
LC		 3595 if (ha->flags.eeh_busy) {
3596 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3597 return;
3598 }
3599
85880801
AV		 3600 /* Hardware read to raise pending EEH errors during mailbox waits. */
3601 if (!pci_channel_offline(ha->pdev))
3602 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
1da177e4 3603
579d12b5
SK		 3604 if (IS_QLA82XX(ha)) {
3605 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
3606 start_dpc++;
3607 qla82xx_watchdog(vha);
3608 }
3609
1da177e4 3610 /* Loop down handler. */
e315cd28
AC		 3611 if (atomic_read(&vha->loop_down_timer) > 0 &&
3612 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
3613 && vha->flags.online) {
1da177e4 3614
e315cd28
AC		 3615 if (atomic_read(&vha->loop_down_timer) ==
3616 vha->loop_down_abort_time) {
1da177e4
LT		 3617
3618 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3619 "queues before time expire\n",
e315cd28 3620 vha->host_no));
1da177e4 3621
e315cd28
AC		 3622 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3623 atomic_set(&vha->loop_state, LOOP_DEAD);
1da177e4 3624
f08b7251
AV		 3625 /*
3626 * Schedule an ISP abort to return any FCP2-device
3627 * commands.
3628 */
2c3dfe3f 3629 /* NPIV - scan physical port only */
e315cd28 3630 if (!vha->vp_idx) {
2c3dfe3f
SJ		 3631 spin_lock_irqsave(&ha->hardware_lock,
3632 cpu_flags);
73208dfd 3633 req = ha->req_q_map[0];
2c3dfe3f
SJ		 3634 for (index = 1;
3635 index < MAX_OUTSTANDING_COMMANDS;
3636 index++) {
3637 fc_port_t *sfcp;
3638
e315cd28 3639 sp = req->outstanding_cmds[index];
2c3dfe3f
SJ		 3640 if (!sp)
3641 continue;
bad75002 3642 if (sp->ctx && !IS_PROT_IO(sp))
cf53b069 3643 continue;
2c3dfe3f 3644 sfcp = sp->fcport;
f08b7251 3645 if (!(sfcp->flags & FCF_FCP2_DEVICE))
2c3dfe3f 3646 continue;
bdf79621 3647
2c3dfe3f 3648 set_bit(ISP_ABORT_NEEDED,
e315cd28 3649 &vha->dpc_flags);
2c3dfe3f
SJ		 3650 break;
3651 }
3652 spin_unlock_irqrestore(&ha->hardware_lock,
e315cd28 3653 cpu_flags);
1da177e4 3654 }
1da177e4
LT		 3655 start_dpc++;
3656 }
3657
3658 /* if the loop has been down for 4 minutes, reinit adapter */
e315cd28 3659 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
0d6e61bc 3660 if (!(vha->device_flags & DFLG_NO_CABLE)) {
1da177e4
LT		 3661 DEBUG(printk("scsi(%ld): Loop down - "
3662 "aborting ISP.\n",
e315cd28 3663 vha->host_no));
1da177e4
LT		 3664 qla_printk(KERN_WARNING, ha,
3665 "Loop down - aborting ISP.\n");
3666
e315cd28 3667 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3668 }
3669 }
fca29703 3670 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
e315cd28
AC		 3671 vha->host_no,
3672 atomic_read(&vha->loop_down_timer)));
1da177e4
LT		 3673 }
3674
f6df144c 3675 /* Check if beacon LED needs to be blinked */
3676 if (ha->beacon_blink_led == 1) {
e315cd28 3677 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
f6df144c 3678 start_dpc++;
3679 }
3680
550bf57d 3681 /* Process any deferred work. */
e315cd28 3682 if (!list_empty(&vha->work_list))
550bf57d
AV		 3683 start_dpc++;
3684
1da177e4 3685 /* Schedule the DPC routine if needed */
e315cd28
AC		 3686 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3687 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3688 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
1da177e4 3689 start_dpc ||
e315cd28
AC		 3690 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3691 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
a9083016
GM		 3692 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3693 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
e315cd28
AC		 3694 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3695 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3696 qla2xxx_wake_dpc(vha);
1da177e4 3697
e315cd28 3698 qla2x00_restart_timer(vha, WATCH_INTERVAL);
1da177e4
LT		 3699}
3700
5433383e
AV		 3701/* Firmware interface routines. */
3702
a9083016 3703#define FW_BLOBS 8
5433383e
AV		 3704#define FW_ISP21XX 0
3705#define FW_ISP22XX 1
3706#define FW_ISP2300 2
3707#define FW_ISP2322 3
48c02fde 3708#define FW_ISP24XX 4
c3a2f0df 3709#define FW_ISP25XX 5
3a03eb79 3710#define FW_ISP81XX 6
a9083016 3711#define FW_ISP82XX 7
5433383e 3712
bb8ee499
AV		 3713#define FW_FILE_ISP21XX "ql2100_fw.bin"
3714#define FW_FILE_ISP22XX "ql2200_fw.bin"
3715#define FW_FILE_ISP2300 "ql2300_fw.bin"
3716#define FW_FILE_ISP2322 "ql2322_fw.bin"
3717#define FW_FILE_ISP24XX "ql2400_fw.bin"
c3a2f0df 3718#define FW_FILE_ISP25XX "ql2500_fw.bin"
3a03eb79 3719#define FW_FILE_ISP81XX "ql8100_fw.bin"
a9083016 3720#define FW_FILE_ISP82XX "ql8200_fw.bin"
bb8ee499 3721
e1e82b6f 3722static DEFINE_MUTEX(qla_fw_lock);
5433383e
AV		 3723
3724static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
bb8ee499
AV		 3725 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3726 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3727 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3728 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3729 { .name = FW_FILE_ISP24XX, },
c3a2f0df 3730 { .name = FW_FILE_ISP25XX, },
3a03eb79 3731 { .name = FW_FILE_ISP81XX, },
a9083016 3732 { .name = FW_FILE_ISP82XX, },
5433383e
AV		 3733};
3734
3735struct fw_blob *
e315cd28 3736qla2x00_request_firmware(scsi_qla_host_t *vha)
5433383e 3737{
e315cd28 3738 struct qla_hw_data *ha = vha->hw;
5433383e
AV		 3739 struct fw_blob *blob;
3740
3741 blob = NULL;
3742 if (IS_QLA2100(ha)) {
3743 blob = &qla_fw_blobs[FW_ISP21XX];
3744 } else if (IS_QLA2200(ha)) {
3745 blob = &qla_fw_blobs[FW_ISP22XX];
48c02fde 3746 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5433383e 3747 blob = &qla_fw_blobs[FW_ISP2300];
48c02fde 3748 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5433383e 3749 blob = &qla_fw_blobs[FW_ISP2322];
4d4df193 3750 } else if (IS_QLA24XX_TYPE(ha)) {
5433383e 3751 blob = &qla_fw_blobs[FW_ISP24XX];
c3a2f0df
AV		 3752 } else if (IS_QLA25XX(ha)) {
3753 blob = &qla_fw_blobs[FW_ISP25XX];
3a03eb79
AV		 3754 } else if (IS_QLA81XX(ha)) {
3755 blob = &qla_fw_blobs[FW_ISP81XX];
a9083016
GM		 3756 } else if (IS_QLA82XX(ha)) {
3757 blob = &qla_fw_blobs[FW_ISP82XX];
5433383e
AV		 3758 }
3759
e1e82b6f 3760 mutex_lock(&qla_fw_lock);
5433383e
AV		 3761 if (blob->fw)
3762 goto out;
3763
3764 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3765 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
e315cd28 3766 "(%s).\n", vha->host_no, blob->name));
5433383e
AV		 3767 blob->fw = NULL;
3768 blob = NULL;
3769 goto out;
3770 }
3771
3772out:
e1e82b6f 3773 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3774 return blob;
3775}
3776
3777static void
3778qla2x00_release_firmware(void)
3779{
3780 int idx;
3781
e1e82b6f 3782 mutex_lock(&qla_fw_lock);
5433383e
AV		 3783 for (idx = 0; idx < FW_BLOBS; idx++)
3784 if (qla_fw_blobs[idx].fw)
3785 release_firmware(qla_fw_blobs[idx].fw);
e1e82b6f 3786 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3787}
3788
14e660e6
SJ		 3789static pci_ers_result_t
3790qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3791{
85880801
AV		 3792 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3793 struct qla_hw_data *ha = vha->hw;
3794
3795 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3796 state));
b9b12f73 3797
14e660e6
SJ		 3798 switch (state) {
3799 case pci_channel_io_normal:
85880801 3800 ha->flags.eeh_busy = 0;
14e660e6
SJ		 3801 return PCI_ERS_RESULT_CAN_RECOVER;
3802 case pci_channel_io_frozen:
85880801 3803 ha->flags.eeh_busy = 1;
a5b36321
LC		 3804 /* For ISP82XX complete any pending mailbox cmd */
3805 if (IS_QLA82XX(ha)) {
3806 ha->flags.fw_hung = 1;
3807 if (ha->flags.mbox_busy) {
3808 ha->flags.mbox_int = 1;
3809 DEBUG2(qla_printk(KERN_ERR, ha,
3810 "Due to pci channel io frozen, doing premature "
3811 "completion of mbx command\n"));
3812 complete(&ha->mbx_intr_comp);
3813 }
3814 }
90a86fc0 3815 qla2x00_free_irqs(vha);
14e660e6 3816 pci_disable_device(pdev);
bddd2d65
LC		 3817 /* Return back all IOs */
3818 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
14e660e6
SJ		 3819 return PCI_ERS_RESULT_NEED_RESET;
3820 case pci_channel_io_perm_failure:
85880801
AV		 3821 ha->flags.pci_channel_io_perm_failure = 1;
3822 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
14e660e6
SJ		 3823 return PCI_ERS_RESULT_DISCONNECT;
3824 }
3825 return PCI_ERS_RESULT_NEED_RESET;
3826}
3827
3828static pci_ers_result_t
3829qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3830{
3831 int risc_paused = 0;
3832 uint32_t stat;
3833 unsigned long flags;
e315cd28
AC		 3834 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3835 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 3836 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3837 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3838
bcc5b6d3
SK		 3839 if (IS_QLA82XX(ha))
3840 return PCI_ERS_RESULT_RECOVERED;
3841
14e660e6
SJ		 3842 spin_lock_irqsave(&ha->hardware_lock, flags);
3843 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3844 stat = RD_REG_DWORD(&reg->hccr);
3845 if (stat & HCCR_RISC_PAUSE)
3846 risc_paused = 1;
3847 } else if (IS_QLA23XX(ha)) {
3848 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
3849 if (stat & HSR_RISC_PAUSED)
3850 risc_paused = 1;
3851 } else if (IS_FWI2_CAPABLE(ha)) {
3852 stat = RD_REG_DWORD(&reg24->host_status);
3853 if (stat & HSRX_RISC_PAUSED)
3854 risc_paused = 1;
3855 }
3856 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3857
3858 if (risc_paused) {
3859 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3860 "Dumping firmware!\n");
e315cd28 3861 ha->isp_ops->fw_dump(base_vha, 0);
14e660e6
SJ		 3862
3863 return PCI_ERS_RESULT_NEED_RESET;
3864 } else
3865 return PCI_ERS_RESULT_RECOVERED;
3866}
3867
a5b36321
LC		 3868uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
3869{
3870 uint32_t rval = QLA_FUNCTION_FAILED;
3871 uint32_t drv_active = 0;
3872 struct qla_hw_data *ha = base_vha->hw;
3873 int fn;
3874 struct pci_dev *other_pdev = NULL;
3875
3876 DEBUG17(qla_printk(KERN_INFO, ha,
3877 "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
3878
3879 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3880
3881 if (base_vha->flags.online) {
3882 /* Abort all outstanding commands,
3883 * so as to be requeued later */
3884 qla2x00_abort_isp_cleanup(base_vha);
3885 }
3886
3887
3888 fn = PCI_FUNC(ha->pdev->devfn);
3889 while (fn > 0) {
3890 fn--;
3891 DEBUG17(qla_printk(KERN_INFO, ha,
3892 "Finding pci device at function = 0x%x\n", fn));
3893 other_pdev =
3894 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
3895 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
3896 fn));
3897
3898 if (!other_pdev)
3899 continue;
3900 if (atomic_read(&other_pdev->enable_cnt)) {
3901 DEBUG17(qla_printk(KERN_INFO, ha,
3902 "Found PCI func availabe and enabled at 0x%x\n",
3903 fn));
3904 pci_dev_put(other_pdev);
3905 break;
3906 }
3907 pci_dev_put(other_pdev);
3908 }
3909
3910 if (!fn) {
3911 /* Reset owner */
3912 DEBUG17(qla_printk(KERN_INFO, ha,
3913 "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
3914 qla82xx_idc_lock(ha);
3915
3916 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3917 QLA82XX_DEV_INITIALIZING);
3918
3919 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
3920 QLA82XX_IDC_VERSION);
3921
3922 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
3923 DEBUG17(qla_printk(KERN_INFO, ha,
3924 "drv_active = 0x%x\n", drv_active));
3925
3926 qla82xx_idc_unlock(ha);
3927 /* Reset if device is not already reset
3928 * drv_active would be 0 if a reset has already been done
3929 */
3930 if (drv_active)
3931 rval = qla82xx_start_firmware(base_vha);
3932 else
3933 rval = QLA_SUCCESS;
3934 qla82xx_idc_lock(ha);
3935
3936 if (rval != QLA_SUCCESS) {
3937 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
3938 qla82xx_clear_drv_active(ha);
3939 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3940 QLA82XX_DEV_FAILED);
3941 } else {
3942 qla_printk(KERN_INFO, ha, "HW State: READY\n");
3943 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3944 QLA82XX_DEV_READY);
3945 qla82xx_idc_unlock(ha);
3946 ha->flags.fw_hung = 0;
3947 rval = qla82xx_restart_isp(base_vha);
3948 qla82xx_idc_lock(ha);
3949 /* Clear driver state register */
3950 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
3951 qla82xx_set_drv_active(base_vha);
3952 }
3953 qla82xx_idc_unlock(ha);
3954 } else {
3955 DEBUG17(qla_printk(KERN_INFO, ha,
3956 "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
3957 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
3958 QLA82XX_DEV_READY)) {
3959 ha->flags.fw_hung = 0;
3960 rval = qla82xx_restart_isp(base_vha);
3961 qla82xx_idc_lock(ha);
3962 qla82xx_set_drv_active(base_vha);
3963 qla82xx_idc_unlock(ha);
3964 }
3965 }
3966 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3967
3968 return rval;
3969}
3970
14e660e6
SJ		 3971static pci_ers_result_t
3972qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3973{
3974 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
e315cd28
AC		 3975 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3976 struct qla_hw_data *ha = base_vha->hw;
90a86fc0
JC		 3977 struct rsp_que *rsp;
3978 int rc, retries = 10;
09483916 3979
85880801
AV		 3980 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3981
90a86fc0
JC		 3982 /* Workaround: qla2xxx driver which access hardware earlier
3983 * needs error state to be pci_channel_io_online.
3984 * Otherwise mailbox command timesout.
3985 */
3986 pdev->error_state = pci_channel_io_normal;
3987
3988 pci_restore_state(pdev);
3989
8c1496bd
RL		 3990 /* pci_restore_state() clears the saved_state flag of the device
3991 * save restored state which resets saved_state flag
3992 */
3993 pci_save_state(pdev);
3994
09483916
BH		 3995 if (ha->mem_only)
3996 rc = pci_enable_device_mem(pdev);
3997 else
3998 rc = pci_enable_device(pdev);
14e660e6 3999
09483916 4000 if (rc) {
14e660e6
SJ		 4001 qla_printk(KERN_WARNING, ha,
4002 "Can't re-enable PCI device after reset.\n");
a5b36321 4003 goto exit_slot_reset;
14e660e6 4004 }
14e660e6 4005
90a86fc0
JC		 4006 rsp = ha->rsp_q_map[0];
4007 if (qla2x00_request_irqs(ha, rsp))
a5b36321 4008 goto exit_slot_reset;
90a86fc0 4009
e315cd28 4010 if (ha->isp_ops->pci_config(base_vha))
a5b36321
LC		 4011 goto exit_slot_reset;
4012
4013 if (IS_QLA82XX(ha)) {
4014 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4015 ret = PCI_ERS_RESULT_RECOVERED;
4016 goto exit_slot_reset;
4017 } else
4018 goto exit_slot_reset;
4019 }
14e660e6 4020
90a86fc0
JC		 4021 while (ha->flags.mbox_busy && retries--)
4022 msleep(1000);
85880801 4023
e315cd28 4024 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 4025 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
14e660e6 4026 ret = PCI_ERS_RESULT_RECOVERED;
e315cd28 4027 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
14e660e6 4028
90a86fc0 4029
a5b36321 4030exit_slot_reset:
85880801
AV		 4031 DEBUG17(qla_printk(KERN_WARNING, ha,
4032 "slot_reset-return:ret=%x\n", ret));
4033
14e660e6
SJ		 4034 return ret;
4035}
4036
4037static void
4038qla2xxx_pci_resume(struct pci_dev *pdev)
4039{
e315cd28
AC		 4040 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4041 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 4042 int ret;
4043
85880801
AV		 4044 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
4045
e315cd28 4046 ret = qla2x00_wait_for_hba_online(base_vha);
14e660e6
SJ		 4047 if (ret != QLA_SUCCESS) {
4048 qla_printk(KERN_ERR, ha,
4049 "the device failed to resume I/O "
4050 "from slot/link_reset");
4051 }
85880801 4052
3e46f031
LC		 4053 pci_cleanup_aer_uncorrect_error_status(pdev);
4054
85880801 4055 ha->flags.eeh_busy = 0;
14e660e6
SJ		 4056}
4057
4058static struct pci_error_handlers qla2xxx_err_handler = {
4059 .error_detected = qla2xxx_pci_error_detected,
4060 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4061 .slot_reset = qla2xxx_pci_slot_reset,
4062 .resume = qla2xxx_pci_resume,
4063};
4064
5433383e 4065static struct pci_device_id qla2xxx_pci_tbl[] = {
47f5e069
AV		 4066 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4067 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4068 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4069 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4070 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4071 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4072 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4073 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4074 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4d4df193 4075 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
47f5e069
AV		 4076 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4077 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
c3a2f0df 4078 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
3a03eb79 4079 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
a9083016 4080 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5433383e
AV		 4081 { 0 },
4082};
4083MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4084
fca29703 4085static struct pci_driver qla2xxx_pci_driver = {
cb63067a 4086 .name = QLA2XXX_DRIVER_NAME,
0a21ef1e
JB		 4087 .driver = {
4088 .owner = THIS_MODULE,
4089 },
fca29703 4090 .id_table = qla2xxx_pci_tbl,
7ee61397 4091 .probe = qla2x00_probe_one,
4c993f76 4092 .remove = qla2x00_remove_one,
e30d1756 4093 .shutdown = qla2x00_shutdown,
14e660e6 4094 .err_handler = &qla2xxx_err_handler,
fca29703
AV		 4095};
4096
6a03b4cd
HZ		 4097static struct file_operations apidev_fops = {
4098 .owner = THIS_MODULE,
6038f373 4099 .llseek = noop_llseek,
6a03b4cd
HZ		 4100};
4101
1da177e4
LT		 4102/**
4103 * qla2x00_module_init - Module initialization.
4104 **/
4105static int __init
4106qla2x00_module_init(void)
4107{
fca29703
AV		 4108 int ret = 0;
4109
1da177e4 4110 /* Allocate cache for SRBs. */
354d6b21 4111 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
20c2df83 4112 SLAB_HWCACHE_ALIGN, NULL);
1da177e4
LT		 4113 if (srb_cachep == NULL) {
4114 printk(KERN_ERR
4115 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
4116 return -ENOMEM;
4117 }
4118
4119 /* Derive version string. */
4120 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
11010fec 4121 if (ql2xextended_error_logging)
0181944f
AV		 4122 strcat(qla2x00_version_str, "-debug");
4123
1c97a12a
AV		 4124 qla2xxx_transport_template =
4125 fc_attach_transport(&qla2xxx_transport_functions);
2c3dfe3f
SJ		 4126 if (!qla2xxx_transport_template) {
4127 kmem_cache_destroy(srb_cachep);
1da177e4 4128 return -ENODEV;
2c3dfe3f 4129 }
6a03b4cd
HZ		 4130
4131 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4132 if (apidev_major < 0) {
4133 printk(KERN_WARNING "qla2xxx: Unable to register char device "
4134 "%s\n", QLA2XXX_APIDEV);
4135 }
4136
2c3dfe3f
SJ		 4137 qla2xxx_transport_vport_template =
4138 fc_attach_transport(&qla2xxx_transport_vport_functions);
4139 if (!qla2xxx_transport_vport_template) {
4140 kmem_cache_destroy(srb_cachep);
4141 fc_release_transport(qla2xxx_transport_template);
1da177e4 4142 return -ENODEV;
2c3dfe3f 4143 }
1da177e4 4144
fd9a29f0
AV		 4145 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
4146 qla2x00_version_str);
7ee61397 4147 ret = pci_register_driver(&qla2xxx_pci_driver);
fca29703
AV		 4148 if (ret) {
4149 kmem_cache_destroy(srb_cachep);
4150 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4151 fc_release_transport(qla2xxx_transport_vport_template);
fca29703
AV		 4152 }
4153 return ret;
1da177e4
LT		 4154}
4155
4156/**
4157 * qla2x00_module_exit - Module cleanup.
4158 **/
4159static void __exit
4160qla2x00_module_exit(void)
4161{
6a03b4cd 4162 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7ee61397 4163 pci_unregister_driver(&qla2xxx_pci_driver);
5433383e 4164 qla2x00_release_firmware();
354d6b21 4165 kmem_cache_destroy(srb_cachep);
a9083016
GM		 4166 if (ctx_cachep)
4167 kmem_cache_destroy(ctx_cachep);
1da177e4 4168 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4169 fc_release_transport(qla2xxx_transport_vport_template);
1da177e4
LT		 4170}
4171
4172module_init(qla2x00_module_init);
4173module_exit(qla2x00_module_exit);
4174
4175MODULE_AUTHOR("QLogic Corporation");
4176MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4177MODULE_LICENSE("GPL");
4178MODULE_VERSION(QLA2XXX_VERSION);
bb8ee499
AV		 4179MODULE_FIRMWARE(FW_FILE_ISP21XX);
4180MODULE_FIRMWARE(FW_FILE_ISP22XX);
4181MODULE_FIRMWARE(FW_FILE_ISP2300);
4182MODULE_FIRMWARE(FW_FILE_ISP2322);
4183MODULE_FIRMWARE(FW_FILE_ISP24XX);
61623fc3 4184MODULE_FIRMWARE(FW_FILE_ISP25XX);
Linux kernel - Deliverables
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