projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[SCSI] qla2xxx: Properly set the dsd_list_len for dsd_chaining in cmd type 6.
[deliverable/linux.git] / drivers / scsi / qla2xxx / qla_os.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
07e264b7 3 * Copyright (c) 2003-2011 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
1da177e4 11#include <linux/delay.h>
39a11240 12#include <linux/kthread.h>
e1e82b6f 13#include <linux/mutex.h>
3420d36c 14#include <linux/kobject.h>
5a0e3ad6 15#include <linux/slab.h>
1da177e4
LT		 16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22/*
23 * Driver version
24 */
25char qla2x00_version_str[40];
26
6a03b4cd
HZ		 27static int apidev_major;
28
1da177e4
LT		 29/*
30 * SRB allocation cache
31 */
e18b890b 32static struct kmem_cache *srb_cachep;
1da177e4 33
a9083016
GM		 34/*
35 * CT6 CTX allocation cache
36 */
37static struct kmem_cache *ctx_cachep;
38
1da177e4 39int ql2xlogintimeout = 20;
f2019cb1 40module_param(ql2xlogintimeout, int, S_IRUGO);
1da177e4
LT		 41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
a7b61842 44int qlport_down_retry;
f2019cb1 45module_param(qlport_down_retry, int, S_IRUGO);
1da177e4 46MODULE_PARM_DESC(qlport_down_retry,
900d9f98 47 "Maximum number of command retries to a port that returns "
1da177e4
LT		 48 "a PORT-DOWN status.");
49
1da177e4
LT		 50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
900d9f98 54 "a Fabric scan. This is needed for several broken switches. "
1da177e4
LT		 55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
1da177e4 57int ql2xloginretrycount = 0;
f2019cb1 58module_param(ql2xloginretrycount, int, S_IRUGO);
1da177e4
LT		 59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
a7a167bf 62int ql2xallocfwdump = 1;
f2019cb1 63module_param(ql2xallocfwdump, int, S_IRUGO);
a7a167bf
AV		 64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
11010fec 69int ql2xextended_error_logging;
27d94035 70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
11010fec 71MODULE_PARM_DESC(ql2xextended_error_logging,
0181944f
AV		 72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
a9083016 75int ql2xshiftctondsd = 6;
f2019cb1 76module_param(ql2xshiftctondsd, int, S_IRUGO);
a9083016
GM		 77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
1da177e4
LT		 81static void qla2x00_free_device(scsi_qla_host_t *);
82
7e47e5ca 83int ql2xfdmienable=1;
f2019cb1 84module_param(ql2xfdmienable, int, S_IRUGO);
cca5335c 85MODULE_PARM_DESC(ql2xfdmienable,
7794a5af
FW		 86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
cca5335c 88
df7baa50
AV		 89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
bad75002
AE		 95/* Do not change the value of this after module load */
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
e5896bd5 108int ql2xiidmaenable=1;
f2019cb1 109module_param(ql2xiidmaenable, int, S_IRUGO);
e5896bd5
AV		 110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
73208dfd 114int ql2xmaxqueues = 1;
f2019cb1 115module_param(ql2xmaxqueues, int, S_IRUGO);
73208dfd
AC		 116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
ae68230c
JP		 118 "Default is 1 for single queue. Set it to number "
119 "of queues in MQ mode.");
68ca949c
AC		 120
121int ql2xmultique_tag;
f2019cb1 122module_param(ql2xmultique_tag, int, S_IRUGO);
68ca949c
AC		 123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
e337d907
AV		 127
128int ql2xfwloadbin;
f2019cb1 129module_param(ql2xfwloadbin, int, S_IRUGO);
e337d907
AV		 130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
ae97c91e 137int ql2xetsenable;
f2019cb1 138module_param(ql2xetsenable, int, S_IRUGO);
ae97c91e
AV		 139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
6907869d 143int ql2xdbwr = 1;
f2019cb1 144module_param(ql2xdbwr, int, S_IRUGO);
a9083016
GM		 145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
f4c496c1 150int ql2xtargetreset = 1;
f2019cb1 151module_param(ql2xtargetreset, int, S_IRUGO);
f4c496c1
GM		 152MODULE_PARM_DESC(ql2xtargetreset,
153 "Enable target reset."
154 "Default is 1 - use hw defaults.");
155
4da26e16 156int ql2xgffidenable;
f2019cb1 157module_param(ql2xgffidenable, int, S_IRUGO);
4da26e16
CD		 158MODULE_PARM_DESC(ql2xgffidenable,
159 "Enables GFF_ID checks of port type. "
160 "Default is 0 - Do not use GFF_ID information.");
a9083016 161
3822263e 162int ql2xasynctmfenable;
f2019cb1 163module_param(ql2xasynctmfenable, int, S_IRUGO);
3822263e
MI		 164MODULE_PARM_DESC(ql2xasynctmfenable,
165 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
166 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
ed0de87c
GM		 167
168int ql2xdontresethba;
169module_param(ql2xdontresethba, int, S_IRUGO);
170MODULE_PARM_DESC(ql2xdontresethba,
171 "Option to specify reset behaviour\n"
172 " 0 (Default) -- Reset on failure.\n"
173 " 1 -- Do not reset on failure.\n");
174
1da177e4 175/*
fa2a1ce5 176 * SCSI host template entry points
1da177e4
LT		 177 */
178static int qla2xxx_slave_configure(struct scsi_device * device);
f4f051eb 179static int qla2xxx_slave_alloc(struct scsi_device *);
1e99e33a
AV		 180static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
181static void qla2xxx_scan_start(struct Scsi_Host *);
f4f051eb 182static void qla2xxx_slave_destroy(struct scsi_device *);
f281233d 183static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
1da177e4
LT		 184static int qla2xxx_eh_abort(struct scsi_cmnd *);
185static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
523ec773 186static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
1da177e4
LT		 187static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
188static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
1da177e4 189
e881a172 190static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
ce7e4af7
AV		 191static int qla2x00_change_queue_type(struct scsi_device *, int);
192
a5326f86 193struct scsi_host_template qla2xxx_driver_template = {
1da177e4 194 .module = THIS_MODULE,
cb63067a 195 .name = QLA2XXX_DRIVER_NAME,
a5326f86 196 .queuecommand = qla2xxx_queuecommand,
fca29703
AV		 197
198 .eh_abort_handler = qla2xxx_eh_abort,
199 .eh_device_reset_handler = qla2xxx_eh_device_reset,
523ec773 200 .eh_target_reset_handler = qla2xxx_eh_target_reset,
fca29703
AV		 201 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
202 .eh_host_reset_handler = qla2xxx_eh_host_reset,
203
204 .slave_configure = qla2xxx_slave_configure,
205
206 .slave_alloc = qla2xxx_slave_alloc,
207 .slave_destroy = qla2xxx_slave_destroy,
ed677086
AV		 208 .scan_finished = qla2xxx_scan_finished,
209 .scan_start = qla2xxx_scan_start,
ce7e4af7
AV		 210 .change_queue_depth = qla2x00_change_queue_depth,
211 .change_queue_type = qla2x00_change_queue_type,
fca29703
AV		 212 .this_id = -1,
213 .cmd_per_lun = 3,
214 .use_clustering = ENABLE_CLUSTERING,
215 .sg_tablesize = SG_ALL,
216
217 .max_sectors = 0xFFFF,
afb046e2 218 .shost_attrs = qla2x00_host_attrs,
fca29703
AV		 219};
220
1da177e4 221static struct scsi_transport_template *qla2xxx_transport_template = NULL;
2c3dfe3f 222struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
1da177e4 223
1da177e4
LT		 224/* TODO Convert to inlines
225 *
226 * Timer routines
227 */
1da177e4 228
2c3dfe3f 229__inline__ void
e315cd28 230qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
1da177e4 231{
e315cd28
AC		 232 init_timer(&vha->timer);
233 vha->timer.expires = jiffies + interval * HZ;
234 vha->timer.data = (unsigned long)vha;
235 vha->timer.function = (void (*)(unsigned long))func;
236 add_timer(&vha->timer);
237 vha->timer_active = 1;
1da177e4
LT		 238}
239
240static inline void
e315cd28 241qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
1da177e4 242{
a9083016
GM		 243 /* Currently used for 82XX only. */
244 if (vha->device_flags & DFLG_DEV_FAILED)
245 return;
246
e315cd28 247 mod_timer(&vha->timer, jiffies + interval * HZ);
1da177e4
LT		 248}
249
a824ebb3 250static __inline__ void
e315cd28 251qla2x00_stop_timer(scsi_qla_host_t *vha)
1da177e4 252{
e315cd28
AC		 253 del_timer_sync(&vha->timer);
254 vha->timer_active = 0;
1da177e4
LT		 255}
256
1da177e4
LT		 257static int qla2x00_do_dpc(void *data);
258
259static void qla2x00_rst_aen(scsi_qla_host_t *);
260
73208dfd
AC		 261static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
262 struct req_que **, struct rsp_que **);
e30d1756 263static void qla2x00_free_fw_dump(struct qla_hw_data *);
e315cd28
AC		 264static void qla2x00_mem_free(struct qla_hw_data *);
265static void qla2x00_sp_free_dma(srb_t *);
1da177e4 266
1da177e4 267/* -------------------------------------------------------------------------- */
73208dfd
AC		 268static int qla2x00_alloc_queues(struct qla_hw_data *ha)
269{
2afa19a9 270 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
73208dfd
AC		 271 GFP_KERNEL);
272 if (!ha->req_q_map) {
273 qla_printk(KERN_WARNING, ha,
274 "Unable to allocate memory for request queue ptrs\n");
275 goto fail_req_map;
276 }
277
2afa19a9 278 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
73208dfd
AC		 279 GFP_KERNEL);
280 if (!ha->rsp_q_map) {
281 qla_printk(KERN_WARNING, ha,
282 "Unable to allocate memory for response queue ptrs\n");
283 goto fail_rsp_map;
284 }
285 set_bit(0, ha->rsp_qid_map);
286 set_bit(0, ha->req_qid_map);
287 return 1;
288
289fail_rsp_map:
290 kfree(ha->req_q_map);
291 ha->req_q_map = NULL;
292fail_req_map:
293 return -ENOMEM;
294}
295
2afa19a9 296static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
73208dfd 297{
73208dfd
AC		 298 if (req && req->ring)
299 dma_free_coherent(&ha->pdev->dev,
300 (req->length + 1) * sizeof(request_t),
301 req->ring, req->dma);
302
303 kfree(req);
304 req = NULL;
305}
306
2afa19a9
AC		 307static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
308{
309 if (rsp && rsp->ring)
310 dma_free_coherent(&ha->pdev->dev,
311 (rsp->length + 1) * sizeof(response_t),
312 rsp->ring, rsp->dma);
313
314 kfree(rsp);
315 rsp = NULL;
316}
317
73208dfd
AC		 318static void qla2x00_free_queues(struct qla_hw_data *ha)
319{
320 struct req_que *req;
321 struct rsp_que *rsp;
322 int cnt;
323
2afa19a9 324 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
73208dfd 325 req = ha->req_q_map[cnt];
2afa19a9 326 qla2x00_free_req_que(ha, req);
73208dfd 327 }
73208dfd
AC		 328 kfree(ha->req_q_map);
329 ha->req_q_map = NULL;
2afa19a9
AC		 330
331 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
332 rsp = ha->rsp_q_map[cnt];
333 qla2x00_free_rsp_que(ha, rsp);
334 }
335 kfree(ha->rsp_q_map);
336 ha->rsp_q_map = NULL;
73208dfd
AC		 337}
338
68ca949c
AC		 339static int qla25xx_setup_mode(struct scsi_qla_host *vha)
340{
341 uint16_t options = 0;
342 int ques, req, ret;
343 struct qla_hw_data *ha = vha->hw;
344
7163ea81
AC		 345 if (!(ha->fw_attributes & BIT_6)) {
346 qla_printk(KERN_INFO, ha,
347 "Firmware is not multi-queue capable\n");
348 goto fail;
349 }
68ca949c 350 if (ql2xmultique_tag) {
68ca949c
AC		 351 /* create a request queue for IO */
352 options |= BIT_7;
353 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
354 QLA_DEFAULT_QUE_QOS);
355 if (!req) {
356 qla_printk(KERN_WARNING, ha,
357 "Can't create request queue\n");
358 goto fail;
359 }
278274d5 360 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
68ca949c
AC		 361 vha->req = ha->req_q_map[req];
362 options |= BIT_1;
363 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
364 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
365 if (!ret) {
366 qla_printk(KERN_WARNING, ha,
367 "Response Queue create failed\n");
368 goto fail2;
369 }
370 }
7163ea81
AC		 371 ha->flags.cpu_affinity_enabled = 1;
372
68ca949c
AC		 373 DEBUG2(qla_printk(KERN_INFO, ha,
374 "CPU affinity mode enabled, no. of response"
375 " queues:%d, no. of request queues:%d\n",
376 ha->max_rsp_queues, ha->max_req_queues));
377 }
378 return 0;
379fail2:
380 qla25xx_delete_queues(vha);
7163ea81
AC		 381 destroy_workqueue(ha->wq);
382 ha->wq = NULL;
68ca949c
AC		 383fail:
384 ha->mqenable = 0;
7163ea81
AC		 385 kfree(ha->req_q_map);
386 kfree(ha->rsp_q_map);
387 ha->max_req_queues = ha->max_rsp_queues = 1;
68ca949c
AC		 388 return 1;
389}
390
1da177e4 391static char *
e315cd28 392qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
1da177e4 393{
e315cd28 394 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 395 static char *pci_bus_modes[] = {
396 "33", "66", "100", "133",
397 };
398 uint16_t pci_bus;
399
400 strcpy(str, "PCI");
401 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
402 if (pci_bus) {
403 strcat(str, "-X (");
404 strcat(str, pci_bus_modes[pci_bus]);
405 } else {
406 pci_bus = (ha->pci_attr & BIT_8) >> 8;
407 strcat(str, " (");
408 strcat(str, pci_bus_modes[pci_bus]);
409 }
410 strcat(str, " MHz)");
411
412 return (str);
413}
414
fca29703 415static char *
e315cd28 416qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
fca29703
AV		 417{
418 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
e315cd28 419 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 420 uint32_t pci_bus;
421 int pcie_reg;
422
423 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
424 if (pcie_reg) {
425 char lwstr[6];
426 uint16_t pcie_lstat, lspeed, lwidth;
427
428 pcie_reg += 0x12;
429 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
430 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
431 lwidth = (pcie_lstat &
432 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
433
434 strcpy(str, "PCIe (");
435 if (lspeed == 1)
c87a0d8c 436 strcat(str, "2.5GT/s ");
c3a2f0df 437 else if (lspeed == 2)
c87a0d8c 438 strcat(str, "5.0GT/s ");
fca29703
AV		 439 else
440 strcat(str, "<unknown> ");
441 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
442 strcat(str, lwstr);
443
444 return str;
445 }
446
447 strcpy(str, "PCI");
448 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
449 if (pci_bus == 0 || pci_bus == 8) {
450 strcat(str, " (");
451 strcat(str, pci_bus_modes[pci_bus >> 3]);
452 } else {
453 strcat(str, "-X ");
454 if (pci_bus & BIT_2)
455 strcat(str, "Mode 2");
456 else
457 strcat(str, "Mode 1");
458 strcat(str, " (");
459 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
460 }
461 strcat(str, " MHz)");
462
463 return str;
464}
465
e5f82ab8 466static char *
e315cd28 467qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
1da177e4
LT		 468{
469 char un_str[10];
e315cd28 470 struct qla_hw_data *ha = vha->hw;
fa2a1ce5 471
1da177e4
LT		 472 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
473 ha->fw_minor_version,
474 ha->fw_subminor_version);
475
476 if (ha->fw_attributes & BIT_9) {
477 strcat(str, "FLX");
478 return (str);
479 }
480
481 switch (ha->fw_attributes & 0xFF) {
482 case 0x7:
483 strcat(str, "EF");
484 break;
485 case 0x17:
486 strcat(str, "TP");
487 break;
488 case 0x37:
489 strcat(str, "IP");
490 break;
491 case 0x77:
492 strcat(str, "VI");
493 break;
494 default:
495 sprintf(un_str, "(%x)", ha->fw_attributes);
496 strcat(str, un_str);
497 break;
498 }
499 if (ha->fw_attributes & 0x100)
500 strcat(str, "X");
501
502 return (str);
503}
504
e5f82ab8 505static char *
e315cd28 506qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
fca29703 507{
e315cd28 508 struct qla_hw_data *ha = vha->hw;
f0883ac6 509
3a03eb79
AV		 510 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
511 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
fca29703 512 return str;
fca29703
AV		 513}
514
515static inline srb_t *
e315cd28 516qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
f5e3e40b 517 struct scsi_cmnd *cmd)
fca29703
AV		 518{
519 srb_t *sp;
e315cd28 520 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 521
522 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
523 if (!sp)
524 return sp;
525
083a469d 526 atomic_set(&sp->ref_count, 1);
fca29703
AV		 527 sp->fcport = fcport;
528 sp->cmd = cmd;
529 sp->flags = 0;
530 CMD_SP(cmd) = (void *)sp;
cf53b069 531 sp->ctx = NULL;
fca29703
AV		 532
533 return sp;
534}
535
1da177e4 536static int
f5e3e40b 537qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
fca29703 538{
e315cd28 539 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
fca29703 540 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
19a7b4ae 541 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
e315cd28
AC		 542 struct qla_hw_data *ha = vha->hw;
543 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
fca29703
AV		 544 srb_t *sp;
545 int rval;
546
85880801
AV		 547 if (ha->flags.eeh_busy) {
548 if (ha->flags.pci_channel_io_perm_failure)
b9b12f73 549 cmd->result = DID_NO_CONNECT << 16;
85880801
AV		 550 else
551 cmd->result = DID_REQUEUE << 16;
14e660e6
SJ		 552 goto qc24_fail_command;
553 }
554
19a7b4ae
JSEC		 555 rval = fc_remote_port_chkready(rport);
556 if (rval) {
557 cmd->result = rval;
fca29703
AV		 558 goto qc24_fail_command;
559 }
560
bad75002
AE		 561 if (!vha->flags.difdix_supported &&
562 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
563 DEBUG2(qla_printk(KERN_ERR, ha,
564 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
565 cmd->cmnd[0]));
566 cmd->result = DID_NO_CONNECT << 16;
567 goto qc24_fail_command;
568 }
fca29703
AV		 569 if (atomic_read(&fcport->state) != FCS_ONLINE) {
570 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
38170fa8 571 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
fca29703
AV		 572 cmd->result = DID_NO_CONNECT << 16;
573 goto qc24_fail_command;
574 }
7b594131 575 goto qc24_target_busy;
fca29703
AV		 576 }
577
f5e3e40b 578 sp = qla2x00_get_new_sp(base_vha, fcport, cmd);
fca29703 579 if (!sp)
f5e3e40b 580 goto qc24_host_busy;
fca29703 581
e315cd28 582 rval = ha->isp_ops->start_scsi(sp);
fca29703
AV		 583 if (rval != QLA_SUCCESS)
584 goto qc24_host_busy_free_sp;
585
fca29703
AV		 586 return 0;
587
588qc24_host_busy_free_sp:
e315cd28
AC		 589 qla2x00_sp_free_dma(sp);
590 mempool_free(sp, ha->srb_mempool);
fca29703 591
f5e3e40b 592qc24_host_busy:
fca29703
AV		 593 return SCSI_MLQUEUE_HOST_BUSY;
594
7b594131
MC		 595qc24_target_busy:
596 return SCSI_MLQUEUE_TARGET_BUSY;
597
fca29703 598qc24_fail_command:
f5e3e40b 599 cmd->scsi_done(cmd);
fca29703
AV		 600
601 return 0;
602}
603
1da177e4
LT		 604/*
605 * qla2x00_eh_wait_on_command
606 * Waits for the command to be returned by the Firmware for some
607 * max time.
608 *
609 * Input:
1da177e4 610 * cmd = Scsi Command to wait on.
1da177e4
LT		 611 *
612 * Return:
613 * Not Found : 0
614 * Found : 1
615 */
616static int
e315cd28 617qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1da177e4 618{
fe74c71f
AV		 619#define ABORT_POLLING_PERIOD 1000
620#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
f4f051eb 621 unsigned long wait_iter = ABORT_WAIT_ITER;
85880801
AV		 622 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
623 struct qla_hw_data *ha = vha->hw;
f4f051eb 624 int ret = QLA_SUCCESS;
1da177e4 625
85880801
AV		 626 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
627 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
628 return ret;
629 }
630
d970432c 631 while (CMD_SP(cmd) && wait_iter--) {
fe74c71f 632 msleep(ABORT_POLLING_PERIOD);
f4f051eb 633 }
634 if (CMD_SP(cmd))
635 ret = QLA_FUNCTION_FAILED;
1da177e4 636
f4f051eb 637 return ret;
1da177e4
LT		 638}
639
640/*
641 * qla2x00_wait_for_hba_online
fa2a1ce5 642 * Wait till the HBA is online after going through
1da177e4
LT		 643 * <= MAX_RETRIES_OF_ISP_ABORT or
644 * finally HBA is disabled ie marked offline
645 *
646 * Input:
647 * ha - pointer to host adapter structure
fa2a1ce5
AV		 648 *
649 * Note:
1da177e4
LT		 650 * Does context switching-Release SPIN_LOCK
651 * (if any) before calling this routine.
652 *
653 * Return:
654 * Success (Adapter is online) : 0
655 * Failed (Adapter is offline/disabled) : 1
656 */
854165f4 657int
e315cd28 658qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1da177e4 659{
fca29703
AV		 660 int return_status;
661 unsigned long wait_online;
e315cd28
AC		 662 struct qla_hw_data *ha = vha->hw;
663 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 664
fa2a1ce5 665 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
e315cd28
AC		 666 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
667 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
668 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
669 ha->dpc_active) && time_before(jiffies, wait_online)) {
1da177e4
LT		 670
671 msleep(1000);
672 }
e315cd28 673 if (base_vha->flags.online)
fa2a1ce5 674 return_status = QLA_SUCCESS;
1da177e4
LT		 675 else
676 return_status = QLA_FUNCTION_FAILED;
677
1da177e4
LT		 678 return (return_status);
679}
680
86fbee86
LC		 681/*
682 * qla2x00_wait_for_reset_ready
683 * Wait till the HBA is online after going through
684 * <= MAX_RETRIES_OF_ISP_ABORT or
685 * finally HBA is disabled ie marked offline or flash
686 * operations are in progress.
687 *
688 * Input:
689 * ha - pointer to host adapter structure
690 *
691 * Note:
692 * Does context switching-Release SPIN_LOCK
693 * (if any) before calling this routine.
694 *
695 * Return:
696 * Success (Adapter is online/no flash ops) : 0
697 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
698 */
3dbe756a 699static int
86fbee86
LC		 700qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
701{
702 int return_status;
703 unsigned long wait_online;
704 struct qla_hw_data *ha = vha->hw;
705 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
706
707 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
708 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
709 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
710 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
711 ha->optrom_state != QLA_SWAITING ||
712 ha->dpc_active) && time_before(jiffies, wait_online))
713 msleep(1000);
714
715 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
716 return_status = QLA_SUCCESS;
717 else
718 return_status = QLA_FUNCTION_FAILED;
719
720 DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
721
722 return return_status;
723}
724
2533cf67
LC		 725int
726qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
727{
728 int return_status;
729 unsigned long wait_reset;
730 struct qla_hw_data *ha = vha->hw;
731 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
732
733 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
734 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
735 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
736 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
737 ha->dpc_active) && time_before(jiffies, wait_reset)) {
738
739 msleep(1000);
740
741 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
742 ha->flags.chip_reset_done)
743 break;
744 }
745 if (ha->flags.chip_reset_done)
746 return_status = QLA_SUCCESS;
747 else
748 return_status = QLA_FUNCTION_FAILED;
749
750 return return_status;
751}
752
1da177e4
LT		 753/*
754 * qla2x00_wait_for_loop_ready
755 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
fa2a1ce5 756 * to be in LOOP_READY state.
1da177e4
LT		 757 * Input:
758 * ha - pointer to host adapter structure
fa2a1ce5
AV		 759 *
760 * Note:
1da177e4
LT		 761 * Does context switching-Release SPIN_LOCK
762 * (if any) before calling this routine.
fa2a1ce5 763 *
1da177e4
LT		 764 *
765 * Return:
766 * Success (LOOP_READY) : 0
767 * Failed (LOOP_NOT_READY) : 1
768 */
fa2a1ce5 769static inline int
e315cd28 770qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
1da177e4
LT		 771{
772 int return_status = QLA_SUCCESS;
773 unsigned long loop_timeout ;
e315cd28
AC		 774 struct qla_hw_data *ha = vha->hw;
775 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 776
777 /* wait for 5 min at the max for loop to be ready */
fa2a1ce5 778 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1da177e4 779
e315cd28
AC		 780 while ((!atomic_read(&base_vha->loop_down_timer) &&
781 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
782 atomic_read(&base_vha->loop_state) != LOOP_READY) {
783 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
57680080
RA		 784 return_status = QLA_FUNCTION_FAILED;
785 break;
786 }
1da177e4
LT		 787 msleep(1000);
788 if (time_after_eq(jiffies, loop_timeout)) {
789 return_status = QLA_FUNCTION_FAILED;
790 break;
791 }
792 }
fa2a1ce5 793 return (return_status);
1da177e4
LT		 794}
795
083a469d
GM		 796static void
797sp_get(struct srb *sp)
798{
799 atomic_inc(&sp->ref_count);
800}
801
1da177e4
LT		 802/**************************************************************************
803* qla2xxx_eh_abort
804*
805* Description:
806* The abort function will abort the specified command.
807*
808* Input:
809* cmd = Linux SCSI command packet to be aborted.
810*
811* Returns:
812* Either SUCCESS or FAILED.
813*
814* Note:
2ea00202 815* Only return FAILED if command not returned by firmware.
1da177e4 816**************************************************************************/
e5f82ab8 817static int
1da177e4
LT		 818qla2xxx_eh_abort(struct scsi_cmnd *cmd)
819{
e315cd28 820 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
f4f051eb 821 srb_t *sp;
4e98d3b8 822 int ret;
f4f051eb 823 unsigned int id, lun;
18e144d3 824 unsigned long flags;
2ea00202 825 int wait = 0;
e315cd28 826 struct qla_hw_data *ha = vha->hw;
1da177e4 827
f4f051eb 828 if (!CMD_SP(cmd))
2ea00202 829 return SUCCESS;
1da177e4 830
4e98d3b8
AV		 831 ret = fc_block_scsi_eh(cmd);
832 if (ret != 0)
833 return ret;
834 ret = SUCCESS;
835
f4f051eb 836 id = cmd->device->id;
837 lun = cmd->device->lun;
1da177e4 838
e315cd28 839 spin_lock_irqsave(&ha->hardware_lock, flags);
170babc3
MC		 840 sp = (srb_t *) CMD_SP(cmd);
841 if (!sp) {
842 spin_unlock_irqrestore(&ha->hardware_lock, flags);
843 return SUCCESS;
844 }
1da177e4 845
170babc3
MC		 846 DEBUG2(printk("%s(%ld): aborting sp %p from RISC.",
847 __func__, vha->host_no, sp));
17d98630 848
170babc3
MC		 849 /* Get a reference to the sp and drop the lock.*/
850 sp_get(sp);
083a469d 851
e315cd28 852 spin_unlock_irqrestore(&ha->hardware_lock, flags);
170babc3
MC		 853 if (ha->isp_ops->abort_command(sp)) {
854 DEBUG2(printk("%s(%ld): abort_command "
855 "mbx failed.\n", __func__, vha->host_no));
856 ret = FAILED;
857 } else {
858 DEBUG3(printk("%s(%ld): abort_command "
859 "mbx success.\n", __func__, vha->host_no));
860 wait = 1;
861 }
862 qla2x00_sp_compl(ha, sp);
1da177e4 863
f4f051eb 864 /* Wait for the command to be returned. */
2ea00202 865 if (wait) {
e315cd28 866 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
fa2a1ce5 867 qla_printk(KERN_ERR, ha,
09d1dc2a
MI		 868 "scsi(%ld:%d:%d): Abort handler timed out -- %x.\n",
869 vha->host_no, id, lun, ret);
2ea00202 870 ret = FAILED;
f4f051eb 871 }
1da177e4 872 }
1da177e4 873
fa2a1ce5 874 qla_printk(KERN_INFO, ha,
09d1dc2a
MI		 875 "scsi(%ld:%d:%d): Abort command issued -- %d %x.\n",
876 vha->host_no, id, lun, wait, ret);
1da177e4 877
f4f051eb 878 return ret;
879}
1da177e4 880
4d78c973 881int
e315cd28 882qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
4d78c973 883 unsigned int l, enum nexus_wait_type type)
f4f051eb 884{
17d98630 885 int cnt, match, status;
18e144d3 886 unsigned long flags;
e315cd28 887 struct qla_hw_data *ha = vha->hw;
73208dfd 888 struct req_que *req;
4d78c973 889 srb_t *sp;
1da177e4 890
523ec773 891 status = QLA_SUCCESS;
17d98630 892
e315cd28 893 spin_lock_irqsave(&ha->hardware_lock, flags);
67c2e93a 894 req = vha->req;
17d98630
AC		 895 for (cnt = 1; status == QLA_SUCCESS &&
896 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
897 sp = req->outstanding_cmds[cnt];
898 if (!sp)
523ec773 899 continue;
bad75002 900 if ((sp->ctx) && !IS_PROT_IO(sp))
cf53b069 901 continue;
17d98630
AC		 902 if (vha->vp_idx != sp->fcport->vha->vp_idx)
903 continue;
904 match = 0;
905 switch (type) {
906 case WAIT_HOST:
907 match = 1;
908 break;
909 case WAIT_TARGET:
910 match = sp->cmd->device->id == t;
911 break;
912 case WAIT_LUN:
913 match = (sp->cmd->device->id == t &&
914 sp->cmd->device->lun == l);
915 break;
73208dfd 916 }
17d98630
AC		 917 if (!match)
918 continue;
919
920 spin_unlock_irqrestore(&ha->hardware_lock, flags);
921 status = qla2x00_eh_wait_on_command(sp->cmd);
922 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 923 }
e315cd28 924 spin_unlock_irqrestore(&ha->hardware_lock, flags);
523ec773
AV		 925
926 return status;
1da177e4
LT		 927}
928
523ec773
AV		 929static char *reset_errors[] = {
930 "HBA not online",
931 "HBA not ready",
932 "Task management failed",
933 "Waiting for command completions",
934};
1da177e4 935
e5f82ab8 936static int
523ec773 937__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
2afa19a9 938 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1da177e4 939{
e315cd28 940 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 941 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
523ec773 942 int err;
1da177e4 943
b0328bee 944 if (!fcport)
523ec773 945 return FAILED;
1da177e4 946
4e98d3b8
AV		 947 err = fc_block_scsi_eh(cmd);
948 if (err != 0)
949 return err;
950
e315cd28
AC		 951 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
952 vha->host_no, cmd->device->id, cmd->device->lun, name);
1da177e4 953
523ec773 954 err = 0;
e315cd28 955 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
523ec773
AV		 956 goto eh_reset_failed;
957 err = 1;
e315cd28 958 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
523ec773
AV		 959 goto eh_reset_failed;
960 err = 2;
2afa19a9
AC		 961 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
962 != QLA_SUCCESS)
523ec773
AV		 963 goto eh_reset_failed;
964 err = 3;
e315cd28 965 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
4d78c973 966 cmd->device->lun, type) != QLA_SUCCESS)
523ec773
AV		 967 goto eh_reset_failed;
968
e315cd28
AC		 969 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
970 vha->host_no, cmd->device->id, cmd->device->lun, name);
523ec773
AV		 971
972 return SUCCESS;
973
4d78c973 974eh_reset_failed:
e315cd28
AC		 975 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
976 , vha->host_no, cmd->device->id, cmd->device->lun, name,
523ec773
AV		 977 reset_errors[err]);
978 return FAILED;
979}
1da177e4 980
523ec773
AV		 981static int
982qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
983{
e315cd28
AC		 984 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
985 struct qla_hw_data *ha = vha->hw;
1da177e4 986
523ec773
AV		 987 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
988 ha->isp_ops->lun_reset);
1da177e4
LT		 989}
990
1da177e4 991static int
523ec773 992qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1da177e4 993{
e315cd28
AC		 994 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
995 struct qla_hw_data *ha = vha->hw;
1da177e4 996
523ec773
AV		 997 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
998 ha->isp_ops->target_reset);
1da177e4
LT		 999}
1000
1da177e4
LT		 1001/**************************************************************************
1002* qla2xxx_eh_bus_reset
1003*
1004* Description:
1005* The bus reset function will reset the bus and abort any executing
1006* commands.
1007*
1008* Input:
1009* cmd = Linux SCSI command packet of the command that cause the
1010* bus reset.
1011*
1012* Returns:
1013* SUCCESS/FAILURE (defined as macro in scsi.h).
1014*
1015**************************************************************************/
e5f82ab8 1016static int
1da177e4
LT		 1017qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1018{
e315cd28 1019 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1020 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
2c3dfe3f 1021 int ret = FAILED;
f4f051eb 1022 unsigned int id, lun;
f4f051eb 1023
f4f051eb 1024 id = cmd->device->id;
1025 lun = cmd->device->lun;
1da177e4 1026
b0328bee 1027 if (!fcport)
f4f051eb 1028 return ret;
1da177e4 1029
4e98d3b8
AV		 1030 ret = fc_block_scsi_eh(cmd);
1031 if (ret != 0)
1032 return ret;
1033 ret = FAILED;
1034
e315cd28 1035 qla_printk(KERN_INFO, vha->hw,
749af3d5 1036 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1037
e315cd28 1038 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1da177e4 1039 DEBUG2(printk("%s failed:board disabled\n",__func__));
f4f051eb 1040 goto eh_bus_reset_done;
1da177e4
LT		 1041 }
1042
e315cd28
AC		 1043 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1044 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
f4f051eb 1045 ret = SUCCESS;
1da177e4 1046 }
f4f051eb 1047 if (ret == FAILED)
1048 goto eh_bus_reset_done;
1da177e4 1049
9a41a62b 1050 /* Flush outstanding commands. */
4d78c973 1051 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
523ec773 1052 QLA_SUCCESS)
9a41a62b 1053 ret = FAILED;
1da177e4 1054
f4f051eb 1055eh_bus_reset_done:
e315cd28 1056 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
25985edc 1057 (ret == FAILED) ? "failed" : "succeeded");
1da177e4 1058
f4f051eb 1059 return ret;
1da177e4
LT		 1060}
1061
1062/**************************************************************************
1063* qla2xxx_eh_host_reset
1064*
1065* Description:
1066* The reset function will reset the Adapter.
1067*
1068* Input:
1069* cmd = Linux SCSI command packet of the command that cause the
1070* adapter reset.
1071*
1072* Returns:
1073* Either SUCCESS or FAILED.
1074*
1075* Note:
1076**************************************************************************/
e5f82ab8 1077static int
1da177e4
LT		 1078qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1079{
e315cd28 1080 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1081 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
e315cd28 1082 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 1083 int ret = FAILED;
f4f051eb 1084 unsigned int id, lun;
e315cd28 1085 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 1086
f4f051eb 1087 id = cmd->device->id;
1088 lun = cmd->device->lun;
f4f051eb 1089
b0328bee 1090 if (!fcport)
f4f051eb 1091 return ret;
1da177e4 1092
4e98d3b8
AV		 1093 ret = fc_block_scsi_eh(cmd);
1094 if (ret != 0)
1095 return ret;
1096 ret = FAILED;
1097
1da177e4 1098 qla_printk(KERN_INFO, ha,
e315cd28 1099 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1100
86fbee86 1101 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
f4f051eb 1102 goto eh_host_reset_lock;
1da177e4
LT		 1103
1104 /*
1105 * Fixme-may be dpc thread is active and processing
fa2a1ce5 1106 * loop_resync,so wait a while for it to
1da177e4
LT		 1107 * be completed and then issue big hammer.Otherwise
1108 * it may cause I/O failure as big hammer marks the
1109 * devices as lost kicking of the port_down_timer
1110 * while dpc is stuck for the mailbox to complete.
1111 */
e315cd28
AC		 1112 qla2x00_wait_for_loop_ready(vha);
1113 if (vha != base_vha) {
1114 if (qla2x00_vp_abort_isp(vha))
f4f051eb 1115 goto eh_host_reset_lock;
e315cd28 1116 } else {
a9083016
GM		 1117 if (IS_QLA82XX(vha->hw)) {
1118 if (!qla82xx_fcoe_ctx_reset(vha)) {
1119 /* Ctx reset success */
1120 ret = SUCCESS;
1121 goto eh_host_reset_lock;
1122 }
1123 /* fall thru if ctx reset failed */
1124 }
68ca949c
AC		 1125 if (ha->wq)
1126 flush_workqueue(ha->wq);
1127
e315cd28 1128 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 1129 if (ha->isp_ops->abort_isp(base_vha)) {
e315cd28
AC		 1130 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1131 /* failed. schedule dpc to try */
1132 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1133
1134 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1135 goto eh_host_reset_lock;
1136 }
1137 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
fa2a1ce5 1138 }
1da177e4 1139
e315cd28 1140 /* Waiting for command to be returned to OS.*/
4d78c973 1141 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
e315cd28 1142 QLA_SUCCESS)
f4f051eb 1143 ret = SUCCESS;
1da177e4 1144
f4f051eb 1145eh_host_reset_lock:
f4f051eb 1146 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
25985edc 1147 (ret == FAILED) ? "failed" : "succeeded");
1da177e4 1148
f4f051eb 1149 return ret;
1150}
1da177e4
LT		 1151
1152/*
1153* qla2x00_loop_reset
1154* Issue loop reset.
1155*
1156* Input:
1157* ha = adapter block pointer.
1158*
1159* Returns:
1160* 0 = success
1161*/
a4722cf2 1162int
e315cd28 1163qla2x00_loop_reset(scsi_qla_host_t *vha)
1da177e4 1164{
0c8c39af 1165 int ret;
bdf79621 1166 struct fc_port *fcport;
e315cd28 1167 struct qla_hw_data *ha = vha->hw;
1da177e4 1168
f4c496c1 1169 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
55e5ed27
AV		 1170 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1171 if (fcport->port_type != FCT_TARGET)
1172 continue;
1173
1174 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1175 if (ret != QLA_SUCCESS) {
1176 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1177 "target_reset=%d d_id=%x.\n", __func__,
1178 vha->host_no, ret, fcport->d_id.b24));
1179 }
1180 }
1181 }
1182
a9083016 1183 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
e315cd28 1184 ret = qla2x00_full_login_lip(vha);
0c8c39af 1185 if (ret != QLA_SUCCESS) {
749af3d5 1186 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28 1187 "full_login_lip=%d.\n", __func__, vha->host_no,
0c8c39af 1188 ret));
749af3d5
AC		 1189 }
1190 atomic_set(&vha->loop_state, LOOP_DOWN);
1191 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1192 qla2x00_mark_all_devices_lost(vha, 0);
1193 qla2x00_wait_for_loop_ready(vha);
0c8c39af
AV		 1194 }
1195
0d6e61bc 1196 if (ha->flags.enable_lip_reset) {
e315cd28 1197 ret = qla2x00_lip_reset(vha);
0c8c39af 1198 if (ret != QLA_SUCCESS) {
749af3d5 1199 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28
AC		 1200 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1201 } else
1202 qla2x00_wait_for_loop_ready(vha);
1da177e4
LT		 1203 }
1204
1da177e4 1205 /* Issue marker command only when we are going to start the I/O */
e315cd28 1206 vha->marker_needed = 1;
1da177e4 1207
0c8c39af 1208 return QLA_SUCCESS;
1da177e4
LT		 1209}
1210
df4bf0bb 1211void
e315cd28 1212qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
df4bf0bb 1213{
73208dfd 1214 int que, cnt;
df4bf0bb
AV		 1215 unsigned long flags;
1216 srb_t *sp;
ac280b67 1217 struct srb_ctx *ctx;
e315cd28 1218 struct qla_hw_data *ha = vha->hw;
73208dfd 1219 struct req_que *req;
df4bf0bb
AV		 1220
1221 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 1222 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 1223 req = ha->req_q_map[que];
73208dfd
AC		 1224 if (!req)
1225 continue;
1226 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1227 sp = req->outstanding_cmds[cnt];
e612d465 1228 if (sp) {
73208dfd 1229 req->outstanding_cmds[cnt] = NULL;
a9083016 1230 if (!sp->ctx ||
bad75002
AE		 1231 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1232 IS_PROT_IO(sp)) {
ac280b67
AV		 1233 sp->cmd->result = res;
1234 qla2x00_sp_compl(ha, sp);
1235 } else {
1236 ctx = sp->ctx;
6c452a45
AV		 1237 if (ctx->type == SRB_LOGIN_CMD ||
1238 ctx->type == SRB_LOGOUT_CMD) {
4916392b 1239 ctx->u.iocb_cmd->free(sp);
db3ad7f8 1240 } else {
6c452a45 1241 struct fc_bsg_job *bsg_job =
4916392b 1242 ctx->u.bsg_job;
6c452a45
AV		 1243 if (bsg_job->request->msgcode
1244 == FC_BSG_HST_CT)
db3ad7f8 1245 kfree(sp->fcport);
6c452a45
AV		 1246 bsg_job->req->errors = 0;
1247 bsg_job->reply->result = res;
4916392b 1248 bsg_job->job_done(bsg_job);
db3ad7f8 1249 kfree(sp->ctx);
6c452a45 1250 mempool_free(sp,
4916392b 1251 ha->srb_mempool);
db3ad7f8 1252 }
ac280b67 1253 }
73208dfd 1254 }
df4bf0bb
AV		 1255 }
1256 }
1257 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1258}
1259
f4f051eb 1260static int
1261qla2xxx_slave_alloc(struct scsi_device *sdev)
1da177e4 1262{
bdf79621 1263 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1da177e4 1264
19a7b4ae 1265 if (!rport || fc_remote_port_chkready(rport))
f4f051eb 1266 return -ENXIO;
bdf79621 1267
19a7b4ae 1268 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1da177e4 1269
f4f051eb 1270 return 0;
1271}
1da177e4 1272
f4f051eb 1273static int
1274qla2xxx_slave_configure(struct scsi_device *sdev)
1275{
e315cd28 1276 scsi_qla_host_t *vha = shost_priv(sdev->host);
2afa19a9 1277 struct req_que *req = vha->req;
8482e118 1278
f4f051eb 1279 if (sdev->tagged_supported)
73208dfd 1280 scsi_activate_tcq(sdev, req->max_q_depth);
f4f051eb 1281 else
73208dfd 1282 scsi_deactivate_tcq(sdev, req->max_q_depth);
f4f051eb 1283 return 0;
1284}
1da177e4 1285
f4f051eb 1286static void
1287qla2xxx_slave_destroy(struct scsi_device *sdev)
1288{
1289 sdev->hostdata = NULL;
1da177e4
LT		 1290}
1291
c45dd305
GM		 1292static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1293{
1294 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1295
1296 if (!scsi_track_queue_full(sdev, qdepth))
1297 return;
1298
1299 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1300 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1301 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1302 sdev->queue_depth));
1303}
1304
1305static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1306{
1307 fc_port_t *fcport = sdev->hostdata;
1308 struct scsi_qla_host *vha = fcport->vha;
1309 struct qla_hw_data *ha = vha->hw;
1310 struct req_que *req = NULL;
1311
1312 req = vha->req;
1313 if (!req)
1314 return;
1315
1316 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1317 return;
1318
1319 if (sdev->ordered_tags)
1320 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1321 else
1322 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1323
1324 DEBUG2(qla_printk(KERN_INFO, ha,
1325 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1326 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1327 sdev->queue_depth));
1328}
1329
ce7e4af7 1330static int
e881a172 1331qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
ce7e4af7 1332{
c45dd305
GM		 1333 switch (reason) {
1334 case SCSI_QDEPTH_DEFAULT:
1335 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1336 break;
1337 case SCSI_QDEPTH_QFULL:
1338 qla2x00_handle_queue_full(sdev, qdepth);
1339 break;
1340 case SCSI_QDEPTH_RAMP_UP:
1341 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1342 break;
1343 default:
08002af2 1344 return -EOPNOTSUPP;
c45dd305 1345 }
e881a172 1346
ce7e4af7
AV		 1347 return sdev->queue_depth;
1348}
1349
1350static int
1351qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1352{
1353 if (sdev->tagged_supported) {
1354 scsi_set_tag_type(sdev, tag_type);
1355 if (tag_type)
1356 scsi_activate_tcq(sdev, sdev->queue_depth);
1357 else
1358 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1359 } else
1360 tag_type = 0;
1361
1362 return tag_type;
1363}
1364
1da177e4
LT		 1365/**
1366 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1367 * @ha: HA context
1368 *
1369 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1370 * supported addressing method.
1371 */
1372static void
53303c42 1373qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1da177e4 1374{
7524f9b9 1375 /* Assume a 32bit DMA mask. */
1da177e4 1376 ha->flags.enable_64bit_addressing = 0;
1da177e4 1377
6a35528a 1378 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
7524f9b9
AV		 1379 /* Any upper-dword bits set? */
1380 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
6a35528a 1381 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
7524f9b9 1382 /* Ok, a 64bit DMA mask is applicable. */
1da177e4 1383 ha->flags.enable_64bit_addressing = 1;
fd34f556
AV		 1384 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1385 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
7524f9b9 1386 return;
1da177e4 1387 }
1da177e4 1388 }
7524f9b9 1389
284901a9
YH		 1390 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1391 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1da177e4
LT		 1392}
1393
fd34f556 1394static void
e315cd28 1395qla2x00_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1396{
1397 unsigned long flags = 0;
1398 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1399
1400 spin_lock_irqsave(&ha->hardware_lock, flags);
1401 ha->interrupts_on = 1;
1402 /* enable risc and host interrupts */
1403 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1404 RD_REG_WORD(&reg->ictrl);
1405 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1406
1407}
1408
1409static void
e315cd28 1410qla2x00_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1411{
1412 unsigned long flags = 0;
1413 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1414
1415 spin_lock_irqsave(&ha->hardware_lock, flags);
1416 ha->interrupts_on = 0;
1417 /* disable risc and host interrupts */
1418 WRT_REG_WORD(&reg->ictrl, 0);
1419 RD_REG_WORD(&reg->ictrl);
1420 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1421}
1422
1423static void
e315cd28 1424qla24xx_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1425{
1426 unsigned long flags = 0;
1427 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1428
1429 spin_lock_irqsave(&ha->hardware_lock, flags);
1430 ha->interrupts_on = 1;
1431 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1432 RD_REG_DWORD(&reg->ictrl);
1433 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1434}
1435
1436static void
e315cd28 1437qla24xx_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1438{
1439 unsigned long flags = 0;
1440 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1441
124f85e6
AV		 1442 if (IS_NOPOLLING_TYPE(ha))
1443 return;
fd34f556
AV		 1444 spin_lock_irqsave(&ha->hardware_lock, flags);
1445 ha->interrupts_on = 0;
1446 WRT_REG_DWORD(&reg->ictrl, 0);
1447 RD_REG_DWORD(&reg->ictrl);
1448 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1449}
1450
1451static struct isp_operations qla2100_isp_ops = {
1452 .pci_config = qla2100_pci_config,
1453 .reset_chip = qla2x00_reset_chip,
1454 .chip_diag = qla2x00_chip_diag,
1455 .config_rings = qla2x00_config_rings,
1456 .reset_adapter = qla2x00_reset_adapter,
1457 .nvram_config = qla2x00_nvram_config,
1458 .update_fw_options = qla2x00_update_fw_options,
1459 .load_risc = qla2x00_load_risc,
1460 .pci_info_str = qla2x00_pci_info_str,
1461 .fw_version_str = qla2x00_fw_version_str,
1462 .intr_handler = qla2100_intr_handler,
1463 .enable_intrs = qla2x00_enable_intrs,
1464 .disable_intrs = qla2x00_disable_intrs,
1465 .abort_command = qla2x00_abort_command,
523ec773
AV		 1466 .target_reset = qla2x00_abort_target,
1467 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1468 .fabric_login = qla2x00_login_fabric,
1469 .fabric_logout = qla2x00_fabric_logout,
1470 .calc_req_entries = qla2x00_calc_iocbs_32,
1471 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1472 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1473 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1474 .read_nvram = qla2x00_read_nvram_data,
1475 .write_nvram = qla2x00_write_nvram_data,
1476 .fw_dump = qla2100_fw_dump,
1477 .beacon_on = NULL,
1478 .beacon_off = NULL,
1479 .beacon_blink = NULL,
1480 .read_optrom = qla2x00_read_optrom_data,
1481 .write_optrom = qla2x00_write_optrom_data,
1482 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1483 .start_scsi = qla2x00_start_scsi,
a9083016 1484 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1485};
1486
1487static struct isp_operations qla2300_isp_ops = {
1488 .pci_config = qla2300_pci_config,
1489 .reset_chip = qla2x00_reset_chip,
1490 .chip_diag = qla2x00_chip_diag,
1491 .config_rings = qla2x00_config_rings,
1492 .reset_adapter = qla2x00_reset_adapter,
1493 .nvram_config = qla2x00_nvram_config,
1494 .update_fw_options = qla2x00_update_fw_options,
1495 .load_risc = qla2x00_load_risc,
1496 .pci_info_str = qla2x00_pci_info_str,
1497 .fw_version_str = qla2x00_fw_version_str,
1498 .intr_handler = qla2300_intr_handler,
1499 .enable_intrs = qla2x00_enable_intrs,
1500 .disable_intrs = qla2x00_disable_intrs,
1501 .abort_command = qla2x00_abort_command,
523ec773
AV		 1502 .target_reset = qla2x00_abort_target,
1503 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1504 .fabric_login = qla2x00_login_fabric,
1505 .fabric_logout = qla2x00_fabric_logout,
1506 .calc_req_entries = qla2x00_calc_iocbs_32,
1507 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1508 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1509 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1510 .read_nvram = qla2x00_read_nvram_data,
1511 .write_nvram = qla2x00_write_nvram_data,
1512 .fw_dump = qla2300_fw_dump,
1513 .beacon_on = qla2x00_beacon_on,
1514 .beacon_off = qla2x00_beacon_off,
1515 .beacon_blink = qla2x00_beacon_blink,
1516 .read_optrom = qla2x00_read_optrom_data,
1517 .write_optrom = qla2x00_write_optrom_data,
1518 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1519 .start_scsi = qla2x00_start_scsi,
a9083016 1520 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1521};
1522
1523static struct isp_operations qla24xx_isp_ops = {
1524 .pci_config = qla24xx_pci_config,
1525 .reset_chip = qla24xx_reset_chip,
1526 .chip_diag = qla24xx_chip_diag,
1527 .config_rings = qla24xx_config_rings,
1528 .reset_adapter = qla24xx_reset_adapter,
1529 .nvram_config = qla24xx_nvram_config,
1530 .update_fw_options = qla24xx_update_fw_options,
1531 .load_risc = qla24xx_load_risc,
1532 .pci_info_str = qla24xx_pci_info_str,
1533 .fw_version_str = qla24xx_fw_version_str,
1534 .intr_handler = qla24xx_intr_handler,
1535 .enable_intrs = qla24xx_enable_intrs,
1536 .disable_intrs = qla24xx_disable_intrs,
1537 .abort_command = qla24xx_abort_command,
523ec773
AV		 1538 .target_reset = qla24xx_abort_target,
1539 .lun_reset = qla24xx_lun_reset,
fd34f556
AV		 1540 .fabric_login = qla24xx_login_fabric,
1541 .fabric_logout = qla24xx_fabric_logout,
1542 .calc_req_entries = NULL,
1543 .build_iocbs = NULL,
1544 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1545 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1546 .read_nvram = qla24xx_read_nvram_data,
1547 .write_nvram = qla24xx_write_nvram_data,
1548 .fw_dump = qla24xx_fw_dump,
1549 .beacon_on = qla24xx_beacon_on,
1550 .beacon_off = qla24xx_beacon_off,
1551 .beacon_blink = qla24xx_beacon_blink,
1552 .read_optrom = qla24xx_read_optrom_data,
1553 .write_optrom = qla24xx_write_optrom_data,
1554 .get_flash_version = qla24xx_get_flash_version,
e315cd28 1555 .start_scsi = qla24xx_start_scsi,
a9083016 1556 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1557};
1558
c3a2f0df
AV		 1559static struct isp_operations qla25xx_isp_ops = {
1560 .pci_config = qla25xx_pci_config,
1561 .reset_chip = qla24xx_reset_chip,
1562 .chip_diag = qla24xx_chip_diag,
1563 .config_rings = qla24xx_config_rings,
1564 .reset_adapter = qla24xx_reset_adapter,
1565 .nvram_config = qla24xx_nvram_config,
1566 .update_fw_options = qla24xx_update_fw_options,
1567 .load_risc = qla24xx_load_risc,
1568 .pci_info_str = qla24xx_pci_info_str,
1569 .fw_version_str = qla24xx_fw_version_str,
1570 .intr_handler = qla24xx_intr_handler,
1571 .enable_intrs = qla24xx_enable_intrs,
1572 .disable_intrs = qla24xx_disable_intrs,
1573 .abort_command = qla24xx_abort_command,
523ec773
AV		 1574 .target_reset = qla24xx_abort_target,
1575 .lun_reset = qla24xx_lun_reset,
c3a2f0df
AV		 1576 .fabric_login = qla24xx_login_fabric,
1577 .fabric_logout = qla24xx_fabric_logout,
1578 .calc_req_entries = NULL,
1579 .build_iocbs = NULL,
1580 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1581 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1582 .read_nvram = qla25xx_read_nvram_data,
1583 .write_nvram = qla25xx_write_nvram_data,
1584 .fw_dump = qla25xx_fw_dump,
1585 .beacon_on = qla24xx_beacon_on,
1586 .beacon_off = qla24xx_beacon_off,
1587 .beacon_blink = qla24xx_beacon_blink,
338c9161 1588 .read_optrom = qla25xx_read_optrom_data,
c3a2f0df
AV		 1589 .write_optrom = qla24xx_write_optrom_data,
1590 .get_flash_version = qla24xx_get_flash_version,
bad75002 1591 .start_scsi = qla24xx_dif_start_scsi,
a9083016 1592 .abort_isp = qla2x00_abort_isp,
c3a2f0df
AV		 1593};
1594
3a03eb79
AV		 1595static struct isp_operations qla81xx_isp_ops = {
1596 .pci_config = qla25xx_pci_config,
1597 .reset_chip = qla24xx_reset_chip,
1598 .chip_diag = qla24xx_chip_diag,
1599 .config_rings = qla24xx_config_rings,
1600 .reset_adapter = qla24xx_reset_adapter,
1601 .nvram_config = qla81xx_nvram_config,
1602 .update_fw_options = qla81xx_update_fw_options,
eaac30be 1603 .load_risc = qla81xx_load_risc,
3a03eb79
AV		 1604 .pci_info_str = qla24xx_pci_info_str,
1605 .fw_version_str = qla24xx_fw_version_str,
1606 .intr_handler = qla24xx_intr_handler,
1607 .enable_intrs = qla24xx_enable_intrs,
1608 .disable_intrs = qla24xx_disable_intrs,
1609 .abort_command = qla24xx_abort_command,
1610 .target_reset = qla24xx_abort_target,
1611 .lun_reset = qla24xx_lun_reset,
1612 .fabric_login = qla24xx_login_fabric,
1613 .fabric_logout = qla24xx_fabric_logout,
1614 .calc_req_entries = NULL,
1615 .build_iocbs = NULL,
1616 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1617 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
3d79038f
AV		 1618 .read_nvram = NULL,
1619 .write_nvram = NULL,
3a03eb79
AV		 1620 .fw_dump = qla81xx_fw_dump,
1621 .beacon_on = qla24xx_beacon_on,
1622 .beacon_off = qla24xx_beacon_off,
1623 .beacon_blink = qla24xx_beacon_blink,
1624 .read_optrom = qla25xx_read_optrom_data,
1625 .write_optrom = qla24xx_write_optrom_data,
1626 .get_flash_version = qla24xx_get_flash_version,
ba77ef53 1627 .start_scsi = qla24xx_dif_start_scsi,
a9083016
GM		 1628 .abort_isp = qla2x00_abort_isp,
1629};
1630
1631static struct isp_operations qla82xx_isp_ops = {
1632 .pci_config = qla82xx_pci_config,
1633 .reset_chip = qla82xx_reset_chip,
1634 .chip_diag = qla24xx_chip_diag,
1635 .config_rings = qla82xx_config_rings,
1636 .reset_adapter = qla24xx_reset_adapter,
1637 .nvram_config = qla81xx_nvram_config,
1638 .update_fw_options = qla24xx_update_fw_options,
1639 .load_risc = qla82xx_load_risc,
1640 .pci_info_str = qla82xx_pci_info_str,
1641 .fw_version_str = qla24xx_fw_version_str,
1642 .intr_handler = qla82xx_intr_handler,
1643 .enable_intrs = qla82xx_enable_intrs,
1644 .disable_intrs = qla82xx_disable_intrs,
1645 .abort_command = qla24xx_abort_command,
1646 .target_reset = qla24xx_abort_target,
1647 .lun_reset = qla24xx_lun_reset,
1648 .fabric_login = qla24xx_login_fabric,
1649 .fabric_logout = qla24xx_fabric_logout,
1650 .calc_req_entries = NULL,
1651 .build_iocbs = NULL,
1652 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1653 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1654 .read_nvram = qla24xx_read_nvram_data,
1655 .write_nvram = qla24xx_write_nvram_data,
1656 .fw_dump = qla24xx_fw_dump,
1657 .beacon_on = qla24xx_beacon_on,
1658 .beacon_off = qla24xx_beacon_off,
1659 .beacon_blink = qla24xx_beacon_blink,
1660 .read_optrom = qla82xx_read_optrom_data,
1661 .write_optrom = qla82xx_write_optrom_data,
1662 .get_flash_version = qla24xx_get_flash_version,
1663 .start_scsi = qla82xx_start_scsi,
1664 .abort_isp = qla82xx_abort_isp,
3a03eb79
AV		 1665};
1666
ea5b6382 1667static inline void
e315cd28 1668qla2x00_set_isp_flags(struct qla_hw_data *ha)
ea5b6382 1669{
1670 ha->device_type = DT_EXTENDED_IDS;
1671 switch (ha->pdev->device) {
1672 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1673 ha->device_type |= DT_ISP2100;
1674 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1675 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1676 break;
1677 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1678 ha->device_type |= DT_ISP2200;
1679 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1680 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1681 break;
1682 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1683 ha->device_type |= DT_ISP2300;
4a59f71d 1684 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1685 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1686 break;
1687 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1688 ha->device_type |= DT_ISP2312;
4a59f71d 1689 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1690 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1691 break;
1692 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1693 ha->device_type |= DT_ISP2322;
4a59f71d 1694 ha->device_type |= DT_ZIO_SUPPORTED;
ea5b6382 1695 if (ha->pdev->subsystem_vendor == 0x1028 &&
1696 ha->pdev->subsystem_device == 0x0170)
1697 ha->device_type |= DT_OEM_001;
441d1072 1698 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1699 break;
1700 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1701 ha->device_type |= DT_ISP6312;
441d1072 1702 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1703 break;
1704 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1705 ha->device_type |= DT_ISP6322;
441d1072 1706 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1707 break;
1708 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1709 ha->device_type |= DT_ISP2422;
4a59f71d 1710 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1711 ha->device_type |= DT_FWI2;
c76f2c01 1712 ha->device_type |= DT_IIDMA;
441d1072 1713 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1714 break;
1715 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1716 ha->device_type |= DT_ISP2432;
4a59f71d 1717 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1718 ha->device_type |= DT_FWI2;
c76f2c01 1719 ha->device_type |= DT_IIDMA;
441d1072 1720 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1721 break;
4d4df193
HK		 1722 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1723 ha->device_type |= DT_ISP8432;
1724 ha->device_type |= DT_ZIO_SUPPORTED;
1725 ha->device_type |= DT_FWI2;
1726 ha->device_type |= DT_IIDMA;
1727 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1728 break;
044cc6c8 1729 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1730 ha->device_type |= DT_ISP5422;
e428924c 1731 ha->device_type |= DT_FWI2;
441d1072 1732 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1733 break;
044cc6c8 1734 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1735 ha->device_type |= DT_ISP5432;
e428924c 1736 ha->device_type |= DT_FWI2;
441d1072 1737 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1738 break;
c3a2f0df
AV		 1739 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1740 ha->device_type |= DT_ISP2532;
1741 ha->device_type |= DT_ZIO_SUPPORTED;
1742 ha->device_type |= DT_FWI2;
1743 ha->device_type |= DT_IIDMA;
441d1072 1744 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1745 break;
3a03eb79
AV		 1746 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1747 ha->device_type |= DT_ISP8001;
1748 ha->device_type |= DT_ZIO_SUPPORTED;
1749 ha->device_type |= DT_FWI2;
1750 ha->device_type |= DT_IIDMA;
1751 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1752 break;
a9083016
GM		 1753 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1754 ha->device_type |= DT_ISP8021;
1755 ha->device_type |= DT_ZIO_SUPPORTED;
1756 ha->device_type |= DT_FWI2;
1757 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1758 /* Initialize 82XX ISP flags */
1759 qla82xx_init_flags(ha);
1760 break;
ea5b6382 1761 }
e5b68a61 1762
a9083016
GM		 1763 if (IS_QLA82XX(ha))
1764 ha->port_no = !(ha->portnum & 1);
1765 else
1766 /* Get adapter physical port no from interrupt pin register. */
1767 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1768
e5b68a61
AC		 1769 if (ha->port_no & 1)
1770 ha->flags.port0 = 1;
1771 else
1772 ha->flags.port0 = 0;
ea5b6382 1773}
1774
1da177e4 1775static int
e315cd28 1776qla2x00_iospace_config(struct qla_hw_data *ha)
1da177e4 1777{
3776541d 1778 resource_size_t pio;
73208dfd 1779 uint16_t msix;
68ca949c 1780 int cpus;
1da177e4 1781
a9083016
GM		 1782 if (IS_QLA82XX(ha))
1783 return qla82xx_iospace_config(ha);
1784
285d0321
AV		 1785 if (pci_request_selected_regions(ha->pdev, ha->bars,
1786 QLA2XXX_DRIVER_NAME)) {
1787 qla_printk(KERN_WARNING, ha,
1788 "Failed to reserve PIO/MMIO regions (%s)\n",
1789 pci_name(ha->pdev));
1790
1791 goto iospace_error_exit;
1792 }
1793 if (!(ha->bars & 1))
1794 goto skip_pio;
1795
1da177e4
LT		 1796 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1797 pio = pci_resource_start(ha->pdev, 0);
3776541d
AV		 1798 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1799 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1da177e4
LT		 1800 qla_printk(KERN_WARNING, ha,
1801 "Invalid PCI I/O region size (%s)...\n",
1802 pci_name(ha->pdev));
1803 pio = 0;
1804 }
1805 } else {
1806 qla_printk(KERN_WARNING, ha,
1807 "region #0 not a PIO resource (%s)...\n",
1808 pci_name(ha->pdev));
1809 pio = 0;
1810 }
285d0321 1811 ha->pio_address = pio;
1da177e4 1812
285d0321 1813skip_pio:
1da177e4 1814 /* Use MMIO operations for all accesses. */
3776541d 1815 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1da177e4 1816 qla_printk(KERN_ERR, ha,
3776541d 1817 "region #1 not an MMIO resource (%s), aborting\n",
1da177e4
LT		 1818 pci_name(ha->pdev));
1819 goto iospace_error_exit;
1820 }
3776541d 1821 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1da177e4
LT		 1822 qla_printk(KERN_ERR, ha,
1823 "Invalid PCI mem region size (%s), aborting\n",
1824 pci_name(ha->pdev));
1825 goto iospace_error_exit;
1826 }
1827
3776541d 1828 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1da177e4
LT		 1829 if (!ha->iobase) {
1830 qla_printk(KERN_ERR, ha,
1831 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1832
1833 goto iospace_error_exit;
1834 }
1835
73208dfd 1836 /* Determine queue resources */
2afa19a9 1837 ha->max_req_queues = ha->max_rsp_queues = 1;
d84a47c2
MH		 1838 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1839 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
2afa19a9 1840 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
17d98630 1841 goto mqiobase_exit;
d84a47c2 1842
17d98630
AC		 1843 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1844 pci_resource_len(ha->pdev, 3));
1845 if (ha->mqiobase) {
1846 /* Read MSIX vector size of the board */
1847 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1848 ha->msix_count = msix;
68ca949c
AC		 1849 /* Max queues are bounded by available msix vectors */
1850 /* queue 0 uses two msix vectors */
1851 if (ql2xmultique_tag) {
1852 cpus = num_online_cpus();
27dc9c5a 1853 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
68ca949c
AC		 1854 (cpus + 1) : (ha->msix_count - 1);
1855 ha->max_req_queues = 2;
1856 } else if (ql2xmaxqueues > 1) {
2afa19a9
AC		 1857 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1858 QLA_MQ_SIZE : ql2xmaxqueues;
1859 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1860 " of request queues:%d\n", ha->max_req_queues));
1861 }
68ca949c
AC		 1862 qla_printk(KERN_INFO, ha,
1863 "MSI-X vector count: %d\n", msix);
2afa19a9
AC		 1864 } else
1865 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
17d98630
AC		 1866
1867mqiobase_exit:
2afa19a9 1868 ha->msix_count = ha->max_rsp_queues + 1;
1da177e4
LT		 1869 return (0);
1870
1871iospace_error_exit:
1872 return (-ENOMEM);
1873}
1874
1e99e33a
AV		 1875static void
1876qla2xxx_scan_start(struct Scsi_Host *shost)
1877{
e315cd28 1878 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1879
cbc8eb67
AV		 1880 if (vha->hw->flags.running_gold_fw)
1881 return;
1882
e315cd28
AC		 1883 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1884 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1885 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1886 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1e99e33a
AV		 1887}
1888
1889static int
1890qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1891{
e315cd28 1892 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1893
e315cd28 1894 if (!vha->host)
1e99e33a 1895 return 1;
e315cd28 1896 if (time > vha->hw->loop_reset_delay * HZ)
1e99e33a
AV		 1897 return 1;
1898
e315cd28 1899 return atomic_read(&vha->loop_state) == LOOP_READY;
1e99e33a
AV		 1900}
1901
1da177e4
LT		 1902/*
1903 * PCI driver interface
1904 */
7ee61397
AV		 1905static int __devinit
1906qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4 1907{
a1541d5a 1908 int ret = -ENODEV;
1da177e4 1909 struct Scsi_Host *host;
e315cd28
AC		 1910 scsi_qla_host_t *base_vha = NULL;
1911 struct qla_hw_data *ha;
29856e28 1912 char pci_info[30];
1da177e4 1913 char fw_str[30];
5433383e 1914 struct scsi_host_template *sht;
c51da4ec 1915 int bars, max_id, mem_only = 0;
e315cd28 1916 uint16_t req_length = 0, rsp_length = 0;
73208dfd
AC		 1917 struct req_que *req = NULL;
1918 struct rsp_que *rsp = NULL;
1da177e4 1919
285d0321 1920 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
a5326f86 1921 sht = &qla2xxx_driver_template;
5433383e 1922 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
8bc69e7d 1923 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
4d4df193 1924 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
8bc69e7d 1925 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
c3a2f0df 1926 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
3a03eb79 1927 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
a9083016
GM		 1928 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1929 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
285d0321 1930 bars = pci_select_bars(pdev, IORESOURCE_MEM);
09483916 1931 mem_only = 1;
285d0321
AV		 1932 }
1933
09483916
BH		 1934 if (mem_only) {
1935 if (pci_enable_device_mem(pdev))
1936 goto probe_out;
1937 } else {
1938 if (pci_enable_device(pdev))
1939 goto probe_out;
1940 }
285d0321 1941
0927678f
JB		 1942 /* This may fail but that's ok */
1943 pci_enable_pcie_error_reporting(pdev);
285d0321 1944
e315cd28
AC		 1945 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1946 if (!ha) {
1947 DEBUG(printk("Unable to allocate memory for ha\n"));
1948 goto probe_out;
1da177e4 1949 }
e315cd28 1950 ha->pdev = pdev;
1da177e4
LT		 1951
1952 /* Clear our data area */
285d0321 1953 ha->bars = bars;
09483916 1954 ha->mem_only = mem_only;
df4bf0bb 1955 spin_lock_init(&ha->hardware_lock);
339aa70e 1956 spin_lock_init(&ha->vport_slock);
1da177e4 1957
ea5b6382 1958 /* Set ISP-type information. */
1959 qla2x00_set_isp_flags(ha);
ca79cf66
DG		 1960
1961 /* Set EEH reset type to fundamental if required by hba */
1962 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1963 pdev->needs_freset = 1;
ca79cf66
DG		 1964 }
1965
1da177e4
LT		 1966 /* Configure PCI I/O space */
1967 ret = qla2x00_iospace_config(ha);
a1541d5a 1968 if (ret)
e315cd28 1969 goto probe_hw_failed;
1da177e4 1970
1da177e4 1971 qla_printk(KERN_INFO, ha,
5433383e
AV		 1972 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1973 ha->iobase);
1da177e4 1974
1da177e4 1975 ha->prev_topology = 0;
fca29703 1976 ha->init_cb_size = sizeof(init_cb_t);
d8b45213 1977 ha->link_data_rate = PORT_SPEED_UNKNOWN;
854165f4 1978 ha->optrom_size = OPTROM_SIZE_2300;
1da177e4 1979
abbd8870 1980 /* Assign ISP specific operations. */
e315cd28 1981 max_id = MAX_TARGETS_2200;
1da177e4 1982 if (IS_QLA2100(ha)) {
e315cd28 1983 max_id = MAX_TARGETS_2100;
1da177e4 1984 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
e315cd28
AC		 1985 req_length = REQUEST_ENTRY_CNT_2100;
1986 rsp_length = RESPONSE_ENTRY_CNT_2100;
1987 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1988 ha->gid_list_info_size = 4;
3a03eb79
AV		 1989 ha->flash_conf_off = ~0;
1990 ha->flash_data_off = ~0;
1991 ha->nvram_conf_off = ~0;
1992 ha->nvram_data_off = ~0;
fd34f556 1993 ha->isp_ops = &qla2100_isp_ops;
1da177e4 1994 } else if (IS_QLA2200(ha)) {
1da177e4 1995 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1996 req_length = REQUEST_ENTRY_CNT_2200;
1997 rsp_length = RESPONSE_ENTRY_CNT_2100;
1998 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1999 ha->gid_list_info_size = 4;
3a03eb79
AV		 2000 ha->flash_conf_off = ~0;
2001 ha->flash_data_off = ~0;
2002 ha->nvram_conf_off = ~0;
2003 ha->nvram_data_off = ~0;
fd34f556 2004 ha->isp_ops = &qla2100_isp_ops;
fca29703 2005 } else if (IS_QLA23XX(ha)) {
1da177e4 2006 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2007 req_length = REQUEST_ENTRY_CNT_2200;
2008 rsp_length = RESPONSE_ENTRY_CNT_2300;
2009 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
abbd8870 2010 ha->gid_list_info_size = 6;
854165f4 2011 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2012 ha->optrom_size = OPTROM_SIZE_2322;
3a03eb79
AV		 2013 ha->flash_conf_off = ~0;
2014 ha->flash_data_off = ~0;
2015 ha->nvram_conf_off = ~0;
2016 ha->nvram_data_off = ~0;
fd34f556 2017 ha->isp_ops = &qla2300_isp_ops;
4d4df193 2018 } else if (IS_QLA24XX_TYPE(ha)) {
fca29703 2019 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2020 req_length = REQUEST_ENTRY_CNT_24XX;
2021 rsp_length = RESPONSE_ENTRY_CNT_2300;
2022 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2c3dfe3f 2023 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
fca29703 2024 ha->gid_list_info_size = 8;
854165f4 2025 ha->optrom_size = OPTROM_SIZE_24XX;
73208dfd 2026 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
fd34f556 2027 ha->isp_ops = &qla24xx_isp_ops;
3a03eb79
AV		 2028 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2029 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2030 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2031 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
c3a2f0df 2032 } else if (IS_QLA25XX(ha)) {
c3a2f0df 2033 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2034 req_length = REQUEST_ENTRY_CNT_24XX;
2035 rsp_length = RESPONSE_ENTRY_CNT_2300;
2036 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
c3a2f0df 2037 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
c3a2f0df
AV		 2038 ha->gid_list_info_size = 8;
2039 ha->optrom_size = OPTROM_SIZE_25XX;
73208dfd 2040 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
c3a2f0df 2041 ha->isp_ops = &qla25xx_isp_ops;
3a03eb79
AV		 2042 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2043 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2044 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2045 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2046 } else if (IS_QLA81XX(ha)) {
2047 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2048 req_length = REQUEST_ENTRY_CNT_24XX;
2049 rsp_length = RESPONSE_ENTRY_CNT_2300;
2050 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2051 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2052 ha->gid_list_info_size = 8;
2053 ha->optrom_size = OPTROM_SIZE_81XX;
40859ae5 2054 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3a03eb79
AV		 2055 ha->isp_ops = &qla81xx_isp_ops;
2056 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2057 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2058 ha->nvram_conf_off = ~0;
2059 ha->nvram_data_off = ~0;
a9083016
GM		 2060 } else if (IS_QLA82XX(ha)) {
2061 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2062 req_length = REQUEST_ENTRY_CNT_82XX;
2063 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2064 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2065 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2066 ha->gid_list_info_size = 8;
2067 ha->optrom_size = OPTROM_SIZE_82XX;
087c621e 2068 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
a9083016
GM		 2069 ha->isp_ops = &qla82xx_isp_ops;
2070 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2071 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2072 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2073 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
1da177e4 2074 }
1da177e4 2075
6c2f527c 2076 mutex_init(&ha->vport_lock);
0b05a1f0
MB		 2077 init_completion(&ha->mbx_cmd_comp);
2078 complete(&ha->mbx_cmd_comp);
2079 init_completion(&ha->mbx_intr_comp);
23f2ebd1 2080 init_completion(&ha->dcbx_comp);
1da177e4 2081
2c3dfe3f 2082 set_bit(0, (unsigned long *) ha->vp_idx_map);
1da177e4 2083
53303c42 2084 qla2x00_config_dma_addressing(ha);
73208dfd 2085 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
e315cd28 2086 if (!ret) {
1da177e4
LT		 2087 qla_printk(KERN_WARNING, ha,
2088 "[ERROR] Failed to allocate memory for adapter\n");
2089
e315cd28
AC		 2090 goto probe_hw_failed;
2091 }
2092
73208dfd 2093 req->max_q_depth = MAX_Q_DEPTH;
e315cd28 2094 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
73208dfd
AC		 2095 req->max_q_depth = ql2xmaxqdepth;
2096
e315cd28
AC		 2097
2098 base_vha = qla2x00_create_host(sht, ha);
2099 if (!base_vha) {
2100 qla_printk(KERN_WARNING, ha,
2101 "[ERROR] Failed to allocate memory for scsi_host\n");
2102
a1541d5a 2103 ret = -ENOMEM;
6e9f21f3 2104 qla2x00_mem_free(ha);
2afa19a9
AC		 2105 qla2x00_free_req_que(ha, req);
2106 qla2x00_free_rsp_que(ha, rsp);
e315cd28 2107 goto probe_hw_failed;
1da177e4
LT		 2108 }
2109
e315cd28
AC		 2110 pci_set_drvdata(pdev, base_vha);
2111
e315cd28 2112 host = base_vha->host;
2afa19a9 2113 base_vha->req = req;
73208dfd
AC		 2114 host->can_queue = req->length + 128;
2115 if (IS_QLA2XXX_MIDTYPE(ha))
e315cd28 2116 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
73208dfd 2117 else
e315cd28
AC		 2118 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2119 base_vha->vp_idx;
58548cb5
GM		 2120
2121 /* Set the SG table size based on ISP type */
2122 if (!IS_FWI2_CAPABLE(ha)) {
2123 if (IS_QLA2100(ha))
2124 host->sg_tablesize = 32;
2125 } else {
2126 if (!IS_QLA82XX(ha))
2127 host->sg_tablesize = QLA_SG_ALL;
2128 }
2129
e315cd28
AC		 2130 host->max_id = max_id;
2131 host->this_id = 255;
2132 host->cmd_per_lun = 3;
2133 host->unique_id = host->host_no;
0c470874
AE		 2134 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
2135 host->max_cmd_len = 32;
2136 else
2137 host->max_cmd_len = MAX_CMDSZ;
e315cd28
AC		 2138 host->max_channel = MAX_BUSES - 1;
2139 host->max_lun = MAX_LUNS;
2140 host->transportt = qla2xxx_transport_template;
9a069e19 2141 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
e315cd28 2142
73208dfd
AC		 2143 /* Set up the irqs */
2144 ret = qla2x00_request_irqs(ha, rsp);
2145 if (ret)
6e9f21f3 2146 goto probe_init_failed;
90a86fc0
JC		 2147
2148 pci_save_state(pdev);
2149
73208dfd 2150 /* Alloc arrays of request and response ring ptrs */
7163ea81 2151que_init:
73208dfd
AC		 2152 if (!qla2x00_alloc_queues(ha)) {
2153 qla_printk(KERN_WARNING, ha,
2154 "[ERROR] Failed to allocate memory for queue"
2155 " pointers\n");
6e9f21f3 2156 goto probe_init_failed;
73208dfd 2157 }
a9083016 2158
73208dfd
AC		 2159 ha->rsp_q_map[0] = rsp;
2160 ha->req_q_map[0] = req;
2afa19a9
AC		 2161 rsp->req = req;
2162 req->rsp = rsp;
2163 set_bit(0, ha->req_qid_map);
2164 set_bit(0, ha->rsp_qid_map);
08029990
AV		 2165 /* FWI2-capable only. */
2166 req->req_q_in = &ha->iobase->isp24.req_q_in;
2167 req->req_q_out = &ha->iobase->isp24.req_q_out;
2168 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2169 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
17d98630 2170 if (ha->mqenable) {
08029990
AV		 2171 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2172 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2173 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2174 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
17d98630
AC		 2175 }
2176
a9083016
GM		 2177 if (IS_QLA82XX(ha)) {
2178 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2179 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2180 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2181 }
2182
e315cd28 2183 if (qla2x00_initialize_adapter(base_vha)) {
1da177e4
LT		 2184 qla_printk(KERN_WARNING, ha,
2185 "Failed to initialize adapter\n");
2186
2187 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2188 "Adapter flags %x.\n",
e315cd28 2189 base_vha->host_no, base_vha->device_flags));
1da177e4 2190
a9083016
GM		 2191 if (IS_QLA82XX(ha)) {
2192 qla82xx_idc_lock(ha);
2193 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2194 QLA82XX_DEV_FAILED);
2195 qla82xx_idc_unlock(ha);
2196 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2197 }
2198
a1541d5a 2199 ret = -ENODEV;
1da177e4
LT		 2200 goto probe_failed;
2201 }
2202
7163ea81
AC		 2203 if (ha->mqenable) {
2204 if (qla25xx_setup_mode(base_vha)) {
68ca949c
AC		 2205 qla_printk(KERN_WARNING, ha,
2206 "Can't create queues, falling back to single"
2207 " queue mode\n");
7163ea81
AC		 2208 goto que_init;
2209 }
2210 }
68ca949c 2211
cbc8eb67
AV		 2212 if (ha->flags.running_gold_fw)
2213 goto skip_dpc;
2214
1da177e4
LT		 2215 /*
2216 * Startup the kernel thread for this host adapter
2217 */
39a11240 2218 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
e315cd28 2219 "%s_dpc", base_vha->host_str);
39a11240 2220 if (IS_ERR(ha->dpc_thread)) {
1da177e4
LT		 2221 qla_printk(KERN_WARNING, ha,
2222 "Unable to start DPC thread!\n");
39a11240 2223 ret = PTR_ERR(ha->dpc_thread);
1da177e4
LT		 2224 goto probe_failed;
2225 }
1da177e4 2226
cbc8eb67 2227skip_dpc:
e315cd28
AC		 2228 list_add_tail(&base_vha->list, &ha->vp_list);
2229 base_vha->host->irq = ha->pdev->irq;
1da177e4
LT		 2230
2231 /* Initialized the timer */
e315cd28 2232 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
1da177e4
LT		 2233
2234 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
e315cd28 2235 base_vha->host_no, ha));
d19044c3 2236
ba77ef53 2237 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
bad75002
AE		 2238 if (ha->fw_attributes & BIT_4) {
2239 base_vha->flags.difdix_supported = 1;
2240 DEBUG18(qla_printk(KERN_INFO, ha,
2241 "Registering for DIF/DIX type 1 and 3"
2242 " protection.\n"));
2243 scsi_host_set_prot(host,
2244 SHOST_DIF_TYPE1_PROTECTION
0c470874 2245 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE		 2246 | SHOST_DIF_TYPE3_PROTECTION
2247 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2248 | SHOST_DIX_TYPE2_PROTECTION
bad75002
AE		 2249 | SHOST_DIX_TYPE3_PROTECTION);
2250 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2251 } else
2252 base_vha->flags.difdix_supported = 0;
2253 }
2254
a9083016
GM		 2255 ha->isp_ops->enable_intrs(ha);
2256
a1541d5a
AV		 2257 ret = scsi_add_host(host, &pdev->dev);
2258 if (ret)
2259 goto probe_failed;
2260
1486400f
MR		 2261 base_vha->flags.init_done = 1;
2262 base_vha->flags.online = 1;
2263
1e99e33a
AV		 2264 scsi_scan_host(host);
2265
e315cd28 2266 qla2x00_alloc_sysfs_attr(base_vha);
a1541d5a 2267
e315cd28 2268 qla2x00_init_host_attr(base_vha);
a1541d5a 2269
e315cd28 2270 qla2x00_dfs_setup(base_vha);
df613b96 2271
1da177e4
LT		 2272 qla_printk(KERN_INFO, ha, "\n"
2273 " QLogic Fibre Channel HBA Driver: %s\n"
2274 " QLogic %s - %s\n"
5433383e
AV		 2275 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2276 qla2x00_version_str, ha->model_number,
e315cd28
AC		 2277 ha->model_desc ? ha->model_desc : "", pdev->device,
2278 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2279 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2280 ha->isp_ops->fw_version_str(base_vha, fw_str));
1da177e4 2281
1da177e4
LT		 2282 return 0;
2283
6e9f21f3 2284probe_init_failed:
2afa19a9
AC		 2285 qla2x00_free_req_que(ha, req);
2286 qla2x00_free_rsp_que(ha, rsp);
2287 ha->max_req_queues = ha->max_rsp_queues = 0;
6e9f21f3 2288
1da177e4 2289probe_failed:
b9978769
AV		 2290 if (base_vha->timer_active)
2291 qla2x00_stop_timer(base_vha);
2292 base_vha->flags.online = 0;
2293 if (ha->dpc_thread) {
2294 struct task_struct *t = ha->dpc_thread;
2295
2296 ha->dpc_thread = NULL;
2297 kthread_stop(t);
2298 }
2299
e315cd28 2300 qla2x00_free_device(base_vha);
1da177e4 2301
e315cd28 2302 scsi_host_put(base_vha->host);
1da177e4 2303
e315cd28 2304probe_hw_failed:
a9083016
GM		 2305 if (IS_QLA82XX(ha)) {
2306 qla82xx_idc_lock(ha);
2307 qla82xx_clear_drv_active(ha);
2308 qla82xx_idc_unlock(ha);
2309 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2310 if (!ql2xdbwr)
2311 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2312 } else {
2313 if (ha->iobase)
2314 iounmap(ha->iobase);
2315 }
e315cd28
AC		 2316 pci_release_selected_regions(ha->pdev, ha->bars);
2317 kfree(ha);
2318 ha = NULL;
1da177e4 2319
a1541d5a 2320probe_out:
e315cd28 2321 pci_disable_device(pdev);
a1541d5a 2322 return ret;
1da177e4 2323}
1da177e4 2324
e30d1756
MI		 2325static void
2326qla2x00_shutdown(struct pci_dev *pdev)
2327{
2328 scsi_qla_host_t *vha;
2329 struct qla_hw_data *ha;
2330
2331 vha = pci_get_drvdata(pdev);
2332 ha = vha->hw;
2333
2334 /* Turn-off FCE trace */
2335 if (ha->flags.fce_enabled) {
2336 qla2x00_disable_fce_trace(vha, NULL, NULL);
2337 ha->flags.fce_enabled = 0;
2338 }
2339
2340 /* Turn-off EFT trace */
2341 if (ha->eft)
2342 qla2x00_disable_eft_trace(vha);
2343
2344 /* Stop currently executing firmware. */
2345 qla2x00_try_to_stop_firmware(vha);
2346
2347 /* Turn adapter off line */
2348 vha->flags.online = 0;
2349
2350 /* turn-off interrupts on the card */
2351 if (ha->interrupts_on) {
2352 vha->flags.init_done = 0;
2353 ha->isp_ops->disable_intrs(ha);
2354 }
2355
2356 qla2x00_free_irqs(vha);
2357
2358 qla2x00_free_fw_dump(ha);
2359}
2360
4c993f76 2361static void
7ee61397 2362qla2x00_remove_one(struct pci_dev *pdev)
1da177e4 2363{
feafb7b1 2364 scsi_qla_host_t *base_vha, *vha;
e315cd28 2365 struct qla_hw_data *ha;
feafb7b1 2366 unsigned long flags;
e315cd28
AC		 2367
2368 base_vha = pci_get_drvdata(pdev);
2369 ha = base_vha->hw;
2370
feafb7b1
AE		 2371 spin_lock_irqsave(&ha->vport_slock, flags);
2372 list_for_each_entry(vha, &ha->vp_list, list) {
2373 atomic_inc(&vha->vref_count);
2374
8ae598d0 2375 if (vha->fc_vport) {
feafb7b1
AE		 2376 spin_unlock_irqrestore(&ha->vport_slock, flags);
2377
e315cd28 2378 fc_vport_terminate(vha->fc_vport);
feafb7b1
AE		 2379
2380 spin_lock_irqsave(&ha->vport_slock, flags);
2381 }
2382
2383 atomic_dec(&vha->vref_count);
e315cd28 2384 }
feafb7b1 2385 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 2386
e315cd28 2387 set_bit(UNLOADING, &base_vha->dpc_flags);
1da177e4 2388
b9978769
AV		 2389 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2390
e315cd28 2391 qla2x00_dfs_remove(base_vha);
c795c1e4 2392
e315cd28 2393 qla84xx_put_chip(base_vha);
c795c1e4 2394
b9978769
AV		 2395 /* Disable timer */
2396 if (base_vha->timer_active)
2397 qla2x00_stop_timer(base_vha);
2398
2399 base_vha->flags.online = 0;
2400
68ca949c
AC		 2401 /* Flush the work queue and remove it */
2402 if (ha->wq) {
2403 flush_workqueue(ha->wq);
2404 destroy_workqueue(ha->wq);
2405 ha->wq = NULL;
2406 }
2407
b9978769
AV		 2408 /* Kill the kernel thread for this host */
2409 if (ha->dpc_thread) {
2410 struct task_struct *t = ha->dpc_thread;
2411
2412 /*
2413 * qla2xxx_wake_dpc checks for ->dpc_thread
2414 * so we need to zero it out.
2415 */
2416 ha->dpc_thread = NULL;
2417 kthread_stop(t);
2418 }
2419
e315cd28 2420 qla2x00_free_sysfs_attr(base_vha);
df613b96 2421
e315cd28 2422 fc_remove_host(base_vha->host);
4d4df193 2423
e315cd28 2424 scsi_remove_host(base_vha->host);
1da177e4 2425
e315cd28 2426 qla2x00_free_device(base_vha);
bdf79621 2427
e315cd28 2428 scsi_host_put(base_vha->host);
1da177e4 2429
a9083016 2430 if (IS_QLA82XX(ha)) {
b963752f
GM		 2431 qla82xx_idc_lock(ha);
2432 qla82xx_clear_drv_active(ha);
2433 qla82xx_idc_unlock(ha);
2434
a9083016
GM		 2435 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2436 if (!ql2xdbwr)
2437 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2438 } else {
2439 if (ha->iobase)
2440 iounmap(ha->iobase);
1da177e4 2441
a9083016
GM		 2442 if (ha->mqiobase)
2443 iounmap(ha->mqiobase);
2444 }
73208dfd 2445
e315cd28
AC		 2446 pci_release_selected_regions(ha->pdev, ha->bars);
2447 kfree(ha);
2448 ha = NULL;
1da177e4 2449
90a86fc0
JC		 2450 pci_disable_pcie_error_reporting(pdev);
2451
665db93b 2452 pci_disable_device(pdev);
1da177e4
LT		 2453 pci_set_drvdata(pdev, NULL);
2454}
1da177e4
LT		 2455
2456static void
e315cd28 2457qla2x00_free_device(scsi_qla_host_t *vha)
1da177e4 2458{
e315cd28 2459 struct qla_hw_data *ha = vha->hw;
1da177e4 2460
85880801
AV		 2461 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2462
2463 /* Disable timer */
2464 if (vha->timer_active)
2465 qla2x00_stop_timer(vha);
2466
2467 /* Kill the kernel thread for this host */
2468 if (ha->dpc_thread) {
2469 struct task_struct *t = ha->dpc_thread;
2470
2471 /*
2472 * qla2xxx_wake_dpc checks for ->dpc_thread
2473 * so we need to zero it out.
2474 */
2475 ha->dpc_thread = NULL;
2476 kthread_stop(t);
2477 }
2478
2afa19a9
AC		 2479 qla25xx_delete_queues(vha);
2480
df613b96 2481 if (ha->flags.fce_enabled)
e315cd28 2482 qla2x00_disable_fce_trace(vha, NULL, NULL);
df613b96 2483
a7a167bf 2484 if (ha->eft)
e315cd28 2485 qla2x00_disable_eft_trace(vha);
a7a167bf 2486
f6ef3b18 2487 /* Stop currently executing firmware. */
e315cd28 2488 qla2x00_try_to_stop_firmware(vha);
1da177e4 2489
85880801
AV		 2490 vha->flags.online = 0;
2491
f6ef3b18 2492 /* turn-off interrupts on the card */
a9083016
GM		 2493 if (ha->interrupts_on) {
2494 vha->flags.init_done = 0;
fd34f556 2495 ha->isp_ops->disable_intrs(ha);
a9083016 2496 }
f6ef3b18 2497
e315cd28 2498 qla2x00_free_irqs(vha);
1da177e4 2499
8867048b
CD		 2500 qla2x00_free_fcports(vha);
2501
e315cd28 2502 qla2x00_mem_free(ha);
73208dfd
AC		 2503
2504 qla2x00_free_queues(ha);
1da177e4
LT		 2505}
2506
8867048b
CD		 2507void qla2x00_free_fcports(struct scsi_qla_host *vha)
2508{
2509 fc_port_t *fcport, *tfcport;
2510
2511 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2512 list_del(&fcport->list);
2513 kfree(fcport);
2514 fcport = NULL;
2515 }
2516}
2517
d97994dc 2518static inline void
e315cd28 2519qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
d97994dc 2520 int defer)
2521{
d97994dc 2522 struct fc_rport *rport;
67becc00 2523 scsi_qla_host_t *base_vha;
044d78e1 2524 unsigned long flags;
d97994dc 2525
2526 if (!fcport->rport)
2527 return;
2528
2529 rport = fcport->rport;
2530 if (defer) {
67becc00 2531 base_vha = pci_get_drvdata(vha->hw->pdev);
044d78e1 2532 spin_lock_irqsave(vha->host->host_lock, flags);
d97994dc 2533 fcport->drport = rport;
044d78e1 2534 spin_unlock_irqrestore(vha->host->host_lock, flags);
67becc00
AV		 2535 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2536 qla2xxx_wake_dpc(base_vha);
5f3a9a20 2537 } else
d97994dc 2538 fc_remote_port_delete(rport);
d97994dc 2539}
2540
1da177e4
LT		 2541/*
2542 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2543 *
2544 * Input: ha = adapter block pointer. fcport = port structure pointer.
2545 *
2546 * Return: None.
2547 *
2548 * Context:
2549 */
e315cd28 2550void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
d97994dc 2551 int do_login, int defer)
1da177e4 2552{
2c3dfe3f 2553 if (atomic_read(&fcport->state) == FCS_ONLINE &&
e315cd28 2554 vha->vp_idx == fcport->vp_idx) {
ec426e10 2555 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
e315cd28
AC		 2556 qla2x00_schedule_rport_del(vha, fcport, defer);
2557 }
fa2a1ce5 2558 /*
1da177e4
LT		 2559 * We may need to retry the login, so don't change the state of the
2560 * port but do the retries.
2561 */
2562 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
ec426e10 2563 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1da177e4
LT		 2564
2565 if (!do_login)
2566 return;
2567
2568 if (fcport->login_retry == 0) {
e315cd28
AC		 2569 fcport->login_retry = vha->hw->login_retry_count;
2570 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2571
2572 DEBUG(printk("scsi(%ld): Port login retry: "
2573 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2574 "id = 0x%04x retry cnt=%d\n",
e315cd28 2575 vha->host_no,
1da177e4
LT		 2576 fcport->port_name[0],
2577 fcport->port_name[1],
2578 fcport->port_name[2],
2579 fcport->port_name[3],
2580 fcport->port_name[4],
2581 fcport->port_name[5],
2582 fcport->port_name[6],
2583 fcport->port_name[7],
2584 fcport->loop_id,
2585 fcport->login_retry));
2586 }
2587}
2588
2589/*
2590 * qla2x00_mark_all_devices_lost
2591 * Updates fcport state when device goes offline.
2592 *
2593 * Input:
2594 * ha = adapter block pointer.
2595 * fcport = port structure pointer.
2596 *
2597 * Return:
2598 * None.
2599 *
2600 * Context:
2601 */
2602void
e315cd28 2603qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
1da177e4
LT		 2604{
2605 fc_port_t *fcport;
2606
e315cd28 2607 list_for_each_entry(fcport, &vha->vp_fcports, list) {
0d6e61bc 2608 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
1da177e4 2609 continue;
0d6e61bc 2610
1da177e4
LT		 2611 /*
2612 * No point in marking the device as lost, if the device is
2613 * already DEAD.
2614 */
2615 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2616 continue;
e315cd28 2617 if (atomic_read(&fcport->state) == FCS_ONLINE) {
ec426e10 2618 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
0d6e61bc
AV		 2619 if (defer)
2620 qla2x00_schedule_rport_del(vha, fcport, defer);
2621 else if (vha->vp_idx == fcport->vp_idx)
2622 qla2x00_schedule_rport_del(vha, fcport, defer);
2623 }
1da177e4
LT		 2624 }
2625}
2626
2627/*
2628* qla2x00_mem_alloc
2629* Allocates adapter memory.
2630*
2631* Returns:
2632* 0 = success.
e8711085 2633* !0 = failure.
1da177e4 2634*/
e8711085 2635static int
73208dfd
AC		 2636qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2637 struct req_que **req, struct rsp_que **rsp)
1da177e4
LT		 2638{
2639 char name[16];
1da177e4 2640
e8711085 2641 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
e315cd28 2642 &ha->init_cb_dma, GFP_KERNEL);
e8711085 2643 if (!ha->init_cb)
e315cd28 2644 goto fail;
e8711085 2645
e315cd28
AC		 2646 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2647 &ha->gid_list_dma, GFP_KERNEL);
2648 if (!ha->gid_list)
e8711085 2649 goto fail_free_init_cb;
1da177e4 2650
e8711085
AV		 2651 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2652 if (!ha->srb_mempool)
e315cd28 2653 goto fail_free_gid_list;
e8711085 2654
a9083016
GM		 2655 if (IS_QLA82XX(ha)) {
2656 /* Allocate cache for CT6 Ctx. */
2657 if (!ctx_cachep) {
2658 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2659 sizeof(struct ct6_dsd), 0,
2660 SLAB_HWCACHE_ALIGN, NULL);
2661 if (!ctx_cachep)
2662 goto fail_free_gid_list;
2663 }
2664 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2665 ctx_cachep);
2666 if (!ha->ctx_mempool)
2667 goto fail_free_srb_mempool;
2668 }
2669
e8711085
AV		 2670 /* Get memory for cached NVRAM */
2671 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2672 if (!ha->nvram)
a9083016 2673 goto fail_free_ctx_mempool;
e8711085 2674
e315cd28
AC		 2675 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2676 ha->pdev->device);
2677 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2678 DMA_POOL_SIZE, 8, 0);
2679 if (!ha->s_dma_pool)
2680 goto fail_free_nvram;
2681
bad75002 2682 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2683 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2684 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2685 if (!ha->dl_dma_pool) {
2686 qla_printk(KERN_WARNING, ha,
2687 "Memory Allocation failed - dl_dma_pool\n");
2688 goto fail_s_dma_pool;
2689 }
2690
2691 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2692 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2693 if (!ha->fcp_cmnd_dma_pool) {
2694 qla_printk(KERN_WARNING, ha,
2695 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2696 goto fail_dl_dma_pool;
2697 }
2698 }
2699
e8711085
AV		 2700 /* Allocate memory for SNS commands */
2701 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
e315cd28 2702 /* Get consistent memory allocated for SNS commands */
e8711085 2703 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2704 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
e8711085 2705 if (!ha->sns_cmd)
e315cd28 2706 goto fail_dma_pool;
e8711085 2707 } else {
e315cd28 2708 /* Get consistent memory allocated for MS IOCB */
e8711085 2709 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
e315cd28 2710 &ha->ms_iocb_dma);
e8711085 2711 if (!ha->ms_iocb)
e315cd28
AC		 2712 goto fail_dma_pool;
2713 /* Get consistent memory allocated for CT SNS commands */
e8711085 2714 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2715 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
e8711085
AV		 2716 if (!ha->ct_sns)
2717 goto fail_free_ms_iocb;
1da177e4
LT		 2718 }
2719
e315cd28 2720 /* Allocate memory for request ring */
73208dfd
AC		 2721 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2722 if (!*req) {
e315cd28
AC		 2723 DEBUG(printk("Unable to allocate memory for req\n"));
2724 goto fail_req;
2725 }
73208dfd
AC		 2726 (*req)->length = req_len;
2727 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2728 ((*req)->length + 1) * sizeof(request_t),
2729 &(*req)->dma, GFP_KERNEL);
2730 if (!(*req)->ring) {
e315cd28
AC		 2731 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2732 goto fail_req_ring;
2733 }
2734 /* Allocate memory for response ring */
73208dfd
AC		 2735 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2736 if (!*rsp) {
2737 qla_printk(KERN_WARNING, ha,
2738 "Unable to allocate memory for rsp\n");
e315cd28
AC		 2739 goto fail_rsp;
2740 }
73208dfd
AC		 2741 (*rsp)->hw = ha;
2742 (*rsp)->length = rsp_len;
2743 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2744 ((*rsp)->length + 1) * sizeof(response_t),
2745 &(*rsp)->dma, GFP_KERNEL);
2746 if (!(*rsp)->ring) {
2747 qla_printk(KERN_WARNING, ha,
2748 "Unable to allocate memory for rsp_ring\n");
e315cd28
AC		 2749 goto fail_rsp_ring;
2750 }
73208dfd
AC		 2751 (*req)->rsp = *rsp;
2752 (*rsp)->req = *req;
2753 /* Allocate memory for NVRAM data for vports */
2754 if (ha->nvram_npiv_size) {
2755 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2756 ha->nvram_npiv_size, GFP_KERNEL);
2757 if (!ha->npiv_info) {
2758 qla_printk(KERN_WARNING, ha,
2759 "Unable to allocate memory for npiv info\n");
2760 goto fail_npiv_info;
2761 }
2762 } else
2763 ha->npiv_info = NULL;
e8711085 2764
b64b0e8f 2765 /* Get consistent memory allocated for EX-INIT-CB. */
a9083016 2766 if (IS_QLA8XXX_TYPE(ha)) {
b64b0e8f
AV		 2767 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2768 &ha->ex_init_cb_dma);
2769 if (!ha->ex_init_cb)
2770 goto fail_ex_init_cb;
2771 }
2772
a9083016
GM		 2773 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2774
5ff1d584
AV		 2775 /* Get consistent memory allocated for Async Port-Database. */
2776 if (!IS_FWI2_CAPABLE(ha)) {
2777 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2778 &ha->async_pd_dma);
2779 if (!ha->async_pd)
2780 goto fail_async_pd;
2781 }
2782
e315cd28
AC		 2783 INIT_LIST_HEAD(&ha->vp_list);
2784 return 1;
2785
5ff1d584
AV		 2786fail_async_pd:
2787 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f
AV		 2788fail_ex_init_cb:
2789 kfree(ha->npiv_info);
73208dfd
AC		 2790fail_npiv_info:
2791 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2792 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2793 (*rsp)->ring = NULL;
2794 (*rsp)->dma = 0;
e315cd28 2795fail_rsp_ring:
73208dfd 2796 kfree(*rsp);
e315cd28 2797fail_rsp:
73208dfd
AC		 2798 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2799 sizeof(request_t), (*req)->ring, (*req)->dma);
2800 (*req)->ring = NULL;
2801 (*req)->dma = 0;
e315cd28 2802fail_req_ring:
73208dfd 2803 kfree(*req);
e315cd28
AC		 2804fail_req:
2805 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2806 ha->ct_sns, ha->ct_sns_dma);
2807 ha->ct_sns = NULL;
2808 ha->ct_sns_dma = 0;
e8711085
AV		 2809fail_free_ms_iocb:
2810 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2811 ha->ms_iocb = NULL;
2812 ha->ms_iocb_dma = 0;
e315cd28 2813fail_dma_pool:
bad75002 2814 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2815 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2816 ha->fcp_cmnd_dma_pool = NULL;
2817 }
2818fail_dl_dma_pool:
bad75002 2819 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2820 dma_pool_destroy(ha->dl_dma_pool);
2821 ha->dl_dma_pool = NULL;
2822 }
2823fail_s_dma_pool:
e315cd28
AC		 2824 dma_pool_destroy(ha->s_dma_pool);
2825 ha->s_dma_pool = NULL;
e8711085
AV		 2826fail_free_nvram:
2827 kfree(ha->nvram);
2828 ha->nvram = NULL;
a9083016
GM		 2829fail_free_ctx_mempool:
2830 mempool_destroy(ha->ctx_mempool);
2831 ha->ctx_mempool = NULL;
e8711085
AV		 2832fail_free_srb_mempool:
2833 mempool_destroy(ha->srb_mempool);
2834 ha->srb_mempool = NULL;
e8711085
AV		 2835fail_free_gid_list:
2836 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2837 ha->gid_list_dma);
e8711085
AV		 2838 ha->gid_list = NULL;
2839 ha->gid_list_dma = 0;
e315cd28
AC		 2840fail_free_init_cb:
2841 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2842 ha->init_cb_dma);
2843 ha->init_cb = NULL;
2844 ha->init_cb_dma = 0;
e8711085 2845fail:
e315cd28 2846 DEBUG(printk("%s: Memory allocation failure\n", __func__));
e8711085 2847 return -ENOMEM;
1da177e4
LT		 2848}
2849
2850/*
e30d1756
MI		 2851* qla2x00_free_fw_dump
2852* Frees fw dump stuff.
1da177e4
LT		 2853*
2854* Input:
e30d1756 2855* ha = adapter block pointer.
1da177e4 2856*/
a824ebb3 2857static void
e30d1756 2858qla2x00_free_fw_dump(struct qla_hw_data *ha)
1da177e4 2859{
df613b96
AV		 2860 if (ha->fce)
2861 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
e30d1756 2862 ha->fce_dma);
df613b96 2863
a7a167bf
AV		 2864 if (ha->fw_dump) {
2865 if (ha->eft)
2866 dma_free_coherent(&ha->pdev->dev,
e30d1756 2867 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
a7a167bf
AV		 2868 vfree(ha->fw_dump);
2869 }
e30d1756
MI		 2870 ha->fce = NULL;
2871 ha->fce_dma = 0;
2872 ha->eft = NULL;
2873 ha->eft_dma = 0;
2874 ha->fw_dump = NULL;
2875 ha->fw_dumped = 0;
2876 ha->fw_dump_reading = 0;
2877}
2878
2879/*
2880* qla2x00_mem_free
2881* Frees all adapter allocated memory.
2882*
2883* Input:
2884* ha = adapter block pointer.
2885*/
2886static void
2887qla2x00_mem_free(struct qla_hw_data *ha)
2888{
2889 qla2x00_free_fw_dump(ha);
2890
2891 if (ha->srb_mempool)
2892 mempool_destroy(ha->srb_mempool);
a7a167bf 2893
11bbc1d8
AV		 2894 if (ha->dcbx_tlv)
2895 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2896 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2897
ce0423f4
AV		 2898 if (ha->xgmac_data)
2899 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2900 ha->xgmac_data, ha->xgmac_data_dma);
2901
1da177e4
LT		 2902 if (ha->sns_cmd)
2903 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
e315cd28 2904 ha->sns_cmd, ha->sns_cmd_dma);
1da177e4
LT		 2905
2906 if (ha->ct_sns)
2907 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
e315cd28 2908 ha->ct_sns, ha->ct_sns_dma);
1da177e4 2909
88729e53
AV		 2910 if (ha->sfp_data)
2911 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2912
ad0ecd61
JC		 2913 if (ha->edc_data)
2914 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2915
1da177e4
LT		 2916 if (ha->ms_iocb)
2917 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2918
b64b0e8f 2919 if (ha->ex_init_cb)
a9083016
GM		 2920 dma_pool_free(ha->s_dma_pool,
2921 ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f 2922
5ff1d584
AV		 2923 if (ha->async_pd)
2924 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2925
1da177e4
LT		 2926 if (ha->s_dma_pool)
2927 dma_pool_destroy(ha->s_dma_pool);
2928
1da177e4
LT		 2929 if (ha->gid_list)
2930 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2931 ha->gid_list_dma);
1da177e4 2932
a9083016
GM		 2933 if (IS_QLA82XX(ha)) {
2934 if (!list_empty(&ha->gbl_dsd_list)) {
2935 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2936
2937 /* clean up allocated prev pool */
2938 list_for_each_entry_safe(dsd_ptr,
2939 tdsd_ptr, &ha->gbl_dsd_list, list) {
2940 dma_pool_free(ha->dl_dma_pool,
2941 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2942 list_del(&dsd_ptr->list);
2943 kfree(dsd_ptr);
2944 }
2945 }
2946 }
2947
2948 if (ha->dl_dma_pool)
2949 dma_pool_destroy(ha->dl_dma_pool);
2950
2951 if (ha->fcp_cmnd_dma_pool)
2952 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2953
2954 if (ha->ctx_mempool)
2955 mempool_destroy(ha->ctx_mempool);
2956
e315cd28
AC		 2957 if (ha->init_cb)
2958 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
a9083016 2959 ha->init_cb, ha->init_cb_dma);
e315cd28
AC		 2960 vfree(ha->optrom_buffer);
2961 kfree(ha->nvram);
73208dfd 2962 kfree(ha->npiv_info);
1da177e4 2963
e8711085 2964 ha->srb_mempool = NULL;
a9083016 2965 ha->ctx_mempool = NULL;
1da177e4
LT		 2966 ha->sns_cmd = NULL;
2967 ha->sns_cmd_dma = 0;
2968 ha->ct_sns = NULL;
2969 ha->ct_sns_dma = 0;
2970 ha->ms_iocb = NULL;
2971 ha->ms_iocb_dma = 0;
1da177e4
LT		 2972 ha->init_cb = NULL;
2973 ha->init_cb_dma = 0;
b64b0e8f
AV		 2974 ha->ex_init_cb = NULL;
2975 ha->ex_init_cb_dma = 0;
5ff1d584
AV		 2976 ha->async_pd = NULL;
2977 ha->async_pd_dma = 0;
1da177e4
LT		 2978
2979 ha->s_dma_pool = NULL;
a9083016
GM		 2980 ha->dl_dma_pool = NULL;
2981 ha->fcp_cmnd_dma_pool = NULL;
1da177e4 2982
1da177e4
LT		 2983 ha->gid_list = NULL;
2984 ha->gid_list_dma = 0;
e315cd28 2985}
1da177e4 2986
e315cd28
AC		 2987struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2988 struct qla_hw_data *ha)
2989{
2990 struct Scsi_Host *host;
2991 struct scsi_qla_host *vha = NULL;
854165f4 2992
e315cd28
AC		 2993 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2994 if (host == NULL) {
2995 printk(KERN_WARNING
2996 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2997 goto fail;
2998 }
2999
3000 /* Clear our data area */
3001 vha = shost_priv(host);
3002 memset(vha, 0, sizeof(scsi_qla_host_t));
3003
3004 vha->host = host;
3005 vha->host_no = host->host_no;
3006 vha->hw = ha;
3007
3008 INIT_LIST_HEAD(&vha->vp_fcports);
3009 INIT_LIST_HEAD(&vha->work_list);
3010 INIT_LIST_HEAD(&vha->list);
3011
f999f4c1
AV		 3012 spin_lock_init(&vha->work_lock);
3013
e315cd28
AC		 3014 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3015 return vha;
3016
3017fail:
3018 return vha;
1da177e4
LT		 3019}
3020
01ef66bb 3021static struct qla_work_evt *
f999f4c1 3022qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
0971de7f
AV		 3023{
3024 struct qla_work_evt *e;
feafb7b1
AE		 3025 uint8_t bail;
3026
3027 QLA_VHA_MARK_BUSY(vha, bail);
3028 if (bail)
3029 return NULL;
0971de7f 3030
f999f4c1 3031 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
feafb7b1
AE		 3032 if (!e) {
3033 QLA_VHA_MARK_NOT_BUSY(vha);
0971de7f 3034 return NULL;
feafb7b1 3035 }
0971de7f
AV		 3036
3037 INIT_LIST_HEAD(&e->list);
3038 e->type = type;
3039 e->flags = QLA_EVT_FLAG_FREE;
3040 return e;
3041}
3042
01ef66bb 3043static int
f999f4c1 3044qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
0971de7f 3045{
f999f4c1 3046 unsigned long flags;
0971de7f 3047
f999f4c1 3048 spin_lock_irqsave(&vha->work_lock, flags);
e315cd28 3049 list_add_tail(&e->list, &vha->work_list);
f999f4c1 3050 spin_unlock_irqrestore(&vha->work_lock, flags);
e315cd28 3051 qla2xxx_wake_dpc(vha);
f999f4c1 3052
0971de7f
AV		 3053 return QLA_SUCCESS;
3054}
3055
3056int
e315cd28 3057qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
0971de7f
AV		 3058 u32 data)
3059{
3060 struct qla_work_evt *e;
3061
f999f4c1 3062 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
0971de7f
AV		 3063 if (!e)
3064 return QLA_FUNCTION_FAILED;
3065
3066 e->u.aen.code = code;
3067 e->u.aen.data = data;
f999f4c1 3068 return qla2x00_post_work(vha, e);
0971de7f
AV		 3069}
3070
8a659571
AV		 3071int
3072qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3073{
3074 struct qla_work_evt *e;
3075
f999f4c1 3076 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
8a659571
AV		 3077 if (!e)
3078 return QLA_FUNCTION_FAILED;
3079
3080 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
f999f4c1 3081 return qla2x00_post_work(vha, e);
8a659571
AV		 3082}
3083
ac280b67
AV		 3084#define qla2x00_post_async_work(name, type) \
3085int qla2x00_post_async_##name##_work( \
3086 struct scsi_qla_host *vha, \
3087 fc_port_t *fcport, uint16_t *data) \
3088{ \
3089 struct qla_work_evt *e; \
3090 \
3091 e = qla2x00_alloc_work(vha, type); \
3092 if (!e) \
3093 return QLA_FUNCTION_FAILED; \
3094 \
3095 e->u.logio.fcport = fcport; \
3096 if (data) { \
3097 e->u.logio.data[0] = data[0]; \
3098 e->u.logio.data[1] = data[1]; \
3099 } \
3100 return qla2x00_post_work(vha, e); \
3101}
3102
3103qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3104qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3105qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3106qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
5ff1d584
AV		 3107qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3108qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
ac280b67 3109
3420d36c
AV		 3110int
3111qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3112{
3113 struct qla_work_evt *e;
3114
3115 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3116 if (!e)
3117 return QLA_FUNCTION_FAILED;
3118
3119 e->u.uevent.code = code;
3120 return qla2x00_post_work(vha, e);
3121}
3122
3123static void
3124qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3125{
3126 char event_string[40];
3127 char *envp[] = { event_string, NULL };
3128
3129 switch (code) {
3130 case QLA_UEVENT_CODE_FW_DUMP:
3131 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3132 vha->host_no);
3133 break;
3134 default:
3135 /* do nothing */
3136 break;
3137 }
3138 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3139}
3140
ac280b67 3141void
e315cd28 3142qla2x00_do_work(struct scsi_qla_host *vha)
0971de7f 3143{
f999f4c1
AV		 3144 struct qla_work_evt *e, *tmp;
3145 unsigned long flags;
3146 LIST_HEAD(work);
0971de7f 3147
f999f4c1
AV		 3148 spin_lock_irqsave(&vha->work_lock, flags);
3149 list_splice_init(&vha->work_list, &work);
3150 spin_unlock_irqrestore(&vha->work_lock, flags);
3151
3152 list_for_each_entry_safe(e, tmp, &work, list) {
0971de7f 3153 list_del_init(&e->list);
0971de7f
AV		 3154
3155 switch (e->type) {
3156 case QLA_EVT_AEN:
e315cd28 3157 fc_host_post_event(vha->host, fc_get_event_number(),
0971de7f
AV		 3158 e->u.aen.code, e->u.aen.data);
3159 break;
8a659571
AV		 3160 case QLA_EVT_IDC_ACK:
3161 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3162 break;
ac280b67
AV		 3163 case QLA_EVT_ASYNC_LOGIN:
3164 qla2x00_async_login(vha, e->u.logio.fcport,
3165 e->u.logio.data);
3166 break;
3167 case QLA_EVT_ASYNC_LOGIN_DONE:
3168 qla2x00_async_login_done(vha, e->u.logio.fcport,
3169 e->u.logio.data);
3170 break;
3171 case QLA_EVT_ASYNC_LOGOUT:
3172 qla2x00_async_logout(vha, e->u.logio.fcport);
3173 break;
3174 case QLA_EVT_ASYNC_LOGOUT_DONE:
3175 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3176 e->u.logio.data);
3177 break;
5ff1d584
AV		 3178 case QLA_EVT_ASYNC_ADISC:
3179 qla2x00_async_adisc(vha, e->u.logio.fcport,
3180 e->u.logio.data);
3181 break;
3182 case QLA_EVT_ASYNC_ADISC_DONE:
3183 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3184 e->u.logio.data);
3185 break;
3420d36c
AV		 3186 case QLA_EVT_UEVENT:
3187 qla2x00_uevent_emit(vha, e->u.uevent.code);
3188 break;
0971de7f
AV		 3189 }
3190 if (e->flags & QLA_EVT_FLAG_FREE)
3191 kfree(e);
feafb7b1
AE		 3192
3193 /* For each work completed decrement vha ref count */
3194 QLA_VHA_MARK_NOT_BUSY(vha);
e315cd28 3195 }
e315cd28 3196}
f999f4c1 3197
e315cd28
AC		 3198/* Relogins all the fcports of a vport
3199 * Context: dpc thread
3200 */
3201void qla2x00_relogin(struct scsi_qla_host *vha)
3202{
3203 fc_port_t *fcport;
c6b2fca8 3204 int status;
e315cd28
AC		 3205 uint16_t next_loopid = 0;
3206 struct qla_hw_data *ha = vha->hw;
ac280b67 3207 uint16_t data[2];
e315cd28
AC		 3208
3209 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3210 /*
3211 * If the port is not ONLINE then try to login
3212 * to it if we haven't run out of retries.
3213 */
5ff1d584
AV		 3214 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3215 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
ac280b67 3216 fcport->login_retry--;
e315cd28 3217 if (fcport->flags & FCF_FABRIC_DEVICE) {
f08b7251 3218 if (fcport->flags & FCF_FCP2_DEVICE)
e315cd28
AC		 3219 ha->isp_ops->fabric_logout(vha,
3220 fcport->loop_id,
3221 fcport->d_id.b.domain,
3222 fcport->d_id.b.area,
3223 fcport->d_id.b.al_pa);
3224
03bcfb57
JC		 3225 if (fcport->loop_id == FC_NO_LOOP_ID) {
3226 fcport->loop_id = next_loopid =
3227 ha->min_external_loopid;
3228 status = qla2x00_find_new_loop_id(
3229 vha, fcport);
3230 if (status != QLA_SUCCESS) {
3231 /* Ran out of IDs to use */
3232 break;
3233 }
3234 }
3235
ac280b67 3236 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584 3237 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3238 data[0] = 0;
3239 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3240 status = qla2x00_post_async_login_work(
3241 vha, fcport, data);
3242 if (status == QLA_SUCCESS)
3243 continue;
3244 /* Attempt a retry. */
3245 status = 1;
3246 } else
3247 status = qla2x00_fabric_login(vha,
3248 fcport, &next_loopid);
e315cd28
AC		 3249 } else
3250 status = qla2x00_local_device_login(vha,
3251 fcport);
3252
e315cd28
AC		 3253 if (status == QLA_SUCCESS) {
3254 fcport->old_loop_id = fcport->loop_id;
3255
3256 DEBUG(printk("scsi(%ld): port login OK: logged "
3257 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3258
3259 qla2x00_update_fcport(vha, fcport);
3260
3261 } else if (status == 1) {
3262 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3263 /* retry the login again */
3264 DEBUG(printk("scsi(%ld): Retrying"
3265 " %d login again loop_id 0x%x\n",
3266 vha->host_no, fcport->login_retry,
3267 fcport->loop_id));
3268 } else {
3269 fcport->login_retry = 0;
3270 }
3271
3272 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3273 fcport->loop_id = FC_NO_LOOP_ID;
3274 }
3275 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3276 break;
0971de7f 3277 }
0971de7f
AV		 3278}
3279
1da177e4
LT		 3280/**************************************************************************
3281* qla2x00_do_dpc
3282* This kernel thread is a task that is schedule by the interrupt handler
3283* to perform the background processing for interrupts.
3284*
3285* Notes:
3286* This task always run in the context of a kernel thread. It
3287* is kick-off by the driver's detect code and starts up
3288* up one per adapter. It immediately goes to sleep and waits for
3289* some fibre event. When either the interrupt handler or
3290* the timer routine detects a event it will one of the task
3291* bits then wake us up.
3292**************************************************************************/
3293static int
3294qla2x00_do_dpc(void *data)
3295{
2c3dfe3f 3296 int rval;
e315cd28
AC		 3297 scsi_qla_host_t *base_vha;
3298 struct qla_hw_data *ha;
1da177e4 3299
e315cd28
AC		 3300 ha = (struct qla_hw_data *)data;
3301 base_vha = pci_get_drvdata(ha->pdev);
1da177e4 3302
1da177e4
LT		 3303 set_user_nice(current, -20);
3304
563585ec 3305 set_current_state(TASK_INTERRUPTIBLE);
39a11240 3306 while (!kthread_should_stop()) {
1da177e4
LT		 3307 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3308
39a11240
CH		 3309 schedule();
3310 __set_current_state(TASK_RUNNING);
1da177e4
LT		 3311
3312 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3313
3314 /* Initialization not yet finished. Don't do anything yet. */
e315cd28 3315 if (!base_vha->flags.init_done)
1da177e4
LT		 3316 continue;
3317
85880801
AV		 3318 if (ha->flags.eeh_busy) {
3319 DEBUG17(qla_printk(KERN_WARNING, ha,
3320 "qla2x00_do_dpc: dpc_flags: %lx\n",
3321 base_vha->dpc_flags));
3322 continue;
3323 }
3324
e315cd28 3325 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
1da177e4
LT		 3326
3327 ha->dpc_active = 1;
3328
1da177e4 3329 if (ha->flags.mbox_busy) {
1da177e4
LT		 3330 ha->dpc_active = 0;
3331 continue;
3332 }
3333
e315cd28 3334 qla2x00_do_work(base_vha);
0971de7f 3335
a9083016
GM		 3336 if (IS_QLA82XX(ha)) {
3337 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3338 &base_vha->dpc_flags)) {
3339 qla82xx_idc_lock(ha);
3340 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3341 QLA82XX_DEV_FAILED);
3342 qla82xx_idc_unlock(ha);
3343 qla_printk(KERN_INFO, ha,
3344 "HW State: FAILED\n");
3345 qla82xx_device_state_handler(base_vha);
3346 continue;
3347 }
3348
3349 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3350 &base_vha->dpc_flags)) {
3351
3352 DEBUG(printk(KERN_INFO
3353 "scsi(%ld): dpc: sched "
3354 "qla82xx_fcoe_ctx_reset ha = %p\n",
3355 base_vha->host_no, ha));
3356 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3357 &base_vha->dpc_flags))) {
3358 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3359 /* FCoE-ctx reset failed.
3360 * Escalate to chip-reset
3361 */
3362 set_bit(ISP_ABORT_NEEDED,
3363 &base_vha->dpc_flags);
3364 }
3365 clear_bit(ABORT_ISP_ACTIVE,
3366 &base_vha->dpc_flags);
3367 }
3368
3369 DEBUG(printk("scsi(%ld): dpc:"
3370 " qla82xx_fcoe_ctx_reset end\n",
3371 base_vha->host_no));
3372 }
3373 }
3374
e315cd28
AC		 3375 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3376 &base_vha->dpc_flags)) {
1da177e4
LT		 3377
3378 DEBUG(printk("scsi(%ld): dpc: sched "
3379 "qla2x00_abort_isp ha = %p\n",
e315cd28 3380 base_vha->host_no, ha));
1da177e4 3381 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
e315cd28 3382 &base_vha->dpc_flags))) {
1da177e4 3383
a9083016 3384 if (ha->isp_ops->abort_isp(base_vha)) {
1da177e4
LT		 3385 /* failed. retry later */
3386 set_bit(ISP_ABORT_NEEDED,
e315cd28 3387 &base_vha->dpc_flags);
99363ef8 3388 }
e315cd28
AC		 3389 clear_bit(ABORT_ISP_ACTIVE,
3390 &base_vha->dpc_flags);
99363ef8
SJ		 3391 }
3392
1da177e4 3393 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
e315cd28 3394 base_vha->host_no));
1da177e4
LT		 3395 }
3396
e315cd28
AC		 3397 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3398 qla2x00_update_fcports(base_vha);
3399 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
c9c5ced9 3400 }
d97994dc 3401
579d12b5
SK		 3402 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
3403 DEBUG(printk(KERN_INFO "scsi(%ld): dpc: sched "
3404 "qla2x00_quiesce_needed ha = %p\n",
3405 base_vha->host_no, ha));
3406 qla82xx_device_state_handler(base_vha);
3407 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags);
3408 if (!ha->flags.quiesce_owner) {
3409 qla2x00_perform_loop_resync(base_vha);
3410
3411 qla82xx_idc_lock(ha);
3412 qla82xx_clear_qsnt_ready(base_vha);
3413 qla82xx_idc_unlock(ha);
3414 }
3415 }
3416
e315cd28
AC		 3417 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3418 &base_vha->dpc_flags) &&
3419 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
1da177e4
LT		 3420
3421 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
e315cd28 3422 base_vha->host_no));
1da177e4 3423
e315cd28
AC		 3424 qla2x00_rst_aen(base_vha);
3425 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
1da177e4
LT		 3426 }
3427
3428 /* Retry each device up to login retry count */
e315cd28
AC		 3429 if ((test_and_clear_bit(RELOGIN_NEEDED,
3430 &base_vha->dpc_flags)) &&
3431 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3432 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
1da177e4
LT		 3433
3434 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
e315cd28
AC		 3435 base_vha->host_no));
3436 qla2x00_relogin(base_vha);
3437
1da177e4 3438 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
e315cd28 3439 base_vha->host_no));
1da177e4
LT		 3440 }
3441
e315cd28
AC		 3442 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3443 &base_vha->dpc_flags)) {
1da177e4
LT		 3444
3445 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
e315cd28 3446 base_vha->host_no));
1da177e4
LT		 3447
3448 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
e315cd28 3449 &base_vha->dpc_flags))) {
1da177e4 3450
e315cd28 3451 rval = qla2x00_loop_resync(base_vha);
1da177e4 3452
e315cd28
AC		 3453 clear_bit(LOOP_RESYNC_ACTIVE,
3454 &base_vha->dpc_flags);
1da177e4
LT		 3455 }
3456
3457 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
e315cd28 3458 base_vha->host_no));
1da177e4
LT		 3459 }
3460
e315cd28
AC		 3461 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3462 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3463 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3464 qla2xxx_flash_npiv_conf(base_vha);
272976ca
AV		 3465 }
3466
1da177e4 3467 if (!ha->interrupts_on)
fd34f556 3468 ha->isp_ops->enable_intrs(ha);
1da177e4 3469
e315cd28
AC		 3470 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3471 &base_vha->dpc_flags))
3472 ha->isp_ops->beacon_blink(base_vha);
f6df144c 3473
e315cd28 3474 qla2x00_do_dpc_all_vps(base_vha);
2c3dfe3f 3475
1da177e4 3476 ha->dpc_active = 0;
563585ec 3477 set_current_state(TASK_INTERRUPTIBLE);
1da177e4 3478 } /* End of while(1) */
563585ec 3479 __set_current_state(TASK_RUNNING);
1da177e4 3480
e315cd28 3481 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
1da177e4
LT		 3482
3483 /*
3484 * Make sure that nobody tries to wake us up again.
3485 */
1da177e4
LT		 3486 ha->dpc_active = 0;
3487
ac280b67
AV		 3488 /* Cleanup any residual CTX SRBs. */
3489 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3490
39a11240
CH		 3491 return 0;
3492}
3493
3494void
e315cd28 3495qla2xxx_wake_dpc(struct scsi_qla_host *vha)
39a11240 3496{
e315cd28 3497 struct qla_hw_data *ha = vha->hw;
c795c1e4
AV		 3498 struct task_struct *t = ha->dpc_thread;
3499
e315cd28 3500 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
c795c1e4 3501 wake_up_process(t);
1da177e4
LT		 3502}
3503
1da177e4
LT		 3504/*
3505* qla2x00_rst_aen
3506* Processes asynchronous reset.
3507*
3508* Input:
3509* ha = adapter block pointer.
3510*/
3511static void
e315cd28 3512qla2x00_rst_aen(scsi_qla_host_t *vha)
1da177e4 3513{
e315cd28
AC		 3514 if (vha->flags.online && !vha->flags.reset_active &&
3515 !atomic_read(&vha->loop_down_timer) &&
3516 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
1da177e4 3517 do {
e315cd28 3518 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3519
3520 /*
3521 * Issue marker command only when we are going to start
3522 * the I/O.
3523 */
e315cd28
AC		 3524 vha->marker_needed = 1;
3525 } while (!atomic_read(&vha->loop_down_timer) &&
3526 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
1da177e4
LT		 3527 }
3528}
3529
f4f051eb 3530static void
e315cd28 3531qla2x00_sp_free_dma(srb_t *sp)
f4f051eb 3532{
3533 struct scsi_cmnd *cmd = sp->cmd;
bad75002 3534 struct qla_hw_data *ha = sp->fcport->vha->hw;
f4f051eb 3535
3536 if (sp->flags & SRB_DMA_VALID) {
385d70b4 3537 scsi_dma_unmap(cmd);
f4f051eb 3538 sp->flags &= ~SRB_DMA_VALID;
3539 }
bad75002
AE		 3540
3541 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3542 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3543 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3544 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3545 }
3546
3547 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3548 /* List assured to be having elements */
3549 qla2x00_clean_dsd_pool(ha, sp);
3550 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3551 }
3552
3553 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3554 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3555 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3556 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3557 }
3558
fca29703 3559 CMD_SP(cmd) = NULL;
f4f051eb 3560}
3561
3dbe756a 3562static void
083a469d 3563qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
f4f051eb 3564{
3565 struct scsi_cmnd *cmd = sp->cmd;
3566
e315cd28 3567 qla2x00_sp_free_dma(sp);
f4f051eb 3568
a9083016
GM		 3569 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3570 struct ct6_dsd *ctx = sp->ctx;
3571 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3572 ctx->fcp_cmnd_dma);
3573 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3574 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3575 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3576 mempool_free(sp->ctx, ha->ctx_mempool);
3577 sp->ctx = NULL;
3578 }
f4f051eb 3579
a9083016 3580 mempool_free(sp, ha->srb_mempool);
f4f051eb 3581 cmd->scsi_done(cmd);
3582}
bdf79621 3583
083a469d
GM		 3584void
3585qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3586{
3587 if (atomic_read(&sp->ref_count) == 0) {
3588 DEBUG2(qla_printk(KERN_WARNING, ha,
3589 "SP reference-count to ZERO -- sp=%p\n", sp));
3590 DEBUG2(BUG());
3591 return;
3592 }
3593 if (!atomic_dec_and_test(&sp->ref_count))
3594 return;
3595 qla2x00_sp_final_compl(ha, sp);
3596}
3597
1da177e4
LT		 3598/**************************************************************************
3599* qla2x00_timer
3600*
3601* Description:
3602* One second timer
3603*
3604* Context: Interrupt
3605***************************************************************************/
2c3dfe3f 3606void
e315cd28 3607qla2x00_timer(scsi_qla_host_t *vha)
1da177e4 3608{
1da177e4 3609 unsigned long cpu_flags = 0;
1da177e4
LT		 3610 int start_dpc = 0;
3611 int index;
3612 srb_t *sp;
85880801 3613 uint16_t w;
e315cd28 3614 struct qla_hw_data *ha = vha->hw;
73208dfd 3615 struct req_que *req;
85880801 3616
a5b36321
LC		 3617 if (ha->flags.eeh_busy) {
3618 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3619 return;
3620 }
3621
85880801
AV		 3622 /* Hardware read to raise pending EEH errors during mailbox waits. */
3623 if (!pci_channel_offline(ha->pdev))
3624 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
1da177e4 3625
cefcaba6
SK		 3626 /* Make sure qla82xx_watchdog is run only for physical port */
3627 if (!vha->vp_idx && IS_QLA82XX(ha)) {
579d12b5
SK		 3628 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
3629 start_dpc++;
3630 qla82xx_watchdog(vha);
3631 }
3632
1da177e4 3633 /* Loop down handler. */
e315cd28 3634 if (atomic_read(&vha->loop_down_timer) > 0 &&
8f7daead
GM		 3635 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
3636 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
e315cd28 3637 && vha->flags.online) {
1da177e4 3638
e315cd28
AC		 3639 if (atomic_read(&vha->loop_down_timer) ==
3640 vha->loop_down_abort_time) {
1da177e4
LT		 3641
3642 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3643 "queues before time expire\n",
e315cd28 3644 vha->host_no));
1da177e4 3645
e315cd28
AC		 3646 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3647 atomic_set(&vha->loop_state, LOOP_DEAD);
1da177e4 3648
f08b7251
AV		 3649 /*
3650 * Schedule an ISP abort to return any FCP2-device
3651 * commands.
3652 */
2c3dfe3f 3653 /* NPIV - scan physical port only */
e315cd28 3654 if (!vha->vp_idx) {
2c3dfe3f
SJ		 3655 spin_lock_irqsave(&ha->hardware_lock,
3656 cpu_flags);
73208dfd 3657 req = ha->req_q_map[0];
2c3dfe3f
SJ		 3658 for (index = 1;
3659 index < MAX_OUTSTANDING_COMMANDS;
3660 index++) {
3661 fc_port_t *sfcp;
3662
e315cd28 3663 sp = req->outstanding_cmds[index];
2c3dfe3f
SJ		 3664 if (!sp)
3665 continue;
bad75002 3666 if (sp->ctx && !IS_PROT_IO(sp))
cf53b069 3667 continue;
2c3dfe3f 3668 sfcp = sp->fcport;
f08b7251 3669 if (!(sfcp->flags & FCF_FCP2_DEVICE))
2c3dfe3f 3670 continue;
bdf79621 3671
8f7daead
GM		 3672 if (IS_QLA82XX(ha))
3673 set_bit(FCOE_CTX_RESET_NEEDED,
3674 &vha->dpc_flags);
3675 else
3676 set_bit(ISP_ABORT_NEEDED,
e315cd28 3677 &vha->dpc_flags);
2c3dfe3f
SJ		 3678 break;
3679 }
3680 spin_unlock_irqrestore(&ha->hardware_lock,
e315cd28 3681 cpu_flags);
1da177e4 3682 }
1da177e4
LT		 3683 start_dpc++;
3684 }
3685
3686 /* if the loop has been down for 4 minutes, reinit adapter */
e315cd28 3687 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
0d6e61bc 3688 if (!(vha->device_flags & DFLG_NO_CABLE)) {
1da177e4
LT		 3689 DEBUG(printk("scsi(%ld): Loop down - "
3690 "aborting ISP.\n",
e315cd28 3691 vha->host_no));
1da177e4
LT		 3692 qla_printk(KERN_WARNING, ha,
3693 "Loop down - aborting ISP.\n");
3694
8f7daead
GM		 3695 if (IS_QLA82XX(ha))
3696 set_bit(FCOE_CTX_RESET_NEEDED,
3697 &vha->dpc_flags);
3698 else
3699 set_bit(ISP_ABORT_NEEDED,
3700 &vha->dpc_flags);
1da177e4
LT		 3701 }
3702 }
fca29703 3703 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
e315cd28
AC		 3704 vha->host_no,
3705 atomic_read(&vha->loop_down_timer)));
1da177e4
LT		 3706 }
3707
cefcaba6
SK		 3708 /* Check if beacon LED needs to be blinked for physical host only */
3709 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
e315cd28 3710 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
f6df144c 3711 start_dpc++;
3712 }
3713
550bf57d 3714 /* Process any deferred work. */
e315cd28 3715 if (!list_empty(&vha->work_list))
550bf57d
AV		 3716 start_dpc++;
3717
1da177e4 3718 /* Schedule the DPC routine if needed */
e315cd28
AC		 3719 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3720 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3721 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
1da177e4 3722 start_dpc ||
e315cd28
AC		 3723 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3724 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
a9083016
GM		 3725 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3726 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
e315cd28
AC		 3727 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3728 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3729 qla2xxx_wake_dpc(vha);
1da177e4 3730
e315cd28 3731 qla2x00_restart_timer(vha, WATCH_INTERVAL);
1da177e4
LT		 3732}
3733
5433383e
AV		 3734/* Firmware interface routines. */
3735
a9083016 3736#define FW_BLOBS 8
5433383e
AV		 3737#define FW_ISP21XX 0
3738#define FW_ISP22XX 1
3739#define FW_ISP2300 2
3740#define FW_ISP2322 3
48c02fde 3741#define FW_ISP24XX 4
c3a2f0df 3742#define FW_ISP25XX 5
3a03eb79 3743#define FW_ISP81XX 6
a9083016 3744#define FW_ISP82XX 7
5433383e 3745
bb8ee499
AV		 3746#define FW_FILE_ISP21XX "ql2100_fw.bin"
3747#define FW_FILE_ISP22XX "ql2200_fw.bin"
3748#define FW_FILE_ISP2300 "ql2300_fw.bin"
3749#define FW_FILE_ISP2322 "ql2322_fw.bin"
3750#define FW_FILE_ISP24XX "ql2400_fw.bin"
c3a2f0df 3751#define FW_FILE_ISP25XX "ql2500_fw.bin"
3a03eb79 3752#define FW_FILE_ISP81XX "ql8100_fw.bin"
a9083016 3753#define FW_FILE_ISP82XX "ql8200_fw.bin"
bb8ee499 3754
e1e82b6f 3755static DEFINE_MUTEX(qla_fw_lock);
5433383e
AV		 3756
3757static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
bb8ee499
AV		 3758 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3759 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3760 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3761 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3762 { .name = FW_FILE_ISP24XX, },
c3a2f0df 3763 { .name = FW_FILE_ISP25XX, },
3a03eb79 3764 { .name = FW_FILE_ISP81XX, },
a9083016 3765 { .name = FW_FILE_ISP82XX, },
5433383e
AV		 3766};
3767
3768struct fw_blob *
e315cd28 3769qla2x00_request_firmware(scsi_qla_host_t *vha)
5433383e 3770{
e315cd28 3771 struct qla_hw_data *ha = vha->hw;
5433383e
AV		 3772 struct fw_blob *blob;
3773
3774 blob = NULL;
3775 if (IS_QLA2100(ha)) {
3776 blob = &qla_fw_blobs[FW_ISP21XX];
3777 } else if (IS_QLA2200(ha)) {
3778 blob = &qla_fw_blobs[FW_ISP22XX];
48c02fde 3779 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5433383e 3780 blob = &qla_fw_blobs[FW_ISP2300];
48c02fde 3781 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5433383e 3782 blob = &qla_fw_blobs[FW_ISP2322];
4d4df193 3783 } else if (IS_QLA24XX_TYPE(ha)) {
5433383e 3784 blob = &qla_fw_blobs[FW_ISP24XX];
c3a2f0df
AV		 3785 } else if (IS_QLA25XX(ha)) {
3786 blob = &qla_fw_blobs[FW_ISP25XX];
3a03eb79
AV		 3787 } else if (IS_QLA81XX(ha)) {
3788 blob = &qla_fw_blobs[FW_ISP81XX];
a9083016
GM		 3789 } else if (IS_QLA82XX(ha)) {
3790 blob = &qla_fw_blobs[FW_ISP82XX];
5433383e
AV		 3791 }
3792
e1e82b6f 3793 mutex_lock(&qla_fw_lock);
5433383e
AV		 3794 if (blob->fw)
3795 goto out;
3796
3797 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3798 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
e315cd28 3799 "(%s).\n", vha->host_no, blob->name));
5433383e
AV		 3800 blob->fw = NULL;
3801 blob = NULL;
3802 goto out;
3803 }
3804
3805out:
e1e82b6f 3806 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3807 return blob;
3808}
3809
3810static void
3811qla2x00_release_firmware(void)
3812{
3813 int idx;
3814
e1e82b6f 3815 mutex_lock(&qla_fw_lock);
5433383e
AV		 3816 for (idx = 0; idx < FW_BLOBS; idx++)
3817 if (qla_fw_blobs[idx].fw)
3818 release_firmware(qla_fw_blobs[idx].fw);
e1e82b6f 3819 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3820}
3821
14e660e6
SJ		 3822static pci_ers_result_t
3823qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3824{
85880801
AV		 3825 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3826 struct qla_hw_data *ha = vha->hw;
3827
3828 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3829 state));
b9b12f73 3830
14e660e6
SJ		 3831 switch (state) {
3832 case pci_channel_io_normal:
85880801 3833 ha->flags.eeh_busy = 0;
14e660e6
SJ		 3834 return PCI_ERS_RESULT_CAN_RECOVER;
3835 case pci_channel_io_frozen:
85880801 3836 ha->flags.eeh_busy = 1;
a5b36321
LC		 3837 /* For ISP82XX complete any pending mailbox cmd */
3838 if (IS_QLA82XX(ha)) {
7190575f 3839 ha->flags.isp82xx_fw_hung = 1;
a5b36321
LC		 3840 if (ha->flags.mbox_busy) {
3841 ha->flags.mbox_int = 1;
3842 DEBUG2(qla_printk(KERN_ERR, ha,
3843 "Due to pci channel io frozen, doing premature "
3844 "completion of mbx command\n"));
3845 complete(&ha->mbx_intr_comp);
3846 }
3847 }
90a86fc0 3848 qla2x00_free_irqs(vha);
14e660e6 3849 pci_disable_device(pdev);
bddd2d65
LC		 3850 /* Return back all IOs */
3851 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
14e660e6
SJ		 3852 return PCI_ERS_RESULT_NEED_RESET;
3853 case pci_channel_io_perm_failure:
85880801
AV		 3854 ha->flags.pci_channel_io_perm_failure = 1;
3855 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
14e660e6
SJ		 3856 return PCI_ERS_RESULT_DISCONNECT;
3857 }
3858 return PCI_ERS_RESULT_NEED_RESET;
3859}
3860
3861static pci_ers_result_t
3862qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3863{
3864 int risc_paused = 0;
3865 uint32_t stat;
3866 unsigned long flags;
e315cd28
AC		 3867 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3868 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 3869 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3870 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3871
bcc5b6d3
SK		 3872 if (IS_QLA82XX(ha))
3873 return PCI_ERS_RESULT_RECOVERED;
3874
14e660e6
SJ		 3875 spin_lock_irqsave(&ha->hardware_lock, flags);
3876 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3877 stat = RD_REG_DWORD(&reg->hccr);
3878 if (stat & HCCR_RISC_PAUSE)
3879 risc_paused = 1;
3880 } else if (IS_QLA23XX(ha)) {
3881 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
3882 if (stat & HSR_RISC_PAUSED)
3883 risc_paused = 1;
3884 } else if (IS_FWI2_CAPABLE(ha)) {
3885 stat = RD_REG_DWORD(&reg24->host_status);
3886 if (stat & HSRX_RISC_PAUSED)
3887 risc_paused = 1;
3888 }
3889 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3890
3891 if (risc_paused) {
3892 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3893 "Dumping firmware!\n");
e315cd28 3894 ha->isp_ops->fw_dump(base_vha, 0);
14e660e6
SJ		 3895
3896 return PCI_ERS_RESULT_NEED_RESET;
3897 } else
3898 return PCI_ERS_RESULT_RECOVERED;
3899}
3900
a5b36321
LC		 3901uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
3902{
3903 uint32_t rval = QLA_FUNCTION_FAILED;
3904 uint32_t drv_active = 0;
3905 struct qla_hw_data *ha = base_vha->hw;
3906 int fn;
3907 struct pci_dev *other_pdev = NULL;
3908
3909 DEBUG17(qla_printk(KERN_INFO, ha,
3910 "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
3911
3912 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3913
3914 if (base_vha->flags.online) {
3915 /* Abort all outstanding commands,
3916 * so as to be requeued later */
3917 qla2x00_abort_isp_cleanup(base_vha);
3918 }
3919
3920
3921 fn = PCI_FUNC(ha->pdev->devfn);
3922 while (fn > 0) {
3923 fn--;
3924 DEBUG17(qla_printk(KERN_INFO, ha,
3925 "Finding pci device at function = 0x%x\n", fn));
3926 other_pdev =
3927 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
3928 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
3929 fn));
3930
3931 if (!other_pdev)
3932 continue;
3933 if (atomic_read(&other_pdev->enable_cnt)) {
3934 DEBUG17(qla_printk(KERN_INFO, ha,
25985edc 3935 "Found PCI func available and enabled at 0x%x\n",
a5b36321
LC		 3936 fn));
3937 pci_dev_put(other_pdev);
3938 break;
3939 }
3940 pci_dev_put(other_pdev);
3941 }
3942
3943 if (!fn) {
3944 /* Reset owner */
3945 DEBUG17(qla_printk(KERN_INFO, ha,
3946 "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
3947 qla82xx_idc_lock(ha);
3948
3949 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3950 QLA82XX_DEV_INITIALIZING);
3951
3952 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
3953 QLA82XX_IDC_VERSION);
3954
3955 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
3956 DEBUG17(qla_printk(KERN_INFO, ha,
3957 "drv_active = 0x%x\n", drv_active));
3958
3959 qla82xx_idc_unlock(ha);
3960 /* Reset if device is not already reset
3961 * drv_active would be 0 if a reset has already been done
3962 */
3963 if (drv_active)
3964 rval = qla82xx_start_firmware(base_vha);
3965 else
3966 rval = QLA_SUCCESS;
3967 qla82xx_idc_lock(ha);
3968
3969 if (rval != QLA_SUCCESS) {
3970 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
3971 qla82xx_clear_drv_active(ha);
3972 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3973 QLA82XX_DEV_FAILED);
3974 } else {
3975 qla_printk(KERN_INFO, ha, "HW State: READY\n");
3976 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3977 QLA82XX_DEV_READY);
3978 qla82xx_idc_unlock(ha);
7190575f 3979 ha->flags.isp82xx_fw_hung = 0;
a5b36321
LC		 3980 rval = qla82xx_restart_isp(base_vha);
3981 qla82xx_idc_lock(ha);
3982 /* Clear driver state register */
3983 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
3984 qla82xx_set_drv_active(base_vha);
3985 }
3986 qla82xx_idc_unlock(ha);
3987 } else {
3988 DEBUG17(qla_printk(KERN_INFO, ha,
3989 "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
3990 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
3991 QLA82XX_DEV_READY)) {
7190575f 3992 ha->flags.isp82xx_fw_hung = 0;
a5b36321
LC		 3993 rval = qla82xx_restart_isp(base_vha);
3994 qla82xx_idc_lock(ha);
3995 qla82xx_set_drv_active(base_vha);
3996 qla82xx_idc_unlock(ha);
3997 }
3998 }
3999 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4000
4001 return rval;
4002}
4003
14e660e6
SJ		 4004static pci_ers_result_t
4005qla2xxx_pci_slot_reset(struct pci_dev *pdev)
4006{
4007 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
e315cd28
AC		 4008 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4009 struct qla_hw_data *ha = base_vha->hw;
90a86fc0
JC		 4010 struct rsp_que *rsp;
4011 int rc, retries = 10;
09483916 4012
85880801
AV		 4013 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
4014
90a86fc0
JC		 4015 /* Workaround: qla2xxx driver which access hardware earlier
4016 * needs error state to be pci_channel_io_online.
4017 * Otherwise mailbox command timesout.
4018 */
4019 pdev->error_state = pci_channel_io_normal;
4020
4021 pci_restore_state(pdev);
4022
8c1496bd
RL		 4023 /* pci_restore_state() clears the saved_state flag of the device
4024 * save restored state which resets saved_state flag
4025 */
4026 pci_save_state(pdev);
4027
09483916
BH		 4028 if (ha->mem_only)
4029 rc = pci_enable_device_mem(pdev);
4030 else
4031 rc = pci_enable_device(pdev);
14e660e6 4032
09483916 4033 if (rc) {
14e660e6
SJ		 4034 qla_printk(KERN_WARNING, ha,
4035 "Can't re-enable PCI device after reset.\n");
a5b36321 4036 goto exit_slot_reset;
14e660e6 4037 }
14e660e6 4038
90a86fc0
JC		 4039 rsp = ha->rsp_q_map[0];
4040 if (qla2x00_request_irqs(ha, rsp))
a5b36321 4041 goto exit_slot_reset;
90a86fc0 4042
e315cd28 4043 if (ha->isp_ops->pci_config(base_vha))
a5b36321
LC		 4044 goto exit_slot_reset;
4045
4046 if (IS_QLA82XX(ha)) {
4047 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4048 ret = PCI_ERS_RESULT_RECOVERED;
4049 goto exit_slot_reset;
4050 } else
4051 goto exit_slot_reset;
4052 }
14e660e6 4053
90a86fc0
JC		 4054 while (ha->flags.mbox_busy && retries--)
4055 msleep(1000);
85880801 4056
e315cd28 4057 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 4058 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
14e660e6 4059 ret = PCI_ERS_RESULT_RECOVERED;
e315cd28 4060 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
14e660e6 4061
90a86fc0 4062
a5b36321 4063exit_slot_reset:
85880801
AV		 4064 DEBUG17(qla_printk(KERN_WARNING, ha,
4065 "slot_reset-return:ret=%x\n", ret));
4066
14e660e6
SJ		 4067 return ret;
4068}
4069
4070static void
4071qla2xxx_pci_resume(struct pci_dev *pdev)
4072{
e315cd28
AC		 4073 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4074 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 4075 int ret;
4076
85880801
AV		 4077 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
4078
e315cd28 4079 ret = qla2x00_wait_for_hba_online(base_vha);
14e660e6
SJ		 4080 if (ret != QLA_SUCCESS) {
4081 qla_printk(KERN_ERR, ha,
4082 "the device failed to resume I/O "
4083 "from slot/link_reset");
4084 }
85880801 4085
3e46f031
LC		 4086 pci_cleanup_aer_uncorrect_error_status(pdev);
4087
85880801 4088 ha->flags.eeh_busy = 0;
14e660e6
SJ		 4089}
4090
4091static struct pci_error_handlers qla2xxx_err_handler = {
4092 .error_detected = qla2xxx_pci_error_detected,
4093 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4094 .slot_reset = qla2xxx_pci_slot_reset,
4095 .resume = qla2xxx_pci_resume,
4096};
4097
5433383e 4098static struct pci_device_id qla2xxx_pci_tbl[] = {
47f5e069
AV		 4099 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4100 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4101 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4102 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4103 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4104 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4105 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4106 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4107 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4d4df193 4108 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
47f5e069
AV		 4109 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4110 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
c3a2f0df 4111 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
3a03eb79 4112 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
a9083016 4113 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5433383e
AV		 4114 { 0 },
4115};
4116MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4117
fca29703 4118static struct pci_driver qla2xxx_pci_driver = {
cb63067a 4119 .name = QLA2XXX_DRIVER_NAME,
0a21ef1e
JB		 4120 .driver = {
4121 .owner = THIS_MODULE,
4122 },
fca29703 4123 .id_table = qla2xxx_pci_tbl,
7ee61397 4124 .probe = qla2x00_probe_one,
4c993f76 4125 .remove = qla2x00_remove_one,
e30d1756 4126 .shutdown = qla2x00_shutdown,
14e660e6 4127 .err_handler = &qla2xxx_err_handler,
fca29703
AV		 4128};
4129
6a03b4cd
HZ		 4130static struct file_operations apidev_fops = {
4131 .owner = THIS_MODULE,
6038f373 4132 .llseek = noop_llseek,
6a03b4cd
HZ		 4133};
4134
1da177e4
LT		 4135/**
4136 * qla2x00_module_init - Module initialization.
4137 **/
4138static int __init
4139qla2x00_module_init(void)
4140{
fca29703
AV		 4141 int ret = 0;
4142
1da177e4 4143 /* Allocate cache for SRBs. */
354d6b21 4144 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
20c2df83 4145 SLAB_HWCACHE_ALIGN, NULL);
1da177e4
LT		 4146 if (srb_cachep == NULL) {
4147 printk(KERN_ERR
4148 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
4149 return -ENOMEM;
4150 }
4151
4152 /* Derive version string. */
4153 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
11010fec 4154 if (ql2xextended_error_logging)
0181944f
AV		 4155 strcat(qla2x00_version_str, "-debug");
4156
1c97a12a
AV		 4157 qla2xxx_transport_template =
4158 fc_attach_transport(&qla2xxx_transport_functions);
2c3dfe3f
SJ		 4159 if (!qla2xxx_transport_template) {
4160 kmem_cache_destroy(srb_cachep);
1da177e4 4161 return -ENODEV;
2c3dfe3f 4162 }
6a03b4cd
HZ		 4163
4164 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4165 if (apidev_major < 0) {
4166 printk(KERN_WARNING "qla2xxx: Unable to register char device "
4167 "%s\n", QLA2XXX_APIDEV);
4168 }
4169
2c3dfe3f
SJ		 4170 qla2xxx_transport_vport_template =
4171 fc_attach_transport(&qla2xxx_transport_vport_functions);
4172 if (!qla2xxx_transport_vport_template) {
4173 kmem_cache_destroy(srb_cachep);
4174 fc_release_transport(qla2xxx_transport_template);
1da177e4 4175 return -ENODEV;
2c3dfe3f 4176 }
1da177e4 4177
fd9a29f0
AV		 4178 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
4179 qla2x00_version_str);
7ee61397 4180 ret = pci_register_driver(&qla2xxx_pci_driver);
fca29703
AV		 4181 if (ret) {
4182 kmem_cache_destroy(srb_cachep);
4183 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4184 fc_release_transport(qla2xxx_transport_vport_template);
fca29703
AV		 4185 }
4186 return ret;
1da177e4
LT		 4187}
4188
4189/**
4190 * qla2x00_module_exit - Module cleanup.
4191 **/
4192static void __exit
4193qla2x00_module_exit(void)
4194{
6a03b4cd 4195 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7ee61397 4196 pci_unregister_driver(&qla2xxx_pci_driver);
5433383e 4197 qla2x00_release_firmware();
354d6b21 4198 kmem_cache_destroy(srb_cachep);
a9083016
GM		 4199 if (ctx_cachep)
4200 kmem_cache_destroy(ctx_cachep);
1da177e4 4201 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4202 fc_release_transport(qla2xxx_transport_vport_template);
1da177e4
LT		 4203}
4204
4205module_init(qla2x00_module_init);
4206module_exit(qla2x00_module_exit);
4207
4208MODULE_AUTHOR("QLogic Corporation");
4209MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4210MODULE_LICENSE("GPL");
4211MODULE_VERSION(QLA2XXX_VERSION);
bb8ee499
AV		 4212MODULE_FIRMWARE(FW_FILE_ISP21XX);
4213MODULE_FIRMWARE(FW_FILE_ISP22XX);
4214MODULE_FIRMWARE(FW_FILE_ISP2300);
4215MODULE_FIRMWARE(FW_FILE_ISP2322);
4216MODULE_FIRMWARE(FW_FILE_ISP24XX);
61623fc3 4217MODULE_FIRMWARE(FW_FILE_ISP25XX);
Linux kernel - Deliverables
This page took 0.898909 seconds and 5 git commands to generate.