projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
sun_esp: Convert to pure OF driver.
[deliverable/linux.git] / drivers / scsi / qlogicpti.c
CommitLineData
1da177e4
LT		 1/* qlogicpti.c: Performance Technologies QlogicISP sbus card driver.
2 *
3d4253d9 3 * Copyright (C) 1996, 2006 David S. Miller (davem@davemloft.net)
1da177e4
LT		 4 *
5 * A lot of this driver was directly stolen from Erik H. Moe's PCI
6 * Qlogic ISP driver. Mucho kudos to him for this code.
7 *
8 * An even bigger kudos to John Grana at Performance Technologies
9 * for providing me with the hardware to write this driver, you rule
10 * John you really do.
11 *
12 * May, 2, 1997: Added support for QLGC,isp --jj
13 */
14
15#include <linux/kernel.h>
16#include <linux/delay.h>
17#include <linux/types.h>
18#include <linux/string.h>
19#include <linux/slab.h>
20#include <linux/blkdev.h>
21#include <linux/proc_fs.h>
22#include <linux/stat.h>
23#include <linux/init.h>
24#include <linux/spinlock.h>
25#include <linux/interrupt.h>
26#include <linux/module.h>
60c904ae 27#include <linux/jiffies.h>
738f2b7b 28#include <linux/dma-mapping.h>
1da177e4
LT		 29
30#include <asm/byteorder.h>
31
32#include "qlogicpti.h"
33
34#include <asm/sbus.h>
35#include <asm/dma.h>
36#include <asm/system.h>
37#include <asm/ptrace.h>
38#include <asm/pgtable.h>
39#include <asm/oplib.h>
40#include <asm/io.h>
41#include <asm/irq.h>
42
43#include <scsi/scsi.h>
44#include <scsi/scsi_cmnd.h>
45#include <scsi/scsi_device.h>
46#include <scsi/scsi_eh.h>
1da177e4
LT		 47#include <scsi/scsi_tcq.h>
48#include <scsi/scsi_host.h>
49
1da177e4
LT		 50#define MAX_TARGETS 16
51#define MAX_LUNS 8 /* 32 for 1.31 F/W */
52
53#define DEFAULT_LOOP_COUNT 10000
54
55#include "qlogicpti_asm.c"
56
57static struct qlogicpti *qptichain = NULL;
58static DEFINE_SPINLOCK(qptichain_lock);
1da177e4
LT		 59
60#define PACKB(a, b) (((a)<<4)|(b))
61
62static const u_char mbox_param[] = {
63 PACKB(1, 1), /* MBOX_NO_OP */
64 PACKB(5, 5), /* MBOX_LOAD_RAM */
65 PACKB(2, 0), /* MBOX_EXEC_FIRMWARE */
66 PACKB(5, 5), /* MBOX_DUMP_RAM */
67 PACKB(3, 3), /* MBOX_WRITE_RAM_WORD */
68 PACKB(2, 3), /* MBOX_READ_RAM_WORD */
69 PACKB(6, 6), /* MBOX_MAILBOX_REG_TEST */
70 PACKB(2, 3), /* MBOX_VERIFY_CHECKSUM */
71 PACKB(1, 3), /* MBOX_ABOUT_FIRMWARE */
72 PACKB(0, 0), /* 0x0009 */
73 PACKB(0, 0), /* 0x000a */
74 PACKB(0, 0), /* 0x000b */
75 PACKB(0, 0), /* 0x000c */
76 PACKB(0, 0), /* 0x000d */
77 PACKB(1, 2), /* MBOX_CHECK_FIRMWARE */
78 PACKB(0, 0), /* 0x000f */
79 PACKB(5, 5), /* MBOX_INIT_REQ_QUEUE */
80 PACKB(6, 6), /* MBOX_INIT_RES_QUEUE */
81 PACKB(4, 4), /* MBOX_EXECUTE_IOCB */
82 PACKB(2, 2), /* MBOX_WAKE_UP */
83 PACKB(1, 6), /* MBOX_STOP_FIRMWARE */
84 PACKB(4, 4), /* MBOX_ABORT */
85 PACKB(2, 2), /* MBOX_ABORT_DEVICE */
86 PACKB(3, 3), /* MBOX_ABORT_TARGET */
87 PACKB(2, 2), /* MBOX_BUS_RESET */
88 PACKB(2, 3), /* MBOX_STOP_QUEUE */
89 PACKB(2, 3), /* MBOX_START_QUEUE */
90 PACKB(2, 3), /* MBOX_SINGLE_STEP_QUEUE */
91 PACKB(2, 3), /* MBOX_ABORT_QUEUE */
92 PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_STATUS */
93 PACKB(0, 0), /* 0x001e */
94 PACKB(1, 3), /* MBOX_GET_FIRMWARE_STATUS */
95 PACKB(1, 2), /* MBOX_GET_INIT_SCSI_ID */
96 PACKB(1, 2), /* MBOX_GET_SELECT_TIMEOUT */
97 PACKB(1, 3), /* MBOX_GET_RETRY_COUNT */
98 PACKB(1, 2), /* MBOX_GET_TAG_AGE_LIMIT */
99 PACKB(1, 2), /* MBOX_GET_CLOCK_RATE */
100 PACKB(1, 2), /* MBOX_GET_ACT_NEG_STATE */
101 PACKB(1, 2), /* MBOX_GET_ASYNC_DATA_SETUP_TIME */
102 PACKB(1, 3), /* MBOX_GET_SBUS_PARAMS */
103 PACKB(2, 4), /* MBOX_GET_TARGET_PARAMS */
104 PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_PARAMS */
105 PACKB(0, 0), /* 0x002a */
106 PACKB(0, 0), /* 0x002b */
107 PACKB(0, 0), /* 0x002c */
108 PACKB(0, 0), /* 0x002d */
109 PACKB(0, 0), /* 0x002e */
110 PACKB(0, 0), /* 0x002f */
111 PACKB(2, 2), /* MBOX_SET_INIT_SCSI_ID */
112 PACKB(2, 2), /* MBOX_SET_SELECT_TIMEOUT */
113 PACKB(3, 3), /* MBOX_SET_RETRY_COUNT */
114 PACKB(2, 2), /* MBOX_SET_TAG_AGE_LIMIT */
115 PACKB(2, 2), /* MBOX_SET_CLOCK_RATE */
116 PACKB(2, 2), /* MBOX_SET_ACTIVE_NEG_STATE */
117 PACKB(2, 2), /* MBOX_SET_ASYNC_DATA_SETUP_TIME */
118 PACKB(3, 3), /* MBOX_SET_SBUS_CONTROL_PARAMS */
119 PACKB(4, 4), /* MBOX_SET_TARGET_PARAMS */
120 PACKB(4, 4), /* MBOX_SET_DEV_QUEUE_PARAMS */
121 PACKB(0, 0), /* 0x003a */
122 PACKB(0, 0), /* 0x003b */
123 PACKB(0, 0), /* 0x003c */
124 PACKB(0, 0), /* 0x003d */
125 PACKB(0, 0), /* 0x003e */
126 PACKB(0, 0), /* 0x003f */
127 PACKB(0, 0), /* 0x0040 */
128 PACKB(0, 0), /* 0x0041 */
129 PACKB(0, 0) /* 0x0042 */
130};
131
6391a113 132#define MAX_MBOX_COMMAND ARRAY_SIZE(mbox_param)
1da177e4
LT		 133
134/* queue length's _must_ be power of two: */
135#define QUEUE_DEPTH(in, out, ql) ((in - out) & (ql))
136#define REQ_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, \
137 QLOGICPTI_REQ_QUEUE_LEN)
138#define RES_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, RES_QUEUE_LEN)
139
140static inline void qlogicpti_enable_irqs(struct qlogicpti *qpti)
141{
142 sbus_writew(SBUS_CTRL_ERIRQ | SBUS_CTRL_GENAB,
143 qpti->qregs + SBUS_CTRL);
144}
145
146static inline void qlogicpti_disable_irqs(struct qlogicpti *qpti)
147{
148 sbus_writew(0, qpti->qregs + SBUS_CTRL);
149}
150
151static inline void set_sbus_cfg1(struct qlogicpti *qpti)
152{
153 u16 val;
154 u8 bursts = qpti->bursts;
155
156#if 0 /* It appears that at least PTI cards do not support
157 * 64-byte bursts and that setting the B64 bit actually
158 * is a nop and the chip ends up using the smallest burst
159 * size. -DaveM
160 */
63237eeb 161 if (sbus_can_burst64() && (bursts & DMA_BURST64)) {
1da177e4
LT		 162 val = (SBUS_CFG1_BENAB | SBUS_CFG1_B64);
163 } else
164#endif
165 if (bursts & DMA_BURST32) {
166 val = (SBUS_CFG1_BENAB | SBUS_CFG1_B32);
167 } else if (bursts & DMA_BURST16) {
168 val = (SBUS_CFG1_BENAB | SBUS_CFG1_B16);
169 } else if (bursts & DMA_BURST8) {
170 val = (SBUS_CFG1_BENAB | SBUS_CFG1_B8);
171 } else {
172 val = 0; /* No sbus bursts for you... */
173 }
174 sbus_writew(val, qpti->qregs + SBUS_CFG1);
175}
176
177static int qlogicpti_mbox_command(struct qlogicpti *qpti, u_short param[], int force)
178{
179 int loop_count;
180 u16 tmp;
181
182 if (mbox_param[param[0]] == 0)
183 return 1;
184
185 /* Set SBUS semaphore. */
186 tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
187 tmp |= SBUS_SEMAPHORE_LCK;
188 sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
189
190 /* Wait for host IRQ bit to clear. */
191 loop_count = DEFAULT_LOOP_COUNT;
192 while (--loop_count && (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_HIRQ)) {
193 barrier();
194 cpu_relax();
195 }
196 if (!loop_count)
585a8a59
MF		 197 printk(KERN_EMERG "qlogicpti%d: mbox_command loop timeout #1\n",
198 qpti->qpti_id);
1da177e4
LT		 199
200 /* Write mailbox command registers. */
201 switch (mbox_param[param[0]] >> 4) {
202 case 6: sbus_writew(param[5], qpti->qregs + MBOX5);
203 case 5: sbus_writew(param[4], qpti->qregs + MBOX4);
204 case 4: sbus_writew(param[3], qpti->qregs + MBOX3);
205 case 3: sbus_writew(param[2], qpti->qregs + MBOX2);
206 case 2: sbus_writew(param[1], qpti->qregs + MBOX1);
207 case 1: sbus_writew(param[0], qpti->qregs + MBOX0);
208 }
209
210 /* Clear RISC interrupt. */
211 tmp = sbus_readw(qpti->qregs + HCCTRL);
212 tmp |= HCCTRL_CRIRQ;
213 sbus_writew(tmp, qpti->qregs + HCCTRL);
214
215 /* Clear SBUS semaphore. */
216 sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
217
218 /* Set HOST interrupt. */
219 tmp = sbus_readw(qpti->qregs + HCCTRL);
220 tmp |= HCCTRL_SHIRQ;
221 sbus_writew(tmp, qpti->qregs + HCCTRL);
222
223 /* Wait for HOST interrupt clears. */
224 loop_count = DEFAULT_LOOP_COUNT;
225 while (--loop_count &&
226 (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_CRIRQ))
227 udelay(20);
228 if (!loop_count)
585a8a59
MF		 229 printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #2\n",
230 qpti->qpti_id, param[0]);
1da177e4
LT		 231
232 /* Wait for SBUS semaphore to get set. */
233 loop_count = DEFAULT_LOOP_COUNT;
234 while (--loop_count &&
235 !(sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK)) {
236 udelay(20);
237
238 /* Workaround for some buggy chips. */
239 if (sbus_readw(qpti->qregs + MBOX0) & 0x4000)
240 break;
241 }
242 if (!loop_count)
585a8a59
MF		 243 printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #3\n",
244 qpti->qpti_id, param[0]);
1da177e4
LT		 245
246 /* Wait for MBOX busy condition to go away. */
247 loop_count = DEFAULT_LOOP_COUNT;
248 while (--loop_count && (sbus_readw(qpti->qregs + MBOX0) == 0x04))
249 udelay(20);
250 if (!loop_count)
585a8a59
MF		 251 printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #4\n",
252 qpti->qpti_id, param[0]);
1da177e4
LT		 253
254 /* Read back output parameters. */
255 switch (mbox_param[param[0]] & 0xf) {
256 case 6: param[5] = sbus_readw(qpti->qregs + MBOX5);
257 case 5: param[4] = sbus_readw(qpti->qregs + MBOX4);
258 case 4: param[3] = sbus_readw(qpti->qregs + MBOX3);
259 case 3: param[2] = sbus_readw(qpti->qregs + MBOX2);
260 case 2: param[1] = sbus_readw(qpti->qregs + MBOX1);
261 case 1: param[0] = sbus_readw(qpti->qregs + MBOX0);
262 }
263
264 /* Clear RISC interrupt. */
265 tmp = sbus_readw(qpti->qregs + HCCTRL);
266 tmp |= HCCTRL_CRIRQ;
267 sbus_writew(tmp, qpti->qregs + HCCTRL);
268
269 /* Release SBUS semaphore. */
270 tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
271 tmp &= ~(SBUS_SEMAPHORE_LCK);
272 sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
273
274 /* We're done. */
275 return 0;
276}
277
278static inline void qlogicpti_set_hostdev_defaults(struct qlogicpti *qpti)
279{
280 int i;
281
282 qpti->host_param.initiator_scsi_id = qpti->scsi_id;
283 qpti->host_param.bus_reset_delay = 3;
284 qpti->host_param.retry_count = 0;
285 qpti->host_param.retry_delay = 5;
286 qpti->host_param.async_data_setup_time = 3;
287 qpti->host_param.req_ack_active_negation = 1;
288 qpti->host_param.data_line_active_negation = 1;
289 qpti->host_param.data_dma_burst_enable = 1;
290 qpti->host_param.command_dma_burst_enable = 1;
291 qpti->host_param.tag_aging = 8;
292 qpti->host_param.selection_timeout = 250;
293 qpti->host_param.max_queue_depth = 256;
294
295 for(i = 0; i < MAX_TARGETS; i++) {
296 /*
297 * disconnect, parity, arq, reneg on reset, and, oddly enough
298 * tags...the midlayer's notion of tagged support has to match
299 * our device settings, and since we base whether we enable a
300 * tag on a per-cmnd basis upon what the midlayer sez, we
301 * actually enable the capability here.
302 */
303 qpti->dev_param[i].device_flags = 0xcd;
304 qpti->dev_param[i].execution_throttle = 16;
305 if (qpti->ultra) {
306 qpti->dev_param[i].synchronous_period = 12;
307 qpti->dev_param[i].synchronous_offset = 8;
308 } else {
309 qpti->dev_param[i].synchronous_period = 25;
310 qpti->dev_param[i].synchronous_offset = 12;
311 }
312 qpti->dev_param[i].device_enable = 1;
313 }
1da177e4
LT		 314}
315
316static int qlogicpti_reset_hardware(struct Scsi_Host *host)
317{
318 struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
319 u_short param[6];
320 unsigned short risc_code_addr;
321 int loop_count, i;
322 unsigned long flags;
323
324 risc_code_addr = 0x1000; /* all load addresses are at 0x1000 */
325
326 spin_lock_irqsave(host->host_lock, flags);
327
328 sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
329
330 /* Only reset the scsi bus if it is not free. */
331 if (sbus_readw(qpti->qregs + CPU_PCTRL) & CPU_PCTRL_BSY) {
332 sbus_writew(CPU_ORIDE_RMOD, qpti->qregs + CPU_ORIDE);
333 sbus_writew(CPU_CMD_BRESET, qpti->qregs + CPU_CMD);
334 udelay(400);
335 }
336
337 sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
338 sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
339 sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
340
341 loop_count = DEFAULT_LOOP_COUNT;
342 while (--loop_count && ((sbus_readw(qpti->qregs + MBOX0) & 0xff) == 0x04))
343 udelay(20);
344 if (!loop_count)
585a8a59
MF		 345 printk(KERN_EMERG "qlogicpti%d: reset_hardware loop timeout\n",
346 qpti->qpti_id);
1da177e4
LT		 347
348 sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
349 set_sbus_cfg1(qpti);
350 qlogicpti_enable_irqs(qpti);
351
352 if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
353 qpti->ultra = 1;
354 sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
355 qpti->qregs + RISC_MTREG);
356 } else {
357 qpti->ultra = 0;
358 sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
359 qpti->qregs + RISC_MTREG);
360 }
361
362 /* reset adapter and per-device default values. */
363 /* do it after finding out whether we're ultra mode capable */
364 qlogicpti_set_hostdev_defaults(qpti);
365
366 /* Release the RISC processor. */
367 sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
368
369 /* Get RISC to start executing the firmware code. */
370 param[0] = MBOX_EXEC_FIRMWARE;
371 param[1] = risc_code_addr;
372 if (qlogicpti_mbox_command(qpti, param, 1)) {
373 printk(KERN_EMERG "qlogicpti%d: Cannot execute ISP firmware.\n",
374 qpti->qpti_id);
375 spin_unlock_irqrestore(host->host_lock, flags);
376 return 1;
377 }
378
379 /* Set initiator scsi ID. */
380 param[0] = MBOX_SET_INIT_SCSI_ID;
381 param[1] = qpti->host_param.initiator_scsi_id;
382 if (qlogicpti_mbox_command(qpti, param, 1) ||
383 (param[0] != MBOX_COMMAND_COMPLETE)) {
384 printk(KERN_EMERG "qlogicpti%d: Cannot set initiator SCSI ID.\n",
385 qpti->qpti_id);
386 spin_unlock_irqrestore(host->host_lock, flags);
387 return 1;
388 }
389
390 /* Initialize state of the queues, both hw and sw. */
391 qpti->req_in_ptr = qpti->res_out_ptr = 0;
392
393 param[0] = MBOX_INIT_RES_QUEUE;
394 param[1] = RES_QUEUE_LEN + 1;
395 param[2] = (u_short) (qpti->res_dvma >> 16);
396 param[3] = (u_short) (qpti->res_dvma & 0xffff);
397 param[4] = param[5] = 0;
398 if (qlogicpti_mbox_command(qpti, param, 1)) {
399 printk(KERN_EMERG "qlogicpti%d: Cannot init response queue.\n",
400 qpti->qpti_id);
401 spin_unlock_irqrestore(host->host_lock, flags);
402 return 1;
403 }
404
405 param[0] = MBOX_INIT_REQ_QUEUE;
406 param[1] = QLOGICPTI_REQ_QUEUE_LEN + 1;
407 param[2] = (u_short) (qpti->req_dvma >> 16);
408 param[3] = (u_short) (qpti->req_dvma & 0xffff);
409 param[4] = param[5] = 0;
410 if (qlogicpti_mbox_command(qpti, param, 1)) {
411 printk(KERN_EMERG "qlogicpti%d: Cannot init request queue.\n",
412 qpti->qpti_id);
413 spin_unlock_irqrestore(host->host_lock, flags);
414 return 1;
415 }
416
417 param[0] = MBOX_SET_RETRY_COUNT;
418 param[1] = qpti->host_param.retry_count;
419 param[2] = qpti->host_param.retry_delay;
420 qlogicpti_mbox_command(qpti, param, 0);
421
422 param[0] = MBOX_SET_TAG_AGE_LIMIT;
423 param[1] = qpti->host_param.tag_aging;
424 qlogicpti_mbox_command(qpti, param, 0);
425
426 for (i = 0; i < MAX_TARGETS; i++) {
427 param[0] = MBOX_GET_DEV_QUEUE_PARAMS;
428 param[1] = (i << 8);
429 qlogicpti_mbox_command(qpti, param, 0);
430 }
431
432 param[0] = MBOX_GET_FIRMWARE_STATUS;
433 qlogicpti_mbox_command(qpti, param, 0);
434
435 param[0] = MBOX_SET_SELECT_TIMEOUT;
436 param[1] = qpti->host_param.selection_timeout;
437 qlogicpti_mbox_command(qpti, param, 0);
438
439 for (i = 0; i < MAX_TARGETS; i++) {
440 param[0] = MBOX_SET_TARGET_PARAMS;
441 param[1] = (i << 8);
442 param[2] = (qpti->dev_param[i].device_flags << 8);
443 /*
444 * Since we're now loading 1.31 f/w, force narrow/async.
445 */
446 param[2] |= 0xc0;
447 param[3] = 0; /* no offset, we do not have sync mode yet */
448 qlogicpti_mbox_command(qpti, param, 0);
449 }
450
451 /*
452 * Always (sigh) do an initial bus reset (kicks f/w).
453 */
454 param[0] = MBOX_BUS_RESET;
455 param[1] = qpti->host_param.bus_reset_delay;
456 qlogicpti_mbox_command(qpti, param, 0);
457 qpti->send_marker = 1;
458
459 spin_unlock_irqrestore(host->host_lock, flags);
460 return 0;
461}
462
463#define PTI_RESET_LIMIT 400
464
b48194bf 465static int __devinit qlogicpti_load_firmware(struct qlogicpti *qpti)
1da177e4
LT		 466{
467 struct Scsi_Host *host = qpti->qhost;
468 unsigned short csum = 0;
469 unsigned short param[6];
470 unsigned short *risc_code, risc_code_addr, risc_code_length;
471 unsigned long flags;
472 int i, timeout;
473
474 risc_code = &sbus_risc_code01[0];
475 risc_code_addr = 0x1000; /* all f/w modules load at 0x1000 */
476 risc_code_length = sbus_risc_code_length01;
477
478 spin_lock_irqsave(host->host_lock, flags);
479
480 /* Verify the checksum twice, one before loading it, and once
481 * afterwards via the mailbox commands.
482 */
483 for (i = 0; i < risc_code_length; i++)
484 csum += risc_code[i];
485 if (csum) {
486 spin_unlock_irqrestore(host->host_lock, flags);
487 printk(KERN_EMERG "qlogicpti%d: Aieee, firmware checksum failed!",
488 qpti->qpti_id);
489 return 1;
490 }
491 sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
492 sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
493 sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
494 timeout = PTI_RESET_LIMIT;
495 while (--timeout && (sbus_readw(qpti->qregs + SBUS_CTRL) & SBUS_CTRL_RESET))
496 udelay(20);
497 if (!timeout) {
498 spin_unlock_irqrestore(host->host_lock, flags);
499 printk(KERN_EMERG "qlogicpti%d: Cannot reset the ISP.", qpti->qpti_id);
500 return 1;
501 }
502
503 sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
504 mdelay(1);
505
506 sbus_writew((SBUS_CTRL_GENAB | SBUS_CTRL_ERIRQ), qpti->qregs + SBUS_CTRL);
507 set_sbus_cfg1(qpti);
508 sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
509
510 if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
511 qpti->ultra = 1;
512 sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
513 qpti->qregs + RISC_MTREG);
514 } else {
515 qpti->ultra = 0;
516 sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
517 qpti->qregs + RISC_MTREG);
518 }
519
520 sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
521
522 /* Pin lines are only stable while RISC is paused. */
523 sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
524 if (sbus_readw(qpti->qregs + CPU_PDIFF) & CPU_PDIFF_MODE)
525 qpti->differential = 1;
526 else
527 qpti->differential = 0;
528 sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
529
530 /* This shouldn't be necessary- we've reset things so we should be
531 running from the ROM now.. */
532
533 param[0] = MBOX_STOP_FIRMWARE;
534 param[1] = param[2] = param[3] = param[4] = param[5] = 0;
535 if (qlogicpti_mbox_command(qpti, param, 1)) {
536 printk(KERN_EMERG "qlogicpti%d: Cannot stop firmware for reload.\n",
537 qpti->qpti_id);
538 spin_unlock_irqrestore(host->host_lock, flags);
539 return 1;
540 }
541
542 /* Load it up.. */
543 for (i = 0; i < risc_code_length; i++) {
544 param[0] = MBOX_WRITE_RAM_WORD;
545 param[1] = risc_code_addr + i;
546 param[2] = risc_code[i];
547 if (qlogicpti_mbox_command(qpti, param, 1) ||
548 param[0] != MBOX_COMMAND_COMPLETE) {
549 printk("qlogicpti%d: Firmware dload failed, I'm bolixed!\n",
550 qpti->qpti_id);
551 spin_unlock_irqrestore(host->host_lock, flags);
552 return 1;
553 }
554 }
555
556 /* Reset the ISP again. */
557 sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
558 mdelay(1);
559
560 qlogicpti_enable_irqs(qpti);
561 sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
562 sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
563
564 /* Ask ISP to verify the checksum of the new code. */
565 param[0] = MBOX_VERIFY_CHECKSUM;
566 param[1] = risc_code_addr;
567 if (qlogicpti_mbox_command(qpti, param, 1) ||
568 (param[0] != MBOX_COMMAND_COMPLETE)) {
569 printk(KERN_EMERG "qlogicpti%d: New firmware csum failure!\n",
570 qpti->qpti_id);
571 spin_unlock_irqrestore(host->host_lock, flags);
572 return 1;
573 }
574
575 /* Start using newly downloaded firmware. */
576 param[0] = MBOX_EXEC_FIRMWARE;
577 param[1] = risc_code_addr;
578 qlogicpti_mbox_command(qpti, param, 1);
579
580 param[0] = MBOX_ABOUT_FIRMWARE;
581 if (qlogicpti_mbox_command(qpti, param, 1) ||
582 (param[0] != MBOX_COMMAND_COMPLETE)) {
583 printk(KERN_EMERG "qlogicpti%d: AboutFirmware cmd fails.\n",
584 qpti->qpti_id);
585 spin_unlock_irqrestore(host->host_lock, flags);
586 return 1;
587 }
588
589 /* Snag the major and minor revisions from the result. */
590 qpti->fware_majrev = param[1];
591 qpti->fware_minrev = param[2];
592 qpti->fware_micrev = param[3];
593
594 /* Set the clock rate */
595 param[0] = MBOX_SET_CLOCK_RATE;
596 param[1] = qpti->clock;
597 if (qlogicpti_mbox_command(qpti, param, 1) ||
598 (param[0] != MBOX_COMMAND_COMPLETE)) {
599 printk(KERN_EMERG "qlogicpti%d: could not set clock rate.\n",
600 qpti->qpti_id);
601 spin_unlock_irqrestore(host->host_lock, flags);
602 return 1;
603 }
604
605 if (qpti->is_pti != 0) {
606 /* Load scsi initiator ID and interrupt level into sbus static ram. */
607 param[0] = MBOX_WRITE_RAM_WORD;
608 param[1] = 0xff80;
609 param[2] = (unsigned short) qpti->scsi_id;
610 qlogicpti_mbox_command(qpti, param, 1);
611
612 param[0] = MBOX_WRITE_RAM_WORD;
613 param[1] = 0xff00;
614 param[2] = (unsigned short) 3;
615 qlogicpti_mbox_command(qpti, param, 1);
616 }
617
618 spin_unlock_irqrestore(host->host_lock, flags);
619 return 0;
620}
621
622static int qlogicpti_verify_tmon(struct qlogicpti *qpti)
623{
624 int curstat = sbus_readb(qpti->sreg);
625
626 curstat &= 0xf0;
627 if (!(curstat & SREG_FUSE) && (qpti->swsreg & SREG_FUSE))
628 printk("qlogicpti%d: Fuse returned to normal state.\n", qpti->qpti_id);
629 if (!(curstat & SREG_TPOWER) && (qpti->swsreg & SREG_TPOWER))
630 printk("qlogicpti%d: termpwr back to normal state.\n", qpti->qpti_id);
631 if (curstat != qpti->swsreg) {
632 int error = 0;
633 if (curstat & SREG_FUSE) {
634 error++;
635 printk("qlogicpti%d: Fuse is open!\n", qpti->qpti_id);
636 }
637 if (curstat & SREG_TPOWER) {
638 error++;
639 printk("qlogicpti%d: termpwr failure\n", qpti->qpti_id);
640 }
641 if (qpti->differential &&
642 (curstat & SREG_DSENSE) != SREG_DSENSE) {
643 error++;
644 printk("qlogicpti%d: You have a single ended device on a "
645 "differential bus! Please fix!\n", qpti->qpti_id);
646 }
647 qpti->swsreg = curstat;
648 return error;
649 }
650 return 0;
651}
652
7d12e780 653static irqreturn_t qpti_intr(int irq, void *dev_id);
1da177e4 654
cfb37ae1 655static void __devinit qpti_chain_add(struct qlogicpti *qpti)
1da177e4
LT		 656{
657 spin_lock_irq(&qptichain_lock);
658 if (qptichain != NULL) {
659 struct qlogicpti *qlink = qptichain;
660
661 while(qlink->next)
662 qlink = qlink->next;
663 qlink->next = qpti;
664 } else {
665 qptichain = qpti;
666 }
667 qpti->next = NULL;
668 spin_unlock_irq(&qptichain_lock);
669}
670
cfb37ae1 671static void __devexit qpti_chain_del(struct qlogicpti *qpti)
1da177e4
LT		 672{
673 spin_lock_irq(&qptichain_lock);
674 if (qptichain == qpti) {
675 qptichain = qpti->next;
676 } else {
677 struct qlogicpti *qlink = qptichain;
678 while(qlink->next != qpti)
679 qlink = qlink->next;
680 qlink->next = qpti->next;
681 }
682 qpti->next = NULL;
683 spin_unlock_irq(&qptichain_lock);
684}
685
cfb37ae1 686static int __devinit qpti_map_regs(struct qlogicpti *qpti)
1da177e4
LT		 687{
688 struct sbus_dev *sdev = qpti->sdev;
689
690 qpti->qregs = sbus_ioremap(&sdev->resource[0], 0,
691 sdev->reg_addrs[0].reg_size,
692 "PTI Qlogic/ISP");
693 if (!qpti->qregs) {
694 printk("PTI: Qlogic/ISP registers are unmappable\n");
695 return -1;
696 }
697 if (qpti->is_pti) {
698 qpti->sreg = sbus_ioremap(&sdev->resource[0], (16 * 4096),
699 sizeof(unsigned char),
700 "PTI Qlogic/ISP statreg");
701 if (!qpti->sreg) {
702 printk("PTI: Qlogic/ISP status register is unmappable\n");
703 return -1;
704 }
705 }
706 return 0;
707}
708
cfb37ae1 709static int __devinit qpti_register_irq(struct qlogicpti *qpti)
1da177e4
LT		 710{
711 struct sbus_dev *sdev = qpti->sdev;
712
713 qpti->qhost->irq = qpti->irq = sdev->irqs[0];
714
715 /* We used to try various overly-clever things to
716 * reduce the interrupt processing overhead on
717 * sun4c/sun4m when multiple PTI's shared the
718 * same IRQ. It was too complex and messy to
719 * sanely maintain.
720 */
721 if (request_irq(qpti->irq, qpti_intr,
1d6f359a 722 IRQF_SHARED, "Qlogic/PTI", qpti))
1da177e4
LT		 723 goto fail;
724
585a8a59 725 printk("qlogicpti%d: IRQ %d ", qpti->qpti_id, qpti->irq);
1da177e4
LT		 726
727 return 0;
728
729fail:
585a8a59 730 printk("qlogicpti%d: Cannot acquire irq line\n", qpti->qpti_id);
1da177e4
LT		 731 return -1;
732}
733
cfb37ae1 734static void __devinit qpti_get_scsi_id(struct qlogicpti *qpti)
1da177e4
LT		 735{
736 qpti->scsi_id = prom_getintdefault(qpti->prom_node,
737 "initiator-id",
738 -1);
739 if (qpti->scsi_id == -1)
740 qpti->scsi_id = prom_getintdefault(qpti->prom_node,
741 "scsi-initiator-id",
742 -1);
743 if (qpti->scsi_id == -1)
744 qpti->scsi_id =
745 prom_getintdefault(qpti->sdev->bus->prom_node,
746 "scsi-initiator-id", 7);
747 qpti->qhost->this_id = qpti->scsi_id;
748 qpti->qhost->max_sectors = 64;
749
750 printk("SCSI ID %d ", qpti->scsi_id);
751}
752
753static void qpti_get_bursts(struct qlogicpti *qpti)
754{
755 struct sbus_dev *sdev = qpti->sdev;
756 u8 bursts, bmask;
757
758 bursts = prom_getintdefault(qpti->prom_node, "burst-sizes", 0xff);
759 bmask = prom_getintdefault(sdev->bus->prom_node,
760 "burst-sizes", 0xff);
761 if (bmask != 0xff)
762 bursts &= bmask;
763 if (bursts == 0xff ||
764 (bursts & DMA_BURST16) == 0 ||
765 (bursts & DMA_BURST32) == 0)
766 bursts = (DMA_BURST32 - 1);
767
768 qpti->bursts = bursts;
769}
770
771static void qpti_get_clock(struct qlogicpti *qpti)
772{
773 unsigned int cfreq;
774
775 /* Check for what the clock input to this card is.
776 * Default to 40Mhz.
777 */
778 cfreq = prom_getintdefault(qpti->prom_node,"clock-frequency",40000000);
779 qpti->clock = (cfreq + 500000)/1000000;
780 if (qpti->clock == 0) /* bullshit */
781 qpti->clock = 40;
782}
783
784/* The request and response queues must each be aligned
785 * on a page boundary.
786 */
cfb37ae1 787static int __devinit qpti_map_queues(struct qlogicpti *qpti)
1da177e4
LT		 788{
789 struct sbus_dev *sdev = qpti->sdev;
790
791#define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
738f2b7b
DM		 792 qpti->res_cpu = dma_alloc_coherent(&sdev->ofdev.dev,
793 QSIZE(RES_QUEUE_LEN),
794 &qpti->res_dvma, GFP_ATOMIC);
1da177e4
LT		 795 if (qpti->res_cpu == NULL ||
796 qpti->res_dvma == 0) {
797 printk("QPTI: Cannot map response queue.\n");
798 return -1;
799 }
800
738f2b7b
DM		 801 qpti->req_cpu = dma_alloc_coherent(&sdev->ofdev.dev,
802 QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
803 &qpti->req_dvma, GFP_ATOMIC);
1da177e4
LT		 804 if (qpti->req_cpu == NULL ||
805 qpti->req_dvma == 0) {
738f2b7b
DM		 806 dma_free_coherent(&sdev->ofdev.dev, QSIZE(RES_QUEUE_LEN),
807 qpti->res_cpu, qpti->res_dvma);
1da177e4
LT		 808 printk("QPTI: Cannot map request queue.\n");
809 return -1;
810 }
811 memset(qpti->res_cpu, 0, QSIZE(RES_QUEUE_LEN));
812 memset(qpti->req_cpu, 0, QSIZE(QLOGICPTI_REQ_QUEUE_LEN));
813 return 0;
814}
815
1da177e4
LT		 816const char *qlogicpti_info(struct Scsi_Host *host)
817{
818 static char buf[80];
819 struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
820
c6387a48
DM		 821 sprintf(buf, "PTI Qlogic,ISP SBUS SCSI irq %d regs at %p",
822 qpti->qhost->irq, qpti->qregs);
1da177e4
LT		 823 return buf;
824}
825
826/* I am a certified frobtronicist. */
827static inline void marker_frob(struct Command_Entry *cmd)
828{
829 struct Marker_Entry *marker = (struct Marker_Entry *) cmd;
830
831 memset(marker, 0, sizeof(struct Marker_Entry));
832 marker->hdr.entry_cnt = 1;
833 marker->hdr.entry_type = ENTRY_MARKER;
834 marker->modifier = SYNC_ALL;
835 marker->rsvd = 0;
836}
837
838static inline void cmd_frob(struct Command_Entry *cmd, struct scsi_cmnd *Cmnd,
839 struct qlogicpti *qpti)
840{
841 memset(cmd, 0, sizeof(struct Command_Entry));
842 cmd->hdr.entry_cnt = 1;
843 cmd->hdr.entry_type = ENTRY_COMMAND;
844 cmd->target_id = Cmnd->device->id;
845 cmd->target_lun = Cmnd->device->lun;
846 cmd->cdb_length = Cmnd->cmd_len;
847 cmd->control_flags = 0;
848 if (Cmnd->device->tagged_supported) {
849 if (qpti->cmd_count[Cmnd->device->id] == 0)
850 qpti->tag_ages[Cmnd->device->id] = jiffies;
60c904ae 851 if (time_after(jiffies, qpti->tag_ages[Cmnd->device->id] + (5*HZ))) {
1da177e4
LT		 852 cmd->control_flags = CFLAG_ORDERED_TAG;
853 qpti->tag_ages[Cmnd->device->id] = jiffies;
854 } else
855 cmd->control_flags = CFLAG_SIMPLE_TAG;
856 }
857 if ((Cmnd->cmnd[0] == WRITE_6) ||
858 (Cmnd->cmnd[0] == WRITE_10) ||
859 (Cmnd->cmnd[0] == WRITE_12))
860 cmd->control_flags |= CFLAG_WRITE;
861 else
862 cmd->control_flags |= CFLAG_READ;
863 cmd->time_out = 30;
864 memcpy(cmd->cdb, Cmnd->cmnd, Cmnd->cmd_len);
865}
866
867/* Do it to it baby. */
868static inline int load_cmd(struct scsi_cmnd *Cmnd, struct Command_Entry *cmd,
869 struct qlogicpti *qpti, u_int in_ptr, u_int out_ptr)
870{
871 struct dataseg *ds;
2f08fe52 872 struct scatterlist *sg, *s;
1da177e4
LT		 873 int i, n;
874
dfb104ff 875 if (scsi_bufflen(Cmnd)) {
1da177e4
LT		 876 int sg_count;
877
dfb104ff 878 sg = scsi_sglist(Cmnd);
738f2b7b
DM		 879 sg_count = dma_map_sg(&qpti->sdev->ofdev.dev, sg,
880 scsi_sg_count(Cmnd),
881 Cmnd->sc_data_direction);
1da177e4
LT		 882
883 ds = cmd->dataseg;
884 cmd->segment_cnt = sg_count;
885
886 /* Fill in first four sg entries: */
887 n = sg_count;
888 if (n > 4)
889 n = 4;
2f08fe52
JA		 890 for_each_sg(sg, s, n, i) {
891 ds[i].d_base = sg_dma_address(s);
892 ds[i].d_count = sg_dma_len(s);
1da177e4
LT		 893 }
894 sg_count -= 4;
2f08fe52 895 sg = s;
1da177e4
LT		 896 while (sg_count > 0) {
897 struct Continuation_Entry *cont;
898
899 ++cmd->hdr.entry_cnt;
900 cont = (struct Continuation_Entry *) &qpti->req_cpu[in_ptr];
901 in_ptr = NEXT_REQ_PTR(in_ptr);
902 if (in_ptr == out_ptr)
903 return -1;
904
905 cont->hdr.entry_type = ENTRY_CONTINUATION;
906 cont->hdr.entry_cnt = 0;
907 cont->hdr.sys_def_1 = 0;
908 cont->hdr.flags = 0;
909 cont->reserved = 0;
910 ds = cont->dataseg;
911 n = sg_count;
912 if (n > 7)
913 n = 7;
2f08fe52
JA		 914 for_each_sg(sg, s, n, i) {
915 ds[i].d_base = sg_dma_address(s);
916 ds[i].d_count = sg_dma_len(s);
1da177e4
LT		 917 }
918 sg_count -= n;
919 }
1da177e4
LT		 920 } else {
921 cmd->dataseg[0].d_base = 0;
922 cmd->dataseg[0].d_count = 0;
923 cmd->segment_cnt = 1; /* Shouldn't this be 0? */
924 }
925
926 /* Committed, record Scsi_Cmd so we can find it later. */
927 cmd->handle = in_ptr;
928 qpti->cmd_slots[in_ptr] = Cmnd;
929
930 qpti->cmd_count[Cmnd->device->id]++;
931 sbus_writew(in_ptr, qpti->qregs + MBOX4);
932 qpti->req_in_ptr = in_ptr;
933
934 return in_ptr;
935}
936
937static inline void update_can_queue(struct Scsi_Host *host, u_int in_ptr, u_int out_ptr)
938{
939 /* Temporary workaround until bug is found and fixed (one bug has been found
940 already, but fixing it makes things even worse) -jj */
941 int num_free = QLOGICPTI_REQ_QUEUE_LEN - REQ_QUEUE_DEPTH(in_ptr, out_ptr) - 64;
942 host->can_queue = host->host_busy + num_free;
943 host->sg_tablesize = QLOGICPTI_MAX_SG(num_free);
944}
945
9ec76fbf 946static int qlogicpti_slave_configure(struct scsi_device *sdev)
f75884d2 947{
9ec76fbf
MW		 948 struct qlogicpti *qpti = shost_priv(sdev->host);
949 int tgt = sdev->id;
950 u_short param[6];
f75884d2 951
9ec76fbf
MW		 952 /* tags handled in midlayer */
953 /* enable sync mode? */
954 if (sdev->sdtr) {
955 qpti->dev_param[tgt].device_flags |= 0x10;
f75884d2 956 } else {
9ec76fbf
MW		 957 qpti->dev_param[tgt].synchronous_offset = 0;
958 qpti->dev_param[tgt].synchronous_period = 0;
f75884d2 959 }
9ec76fbf
MW		 960 /* are we wide capable? */
961 if (sdev->wdtr)
962 qpti->dev_param[tgt].device_flags |= 0x20;
963
964 param[0] = MBOX_SET_TARGET_PARAMS;
965 param[1] = (tgt << 8);
966 param[2] = (qpti->dev_param[tgt].device_flags << 8);
967 if (qpti->dev_param[tgt].device_flags & 0x10) {
968 param[3] = (qpti->dev_param[tgt].synchronous_offset << 8) |
969 qpti->dev_param[tgt].synchronous_period;
970 } else {
971 param[3] = 0;
1da177e4 972 }
9ec76fbf
MW		 973 qlogicpti_mbox_command(qpti, param, 0);
974 return 0;
1da177e4
LT		 975}
976
977/*
978 * The middle SCSI layer ensures that queuecommand never gets invoked
979 * concurrently with itself or the interrupt handler (though the
980 * interrupt handler may call this routine as part of
981 * request-completion handling).
982 *
983 * "This code must fly." -davem
984 */
985static int qlogicpti_queuecommand(struct scsi_cmnd *Cmnd, void (*done)(struct scsi_cmnd *))
986{
987 struct Scsi_Host *host = Cmnd->device->host;
988 struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
989 struct Command_Entry *cmd;
990 u_int out_ptr;
991 int in_ptr;
992
993 Cmnd->scsi_done = done;
994
995 in_ptr = qpti->req_in_ptr;
996 cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
997 out_ptr = sbus_readw(qpti->qregs + MBOX4);
998 in_ptr = NEXT_REQ_PTR(in_ptr);
999 if (in_ptr == out_ptr)
1000 goto toss_command;
1001
1002 if (qpti->send_marker) {
1003 marker_frob(cmd);
1004 qpti->send_marker = 0;
1005 if (NEXT_REQ_PTR(in_ptr) == out_ptr) {
1006 sbus_writew(in_ptr, qpti->qregs + MBOX4);
1007 qpti->req_in_ptr = in_ptr;
1008 goto toss_command;
1009 }
1010 cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
1011 in_ptr = NEXT_REQ_PTR(in_ptr);
1012 }
1013 cmd_frob(cmd, Cmnd, qpti);
1014 if ((in_ptr = load_cmd(Cmnd, cmd, qpti, in_ptr, out_ptr)) == -1)
1015 goto toss_command;
1016
1017 update_can_queue(host, in_ptr, out_ptr);
1018
1019 return 0;
1020
1021toss_command:
1022 printk(KERN_EMERG "qlogicpti%d: request queue overflow\n",
1023 qpti->qpti_id);
1024
1025 /* Unfortunately, unless you use the new EH code, which
1026 * we don't, the midlayer will ignore the return value,
1027 * which is insane. We pick up the pieces like this.
1028 */
1029 Cmnd->result = DID_BUS_BUSY;
1030 done(Cmnd);
1031 return 1;
1032}
1033
1034static int qlogicpti_return_status(struct Status_Entry *sts, int id)
1035{
1036 int host_status = DID_ERROR;
1037
1038 switch (sts->completion_status) {
1039 case CS_COMPLETE:
1040 host_status = DID_OK;
1041 break;
1042 case CS_INCOMPLETE:
1043 if (!(sts->state_flags & SF_GOT_BUS))
1044 host_status = DID_NO_CONNECT;
1045 else if (!(sts->state_flags & SF_GOT_TARGET))
1046 host_status = DID_BAD_TARGET;
1047 else if (!(sts->state_flags & SF_SENT_CDB))
1048 host_status = DID_ERROR;
1049 else if (!(sts->state_flags & SF_TRANSFERRED_DATA))
1050 host_status = DID_ERROR;
1051 else if (!(sts->state_flags & SF_GOT_STATUS))
1052 host_status = DID_ERROR;
1053 else if (!(sts->state_flags & SF_GOT_SENSE))
1054 host_status = DID_ERROR;
1055 break;
1056 case CS_DMA_ERROR:
1057 case CS_TRANSPORT_ERROR:
1058 host_status = DID_ERROR;
1059 break;
1060 case CS_RESET_OCCURRED:
1061 case CS_BUS_RESET:
1062 host_status = DID_RESET;
1063 break;
1064 case CS_ABORTED:
1065 host_status = DID_ABORT;
1066 break;
1067 case CS_TIMEOUT:
1068 host_status = DID_TIME_OUT;
1069 break;
1070 case CS_DATA_OVERRUN:
1071 case CS_COMMAND_OVERRUN:
1072 case CS_STATUS_OVERRUN:
1073 case CS_BAD_MESSAGE:
1074 case CS_NO_MESSAGE_OUT:
1075 case CS_EXT_ID_FAILED:
1076 case CS_IDE_MSG_FAILED:
1077 case CS_ABORT_MSG_FAILED:
1078 case CS_NOP_MSG_FAILED:
1079 case CS_PARITY_ERROR_MSG_FAILED:
1080 case CS_DEVICE_RESET_MSG_FAILED:
1081 case CS_ID_MSG_FAILED:
1082 case CS_UNEXP_BUS_FREE:
1083 host_status = DID_ERROR;
1084 break;
1085 case CS_DATA_UNDERRUN:
1086 host_status = DID_OK;
1087 break;
1088 default:
585a8a59 1089 printk(KERN_EMERG "qlogicpti%d: unknown completion status 0x%04x\n",
1da177e4
LT		 1090 id, sts->completion_status);
1091 host_status = DID_ERROR;
1092 break;
1093 }
1094
1095 return (sts->scsi_status & STATUS_MASK) | (host_status << 16);
1096}
1097
1098static struct scsi_cmnd *qlogicpti_intr_handler(struct qlogicpti *qpti)
1099{
1100 struct scsi_cmnd *Cmnd, *done_queue = NULL;
1101 struct Status_Entry *sts;
1102 u_int in_ptr, out_ptr;
1103
1104 if (!(sbus_readw(qpti->qregs + SBUS_STAT) & SBUS_STAT_RINT))
1105 return NULL;
1106
1107 in_ptr = sbus_readw(qpti->qregs + MBOX5);
1108 sbus_writew(HCCTRL_CRIRQ, qpti->qregs + HCCTRL);
1109 if (sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK) {
1110 switch (sbus_readw(qpti->qregs + MBOX0)) {
1111 case ASYNC_SCSI_BUS_RESET:
1112 case EXECUTION_TIMEOUT_RESET:
1113 qpti->send_marker = 1;
1114 break;
1115 case INVALID_COMMAND:
1116 case HOST_INTERFACE_ERROR:
1117 case COMMAND_ERROR:
1118 case COMMAND_PARAM_ERROR:
1119 break;
1120 };
1121 sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
1122 }
1123
1124 /* This looks like a network driver! */
1125 out_ptr = qpti->res_out_ptr;
1126 while (out_ptr != in_ptr) {
1127 u_int cmd_slot;
1128
1129 sts = (struct Status_Entry *) &qpti->res_cpu[out_ptr];
1130 out_ptr = NEXT_RES_PTR(out_ptr);
1131
1132 /* We store an index in the handle, not the pointer in
1133 * some form. This avoids problems due to the fact
1134 * that the handle provided is only 32-bits. -DaveM
1135 */
1136 cmd_slot = sts->handle;
1137 Cmnd = qpti->cmd_slots[cmd_slot];
1138 qpti->cmd_slots[cmd_slot] = NULL;
1139
1140 if (sts->completion_status == CS_RESET_OCCURRED ||
1141 sts->completion_status == CS_ABORTED ||
1142 (sts->status_flags & STF_BUS_RESET))
1143 qpti->send_marker = 1;
1144
1145 if (sts->state_flags & SF_GOT_SENSE)
1146 memcpy(Cmnd->sense_buffer, sts->req_sense_data,
b80ca4f7 1147 SCSI_SENSE_BUFFERSIZE);
1da177e4
LT		 1148
1149 if (sts->hdr.entry_type == ENTRY_STATUS)
1150 Cmnd->result =
1151 qlogicpti_return_status(sts, qpti->qpti_id);
1152 else
1153 Cmnd->result = DID_ERROR << 16;
1154
dfb104ff 1155 if (scsi_bufflen(Cmnd))
738f2b7b
DM		 1156 dma_unmap_sg(&qpti->sdev->ofdev.dev,
1157 scsi_sglist(Cmnd), scsi_sg_count(Cmnd),
1158 Cmnd->sc_data_direction);
dfb104ff 1159
1da177e4
LT		 1160 qpti->cmd_count[Cmnd->device->id]--;
1161 sbus_writew(out_ptr, qpti->qregs + MBOX5);
1162 Cmnd->host_scribble = (unsigned char *) done_queue;
1163 done_queue = Cmnd;
1164 }
1165 qpti->res_out_ptr = out_ptr;
1166
1167 return done_queue;
1168}
1169
7d12e780 1170static irqreturn_t qpti_intr(int irq, void *dev_id)
1da177e4
LT		 1171{
1172 struct qlogicpti *qpti = dev_id;
1173 unsigned long flags;
1174 struct scsi_cmnd *dq;
1175
1176 spin_lock_irqsave(qpti->qhost->host_lock, flags);
1177 dq = qlogicpti_intr_handler(qpti);
1178
1179 if (dq != NULL) {
1180 do {
1181 struct scsi_cmnd *next;
1182
1183 next = (struct scsi_cmnd *) dq->host_scribble;
1184 dq->scsi_done(dq);
1185 dq = next;
1186 } while (dq != NULL);
1187 }
1188 spin_unlock_irqrestore(qpti->qhost->host_lock, flags);
1189
1190 return IRQ_HANDLED;
1191}
1192
1193static int qlogicpti_abort(struct scsi_cmnd *Cmnd)
1194{
1195 u_short param[6];
1196 struct Scsi_Host *host = Cmnd->device->host;
1197 struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
1198 int return_status = SUCCESS;
1199 u32 cmd_cookie;
1200 int i;
1201
585a8a59
MF		 1202 printk(KERN_WARNING "qlogicpti%d: Aborting cmd for tgt[%d] lun[%d]\n",
1203 qpti->qpti_id, (int)Cmnd->device->id, (int)Cmnd->device->lun);
1da177e4
LT		 1204
1205 qlogicpti_disable_irqs(qpti);
1206
1207 /* Find the 32-bit cookie we gave to the firmware for
1208 * this command.
1209 */
1210 for (i = 0; i < QLOGICPTI_REQ_QUEUE_LEN + 1; i++)
1211 if (qpti->cmd_slots[i] == Cmnd)
1212 break;
1213 cmd_cookie = i;
1214
1215 param[0] = MBOX_ABORT;
1216 param[1] = (((u_short) Cmnd->device->id) << 8) | Cmnd->device->lun;
1217 param[2] = cmd_cookie >> 16;
1218 param[3] = cmd_cookie & 0xffff;
1219 if (qlogicpti_mbox_command(qpti, param, 0) ||
1220 (param[0] != MBOX_COMMAND_COMPLETE)) {
585a8a59
MF		 1221 printk(KERN_EMERG "qlogicpti%d: scsi abort failure: %x\n",
1222 qpti->qpti_id, param[0]);
1da177e4
LT		 1223 return_status = FAILED;
1224 }
1225
1226 qlogicpti_enable_irqs(qpti);
1227
1228 return return_status;
1229}
1230
1231static int qlogicpti_reset(struct scsi_cmnd *Cmnd)
1232{
1233 u_short param[6];
1234 struct Scsi_Host *host = Cmnd->device->host;
1235 struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
1236 int return_status = SUCCESS;
1237
585a8a59
MF		 1238 printk(KERN_WARNING "qlogicpti%d: Resetting SCSI bus!\n",
1239 qpti->qpti_id);
1da177e4
LT		 1240
1241 qlogicpti_disable_irqs(qpti);
1242
1243 param[0] = MBOX_BUS_RESET;
1244 param[1] = qpti->host_param.bus_reset_delay;
1245 if (qlogicpti_mbox_command(qpti, param, 0) ||
1246 (param[0] != MBOX_COMMAND_COMPLETE)) {
585a8a59
MF		 1247 printk(KERN_EMERG "qlogicisp%d: scsi bus reset failure: %x\n",
1248 qpti->qpti_id, param[0]);
1da177e4
LT		 1249 return_status = FAILED;
1250 }
1251
1252 qlogicpti_enable_irqs(qpti);
1253
1254 return return_status;
1255}
1256
3d4253d9
DM		 1257static struct scsi_host_template qpti_template = {
1258 .module = THIS_MODULE,
1259 .name = "qlogicpti",
1da177e4 1260 .info = qlogicpti_info,
9ec76fbf
MW		 1261 .queuecommand = qlogicpti_queuecommand,
1262 .slave_configure = qlogicpti_slave_configure,
1da177e4
LT		 1263 .eh_abort_handler = qlogicpti_abort,
1264 .eh_bus_reset_handler = qlogicpti_reset,
1265 .can_queue = QLOGICPTI_REQ_QUEUE_LEN,
1266 .this_id = 7,
1267 .sg_tablesize = QLOGICPTI_MAX_SG(QLOGICPTI_REQ_QUEUE_LEN),
1268 .cmd_per_lun = 1,
1269 .use_clustering = ENABLE_CLUSTERING,
1270};
1271
3d4253d9
DM		 1272static int __devinit qpti_sbus_probe(struct of_device *dev, const struct of_device_id *match)
1273{
1274 static int nqptis;
1275 struct sbus_dev *sdev = to_sbus_device(&dev->dev);
1276 struct device_node *dp = dev->node;
1277 struct scsi_host_template *tpnt = match->data;
1278 struct Scsi_Host *host;
1279 struct qlogicpti *qpti;
ccf0dec6 1280 const char *fcode;
3d4253d9
DM		 1281
1282 /* Sometimes Antares cards come up not completely
1283 * setup, and we get a report of a zero IRQ.
1284 */
1285 if (sdev->irqs[0] == 0)
1286 return -ENODEV;
1287
1288 host = scsi_host_alloc(tpnt, sizeof(struct qlogicpti));
1289 if (!host)
1290 return -ENOMEM;
1291
1292 qpti = (struct qlogicpti *) host->hostdata;
1293
1294 host->max_id = MAX_TARGETS;
1295 qpti->qhost = host;
1296 qpti->sdev = sdev;
1297 qpti->qpti_id = nqptis;
1298 qpti->prom_node = sdev->prom_node;
1299 strcpy(qpti->prom_name, sdev->ofdev.node->name);
1300 qpti->is_pti = strcmp(qpti->prom_name, "QLGC,isp");
1301
1302 if (qpti_map_regs(qpti) < 0)
1303 goto fail_unlink;
1304
1305 if (qpti_register_irq(qpti) < 0)
1306 goto fail_unmap_regs;
1307
1308 qpti_get_scsi_id(qpti);
1309 qpti_get_bursts(qpti);
1310 qpti_get_clock(qpti);
1311
1312 /* Clear out scsi_cmnd array. */
1313 memset(qpti->cmd_slots, 0, sizeof(qpti->cmd_slots));
1314
1315 if (qpti_map_queues(qpti) < 0)
1316 goto fail_free_irq;
1317
1318 /* Load the firmware. */
1319 if (qlogicpti_load_firmware(qpti))
1320 goto fail_unmap_queues;
1321 if (qpti->is_pti) {
1322 /* Check the PTI status reg. */
1323 if (qlogicpti_verify_tmon(qpti))
1324 goto fail_unmap_queues;
1325 }
1326
1327 /* Reset the ISP and init res/req queues. */
1328 if (qlogicpti_reset_hardware(host))
1329 goto fail_unmap_queues;
1330
3d4253d9
DM		 1331 printk("(Firmware v%d.%d.%d)", qpti->fware_majrev,
1332 qpti->fware_minrev, qpti->fware_micrev);
1333
1334 fcode = of_get_property(dp, "isp-fcode", NULL);
1335 if (fcode && fcode[0])
585a8a59 1336 printk("(FCode %s)", fcode);
3d4253d9
DM		 1337 if (of_find_property(dp, "differential", NULL) != NULL)
1338 qpti->differential = 1;
1339
585a8a59
MF		 1340 printk("\nqlogicpti%d: [%s Wide, using %s interface]\n",
1341 qpti->qpti_id,
3d4253d9
DM		 1342 (qpti->ultra ? "Ultra" : "Fast"),
1343 (qpti->differential ? "differential" : "single ended"));
1344
585a8a59
MF		 1345 if (scsi_add_host(host, &dev->dev)) {
1346 printk("qlogicpti%d: Failed scsi_add_host\n", qpti->qpti_id);
1347 goto fail_unmap_queues;
1348 }
1349
3d4253d9
DM		 1350 dev_set_drvdata(&sdev->ofdev.dev, qpti);
1351
1352 qpti_chain_add(qpti);
1353
1354 scsi_scan_host(host);
1355 nqptis++;
1356
1357 return 0;
1358
1359fail_unmap_queues:
1360#define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
738f2b7b
DM		 1361 dma_free_coherent(&qpti->sdev->ofdev.dev,
1362 QSIZE(RES_QUEUE_LEN),
1363 qpti->res_cpu, qpti->res_dvma);
1364 dma_free_coherent(&qpti->sdev->ofdev.dev,
1365 QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
1366 qpti->req_cpu, qpti->req_dvma);
3d4253d9
DM		 1367#undef QSIZE
1368
1369fail_unmap_regs:
1370 sbus_iounmap(qpti->qregs,
1371 qpti->sdev->reg_addrs[0].reg_size);
1372 if (qpti->is_pti)
1373 sbus_iounmap(qpti->sreg, sizeof(unsigned char));
1374
1375fail_free_irq:
1376 free_irq(qpti->irq, qpti);
1377
1378fail_unlink:
1379 scsi_host_put(host);
1380
1381 return -ENODEV;
1382}
1383
1384static int __devexit qpti_sbus_remove(struct of_device *dev)
1385{
1386 struct qlogicpti *qpti = dev_get_drvdata(&dev->dev);
1387
1388 qpti_chain_del(qpti);
1389
1390 scsi_remove_host(qpti->qhost);
1391
1392 /* Shut up the card. */
1393 sbus_writew(0, qpti->qregs + SBUS_CTRL);
1394
1395 /* Free IRQ handler and unmap Qlogic,ISP and PTI status regs. */
1396 free_irq(qpti->irq, qpti);
1397
1398#define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
738f2b7b
DM		 1399 dma_free_coherent(&qpti->sdev->ofdev.dev,
1400 QSIZE(RES_QUEUE_LEN),
1401 qpti->res_cpu, qpti->res_dvma);
1402 dma_free_coherent(&qpti->sdev->ofdev.dev,
1403 QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
1404 qpti->req_cpu, qpti->req_dvma);
3d4253d9
DM		 1405#undef QSIZE
1406
1407 sbus_iounmap(qpti->qregs, qpti->sdev->reg_addrs[0].reg_size);
1408 if (qpti->is_pti)
1409 sbus_iounmap(qpti->sreg, sizeof(unsigned char));
1410
1411 scsi_host_put(qpti->qhost);
1412
1413 return 0;
1414}
1415
1416static struct of_device_id qpti_match[] = {
1417 {
1418 .name = "ptisp",
1419 .data = &qpti_template,
1420 },
1421 {
1422 .name = "PTI,ptisp",
1423 .data = &qpti_template,
1424 },
1425 {
1426 .name = "QLGC,isp",
1427 .data = &qpti_template,
1428 },
1429 {
1430 .name = "SUNW,isp",
1431 .data = &qpti_template,
1432 },
1433 {},
1434};
1435MODULE_DEVICE_TABLE(of, qpti_match);
1436
1437static struct of_platform_driver qpti_sbus_driver = {
1438 .name = "qpti",
1439 .match_table = qpti_match,
1440 .probe = qpti_sbus_probe,
1441 .remove = __devexit_p(qpti_sbus_remove),
1442};
1da177e4 1443
3d4253d9
DM		 1444static int __init qpti_init(void)
1445{
1446 return of_register_driver(&qpti_sbus_driver, &sbus_bus_type);
1447}
1448
1449static void __exit qpti_exit(void)
1450{
1451 of_unregister_driver(&qpti_sbus_driver);
1452}
1da177e4 1453
3d4253d9
DM		 1454MODULE_DESCRIPTION("QlogicISP SBUS driver");
1455MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
1da177e4 1456MODULE_LICENSE("GPL");
3d4253d9 1457MODULE_VERSION("2.0");
1da177e4 1458
3d4253d9
DM		 1459module_init(qpti_init);
1460module_exit(qpti_exit);
Linux kernel - Deliverables
This page took 0.443191 seconds and 5 git commands to generate.