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1da177e4 LT |
1 | /* |
2 | * Trantor T128/T128F/T228 defines | |
3 | * Note : architecturally, the T100 and T128 are different and won't work | |
4 | * | |
5 | * Copyright 1993, Drew Eckhardt | |
6 | * Visionary Computing | |
7 | * (Unix and Linux consulting and custom programming) | |
8 | * drew@colorado.edu | |
9 | * +1 (303) 440-4894 | |
10 | * | |
667c667f | 11 | * For more information, please consult |
1da177e4 LT |
12 | * |
13 | * Trantor Systems, Ltd. | |
14 | * T128/T128F/T228 SCSI Host Adapter | |
15 | * Hardware Specifications | |
667c667f H |
16 | * |
17 | * Trantor Systems, Ltd. | |
1da177e4 LT |
18 | * 5415 Randall Place |
19 | * Fremont, CA 94538 | |
20 | * 1+ (415) 770-1400, FAX 1+ (415) 770-9910 | |
1da177e4 LT |
21 | */ |
22 | ||
1da177e4 LT |
23 | #ifndef T128_H |
24 | #define T128_H | |
25 | ||
1da177e4 | 26 | /* |
667c667f | 27 | * The trantor boards are memory mapped. They use an NCR5380 or |
1da177e4 | 28 | * equivalent (my sample board had part second sourced from ZILOG). |
667c667f | 29 | * NCR's recommended "Pseudo-DMA" architecture is used, where |
1da177e4 | 30 | * a PAL drives the DMA signals on the 5380 allowing fast, blind |
667c667f | 31 | * transfers with proper handshaking. |
1da177e4 LT |
32 | */ |
33 | ||
34 | /* | |
667c667f | 35 | * Note : a boot switch is provided for the purpose of informing the |
1da177e4 LT |
36 | * firmware to boot or not boot from attached SCSI devices. So, I imagine |
37 | * there are fewer people who've yanked the ROM like they do on the Seagate | |
38 | * to make bootup faster, and I'll probably use this for autodetection. | |
39 | */ | |
40 | #define T_ROM_OFFSET 0 | |
41 | ||
42 | /* | |
43 | * Note : my sample board *WAS NOT* populated with the SRAM, so this | |
44 | * can't be used for autodetection without a ROM present. | |
45 | */ | |
46 | #define T_RAM_OFFSET 0x1800 | |
47 | ||
48 | /* | |
49 | * All of the registers are allocated 32 bytes of address space, except | |
50 | * for the data register (read/write to/from the 5380 in pseudo-DMA mode) | |
51 | */ | |
52 | #define T_CONTROL_REG_OFFSET 0x1c00 /* rw */ | |
53 | #define T_CR_INT 0x10 /* Enable interrupts */ | |
54 | #define T_CR_CT 0x02 /* Reset watchdog timer */ | |
55 | ||
56 | #define T_STATUS_REG_OFFSET 0x1c20 /* ro */ | |
57 | #define T_ST_BOOT 0x80 /* Boot switch */ | |
58 | #define T_ST_S3 0x40 /* User settable switches, */ | |
59 | #define T_ST_S2 0x20 /* read 0 when switch is on, 1 off */ | |
60 | #define T_ST_S1 0x10 | |
61 | #define T_ST_PS2 0x08 /* Set for Microchannel 228 */ | |
62 | #define T_ST_RDY 0x04 /* 5380 DRQ */ | |
63 | #define T_ST_TIM 0x02 /* indicates 40us watchdog timer fired */ | |
64 | #define T_ST_ZERO 0x01 /* Always zero */ | |
65 | ||
66 | #define T_5380_OFFSET 0x1d00 /* 8 registers here, see NCR5380.h */ | |
67 | ||
68 | #define T_DATA_REG_OFFSET 0x1e00 /* rw 512 bytes long */ | |
69 | ||
1da177e4 LT |
70 | #define NCR5380_implementation_fields \ |
71 | void __iomem *base | |
72 | ||
54d8fe44 FT |
73 | #define T128_address(reg) \ |
74 | (((struct NCR5380_hostdata *)shost_priv(instance))->base + T_5380_OFFSET + ((reg) * 0x20)) | |
1da177e4 | 75 | |
1da177e4 LT |
76 | #define NCR5380_read(reg) readb(T128_address(reg)) |
77 | #define NCR5380_write(reg, value) writeb((value),(T128_address(reg))) | |
1da177e4 | 78 | |
ff3d4578 | 79 | #define NCR5380_dma_xfer_len(instance, cmd, phase) (cmd->transfersize) |
6c4b88ca FT |
80 | #define NCR5380_dma_recv_setup t128_pread |
81 | #define NCR5380_dma_send_setup t128_pwrite | |
8053b0ee | 82 | #define NCR5380_dma_residual(instance) (0) |
ff3d4578 | 83 | |
1da177e4 | 84 | #define NCR5380_intr t128_intr |
1da177e4 LT |
85 | #define NCR5380_queue_command t128_queue_command |
86 | #define NCR5380_abort t128_abort | |
1da177e4 | 87 | #define NCR5380_bus_reset t128_bus_reset |
8c32513b | 88 | #define NCR5380_info t128_info |
1da177e4 | 89 | |
e5d55d1a FT |
90 | #define NCR5380_io_delay(x) udelay(x) |
91 | ||
667c667f | 92 | /* 15 14 12 10 7 5 3 |
1da177e4 | 93 | 1101 0100 1010 1000 */ |
667c667f H |
94 | |
95 | #define T128_IRQS 0xc4a8 | |
1da177e4 | 96 | |
1da177e4 | 97 | #endif /* T128_H */ |