Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[deliverable/linux.git] / drivers / scsi / ufs / ufshcd.h
CommitLineData
e0eca63e
VH
1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
dc3c8d3a 6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
e0eca63e
VH
7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
48#include <linux/workqueue.h>
49#include <linux/errno.h>
50#include <linux/types.h>
51#include <linux/wait.h>
52#include <linux/bitops.h>
53#include <linux/pm_runtime.h>
54#include <linux/clk.h>
6ccf44fe 55#include <linux/completion.h>
aa497613 56#include <linux/regulator/consumer.h>
f37aabcf 57#include "unipro.h"
e0eca63e
VH
58
59#include <asm/irq.h>
60#include <asm/byteorder.h>
61#include <scsi/scsi.h>
62#include <scsi/scsi_cmnd.h>
63#include <scsi/scsi_host.h>
64#include <scsi/scsi_tcq.h>
65#include <scsi/scsi_dbg.h>
66#include <scsi/scsi_eh.h>
67
68#include "ufs.h"
69#include "ufshci.h"
70
71#define UFSHCD "ufshcd"
72#define UFSHCD_DRIVER_VERSION "0.2"
73
5c0c28a8
SRT
74struct ufs_hba;
75
5a0b0cb9
SRT
76enum dev_cmd_type {
77 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 78 DEV_CMD_TYPE_QUERY = 0x1,
5a0b0cb9
SRT
79};
80
e0eca63e
VH
81/**
82 * struct uic_command - UIC command structure
83 * @command: UIC command
84 * @argument1: UIC command argument 1
85 * @argument2: UIC command argument 2
86 * @argument3: UIC command argument 3
87 * @cmd_active: Indicate if UIC command is outstanding
88 * @result: UIC command result
6ccf44fe 89 * @done: UIC command completion
e0eca63e
VH
90 */
91struct uic_command {
92 u32 command;
93 u32 argument1;
94 u32 argument2;
95 u32 argument3;
96 int cmd_active;
97 int result;
6ccf44fe 98 struct completion done;
e0eca63e
VH
99};
100
57d104c1
SJ
101/* Used to differentiate the power management options */
102enum ufs_pm_op {
103 UFS_RUNTIME_PM,
104 UFS_SYSTEM_PM,
105 UFS_SHUTDOWN_PM,
106};
107
108#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
109#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
110#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
111
112/* Host <-> Device UniPro Link state */
113enum uic_link_state {
114 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
115 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
116 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
117};
118
119#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
120#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
121 UIC_LINK_ACTIVE_STATE)
122#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
123 UIC_LINK_HIBERN8_STATE)
124#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
125#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
126 UIC_LINK_ACTIVE_STATE)
127#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
128 UIC_LINK_HIBERN8_STATE)
129
130/*
131 * UFS Power management levels.
132 * Each level is in increasing order of power savings.
133 */
134enum ufs_pm_level {
135 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
136 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
137 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
138 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
139 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
141 UFS_PM_LVL_MAX
142};
143
144struct ufs_pm_lvl_states {
145 enum ufs_dev_pwr_mode dev_state;
146 enum uic_link_state link_state;
147};
148
e0eca63e
VH
149/**
150 * struct ufshcd_lrb - local reference block
151 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 152 * @ucd_req_ptr: UCD address of the command
e0eca63e
VH
153 * @ucd_rsp_ptr: Response UPIU address for this command
154 * @ucd_prdt_ptr: PRDT address of the command
155 * @cmd: pointer to SCSI command
156 * @sense_buffer: pointer to sense buffer address of the SCSI command
157 * @sense_bufflen: Length of the sense buffer
158 * @scsi_status: SCSI status of the command
159 * @command_type: SCSI, UFS, Query.
160 * @task_tag: Task tag of the command
161 * @lun: LUN of the command
5a0b0cb9 162 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
e0eca63e
VH
163 */
164struct ufshcd_lrb {
165 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 166 struct utp_upiu_req *ucd_req_ptr;
e0eca63e
VH
167 struct utp_upiu_rsp *ucd_rsp_ptr;
168 struct ufshcd_sg_entry *ucd_prdt_ptr;
169
170 struct scsi_cmnd *cmd;
171 u8 *sense_buffer;
172 unsigned int sense_bufflen;
173 int scsi_status;
174
175 int command_type;
176 int task_tag;
0ce147d4 177 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 178 bool intr_cmd;
e0eca63e
VH
179};
180
68078d5c 181/**
a230c2f6 182 * struct ufs_query - holds relevant data structures for query request
68078d5c
DR
183 * @request: request upiu and function
184 * @descriptor: buffer for sending/receiving descriptor
185 * @response: response upiu and response
186 */
187struct ufs_query {
188 struct ufs_query_req request;
189 u8 *descriptor;
190 struct ufs_query_res response;
191};
192
5a0b0cb9
SRT
193/**
194 * struct ufs_dev_cmd - all assosiated fields with device management commands
195 * @type: device management command type - Query, NOP OUT
196 * @lock: lock to allow one command at a time
197 * @complete: internal commands completion
198 * @tag_wq: wait queue until free command slot is available
199 */
200struct ufs_dev_cmd {
201 enum dev_cmd_type type;
202 struct mutex lock;
203 struct completion *complete;
204 wait_queue_head_t tag_wq;
68078d5c 205 struct ufs_query query;
5a0b0cb9 206};
e0eca63e 207
c6e79dac
SRT
208/**
209 * struct ufs_clk_info - UFS clock related info
210 * @list: list headed by hba->clk_list_head
211 * @clk: clock node
212 * @name: clock name
213 * @max_freq: maximum frequency supported by the clock
4cff6d99 214 * @min_freq: min frequency that can be used for clock scaling
856b3483 215 * @curr_freq: indicates the current frequency that it is set to
c6e79dac
SRT
216 * @enabled: variable to check against multiple enable/disable
217 */
218struct ufs_clk_info {
219 struct list_head list;
220 struct clk *clk;
221 const char *name;
222 u32 max_freq;
4cff6d99 223 u32 min_freq;
856b3483 224 u32 curr_freq;
c6e79dac
SRT
225 bool enabled;
226};
227
f06fcc71
YG
228enum ufs_notify_change_status {
229 PRE_CHANGE,
230 POST_CHANGE,
231};
7eb584db
DR
232
233struct ufs_pa_layer_attr {
234 u32 gear_rx;
235 u32 gear_tx;
236 u32 lane_rx;
237 u32 lane_tx;
238 u32 pwr_rx;
239 u32 pwr_tx;
240 u32 hs_rate;
241};
242
243struct ufs_pwr_mode_info {
244 bool is_valid;
245 struct ufs_pa_layer_attr info;
246};
247
5c0c28a8
SRT
248/**
249 * struct ufs_hba_variant_ops - variant specific callbacks
250 * @name: variant name
251 * @init: called when the driver is initialized
252 * @exit: called to cleanup everything done in init
9949e702 253 * @get_ufs_hci_version: called to get UFS HCI version
856b3483 254 * @clk_scale_notify: notifies that clks are scaled up/down
5c0c28a8
SRT
255 * @setup_clocks: called before touching any of the controller registers
256 * @setup_regulators: called before accessing the host controller
257 * @hce_enable_notify: called before and after HCE enable bit is set to allow
258 * variant specific Uni-Pro initialization.
259 * @link_startup_notify: called before and after Link startup is carried out
260 * to allow variant specific Uni-Pro initialization.
7eb584db
DR
261 * @pwr_change_notify: called before and after a power mode change
262 * is carried out to allow vendor spesific capabilities
263 * to be set.
57d104c1
SJ
264 * @suspend: called during host controller PM callback
265 * @resume: called during host controller PM callback
6e3fd44d 266 * @dbg_register_dump: used to dump controller debug information
5c0c28a8
SRT
267 */
268struct ufs_hba_variant_ops {
269 const char *name;
270 int (*init)(struct ufs_hba *);
271 void (*exit)(struct ufs_hba *);
9949e702 272 u32 (*get_ufs_hci_version)(struct ufs_hba *);
f06fcc71
YG
273 int (*clk_scale_notify)(struct ufs_hba *, bool,
274 enum ufs_notify_change_status);
275 int (*setup_clocks)(struct ufs_hba *, bool);
5c0c28a8 276 int (*setup_regulators)(struct ufs_hba *, bool);
f06fcc71
YG
277 int (*hce_enable_notify)(struct ufs_hba *,
278 enum ufs_notify_change_status);
279 int (*link_startup_notify)(struct ufs_hba *,
280 enum ufs_notify_change_status);
7eb584db 281 int (*pwr_change_notify)(struct ufs_hba *,
f06fcc71
YG
282 enum ufs_notify_change_status status,
283 struct ufs_pa_layer_attr *,
7eb584db 284 struct ufs_pa_layer_attr *);
57d104c1
SJ
285 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
286 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
6e3fd44d 287 void (*dbg_register_dump)(struct ufs_hba *hba);
5c0c28a8
SRT
288};
289
1ab27c9c
ST
290/* clock gating state */
291enum clk_gating_state {
292 CLKS_OFF,
293 CLKS_ON,
294 REQ_CLKS_OFF,
295 REQ_CLKS_ON,
296};
297
298/**
299 * struct ufs_clk_gating - UFS clock gating related info
300 * @gate_work: worker to turn off clocks after some delay as specified in
301 * delay_ms
302 * @ungate_work: worker to turn on clocks that will be used in case of
303 * interrupt context
304 * @state: the current clocks state
305 * @delay_ms: gating delay in ms
306 * @is_suspended: clk gating is suspended when set to 1 which can be used
307 * during suspend/resume
308 * @delay_attr: sysfs attribute to control delay_attr
309 * @active_reqs: number of requests that are pending and should be waited for
310 * completion before gating clocks.
311 */
312struct ufs_clk_gating {
313 struct delayed_work gate_work;
314 struct work_struct ungate_work;
315 enum clk_gating_state state;
316 unsigned long delay_ms;
317 bool is_suspended;
318 struct device_attribute delay_attr;
319 int active_reqs;
320};
321
856b3483
ST
322struct ufs_clk_scaling {
323 ktime_t busy_start_t;
324 bool is_busy_started;
325 unsigned long tot_busy_t;
326 unsigned long window_start_t;
327};
328
3a4bf06d
YG
329/**
330 * struct ufs_init_prefetch - contains data that is pre-fetched once during
331 * initialization
332 * @icc_level: icc level which was read during initialization
333 */
334struct ufs_init_prefetch {
335 u32 icc_level;
336};
337
e0eca63e
VH
338/**
339 * struct ufs_hba - per adapter private structure
340 * @mmio_base: UFSHCI base register address
341 * @ucdl_base_addr: UFS Command Descriptor base address
342 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
343 * @utmrdl_base_addr: UTP Task Management Descriptor base address
344 * @ucdl_dma_addr: UFS Command Descriptor DMA address
345 * @utrdl_dma_addr: UTRDL DMA address
346 * @utmrdl_dma_addr: UTMRDL DMA address
347 * @host: Scsi_Host instance of the driver
348 * @dev: device handle
349 * @lrb: local reference block
5a0b0cb9 350 * @lrb_in_use: lrb in use
e0eca63e
VH
351 * @outstanding_tasks: Bits representing outstanding task requests
352 * @outstanding_reqs: Bits representing outstanding transfer requests
353 * @capabilities: UFS Controller Capabilities
354 * @nutrs: Transfer Request Queue depth supported by controller
355 * @nutmrs: Task Management Queue depth supported by controller
356 * @ufs_version: UFS Version to which controller complies
5c0c28a8
SRT
357 * @vops: pointer to variant specific operations
358 * @priv: pointer to variant specific private data
e0eca63e
VH
359 * @irq: Irq number of the controller
360 * @active_uic_cmd: handle of active UIC command
6ccf44fe 361 * @uic_cmd_mutex: mutex for uic command
e2933132
SRT
362 * @tm_wq: wait queue for task management
363 * @tm_tag_wq: wait queue for free task management slots
364 * @tm_slots_in_use: bit map of task management request slots in use
53b3d9c3 365 * @pwr_done: completion for power mode change
e0eca63e
VH
366 * @tm_condition: condition variable for task management
367 * @ufshcd_state: UFSHCD states
3441da7d 368 * @eh_flags: Error handling flags
2fbd009b 369 * @intr_mask: Interrupt Mask Bits
66ec6d59 370 * @ee_ctrl_mask: Exception event control mask
1d337ec2 371 * @is_powered: flag to check if HBA is powered
3a4bf06d
YG
372 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
373 * @init_prefetch_data: data pre-fetched during initialization
e8e7f271 374 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 375 * @eeh_work: Worker to handle exception events
e0eca63e 376 * @errors: HBA errors
e8e7f271
SRT
377 * @uic_error: UFS interconnect layer error status
378 * @saved_err: sticky error mask
379 * @saved_uic_err: sticky UIC error mask
5a0b0cb9 380 * @dev_cmd: ufs device management command information
cad2e03d 381 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
66ec6d59 382 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 383 * @vreg_info: UFS device voltage regulator information
c6e79dac 384 * @clk_list_head: UFS host controller clocks list node head
7eb584db
DR
385 * @pwr_info: holds current power mode
386 * @max_pwr_info: keeps the device max valid pwm
afdfff59
YG
387 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
388 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
389 * device is known or not.
e0eca63e
VH
390 */
391struct ufs_hba {
392 void __iomem *mmio_base;
393
394 /* Virtual memory reference */
395 struct utp_transfer_cmd_desc *ucdl_base_addr;
396 struct utp_transfer_req_desc *utrdl_base_addr;
397 struct utp_task_req_desc *utmrdl_base_addr;
398
399 /* DMA memory reference */
400 dma_addr_t ucdl_dma_addr;
401 dma_addr_t utrdl_dma_addr;
402 dma_addr_t utmrdl_dma_addr;
403
404 struct Scsi_Host *host;
405 struct device *dev;
2a8fa600
SJ
406 /*
407 * This field is to keep a reference to "scsi_device" corresponding to
408 * "UFS device" W-LU.
409 */
410 struct scsi_device *sdev_ufs_device;
e0eca63e 411
57d104c1
SJ
412 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
413 enum uic_link_state uic_link_state;
414 /* Desired UFS power management level during runtime PM */
415 enum ufs_pm_level rpm_lvl;
416 /* Desired UFS power management level during system PM */
417 enum ufs_pm_level spm_lvl;
418 int pm_op_in_progress;
419
e0eca63e 420 struct ufshcd_lrb *lrb;
5a0b0cb9 421 unsigned long lrb_in_use;
e0eca63e
VH
422
423 unsigned long outstanding_tasks;
424 unsigned long outstanding_reqs;
425
426 u32 capabilities;
427 int nutrs;
428 int nutmrs;
429 u32 ufs_version;
5c0c28a8
SRT
430 struct ufs_hba_variant_ops *vops;
431 void *priv;
e0eca63e 432 unsigned int irq;
57d104c1 433 bool is_irq_enabled;
e0eca63e 434
b852190e
YG
435 /* Interrupt aggregation support is broken */
436 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
437
cad2e03d
YG
438 /*
439 * delay before each dme command is required as the unipro
440 * layer has shown instabilities
441 */
b852190e
YG
442 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
443
7ca38cf3
YG
444 /*
445 * If UFS host controller is having issue in processing LCC (Line
446 * Control Command) coming from device then enable this quirk.
447 * When this quirk is enabled, host controller driver should disable
448 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
449 * attribute of device to 0).
450 */
451 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
cad2e03d 452
c3a2f9ee
YG
453 /*
454 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
455 * inbound Link supports unterminated line in HS mode. Setting this
456 * attribute to 1 fixes moving to HS gear.
457 */
458 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
459
874237f7
YG
460 /*
461 * This quirk needs to be enabled if the host contoller only allows
462 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
463 * SLOW AUTO).
464 */
465 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
466
9949e702
YG
467 /*
468 * This quirk needs to be enabled if the host contoller doesn't
469 * advertise the correct version in UFS_VER register. If this quirk
470 * is enabled, standard UFS host driver will call the vendor specific
471 * ops (get_ufs_hci_version) to get the correct version.
472 */
473 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
474
cad2e03d 475 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
6ccf44fe 476
c58ab7aa
YG
477 /* Device deviations from standard UFS device spec. */
478 unsigned int dev_quirks;
479
e2933132
SRT
480 wait_queue_head_t tm_wq;
481 wait_queue_head_t tm_tag_wq;
e0eca63e 482 unsigned long tm_condition;
e2933132 483 unsigned long tm_slots_in_use;
e0eca63e 484
57d104c1
SJ
485 struct uic_command *active_uic_cmd;
486 struct mutex uic_cmd_mutex;
487 struct completion *uic_async_done;
53b3d9c3 488
e0eca63e 489 u32 ufshcd_state;
3441da7d 490 u32 eh_flags;
2fbd009b 491 u32 intr_mask;
66ec6d59 492 u16 ee_ctrl_mask;
1d337ec2 493 bool is_powered;
3a4bf06d
YG
494 bool is_init_prefetch;
495 struct ufs_init_prefetch init_prefetch_data;
e0eca63e
VH
496
497 /* Work Queues */
e8e7f271 498 struct work_struct eh_work;
66ec6d59 499 struct work_struct eeh_work;
e0eca63e
VH
500
501 /* HBA Errors */
502 u32 errors;
e8e7f271
SRT
503 u32 uic_error;
504 u32 saved_err;
505 u32 saved_uic_err;
5a0b0cb9
SRT
506
507 /* Device management request data */
508 struct ufs_dev_cmd dev_cmd;
cad2e03d 509 ktime_t last_dme_cmd_tstamp;
66ec6d59 510
57d104c1
SJ
511 /* Keeps information of the UFS device connected to this host */
512 struct ufs_dev_info dev_info;
66ec6d59 513 bool auto_bkops_enabled;
aa497613 514 struct ufs_vreg_info vreg_info;
c6e79dac 515 struct list_head clk_list_head;
57d104c1
SJ
516
517 bool wlun_dev_clr_ua;
7eb584db 518
54b879b7
YG
519 /* Number of lanes available (1 or 2) for Rx/Tx */
520 u32 lanes_per_direction;
7eb584db
DR
521 struct ufs_pa_layer_attr pwr_info;
522 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
523
524 struct ufs_clk_gating clk_gating;
525 /* Control to enable/disable host capabilities */
526 u32 caps;
527 /* Allow dynamic clk gating */
528#define UFSHCD_CAP_CLK_GATING (1 << 0)
529 /* Allow hiberb8 with clk gating */
530#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
856b3483
ST
531 /* Allow dynamic clk scaling */
532#define UFSHCD_CAP_CLK_SCALING (1 << 2)
374a246e
SJ
533 /* Allow auto bkops to enabled during runtime suspend */
534#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
b852190e
YG
535 /*
536 * This capability allows host controller driver to use the UFS HCI's
537 * interrupt aggregation capability.
538 * CAUTION: Enabling this might reduce overall UFS throughput.
539 */
540#define UFSHCD_CAP_INTR_AGGR (1 << 4)
856b3483
ST
541
542 struct devfreq *devfreq;
543 struct ufs_clk_scaling clk_scaling;
e785060e 544 bool is_sys_suspended;
afdfff59
YG
545
546 enum bkops_status urgent_bkops_lvl;
547 bool is_urgent_bkops_lvl_checked;
e0eca63e
VH
548};
549
1ab27c9c
ST
550/* Returns true if clocks can be gated. Otherwise false */
551static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
552{
553 return hba->caps & UFSHCD_CAP_CLK_GATING;
554}
555static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
556{
557 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
558}
856b3483
ST
559static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba)
560{
561 return hba->caps & UFSHCD_CAP_CLK_SCALING;
562}
374a246e
SJ
563static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
564{
565 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
566}
567
b852190e
YG
568static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
569{
570 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
571 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
572 return true;
573 else
574 return false;
575}
576
b873a275
SJ
577#define ufshcd_writel(hba, val, reg) \
578 writel((val), (hba)->mmio_base + (reg))
579#define ufshcd_readl(hba, reg) \
580 readl((hba)->mmio_base + (reg))
581
e785060e
DR
582/**
583 * ufshcd_rmwl - read modify write into a register
584 * @hba - per adapter instance
585 * @mask - mask to apply on read value
586 * @val - actual value to write
587 * @reg - register address
588 */
589static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
590{
591 u32 tmp;
592
593 tmp = ufshcd_readl(hba, reg);
594 tmp &= ~mask;
595 tmp |= (val & mask);
596 ufshcd_writel(hba, tmp, reg);
597}
598
5c0c28a8 599int ufshcd_alloc_host(struct device *, struct ufs_hba **);
47555a5c 600void ufshcd_dealloc_host(struct ufs_hba *);
5c0c28a8 601int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
e0eca63e 602void ufshcd_remove(struct ufs_hba *);
596585a2
YG
603int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
604 u32 val, unsigned long interval_us,
605 unsigned long timeout_ms, bool can_sleep);
e0eca63e 606
68078d5c
DR
607static inline void check_upiu_size(void)
608{
609 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
610 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
611}
612
1ce5898a
YG
613/**
614 * ufshcd_set_variant - set variant specific data to the hba
615 * @hba - per adapter instance
616 * @variant - pointer to variant specific data
617 */
618static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
619{
620 BUG_ON(!hba);
621 hba->priv = variant;
622}
623
624/**
625 * ufshcd_get_variant - get variant specific data from the hba
626 * @hba - per adapter instance
627 */
628static inline void *ufshcd_get_variant(struct ufs_hba *hba)
629{
630 BUG_ON(!hba);
631 return hba->priv;
632}
633
66ec6d59
SRT
634extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
635extern int ufshcd_runtime_resume(struct ufs_hba *hba);
636extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
637extern int ufshcd_system_suspend(struct ufs_hba *hba);
638extern int ufshcd_system_resume(struct ufs_hba *hba);
639extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
640extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
641 u8 attr_set, u32 mib_val, u8 peer);
642extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
643 u32 *mib_val, u8 peer);
644
645/* UIC command interfaces for DME primitives */
646#define DME_LOCAL 0
647#define DME_PEER 1
648#define ATTR_SET_NOR 0 /* NORMAL */
649#define ATTR_SET_ST 1 /* STATIC */
650
651static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
652 u32 mib_val)
653{
654 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
655 mib_val, DME_LOCAL);
656}
657
658static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
659 u32 mib_val)
660{
661 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
662 mib_val, DME_LOCAL);
663}
664
665static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
666 u32 mib_val)
667{
668 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
669 mib_val, DME_PEER);
670}
671
672static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
673 u32 mib_val)
674{
675 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
676 mib_val, DME_PEER);
677}
678
679static inline int ufshcd_dme_get(struct ufs_hba *hba,
680 u32 attr_sel, u32 *mib_val)
681{
682 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
683}
684
685static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
686 u32 attr_sel, u32 *mib_val)
687{
688 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
689}
690
b573d484
YG
691int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size);
692
f37aabcf
YG
693static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
694{
695 return (pwr_info->pwr_rx == FAST_MODE ||
696 pwr_info->pwr_rx == FASTAUTO_MODE) &&
697 (pwr_info->pwr_tx == FAST_MODE ||
698 pwr_info->pwr_tx == FASTAUTO_MODE);
699}
700
b573d484
YG
701#define ASCII_STD true
702
703int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
704 u32 size, bool ascii);
705
dc3c8d3a
YG
706/* Expose Query-Request API */
707int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
708 enum flag_idn idn, bool *flag_res);
1ab27c9c
ST
709int ufshcd_hold(struct ufs_hba *hba, bool async);
710void ufshcd_release(struct ufs_hba *hba);
37113106 711u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
0263bcd0
YG
712
713/* Wrapper functions for safely calling variant operations */
714static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
715{
716 if (hba->vops)
717 return hba->vops->name;
718 return "";
719}
720
721static inline int ufshcd_vops_init(struct ufs_hba *hba)
722{
723 if (hba->vops && hba->vops->init)
724 return hba->vops->init(hba);
725
726 return 0;
727}
728
729static inline void ufshcd_vops_exit(struct ufs_hba *hba)
730{
731 if (hba->vops && hba->vops->exit)
732 return hba->vops->exit(hba);
733}
734
735static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
736{
737 if (hba->vops && hba->vops->get_ufs_hci_version)
738 return hba->vops->get_ufs_hci_version(hba);
739
740 return ufshcd_readl(hba, REG_UFS_VERSION);
741}
742
f06fcc71
YG
743static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
744 bool up, enum ufs_notify_change_status status)
0263bcd0
YG
745{
746 if (hba->vops && hba->vops->clk_scale_notify)
f06fcc71
YG
747 return hba->vops->clk_scale_notify(hba, up, status);
748 return 0;
0263bcd0
YG
749}
750
751static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on)
752{
753 if (hba->vops && hba->vops->setup_clocks)
754 return hba->vops->setup_clocks(hba, on);
0263bcd0
YG
755 return 0;
756}
757
758static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
759{
760 if (hba->vops && hba->vops->setup_regulators)
761 return hba->vops->setup_regulators(hba, status);
762
763 return 0;
764}
765
766static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
767 bool status)
768{
769 if (hba->vops && hba->vops->hce_enable_notify)
770 return hba->vops->hce_enable_notify(hba, status);
771
772 return 0;
773}
774static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
775 bool status)
776{
777 if (hba->vops && hba->vops->link_startup_notify)
778 return hba->vops->link_startup_notify(hba, status);
779
780 return 0;
781}
782
783static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
784 bool status,
785 struct ufs_pa_layer_attr *dev_max_params,
786 struct ufs_pa_layer_attr *dev_req_params)
787{
788 if (hba->vops && hba->vops->pwr_change_notify)
789 return hba->vops->pwr_change_notify(hba, status,
790 dev_max_params, dev_req_params);
791
792 return -ENOTSUPP;
793}
794
795static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
796{
797 if (hba->vops && hba->vops->suspend)
798 return hba->vops->suspend(hba, op);
799
800 return 0;
801}
802
803static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
804{
805 if (hba->vops && hba->vops->resume)
806 return hba->vops->resume(hba, op);
807
808 return 0;
809}
810
6e3fd44d
YG
811static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
812{
813 if (hba->vops && hba->vops->dbg_register_dump)
814 hba->vops->dbg_register_dump(hba);
815}
816
e0eca63e 817#endif /* End of Header */
This page took 0.231061 seconds and 5 git commands to generate.