Commit | Line | Data |
---|---|---|
1e6c9c28 | 1 | /* |
c2f5ccfb | 2 | * linux/drivers/char/atmel_serial.c |
1e6c9c28 | 3 | * |
7192f92c | 4 | * Driver for Atmel AT91 / AT32 Serial ports |
1e6c9c28 AV |
5 | * Copyright (C) 2003 Rick Bronson |
6 | * | |
7 | * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. | |
8 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | |
9 | * | |
a6670615 CC |
10 | * DMA support added by Chip Coldwell. |
11 | * | |
1e6c9c28 AV |
12 | * This program is free software; you can redistribute it and/or modify |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | * | |
26 | */ | |
1e6c9c28 AV |
27 | #include <linux/module.h> |
28 | #include <linux/tty.h> | |
29 | #include <linux/ioport.h> | |
30 | #include <linux/slab.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/serial.h> | |
afefc415 | 33 | #include <linux/clk.h> |
1e6c9c28 AV |
34 | #include <linux/console.h> |
35 | #include <linux/sysrq.h> | |
36 | #include <linux/tty_flip.h> | |
afefc415 | 37 | #include <linux/platform_device.h> |
a6670615 | 38 | #include <linux/dma-mapping.h> |
93a3ddc2 | 39 | #include <linux/atmel_pdc.h> |
fa3218d8 | 40 | #include <linux/atmel_serial.h> |
e8faff73 | 41 | #include <linux/uaccess.h> |
1e6c9c28 AV |
42 | |
43 | #include <asm/io.h> | |
f7512e7c | 44 | #include <asm/ioctls.h> |
1e6c9c28 | 45 | |
afefc415 | 46 | #include <asm/mach/serial_at91.h> |
a09e64fb | 47 | #include <mach/board.h> |
93a3ddc2 | 48 | |
acca9b83 | 49 | #ifdef CONFIG_ARM |
a09e64fb RK |
50 | #include <mach/cpu.h> |
51 | #include <mach/gpio.h> | |
acca9b83 | 52 | #endif |
1e6c9c28 | 53 | |
a6670615 CC |
54 | #define PDC_BUFFER_SIZE 512 |
55 | /* Revisit: We should calculate this based on the actual port settings */ | |
56 | #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */ | |
57 | ||
749c4e60 | 58 | #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
1e6c9c28 AV |
59 | #define SUPPORT_SYSRQ |
60 | #endif | |
61 | ||
62 | #include <linux/serial_core.h> | |
63 | ||
e8faff73 CS |
64 | static void atmel_start_rx(struct uart_port *port); |
65 | static void atmel_stop_rx(struct uart_port *port); | |
66 | ||
749c4e60 | 67 | #ifdef CONFIG_SERIAL_ATMEL_TTYAT |
1e6c9c28 AV |
68 | |
69 | /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we | |
70 | * should coexist with the 8250 driver, such as if we have an external 16C550 | |
71 | * UART. */ | |
7192f92c | 72 | #define SERIAL_ATMEL_MAJOR 204 |
1e6c9c28 | 73 | #define MINOR_START 154 |
7192f92c | 74 | #define ATMEL_DEVICENAME "ttyAT" |
1e6c9c28 AV |
75 | |
76 | #else | |
77 | ||
78 | /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port | |
79 | * name, but it is legally reserved for the 8250 driver. */ | |
7192f92c | 80 | #define SERIAL_ATMEL_MAJOR TTY_MAJOR |
1e6c9c28 | 81 | #define MINOR_START 64 |
7192f92c | 82 | #define ATMEL_DEVICENAME "ttyS" |
1e6c9c28 AV |
83 | |
84 | #endif | |
85 | ||
7192f92c | 86 | #define ATMEL_ISR_PASS_LIMIT 256 |
1e6c9c28 | 87 | |
b843aa21 | 88 | /* UART registers. CR is write-only, hence no GET macro */ |
544fc728 HS |
89 | #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR) |
90 | #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR) | |
91 | #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR) | |
92 | #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER) | |
93 | #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR) | |
94 | #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR) | |
95 | #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR) | |
96 | #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR) | |
97 | #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR) | |
98 | #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) | |
99 | #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) | |
100 | #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) | |
e8faff73 | 101 | #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR) |
544fc728 | 102 | |
1e6c9c28 | 103 | /* PDC registers */ |
544fc728 HS |
104 | #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) |
105 | #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR) | |
106 | ||
107 | #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR) | |
108 | #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR) | |
109 | #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR) | |
110 | #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR) | |
111 | #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR) | |
112 | ||
113 | #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR) | |
114 | #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) | |
39d4c922 | 115 | #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR) |
1e6c9c28 | 116 | |
71f2e2b8 HS |
117 | static int (*atmel_open_hook)(struct uart_port *); |
118 | static void (*atmel_close_hook)(struct uart_port *); | |
1e6c9c28 | 119 | |
a6670615 CC |
120 | struct atmel_dma_buffer { |
121 | unsigned char *buf; | |
122 | dma_addr_t dma_addr; | |
123 | unsigned int dma_size; | |
124 | unsigned int ofs; | |
125 | }; | |
126 | ||
1ecc26bd RB |
127 | struct atmel_uart_char { |
128 | u16 status; | |
129 | u16 ch; | |
130 | }; | |
131 | ||
132 | #define ATMEL_SERIAL_RINGSIZE 1024 | |
133 | ||
afefc415 AV |
134 | /* |
135 | * We wrap our port structure around the generic uart_port. | |
136 | */ | |
7192f92c | 137 | struct atmel_uart_port { |
afefc415 AV |
138 | struct uart_port uart; /* uart */ |
139 | struct clk *clk; /* uart clock */ | |
f05596db AS |
140 | int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */ |
141 | u32 backup_imr; /* IMR saved during suspend */ | |
9e6077bd | 142 | int break_active; /* break being received */ |
1ecc26bd | 143 | |
a6670615 CC |
144 | short use_dma_rx; /* enable PDC receiver */ |
145 | short pdc_rx_idx; /* current PDC RX buffer */ | |
146 | struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */ | |
147 | ||
148 | short use_dma_tx; /* enable PDC transmitter */ | |
149 | struct atmel_dma_buffer pdc_tx; /* PDC transmitter */ | |
150 | ||
1ecc26bd RB |
151 | struct tasklet_struct tasklet; |
152 | unsigned int irq_status; | |
153 | unsigned int irq_status_prev; | |
154 | ||
155 | struct circ_buf rx_ring; | |
e8faff73 CS |
156 | |
157 | struct serial_rs485 rs485; /* rs485 settings */ | |
158 | unsigned int tx_done_mask; | |
afefc415 AV |
159 | }; |
160 | ||
7192f92c | 161 | static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; |
afefc415 | 162 | |
1e6c9c28 | 163 | #ifdef SUPPORT_SYSRQ |
7192f92c | 164 | static struct console atmel_console; |
1e6c9c28 AV |
165 | #endif |
166 | ||
c811ab8c HS |
167 | static inline struct atmel_uart_port * |
168 | to_atmel_uart_port(struct uart_port *uart) | |
169 | { | |
170 | return container_of(uart, struct atmel_uart_port, uart); | |
171 | } | |
172 | ||
a6670615 CC |
173 | #ifdef CONFIG_SERIAL_ATMEL_PDC |
174 | static bool atmel_use_dma_rx(struct uart_port *port) | |
175 | { | |
c811ab8c | 176 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
a6670615 CC |
177 | |
178 | return atmel_port->use_dma_rx; | |
179 | } | |
180 | ||
181 | static bool atmel_use_dma_tx(struct uart_port *port) | |
182 | { | |
c811ab8c | 183 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
a6670615 CC |
184 | |
185 | return atmel_port->use_dma_tx; | |
186 | } | |
187 | #else | |
188 | static bool atmel_use_dma_rx(struct uart_port *port) | |
189 | { | |
190 | return false; | |
191 | } | |
192 | ||
193 | static bool atmel_use_dma_tx(struct uart_port *port) | |
194 | { | |
195 | return false; | |
196 | } | |
197 | #endif | |
198 | ||
e8faff73 CS |
199 | /* Enable or disable the rs485 support */ |
200 | void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) | |
201 | { | |
202 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | |
203 | unsigned int mode; | |
204 | ||
205 | spin_lock(&port->lock); | |
206 | ||
207 | /* Disable interrupts */ | |
208 | UART_PUT_IDR(port, atmel_port->tx_done_mask); | |
209 | ||
210 | mode = UART_GET_MR(port); | |
211 | ||
212 | /* Resetting serial mode to RS232 (0x0) */ | |
213 | mode &= ~ATMEL_US_USMODE; | |
214 | ||
215 | atmel_port->rs485 = *rs485conf; | |
216 | ||
217 | if (rs485conf->flags & SER_RS485_ENABLED) { | |
218 | dev_dbg(port->dev, "Setting UART to RS485\n"); | |
219 | atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; | |
220 | UART_PUT_TTGR(port, rs485conf->delay_rts_before_send); | |
221 | mode |= ATMEL_US_USMODE_RS485; | |
222 | } else { | |
223 | dev_dbg(port->dev, "Setting UART to RS232\n"); | |
224 | if (atmel_use_dma_tx(port)) | |
225 | atmel_port->tx_done_mask = ATMEL_US_ENDTX | | |
226 | ATMEL_US_TXBUFE; | |
227 | else | |
228 | atmel_port->tx_done_mask = ATMEL_US_TXRDY; | |
229 | } | |
230 | UART_PUT_MR(port, mode); | |
231 | ||
232 | /* Enable interrupts */ | |
233 | UART_PUT_IER(port, atmel_port->tx_done_mask); | |
234 | ||
235 | spin_unlock(&port->lock); | |
236 | ||
237 | } | |
238 | ||
1e6c9c28 AV |
239 | /* |
240 | * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. | |
241 | */ | |
7192f92c | 242 | static u_int atmel_tx_empty(struct uart_port *port) |
1e6c9c28 | 243 | { |
7192f92c | 244 | return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0; |
1e6c9c28 AV |
245 | } |
246 | ||
247 | /* | |
248 | * Set state of the modem control output lines | |
249 | */ | |
7192f92c | 250 | static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) |
1e6c9c28 AV |
251 | { |
252 | unsigned int control = 0; | |
afefc415 | 253 | unsigned int mode; |
e8faff73 | 254 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1e6c9c28 | 255 | |
c2f5ccfb | 256 | #ifdef CONFIG_ARCH_AT91RM9200 |
79da7a61 | 257 | if (cpu_is_at91rm9200()) { |
afefc415 | 258 | /* |
b843aa21 RB |
259 | * AT91RM9200 Errata #39: RTS0 is not internally connected |
260 | * to PA21. We need to drive the pin manually. | |
afefc415 | 261 | */ |
72729910 | 262 | if (port->mapbase == AT91RM9200_BASE_US0) { |
afefc415 | 263 | if (mctrl & TIOCM_RTS) |
20e65276 | 264 | at91_set_gpio_value(AT91_PIN_PA21, 0); |
afefc415 | 265 | else |
20e65276 | 266 | at91_set_gpio_value(AT91_PIN_PA21, 1); |
afefc415 | 267 | } |
1e6c9c28 | 268 | } |
acca9b83 | 269 | #endif |
1e6c9c28 AV |
270 | |
271 | if (mctrl & TIOCM_RTS) | |
7192f92c | 272 | control |= ATMEL_US_RTSEN; |
1e6c9c28 | 273 | else |
7192f92c | 274 | control |= ATMEL_US_RTSDIS; |
1e6c9c28 AV |
275 | |
276 | if (mctrl & TIOCM_DTR) | |
7192f92c | 277 | control |= ATMEL_US_DTREN; |
1e6c9c28 | 278 | else |
7192f92c | 279 | control |= ATMEL_US_DTRDIS; |
1e6c9c28 | 280 | |
afefc415 AV |
281 | UART_PUT_CR(port, control); |
282 | ||
283 | /* Local loopback mode? */ | |
7192f92c | 284 | mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE; |
afefc415 | 285 | if (mctrl & TIOCM_LOOP) |
7192f92c | 286 | mode |= ATMEL_US_CHMODE_LOC_LOOP; |
afefc415 | 287 | else |
7192f92c | 288 | mode |= ATMEL_US_CHMODE_NORMAL; |
e8faff73 CS |
289 | |
290 | /* Resetting serial mode to RS232 (0x0) */ | |
291 | mode &= ~ATMEL_US_USMODE; | |
292 | ||
293 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) { | |
294 | dev_dbg(port->dev, "Setting UART to RS485\n"); | |
295 | UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send); | |
296 | mode |= ATMEL_US_USMODE_RS485; | |
297 | } else { | |
298 | dev_dbg(port->dev, "Setting UART to RS232\n"); | |
299 | } | |
afefc415 | 300 | UART_PUT_MR(port, mode); |
1e6c9c28 AV |
301 | } |
302 | ||
303 | /* | |
304 | * Get state of the modem control input lines | |
305 | */ | |
7192f92c | 306 | static u_int atmel_get_mctrl(struct uart_port *port) |
1e6c9c28 AV |
307 | { |
308 | unsigned int status, ret = 0; | |
309 | ||
310 | status = UART_GET_CSR(port); | |
311 | ||
312 | /* | |
313 | * The control signals are active low. | |
314 | */ | |
7192f92c | 315 | if (!(status & ATMEL_US_DCD)) |
1e6c9c28 | 316 | ret |= TIOCM_CD; |
7192f92c | 317 | if (!(status & ATMEL_US_CTS)) |
1e6c9c28 | 318 | ret |= TIOCM_CTS; |
7192f92c | 319 | if (!(status & ATMEL_US_DSR)) |
1e6c9c28 | 320 | ret |= TIOCM_DSR; |
7192f92c | 321 | if (!(status & ATMEL_US_RI)) |
1e6c9c28 AV |
322 | ret |= TIOCM_RI; |
323 | ||
324 | return ret; | |
325 | } | |
326 | ||
327 | /* | |
328 | * Stop transmitting. | |
329 | */ | |
7192f92c | 330 | static void atmel_stop_tx(struct uart_port *port) |
1e6c9c28 | 331 | { |
e8faff73 CS |
332 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
333 | ||
a6670615 CC |
334 | if (atmel_use_dma_tx(port)) { |
335 | /* disable PDC transmit */ | |
336 | UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); | |
e8faff73 CS |
337 | } |
338 | /* Disable interrupts */ | |
339 | UART_PUT_IDR(port, atmel_port->tx_done_mask); | |
340 | ||
341 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) | |
342 | atmel_start_rx(port); | |
1e6c9c28 AV |
343 | } |
344 | ||
345 | /* | |
346 | * Start transmitting. | |
347 | */ | |
7192f92c | 348 | static void atmel_start_tx(struct uart_port *port) |
1e6c9c28 | 349 | { |
e8faff73 CS |
350 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
351 | ||
a6670615 CC |
352 | if (atmel_use_dma_tx(port)) { |
353 | if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN) | |
354 | /* The transmitter is already running. Yes, we | |
355 | really need this.*/ | |
356 | return; | |
357 | ||
e8faff73 CS |
358 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) |
359 | atmel_stop_rx(port); | |
360 | ||
a6670615 CC |
361 | /* re-enable PDC transmit */ |
362 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); | |
e8faff73 CS |
363 | } |
364 | /* Enable interrupts */ | |
365 | UART_PUT_IER(port, atmel_port->tx_done_mask); | |
366 | } | |
367 | ||
368 | /* | |
369 | * start receiving - port is in process of being opened. | |
370 | */ | |
371 | static void atmel_start_rx(struct uart_port *port) | |
372 | { | |
373 | UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */ | |
374 | ||
375 | if (atmel_use_dma_rx(port)) { | |
376 | /* enable PDC controller */ | |
377 | UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | | |
378 | port->read_status_mask); | |
379 | UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); | |
380 | } else { | |
381 | UART_PUT_IER(port, ATMEL_US_RXRDY); | |
382 | } | |
1e6c9c28 AV |
383 | } |
384 | ||
385 | /* | |
386 | * Stop receiving - port is in process of being closed. | |
387 | */ | |
7192f92c | 388 | static void atmel_stop_rx(struct uart_port *port) |
1e6c9c28 | 389 | { |
a6670615 CC |
390 | if (atmel_use_dma_rx(port)) { |
391 | /* disable PDC receive */ | |
392 | UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); | |
e8faff73 CS |
393 | UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | |
394 | port->read_status_mask); | |
395 | } else { | |
a6670615 | 396 | UART_PUT_IDR(port, ATMEL_US_RXRDY); |
e8faff73 | 397 | } |
1e6c9c28 AV |
398 | } |
399 | ||
400 | /* | |
401 | * Enable modem status interrupts | |
402 | */ | |
7192f92c | 403 | static void atmel_enable_ms(struct uart_port *port) |
1e6c9c28 | 404 | { |
b843aa21 RB |
405 | UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC |
406 | | ATMEL_US_DCDIC | ATMEL_US_CTSIC); | |
1e6c9c28 AV |
407 | } |
408 | ||
409 | /* | |
410 | * Control the transmission of a break signal | |
411 | */ | |
7192f92c | 412 | static void atmel_break_ctl(struct uart_port *port, int break_state) |
1e6c9c28 AV |
413 | { |
414 | if (break_state != 0) | |
7192f92c | 415 | UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */ |
1e6c9c28 | 416 | else |
7192f92c | 417 | UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */ |
1e6c9c28 AV |
418 | } |
419 | ||
1ecc26bd RB |
420 | /* |
421 | * Stores the incoming character in the ring buffer | |
422 | */ | |
423 | static void | |
424 | atmel_buffer_rx_char(struct uart_port *port, unsigned int status, | |
425 | unsigned int ch) | |
426 | { | |
c811ab8c | 427 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd RB |
428 | struct circ_buf *ring = &atmel_port->rx_ring; |
429 | struct atmel_uart_char *c; | |
430 | ||
431 | if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE)) | |
432 | /* Buffer overflow, ignore char */ | |
433 | return; | |
434 | ||
435 | c = &((struct atmel_uart_char *)ring->buf)[ring->head]; | |
436 | c->status = status; | |
437 | c->ch = ch; | |
438 | ||
439 | /* Make sure the character is stored before we update head. */ | |
440 | smp_wmb(); | |
441 | ||
442 | ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1); | |
443 | } | |
444 | ||
a6670615 CC |
445 | /* |
446 | * Deal with parity, framing and overrun errors. | |
447 | */ | |
448 | static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status) | |
449 | { | |
450 | /* clear error */ | |
451 | UART_PUT_CR(port, ATMEL_US_RSTSTA); | |
452 | ||
453 | if (status & ATMEL_US_RXBRK) { | |
454 | /* ignore side-effect */ | |
455 | status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); | |
456 | port->icount.brk++; | |
457 | } | |
458 | if (status & ATMEL_US_PARE) | |
459 | port->icount.parity++; | |
460 | if (status & ATMEL_US_FRAME) | |
461 | port->icount.frame++; | |
462 | if (status & ATMEL_US_OVRE) | |
463 | port->icount.overrun++; | |
464 | } | |
465 | ||
1e6c9c28 AV |
466 | /* |
467 | * Characters received (called from interrupt handler) | |
468 | */ | |
7d12e780 | 469 | static void atmel_rx_chars(struct uart_port *port) |
1e6c9c28 | 470 | { |
c811ab8c | 471 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd | 472 | unsigned int status, ch; |
1e6c9c28 | 473 | |
afefc415 | 474 | status = UART_GET_CSR(port); |
7192f92c | 475 | while (status & ATMEL_US_RXRDY) { |
1e6c9c28 AV |
476 | ch = UART_GET_CHAR(port); |
477 | ||
1e6c9c28 AV |
478 | /* |
479 | * note that the error handling code is | |
480 | * out of the main execution path | |
481 | */ | |
9e6077bd HS |
482 | if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME |
483 | | ATMEL_US_OVRE | ATMEL_US_RXBRK) | |
484 | || atmel_port->break_active)) { | |
1ecc26bd | 485 | |
b843aa21 RB |
486 | /* clear error */ |
487 | UART_PUT_CR(port, ATMEL_US_RSTSTA); | |
1ecc26bd | 488 | |
9e6077bd HS |
489 | if (status & ATMEL_US_RXBRK |
490 | && !atmel_port->break_active) { | |
9e6077bd HS |
491 | atmel_port->break_active = 1; |
492 | UART_PUT_IER(port, ATMEL_US_RXBRK); | |
9e6077bd HS |
493 | } else { |
494 | /* | |
495 | * This is either the end-of-break | |
496 | * condition or we've received at | |
497 | * least one character without RXBRK | |
498 | * being set. In both cases, the next | |
499 | * RXBRK will indicate start-of-break. | |
500 | */ | |
501 | UART_PUT_IDR(port, ATMEL_US_RXBRK); | |
502 | status &= ~ATMEL_US_RXBRK; | |
503 | atmel_port->break_active = 0; | |
afefc415 | 504 | } |
1e6c9c28 AV |
505 | } |
506 | ||
1ecc26bd | 507 | atmel_buffer_rx_char(port, status, ch); |
afefc415 | 508 | status = UART_GET_CSR(port); |
1e6c9c28 AV |
509 | } |
510 | ||
1ecc26bd | 511 | tasklet_schedule(&atmel_port->tasklet); |
1e6c9c28 AV |
512 | } |
513 | ||
514 | /* | |
1ecc26bd RB |
515 | * Transmit characters (called from tasklet with TXRDY interrupt |
516 | * disabled) | |
1e6c9c28 | 517 | */ |
7192f92c | 518 | static void atmel_tx_chars(struct uart_port *port) |
1e6c9c28 | 519 | { |
ebd2c8f6 | 520 | struct circ_buf *xmit = &port->state->xmit; |
e8faff73 | 521 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1e6c9c28 | 522 | |
e8faff73 | 523 | if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) { |
1e6c9c28 AV |
524 | UART_PUT_CHAR(port, port->x_char); |
525 | port->icount.tx++; | |
526 | port->x_char = 0; | |
1e6c9c28 | 527 | } |
1ecc26bd | 528 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) |
1e6c9c28 | 529 | return; |
1e6c9c28 | 530 | |
e8faff73 | 531 | while (UART_GET_CSR(port) & atmel_port->tx_done_mask) { |
1e6c9c28 AV |
532 | UART_PUT_CHAR(port, xmit->buf[xmit->tail]); |
533 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
534 | port->icount.tx++; | |
535 | if (uart_circ_empty(xmit)) | |
536 | break; | |
537 | } | |
538 | ||
539 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
540 | uart_write_wakeup(port); | |
541 | ||
1ecc26bd | 542 | if (!uart_circ_empty(xmit)) |
e8faff73 CS |
543 | /* Enable interrupts */ |
544 | UART_PUT_IER(port, atmel_port->tx_done_mask); | |
1e6c9c28 AV |
545 | } |
546 | ||
b843aa21 RB |
547 | /* |
548 | * receive interrupt handler. | |
549 | */ | |
550 | static void | |
551 | atmel_handle_receive(struct uart_port *port, unsigned int pending) | |
552 | { | |
c811ab8c | 553 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
b843aa21 | 554 | |
a6670615 CC |
555 | if (atmel_use_dma_rx(port)) { |
556 | /* | |
557 | * PDC receive. Just schedule the tasklet and let it | |
558 | * figure out the details. | |
559 | * | |
560 | * TODO: We're not handling error flags correctly at | |
561 | * the moment. | |
562 | */ | |
563 | if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) { | |
564 | UART_PUT_IDR(port, (ATMEL_US_ENDRX | |
565 | | ATMEL_US_TIMEOUT)); | |
566 | tasklet_schedule(&atmel_port->tasklet); | |
567 | } | |
568 | ||
569 | if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | | |
570 | ATMEL_US_FRAME | ATMEL_US_PARE)) | |
571 | atmel_pdc_rxerr(port, pending); | |
572 | } | |
573 | ||
b843aa21 RB |
574 | /* Interrupt receive */ |
575 | if (pending & ATMEL_US_RXRDY) | |
576 | atmel_rx_chars(port); | |
577 | else if (pending & ATMEL_US_RXBRK) { | |
578 | /* | |
579 | * End of break detected. If it came along with a | |
580 | * character, atmel_rx_chars will handle it. | |
581 | */ | |
582 | UART_PUT_CR(port, ATMEL_US_RSTSTA); | |
583 | UART_PUT_IDR(port, ATMEL_US_RXBRK); | |
584 | atmel_port->break_active = 0; | |
585 | } | |
586 | } | |
587 | ||
588 | /* | |
1ecc26bd | 589 | * transmit interrupt handler. (Transmit is IRQF_NODELAY safe) |
b843aa21 RB |
590 | */ |
591 | static void | |
592 | atmel_handle_transmit(struct uart_port *port, unsigned int pending) | |
593 | { | |
c811ab8c | 594 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd | 595 | |
e8faff73 CS |
596 | if (pending & atmel_port->tx_done_mask) { |
597 | /* Either PDC or interrupt transmission */ | |
598 | UART_PUT_IDR(port, atmel_port->tx_done_mask); | |
599 | tasklet_schedule(&atmel_port->tasklet); | |
1ecc26bd | 600 | } |
b843aa21 RB |
601 | } |
602 | ||
603 | /* | |
604 | * status flags interrupt handler. | |
605 | */ | |
606 | static void | |
607 | atmel_handle_status(struct uart_port *port, unsigned int pending, | |
608 | unsigned int status) | |
609 | { | |
c811ab8c | 610 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd | 611 | |
b843aa21 | 612 | if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC |
1ecc26bd RB |
613 | | ATMEL_US_CTSIC)) { |
614 | atmel_port->irq_status = status; | |
615 | tasklet_schedule(&atmel_port->tasklet); | |
616 | } | |
b843aa21 RB |
617 | } |
618 | ||
1e6c9c28 AV |
619 | /* |
620 | * Interrupt handler | |
621 | */ | |
7d12e780 | 622 | static irqreturn_t atmel_interrupt(int irq, void *dev_id) |
1e6c9c28 AV |
623 | { |
624 | struct uart_port *port = dev_id; | |
625 | unsigned int status, pending, pass_counter = 0; | |
626 | ||
a6670615 CC |
627 | do { |
628 | status = UART_GET_CSR(port); | |
629 | pending = status & UART_GET_IMR(port); | |
630 | if (!pending) | |
631 | break; | |
632 | ||
b843aa21 RB |
633 | atmel_handle_receive(port, pending); |
634 | atmel_handle_status(port, pending, status); | |
635 | atmel_handle_transmit(port, pending); | |
a6670615 | 636 | } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT); |
afefc415 | 637 | |
0400b697 | 638 | return pass_counter ? IRQ_HANDLED : IRQ_NONE; |
a6670615 | 639 | } |
1e6c9c28 | 640 | |
a6670615 CC |
641 | /* |
642 | * Called from tasklet with ENDTX and TXBUFE interrupts disabled. | |
643 | */ | |
644 | static void atmel_tx_dma(struct uart_port *port) | |
645 | { | |
c811ab8c | 646 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
ebd2c8f6 | 647 | struct circ_buf *xmit = &port->state->xmit; |
a6670615 CC |
648 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; |
649 | int count; | |
650 | ||
ba0657ff MT |
651 | /* nothing left to transmit? */ |
652 | if (UART_GET_TCR(port)) | |
653 | return; | |
654 | ||
a6670615 CC |
655 | xmit->tail += pdc->ofs; |
656 | xmit->tail &= UART_XMIT_SIZE - 1; | |
657 | ||
658 | port->icount.tx += pdc->ofs; | |
659 | pdc->ofs = 0; | |
660 | ||
ba0657ff | 661 | /* more to transmit - setup next transfer */ |
a6670615 | 662 | |
ba0657ff MT |
663 | /* disable PDC transmit */ |
664 | UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); | |
665 | ||
1f14081d | 666 | if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) { |
a6670615 CC |
667 | dma_sync_single_for_device(port->dev, |
668 | pdc->dma_addr, | |
669 | pdc->dma_size, | |
670 | DMA_TO_DEVICE); | |
671 | ||
672 | count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); | |
673 | pdc->ofs = count; | |
674 | ||
675 | UART_PUT_TPR(port, pdc->dma_addr + xmit->tail); | |
676 | UART_PUT_TCR(port, count); | |
e8faff73 | 677 | /* re-enable PDC transmit */ |
a6670615 | 678 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); |
e8faff73 CS |
679 | /* Enable interrupts */ |
680 | UART_PUT_IER(port, atmel_port->tx_done_mask); | |
681 | } else { | |
682 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) { | |
683 | /* DMA done, stop TX, start RX for RS485 */ | |
684 | atmel_start_rx(port); | |
685 | } | |
1e6c9c28 | 686 | } |
a6670615 CC |
687 | |
688 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
689 | uart_write_wakeup(port); | |
1e6c9c28 AV |
690 | } |
691 | ||
1ecc26bd RB |
692 | static void atmel_rx_from_ring(struct uart_port *port) |
693 | { | |
c811ab8c | 694 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd RB |
695 | struct circ_buf *ring = &atmel_port->rx_ring; |
696 | unsigned int flg; | |
697 | unsigned int status; | |
698 | ||
699 | while (ring->head != ring->tail) { | |
700 | struct atmel_uart_char c; | |
701 | ||
702 | /* Make sure c is loaded after head. */ | |
703 | smp_rmb(); | |
704 | ||
705 | c = ((struct atmel_uart_char *)ring->buf)[ring->tail]; | |
706 | ||
707 | ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1); | |
708 | ||
709 | port->icount.rx++; | |
710 | status = c.status; | |
711 | flg = TTY_NORMAL; | |
712 | ||
713 | /* | |
714 | * note that the error handling code is | |
715 | * out of the main execution path | |
716 | */ | |
717 | if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | |
718 | | ATMEL_US_OVRE | ATMEL_US_RXBRK))) { | |
719 | if (status & ATMEL_US_RXBRK) { | |
720 | /* ignore side-effect */ | |
721 | status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); | |
722 | ||
723 | port->icount.brk++; | |
724 | if (uart_handle_break(port)) | |
725 | continue; | |
726 | } | |
727 | if (status & ATMEL_US_PARE) | |
728 | port->icount.parity++; | |
729 | if (status & ATMEL_US_FRAME) | |
730 | port->icount.frame++; | |
731 | if (status & ATMEL_US_OVRE) | |
732 | port->icount.overrun++; | |
733 | ||
734 | status &= port->read_status_mask; | |
735 | ||
736 | if (status & ATMEL_US_RXBRK) | |
737 | flg = TTY_BREAK; | |
738 | else if (status & ATMEL_US_PARE) | |
739 | flg = TTY_PARITY; | |
740 | else if (status & ATMEL_US_FRAME) | |
741 | flg = TTY_FRAME; | |
742 | } | |
743 | ||
744 | ||
745 | if (uart_handle_sysrq_char(port, c.ch)) | |
746 | continue; | |
747 | ||
748 | uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg); | |
749 | } | |
750 | ||
751 | /* | |
752 | * Drop the lock here since it might end up calling | |
753 | * uart_start(), which takes the lock. | |
754 | */ | |
755 | spin_unlock(&port->lock); | |
ebd2c8f6 | 756 | tty_flip_buffer_push(port->state->port.tty); |
1ecc26bd RB |
757 | spin_lock(&port->lock); |
758 | } | |
759 | ||
a6670615 CC |
760 | static void atmel_rx_from_dma(struct uart_port *port) |
761 | { | |
c811ab8c | 762 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
ebd2c8f6 | 763 | struct tty_struct *tty = port->state->port.tty; |
a6670615 CC |
764 | struct atmel_dma_buffer *pdc; |
765 | int rx_idx = atmel_port->pdc_rx_idx; | |
766 | unsigned int head; | |
767 | unsigned int tail; | |
768 | unsigned int count; | |
769 | ||
770 | do { | |
771 | /* Reset the UART timeout early so that we don't miss one */ | |
772 | UART_PUT_CR(port, ATMEL_US_STTTO); | |
773 | ||
774 | pdc = &atmel_port->pdc_rx[rx_idx]; | |
775 | head = UART_GET_RPR(port) - pdc->dma_addr; | |
776 | tail = pdc->ofs; | |
777 | ||
778 | /* If the PDC has switched buffers, RPR won't contain | |
779 | * any address within the current buffer. Since head | |
780 | * is unsigned, we just need a one-way comparison to | |
781 | * find out. | |
782 | * | |
783 | * In this case, we just need to consume the entire | |
784 | * buffer and resubmit it for DMA. This will clear the | |
785 | * ENDRX bit as well, so that we can safely re-enable | |
786 | * all interrupts below. | |
787 | */ | |
788 | head = min(head, pdc->dma_size); | |
789 | ||
790 | if (likely(head != tail)) { | |
791 | dma_sync_single_for_cpu(port->dev, pdc->dma_addr, | |
792 | pdc->dma_size, DMA_FROM_DEVICE); | |
793 | ||
794 | /* | |
795 | * head will only wrap around when we recycle | |
796 | * the DMA buffer, and when that happens, we | |
797 | * explicitly set tail to 0. So head will | |
798 | * always be greater than tail. | |
799 | */ | |
800 | count = head - tail; | |
801 | ||
802 | tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count); | |
803 | ||
804 | dma_sync_single_for_device(port->dev, pdc->dma_addr, | |
805 | pdc->dma_size, DMA_FROM_DEVICE); | |
806 | ||
807 | port->icount.rx += count; | |
808 | pdc->ofs = head; | |
809 | } | |
810 | ||
811 | /* | |
812 | * If the current buffer is full, we need to check if | |
813 | * the next one contains any additional data. | |
814 | */ | |
815 | if (head >= pdc->dma_size) { | |
816 | pdc->ofs = 0; | |
817 | UART_PUT_RNPR(port, pdc->dma_addr); | |
818 | UART_PUT_RNCR(port, pdc->dma_size); | |
819 | ||
820 | rx_idx = !rx_idx; | |
821 | atmel_port->pdc_rx_idx = rx_idx; | |
822 | } | |
823 | } while (head >= pdc->dma_size); | |
824 | ||
825 | /* | |
826 | * Drop the lock here since it might end up calling | |
827 | * uart_start(), which takes the lock. | |
828 | */ | |
829 | spin_unlock(&port->lock); | |
830 | tty_flip_buffer_push(tty); | |
831 | spin_lock(&port->lock); | |
832 | ||
833 | UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); | |
834 | } | |
835 | ||
1ecc26bd RB |
836 | /* |
837 | * tasklet handling tty stuff outside the interrupt handler. | |
838 | */ | |
839 | static void atmel_tasklet_func(unsigned long data) | |
840 | { | |
841 | struct uart_port *port = (struct uart_port *)data; | |
c811ab8c | 842 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd RB |
843 | unsigned int status; |
844 | unsigned int status_change; | |
845 | ||
846 | /* The interrupt handler does not take the lock */ | |
847 | spin_lock(&port->lock); | |
848 | ||
a6670615 CC |
849 | if (atmel_use_dma_tx(port)) |
850 | atmel_tx_dma(port); | |
851 | else | |
852 | atmel_tx_chars(port); | |
1ecc26bd RB |
853 | |
854 | status = atmel_port->irq_status; | |
855 | status_change = status ^ atmel_port->irq_status_prev; | |
856 | ||
857 | if (status_change & (ATMEL_US_RI | ATMEL_US_DSR | |
858 | | ATMEL_US_DCD | ATMEL_US_CTS)) { | |
859 | /* TODO: All reads to CSR will clear these interrupts! */ | |
860 | if (status_change & ATMEL_US_RI) | |
861 | port->icount.rng++; | |
862 | if (status_change & ATMEL_US_DSR) | |
863 | port->icount.dsr++; | |
864 | if (status_change & ATMEL_US_DCD) | |
865 | uart_handle_dcd_change(port, !(status & ATMEL_US_DCD)); | |
866 | if (status_change & ATMEL_US_CTS) | |
867 | uart_handle_cts_change(port, !(status & ATMEL_US_CTS)); | |
868 | ||
bdc04e31 | 869 | wake_up_interruptible(&port->state->port.delta_msr_wait); |
1ecc26bd RB |
870 | |
871 | atmel_port->irq_status_prev = status; | |
872 | } | |
873 | ||
a6670615 CC |
874 | if (atmel_use_dma_rx(port)) |
875 | atmel_rx_from_dma(port); | |
876 | else | |
877 | atmel_rx_from_ring(port); | |
1ecc26bd RB |
878 | |
879 | spin_unlock(&port->lock); | |
880 | } | |
881 | ||
1e6c9c28 AV |
882 | /* |
883 | * Perform initialization and enable port for reception | |
884 | */ | |
7192f92c | 885 | static int atmel_startup(struct uart_port *port) |
1e6c9c28 | 886 | { |
c811ab8c | 887 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
ebd2c8f6 | 888 | struct tty_struct *tty = port->state->port.tty; |
1e6c9c28 AV |
889 | int retval; |
890 | ||
891 | /* | |
892 | * Ensure that no interrupts are enabled otherwise when | |
893 | * request_irq() is called we could get stuck trying to | |
894 | * handle an unexpected interrupt | |
895 | */ | |
896 | UART_PUT_IDR(port, -1); | |
897 | ||
898 | /* | |
899 | * Allocate the IRQ | |
900 | */ | |
b843aa21 | 901 | retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, |
ae161068 | 902 | tty ? tty->name : "atmel_serial", port); |
1e6c9c28 | 903 | if (retval) { |
7192f92c | 904 | printk("atmel_serial: atmel_startup - Can't get irq\n"); |
1e6c9c28 AV |
905 | return retval; |
906 | } | |
907 | ||
a6670615 CC |
908 | /* |
909 | * Initialize DMA (if necessary) | |
910 | */ | |
911 | if (atmel_use_dma_rx(port)) { | |
912 | int i; | |
913 | ||
914 | for (i = 0; i < 2; i++) { | |
915 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; | |
916 | ||
917 | pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL); | |
918 | if (pdc->buf == NULL) { | |
919 | if (i != 0) { | |
920 | dma_unmap_single(port->dev, | |
921 | atmel_port->pdc_rx[0].dma_addr, | |
922 | PDC_BUFFER_SIZE, | |
923 | DMA_FROM_DEVICE); | |
924 | kfree(atmel_port->pdc_rx[0].buf); | |
925 | } | |
926 | free_irq(port->irq, port); | |
927 | return -ENOMEM; | |
928 | } | |
929 | pdc->dma_addr = dma_map_single(port->dev, | |
930 | pdc->buf, | |
931 | PDC_BUFFER_SIZE, | |
932 | DMA_FROM_DEVICE); | |
933 | pdc->dma_size = PDC_BUFFER_SIZE; | |
934 | pdc->ofs = 0; | |
935 | } | |
936 | ||
937 | atmel_port->pdc_rx_idx = 0; | |
938 | ||
939 | UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr); | |
940 | UART_PUT_RCR(port, PDC_BUFFER_SIZE); | |
941 | ||
942 | UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr); | |
943 | UART_PUT_RNCR(port, PDC_BUFFER_SIZE); | |
944 | } | |
945 | if (atmel_use_dma_tx(port)) { | |
946 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; | |
ebd2c8f6 | 947 | struct circ_buf *xmit = &port->state->xmit; |
a6670615 CC |
948 | |
949 | pdc->buf = xmit->buf; | |
950 | pdc->dma_addr = dma_map_single(port->dev, | |
951 | pdc->buf, | |
952 | UART_XMIT_SIZE, | |
953 | DMA_TO_DEVICE); | |
954 | pdc->dma_size = UART_XMIT_SIZE; | |
955 | pdc->ofs = 0; | |
956 | } | |
957 | ||
1e6c9c28 AV |
958 | /* |
959 | * If there is a specific "open" function (to register | |
960 | * control line interrupts) | |
961 | */ | |
71f2e2b8 HS |
962 | if (atmel_open_hook) { |
963 | retval = atmel_open_hook(port); | |
1e6c9c28 AV |
964 | if (retval) { |
965 | free_irq(port->irq, port); | |
966 | return retval; | |
967 | } | |
968 | } | |
969 | ||
27c0c8e5 AN |
970 | /* Save current CSR for comparison in atmel_tasklet_func() */ |
971 | atmel_port->irq_status_prev = UART_GET_CSR(port); | |
972 | atmel_port->irq_status = atmel_port->irq_status_prev; | |
973 | ||
1e6c9c28 AV |
974 | /* |
975 | * Finally, enable the serial port | |
976 | */ | |
7192f92c | 977 | UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); |
b843aa21 RB |
978 | /* enable xmit & rcvr */ |
979 | UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); | |
afefc415 | 980 | |
a6670615 CC |
981 | if (atmel_use_dma_rx(port)) { |
982 | /* set UART timeout */ | |
983 | UART_PUT_RTOR(port, PDC_RX_TIMEOUT); | |
984 | UART_PUT_CR(port, ATMEL_US_STTTO); | |
985 | ||
986 | UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); | |
987 | /* enable PDC controller */ | |
988 | UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); | |
989 | } else { | |
990 | /* enable receive only */ | |
991 | UART_PUT_IER(port, ATMEL_US_RXRDY); | |
992 | } | |
afefc415 | 993 | |
1e6c9c28 AV |
994 | return 0; |
995 | } | |
996 | ||
997 | /* | |
998 | * Disable the port | |
999 | */ | |
7192f92c | 1000 | static void atmel_shutdown(struct uart_port *port) |
1e6c9c28 | 1001 | { |
c811ab8c | 1002 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
a6670615 CC |
1003 | /* |
1004 | * Ensure everything is stopped. | |
1005 | */ | |
1006 | atmel_stop_rx(port); | |
1007 | atmel_stop_tx(port); | |
1008 | ||
1009 | /* | |
1010 | * Shut-down the DMA. | |
1011 | */ | |
1012 | if (atmel_use_dma_rx(port)) { | |
1013 | int i; | |
1014 | ||
1015 | for (i = 0; i < 2; i++) { | |
1016 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; | |
1017 | ||
1018 | dma_unmap_single(port->dev, | |
1019 | pdc->dma_addr, | |
1020 | pdc->dma_size, | |
1021 | DMA_FROM_DEVICE); | |
1022 | kfree(pdc->buf); | |
1023 | } | |
1024 | } | |
1025 | if (atmel_use_dma_tx(port)) { | |
1026 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; | |
1027 | ||
1028 | dma_unmap_single(port->dev, | |
1029 | pdc->dma_addr, | |
1030 | pdc->dma_size, | |
1031 | DMA_TO_DEVICE); | |
1032 | } | |
1033 | ||
1e6c9c28 AV |
1034 | /* |
1035 | * Disable all interrupts, port and break condition. | |
1036 | */ | |
7192f92c | 1037 | UART_PUT_CR(port, ATMEL_US_RSTSTA); |
1e6c9c28 AV |
1038 | UART_PUT_IDR(port, -1); |
1039 | ||
1040 | /* | |
1041 | * Free the interrupt | |
1042 | */ | |
1043 | free_irq(port->irq, port); | |
1044 | ||
1045 | /* | |
1046 | * If there is a specific "close" function (to unregister | |
1047 | * control line interrupts) | |
1048 | */ | |
71f2e2b8 HS |
1049 | if (atmel_close_hook) |
1050 | atmel_close_hook(port); | |
1e6c9c28 AV |
1051 | } |
1052 | ||
9afd561a HS |
1053 | /* |
1054 | * Flush any TX data submitted for DMA. Called when the TX circular | |
1055 | * buffer is reset. | |
1056 | */ | |
1057 | static void atmel_flush_buffer(struct uart_port *port) | |
1058 | { | |
1059 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | |
1060 | ||
1061 | if (atmel_use_dma_tx(port)) { | |
1062 | UART_PUT_TCR(port, 0); | |
1063 | atmel_port->pdc_tx.ofs = 0; | |
1064 | } | |
1065 | } | |
1066 | ||
1e6c9c28 AV |
1067 | /* |
1068 | * Power / Clock management. | |
1069 | */ | |
b843aa21 RB |
1070 | static void atmel_serial_pm(struct uart_port *port, unsigned int state, |
1071 | unsigned int oldstate) | |
1e6c9c28 | 1072 | { |
c811ab8c | 1073 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
afefc415 | 1074 | |
1e6c9c28 | 1075 | switch (state) { |
b843aa21 RB |
1076 | case 0: |
1077 | /* | |
1078 | * Enable the peripheral clock for this serial port. | |
1079 | * This is called on uart_open() or a resume event. | |
1080 | */ | |
1081 | clk_enable(atmel_port->clk); | |
f05596db AS |
1082 | |
1083 | /* re-enable interrupts if we disabled some on suspend */ | |
1084 | UART_PUT_IER(port, atmel_port->backup_imr); | |
b843aa21 RB |
1085 | break; |
1086 | case 3: | |
f05596db AS |
1087 | /* Back up the interrupt mask and disable all interrupts */ |
1088 | atmel_port->backup_imr = UART_GET_IMR(port); | |
1089 | UART_PUT_IDR(port, -1); | |
1090 | ||
b843aa21 RB |
1091 | /* |
1092 | * Disable the peripheral clock for this serial port. | |
1093 | * This is called on uart_close() or a suspend event. | |
1094 | */ | |
1095 | clk_disable(atmel_port->clk); | |
1096 | break; | |
1097 | default: | |
1098 | printk(KERN_ERR "atmel_serial: unknown pm %d\n", state); | |
1e6c9c28 AV |
1099 | } |
1100 | } | |
1101 | ||
1102 | /* | |
1103 | * Change the port parameters | |
1104 | */ | |
b843aa21 RB |
1105 | static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, |
1106 | struct ktermios *old) | |
1e6c9c28 AV |
1107 | { |
1108 | unsigned long flags; | |
1109 | unsigned int mode, imr, quot, baud; | |
e8faff73 | 1110 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1e6c9c28 | 1111 | |
03abeac0 | 1112 | /* Get current mode register */ |
b843aa21 | 1113 | mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL |
8e706c4d PM |
1114 | | ATMEL_US_NBSTOP | ATMEL_US_PAR |
1115 | | ATMEL_US_USMODE); | |
03abeac0 | 1116 | |
b843aa21 | 1117 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); |
1e6c9c28 AV |
1118 | quot = uart_get_divisor(port, baud); |
1119 | ||
b843aa21 | 1120 | if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */ |
03abeac0 AV |
1121 | quot /= 8; |
1122 | mode |= ATMEL_US_USCLKS_MCK_DIV8; | |
1123 | } | |
1e6c9c28 AV |
1124 | |
1125 | /* byte size */ | |
1126 | switch (termios->c_cflag & CSIZE) { | |
1127 | case CS5: | |
7192f92c | 1128 | mode |= ATMEL_US_CHRL_5; |
1e6c9c28 AV |
1129 | break; |
1130 | case CS6: | |
7192f92c | 1131 | mode |= ATMEL_US_CHRL_6; |
1e6c9c28 AV |
1132 | break; |
1133 | case CS7: | |
7192f92c | 1134 | mode |= ATMEL_US_CHRL_7; |
1e6c9c28 AV |
1135 | break; |
1136 | default: | |
7192f92c | 1137 | mode |= ATMEL_US_CHRL_8; |
1e6c9c28 AV |
1138 | break; |
1139 | } | |
1140 | ||
1141 | /* stop bits */ | |
1142 | if (termios->c_cflag & CSTOPB) | |
7192f92c | 1143 | mode |= ATMEL_US_NBSTOP_2; |
1e6c9c28 AV |
1144 | |
1145 | /* parity */ | |
1146 | if (termios->c_cflag & PARENB) { | |
b843aa21 RB |
1147 | /* Mark or Space parity */ |
1148 | if (termios->c_cflag & CMSPAR) { | |
1e6c9c28 | 1149 | if (termios->c_cflag & PARODD) |
7192f92c | 1150 | mode |= ATMEL_US_PAR_MARK; |
1e6c9c28 | 1151 | else |
7192f92c | 1152 | mode |= ATMEL_US_PAR_SPACE; |
b843aa21 | 1153 | } else if (termios->c_cflag & PARODD) |
7192f92c | 1154 | mode |= ATMEL_US_PAR_ODD; |
1e6c9c28 | 1155 | else |
7192f92c | 1156 | mode |= ATMEL_US_PAR_EVEN; |
b843aa21 | 1157 | } else |
7192f92c | 1158 | mode |= ATMEL_US_PAR_NONE; |
1e6c9c28 | 1159 | |
8e706c4d PM |
1160 | /* hardware handshake (RTS/CTS) */ |
1161 | if (termios->c_cflag & CRTSCTS) | |
1162 | mode |= ATMEL_US_USMODE_HWHS; | |
1163 | else | |
1164 | mode |= ATMEL_US_USMODE_NORMAL; | |
1165 | ||
1e6c9c28 AV |
1166 | spin_lock_irqsave(&port->lock, flags); |
1167 | ||
7192f92c | 1168 | port->read_status_mask = ATMEL_US_OVRE; |
1e6c9c28 | 1169 | if (termios->c_iflag & INPCK) |
7192f92c | 1170 | port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); |
1e6c9c28 | 1171 | if (termios->c_iflag & (BRKINT | PARMRK)) |
7192f92c | 1172 | port->read_status_mask |= ATMEL_US_RXBRK; |
1e6c9c28 | 1173 | |
a6670615 CC |
1174 | if (atmel_use_dma_rx(port)) |
1175 | /* need to enable error interrupts */ | |
1176 | UART_PUT_IER(port, port->read_status_mask); | |
1177 | ||
1e6c9c28 AV |
1178 | /* |
1179 | * Characters to ignore | |
1180 | */ | |
1181 | port->ignore_status_mask = 0; | |
1182 | if (termios->c_iflag & IGNPAR) | |
7192f92c | 1183 | port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); |
1e6c9c28 | 1184 | if (termios->c_iflag & IGNBRK) { |
7192f92c | 1185 | port->ignore_status_mask |= ATMEL_US_RXBRK; |
1e6c9c28 AV |
1186 | /* |
1187 | * If we're ignoring parity and break indicators, | |
1188 | * ignore overruns too (for real raw support). | |
1189 | */ | |
1190 | if (termios->c_iflag & IGNPAR) | |
7192f92c | 1191 | port->ignore_status_mask |= ATMEL_US_OVRE; |
1e6c9c28 | 1192 | } |
b843aa21 | 1193 | /* TODO: Ignore all characters if CREAD is set.*/ |
1e6c9c28 AV |
1194 | |
1195 | /* update the per-port timeout */ | |
1196 | uart_update_timeout(port, termios->c_cflag, baud); | |
1197 | ||
0ccad870 HS |
1198 | /* |
1199 | * save/disable interrupts. The tty layer will ensure that the | |
1200 | * transmitter is empty if requested by the caller, so there's | |
1201 | * no need to wait for it here. | |
1202 | */ | |
b843aa21 RB |
1203 | imr = UART_GET_IMR(port); |
1204 | UART_PUT_IDR(port, -1); | |
1e6c9c28 AV |
1205 | |
1206 | /* disable receiver and transmitter */ | |
7192f92c | 1207 | UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); |
1e6c9c28 | 1208 | |
e8faff73 CS |
1209 | /* Resetting serial mode to RS232 (0x0) */ |
1210 | mode &= ~ATMEL_US_USMODE; | |
1211 | ||
1212 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) { | |
1213 | dev_dbg(port->dev, "Setting UART to RS485\n"); | |
1214 | UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send); | |
1215 | mode |= ATMEL_US_USMODE_RS485; | |
1216 | } else { | |
1217 | dev_dbg(port->dev, "Setting UART to RS232\n"); | |
1218 | } | |
1219 | ||
1e6c9c28 AV |
1220 | /* set the parity, stop bits and data size */ |
1221 | UART_PUT_MR(port, mode); | |
1222 | ||
1223 | /* set the baud rate */ | |
1224 | UART_PUT_BRGR(port, quot); | |
7192f92c HS |
1225 | UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); |
1226 | UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); | |
1e6c9c28 AV |
1227 | |
1228 | /* restore interrupts */ | |
1229 | UART_PUT_IER(port, imr); | |
1230 | ||
1231 | /* CTS flow-control and modem-status interrupts */ | |
1232 | if (UART_ENABLE_MS(port, termios->c_cflag)) | |
1233 | port->ops->enable_ms(port); | |
1234 | ||
1235 | spin_unlock_irqrestore(&port->lock, flags); | |
1236 | } | |
1237 | ||
1238 | /* | |
1239 | * Return string describing the specified port | |
1240 | */ | |
7192f92c | 1241 | static const char *atmel_type(struct uart_port *port) |
1e6c9c28 | 1242 | { |
9ab4f88b | 1243 | return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL; |
1e6c9c28 AV |
1244 | } |
1245 | ||
1246 | /* | |
1247 | * Release the memory region(s) being used by 'port'. | |
1248 | */ | |
7192f92c | 1249 | static void atmel_release_port(struct uart_port *port) |
1e6c9c28 | 1250 | { |
afefc415 AV |
1251 | struct platform_device *pdev = to_platform_device(port->dev); |
1252 | int size = pdev->resource[0].end - pdev->resource[0].start + 1; | |
1253 | ||
1254 | release_mem_region(port->mapbase, size); | |
1255 | ||
1256 | if (port->flags & UPF_IOREMAP) { | |
1257 | iounmap(port->membase); | |
1258 | port->membase = NULL; | |
1259 | } | |
1e6c9c28 AV |
1260 | } |
1261 | ||
1262 | /* | |
1263 | * Request the memory region(s) being used by 'port'. | |
1264 | */ | |
7192f92c | 1265 | static int atmel_request_port(struct uart_port *port) |
1e6c9c28 | 1266 | { |
afefc415 AV |
1267 | struct platform_device *pdev = to_platform_device(port->dev); |
1268 | int size = pdev->resource[0].end - pdev->resource[0].start + 1; | |
1269 | ||
7192f92c | 1270 | if (!request_mem_region(port->mapbase, size, "atmel_serial")) |
afefc415 AV |
1271 | return -EBUSY; |
1272 | ||
1273 | if (port->flags & UPF_IOREMAP) { | |
1274 | port->membase = ioremap(port->mapbase, size); | |
1275 | if (port->membase == NULL) { | |
1276 | release_mem_region(port->mapbase, size); | |
1277 | return -ENOMEM; | |
1278 | } | |
1279 | } | |
1e6c9c28 | 1280 | |
afefc415 | 1281 | return 0; |
1e6c9c28 AV |
1282 | } |
1283 | ||
1284 | /* | |
1285 | * Configure/autoconfigure the port. | |
1286 | */ | |
7192f92c | 1287 | static void atmel_config_port(struct uart_port *port, int flags) |
1e6c9c28 AV |
1288 | { |
1289 | if (flags & UART_CONFIG_TYPE) { | |
9ab4f88b | 1290 | port->type = PORT_ATMEL; |
7192f92c | 1291 | atmel_request_port(port); |
1e6c9c28 AV |
1292 | } |
1293 | } | |
1294 | ||
1295 | /* | |
1296 | * Verify the new serial_struct (for TIOCSSERIAL). | |
1297 | */ | |
7192f92c | 1298 | static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser) |
1e6c9c28 AV |
1299 | { |
1300 | int ret = 0; | |
9ab4f88b | 1301 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL) |
1e6c9c28 AV |
1302 | ret = -EINVAL; |
1303 | if (port->irq != ser->irq) | |
1304 | ret = -EINVAL; | |
1305 | if (ser->io_type != SERIAL_IO_MEM) | |
1306 | ret = -EINVAL; | |
1307 | if (port->uartclk / 16 != ser->baud_base) | |
1308 | ret = -EINVAL; | |
1309 | if ((void *)port->mapbase != ser->iomem_base) | |
1310 | ret = -EINVAL; | |
1311 | if (port->iobase != ser->port) | |
1312 | ret = -EINVAL; | |
1313 | if (ser->hub6 != 0) | |
1314 | ret = -EINVAL; | |
1315 | return ret; | |
1316 | } | |
1317 | ||
8fe2d541 AT |
1318 | #ifdef CONFIG_CONSOLE_POLL |
1319 | static int atmel_poll_get_char(struct uart_port *port) | |
1320 | { | |
1321 | while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY)) | |
1322 | cpu_relax(); | |
1323 | ||
1324 | return UART_GET_CHAR(port); | |
1325 | } | |
1326 | ||
1327 | static void atmel_poll_put_char(struct uart_port *port, unsigned char ch) | |
1328 | { | |
1329 | while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) | |
1330 | cpu_relax(); | |
1331 | ||
1332 | UART_PUT_CHAR(port, ch); | |
1333 | } | |
1334 | #endif | |
1335 | ||
e8faff73 CS |
1336 | static int |
1337 | atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg) | |
1338 | { | |
1339 | struct serial_rs485 rs485conf; | |
1340 | ||
1341 | switch (cmd) { | |
1342 | case TIOCSRS485: | |
1343 | if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg, | |
1344 | sizeof(rs485conf))) | |
1345 | return -EFAULT; | |
1346 | ||
1347 | atmel_config_rs485(port, &rs485conf); | |
1348 | break; | |
1349 | ||
1350 | case TIOCGRS485: | |
1351 | if (copy_to_user((struct serial_rs485 *) arg, | |
1352 | &(to_atmel_uart_port(port)->rs485), | |
1353 | sizeof(rs485conf))) | |
1354 | return -EFAULT; | |
1355 | break; | |
1356 | ||
1357 | default: | |
1358 | return -ENOIOCTLCMD; | |
1359 | } | |
1360 | return 0; | |
1361 | } | |
1362 | ||
1363 | ||
1364 | ||
7192f92c HS |
1365 | static struct uart_ops atmel_pops = { |
1366 | .tx_empty = atmel_tx_empty, | |
1367 | .set_mctrl = atmel_set_mctrl, | |
1368 | .get_mctrl = atmel_get_mctrl, | |
1369 | .stop_tx = atmel_stop_tx, | |
1370 | .start_tx = atmel_start_tx, | |
1371 | .stop_rx = atmel_stop_rx, | |
1372 | .enable_ms = atmel_enable_ms, | |
1373 | .break_ctl = atmel_break_ctl, | |
1374 | .startup = atmel_startup, | |
1375 | .shutdown = atmel_shutdown, | |
9afd561a | 1376 | .flush_buffer = atmel_flush_buffer, |
7192f92c HS |
1377 | .set_termios = atmel_set_termios, |
1378 | .type = atmel_type, | |
1379 | .release_port = atmel_release_port, | |
1380 | .request_port = atmel_request_port, | |
1381 | .config_port = atmel_config_port, | |
1382 | .verify_port = atmel_verify_port, | |
1383 | .pm = atmel_serial_pm, | |
e8faff73 | 1384 | .ioctl = atmel_ioctl, |
8fe2d541 AT |
1385 | #ifdef CONFIG_CONSOLE_POLL |
1386 | .poll_get_char = atmel_poll_get_char, | |
1387 | .poll_put_char = atmel_poll_put_char, | |
1388 | #endif | |
1e6c9c28 AV |
1389 | }; |
1390 | ||
afefc415 AV |
1391 | /* |
1392 | * Configure the port from the platform device resource info. | |
1393 | */ | |
b843aa21 RB |
1394 | static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, |
1395 | struct platform_device *pdev) | |
1e6c9c28 | 1396 | { |
7192f92c | 1397 | struct uart_port *port = &atmel_port->uart; |
73e2798b | 1398 | struct atmel_uart_data *data = pdev->dev.platform_data; |
afefc415 | 1399 | |
e8faff73 CS |
1400 | port->iotype = UPIO_MEM; |
1401 | port->flags = UPF_BOOT_AUTOCONF; | |
1402 | port->ops = &atmel_pops; | |
1403 | port->fifosize = 1; | |
1404 | port->line = pdev->id; | |
1405 | port->dev = &pdev->dev; | |
afefc415 AV |
1406 | port->mapbase = pdev->resource[0].start; |
1407 | port->irq = pdev->resource[1].start; | |
1408 | ||
1ecc26bd RB |
1409 | tasklet_init(&atmel_port->tasklet, atmel_tasklet_func, |
1410 | (unsigned long)port); | |
1411 | ||
1412 | memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring)); | |
1413 | ||
75d35213 HS |
1414 | if (data->regs) |
1415 | /* Already mapped by setup code */ | |
1416 | port->membase = data->regs; | |
afefc415 AV |
1417 | else { |
1418 | port->flags |= UPF_IOREMAP; | |
1419 | port->membase = NULL; | |
1420 | } | |
1e6c9c28 | 1421 | |
b843aa21 RB |
1422 | /* for console, the clock could already be configured */ |
1423 | if (!atmel_port->clk) { | |
7192f92c HS |
1424 | atmel_port->clk = clk_get(&pdev->dev, "usart"); |
1425 | clk_enable(atmel_port->clk); | |
1426 | port->uartclk = clk_get_rate(atmel_port->clk); | |
06a7f058 DB |
1427 | clk_disable(atmel_port->clk); |
1428 | /* only enable clock when USART is in use */ | |
afefc415 | 1429 | } |
a6670615 CC |
1430 | |
1431 | atmel_port->use_dma_rx = data->use_dma_rx; | |
1432 | atmel_port->use_dma_tx = data->use_dma_tx; | |
e8faff73 CS |
1433 | atmel_port->rs485 = data->rs485; |
1434 | /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */ | |
1435 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) | |
1436 | atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; | |
1437 | else if (atmel_use_dma_tx(port)) { | |
a6670615 | 1438 | port->fifosize = PDC_BUFFER_SIZE; |
e8faff73 CS |
1439 | atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE; |
1440 | } else { | |
1441 | atmel_port->tx_done_mask = ATMEL_US_TXRDY; | |
1442 | } | |
1e6c9c28 AV |
1443 | } |
1444 | ||
afefc415 AV |
1445 | /* |
1446 | * Register board-specific modem-control line handlers. | |
1447 | */ | |
71f2e2b8 | 1448 | void __init atmel_register_uart_fns(struct atmel_port_fns *fns) |
1e6c9c28 AV |
1449 | { |
1450 | if (fns->enable_ms) | |
7192f92c | 1451 | atmel_pops.enable_ms = fns->enable_ms; |
1e6c9c28 | 1452 | if (fns->get_mctrl) |
7192f92c | 1453 | atmel_pops.get_mctrl = fns->get_mctrl; |
1e6c9c28 | 1454 | if (fns->set_mctrl) |
7192f92c | 1455 | atmel_pops.set_mctrl = fns->set_mctrl; |
71f2e2b8 HS |
1456 | atmel_open_hook = fns->open; |
1457 | atmel_close_hook = fns->close; | |
7192f92c HS |
1458 | atmel_pops.pm = fns->pm; |
1459 | atmel_pops.set_wake = fns->set_wake; | |
1e6c9c28 AV |
1460 | } |
1461 | ||
749c4e60 | 1462 | #ifdef CONFIG_SERIAL_ATMEL_CONSOLE |
7192f92c | 1463 | static void atmel_console_putchar(struct uart_port *port, int ch) |
d358788f | 1464 | { |
7192f92c | 1465 | while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) |
829dd811 | 1466 | cpu_relax(); |
d358788f RK |
1467 | UART_PUT_CHAR(port, ch); |
1468 | } | |
1e6c9c28 AV |
1469 | |
1470 | /* | |
1471 | * Interrupts are disabled on entering | |
1472 | */ | |
7192f92c | 1473 | static void atmel_console_write(struct console *co, const char *s, u_int count) |
1e6c9c28 | 1474 | { |
7192f92c | 1475 | struct uart_port *port = &atmel_ports[co->index].uart; |
e8faff73 | 1476 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
d358788f | 1477 | unsigned int status, imr; |
39d4c922 | 1478 | unsigned int pdc_tx; |
1e6c9c28 AV |
1479 | |
1480 | /* | |
b843aa21 | 1481 | * First, save IMR and then disable interrupts |
1e6c9c28 | 1482 | */ |
b843aa21 | 1483 | imr = UART_GET_IMR(port); |
e8faff73 | 1484 | UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask); |
1e6c9c28 | 1485 | |
39d4c922 MP |
1486 | /* Store PDC transmit status and disable it */ |
1487 | pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN; | |
1488 | UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); | |
1489 | ||
7192f92c | 1490 | uart_console_write(port, s, count, atmel_console_putchar); |
1e6c9c28 AV |
1491 | |
1492 | /* | |
b843aa21 RB |
1493 | * Finally, wait for transmitter to become empty |
1494 | * and restore IMR | |
1e6c9c28 AV |
1495 | */ |
1496 | do { | |
1497 | status = UART_GET_CSR(port); | |
7192f92c | 1498 | } while (!(status & ATMEL_US_TXRDY)); |
39d4c922 MP |
1499 | |
1500 | /* Restore PDC transmit status */ | |
1501 | if (pdc_tx) | |
1502 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); | |
1503 | ||
b843aa21 RB |
1504 | /* set interrupts back the way they were */ |
1505 | UART_PUT_IER(port, imr); | |
1e6c9c28 AV |
1506 | } |
1507 | ||
1508 | /* | |
b843aa21 RB |
1509 | * If the port was already initialised (eg, by a boot loader), |
1510 | * try to determine the current setup. | |
1e6c9c28 | 1511 | */ |
b843aa21 RB |
1512 | static void __init atmel_console_get_options(struct uart_port *port, int *baud, |
1513 | int *parity, int *bits) | |
1e6c9c28 AV |
1514 | { |
1515 | unsigned int mr, quot; | |
1516 | ||
1c0fd82f HS |
1517 | /* |
1518 | * If the baud rate generator isn't running, the port wasn't | |
1519 | * initialized by the boot loader. | |
1520 | */ | |
9c81c5c9 | 1521 | quot = UART_GET_BRGR(port) & ATMEL_US_CD; |
1c0fd82f HS |
1522 | if (!quot) |
1523 | return; | |
1e6c9c28 | 1524 | |
7192f92c HS |
1525 | mr = UART_GET_MR(port) & ATMEL_US_CHRL; |
1526 | if (mr == ATMEL_US_CHRL_8) | |
1e6c9c28 AV |
1527 | *bits = 8; |
1528 | else | |
1529 | *bits = 7; | |
1530 | ||
7192f92c HS |
1531 | mr = UART_GET_MR(port) & ATMEL_US_PAR; |
1532 | if (mr == ATMEL_US_PAR_EVEN) | |
1e6c9c28 | 1533 | *parity = 'e'; |
7192f92c | 1534 | else if (mr == ATMEL_US_PAR_ODD) |
1e6c9c28 AV |
1535 | *parity = 'o'; |
1536 | ||
4d5e392c HS |
1537 | /* |
1538 | * The serial core only rounds down when matching this to a | |
1539 | * supported baud rate. Make sure we don't end up slightly | |
1540 | * lower than one of those, as it would make us fall through | |
1541 | * to a much lower baud rate than we really want. | |
1542 | */ | |
4d5e392c | 1543 | *baud = port->uartclk / (16 * (quot - 1)); |
1e6c9c28 AV |
1544 | } |
1545 | ||
7192f92c | 1546 | static int __init atmel_console_setup(struct console *co, char *options) |
1e6c9c28 | 1547 | { |
7192f92c | 1548 | struct uart_port *port = &atmel_ports[co->index].uart; |
1e6c9c28 AV |
1549 | int baud = 115200; |
1550 | int bits = 8; | |
1551 | int parity = 'n'; | |
1552 | int flow = 'n'; | |
1553 | ||
b843aa21 RB |
1554 | if (port->membase == NULL) { |
1555 | /* Port not initialized yet - delay setup */ | |
afefc415 | 1556 | return -ENODEV; |
b843aa21 | 1557 | } |
1e6c9c28 | 1558 | |
06a7f058 DB |
1559 | clk_enable(atmel_ports[co->index].clk); |
1560 | ||
b843aa21 | 1561 | UART_PUT_IDR(port, -1); |
7192f92c HS |
1562 | UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); |
1563 | UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); | |
1e6c9c28 AV |
1564 | |
1565 | if (options) | |
1566 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1567 | else | |
7192f92c | 1568 | atmel_console_get_options(port, &baud, &parity, &bits); |
1e6c9c28 AV |
1569 | |
1570 | return uart_set_options(port, co, baud, parity, bits, flow); | |
1571 | } | |
1572 | ||
7192f92c | 1573 | static struct uart_driver atmel_uart; |
1e6c9c28 | 1574 | |
7192f92c HS |
1575 | static struct console atmel_console = { |
1576 | .name = ATMEL_DEVICENAME, | |
1577 | .write = atmel_console_write, | |
1e6c9c28 | 1578 | .device = uart_console_device, |
7192f92c | 1579 | .setup = atmel_console_setup, |
1e6c9c28 AV |
1580 | .flags = CON_PRINTBUFFER, |
1581 | .index = -1, | |
7192f92c | 1582 | .data = &atmel_uart, |
1e6c9c28 AV |
1583 | }; |
1584 | ||
06a7f058 | 1585 | #define ATMEL_CONSOLE_DEVICE (&atmel_console) |
1e6c9c28 | 1586 | |
afefc415 AV |
1587 | /* |
1588 | * Early console initialization (before VM subsystem initialized). | |
1589 | */ | |
7192f92c | 1590 | static int __init atmel_console_init(void) |
1e6c9c28 | 1591 | { |
73e2798b | 1592 | if (atmel_default_console_device) { |
b843aa21 RB |
1593 | add_preferred_console(ATMEL_DEVICENAME, |
1594 | atmel_default_console_device->id, NULL); | |
1595 | atmel_init_port(&atmel_ports[atmel_default_console_device->id], | |
1596 | atmel_default_console_device); | |
7192f92c | 1597 | register_console(&atmel_console); |
afefc415 | 1598 | } |
1e6c9c28 | 1599 | |
1e6c9c28 AV |
1600 | return 0; |
1601 | } | |
b843aa21 | 1602 | |
7192f92c | 1603 | console_initcall(atmel_console_init); |
1e6c9c28 | 1604 | |
afefc415 AV |
1605 | /* |
1606 | * Late console initialization. | |
1607 | */ | |
7192f92c | 1608 | static int __init atmel_late_console_init(void) |
afefc415 | 1609 | { |
b843aa21 RB |
1610 | if (atmel_default_console_device |
1611 | && !(atmel_console.flags & CON_ENABLED)) | |
7192f92c | 1612 | register_console(&atmel_console); |
afefc415 AV |
1613 | |
1614 | return 0; | |
1615 | } | |
b843aa21 | 1616 | |
7192f92c | 1617 | core_initcall(atmel_late_console_init); |
afefc415 | 1618 | |
dfa7f343 HS |
1619 | static inline bool atmel_is_console_port(struct uart_port *port) |
1620 | { | |
1621 | return port->cons && port->cons->index == port->line; | |
1622 | } | |
1623 | ||
1e6c9c28 | 1624 | #else |
7192f92c | 1625 | #define ATMEL_CONSOLE_DEVICE NULL |
dfa7f343 HS |
1626 | |
1627 | static inline bool atmel_is_console_port(struct uart_port *port) | |
1628 | { | |
1629 | return false; | |
1630 | } | |
1e6c9c28 AV |
1631 | #endif |
1632 | ||
7192f92c | 1633 | static struct uart_driver atmel_uart = { |
b843aa21 RB |
1634 | .owner = THIS_MODULE, |
1635 | .driver_name = "atmel_serial", | |
1636 | .dev_name = ATMEL_DEVICENAME, | |
1637 | .major = SERIAL_ATMEL_MAJOR, | |
1638 | .minor = MINOR_START, | |
1639 | .nr = ATMEL_MAX_UART, | |
1640 | .cons = ATMEL_CONSOLE_DEVICE, | |
1e6c9c28 AV |
1641 | }; |
1642 | ||
afefc415 | 1643 | #ifdef CONFIG_PM |
f826caa4 HS |
1644 | static bool atmel_serial_clk_will_stop(void) |
1645 | { | |
1646 | #ifdef CONFIG_ARCH_AT91 | |
1647 | return at91_suspend_entering_slow_clock(); | |
1648 | #else | |
1649 | return false; | |
1650 | #endif | |
1651 | } | |
1652 | ||
b843aa21 RB |
1653 | static int atmel_serial_suspend(struct platform_device *pdev, |
1654 | pm_message_t state) | |
1e6c9c28 | 1655 | { |
afefc415 | 1656 | struct uart_port *port = platform_get_drvdata(pdev); |
c811ab8c | 1657 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
afefc415 | 1658 | |
e1c609ef HS |
1659 | if (atmel_is_console_port(port) && console_suspend_enabled) { |
1660 | /* Drain the TX shifter */ | |
1661 | while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) | |
1662 | cpu_relax(); | |
1663 | } | |
1664 | ||
f05596db AS |
1665 | /* we can not wake up if we're running on slow clock */ |
1666 | atmel_port->may_wakeup = device_may_wakeup(&pdev->dev); | |
1667 | if (atmel_serial_clk_will_stop()) | |
1668 | device_set_wakeup_enable(&pdev->dev, 0); | |
1669 | ||
1670 | uart_suspend_port(&atmel_uart, port); | |
1e6c9c28 | 1671 | |
afefc415 AV |
1672 | return 0; |
1673 | } | |
1e6c9c28 | 1674 | |
7192f92c | 1675 | static int atmel_serial_resume(struct platform_device *pdev) |
afefc415 AV |
1676 | { |
1677 | struct uart_port *port = platform_get_drvdata(pdev); | |
c811ab8c | 1678 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1e6c9c28 | 1679 | |
f05596db AS |
1680 | uart_resume_port(&atmel_uart, port); |
1681 | device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup); | |
1e6c9c28 AV |
1682 | |
1683 | return 0; | |
1684 | } | |
afefc415 | 1685 | #else |
7192f92c HS |
1686 | #define atmel_serial_suspend NULL |
1687 | #define atmel_serial_resume NULL | |
afefc415 | 1688 | #endif |
1e6c9c28 | 1689 | |
7192f92c | 1690 | static int __devinit atmel_serial_probe(struct platform_device *pdev) |
1e6c9c28 | 1691 | { |
7192f92c | 1692 | struct atmel_uart_port *port; |
1ecc26bd | 1693 | void *data; |
afefc415 | 1694 | int ret; |
1e6c9c28 | 1695 | |
9d09daf8 | 1696 | BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1)); |
1ecc26bd | 1697 | |
7192f92c | 1698 | port = &atmel_ports[pdev->id]; |
f05596db AS |
1699 | port->backup_imr = 0; |
1700 | ||
7192f92c | 1701 | atmel_init_port(port, pdev); |
1e6c9c28 | 1702 | |
a6670615 CC |
1703 | if (!atmel_use_dma_rx(&port->uart)) { |
1704 | ret = -ENOMEM; | |
6433471d HS |
1705 | data = kmalloc(sizeof(struct atmel_uart_char) |
1706 | * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL); | |
a6670615 CC |
1707 | if (!data) |
1708 | goto err_alloc_ring; | |
1709 | port->rx_ring.buf = data; | |
1710 | } | |
1ecc26bd | 1711 | |
7192f92c | 1712 | ret = uart_add_one_port(&atmel_uart, &port->uart); |
dfa7f343 HS |
1713 | if (ret) |
1714 | goto err_add_port; | |
1715 | ||
8da14b5f | 1716 | #ifdef CONFIG_SERIAL_ATMEL_CONSOLE |
06a7f058 DB |
1717 | if (atmel_is_console_port(&port->uart) |
1718 | && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) { | |
1719 | /* | |
1720 | * The serial core enabled the clock for us, so undo | |
1721 | * the clk_enable() in atmel_console_setup() | |
1722 | */ | |
1723 | clk_disable(port->clk); | |
1724 | } | |
8da14b5f | 1725 | #endif |
06a7f058 | 1726 | |
dfa7f343 HS |
1727 | device_init_wakeup(&pdev->dev, 1); |
1728 | platform_set_drvdata(pdev, port); | |
1729 | ||
1730 | return 0; | |
1731 | ||
1732 | err_add_port: | |
1ecc26bd RB |
1733 | kfree(port->rx_ring.buf); |
1734 | port->rx_ring.buf = NULL; | |
1735 | err_alloc_ring: | |
dfa7f343 | 1736 | if (!atmel_is_console_port(&port->uart)) { |
dfa7f343 HS |
1737 | clk_put(port->clk); |
1738 | port->clk = NULL; | |
afefc415 AV |
1739 | } |
1740 | ||
1741 | return ret; | |
1742 | } | |
1743 | ||
7192f92c | 1744 | static int __devexit atmel_serial_remove(struct platform_device *pdev) |
afefc415 AV |
1745 | { |
1746 | struct uart_port *port = platform_get_drvdata(pdev); | |
c811ab8c | 1747 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
afefc415 AV |
1748 | int ret = 0; |
1749 | ||
afefc415 AV |
1750 | device_init_wakeup(&pdev->dev, 0); |
1751 | platform_set_drvdata(pdev, NULL); | |
1752 | ||
dfa7f343 HS |
1753 | ret = uart_remove_one_port(&atmel_uart, port); |
1754 | ||
1ecc26bd RB |
1755 | tasklet_kill(&atmel_port->tasklet); |
1756 | kfree(atmel_port->rx_ring.buf); | |
1757 | ||
dfa7f343 HS |
1758 | /* "port" is allocated statically, so we shouldn't free it */ |
1759 | ||
dfa7f343 | 1760 | clk_put(atmel_port->clk); |
afefc415 AV |
1761 | |
1762 | return ret; | |
1763 | } | |
1764 | ||
7192f92c HS |
1765 | static struct platform_driver atmel_serial_driver = { |
1766 | .probe = atmel_serial_probe, | |
1767 | .remove = __devexit_p(atmel_serial_remove), | |
1768 | .suspend = atmel_serial_suspend, | |
1769 | .resume = atmel_serial_resume, | |
afefc415 | 1770 | .driver = { |
1e8ea802 | 1771 | .name = "atmel_usart", |
afefc415 AV |
1772 | .owner = THIS_MODULE, |
1773 | }, | |
1774 | }; | |
1775 | ||
7192f92c | 1776 | static int __init atmel_serial_init(void) |
afefc415 AV |
1777 | { |
1778 | int ret; | |
1779 | ||
7192f92c | 1780 | ret = uart_register_driver(&atmel_uart); |
afefc415 AV |
1781 | if (ret) |
1782 | return ret; | |
1783 | ||
7192f92c | 1784 | ret = platform_driver_register(&atmel_serial_driver); |
afefc415 | 1785 | if (ret) |
7192f92c | 1786 | uart_unregister_driver(&atmel_uart); |
afefc415 AV |
1787 | |
1788 | return ret; | |
1789 | } | |
1790 | ||
7192f92c | 1791 | static void __exit atmel_serial_exit(void) |
afefc415 | 1792 | { |
7192f92c HS |
1793 | platform_driver_unregister(&atmel_serial_driver); |
1794 | uart_unregister_driver(&atmel_uart); | |
1e6c9c28 AV |
1795 | } |
1796 | ||
7192f92c HS |
1797 | module_init(atmel_serial_init); |
1798 | module_exit(atmel_serial_exit); | |
1e6c9c28 AV |
1799 | |
1800 | MODULE_AUTHOR("Rick Bronson"); | |
7192f92c | 1801 | MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver"); |
1e6c9c28 | 1802 | MODULE_LICENSE("GPL"); |
e169c139 | 1803 | MODULE_ALIAS("platform:atmel_usart"); |