[ARM] 2979/2: S3C2410 - add static to non-exported machine items
[deliverable/linux.git] / drivers / serial / imx.c
CommitLineData
1da177e4
LT
1/*
2 * linux/drivers/serial/imx.c
3 *
4 * Driver for Motorola IMX serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Author: Sascha Hauer <sascha@saschahauer.de>
9 * Copyright (C) 2004 Pengutronix
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * [29-Mar-2005] Mike Lee
26 * Added hardware handshake
27 */
28#include <linux/config.h>
29
30#if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31#define SUPPORT_SYSRQ
32#endif
33
34#include <linux/module.h>
35#include <linux/ioport.h>
36#include <linux/init.h>
37#include <linux/console.h>
38#include <linux/sysrq.h>
39#include <linux/device.h>
40#include <linux/tty.h>
41#include <linux/tty_flip.h>
42#include <linux/serial_core.h>
43#include <linux/serial.h>
44
45#include <asm/io.h>
46#include <asm/irq.h>
47#include <asm/hardware.h>
48
49/* We've been assigned a range on the "Low-density serial ports" major */
50#define SERIAL_IMX_MAJOR 204
51#define MINOR_START 41
52
53#define NR_PORTS 2
54
55#define IMX_ISR_PASS_LIMIT 256
56
57/*
58 * This is the size of our serial port register set.
59 */
60#define UART_PORT_SIZE 0x100
61
62/*
63 * This determines how often we check the modem status signals
64 * for any change. They generally aren't connected to an IRQ
65 * so we have to poll them. We also check immediately before
66 * filling the TX fifo incase CTS has been dropped.
67 */
68#define MCTRL_TIMEOUT (250*HZ/1000)
69
70#define DRIVER_NAME "IMX-uart"
71
72struct imx_port {
73 struct uart_port port;
74 struct timer_list timer;
75 unsigned int old_status;
76 int txirq,rxirq;
77};
78
79/*
80 * Handle any change of modem status signal since we were last called.
81 */
82static void imx_mctrl_check(struct imx_port *sport)
83{
84 unsigned int status, changed;
85
86 status = sport->port.ops->get_mctrl(&sport->port);
87 changed = status ^ sport->old_status;
88
89 if (changed == 0)
90 return;
91
92 sport->old_status = status;
93
94 if (changed & TIOCM_RI)
95 sport->port.icount.rng++;
96 if (changed & TIOCM_DSR)
97 sport->port.icount.dsr++;
98 if (changed & TIOCM_CAR)
99 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
100 if (changed & TIOCM_CTS)
101 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
102
103 wake_up_interruptible(&sport->port.info->delta_msr_wait);
104}
105
106/*
107 * This is our per-port timeout handler, for checking the
108 * modem status signals.
109 */
110static void imx_timeout(unsigned long data)
111{
112 struct imx_port *sport = (struct imx_port *)data;
113 unsigned long flags;
114
115 if (sport->port.info) {
116 spin_lock_irqsave(&sport->port.lock, flags);
117 imx_mctrl_check(sport);
118 spin_unlock_irqrestore(&sport->port.lock, flags);
119
120 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
121 }
122}
123
124/*
125 * interrupts disabled on entry
126 */
b129a8cc 127static void imx_stop_tx(struct uart_port *port)
1da177e4
LT
128{
129 struct imx_port *sport = (struct imx_port *)port;
130 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
131}
132
133/*
134 * interrupts disabled on entry
135 */
136static void imx_stop_rx(struct uart_port *port)
137{
138 struct imx_port *sport = (struct imx_port *)port;
139 UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
140}
141
142/*
143 * Set the modem control timer to fire immediately.
144 */
145static void imx_enable_ms(struct uart_port *port)
146{
147 struct imx_port *sport = (struct imx_port *)port;
148
149 mod_timer(&sport->timer, jiffies);
150}
151
152static inline void imx_transmit_buffer(struct imx_port *sport)
153{
154 struct circ_buf *xmit = &sport->port.info->xmit;
155
156 do {
157 /* send xmit->buf[xmit->tail]
158 * out the port here */
159 URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
160 xmit->tail = (xmit->tail + 1) &
161 (UART_XMIT_SIZE - 1);
162 sport->port.icount.tx++;
163 if (uart_circ_empty(xmit))
164 break;
165 } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL));
166
167 if (uart_circ_empty(xmit))
b129a8cc 168 imx_stop_tx(&sport->port);
1da177e4
LT
169}
170
171/*
172 * interrupts disabled on entry
173 */
b129a8cc 174static void imx_start_tx(struct uart_port *port)
1da177e4
LT
175{
176 struct imx_port *sport = (struct imx_port *)port;
177
178 UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
179
180 if(UTS((u32)sport->port.membase) & UTS_TXEMPTY)
181 imx_transmit_buffer(sport);
182}
183
184static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
185{
186 struct imx_port *sport = (struct imx_port *)dev_id;
187 struct circ_buf *xmit = &sport->port.info->xmit;
188 unsigned long flags;
189
190 spin_lock_irqsave(&sport->port.lock,flags);
191 if (sport->port.x_char)
192 {
193 /* Send next char */
194 URTX0((u32)sport->port.membase) = sport->port.x_char;
195 goto out;
196 }
197
198 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
b129a8cc 199 imx_stop_tx(&sport->port);
1da177e4
LT
200 goto out;
201 }
202
203 imx_transmit_buffer(sport);
204
205 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
206 uart_write_wakeup(&sport->port);
207
208out:
209 spin_unlock_irqrestore(&sport->port.lock,flags);
210 return IRQ_HANDLED;
211}
212
213static irqreturn_t imx_rxint(int irq, void *dev_id, struct pt_regs *regs)
214{
215 struct imx_port *sport = dev_id;
216 unsigned int rx,flg,ignored = 0;
217 struct tty_struct *tty = sport->port.info->tty;
218 unsigned long flags;
219
220 rx = URXD0((u32)sport->port.membase);
221 spin_lock_irqsave(&sport->port.lock,flags);
222
223 do {
224 flg = TTY_NORMAL;
225 sport->port.icount.rx++;
226
227 if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
228 USR2((u32)sport->port.membase) |= USR2_BRCD;
229 if(uart_handle_break(&sport->port))
230 goto ignore_char;
231 }
232
233 if (uart_handle_sysrq_char
234 (&sport->port, (unsigned char)rx, regs))
235 goto ignore_char;
236
237 if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
238 goto handle_error;
239
240 error_return:
241 tty_insert_flip_char(tty, rx, flg);
242
243 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
244 goto out;
245
246 ignore_char:
247 rx = URXD0((u32)sport->port.membase);
248 } while(rx & URXD_CHARRDY);
249
250out:
251 spin_unlock_irqrestore(&sport->port.lock,flags);
252 tty_flip_buffer_push(tty);
253 return IRQ_HANDLED;
254
255handle_error:
256 if (rx & URXD_PRERR)
257 sport->port.icount.parity++;
258 else if (rx & URXD_FRMERR)
259 sport->port.icount.frame++;
260 if (rx & URXD_OVRRUN)
261 sport->port.icount.overrun++;
262
263 if (rx & sport->port.ignore_status_mask) {
264 if (++ignored > 100)
265 goto out;
266 goto ignore_char;
267 }
268
269 rx &= sport->port.read_status_mask;
270
271 if (rx & URXD_PRERR)
272 flg = TTY_PARITY;
273 else if (rx & URXD_FRMERR)
274 flg = TTY_FRAME;
275 if (rx & URXD_OVRRUN)
276 flg = TTY_OVERRUN;
277
278#ifdef SUPPORT_SYSRQ
279 sport->port.sysrq = 0;
280#endif
281 goto error_return;
282}
283
284/*
285 * Return TIOCSER_TEMT when transmitter is not busy.
286 */
287static unsigned int imx_tx_empty(struct uart_port *port)
288{
289 struct imx_port *sport = (struct imx_port *)port;
290
291 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
292}
293
0f302dc3
SH
294/*
295 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
296 */
1da177e4
LT
297static unsigned int imx_get_mctrl(struct uart_port *port)
298{
0f302dc3
SH
299 struct imx_port *sport = (struct imx_port *)port;
300 unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
301
302 if (USR1((u32)sport->port.membase) & USR1_RTSS)
303 tmp |= TIOCM_CTS;
304
305 if (UCR2((u32)sport->port.membase) & UCR2_CTS)
306 tmp |= TIOCM_RTS;
307
308 return tmp;
1da177e4
LT
309}
310
311static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
312{
0f302dc3
SH
313 struct imx_port *sport = (struct imx_port *)port;
314
315 if (mctrl & TIOCM_RTS)
316 UCR2((u32)sport->port.membase) |= UCR2_CTS;
317 else
318 UCR2((u32)sport->port.membase) &= ~UCR2_CTS;
1da177e4
LT
319}
320
321/*
322 * Interrupts always disabled.
323 */
324static void imx_break_ctl(struct uart_port *port, int break_state)
325{
326 struct imx_port *sport = (struct imx_port *)port;
327 unsigned long flags;
328
329 spin_lock_irqsave(&sport->port.lock, flags);
330
331 if ( break_state != 0 )
332 UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
333 else
334 UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
335
336 spin_unlock_irqrestore(&sport->port.lock, flags);
337}
338
339#define TXTL 2 /* reset default */
340#define RXTL 1 /* reset default */
341
587897f5
SH
342static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
343{
344 unsigned int val;
345 unsigned int ufcr_rfdiv;
346
347 /* set receiver / transmitter trigger level.
348 * RFDIV is set such way to satisfy requested uartclk value
349 */
350 val = TXTL<<10 | RXTL;
351 ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk;
352
353 if(!ufcr_rfdiv)
354 ufcr_rfdiv = 1;
355
356 if(ufcr_rfdiv >= 7)
357 ufcr_rfdiv = 6;
358 else
359 ufcr_rfdiv = 6 - ufcr_rfdiv;
360
361 val |= UFCR_RFDIV & (ufcr_rfdiv << 7);
362
363 UFCR((u32)sport->port.membase) = val;
364
365 return 0;
366}
367
1da177e4
LT
368static int imx_startup(struct uart_port *port)
369{
370 struct imx_port *sport = (struct imx_port *)port;
371 int retval;
1da177e4
LT
372 unsigned long flags;
373
587897f5 374 imx_setup_ufcr(sport, 0);
1da177e4
LT
375
376 /* disable the DREN bit (Data Ready interrupt enable) before
377 * requesting IRQs
378 */
379 UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
380
381 /*
382 * Allocate the IRQ
383 */
384 retval = request_irq(sport->rxirq, imx_rxint, 0,
385 DRIVER_NAME, sport);
86371d07 386 if (retval) goto error_out1;
1da177e4
LT
387
388 retval = request_irq(sport->txirq, imx_txint, 0,
389 "imx-uart", sport);
86371d07 390 if (retval) goto error_out2;
1da177e4
LT
391
392 /*
393 * Finally, clear and enable interrupts
394 */
395
396 UCR1((u32)sport->port.membase) |=
397 (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
398
399 UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
400 /*
401 * Enable modem status interrupts
402 */
403 spin_lock_irqsave(&sport->port.lock,flags);
404 imx_enable_ms(&sport->port);
405 spin_unlock_irqrestore(&sport->port.lock,flags);
406
407 return 0;
408
1da177e4 409error_out2:
86371d07
SH
410 free_irq(sport->rxirq, sport);
411error_out1:
1da177e4
LT
412 return retval;
413}
414
415static void imx_shutdown(struct uart_port *port)
416{
417 struct imx_port *sport = (struct imx_port *)port;
418
419 /*
420 * Stop our timer.
421 */
422 del_timer_sync(&sport->timer);
423
424 /*
425 * Free the interrupts
426 */
427 free_irq(sport->txirq, sport);
428 free_irq(sport->rxirq, sport);
429
430 /*
431 * Disable all interrupts, port and break condition.
432 */
433
434 UCR1((u32)sport->port.membase) &=
435 ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
436}
437
438static void
439imx_set_termios(struct uart_port *port, struct termios *termios,
440 struct termios *old)
441{
442 struct imx_port *sport = (struct imx_port *)port;
443 unsigned long flags;
444 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
445 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
446
447 /*
448 * If we don't support modem control lines, don't allow
449 * these to be set.
450 */
451 if (0) {
452 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
453 termios->c_cflag |= CLOCAL;
454 }
455
456 /*
457 * We only support CS7 and CS8.
458 */
459 while ((termios->c_cflag & CSIZE) != CS7 &&
460 (termios->c_cflag & CSIZE) != CS8) {
461 termios->c_cflag &= ~CSIZE;
462 termios->c_cflag |= old_csize;
463 old_csize = CS8;
464 }
465
466 if ((termios->c_cflag & CSIZE) == CS8)
467 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
468 else
469 ucr2 = UCR2_SRST | UCR2_IRTS;
470
471 if (termios->c_cflag & CRTSCTS) {
472 ucr2 &= ~UCR2_IRTS;
473 ucr2 |= UCR2_CTSC;
474 }
475
476 if (termios->c_cflag & CSTOPB)
477 ucr2 |= UCR2_STPB;
478 if (termios->c_cflag & PARENB) {
479 ucr2 |= UCR2_PREN;
480 if (!(termios->c_cflag & PARODD))
481 ucr2 |= UCR2_PROE;
482 }
483
484 /*
485 * Ask the core to calculate the divisor for us.
486 */
487 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
488 quot = uart_get_divisor(port, baud);
489
490 spin_lock_irqsave(&sport->port.lock, flags);
491
492 sport->port.read_status_mask = 0;
493 if (termios->c_iflag & INPCK)
494 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
495 if (termios->c_iflag & (BRKINT | PARMRK))
496 sport->port.read_status_mask |= URXD_BRK;
497
498 /*
499 * Characters to ignore
500 */
501 sport->port.ignore_status_mask = 0;
502 if (termios->c_iflag & IGNPAR)
503 sport->port.ignore_status_mask |= URXD_PRERR;
504 if (termios->c_iflag & IGNBRK) {
505 sport->port.ignore_status_mask |= URXD_BRK;
506 /*
507 * If we're ignoring parity and break indicators,
508 * ignore overruns too (for real raw support).
509 */
510 if (termios->c_iflag & IGNPAR)
511 sport->port.ignore_status_mask |= URXD_OVRRUN;
512 }
513
514 del_timer_sync(&sport->timer);
515
516 /*
517 * Update the per-port timeout.
518 */
519 uart_update_timeout(port, termios->c_cflag, baud);
520
521 /*
522 * disable interrupts and drain transmitter
523 */
524 old_ucr1 = UCR1((u32)sport->port.membase);
525 UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
526
527 while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
528 barrier();
529
530 /* then, disable everything */
531 old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
532 UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
533
534 /* set the parity, stop bits and data size */
535 UCR2((u32)sport->port.membase) = ucr2;
536
537 /* set the baud rate. We assume uartclk = 16 MHz
538 *
539 * baud * 16 UBIR - 1
540 * --------- = --------
541 * uartclk UBMR - 1
542 */
543 UBIR((u32)sport->port.membase) = (baud / 100) - 1;
544 UBMR((u32)sport->port.membase) = 10000 - 1;
545
546 UCR1((u32)sport->port.membase) = old_ucr1;
547 UCR2((u32)sport->port.membase) |= old_txrxen;
548
549 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
550 imx_enable_ms(&sport->port);
551
552 spin_unlock_irqrestore(&sport->port.lock, flags);
553}
554
555static const char *imx_type(struct uart_port *port)
556{
557 struct imx_port *sport = (struct imx_port *)port;
558
559 return sport->port.type == PORT_IMX ? "IMX" : NULL;
560}
561
562/*
563 * Release the memory region(s) being used by 'port'.
564 */
565static void imx_release_port(struct uart_port *port)
566{
567 struct imx_port *sport = (struct imx_port *)port;
568
569 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
570}
571
572/*
573 * Request the memory region(s) being used by 'port'.
574 */
575static int imx_request_port(struct uart_port *port)
576{
577 struct imx_port *sport = (struct imx_port *)port;
578
579 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
580 "imx-uart") != NULL ? 0 : -EBUSY;
581}
582
583/*
584 * Configure/autoconfigure the port.
585 */
586static void imx_config_port(struct uart_port *port, int flags)
587{
588 struct imx_port *sport = (struct imx_port *)port;
589
590 if (flags & UART_CONFIG_TYPE &&
591 imx_request_port(&sport->port) == 0)
592 sport->port.type = PORT_IMX;
593}
594
595/*
596 * Verify the new serial_struct (for TIOCSSERIAL).
597 * The only change we allow are to the flags and type, and
598 * even then only between PORT_IMX and PORT_UNKNOWN
599 */
600static int
601imx_verify_port(struct uart_port *port, struct serial_struct *ser)
602{
603 struct imx_port *sport = (struct imx_port *)port;
604 int ret = 0;
605
606 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
607 ret = -EINVAL;
608 if (sport->port.irq != ser->irq)
609 ret = -EINVAL;
610 if (ser->io_type != UPIO_MEM)
611 ret = -EINVAL;
612 if (sport->port.uartclk / 16 != ser->baud_base)
613 ret = -EINVAL;
614 if ((void *)sport->port.mapbase != ser->iomem_base)
615 ret = -EINVAL;
616 if (sport->port.iobase != ser->port)
617 ret = -EINVAL;
618 if (ser->hub6 != 0)
619 ret = -EINVAL;
620 return ret;
621}
622
623static struct uart_ops imx_pops = {
624 .tx_empty = imx_tx_empty,
625 .set_mctrl = imx_set_mctrl,
626 .get_mctrl = imx_get_mctrl,
627 .stop_tx = imx_stop_tx,
628 .start_tx = imx_start_tx,
629 .stop_rx = imx_stop_rx,
630 .enable_ms = imx_enable_ms,
631 .break_ctl = imx_break_ctl,
632 .startup = imx_startup,
633 .shutdown = imx_shutdown,
634 .set_termios = imx_set_termios,
635 .type = imx_type,
636 .release_port = imx_release_port,
637 .request_port = imx_request_port,
638 .config_port = imx_config_port,
639 .verify_port = imx_verify_port,
640};
641
642static struct imx_port imx_ports[] = {
643 {
644 .txirq = UART1_MINT_TX,
645 .rxirq = UART1_MINT_RX,
646 .port = {
647 .type = PORT_IMX,
648 .iotype = SERIAL_IO_MEM,
649 .membase = (void *)IMX_UART1_BASE,
650 .mapbase = IMX_UART1_BASE, /* FIXME */
651 .irq = UART1_MINT_RX,
652 .uartclk = 16000000,
653 .fifosize = 8,
654 .flags = ASYNC_BOOT_AUTOCONF,
655 .ops = &imx_pops,
656 .line = 0,
657 },
658 }, {
659 .txirq = UART2_MINT_TX,
660 .rxirq = UART2_MINT_RX,
661 .port = {
662 .type = PORT_IMX,
663 .iotype = SERIAL_IO_MEM,
664 .membase = (void *)IMX_UART2_BASE,
665 .mapbase = IMX_UART2_BASE, /* FIXME */
666 .irq = UART2_MINT_RX,
667 .uartclk = 16000000,
668 .fifosize = 8,
669 .flags = ASYNC_BOOT_AUTOCONF,
670 .ops = &imx_pops,
671 .line = 1,
672 },
673 }
674};
675
676/*
677 * Setup the IMX serial ports.
678 * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
679 * Which serial port this ends up being depends on the machine you're
680 * running this kernel on. I'm not convinced that this is a good idea,
681 * but that's the way it traditionally works.
682 *
683 */
684static void __init imx_init_ports(void)
685{
686 static int first = 1;
687 int i;
688
689 if (!first)
690 return;
691 first = 0;
692
693 for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
694 init_timer(&imx_ports[i].timer);
695 imx_ports[i].timer.function = imx_timeout;
696 imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
697 }
698
699 imx_gpio_mode(PC9_PF_UART1_CTS);
700 imx_gpio_mode(PC10_PF_UART1_RTS);
701 imx_gpio_mode(PC11_PF_UART1_TXD);
702 imx_gpio_mode(PC12_PF_UART1_RXD);
703 imx_gpio_mode(PB28_PF_UART2_CTS);
704 imx_gpio_mode(PB29_PF_UART2_RTS);
705
706 imx_gpio_mode(PB30_PF_UART2_TXD);
707 imx_gpio_mode(PB31_PF_UART2_RXD);
708
709#if 0 /* We don't need these, on the mx1 the _modem_ side of the uart
710 * is implemented.
711 */
712 imx_gpio_mode(PD7_AF_UART2_DTR);
713 imx_gpio_mode(PD8_AF_UART2_DCD);
714 imx_gpio_mode(PD9_AF_UART2_RI);
715 imx_gpio_mode(PD10_AF_UART2_DSR);
716#endif
717
718
719}
720
721#ifdef CONFIG_SERIAL_IMX_CONSOLE
722
723/*
724 * Interrupts are disabled on entering
725 */
726static void
727imx_console_write(struct console *co, const char *s, unsigned int count)
728{
729 struct imx_port *sport = &imx_ports[co->index];
730 unsigned int old_ucr1, old_ucr2, i;
731
732 /*
733 * First, save UCR1/2 and then disable interrupts
734 */
735 old_ucr1 = UCR1((u32)sport->port.membase);
736 old_ucr2 = UCR2((u32)sport->port.membase);
737
738 UCR1((u32)sport->port.membase) =
739 (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
740 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
741 UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
742
743 /*
744 * Now, do each character
745 */
746 for (i = 0; i < count; i++) {
747
748 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
749 barrier();
750
751 URTX0((u32)sport->port.membase) = s[i];
752
753 if (s[i] == '\n') {
754 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
755 barrier();
756 URTX0((u32)sport->port.membase) = '\r';
757 }
758 }
759
760 /*
761 * Finally, wait for transmitter to become empty
762 * and restore UCR1/2
763 */
764 while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
765
766 UCR1((u32)sport->port.membase) = old_ucr1;
767 UCR2((u32)sport->port.membase) = old_ucr2;
768}
769
770/*
771 * If the port was already initialised (eg, by a boot loader),
772 * try to determine the current setup.
773 */
774static void __init
775imx_console_get_options(struct imx_port *sport, int *baud,
776 int *parity, int *bits)
777{
587897f5 778
1da177e4
LT
779 if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
780 /* ok, the port was enabled */
781 unsigned int ucr2, ubir,ubmr, uartclk;
587897f5
SH
782 unsigned int baud_raw;
783 unsigned int ucfr_rfdiv;
1da177e4
LT
784
785 ucr2 = UCR2((u32)sport->port.membase);
786
787 *parity = 'n';
788 if (ucr2 & UCR2_PREN) {
789 if (ucr2 & UCR2_PROE)
790 *parity = 'o';
791 else
792 *parity = 'e';
793 }
794
795 if (ucr2 & UCR2_WS)
796 *bits = 8;
797 else
798 *bits = 7;
799
800 ubir = UBIR((u32)sport->port.membase) & 0xffff;
801 ubmr = UBMR((u32)sport->port.membase) & 0xffff;
1da177e4 802
587897f5
SH
803
804 ucfr_rfdiv = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) >> 7;
805 if (ucfr_rfdiv == 6)
806 ucfr_rfdiv = 7;
807 else
808 ucfr_rfdiv = 6 - ucfr_rfdiv;
809
810 uartclk = imx_get_perclk1();
811 uartclk /= ucfr_rfdiv;
812
813 { /*
814 * The next code provides exact computation of
815 * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
816 * without need of float support or long long division,
817 * which would be required to prevent 32bit arithmetic overflow
818 */
819 unsigned int mul = ubir + 1;
820 unsigned int div = 16 * (ubmr + 1);
821 unsigned int rem = uartclk % div;
822
823 baud_raw = (uartclk / div) * mul;
824 baud_raw += (rem * mul + div / 2) / div;
825 *baud = (baud_raw + 50) / 100 * 100;
826 }
827
828 if(*baud != baud_raw)
829 printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n",
830 baud_raw, *baud);
1da177e4
LT
831 }
832}
833
834static int __init
835imx_console_setup(struct console *co, char *options)
836{
837 struct imx_port *sport;
838 int baud = 9600;
839 int bits = 8;
840 int parity = 'n';
841 int flow = 'n';
842
843 /*
844 * Check whether an invalid uart number has been specified, and
845 * if so, search for the first available port that does have
846 * console support.
847 */
848 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
849 co->index = 0;
850 sport = &imx_ports[co->index];
851
852 if (options)
853 uart_parse_options(options, &baud, &parity, &bits, &flow);
854 else
855 imx_console_get_options(sport, &baud, &parity, &bits);
856
587897f5
SH
857 imx_setup_ufcr(sport, 0);
858
1da177e4
LT
859 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
860}
861
9f4426dd 862static struct uart_driver imx_reg;
1da177e4
LT
863static struct console imx_console = {
864 .name = "ttySMX",
865 .write = imx_console_write,
866 .device = uart_console_device,
867 .setup = imx_console_setup,
868 .flags = CON_PRINTBUFFER,
869 .index = -1,
870 .data = &imx_reg,
871};
872
873static int __init imx_rs_console_init(void)
874{
875 imx_init_ports();
876 register_console(&imx_console);
877 return 0;
878}
879console_initcall(imx_rs_console_init);
880
881#define IMX_CONSOLE &imx_console
882#else
883#define IMX_CONSOLE NULL
884#endif
885
886static struct uart_driver imx_reg = {
887 .owner = THIS_MODULE,
888 .driver_name = DRIVER_NAME,
889 .dev_name = "ttySMX",
890 .devfs_name = "ttsmx/",
891 .major = SERIAL_IMX_MAJOR,
892 .minor = MINOR_START,
893 .nr = ARRAY_SIZE(imx_ports),
894 .cons = IMX_CONSOLE,
895};
896
0370affe 897static int serial_imx_suspend(struct device *_dev, pm_message_t state, u32 level)
1da177e4
LT
898{
899 struct imx_port *sport = dev_get_drvdata(_dev);
900
901 if (sport && level == SUSPEND_DISABLE)
902 uart_suspend_port(&imx_reg, &sport->port);
903
904 return 0;
905}
906
907static int serial_imx_resume(struct device *_dev, u32 level)
908{
909 struct imx_port *sport = dev_get_drvdata(_dev);
910
911 if (sport && level == RESUME_ENABLE)
912 uart_resume_port(&imx_reg, &sport->port);
913
914 return 0;
915}
916
917static int serial_imx_probe(struct device *_dev)
918{
919 struct platform_device *dev = to_platform_device(_dev);
920
921 imx_ports[dev->id].port.dev = _dev;
922 uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
923 dev_set_drvdata(_dev, &imx_ports[dev->id]);
924 return 0;
925}
926
927static int serial_imx_remove(struct device *_dev)
928{
929 struct imx_port *sport = dev_get_drvdata(_dev);
930
931 dev_set_drvdata(_dev, NULL);
932
933 if (sport)
934 uart_remove_one_port(&imx_reg, &sport->port);
935
936 return 0;
937}
938
939static struct device_driver serial_imx_driver = {
940 .name = "imx-uart",
941 .bus = &platform_bus_type,
942 .probe = serial_imx_probe,
943 .remove = serial_imx_remove,
944
945 .suspend = serial_imx_suspend,
946 .resume = serial_imx_resume,
947};
948
949static int __init imx_serial_init(void)
950{
951 int ret;
952
953 printk(KERN_INFO "Serial: IMX driver\n");
954
955 imx_init_ports();
956
957 ret = uart_register_driver(&imx_reg);
958 if (ret)
959 return ret;
960
961 ret = driver_register(&serial_imx_driver);
962 if (ret != 0)
963 uart_unregister_driver(&imx_reg);
964
965 return 0;
966}
967
968static void __exit imx_serial_exit(void)
969{
970 uart_unregister_driver(&imx_reg);
971}
972
973module_init(imx_serial_init);
974module_exit(imx_serial_exit);
975
976MODULE_AUTHOR("Sascha Hauer");
977MODULE_DESCRIPTION("IMX generic serial port driver");
978MODULE_LICENSE("GPL");
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