ipwireless: Explicitly request io and mem regions
[deliverable/linux.git] / drivers / serial / mpc52xx_uart.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
3 *
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
12 *
13 *
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
9b9129e7 15 *
1da177e4
LT
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
9b9129e7 18 *
25ae3a07
JR
19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121
b9272dfd
GL
22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
1da177e4 25 * Copyright (C) 2003 MontaVista, Software, Inc.
9b9129e7 26 *
1da177e4
LT
27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied.
30 */
9b9129e7 31
1da177e4
LT
32/* Platform device Usage :
33 *
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
37 *
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
41 *
406b7d4f 42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
d62de3aa
SM
43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
c30fe7f7 46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
d62de3aa 47 * will be mapped to.
1da177e4
LT
48 */
49
b9272dfd
GL
50/* OF Platform device Usage :
51 *
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
54 * and "mpc52xx-psc-uart" in the compatible string
55 *
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
58 * to the device node.
59 *
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
63 */
64
65#undef DEBUG
66
67#include <linux/device.h>
1da177e4
LT
68#include <linux/module.h>
69#include <linux/tty.h>
70#include <linux/serial.h>
71#include <linux/sysrq.h>
72#include <linux/console.h>
406b7d4f
JR
73#include <linux/delay.h>
74#include <linux/io.h>
1da177e4 75
b9272dfd 76#if defined(CONFIG_PPC_MERGE)
283029d1
GL
77#include <linux/of.h>
78#include <linux/of_platform.h>
b9272dfd
GL
79#else
80#include <linux/platform_device.h>
81#endif
82
1da177e4 83#include <asm/mpc52xx.h>
25ae3a07 84#include <asm/mpc512x.h>
1da177e4
LT
85#include <asm/mpc52xx_psc.h>
86
87#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
88#define SUPPORT_SYSRQ
89#endif
90
91#include <linux/serial_core.h>
92
93
d62de3aa
SM
94/* We've been assigned a range on the "Low-density serial ports" major */
95#define SERIAL_PSC_MAJOR 204
96#define SERIAL_PSC_MINOR 148
97
1da177e4
LT
98
99#define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
100
101
102static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
103 /* Rem: - We use the read_status_mask as a shadow of
104 * psc->mpc52xx_psc_imr
105 * - It's important that is array is all zero on start as we
106 * use it to know if it's initialized or not ! If it's not sure
107 * it's cleared, then a memset(...,0,...) should be added to
108 * the console_init
109 */
b9272dfd
GL
110#if defined(CONFIG_PPC_MERGE)
111/* lookup table for matching device nodes to index numbers */
112static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
113
114static void mpc52xx_uart_of_enumerate(void);
115#endif
1da177e4 116
599f030c 117
1da177e4
LT
118#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
119
120
121/* Forward declaration of the interruption handling routine */
406b7d4f 122static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
1da177e4
LT
123
124
125/* Simple macro to test if a port is console or not. This one is taken
126 * for serial_core.c and maybe should be moved to serial_core.h ? */
127#ifdef CONFIG_SERIAL_CORE_CONSOLE
406b7d4f
JR
128#define uart_console(port) \
129 ((port)->cons && (port)->cons->index == (port)->line)
1da177e4
LT
130#else
131#define uart_console(port) (0)
132#endif
133
599f030c
JR
134/* ======================================================================== */
135/* PSC fifo operations for isolating differences between 52xx and 512x */
136/* ======================================================================== */
137
138struct psc_ops {
139 void (*fifo_init)(struct uart_port *port);
140 int (*raw_rx_rdy)(struct uart_port *port);
141 int (*raw_tx_rdy)(struct uart_port *port);
142 int (*rx_rdy)(struct uart_port *port);
143 int (*tx_rdy)(struct uart_port *port);
144 int (*tx_empty)(struct uart_port *port);
145 void (*stop_rx)(struct uart_port *port);
146 void (*start_tx)(struct uart_port *port);
147 void (*stop_tx)(struct uart_port *port);
148 void (*rx_clr_irq)(struct uart_port *port);
149 void (*tx_clr_irq)(struct uart_port *port);
150 void (*write_char)(struct uart_port *port, unsigned char c);
151 unsigned char (*read_char)(struct uart_port *port);
152 void (*cw_disable_ints)(struct uart_port *port);
153 void (*cw_restore_ints)(struct uart_port *port);
154 unsigned long (*getuartclk)(void *p);
155};
156
25ae3a07 157#ifdef CONFIG_PPC_MPC52xx
599f030c
JR
158#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
159static void mpc52xx_psc_fifo_init(struct uart_port *port)
160{
161 struct mpc52xx_psc __iomem *psc = PSC(port);
162 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
163
164 /* /32 prescaler */
165 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
166
167 out_8(&fifo->rfcntl, 0x00);
168 out_be16(&fifo->rfalarm, 0x1ff);
169 out_8(&fifo->tfcntl, 0x07);
170 out_be16(&fifo->tfalarm, 0x80);
171
172 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
173 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
174}
175
176static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
177{
178 return in_be16(&PSC(port)->mpc52xx_psc_status)
179 & MPC52xx_PSC_SR_RXRDY;
180}
181
182static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
183{
184 return in_be16(&PSC(port)->mpc52xx_psc_status)
185 & MPC52xx_PSC_SR_TXRDY;
186}
187
188
189static int mpc52xx_psc_rx_rdy(struct uart_port *port)
190{
191 return in_be16(&PSC(port)->mpc52xx_psc_isr)
192 & port->read_status_mask
193 & MPC52xx_PSC_IMR_RXRDY;
194}
195
196static int mpc52xx_psc_tx_rdy(struct uart_port *port)
197{
198 return in_be16(&PSC(port)->mpc52xx_psc_isr)
199 & port->read_status_mask
200 & MPC52xx_PSC_IMR_TXRDY;
201}
202
203static int mpc52xx_psc_tx_empty(struct uart_port *port)
204{
205 return in_be16(&PSC(port)->mpc52xx_psc_status)
206 & MPC52xx_PSC_SR_TXEMP;
207}
208
209static void mpc52xx_psc_start_tx(struct uart_port *port)
210{
211 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
212 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
213}
214
215static void mpc52xx_psc_stop_tx(struct uart_port *port)
216{
217 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
218 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
219}
220
221static void mpc52xx_psc_stop_rx(struct uart_port *port)
222{
223 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
224 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
225}
226
227static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
228{
229}
230
231static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
232{
233}
234
235static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
236{
237 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
238}
239
240static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
241{
242 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
243}
244
245static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
246{
247 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
248}
249
250static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
251{
252 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
253}
254
255/* Search for bus-frequency property in this node or a parent */
256static unsigned long mpc52xx_getuartclk(void *p)
257{
258#if defined(CONFIG_PPC_MERGE)
259 /*
260 * 5200 UARTs have a / 32 prescaler
261 * but the generic serial code assumes 16
262 * so return ipb freq / 2
263 */
264 return mpc52xx_find_ipb_freq(p) / 2;
265#else
266 pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
267 return NULL;
268#endif
269}
270
271static struct psc_ops mpc52xx_psc_ops = {
272 .fifo_init = mpc52xx_psc_fifo_init,
273 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
274 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
275 .rx_rdy = mpc52xx_psc_rx_rdy,
276 .tx_rdy = mpc52xx_psc_tx_rdy,
277 .tx_empty = mpc52xx_psc_tx_empty,
278 .stop_rx = mpc52xx_psc_stop_rx,
279 .start_tx = mpc52xx_psc_start_tx,
280 .stop_tx = mpc52xx_psc_stop_tx,
281 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
282 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
283 .write_char = mpc52xx_psc_write_char,
284 .read_char = mpc52xx_psc_read_char,
285 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
286 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
287 .getuartclk = mpc52xx_getuartclk,
288};
289
25ae3a07
JR
290#endif /* CONFIG_MPC52xx */
291
292#ifdef CONFIG_PPC_MPC512x
293#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
294static void mpc512x_psc_fifo_init(struct uart_port *port)
295{
296 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
297 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
298 out_be32(&FIFO_512x(port)->txalarm, 1);
299 out_be32(&FIFO_512x(port)->tximr, 0);
300
301 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
302 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
303 out_be32(&FIFO_512x(port)->rxalarm, 1);
304 out_be32(&FIFO_512x(port)->rximr, 0);
305
306 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
307 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
308}
309
310static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
311{
312 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
313}
314
315static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
316{
317 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
318}
319
320static int mpc512x_psc_rx_rdy(struct uart_port *port)
321{
322 return in_be32(&FIFO_512x(port)->rxsr)
323 & in_be32(&FIFO_512x(port)->rximr)
324 & MPC512x_PSC_FIFO_ALARM;
325}
326
327static int mpc512x_psc_tx_rdy(struct uart_port *port)
328{
329 return in_be32(&FIFO_512x(port)->txsr)
330 & in_be32(&FIFO_512x(port)->tximr)
331 & MPC512x_PSC_FIFO_ALARM;
332}
333
334static int mpc512x_psc_tx_empty(struct uart_port *port)
335{
336 return in_be32(&FIFO_512x(port)->txsr)
337 & MPC512x_PSC_FIFO_EMPTY;
338}
339
340static void mpc512x_psc_stop_rx(struct uart_port *port)
341{
342 unsigned long rx_fifo_imr;
343
344 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
345 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
346 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
347}
348
349static void mpc512x_psc_start_tx(struct uart_port *port)
350{
351 unsigned long tx_fifo_imr;
352
353 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
354 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
355 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
356}
357
358static void mpc512x_psc_stop_tx(struct uart_port *port)
359{
360 unsigned long tx_fifo_imr;
361
362 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
363 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
364 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
365}
366
367static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
368{
369 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
370}
371
372static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
373{
374 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
375}
376
377static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
378{
379 out_8(&FIFO_512x(port)->txdata_8, c);
380}
381
382static unsigned char mpc512x_psc_read_char(struct uart_port *port)
383{
384 return in_8(&FIFO_512x(port)->rxdata_8);
385}
386
387static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
388{
389 port->read_status_mask =
390 in_be32(&FIFO_512x(port)->tximr) << 16 |
391 in_be32(&FIFO_512x(port)->rximr);
392 out_be32(&FIFO_512x(port)->tximr, 0);
393 out_be32(&FIFO_512x(port)->rximr, 0);
394}
395
396static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
397{
398 out_be32(&FIFO_512x(port)->tximr,
399 (port->read_status_mask >> 16) & 0x7f);
400 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
401}
402
403static unsigned long mpc512x_getuartclk(void *p)
404{
405 return mpc512x_find_ips_freq(p);
406}
407
408static struct psc_ops mpc512x_psc_ops = {
409 .fifo_init = mpc512x_psc_fifo_init,
410 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
411 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
412 .rx_rdy = mpc512x_psc_rx_rdy,
413 .tx_rdy = mpc512x_psc_tx_rdy,
414 .tx_empty = mpc512x_psc_tx_empty,
415 .stop_rx = mpc512x_psc_stop_rx,
416 .start_tx = mpc512x_psc_start_tx,
417 .stop_tx = mpc512x_psc_stop_tx,
418 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
419 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
420 .write_char = mpc512x_psc_write_char,
421 .read_char = mpc512x_psc_read_char,
422 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
423 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
424 .getuartclk = mpc512x_getuartclk,
425};
426#endif
427
428static struct psc_ops *psc_ops;
1da177e4
LT
429
430/* ======================================================================== */
431/* UART operations */
432/* ======================================================================== */
433
9b9129e7 434static unsigned int
1da177e4
LT
435mpc52xx_uart_tx_empty(struct uart_port *port)
436{
599f030c 437 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
1da177e4
LT
438}
439
9b9129e7 440static void
1da177e4
LT
441mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
442{
443 /* Not implemented */
444}
445
9b9129e7 446static unsigned int
1da177e4
LT
447mpc52xx_uart_get_mctrl(struct uart_port *port)
448{
449 /* Not implemented */
450 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
451}
452
9b9129e7 453static void
b129a8cc 454mpc52xx_uart_stop_tx(struct uart_port *port)
1da177e4
LT
455{
456 /* port->lock taken by caller */
599f030c 457 psc_ops->stop_tx(port);
1da177e4
LT
458}
459
9b9129e7 460static void
b129a8cc 461mpc52xx_uart_start_tx(struct uart_port *port)
1da177e4
LT
462{
463 /* port->lock taken by caller */
599f030c 464 psc_ops->start_tx(port);
1da177e4
LT
465}
466
9b9129e7 467static void
1da177e4
LT
468mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
469{
470 unsigned long flags;
471 spin_lock_irqsave(&port->lock, flags);
9b9129e7 472
1da177e4
LT
473 port->x_char = ch;
474 if (ch) {
475 /* Make sure tx interrupts are on */
476 /* Truly necessary ??? They should be anyway */
599f030c 477 psc_ops->start_tx(port);
1da177e4 478 }
9b9129e7 479
1da177e4
LT
480 spin_unlock_irqrestore(&port->lock, flags);
481}
482
483static void
484mpc52xx_uart_stop_rx(struct uart_port *port)
485{
486 /* port->lock taken by caller */
599f030c 487 psc_ops->stop_rx(port);
1da177e4
LT
488}
489
490static void
491mpc52xx_uart_enable_ms(struct uart_port *port)
492{
493 /* Not implemented */
494}
495
496static void
497mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
498{
499 unsigned long flags;
500 spin_lock_irqsave(&port->lock, flags);
501
406b7d4f
JR
502 if (ctl == -1)
503 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
1da177e4 504 else
406b7d4f 505 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
9b9129e7 506
1da177e4
LT
507 spin_unlock_irqrestore(&port->lock, flags);
508}
509
510static int
511mpc52xx_uart_startup(struct uart_port *port)
512{
513 struct mpc52xx_psc __iomem *psc = PSC(port);
514 int ret;
515
516 /* Request IRQ */
517 ret = request_irq(port->irq, mpc52xx_uart_int,
25ae3a07
JR
518 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
519 "mpc52xx_psc_uart", port);
1da177e4
LT
520 if (ret)
521 return ret;
522
523 /* Reset/activate the port, clear and enable interrupts */
406b7d4f
JR
524 out_8(&psc->command, MPC52xx_PSC_RST_RX);
525 out_8(&psc->command, MPC52xx_PSC_RST_TX);
9b9129e7 526
406b7d4f 527 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
1da177e4 528
599f030c 529 psc_ops->fifo_init(port);
9b9129e7 530
406b7d4f
JR
531 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
532 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
9b9129e7 533
1da177e4
LT
534 return 0;
535}
536
537static void
538mpc52xx_uart_shutdown(struct uart_port *port)
539{
540 struct mpc52xx_psc __iomem *psc = PSC(port);
9b9129e7 541
a3481197 542 /* Shut down the port. Leave TX active if on a console port */
406b7d4f 543 out_8(&psc->command, MPC52xx_PSC_RST_RX);
a3481197 544 if (!uart_console(port))
406b7d4f 545 out_8(&psc->command, MPC52xx_PSC_RST_TX);
9b9129e7
GL
546
547 port->read_status_mask = 0;
406b7d4f 548 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
1da177e4
LT
549
550 /* Release interrupt */
551 free_irq(port->irq, port);
552}
553
9b9129e7 554static void
606d099c 555mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
406b7d4f 556 struct ktermios *old)
1da177e4
LT
557{
558 struct mpc52xx_psc __iomem *psc = PSC(port);
559 unsigned long flags;
560 unsigned char mr1, mr2;
561 unsigned short ctr;
562 unsigned int j, baud, quot;
9b9129e7 563
1da177e4
LT
564 /* Prepare what we're gonna write */
565 mr1 = 0;
9b9129e7 566
1da177e4 567 switch (new->c_cflag & CSIZE) {
406b7d4f
JR
568 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
569 break;
570 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
571 break;
572 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
573 break;
574 case CS8:
575 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
1da177e4
LT
576 }
577
578 if (new->c_cflag & PARENB) {
579 mr1 |= (new->c_cflag & PARODD) ?
580 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
581 } else
582 mr1 |= MPC52xx_PSC_MODE_PARNONE;
9b9129e7
GL
583
584
1da177e4
LT
585 mr2 = 0;
586
587 if (new->c_cflag & CSTOPB)
588 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
589 else
590 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
591 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
592 MPC52xx_PSC_MODE_ONE_STOP;
593
594
595 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
596 quot = uart_get_divisor(port, baud);
597 ctr = quot & 0xffff;
9b9129e7 598
1da177e4
LT
599 /* Get the lock */
600 spin_lock_irqsave(&port->lock, flags);
601
602 /* Update the per-port timeout */
603 uart_update_timeout(port, new->c_cflag, baud);
604
605 /* Do our best to flush TX & RX, so we don't loose anything */
606 /* But we don't wait indefinitly ! */
607 j = 5000000; /* Maximum wait */
608 /* FIXME Can't receive chars since set_termios might be called at early
609 * boot for the console, all stuff is not yet ready to receive at that
610 * time and that just makes the kernel oops */
611 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
599f030c 612 while (!mpc52xx_uart_tx_empty(port) && --j)
1da177e4
LT
613 udelay(1);
614
615 if (!j)
406b7d4f 616 printk(KERN_ERR "mpc52xx_uart.c: "
1da177e4 617 "Unable to flush RX & TX fifos in-time in set_termios."
406b7d4f 618 "Some chars may have been lost.\n");
1da177e4
LT
619
620 /* Reset the TX & RX */
406b7d4f
JR
621 out_8(&psc->command, MPC52xx_PSC_RST_RX);
622 out_8(&psc->command, MPC52xx_PSC_RST_TX);
1da177e4
LT
623
624 /* Send new mode settings */
406b7d4f
JR
625 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
626 out_8(&psc->mode, mr1);
627 out_8(&psc->mode, mr2);
628 out_8(&psc->ctur, ctr >> 8);
629 out_8(&psc->ctlr, ctr & 0xff);
9b9129e7 630
1da177e4 631 /* Reenable TX & RX */
406b7d4f
JR
632 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
633 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
1da177e4
LT
634
635 /* We're all set, release the lock */
636 spin_unlock_irqrestore(&port->lock, flags);
637}
638
639static const char *
640mpc52xx_uart_type(struct uart_port *port)
641{
642 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
643}
644
645static void
646mpc52xx_uart_release_port(struct uart_port *port)
647{
406b7d4f
JR
648 /* remapped by us ? */
649 if (port->flags & UPF_IOREMAP) {
1da177e4
LT
650 iounmap(port->membase);
651 port->membase = NULL;
652 }
653
b9272dfd 654 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
1da177e4
LT
655}
656
657static int
658mpc52xx_uart_request_port(struct uart_port *port)
659{
be618f55
AL
660 int err;
661
1da177e4 662 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
b9272dfd 663 port->membase = ioremap(port->mapbase,
406b7d4f 664 sizeof(struct mpc52xx_psc));
1da177e4
LT
665
666 if (!port->membase)
667 return -EINVAL;
668
b9272dfd 669 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
1da177e4 670 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
be618f55
AL
671
672 if (err && (port->flags & UPF_IOREMAP)) {
673 iounmap(port->membase);
674 port->membase = NULL;
675 }
676
677 return err;
1da177e4
LT
678}
679
680static void
681mpc52xx_uart_config_port(struct uart_port *port, int flags)
682{
406b7d4f
JR
683 if ((flags & UART_CONFIG_TYPE)
684 && (mpc52xx_uart_request_port(port) == 0))
685 port->type = PORT_MPC52xx;
1da177e4
LT
686}
687
688static int
689mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
690{
406b7d4f 691 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
1da177e4
LT
692 return -EINVAL;
693
406b7d4f
JR
694 if ((ser->irq != port->irq) ||
695 (ser->io_type != SERIAL_IO_MEM) ||
696 (ser->baud_base != port->uartclk) ||
697 (ser->iomem_base != (void *)port->mapbase) ||
698 (ser->hub6 != 0))
1da177e4
LT
699 return -EINVAL;
700
701 return 0;
702}
703
704
705static struct uart_ops mpc52xx_uart_ops = {
706 .tx_empty = mpc52xx_uart_tx_empty,
707 .set_mctrl = mpc52xx_uart_set_mctrl,
708 .get_mctrl = mpc52xx_uart_get_mctrl,
709 .stop_tx = mpc52xx_uart_stop_tx,
710 .start_tx = mpc52xx_uart_start_tx,
711 .send_xchar = mpc52xx_uart_send_xchar,
712 .stop_rx = mpc52xx_uart_stop_rx,
713 .enable_ms = mpc52xx_uart_enable_ms,
714 .break_ctl = mpc52xx_uart_break_ctl,
715 .startup = mpc52xx_uart_startup,
716 .shutdown = mpc52xx_uart_shutdown,
717 .set_termios = mpc52xx_uart_set_termios,
718/* .pm = mpc52xx_uart_pm, Not supported yet */
719/* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
720 .type = mpc52xx_uart_type,
721 .release_port = mpc52xx_uart_release_port,
722 .request_port = mpc52xx_uart_request_port,
723 .config_port = mpc52xx_uart_config_port,
724 .verify_port = mpc52xx_uart_verify_port
725};
726
9b9129e7 727
1da177e4
LT
728/* ======================================================================== */
729/* Interrupt handling */
730/* ======================================================================== */
9b9129e7 731
1da177e4 732static inline int
7d12e780 733mpc52xx_uart_int_rx_chars(struct uart_port *port)
1da177e4 734{
a88487c7 735 struct tty_struct *tty = port->info->port.tty;
33f0f88f 736 unsigned char ch, flag;
1da177e4
LT
737 unsigned short status;
738
739 /* While we can read, do so ! */
599f030c 740 while (psc_ops->raw_rx_rdy(port)) {
1da177e4 741 /* Get the char */
599f030c 742 ch = psc_ops->read_char(port);
1da177e4
LT
743
744 /* Handle sysreq char */
745#ifdef SUPPORT_SYSRQ
7d12e780 746 if (uart_handle_sysrq_char(port, ch)) {
1da177e4
LT
747 port->sysrq = 0;
748 continue;
749 }
750#endif
751
752 /* Store it */
33f0f88f
AC
753
754 flag = TTY_NORMAL;
1da177e4 755 port->icount.rx++;
9b9129e7 756
599f030c
JR
757 status = in_be16(&PSC(port)->mpc52xx_psc_status);
758
406b7d4f
JR
759 if (status & (MPC52xx_PSC_SR_PE |
760 MPC52xx_PSC_SR_FE |
761 MPC52xx_PSC_SR_RB)) {
9b9129e7 762
1da177e4 763 if (status & MPC52xx_PSC_SR_RB) {
33f0f88f 764 flag = TTY_BREAK;
1da177e4
LT
765 uart_handle_break(port);
766 } else if (status & MPC52xx_PSC_SR_PE)
33f0f88f 767 flag = TTY_PARITY;
1da177e4 768 else if (status & MPC52xx_PSC_SR_FE)
33f0f88f 769 flag = TTY_FRAME;
1da177e4
LT
770
771 /* Clear error condition */
406b7d4f 772 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
1da177e4
LT
773
774 }
33f0f88f
AC
775 tty_insert_flip_char(tty, ch, flag);
776 if (status & MPC52xx_PSC_SR_OE) {
777 /*
778 * Overrun is special, since it's
779 * reported immediately, and doesn't
780 * affect the current character
781 */
782 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
783 }
1da177e4
LT
784 }
785
fbe543b4 786 spin_unlock(&port->lock);
1da177e4 787 tty_flip_buffer_push(tty);
fbe543b4 788 spin_lock(&port->lock);
9b9129e7 789
599f030c 790 return psc_ops->raw_rx_rdy(port);
1da177e4
LT
791}
792
793static inline int
794mpc52xx_uart_int_tx_chars(struct uart_port *port)
795{
796 struct circ_buf *xmit = &port->info->xmit;
797
798 /* Process out of band chars */
799 if (port->x_char) {
599f030c 800 psc_ops->write_char(port, port->x_char);
1da177e4
LT
801 port->icount.tx++;
802 port->x_char = 0;
803 return 1;
804 }
805
806 /* Nothing to do ? */
807 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
b129a8cc 808 mpc52xx_uart_stop_tx(port);
1da177e4
LT
809 return 0;
810 }
811
812 /* Send chars */
599f030c
JR
813 while (psc_ops->raw_tx_rdy(port)) {
814 psc_ops->write_char(port, xmit->buf[xmit->tail]);
1da177e4
LT
815 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
816 port->icount.tx++;
817 if (uart_circ_empty(xmit))
818 break;
819 }
820
821 /* Wake up */
822 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
823 uart_write_wakeup(port);
824
825 /* Maybe we're done after all */
826 if (uart_circ_empty(xmit)) {
b129a8cc 827 mpc52xx_uart_stop_tx(port);
1da177e4
LT
828 return 0;
829 }
830
831 return 1;
832}
833
9b9129e7 834static irqreturn_t
7d12e780 835mpc52xx_uart_int(int irq, void *dev_id)
1da177e4 836{
c7bec5ab 837 struct uart_port *port = dev_id;
1da177e4
LT
838 unsigned long pass = ISR_PASS_LIMIT;
839 unsigned int keepgoing;
9b9129e7 840
1da177e4 841 spin_lock(&port->lock);
9b9129e7 842
1da177e4
LT
843 /* While we have stuff to do, we continue */
844 do {
845 /* If we don't find anything to do, we stop */
9b9129e7
GL
846 keepgoing = 0;
847
599f030c
JR
848 psc_ops->rx_clr_irq(port);
849 if (psc_ops->rx_rdy(port))
7d12e780 850 keepgoing |= mpc52xx_uart_int_rx_chars(port);
1da177e4 851
599f030c
JR
852 psc_ops->tx_clr_irq(port);
853 if (psc_ops->tx_rdy(port))
1da177e4 854 keepgoing |= mpc52xx_uart_int_tx_chars(port);
9b9129e7 855
1da177e4 856 /* Limit number of iteration */
406b7d4f 857 if (!(--pass))
1da177e4
LT
858 keepgoing = 0;
859
860 } while (keepgoing);
9b9129e7 861
1da177e4 862 spin_unlock(&port->lock);
9b9129e7 863
1da177e4
LT
864 return IRQ_HANDLED;
865}
866
867
868/* ======================================================================== */
869/* Console ( if applicable ) */
870/* ======================================================================== */
871
872#ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
873
874static void __init
875mpc52xx_console_get_options(struct uart_port *port,
406b7d4f 876 int *baud, int *parity, int *bits, int *flow)
1da177e4
LT
877{
878 struct mpc52xx_psc __iomem *psc = PSC(port);
879 unsigned char mr1;
880
b9272dfd
GL
881 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
882
1da177e4 883 /* Read the mode registers */
406b7d4f 884 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
1da177e4 885 mr1 = in_8(&psc->mode);
9b9129e7 886
1da177e4 887 /* CT{U,L}R are write-only ! */
b9272dfd
GL
888 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
889#if !defined(CONFIG_PPC_MERGE)
890 if (__res.bi_baudrate)
891 *baud = __res.bi_baudrate;
892#endif
1da177e4
LT
893
894 /* Parse them */
895 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
406b7d4f
JR
896 case MPC52xx_PSC_MODE_5_BITS:
897 *bits = 5;
898 break;
899 case MPC52xx_PSC_MODE_6_BITS:
900 *bits = 6;
901 break;
902 case MPC52xx_PSC_MODE_7_BITS:
903 *bits = 7;
904 break;
905 case MPC52xx_PSC_MODE_8_BITS:
906 default:
907 *bits = 8;
1da177e4 908 }
9b9129e7 909
1da177e4
LT
910 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
911 *parity = 'n';
912 else
913 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
914}
915
9b9129e7 916static void
1da177e4
LT
917mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
918{
919 struct uart_port *port = &mpc52xx_uart_ports[co->index];
1da177e4 920 unsigned int i, j;
9b9129e7 921
1da177e4 922 /* Disable interrupts */
599f030c 923 psc_ops->cw_disable_ints(port);
1da177e4
LT
924
925 /* Wait the TX buffer to be empty */
9b9129e7 926 j = 5000000; /* Maximum wait */
599f030c 927 while (!mpc52xx_uart_tx_empty(port) && --j)
1da177e4
LT
928 udelay(1);
929
930 /* Write all the chars */
d358788f 931 for (i = 0; i < count; i++, s++) {
1da177e4 932 /* Line return handling */
d358788f 933 if (*s == '\n')
599f030c 934 psc_ops->write_char(port, '\r');
9b9129e7 935
d358788f 936 /* Send the char */
599f030c 937 psc_ops->write_char(port, *s);
d358788f 938
1da177e4 939 /* Wait the TX buffer to be empty */
9b9129e7 940 j = 20000; /* Maximum wait */
599f030c 941 while (!mpc52xx_uart_tx_empty(port) && --j)
1da177e4
LT
942 udelay(1);
943 }
944
945 /* Restore interrupt state */
599f030c 946 psc_ops->cw_restore_ints(port);
1da177e4
LT
947}
948
b9272dfd 949#if !defined(CONFIG_PPC_MERGE)
1da177e4
LT
950static int __init
951mpc52xx_console_setup(struct console *co, char *options)
952{
953 struct uart_port *port = &mpc52xx_uart_ports[co->index];
954
955 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
956 int bits = 8;
957 int parity = 'n';
958 int flow = 'n';
959
960 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
961 return -EINVAL;
9b9129e7 962
1da177e4
LT
963 /* Basic port init. Needed since we use some uart_??? func before
964 * real init for early access */
965 spin_lock_init(&port->lock);
966 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
967 port->ops = &mpc52xx_uart_ops;
968 port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
969
970 /* We ioremap ourself */
971 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
972 if (port->membase == NULL)
973 return -EINVAL;
974
975 /* Setup the port parameters accoding to options */
976 if (options)
977 uart_parse_options(options, &baud, &parity, &bits, &flow);
978 else
979 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
980
981 return uart_set_options(port, co, baud, parity, bits, flow);
982}
983
b9272dfd
GL
984#else
985
986static int __init
987mpc52xx_console_setup(struct console *co, char *options)
988{
989 struct uart_port *port = &mpc52xx_uart_ports[co->index];
990 struct device_node *np = mpc52xx_uart_nodes[co->index];
599f030c 991 unsigned int uartclk;
b9272dfd
GL
992 struct resource res;
993 int ret;
994
995 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
996 int bits = 8;
997 int parity = 'n';
998 int flow = 'n';
999
1000 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
1001 co, co->index, options);
1002
1003 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
1004 pr_debug("PSC%x out of range\n", co->index);
1005 return -EINVAL;
1006 }
1007
1008 if (!np) {
1009 pr_debug("PSC%x not found in device tree\n", co->index);
1010 return -EINVAL;
1011 }
1012
1013 pr_debug("Console on ttyPSC%x is %s\n",
406b7d4f 1014 co->index, mpc52xx_uart_nodes[co->index]->full_name);
b9272dfd
GL
1015
1016 /* Fetch register locations */
406b7d4f
JR
1017 ret = of_address_to_resource(np, 0, &res);
1018 if (ret) {
b9272dfd
GL
1019 pr_debug("Could not get resources for PSC%x\n", co->index);
1020 return ret;
1021 }
1022
599f030c
JR
1023 uartclk = psc_ops->getuartclk(np);
1024 if (uartclk == 0) {
1025 pr_debug("Could not find uart clock frequency!\n");
b9272dfd
GL
1026 return -EINVAL;
1027 }
1028
1029 /* Basic port init. Needed since we use some uart_??? func before
1030 * real init for early access */
1031 spin_lock_init(&port->lock);
599f030c 1032 port->uartclk = uartclk;
b9272dfd
GL
1033 port->ops = &mpc52xx_uart_ops;
1034 port->mapbase = res.start;
1035 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
1036 port->irq = irq_of_parse_and_map(np, 0);
1037
1038 if (port->membase == NULL)
1039 return -EINVAL;
1040
5dd80d5d 1041 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
406b7d4f
JR
1042 (void *)port->mapbase, port->membase,
1043 port->irq, port->uartclk);
b9272dfd
GL
1044
1045 /* Setup the port parameters accoding to options */
1046 if (options)
1047 uart_parse_options(options, &baud, &parity, &bits, &flow);
1048 else
1049 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1050
1051 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
406b7d4f 1052 baud, bits, parity, flow);
b9272dfd
GL
1053
1054 return uart_set_options(port, co, baud, parity, bits, flow);
1055}
1056#endif /* defined(CONFIG_PPC_MERGE) */
1057
1da177e4 1058
2d8179c0 1059static struct uart_driver mpc52xx_uart_driver;
1da177e4
LT
1060
1061static struct console mpc52xx_console = {
d62de3aa 1062 .name = "ttyPSC",
1da177e4
LT
1063 .write = mpc52xx_console_write,
1064 .device = uart_console_device,
1065 .setup = mpc52xx_console_setup,
1066 .flags = CON_PRINTBUFFER,
406b7d4f 1067 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1da177e4
LT
1068 .data = &mpc52xx_uart_driver,
1069};
1070
9b9129e7
GL
1071
1072static int __init
1da177e4
LT
1073mpc52xx_console_init(void)
1074{
c98750c2 1075#if defined(CONFIG_PPC_MERGE)
b9272dfd 1076 mpc52xx_uart_of_enumerate();
c98750c2 1077#endif
1da177e4
LT
1078 register_console(&mpc52xx_console);
1079 return 0;
1080}
1081
1082console_initcall(mpc52xx_console_init);
1083
1084#define MPC52xx_PSC_CONSOLE &mpc52xx_console
1085#else
1086#define MPC52xx_PSC_CONSOLE NULL
1087#endif
1088
1089
1090/* ======================================================================== */
1091/* UART Driver */
1092/* ======================================================================== */
1093
1094static struct uart_driver mpc52xx_uart_driver = {
1da177e4 1095 .driver_name = "mpc52xx_psc_uart",
d62de3aa 1096 .dev_name = "ttyPSC",
d62de3aa
SM
1097 .major = SERIAL_PSC_MAJOR,
1098 .minor = SERIAL_PSC_MINOR,
1da177e4
LT
1099 .nr = MPC52xx_PSC_MAXNUM,
1100 .cons = MPC52xx_PSC_CONSOLE,
1101};
1102
1103
b9272dfd 1104#if !defined(CONFIG_PPC_MERGE)
1da177e4
LT
1105/* ======================================================================== */
1106/* Platform Driver */
1107/* ======================================================================== */
1108
1109static int __devinit
3ae5eaec 1110mpc52xx_uart_probe(struct platform_device *dev)
1da177e4 1111{
3ae5eaec 1112 struct resource *res = dev->resource;
1da177e4
LT
1113
1114 struct uart_port *port = NULL;
1115 int i, idx, ret;
1116
1117 /* Check validity & presence */
38801e2e 1118 idx = dev->id;
1da177e4
LT
1119 if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
1120 return -EINVAL;
1121
406b7d4f 1122 if (!mpc52xx_match_psc_function(idx, "uart"))
1da177e4
LT
1123 return -ENODEV;
1124
1125 /* Init the port structure */
1126 port = &mpc52xx_uart_ports[idx];
1127
1da177e4
LT
1128 spin_lock_init(&port->lock);
1129 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
947deee8 1130 port->fifosize = 512;
1da177e4
LT
1131 port->iotype = UPIO_MEM;
1132 port->flags = UPF_BOOT_AUTOCONF |
406b7d4f 1133 (uart_console(port) ? 0 : UPF_IOREMAP);
1da177e4
LT
1134 port->line = idx;
1135 port->ops = &mpc52xx_uart_ops;
b9272dfd 1136 port->dev = &dev->dev;
1da177e4
LT
1137
1138 /* Search for IRQ and mapbase */
406b7d4f 1139 for (i = 0 ; i < dev->num_resources ; i++, res++) {
1da177e4
LT
1140 if (res->flags & IORESOURCE_MEM)
1141 port->mapbase = res->start;
1142 else if (res->flags & IORESOURCE_IRQ)
1143 port->irq = res->start;
1144 }
1145 if (!port->irq || !port->mapbase)
1146 return -EINVAL;
1147
1148 /* Add the port to the uart sub-system */
1149 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1150 if (!ret)
406b7d4f 1151 platform_set_drvdata(dev, (void *)port);
1da177e4
LT
1152
1153 return ret;
1154}
1155
1156static int
3ae5eaec 1157mpc52xx_uart_remove(struct platform_device *dev)
1da177e4 1158{
3ae5eaec 1159 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 1160
3ae5eaec 1161 platform_set_drvdata(dev, NULL);
1da177e4
LT
1162
1163 if (port)
1164 uart_remove_one_port(&mpc52xx_uart_driver, port);
1165
1166 return 0;
1167}
1168
1169#ifdef CONFIG_PM
1170static int
3ae5eaec 1171mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 1172{
3ae5eaec 1173 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 1174
9b9129e7 1175 if (port)
1da177e4
LT
1176 uart_suspend_port(&mpc52xx_uart_driver, port);
1177
1178 return 0;
1179}
1180
1181static int
3ae5eaec 1182mpc52xx_uart_resume(struct platform_device *dev)
1da177e4 1183{
3ae5eaec 1184 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 1185
9480e307 1186 if (port)
1da177e4
LT
1187 uart_resume_port(&mpc52xx_uart_driver, port);
1188
1189 return 0;
1190}
1191#endif
1192
e169c139
KS
1193/* work with hotplug and coldplug */
1194MODULE_ALIAS("platform:mpc52xx-psc");
b9272dfd 1195
3ae5eaec 1196static struct platform_driver mpc52xx_uart_platform_driver = {
1da177e4
LT
1197 .probe = mpc52xx_uart_probe,
1198 .remove = mpc52xx_uart_remove,
1199#ifdef CONFIG_PM
1200 .suspend = mpc52xx_uart_suspend,
1201 .resume = mpc52xx_uart_resume,
1202#endif
3ae5eaec 1203 .driver = {
406b7d4f 1204 .owner = THIS_MODULE,
3ae5eaec
RK
1205 .name = "mpc52xx-psc",
1206 },
1da177e4 1207};
b9272dfd
GL
1208#endif /* !defined(CONFIG_PPC_MERGE) */
1209
1210
1211#if defined(CONFIG_PPC_MERGE)
1212/* ======================================================================== */
1213/* OF Platform Driver */
1214/* ======================================================================== */
1215
52b80482
GL
1216static struct of_device_id mpc52xx_uart_of_match[] = {
1217#ifdef CONFIG_PPC_MPC52xx
1218 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1219 /* binding used by old lite5200 device trees: */
1220 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1221 /* binding used by efika: */
1222 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
1223#endif
1224#ifdef CONFIG_PPC_MPC512x
1225 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
52b80482 1226#endif
bc775eac 1227 {},
52b80482
GL
1228};
1229
b9272dfd
GL
1230static int __devinit
1231mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1232{
1233 int idx = -1;
599f030c 1234 unsigned int uartclk;
b9272dfd
GL
1235 struct uart_port *port = NULL;
1236 struct resource res;
1237 int ret;
1238
1239 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1240
1241 /* Check validity & presence */
1242 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1243 if (mpc52xx_uart_nodes[idx] == op->node)
1244 break;
1245 if (idx >= MPC52xx_PSC_MAXNUM)
1246 return -EINVAL;
1247 pr_debug("Found %s assigned to ttyPSC%x\n",
406b7d4f 1248 mpc52xx_uart_nodes[idx]->full_name, idx);
b9272dfd 1249
599f030c
JR
1250 uartclk = psc_ops->getuartclk(op->node);
1251 if (uartclk == 0) {
1252 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
b9272dfd
GL
1253 return -EINVAL;
1254 }
1255
1256 /* Init the port structure */
1257 port = &mpc52xx_uart_ports[idx];
1258
1259 spin_lock_init(&port->lock);
599f030c 1260 port->uartclk = uartclk;
b9272dfd
GL
1261 port->fifosize = 512;
1262 port->iotype = UPIO_MEM;
1263 port->flags = UPF_BOOT_AUTOCONF |
406b7d4f 1264 (uart_console(port) ? 0 : UPF_IOREMAP);
b9272dfd
GL
1265 port->line = idx;
1266 port->ops = &mpc52xx_uart_ops;
1267 port->dev = &op->dev;
1268
1269 /* Search for IRQ and mapbase */
406b7d4f
JR
1270 ret = of_address_to_resource(op->node, 0, &res);
1271 if (ret)
b9272dfd
GL
1272 return ret;
1273
1274 port->mapbase = res.start;
1275 port->irq = irq_of_parse_and_map(op->node, 0);
1276
5dd80d5d 1277 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
406b7d4f 1278 (void *)port->mapbase, port->irq, port->uartclk);
b9272dfd 1279
406b7d4f 1280 if ((port->irq == NO_IRQ) || !port->mapbase) {
b9272dfd
GL
1281 printk(KERN_ERR "Could not allocate resources for PSC\n");
1282 return -EINVAL;
1283 }
1284
1285 /* Add the port to the uart sub-system */
1286 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1287 if (!ret)
406b7d4f 1288 dev_set_drvdata(&op->dev, (void *)port);
b9272dfd
GL
1289
1290 return ret;
1291}
1292
1293static int
1294mpc52xx_uart_of_remove(struct of_device *op)
1295{
1296 struct uart_port *port = dev_get_drvdata(&op->dev);
1297 dev_set_drvdata(&op->dev, NULL);
1298
fc7900bb 1299 if (port) {
b9272dfd 1300 uart_remove_one_port(&mpc52xx_uart_driver, port);
fc7900bb
SM
1301 irq_dispose_mapping(port->irq);
1302 }
b9272dfd
GL
1303
1304 return 0;
1305}
1306
1307#ifdef CONFIG_PM
1308static int
1309mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1310{
1311 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1312
1313 if (port)
1314 uart_suspend_port(&mpc52xx_uart_driver, port);
1315
1316 return 0;
1317}
1318
1319static int
1320mpc52xx_uart_of_resume(struct of_device *op)
1321{
1322 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1323
1324 if (port)
1325 uart_resume_port(&mpc52xx_uart_driver, port);
1326
1327 return 0;
1328}
1329#endif
1330
1331static void
1332mpc52xx_uart_of_assign(struct device_node *np, int idx)
1333{
1334 int free_idx = -1;
1335 int i;
1336
1337 /* Find the first free node */
1338 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1339 if (mpc52xx_uart_nodes[i] == NULL) {
1340 free_idx = i;
1341 break;
1342 }
1343 }
1344
1345 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1346 idx = free_idx;
1347
1348 if (idx < 0)
1349 return; /* No free slot; abort */
1350
406b7d4f 1351 of_node_get(np);
b9272dfd
GL
1352 /* If the slot is already occupied, then swap slots */
1353 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1354 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
af6a9aab 1355 mpc52xx_uart_nodes[idx] = np;
b9272dfd
GL
1356}
1357
1358static void
1359mpc52xx_uart_of_enumerate(void)
1360{
406b7d4f 1361 static int enum_done;
b9272dfd
GL
1362 struct device_node *np;
1363 const unsigned int *devno;
25ae3a07 1364 const struct of_device_id *match;
b9272dfd
GL
1365 int i;
1366
1367 if (enum_done)
1368 return;
1369
1370 for_each_node_by_type(np, "serial") {
25ae3a07
JR
1371 match = of_match_node(mpc52xx_uart_of_match, np);
1372 if (!match)
b9272dfd
GL
1373 continue;
1374
25ae3a07
JR
1375 psc_ops = match->data;
1376
b9272dfd 1377 /* Is a particular device number requested? */
40cd3a45 1378 devno = of_get_property(np, "port-number", NULL);
406b7d4f 1379 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
b9272dfd
GL
1380 }
1381
1382 enum_done = 1;
1383
1384 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1385 if (mpc52xx_uart_nodes[i])
1386 pr_debug("%s assigned to ttyPSC%x\n",
406b7d4f 1387 mpc52xx_uart_nodes[i]->full_name, i);
b9272dfd
GL
1388 }
1389}
1390
1391MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1392
1393static struct of_platform_driver mpc52xx_uart_of_driver = {
b9272dfd
GL
1394 .match_table = mpc52xx_uart_of_match,
1395 .probe = mpc52xx_uart_of_probe,
1396 .remove = mpc52xx_uart_of_remove,
1397#ifdef CONFIG_PM
1398 .suspend = mpc52xx_uart_of_suspend,
1399 .resume = mpc52xx_uart_of_resume,
1400#endif
1401 .driver = {
1402 .name = "mpc52xx-psc-uart",
1403 },
1404};
1405#endif /* defined(CONFIG_PPC_MERGE) */
1da177e4
LT
1406
1407
1408/* ======================================================================== */
1409/* Module */
1410/* ======================================================================== */
1411
1412static int __init
1413mpc52xx_uart_init(void)
1414{
1415 int ret;
1416
b9272dfd 1417 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1da177e4 1418
406b7d4f
JR
1419 ret = uart_register_driver(&mpc52xx_uart_driver);
1420 if (ret) {
b9272dfd
GL
1421 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1422 __FILE__, ret);
1423 return ret;
1da177e4
LT
1424 }
1425
b9272dfd
GL
1426#if defined(CONFIG_PPC_MERGE)
1427 mpc52xx_uart_of_enumerate();
1428
1429 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1430 if (ret) {
1431 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1432 __FILE__, ret);
1433 uart_unregister_driver(&mpc52xx_uart_driver);
1434 return ret;
1435 }
1436#else
25ae3a07 1437 psc_ops = &mpc52xx_psc_ops;
b9272dfd
GL
1438 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
1439 if (ret) {
1440 printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
1441 __FILE__, ret);
1442 uart_unregister_driver(&mpc52xx_uart_driver);
1443 return ret;
1444 }
1445#endif
1446
1447 return 0;
1da177e4
LT
1448}
1449
1450static void __exit
1451mpc52xx_uart_exit(void)
1452{
b9272dfd
GL
1453#if defined(CONFIG_PPC_MERGE)
1454 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1455#else
3ae5eaec 1456 platform_driver_unregister(&mpc52xx_uart_platform_driver);
b9272dfd 1457#endif
1da177e4
LT
1458 uart_unregister_driver(&mpc52xx_uart_driver);
1459}
1460
1461
1462module_init(mpc52xx_uart_init);
1463module_exit(mpc52xx_uart_exit);
1464
1465MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1466MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1467MODULE_LICENSE("GPL");
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