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powerpc/mpc5200: Remove obsolete code from mpc5200 MDIO driver
[deliverable/linux.git] / drivers / serial / mpc52xx_uart.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
3 *
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
12 *
13 *
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
9b9129e7 15 *
1da177e4
LT		 16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
9b9129e7 18 *
25ae3a07
JR		 19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121
b9272dfd
GL		 22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
1da177e4 25 * Copyright (C) 2003 MontaVista, Software, Inc.
9b9129e7 26 *
1da177e4
LT		 27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied.
30 */
9b9129e7 31
1da177e4
LT		 32/* Platform device Usage :
33 *
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
37 *
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
41 *
406b7d4f 42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
d62de3aa
SM		 43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
c30fe7f7 46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
d62de3aa 47 * will be mapped to.
1da177e4
LT		 48 */
49
b9272dfd
GL		 50/* OF Platform device Usage :
51 *
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
54 * and "mpc52xx-psc-uart" in the compatible string
55 *
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
58 * to the device node.
59 *
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
63 */
64
65#undef DEBUG
66
67#include <linux/device.h>
1da177e4
LT		 68#include <linux/module.h>
69#include <linux/tty.h>
70#include <linux/serial.h>
71#include <linux/sysrq.h>
72#include <linux/console.h>
406b7d4f
JR		 73#include <linux/delay.h>
74#include <linux/io.h>
283029d1
GL		 75#include <linux/of.h>
76#include <linux/of_platform.h>
b9272dfd 77
1da177e4 78#include <asm/mpc52xx.h>
25ae3a07 79#include <asm/mpc512x.h>
1da177e4
LT		 80#include <asm/mpc52xx_psc.h>
81
82#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
83#define SUPPORT_SYSRQ
84#endif
85
86#include <linux/serial_core.h>
87
88
d62de3aa
SM		 89/* We've been assigned a range on the "Low-density serial ports" major */
90#define SERIAL_PSC_MAJOR 204
91#define SERIAL_PSC_MINOR 148
92
1da177e4
LT		 93
94#define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
95
96
97static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
98 /* Rem: - We use the read_status_mask as a shadow of
99 * psc->mpc52xx_psc_imr
100 * - It's important that is array is all zero on start as we
101 * use it to know if it's initialized or not ! If it's not sure
102 * it's cleared, then a memset(...,0,...) should be added to
103 * the console_init
104 */
8d1fb8cb 105
b9272dfd
GL		 106/* lookup table for matching device nodes to index numbers */
107static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
108
109static void mpc52xx_uart_of_enumerate(void);
1da177e4 110
599f030c 111
1da177e4
LT		 112#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
113
114
115/* Forward declaration of the interruption handling routine */
406b7d4f 116static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
1da177e4
LT		 117
118
119/* Simple macro to test if a port is console or not. This one is taken
120 * for serial_core.c and maybe should be moved to serial_core.h ? */
121#ifdef CONFIG_SERIAL_CORE_CONSOLE
406b7d4f
JR		 122#define uart_console(port) \
123 ((port)->cons && (port)->cons->index == (port)->line)
1da177e4
LT		 124#else
125#define uart_console(port) (0)
126#endif
127
599f030c
JR		 128/* ======================================================================== */
129/* PSC fifo operations for isolating differences between 52xx and 512x */
130/* ======================================================================== */
131
132struct psc_ops {
133 void (*fifo_init)(struct uart_port *port);
134 int (*raw_rx_rdy)(struct uart_port *port);
135 int (*raw_tx_rdy)(struct uart_port *port);
136 int (*rx_rdy)(struct uart_port *port);
137 int (*tx_rdy)(struct uart_port *port);
138 int (*tx_empty)(struct uart_port *port);
139 void (*stop_rx)(struct uart_port *port);
140 void (*start_tx)(struct uart_port *port);
141 void (*stop_tx)(struct uart_port *port);
142 void (*rx_clr_irq)(struct uart_port *port);
143 void (*tx_clr_irq)(struct uart_port *port);
144 void (*write_char)(struct uart_port *port, unsigned char c);
145 unsigned char (*read_char)(struct uart_port *port);
146 void (*cw_disable_ints)(struct uart_port *port);
147 void (*cw_restore_ints)(struct uart_port *port);
148 unsigned long (*getuartclk)(void *p);
149};
150
25ae3a07 151#ifdef CONFIG_PPC_MPC52xx
599f030c
JR		 152#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
153static void mpc52xx_psc_fifo_init(struct uart_port *port)
154{
155 struct mpc52xx_psc __iomem *psc = PSC(port);
156 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
157
158 /* /32 prescaler */
159 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
160
161 out_8(&fifo->rfcntl, 0x00);
162 out_be16(&fifo->rfalarm, 0x1ff);
163 out_8(&fifo->tfcntl, 0x07);
164 out_be16(&fifo->tfalarm, 0x80);
165
166 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
167 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
168}
169
170static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
171{
172 return in_be16(&PSC(port)->mpc52xx_psc_status)
173 & MPC52xx_PSC_SR_RXRDY;
174}
175
176static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
177{
178 return in_be16(&PSC(port)->mpc52xx_psc_status)
179 & MPC52xx_PSC_SR_TXRDY;
180}
181
182
183static int mpc52xx_psc_rx_rdy(struct uart_port *port)
184{
185 return in_be16(&PSC(port)->mpc52xx_psc_isr)
186 & port->read_status_mask
187 & MPC52xx_PSC_IMR_RXRDY;
188}
189
190static int mpc52xx_psc_tx_rdy(struct uart_port *port)
191{
192 return in_be16(&PSC(port)->mpc52xx_psc_isr)
193 & port->read_status_mask
194 & MPC52xx_PSC_IMR_TXRDY;
195}
196
197static int mpc52xx_psc_tx_empty(struct uart_port *port)
198{
199 return in_be16(&PSC(port)->mpc52xx_psc_status)
200 & MPC52xx_PSC_SR_TXEMP;
201}
202
203static void mpc52xx_psc_start_tx(struct uart_port *port)
204{
205 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
206 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
207}
208
209static void mpc52xx_psc_stop_tx(struct uart_port *port)
210{
211 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
212 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
213}
214
215static void mpc52xx_psc_stop_rx(struct uart_port *port)
216{
217 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
218 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
219}
220
221static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
222{
223}
224
225static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
226{
227}
228
229static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
230{
231 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
232}
233
234static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
235{
236 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
237}
238
239static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
240{
241 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
242}
243
244static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
245{
246 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
247}
248
249/* Search for bus-frequency property in this node or a parent */
250static unsigned long mpc52xx_getuartclk(void *p)
251{
599f030c
JR		 252 /*
253 * 5200 UARTs have a / 32 prescaler
254 * but the generic serial code assumes 16
255 * so return ipb freq / 2
256 */
257 return mpc52xx_find_ipb_freq(p) / 2;
599f030c
JR		 258}
259
260static struct psc_ops mpc52xx_psc_ops = {
261 .fifo_init = mpc52xx_psc_fifo_init,
262 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
263 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
264 .rx_rdy = mpc52xx_psc_rx_rdy,
265 .tx_rdy = mpc52xx_psc_tx_rdy,
266 .tx_empty = mpc52xx_psc_tx_empty,
267 .stop_rx = mpc52xx_psc_stop_rx,
268 .start_tx = mpc52xx_psc_start_tx,
269 .stop_tx = mpc52xx_psc_stop_tx,
270 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
271 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
272 .write_char = mpc52xx_psc_write_char,
273 .read_char = mpc52xx_psc_read_char,
274 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
275 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
276 .getuartclk = mpc52xx_getuartclk,
277};
278
25ae3a07
JR		 279#endif /* CONFIG_MPC52xx */
280
281#ifdef CONFIG_PPC_MPC512x
282#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
283static void mpc512x_psc_fifo_init(struct uart_port *port)
284{
285 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
286 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
287 out_be32(&FIFO_512x(port)->txalarm, 1);
288 out_be32(&FIFO_512x(port)->tximr, 0);
289
290 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
291 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
292 out_be32(&FIFO_512x(port)->rxalarm, 1);
293 out_be32(&FIFO_512x(port)->rximr, 0);
294
295 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
296 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
297}
298
299static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
300{
301 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
302}
303
304static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
305{
306 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
307}
308
309static int mpc512x_psc_rx_rdy(struct uart_port *port)
310{
311 return in_be32(&FIFO_512x(port)->rxsr)
312 & in_be32(&FIFO_512x(port)->rximr)
313 & MPC512x_PSC_FIFO_ALARM;
314}
315
316static int mpc512x_psc_tx_rdy(struct uart_port *port)
317{
318 return in_be32(&FIFO_512x(port)->txsr)
319 & in_be32(&FIFO_512x(port)->tximr)
320 & MPC512x_PSC_FIFO_ALARM;
321}
322
323static int mpc512x_psc_tx_empty(struct uart_port *port)
324{
325 return in_be32(&FIFO_512x(port)->txsr)
326 & MPC512x_PSC_FIFO_EMPTY;
327}
328
329static void mpc512x_psc_stop_rx(struct uart_port *port)
330{
331 unsigned long rx_fifo_imr;
332
333 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
334 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
335 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
336}
337
338static void mpc512x_psc_start_tx(struct uart_port *port)
339{
340 unsigned long tx_fifo_imr;
341
342 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
343 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
344 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
345}
346
347static void mpc512x_psc_stop_tx(struct uart_port *port)
348{
349 unsigned long tx_fifo_imr;
350
351 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
352 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
353 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
354}
355
356static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
357{
358 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
359}
360
361static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
362{
363 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
364}
365
366static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
367{
368 out_8(&FIFO_512x(port)->txdata_8, c);
369}
370
371static unsigned char mpc512x_psc_read_char(struct uart_port *port)
372{
373 return in_8(&FIFO_512x(port)->rxdata_8);
374}
375
376static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
377{
378 port->read_status_mask =
379 in_be32(&FIFO_512x(port)->tximr) << 16 |
380 in_be32(&FIFO_512x(port)->rximr);
381 out_be32(&FIFO_512x(port)->tximr, 0);
382 out_be32(&FIFO_512x(port)->rximr, 0);
383}
384
385static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
386{
387 out_be32(&FIFO_512x(port)->tximr,
388 (port->read_status_mask >> 16) & 0x7f);
389 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
390}
391
392static unsigned long mpc512x_getuartclk(void *p)
393{
394 return mpc512x_find_ips_freq(p);
395}
396
397static struct psc_ops mpc512x_psc_ops = {
398 .fifo_init = mpc512x_psc_fifo_init,
399 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
400 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
401 .rx_rdy = mpc512x_psc_rx_rdy,
402 .tx_rdy = mpc512x_psc_tx_rdy,
403 .tx_empty = mpc512x_psc_tx_empty,
404 .stop_rx = mpc512x_psc_stop_rx,
405 .start_tx = mpc512x_psc_start_tx,
406 .stop_tx = mpc512x_psc_stop_tx,
407 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
408 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
409 .write_char = mpc512x_psc_write_char,
410 .read_char = mpc512x_psc_read_char,
411 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
412 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
413 .getuartclk = mpc512x_getuartclk,
414};
415#endif
416
417static struct psc_ops *psc_ops;
1da177e4
LT		 418
419/* ======================================================================== */
420/* UART operations */
421/* ======================================================================== */
422
9b9129e7 423static unsigned int
1da177e4
LT		 424mpc52xx_uart_tx_empty(struct uart_port *port)
425{
599f030c 426 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
1da177e4
LT		 427}
428
9b9129e7 429static void
1da177e4
LT		 430mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
431{
432 /* Not implemented */
433}
434
9b9129e7 435static unsigned int
1da177e4
LT		 436mpc52xx_uart_get_mctrl(struct uart_port *port)
437{
438 /* Not implemented */
439 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
440}
441
9b9129e7 442static void
b129a8cc 443mpc52xx_uart_stop_tx(struct uart_port *port)
1da177e4
LT		 444{
445 /* port->lock taken by caller */
599f030c 446 psc_ops->stop_tx(port);
1da177e4
LT		 447}
448
9b9129e7 449static void
b129a8cc 450mpc52xx_uart_start_tx(struct uart_port *port)
1da177e4
LT		 451{
452 /* port->lock taken by caller */
599f030c 453 psc_ops->start_tx(port);
1da177e4
LT		 454}
455
9b9129e7 456static void
1da177e4
LT		 457mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
458{
459 unsigned long flags;
460 spin_lock_irqsave(&port->lock, flags);
9b9129e7 461
1da177e4
LT		 462 port->x_char = ch;
463 if (ch) {
464 /* Make sure tx interrupts are on */
465 /* Truly necessary ??? They should be anyway */
599f030c 466 psc_ops->start_tx(port);
1da177e4 467 }
9b9129e7 468
1da177e4
LT		 469 spin_unlock_irqrestore(&port->lock, flags);
470}
471
472static void
473mpc52xx_uart_stop_rx(struct uart_port *port)
474{
475 /* port->lock taken by caller */
599f030c 476 psc_ops->stop_rx(port);
1da177e4
LT		 477}
478
479static void
480mpc52xx_uart_enable_ms(struct uart_port *port)
481{
482 /* Not implemented */
483}
484
485static void
486mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
487{
488 unsigned long flags;
489 spin_lock_irqsave(&port->lock, flags);
490
406b7d4f
JR		 491 if (ctl == -1)
492 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
1da177e4 493 else
406b7d4f 494 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
9b9129e7 495
1da177e4
LT		 496 spin_unlock_irqrestore(&port->lock, flags);
497}
498
499static int
500mpc52xx_uart_startup(struct uart_port *port)
501{
502 struct mpc52xx_psc __iomem *psc = PSC(port);
503 int ret;
504
505 /* Request IRQ */
506 ret = request_irq(port->irq, mpc52xx_uart_int,
25ae3a07
JR		 507 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
508 "mpc52xx_psc_uart", port);
1da177e4
LT		 509 if (ret)
510 return ret;
511
512 /* Reset/activate the port, clear and enable interrupts */
406b7d4f
JR		 513 out_8(&psc->command, MPC52xx_PSC_RST_RX);
514 out_8(&psc->command, MPC52xx_PSC_RST_TX);
9b9129e7 515
406b7d4f 516 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
1da177e4 517
599f030c 518 psc_ops->fifo_init(port);
9b9129e7 519
406b7d4f
JR		 520 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
521 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
9b9129e7 522
1da177e4
LT		 523 return 0;
524}
525
526static void
527mpc52xx_uart_shutdown(struct uart_port *port)
528{
529 struct mpc52xx_psc __iomem *psc = PSC(port);
9b9129e7 530
a3481197 531 /* Shut down the port. Leave TX active if on a console port */
406b7d4f 532 out_8(&psc->command, MPC52xx_PSC_RST_RX);
a3481197 533 if (!uart_console(port))
406b7d4f 534 out_8(&psc->command, MPC52xx_PSC_RST_TX);
9b9129e7
GL		 535
536 port->read_status_mask = 0;
406b7d4f 537 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
1da177e4
LT		 538
539 /* Release interrupt */
540 free_irq(port->irq, port);
541}
542
9b9129e7 543static void
606d099c 544mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
406b7d4f 545 struct ktermios *old)
1da177e4
LT		 546{
547 struct mpc52xx_psc __iomem *psc = PSC(port);
548 unsigned long flags;
549 unsigned char mr1, mr2;
550 unsigned short ctr;
551 unsigned int j, baud, quot;
9b9129e7 552
1da177e4
LT		 553 /* Prepare what we're gonna write */
554 mr1 = 0;
9b9129e7 555
1da177e4 556 switch (new->c_cflag & CSIZE) {
406b7d4f
JR		 557 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
558 break;
559 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
560 break;
561 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
562 break;
563 case CS8:
564 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
1da177e4
LT		 565 }
566
567 if (new->c_cflag & PARENB) {
568 mr1 |= (new->c_cflag & PARODD) ?
569 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
570 } else
571 mr1 |= MPC52xx_PSC_MODE_PARNONE;
9b9129e7
GL		 572
573
1da177e4
LT		 574 mr2 = 0;
575
576 if (new->c_cflag & CSTOPB)
577 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
578 else
579 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
580 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
581 MPC52xx_PSC_MODE_ONE_STOP;
582
583
584 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
585 quot = uart_get_divisor(port, baud);
586 ctr = quot & 0xffff;
9b9129e7 587
1da177e4
LT		 588 /* Get the lock */
589 spin_lock_irqsave(&port->lock, flags);
590
591 /* Update the per-port timeout */
592 uart_update_timeout(port, new->c_cflag, baud);
593
c4f01240
NA		 594 /* Do our best to flush TX & RX, so we don't lose anything */
595 /* But we don't wait indefinitely ! */
1da177e4
LT		 596 j = 5000000; /* Maximum wait */
597 /* FIXME Can't receive chars since set_termios might be called at early
598 * boot for the console, all stuff is not yet ready to receive at that
599 * time and that just makes the kernel oops */
600 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
599f030c 601 while (!mpc52xx_uart_tx_empty(port) && --j)
1da177e4
LT		 602 udelay(1);
603
604 if (!j)
406b7d4f 605 printk(KERN_ERR "mpc52xx_uart.c: "
1da177e4 606 "Unable to flush RX & TX fifos in-time in set_termios."
406b7d4f 607 "Some chars may have been lost.\n");
1da177e4
LT		 608
609 /* Reset the TX & RX */
406b7d4f
JR		 610 out_8(&psc->command, MPC52xx_PSC_RST_RX);
611 out_8(&psc->command, MPC52xx_PSC_RST_TX);
1da177e4
LT		 612
613 /* Send new mode settings */
406b7d4f
JR		 614 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
615 out_8(&psc->mode, mr1);
616 out_8(&psc->mode, mr2);
617 out_8(&psc->ctur, ctr >> 8);
618 out_8(&psc->ctlr, ctr & 0xff);
9b9129e7 619
1da177e4 620 /* Reenable TX & RX */
406b7d4f
JR		 621 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
622 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
1da177e4
LT		 623
624 /* We're all set, release the lock */
625 spin_unlock_irqrestore(&port->lock, flags);
626}
627
628static const char *
629mpc52xx_uart_type(struct uart_port *port)
630{
631 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
632}
633
634static void
635mpc52xx_uart_release_port(struct uart_port *port)
636{
406b7d4f
JR		 637 /* remapped by us ? */
638 if (port->flags & UPF_IOREMAP) {
1da177e4
LT		 639 iounmap(port->membase);
640 port->membase = NULL;
641 }
642
b9272dfd 643 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
1da177e4
LT		 644}
645
646static int
647mpc52xx_uart_request_port(struct uart_port *port)
648{
be618f55
AL		 649 int err;
650
1da177e4 651 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
b9272dfd 652 port->membase = ioremap(port->mapbase,
406b7d4f 653 sizeof(struct mpc52xx_psc));
1da177e4
LT		 654
655 if (!port->membase)
656 return -EINVAL;
657
b9272dfd 658 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
1da177e4 659 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
be618f55
AL		 660
661 if (err && (port->flags & UPF_IOREMAP)) {
662 iounmap(port->membase);
663 port->membase = NULL;
664 }
665
666 return err;
1da177e4
LT		 667}
668
669static void
670mpc52xx_uart_config_port(struct uart_port *port, int flags)
671{
406b7d4f
JR		 672 if ((flags & UART_CONFIG_TYPE)
673 && (mpc52xx_uart_request_port(port) == 0))
674 port->type = PORT_MPC52xx;
1da177e4
LT		 675}
676
677static int
678mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
679{
406b7d4f 680 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
1da177e4
LT		 681 return -EINVAL;
682
406b7d4f
JR		 683 if ((ser->irq != port->irq) ||
684 (ser->io_type != SERIAL_IO_MEM) ||
685 (ser->baud_base != port->uartclk) ||
686 (ser->iomem_base != (void *)port->mapbase) ||
687 (ser->hub6 != 0))
1da177e4
LT		 688 return -EINVAL;
689
690 return 0;
691}
692
693
694static struct uart_ops mpc52xx_uart_ops = {
695 .tx_empty = mpc52xx_uart_tx_empty,
696 .set_mctrl = mpc52xx_uart_set_mctrl,
697 .get_mctrl = mpc52xx_uart_get_mctrl,
698 .stop_tx = mpc52xx_uart_stop_tx,
699 .start_tx = mpc52xx_uart_start_tx,
700 .send_xchar = mpc52xx_uart_send_xchar,
701 .stop_rx = mpc52xx_uart_stop_rx,
702 .enable_ms = mpc52xx_uart_enable_ms,
703 .break_ctl = mpc52xx_uart_break_ctl,
704 .startup = mpc52xx_uart_startup,
705 .shutdown = mpc52xx_uart_shutdown,
706 .set_termios = mpc52xx_uart_set_termios,
707/* .pm = mpc52xx_uart_pm, Not supported yet */
708/* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
709 .type = mpc52xx_uart_type,
710 .release_port = mpc52xx_uart_release_port,
711 .request_port = mpc52xx_uart_request_port,
712 .config_port = mpc52xx_uart_config_port,
713 .verify_port = mpc52xx_uart_verify_port
714};
715
9b9129e7 716
1da177e4
LT		 717/* ======================================================================== */
718/* Interrupt handling */
719/* ======================================================================== */
9b9129e7 720
1da177e4 721static inline int
7d12e780 722mpc52xx_uart_int_rx_chars(struct uart_port *port)
1da177e4 723{
a88487c7 724 struct tty_struct *tty = port->info->port.tty;
33f0f88f 725 unsigned char ch, flag;
1da177e4
LT		 726 unsigned short status;
727
728 /* While we can read, do so ! */
599f030c 729 while (psc_ops->raw_rx_rdy(port)) {
1da177e4 730 /* Get the char */
599f030c 731 ch = psc_ops->read_char(port);
1da177e4
LT		 732
733 /* Handle sysreq char */
734#ifdef SUPPORT_SYSRQ
7d12e780 735 if (uart_handle_sysrq_char(port, ch)) {
1da177e4
LT		 736 port->sysrq = 0;
737 continue;
738 }
739#endif
740
741 /* Store it */
33f0f88f
AC		 742
743 flag = TTY_NORMAL;
1da177e4 744 port->icount.rx++;
9b9129e7 745
599f030c
JR		 746 status = in_be16(&PSC(port)->mpc52xx_psc_status);
747
406b7d4f
JR		 748 if (status & (MPC52xx_PSC_SR_PE |
749 MPC52xx_PSC_SR_FE |
750 MPC52xx_PSC_SR_RB)) {
9b9129e7 751
1da177e4 752 if (status & MPC52xx_PSC_SR_RB) {
33f0f88f 753 flag = TTY_BREAK;
1da177e4
LT		 754 uart_handle_break(port);
755 } else if (status & MPC52xx_PSC_SR_PE)
33f0f88f 756 flag = TTY_PARITY;
1da177e4 757 else if (status & MPC52xx_PSC_SR_FE)
33f0f88f 758 flag = TTY_FRAME;
1da177e4
LT		 759
760 /* Clear error condition */
406b7d4f 761 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
1da177e4
LT		 762
763 }
33f0f88f
AC		 764 tty_insert_flip_char(tty, ch, flag);
765 if (status & MPC52xx_PSC_SR_OE) {
766 /*
767 * Overrun is special, since it's
768 * reported immediately, and doesn't
769 * affect the current character
770 */
771 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
772 }
1da177e4
LT		 773 }
774
fbe543b4 775 spin_unlock(&port->lock);
1da177e4 776 tty_flip_buffer_push(tty);
fbe543b4 777 spin_lock(&port->lock);
9b9129e7 778
599f030c 779 return psc_ops->raw_rx_rdy(port);
1da177e4
LT		 780}
781
782static inline int
783mpc52xx_uart_int_tx_chars(struct uart_port *port)
784{
785 struct circ_buf *xmit = &port->info->xmit;
786
787 /* Process out of band chars */
788 if (port->x_char) {
599f030c 789 psc_ops->write_char(port, port->x_char);
1da177e4
LT		 790 port->icount.tx++;
791 port->x_char = 0;
792 return 1;
793 }
794
795 /* Nothing to do ? */
796 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
b129a8cc 797 mpc52xx_uart_stop_tx(port);
1da177e4
LT		 798 return 0;
799 }
800
801 /* Send chars */
599f030c
JR		 802 while (psc_ops->raw_tx_rdy(port)) {
803 psc_ops->write_char(port, xmit->buf[xmit->tail]);
1da177e4
LT		 804 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
805 port->icount.tx++;
806 if (uart_circ_empty(xmit))
807 break;
808 }
809
810 /* Wake up */
811 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
812 uart_write_wakeup(port);
813
814 /* Maybe we're done after all */
815 if (uart_circ_empty(xmit)) {
b129a8cc 816 mpc52xx_uart_stop_tx(port);
1da177e4
LT		 817 return 0;
818 }
819
820 return 1;
821}
822
9b9129e7 823static irqreturn_t
7d12e780 824mpc52xx_uart_int(int irq, void *dev_id)
1da177e4 825{
c7bec5ab 826 struct uart_port *port = dev_id;
1da177e4
LT		 827 unsigned long pass = ISR_PASS_LIMIT;
828 unsigned int keepgoing;
9b9129e7 829
1da177e4 830 spin_lock(&port->lock);
9b9129e7 831
1da177e4
LT		 832 /* While we have stuff to do, we continue */
833 do {
834 /* If we don't find anything to do, we stop */
9b9129e7
GL		 835 keepgoing = 0;
836
599f030c
JR		 837 psc_ops->rx_clr_irq(port);
838 if (psc_ops->rx_rdy(port))
7d12e780 839 keepgoing |= mpc52xx_uart_int_rx_chars(port);
1da177e4 840
599f030c
JR		 841 psc_ops->tx_clr_irq(port);
842 if (psc_ops->tx_rdy(port))
1da177e4 843 keepgoing |= mpc52xx_uart_int_tx_chars(port);
9b9129e7 844
1da177e4 845 /* Limit number of iteration */
406b7d4f 846 if (!(--pass))
1da177e4
LT		 847 keepgoing = 0;
848
849 } while (keepgoing);
9b9129e7 850
1da177e4 851 spin_unlock(&port->lock);
9b9129e7 852
1da177e4
LT		 853 return IRQ_HANDLED;
854}
855
856
857/* ======================================================================== */
858/* Console ( if applicable ) */
859/* ======================================================================== */
860
861#ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
862
863static void __init
864mpc52xx_console_get_options(struct uart_port *port,
406b7d4f 865 int *baud, int *parity, int *bits, int *flow)
1da177e4
LT		 866{
867 struct mpc52xx_psc __iomem *psc = PSC(port);
868 unsigned char mr1;
869
b9272dfd
GL		 870 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
871
1da177e4 872 /* Read the mode registers */
406b7d4f 873 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
1da177e4 874 mr1 = in_8(&psc->mode);
9b9129e7 875
1da177e4 876 /* CT{U,L}R are write-only ! */
b9272dfd 877 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
1da177e4
LT		 878
879 /* Parse them */
880 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
406b7d4f
JR		 881 case MPC52xx_PSC_MODE_5_BITS:
882 *bits = 5;
883 break;
884 case MPC52xx_PSC_MODE_6_BITS:
885 *bits = 6;
886 break;
887 case MPC52xx_PSC_MODE_7_BITS:
888 *bits = 7;
889 break;
890 case MPC52xx_PSC_MODE_8_BITS:
891 default:
892 *bits = 8;
1da177e4 893 }
9b9129e7 894
1da177e4
LT		 895 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
896 *parity = 'n';
897 else
898 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
899}
900
9b9129e7 901static void
1da177e4
LT		 902mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
903{
904 struct uart_port *port = &mpc52xx_uart_ports[co->index];
1da177e4 905 unsigned int i, j;
9b9129e7 906
1da177e4 907 /* Disable interrupts */
599f030c 908 psc_ops->cw_disable_ints(port);
1da177e4
LT		 909
910 /* Wait the TX buffer to be empty */
9b9129e7 911 j = 5000000; /* Maximum wait */
599f030c 912 while (!mpc52xx_uart_tx_empty(port) && --j)
1da177e4
LT		 913 udelay(1);
914
915 /* Write all the chars */
d358788f 916 for (i = 0; i < count; i++, s++) {
1da177e4 917 /* Line return handling */
d358788f 918 if (*s == '\n')
599f030c 919 psc_ops->write_char(port, '\r');
9b9129e7 920
d358788f 921 /* Send the char */
599f030c 922 psc_ops->write_char(port, *s);
d358788f 923
1da177e4 924 /* Wait the TX buffer to be empty */
9b9129e7 925 j = 20000; /* Maximum wait */
599f030c 926 while (!mpc52xx_uart_tx_empty(port) && --j)
1da177e4
LT		 927 udelay(1);
928 }
929
930 /* Restore interrupt state */
599f030c 931 psc_ops->cw_restore_ints(port);
1da177e4
LT		 932}
933
b9272dfd
GL		 934
935static int __init
936mpc52xx_console_setup(struct console *co, char *options)
937{
938 struct uart_port *port = &mpc52xx_uart_ports[co->index];
939 struct device_node *np = mpc52xx_uart_nodes[co->index];
599f030c 940 unsigned int uartclk;
b9272dfd
GL		 941 struct resource res;
942 int ret;
943
944 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
945 int bits = 8;
946 int parity = 'n';
947 int flow = 'n';
948
949 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
950 co, co->index, options);
951
952 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
953 pr_debug("PSC%x out of range\n", co->index);
954 return -EINVAL;
955 }
956
957 if (!np) {
958 pr_debug("PSC%x not found in device tree\n", co->index);
959 return -EINVAL;
960 }
961
962 pr_debug("Console on ttyPSC%x is %s\n",
406b7d4f 963 co->index, mpc52xx_uart_nodes[co->index]->full_name);
b9272dfd
GL		 964
965 /* Fetch register locations */
406b7d4f
JR		 966 ret = of_address_to_resource(np, 0, &res);
967 if (ret) {
b9272dfd
GL		 968 pr_debug("Could not get resources for PSC%x\n", co->index);
969 return ret;
970 }
971
599f030c
JR		 972 uartclk = psc_ops->getuartclk(np);
973 if (uartclk == 0) {
974 pr_debug("Could not find uart clock frequency!\n");
b9272dfd
GL		 975 return -EINVAL;
976 }
977
978 /* Basic port init. Needed since we use some uart_??? func before
979 * real init for early access */
980 spin_lock_init(&port->lock);
599f030c 981 port->uartclk = uartclk;
b9272dfd
GL		 982 port->ops = &mpc52xx_uart_ops;
983 port->mapbase = res.start;
984 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
985 port->irq = irq_of_parse_and_map(np, 0);
986
987 if (port->membase == NULL)
988 return -EINVAL;
989
5dd80d5d 990 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
406b7d4f
JR		 991 (void *)port->mapbase, port->membase,
992 port->irq, port->uartclk);
b9272dfd
GL		 993
994 /* Setup the port parameters accoding to options */
995 if (options)
996 uart_parse_options(options, &baud, &parity, &bits, &flow);
997 else
998 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
999
1000 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
406b7d4f 1001 baud, bits, parity, flow);
b9272dfd
GL		 1002
1003 return uart_set_options(port, co, baud, parity, bits, flow);
1004}
b9272dfd 1005
1da177e4 1006
2d8179c0 1007static struct uart_driver mpc52xx_uart_driver;
1da177e4
LT		 1008
1009static struct console mpc52xx_console = {
d62de3aa 1010 .name = "ttyPSC",
1da177e4
LT		 1011 .write = mpc52xx_console_write,
1012 .device = uart_console_device,
1013 .setup = mpc52xx_console_setup,
1014 .flags = CON_PRINTBUFFER,
406b7d4f 1015 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1da177e4
LT		 1016 .data = &mpc52xx_uart_driver,
1017};
1018
9b9129e7
GL		 1019
1020static int __init
1da177e4
LT		 1021mpc52xx_console_init(void)
1022{
b9272dfd 1023 mpc52xx_uart_of_enumerate();
1da177e4
LT		 1024 register_console(&mpc52xx_console);
1025 return 0;
1026}
1027
1028console_initcall(mpc52xx_console_init);
1029
1030#define MPC52xx_PSC_CONSOLE &mpc52xx_console
1031#else
1032#define MPC52xx_PSC_CONSOLE NULL
1033#endif
1034
1035
1036/* ======================================================================== */
1037/* UART Driver */
1038/* ======================================================================== */
1039
1040static struct uart_driver mpc52xx_uart_driver = {
1da177e4 1041 .driver_name = "mpc52xx_psc_uart",
d62de3aa 1042 .dev_name = "ttyPSC",
d62de3aa
SM		 1043 .major = SERIAL_PSC_MAJOR,
1044 .minor = SERIAL_PSC_MINOR,
1da177e4
LT		 1045 .nr = MPC52xx_PSC_MAXNUM,
1046 .cons = MPC52xx_PSC_CONSOLE,
1047};
1048
b9272dfd
GL		 1049/* ======================================================================== */
1050/* OF Platform Driver */
1051/* ======================================================================== */
1052
52b80482
GL		 1053static struct of_device_id mpc52xx_uart_of_match[] = {
1054#ifdef CONFIG_PPC_MPC52xx
1055 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1056 /* binding used by old lite5200 device trees: */
1057 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1058 /* binding used by efika: */
1059 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
1060#endif
1061#ifdef CONFIG_PPC_MPC512x
1062 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
52b80482 1063#endif
bc775eac 1064 {},
52b80482
GL		 1065};
1066
b9272dfd
GL		 1067static int __devinit
1068mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1069{
1070 int idx = -1;
599f030c 1071 unsigned int uartclk;
b9272dfd
GL		 1072 struct uart_port *port = NULL;
1073 struct resource res;
1074 int ret;
1075
1076 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1077
1078 /* Check validity & presence */
1079 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1080 if (mpc52xx_uart_nodes[idx] == op->node)
1081 break;
1082 if (idx >= MPC52xx_PSC_MAXNUM)
1083 return -EINVAL;
1084 pr_debug("Found %s assigned to ttyPSC%x\n",
406b7d4f 1085 mpc52xx_uart_nodes[idx]->full_name, idx);
b9272dfd 1086
599f030c
JR		 1087 uartclk = psc_ops->getuartclk(op->node);
1088 if (uartclk == 0) {
1089 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
b9272dfd
GL		 1090 return -EINVAL;
1091 }
1092
1093 /* Init the port structure */
1094 port = &mpc52xx_uart_ports[idx];
1095
1096 spin_lock_init(&port->lock);
599f030c 1097 port->uartclk = uartclk;
b9272dfd
GL		 1098 port->fifosize = 512;
1099 port->iotype = UPIO_MEM;
1100 port->flags = UPF_BOOT_AUTOCONF |
406b7d4f 1101 (uart_console(port) ? 0 : UPF_IOREMAP);
b9272dfd
GL		 1102 port->line = idx;
1103 port->ops = &mpc52xx_uart_ops;
1104 port->dev = &op->dev;
1105
1106 /* Search for IRQ and mapbase */
406b7d4f
JR		 1107 ret = of_address_to_resource(op->node, 0, &res);
1108 if (ret)
b9272dfd
GL		 1109 return ret;
1110
1111 port->mapbase = res.start;
1112 port->irq = irq_of_parse_and_map(op->node, 0);
1113
5dd80d5d 1114 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
406b7d4f 1115 (void *)port->mapbase, port->irq, port->uartclk);
b9272dfd 1116
406b7d4f 1117 if ((port->irq == NO_IRQ) || !port->mapbase) {
b9272dfd
GL		 1118 printk(KERN_ERR "Could not allocate resources for PSC\n");
1119 return -EINVAL;
1120 }
1121
1122 /* Add the port to the uart sub-system */
1123 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1124 if (!ret)
406b7d4f 1125 dev_set_drvdata(&op->dev, (void *)port);
b9272dfd
GL		 1126
1127 return ret;
1128}
1129
1130static int
1131mpc52xx_uart_of_remove(struct of_device *op)
1132{
1133 struct uart_port *port = dev_get_drvdata(&op->dev);
1134 dev_set_drvdata(&op->dev, NULL);
1135
fc7900bb 1136 if (port) {
b9272dfd 1137 uart_remove_one_port(&mpc52xx_uart_driver, port);
fc7900bb
SM		 1138 irq_dispose_mapping(port->irq);
1139 }
b9272dfd
GL		 1140
1141 return 0;
1142}
1143
1144#ifdef CONFIG_PM
1145static int
1146mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1147{
1148 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1149
1150 if (port)
1151 uart_suspend_port(&mpc52xx_uart_driver, port);
1152
1153 return 0;
1154}
1155
1156static int
1157mpc52xx_uart_of_resume(struct of_device *op)
1158{
1159 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1160
1161 if (port)
1162 uart_resume_port(&mpc52xx_uart_driver, port);
1163
1164 return 0;
1165}
1166#endif
1167
1168static void
1169mpc52xx_uart_of_assign(struct device_node *np, int idx)
1170{
1171 int free_idx = -1;
1172 int i;
1173
1174 /* Find the first free node */
1175 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1176 if (mpc52xx_uart_nodes[i] == NULL) {
1177 free_idx = i;
1178 break;
1179 }
1180 }
1181
1182 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1183 idx = free_idx;
1184
1185 if (idx < 0)
1186 return; /* No free slot; abort */
1187
406b7d4f 1188 of_node_get(np);
b9272dfd
GL		 1189 /* If the slot is already occupied, then swap slots */
1190 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1191 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
af6a9aab 1192 mpc52xx_uart_nodes[idx] = np;
b9272dfd
GL		 1193}
1194
1195static void
1196mpc52xx_uart_of_enumerate(void)
1197{
406b7d4f 1198 static int enum_done;
b9272dfd
GL		 1199 struct device_node *np;
1200 const unsigned int *devno;
25ae3a07 1201 const struct of_device_id *match;
b9272dfd
GL		 1202 int i;
1203
1204 if (enum_done)
1205 return;
1206
1207 for_each_node_by_type(np, "serial") {
25ae3a07
JR		 1208 match = of_match_node(mpc52xx_uart_of_match, np);
1209 if (!match)
b9272dfd
GL		 1210 continue;
1211
25ae3a07
JR		 1212 psc_ops = match->data;
1213
b9272dfd 1214 /* Is a particular device number requested? */
40cd3a45 1215 devno = of_get_property(np, "port-number", NULL);
406b7d4f 1216 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
b9272dfd
GL		 1217 }
1218
1219 enum_done = 1;
1220
1221 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1222 if (mpc52xx_uart_nodes[i])
1223 pr_debug("%s assigned to ttyPSC%x\n",
406b7d4f 1224 mpc52xx_uart_nodes[i]->full_name, i);
b9272dfd
GL		 1225 }
1226}
1227
1228MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1229
1230static struct of_platform_driver mpc52xx_uart_of_driver = {
b9272dfd
GL		 1231 .match_table = mpc52xx_uart_of_match,
1232 .probe = mpc52xx_uart_of_probe,
1233 .remove = mpc52xx_uart_of_remove,
1234#ifdef CONFIG_PM
1235 .suspend = mpc52xx_uart_of_suspend,
1236 .resume = mpc52xx_uart_of_resume,
1237#endif
1238 .driver = {
1239 .name = "mpc52xx-psc-uart",
1240 },
1241};
1da177e4
LT		 1242
1243
1244/* ======================================================================== */
1245/* Module */
1246/* ======================================================================== */
1247
1248static int __init
1249mpc52xx_uart_init(void)
1250{
1251 int ret;
1252
b9272dfd 1253 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1da177e4 1254
406b7d4f
JR		 1255 ret = uart_register_driver(&mpc52xx_uart_driver);
1256 if (ret) {
b9272dfd
GL		 1257 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1258 __FILE__, ret);
1259 return ret;
1da177e4
LT		 1260 }
1261
b9272dfd
GL		 1262 mpc52xx_uart_of_enumerate();
1263
1264 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1265 if (ret) {
1266 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1267 __FILE__, ret);
1268 uart_unregister_driver(&mpc52xx_uart_driver);
1269 return ret;
1270 }
b9272dfd
GL		 1271
1272 return 0;
1da177e4
LT		 1273}
1274
1275static void __exit
1276mpc52xx_uart_exit(void)
1277{
b9272dfd 1278 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1da177e4
LT		 1279 uart_unregister_driver(&mpc52xx_uart_driver);
1280}
1281
1282
1283module_init(mpc52xx_uart_init);
1284module_exit(mpc52xx_uart_exit);
1285
1286MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1287MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1288MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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