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2c7ee6ab AV |
1 | /* |
2 | * drivers/serial/serial_ks8695.c | |
3 | * | |
4 | * Driver for KS8695 serial ports | |
5 | * | |
6 | * Based on drivers/serial/serial_amba.c, by Kam Lee. | |
7 | * | |
8 | * Copyright 2002-2005 Micrel Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | */ | |
16 | #include <linux/module.h> | |
17 | #include <linux/tty.h> | |
18 | #include <linux/ioport.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/serial.h> | |
21 | #include <linux/console.h> | |
22 | #include <linux/sysrq.h> | |
23 | #include <linux/device.h> | |
24 | ||
25 | #include <asm/io.h> | |
26 | #include <asm/irq.h> | |
27 | #include <asm/mach/irq.h> | |
28 | ||
a09e64fb RK |
29 | #include <mach/regs-uart.h> |
30 | #include <mach/regs-irq.h> | |
2c7ee6ab AV |
31 | |
32 | #if defined(CONFIG_SERIAL_KS8695_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
33 | #define SUPPORT_SYSRQ | |
34 | #endif | |
35 | ||
36 | #include <linux/serial_core.h> | |
37 | ||
38 | ||
39 | #define SERIAL_KS8695_MAJOR 204 | |
40 | #define SERIAL_KS8695_MINOR 16 | |
41 | #define SERIAL_KS8695_DEVNAME "ttyAM" | |
42 | ||
43 | #define SERIAL_KS8695_NR 1 | |
44 | ||
45 | /* | |
46 | * Access macros for the KS8695 UART | |
47 | */ | |
48 | #define UART_GET_CHAR(p) (__raw_readl((p)->membase + KS8695_URRB) & 0xFF) | |
49 | #define UART_PUT_CHAR(p, c) __raw_writel((c), (p)->membase + KS8695_URTH) | |
50 | #define UART_GET_FCR(p) __raw_readl((p)->membase + KS8695_URFC) | |
51 | #define UART_PUT_FCR(p, c) __raw_writel((c), (p)->membase + KS8695_URFC) | |
52 | #define UART_GET_MSR(p) __raw_readl((p)->membase + KS8695_URMS) | |
53 | #define UART_GET_LSR(p) __raw_readl((p)->membase + KS8695_URLS) | |
54 | #define UART_GET_LCR(p) __raw_readl((p)->membase + KS8695_URLC) | |
55 | #define UART_PUT_LCR(p, c) __raw_writel((c), (p)->membase + KS8695_URLC) | |
56 | #define UART_GET_MCR(p) __raw_readl((p)->membase + KS8695_URMC) | |
57 | #define UART_PUT_MCR(p, c) __raw_writel((c), (p)->membase + KS8695_URMC) | |
58 | #define UART_GET_BRDR(p) __raw_readl((p)->membase + KS8695_URBD) | |
59 | #define UART_PUT_BRDR(p, c) __raw_writel((c), (p)->membase + KS8695_URBD) | |
60 | ||
61 | #define KS8695_CLR_TX_INT() __raw_writel(1 << KS8695_IRQ_UART_TX, KS8695_IRQ_VA + KS8695_INTST) | |
62 | ||
63 | #define UART_DUMMY_LSR_RX 0x100 | |
64 | #define UART_PORT_SIZE (KS8695_USR - KS8695_URRB + 4) | |
65 | ||
457cd4f5 DH |
66 | static inline int tx_enabled(struct uart_port *port) |
67 | { | |
68 | return port->unused[0] & 1; | |
69 | } | |
70 | ||
71 | static inline int rx_enabled(struct uart_port *port) | |
72 | { | |
73 | return port->unused[0] & 2; | |
74 | } | |
75 | ||
76 | static inline int ms_enabled(struct uart_port *port) | |
77 | { | |
78 | return port->unused[0] & 4; | |
79 | } | |
80 | ||
81 | static inline void ms_enable(struct uart_port *port, int enabled) | |
82 | { | |
83 | if(enabled) | |
84 | port->unused[0] |= 4; | |
85 | else | |
86 | port->unused[0] &= ~4; | |
87 | } | |
88 | ||
89 | static inline void rx_enable(struct uart_port *port, int enabled) | |
90 | { | |
91 | if(enabled) | |
92 | port->unused[0] |= 2; | |
93 | else | |
94 | port->unused[0] &= ~2; | |
95 | } | |
96 | ||
97 | static inline void tx_enable(struct uart_port *port, int enabled) | |
98 | { | |
99 | if(enabled) | |
100 | port->unused[0] |= 1; | |
101 | else | |
102 | port->unused[0] &= ~1; | |
103 | } | |
2c7ee6ab AV |
104 | |
105 | ||
106 | #ifdef SUPPORT_SYSRQ | |
107 | static struct console ks8695_console; | |
108 | #endif | |
109 | ||
110 | static void ks8695uart_stop_tx(struct uart_port *port) | |
111 | { | |
112 | if (tx_enabled(port)) { | |
113 | disable_irq(KS8695_IRQ_UART_TX); | |
457cd4f5 | 114 | tx_enable(port, 0); |
2c7ee6ab AV |
115 | } |
116 | } | |
117 | ||
118 | static void ks8695uart_start_tx(struct uart_port *port) | |
119 | { | |
120 | if (!tx_enabled(port)) { | |
121 | enable_irq(KS8695_IRQ_UART_TX); | |
457cd4f5 | 122 | tx_enable(port, 1); |
2c7ee6ab AV |
123 | } |
124 | } | |
125 | ||
126 | static void ks8695uart_stop_rx(struct uart_port *port) | |
127 | { | |
128 | if (rx_enabled(port)) { | |
129 | disable_irq(KS8695_IRQ_UART_RX); | |
457cd4f5 | 130 | rx_enable(port, 0); |
2c7ee6ab AV |
131 | } |
132 | } | |
133 | ||
134 | static void ks8695uart_enable_ms(struct uart_port *port) | |
135 | { | |
457cd4f5 DH |
136 | if (!ms_enabled(port)) { |
137 | enable_irq(KS8695_IRQ_UART_MODEM_STATUS); | |
138 | ms_enable(port,1); | |
139 | } | |
2c7ee6ab AV |
140 | } |
141 | ||
142 | static void ks8695uart_disable_ms(struct uart_port *port) | |
143 | { | |
457cd4f5 DH |
144 | if (ms_enabled(port)) { |
145 | disable_irq(KS8695_IRQ_UART_MODEM_STATUS); | |
146 | ms_enable(port,0); | |
147 | } | |
2c7ee6ab AV |
148 | } |
149 | ||
150 | static irqreturn_t ks8695uart_rx_chars(int irq, void *dev_id) | |
151 | { | |
152 | struct uart_port *port = dev_id; | |
a88487c7 | 153 | struct tty_struct *tty = port->info->port.tty; |
2c7ee6ab AV |
154 | unsigned int status, ch, lsr, flg, max_count = 256; |
155 | ||
156 | status = UART_GET_LSR(port); /* clears pending LSR interrupts */ | |
157 | while ((status & URLS_URDR) && max_count--) { | |
158 | ch = UART_GET_CHAR(port); | |
159 | flg = TTY_NORMAL; | |
160 | ||
161 | port->icount.rx++; | |
162 | ||
163 | /* | |
164 | * Note that the error handling code is | |
165 | * out of the main execution path | |
166 | */ | |
167 | lsr = UART_GET_LSR(port) | UART_DUMMY_LSR_RX; | |
168 | if (unlikely(lsr & (URLS_URBI | URLS_URPE | URLS_URFE | URLS_URROE))) { | |
169 | if (lsr & URLS_URBI) { | |
170 | lsr &= ~(URLS_URFE | URLS_URPE); | |
171 | port->icount.brk++; | |
172 | if (uart_handle_break(port)) | |
173 | goto ignore_char; | |
174 | } | |
175 | if (lsr & URLS_URPE) | |
176 | port->icount.parity++; | |
177 | if (lsr & URLS_URFE) | |
178 | port->icount.frame++; | |
179 | if (lsr & URLS_URROE) | |
180 | port->icount.overrun++; | |
181 | ||
182 | lsr &= port->read_status_mask; | |
183 | ||
184 | if (lsr & URLS_URBI) | |
185 | flg = TTY_BREAK; | |
186 | else if (lsr & URLS_URPE) | |
187 | flg = TTY_PARITY; | |
188 | else if (lsr & URLS_URFE) | |
189 | flg = TTY_FRAME; | |
190 | } | |
191 | ||
192 | if (uart_handle_sysrq_char(port, ch)) | |
193 | goto ignore_char; | |
194 | ||
195 | uart_insert_char(port, lsr, URLS_URROE, ch, flg); | |
196 | ||
197 | ignore_char: | |
198 | status = UART_GET_LSR(port); | |
199 | } | |
200 | tty_flip_buffer_push(tty); | |
201 | ||
202 | return IRQ_HANDLED; | |
203 | } | |
204 | ||
205 | ||
206 | static irqreturn_t ks8695uart_tx_chars(int irq, void *dev_id) | |
207 | { | |
208 | struct uart_port *port = dev_id; | |
209 | struct circ_buf *xmit = &port->info->xmit; | |
210 | unsigned int count; | |
211 | ||
212 | if (port->x_char) { | |
213 | KS8695_CLR_TX_INT(); | |
214 | UART_PUT_CHAR(port, port->x_char); | |
215 | port->icount.tx++; | |
216 | port->x_char = 0; | |
217 | return IRQ_HANDLED; | |
218 | } | |
219 | ||
220 | if (uart_tx_stopped(port) || uart_circ_empty(xmit)) { | |
221 | ks8695uart_stop_tx(port); | |
222 | return IRQ_HANDLED; | |
223 | } | |
224 | ||
225 | count = 16; /* fifo size */ | |
226 | while (!uart_circ_empty(xmit) && (count-- > 0)) { | |
227 | KS8695_CLR_TX_INT(); | |
228 | UART_PUT_CHAR(port, xmit->buf[xmit->tail]); | |
229 | ||
230 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
231 | port->icount.tx++; | |
232 | } | |
233 | ||
234 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
235 | uart_write_wakeup(port); | |
236 | ||
237 | if (uart_circ_empty(xmit)) | |
238 | ks8695uart_stop_tx(port); | |
239 | ||
240 | return IRQ_HANDLED; | |
241 | } | |
242 | ||
243 | static irqreturn_t ks8695uart_modem_status(int irq, void *dev_id) | |
244 | { | |
245 | struct uart_port *port = dev_id; | |
246 | unsigned int status; | |
247 | ||
248 | /* | |
249 | * clear modem interrupt by reading MSR | |
250 | */ | |
251 | status = UART_GET_MSR(port); | |
252 | ||
253 | if (status & URMS_URDDCD) | |
254 | uart_handle_dcd_change(port, status & URMS_URDDCD); | |
255 | ||
256 | if (status & URMS_URDDST) | |
257 | port->icount.dsr++; | |
258 | ||
259 | if (status & URMS_URDCTS) | |
260 | uart_handle_cts_change(port, status & URMS_URDCTS); | |
261 | ||
262 | if (status & URMS_URTERI) | |
263 | port->icount.rng++; | |
264 | ||
265 | wake_up_interruptible(&port->info->delta_msr_wait); | |
266 | ||
267 | return IRQ_HANDLED; | |
268 | } | |
269 | ||
270 | static unsigned int ks8695uart_tx_empty(struct uart_port *port) | |
271 | { | |
272 | return (UART_GET_LSR(port) & URLS_URTE) ? TIOCSER_TEMT : 0; | |
273 | } | |
274 | ||
275 | static unsigned int ks8695uart_get_mctrl(struct uart_port *port) | |
276 | { | |
277 | unsigned int result = 0; | |
278 | unsigned int status; | |
279 | ||
280 | status = UART_GET_MSR(port); | |
281 | if (status & URMS_URDCD) | |
282 | result |= TIOCM_CAR; | |
283 | if (status & URMS_URDSR) | |
284 | result |= TIOCM_DSR; | |
285 | if (status & URMS_URCTS) | |
286 | result |= TIOCM_CTS; | |
287 | if (status & URMS_URRI) | |
288 | result |= TIOCM_RI; | |
289 | ||
290 | return result; | |
291 | } | |
292 | ||
293 | static void ks8695uart_set_mctrl(struct uart_port *port, u_int mctrl) | |
294 | { | |
295 | unsigned int mcr; | |
296 | ||
297 | mcr = UART_GET_MCR(port); | |
298 | if (mctrl & TIOCM_RTS) | |
299 | mcr |= URMC_URRTS; | |
300 | else | |
301 | mcr &= ~URMC_URRTS; | |
302 | ||
303 | if (mctrl & TIOCM_DTR) | |
304 | mcr |= URMC_URDTR; | |
305 | else | |
306 | mcr &= ~URMC_URDTR; | |
307 | ||
308 | UART_PUT_MCR(port, mcr); | |
309 | } | |
310 | ||
311 | static void ks8695uart_break_ctl(struct uart_port *port, int break_state) | |
312 | { | |
313 | unsigned int lcr; | |
314 | ||
315 | lcr = UART_GET_LCR(port); | |
316 | ||
317 | if (break_state == -1) | |
318 | lcr |= URLC_URSBC; | |
319 | else | |
320 | lcr &= ~URLC_URSBC; | |
321 | ||
322 | UART_PUT_LCR(port, lcr); | |
323 | } | |
324 | ||
325 | static int ks8695uart_startup(struct uart_port *port) | |
326 | { | |
327 | int retval; | |
328 | ||
329 | set_irq_flags(KS8695_IRQ_UART_TX, IRQF_VALID | IRQF_NOAUTOEN); | |
457cd4f5 DH |
330 | tx_enable(port, 0); |
331 | rx_enable(port, 1); | |
332 | ms_enable(port, 1); | |
2c7ee6ab AV |
333 | |
334 | /* | |
335 | * Allocate the IRQ | |
336 | */ | |
337 | retval = request_irq(KS8695_IRQ_UART_TX, ks8695uart_tx_chars, IRQF_DISABLED, "UART TX", port); | |
338 | if (retval) | |
339 | goto err_tx; | |
340 | ||
341 | retval = request_irq(KS8695_IRQ_UART_RX, ks8695uart_rx_chars, IRQF_DISABLED, "UART RX", port); | |
342 | if (retval) | |
343 | goto err_rx; | |
344 | ||
345 | retval = request_irq(KS8695_IRQ_UART_LINE_STATUS, ks8695uart_rx_chars, IRQF_DISABLED, "UART LineStatus", port); | |
346 | if (retval) | |
e45c7a43 | 347 | goto err_ls; |
2c7ee6ab AV |
348 | |
349 | retval = request_irq(KS8695_IRQ_UART_MODEM_STATUS, ks8695uart_modem_status, IRQF_DISABLED, "UART ModemStatus", port); | |
350 | if (retval) | |
e45c7a43 | 351 | goto err_ms; |
2c7ee6ab AV |
352 | |
353 | return 0; | |
354 | ||
355 | err_ms: | |
356 | free_irq(KS8695_IRQ_UART_LINE_STATUS, port); | |
357 | err_ls: | |
358 | free_irq(KS8695_IRQ_UART_RX, port); | |
359 | err_rx: | |
360 | free_irq(KS8695_IRQ_UART_TX, port); | |
361 | err_tx: | |
362 | return retval; | |
363 | } | |
364 | ||
365 | static void ks8695uart_shutdown(struct uart_port *port) | |
366 | { | |
367 | /* | |
368 | * Free the interrupt | |
369 | */ | |
370 | free_irq(KS8695_IRQ_UART_RX, port); | |
371 | free_irq(KS8695_IRQ_UART_TX, port); | |
372 | free_irq(KS8695_IRQ_UART_MODEM_STATUS, port); | |
373 | free_irq(KS8695_IRQ_UART_LINE_STATUS, port); | |
374 | ||
375 | /* disable break condition and fifos */ | |
376 | UART_PUT_LCR(port, UART_GET_LCR(port) & ~URLC_URSBC); | |
377 | UART_PUT_FCR(port, UART_GET_FCR(port) & ~URFC_URFE); | |
378 | } | |
379 | ||
380 | static void ks8695uart_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) | |
381 | { | |
382 | unsigned int lcr, fcr = 0; | |
383 | unsigned long flags; | |
384 | unsigned int baud, quot; | |
385 | ||
386 | /* | |
387 | * Ask the core to calculate the divisor for us. | |
388 | */ | |
389 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | |
390 | quot = uart_get_divisor(port, baud); | |
391 | ||
392 | switch (termios->c_cflag & CSIZE) { | |
393 | case CS5: | |
394 | lcr = URCL_5; | |
395 | break; | |
396 | case CS6: | |
397 | lcr = URCL_6; | |
398 | break; | |
399 | case CS7: | |
400 | lcr = URCL_7; | |
401 | break; | |
402 | default: | |
403 | lcr = URCL_8; | |
404 | break; | |
405 | } | |
406 | ||
407 | /* stop bits */ | |
408 | if (termios->c_cflag & CSTOPB) | |
409 | lcr |= URLC_URSB; | |
410 | ||
411 | /* parity */ | |
412 | if (termios->c_cflag & PARENB) { | |
413 | if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */ | |
414 | if (termios->c_cflag & PARODD) | |
415 | lcr |= URPE_MARK; | |
416 | else | |
417 | lcr |= URPE_SPACE; | |
418 | } | |
419 | else if (termios->c_cflag & PARODD) | |
420 | lcr |= URPE_ODD; | |
421 | else | |
422 | lcr |= URPE_EVEN; | |
423 | } | |
424 | ||
425 | if (port->fifosize > 1) | |
426 | fcr = URFC_URFRT_8 | URFC_URTFR | URFC_URRFR | URFC_URFE; | |
427 | ||
428 | spin_lock_irqsave(&port->lock, flags); | |
429 | ||
430 | /* | |
431 | * Update the per-port timeout. | |
432 | */ | |
433 | uart_update_timeout(port, termios->c_cflag, baud); | |
434 | ||
435 | port->read_status_mask = URLS_URROE; | |
436 | if (termios->c_iflag & INPCK) | |
437 | port->read_status_mask |= (URLS_URFE | URLS_URPE); | |
438 | if (termios->c_iflag & (BRKINT | PARMRK)) | |
439 | port->read_status_mask |= URLS_URBI; | |
440 | ||
441 | /* | |
442 | * Characters to ignore | |
443 | */ | |
444 | port->ignore_status_mask = 0; | |
445 | if (termios->c_iflag & IGNPAR) | |
446 | port->ignore_status_mask |= (URLS_URFE | URLS_URPE); | |
447 | if (termios->c_iflag & IGNBRK) { | |
448 | port->ignore_status_mask |= URLS_URBI; | |
449 | /* | |
450 | * If we're ignoring parity and break indicators, | |
451 | * ignore overruns too (for real raw support). | |
452 | */ | |
453 | if (termios->c_iflag & IGNPAR) | |
454 | port->ignore_status_mask |= URLS_URROE; | |
455 | } | |
456 | ||
457 | /* | |
458 | * Ignore all characters if CREAD is not set. | |
459 | */ | |
460 | if ((termios->c_cflag & CREAD) == 0) | |
461 | port->ignore_status_mask |= UART_DUMMY_LSR_RX; | |
462 | ||
463 | /* first, disable everything */ | |
464 | if (UART_ENABLE_MS(port, termios->c_cflag)) | |
465 | ks8695uart_enable_ms(port); | |
466 | else | |
467 | ks8695uart_disable_ms(port); | |
468 | ||
469 | /* Set baud rate */ | |
470 | UART_PUT_BRDR(port, quot); | |
471 | ||
472 | UART_PUT_LCR(port, lcr); | |
473 | UART_PUT_FCR(port, fcr); | |
474 | ||
475 | spin_unlock_irqrestore(&port->lock, flags); | |
476 | } | |
477 | ||
478 | static const char *ks8695uart_type(struct uart_port *port) | |
479 | { | |
480 | return port->type == PORT_KS8695 ? "KS8695" : NULL; | |
481 | } | |
482 | ||
483 | /* | |
484 | * Release the memory region(s) being used by 'port' | |
485 | */ | |
486 | static void ks8695uart_release_port(struct uart_port *port) | |
487 | { | |
488 | release_mem_region(port->mapbase, UART_PORT_SIZE); | |
489 | } | |
490 | ||
491 | /* | |
492 | * Request the memory region(s) being used by 'port' | |
493 | */ | |
494 | static int ks8695uart_request_port(struct uart_port *port) | |
495 | { | |
496 | return request_mem_region(port->mapbase, UART_PORT_SIZE, | |
497 | "serial_ks8695") != NULL ? 0 : -EBUSY; | |
498 | } | |
499 | ||
500 | /* | |
501 | * Configure/autoconfigure the port. | |
502 | */ | |
503 | static void ks8695uart_config_port(struct uart_port *port, int flags) | |
504 | { | |
505 | if (flags & UART_CONFIG_TYPE) { | |
506 | port->type = PORT_KS8695; | |
507 | ks8695uart_request_port(port); | |
508 | } | |
509 | } | |
510 | ||
511 | /* | |
512 | * verify the new serial_struct (for TIOCSSERIAL). | |
513 | */ | |
514 | static int ks8695uart_verify_port(struct uart_port *port, struct serial_struct *ser) | |
515 | { | |
516 | int ret = 0; | |
517 | ||
518 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_KS8695) | |
519 | ret = -EINVAL; | |
520 | if (ser->irq != port->irq) | |
521 | ret = -EINVAL; | |
522 | if (ser->baud_base < 9600) | |
523 | ret = -EINVAL; | |
524 | return ret; | |
525 | } | |
526 | ||
527 | static struct uart_ops ks8695uart_pops = { | |
528 | .tx_empty = ks8695uart_tx_empty, | |
529 | .set_mctrl = ks8695uart_set_mctrl, | |
530 | .get_mctrl = ks8695uart_get_mctrl, | |
531 | .stop_tx = ks8695uart_stop_tx, | |
532 | .start_tx = ks8695uart_start_tx, | |
533 | .stop_rx = ks8695uart_stop_rx, | |
534 | .enable_ms = ks8695uart_enable_ms, | |
535 | .break_ctl = ks8695uart_break_ctl, | |
536 | .startup = ks8695uart_startup, | |
537 | .shutdown = ks8695uart_shutdown, | |
538 | .set_termios = ks8695uart_set_termios, | |
539 | .type = ks8695uart_type, | |
540 | .release_port = ks8695uart_release_port, | |
541 | .request_port = ks8695uart_request_port, | |
542 | .config_port = ks8695uart_config_port, | |
543 | .verify_port = ks8695uart_verify_port, | |
544 | }; | |
545 | ||
546 | static struct uart_port ks8695uart_ports[SERIAL_KS8695_NR] = { | |
547 | { | |
548 | .membase = (void *) KS8695_UART_VA, | |
549 | .mapbase = KS8695_UART_VA, | |
550 | .iotype = SERIAL_IO_MEM, | |
551 | .irq = KS8695_IRQ_UART_TX, | |
552 | .uartclk = CLOCK_TICK_RATE * 16, | |
553 | .fifosize = 16, | |
554 | .ops = &ks8695uart_pops, | |
555 | .flags = ASYNC_BOOT_AUTOCONF, | |
556 | .line = 0, | |
557 | } | |
558 | }; | |
559 | ||
560 | #ifdef CONFIG_SERIAL_KS8695_CONSOLE | |
561 | static void ks8695_console_putchar(struct uart_port *port, int ch) | |
562 | { | |
563 | while (!(UART_GET_LSR(port) & URLS_URTHRE)) | |
564 | barrier(); | |
565 | ||
566 | UART_PUT_CHAR(port, ch); | |
567 | } | |
568 | ||
569 | static void ks8695_console_write(struct console *co, const char *s, u_int count) | |
570 | { | |
571 | struct uart_port *port = ks8695uart_ports + co->index; | |
572 | ||
573 | uart_console_write(port, s, count, ks8695_console_putchar); | |
574 | } | |
575 | ||
576 | static void __init ks8695_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits) | |
577 | { | |
578 | unsigned int lcr; | |
579 | ||
580 | lcr = UART_GET_LCR(port); | |
581 | ||
582 | switch (lcr & URLC_PARITY) { | |
583 | case URPE_ODD: | |
584 | *parity = 'o'; | |
585 | break; | |
586 | case URPE_EVEN: | |
587 | *parity = 'e'; | |
588 | break; | |
589 | default: | |
590 | *parity = 'n'; | |
591 | } | |
592 | ||
593 | switch (lcr & URLC_URCL) { | |
594 | case URCL_5: | |
595 | *bits = 5; | |
596 | break; | |
597 | case URCL_6: | |
598 | *bits = 6; | |
599 | break; | |
600 | case URCL_7: | |
601 | *bits = 7; | |
602 | break; | |
603 | default: | |
604 | *bits = 8; | |
605 | } | |
606 | ||
607 | *baud = port->uartclk / (UART_GET_BRDR(port) & 0x0FFF); | |
608 | *baud /= 16; | |
609 | *baud &= 0xFFFFFFF0; | |
610 | } | |
611 | ||
612 | static int __init ks8695_console_setup(struct console *co, char *options) | |
613 | { | |
614 | struct uart_port *port; | |
615 | int baud = 115200; | |
616 | int bits = 8; | |
617 | int parity = 'n'; | |
618 | int flow = 'n'; | |
619 | ||
620 | /* | |
621 | * Check whether an invalid uart number has been specified, and | |
622 | * if so, search for the first available port that does have | |
623 | * console support. | |
624 | */ | |
625 | port = uart_get_console(ks8695uart_ports, SERIAL_KS8695_NR, co); | |
626 | ||
627 | if (options) | |
628 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
629 | else | |
630 | ks8695_console_get_options(port, &baud, &parity, &bits); | |
631 | ||
632 | return uart_set_options(port, co, baud, parity, bits, flow); | |
633 | } | |
634 | ||
486cab2b | 635 | static struct uart_driver ks8695_reg; |
2c7ee6ab AV |
636 | |
637 | static struct console ks8695_console = { | |
638 | .name = SERIAL_KS8695_DEVNAME, | |
639 | .write = ks8695_console_write, | |
640 | .device = uart_console_device, | |
641 | .setup = ks8695_console_setup, | |
642 | .flags = CON_PRINTBUFFER, | |
643 | .index = -1, | |
644 | .data = &ks8695_reg, | |
645 | }; | |
646 | ||
647 | static int __init ks8695_console_init(void) | |
648 | { | |
649 | register_console(&ks8695_console); | |
650 | return 0; | |
651 | } | |
652 | ||
653 | console_initcall(ks8695_console_init); | |
654 | ||
655 | #define KS8695_CONSOLE &ks8695_console | |
656 | #else | |
657 | #define KS8695_CONSOLE NULL | |
658 | #endif | |
659 | ||
660 | static struct uart_driver ks8695_reg = { | |
661 | .owner = THIS_MODULE, | |
662 | .driver_name = "serial_ks8695", | |
663 | .dev_name = SERIAL_KS8695_DEVNAME, | |
664 | .major = SERIAL_KS8695_MAJOR, | |
665 | .minor = SERIAL_KS8695_MINOR, | |
666 | .nr = SERIAL_KS8695_NR, | |
667 | .cons = KS8695_CONSOLE, | |
668 | }; | |
669 | ||
670 | static int __init ks8695uart_init(void) | |
671 | { | |
672 | int i, ret; | |
673 | ||
674 | printk(KERN_INFO "Serial: Micrel KS8695 UART driver\n"); | |
675 | ||
676 | ret = uart_register_driver(&ks8695_reg); | |
677 | if (ret) | |
678 | return ret; | |
679 | ||
680 | for (i = 0; i < SERIAL_KS8695_NR; i++) | |
681 | uart_add_one_port(&ks8695_reg, &ks8695uart_ports[0]); | |
682 | ||
683 | return 0; | |
684 | } | |
685 | ||
686 | static void __exit ks8695uart_exit(void) | |
687 | { | |
688 | int i; | |
689 | ||
690 | for (i = 0; i < SERIAL_KS8695_NR; i++) | |
691 | uart_remove_one_port(&ks8695_reg, &ks8695uart_ports[0]); | |
692 | uart_unregister_driver(&ks8695_reg); | |
693 | } | |
694 | ||
695 | module_init(ks8695uart_init); | |
696 | module_exit(ks8695uart_exit); | |
697 | ||
698 | MODULE_DESCRIPTION("KS8695 serial port driver"); | |
699 | MODULE_AUTHOR("Micrel Inc."); | |
700 | MODULE_LICENSE("GPL"); |