projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] TTY layer buffering revamp
[deliverable/linux.git] / drivers / serial / serial_txx9.c
CommitLineData
1da177e4
LT		 1/*
2 * drivers/serial/serial_txx9.c
3 *
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
7 *
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
18 *
19 * Revision History:
20 * 0.30 Initial revision. (Renamed from serial_txx927.c)
21 * 0.31 Use save_flags instead of local_irq_save.
22 * 0.32 Support SCLK.
23 * 0.33 Switch TXX9_TTY_NAME by CONFIG_SERIAL_TXX9_STDSERIAL.
24 * Support TIOCSERGETLSR.
25 * 0.34 Support slow baudrate.
26 * 0.40 Merge codes from mainstream kernel (2.4.22).
27 * 0.41 Fix console checking in rs_shutdown_port().
28 * Disable flow-control in serial_console_write().
29 * 0.42 Fix minor compiler warning.
30 * 1.00 Kernel 2.6. Converted to new serial core (based on 8250.c).
31 * 1.01 Set fifosize to make tx_empry called properly.
32 * Use standard uart_get_divisor.
33 * 1.02 Cleanup. (import 8250.c changes)
f5ee56cc
RB		 34 * 1.03 Fix low-latency mode. (import 8250.c changes)
35 * 1.04 Remove usage of deprecated functions, cleanup.
1da177e4
LT		 36 */
37#include <linux/config.h>
38
39#if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
40#define SUPPORT_SYSRQ
41#endif
42
43#include <linux/module.h>
44#include <linux/ioport.h>
45#include <linux/init.h>
46#include <linux/console.h>
47#include <linux/sysrq.h>
48#include <linux/delay.h>
49#include <linux/device.h>
50#include <linux/pci.h>
51#include <linux/tty.h>
52#include <linux/tty_flip.h>
53#include <linux/serial_core.h>
54#include <linux/serial.h>
55
56#include <asm/io.h>
57#include <asm/irq.h>
58
f5ee56cc 59static char *serial_version = "1.04";
1da177e4
LT		 60static char *serial_name = "TX39/49 Serial driver";
61
62#define PASS_LIMIT 256
63
64#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
65/* "ttyS" is used for standard serial driver */
66#define TXX9_TTY_NAME "ttyTX"
67#define TXX9_TTY_DEVFS_NAME "tttx/"
68#define TXX9_TTY_MINOR_START (64 + 64) /* ttyTX0(128), ttyTX1(129) */
69#else
70/* acts like standard serial driver */
71#define TXX9_TTY_NAME "ttyS"
72#define TXX9_TTY_DEVFS_NAME "tts/"
73#define TXX9_TTY_MINOR_START 64
74#endif
75#define TXX9_TTY_MAJOR TTY_MAJOR
76
77/* flag aliases */
78#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
79#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
80
81#ifdef CONFIG_PCI
82/* support for Toshiba TC86C001 SIO */
83#define ENABLE_SERIAL_TXX9_PCI
84#endif
85
86/*
87 * Number of serial ports
88 */
89#ifdef ENABLE_SERIAL_TXX9_PCI
90#define NR_PCI_BOARDS 4
f5ee56cc 91#define UART_NR (4 + NR_PCI_BOARDS)
1da177e4 92#else
f5ee56cc 93#define UART_NR 4
1da177e4
LT		 94#endif
95
96struct uart_txx9_port {
97 struct uart_port port;
98
99 /*
100 * We provide a per-port pm hook.
101 */
102 void (*pm)(struct uart_port *port,
103 unsigned int state, unsigned int old);
104};
105
106#define TXX9_REGION_SIZE 0x24
107
108/* TXX9 Serial Registers */
109#define TXX9_SILCR 0x00
110#define TXX9_SIDICR 0x04
111#define TXX9_SIDISR 0x08
112#define TXX9_SICISR 0x0c
113#define TXX9_SIFCR 0x10
114#define TXX9_SIFLCR 0x14
115#define TXX9_SIBGR 0x18
116#define TXX9_SITFIFO 0x1c
117#define TXX9_SIRFIFO 0x20
118
119/* SILCR : Line Control */
120#define TXX9_SILCR_SCS_MASK 0x00000060
121#define TXX9_SILCR_SCS_IMCLK 0x00000000
122#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
123#define TXX9_SILCR_SCS_SCLK 0x00000040
124#define TXX9_SILCR_SCS_SCLK_BG 0x00000060
125#define TXX9_SILCR_UEPS 0x00000010
126#define TXX9_SILCR_UPEN 0x00000008
127#define TXX9_SILCR_USBL_MASK 0x00000004
128#define TXX9_SILCR_USBL_1BIT 0x00000000
129#define TXX9_SILCR_USBL_2BIT 0x00000004
130#define TXX9_SILCR_UMODE_MASK 0x00000003
131#define TXX9_SILCR_UMODE_8BIT 0x00000000
132#define TXX9_SILCR_UMODE_7BIT 0x00000001
133
134/* SIDICR : DMA/Int. Control */
135#define TXX9_SIDICR_TDE 0x00008000
136#define TXX9_SIDICR_RDE 0x00004000
137#define TXX9_SIDICR_TIE 0x00002000
138#define TXX9_SIDICR_RIE 0x00001000
139#define TXX9_SIDICR_SPIE 0x00000800
140#define TXX9_SIDICR_CTSAC 0x00000600
141#define TXX9_SIDICR_STIE_MASK 0x0000003f
142#define TXX9_SIDICR_STIE_OERS 0x00000020
143#define TXX9_SIDICR_STIE_CTSS 0x00000010
144#define TXX9_SIDICR_STIE_RBRKD 0x00000008
145#define TXX9_SIDICR_STIE_TRDY 0x00000004
146#define TXX9_SIDICR_STIE_TXALS 0x00000002
147#define TXX9_SIDICR_STIE_UBRKD 0x00000001
148
149/* SIDISR : DMA/Int. Status */
150#define TXX9_SIDISR_UBRK 0x00008000
151#define TXX9_SIDISR_UVALID 0x00004000
152#define TXX9_SIDISR_UFER 0x00002000
153#define TXX9_SIDISR_UPER 0x00001000
154#define TXX9_SIDISR_UOER 0x00000800
155#define TXX9_SIDISR_ERI 0x00000400
156#define TXX9_SIDISR_TOUT 0x00000200
157#define TXX9_SIDISR_TDIS 0x00000100
158#define TXX9_SIDISR_RDIS 0x00000080
159#define TXX9_SIDISR_STIS 0x00000040
160#define TXX9_SIDISR_RFDN_MASK 0x0000001f
161
162/* SICISR : Change Int. Status */
163#define TXX9_SICISR_OERS 0x00000020
164#define TXX9_SICISR_CTSS 0x00000010
165#define TXX9_SICISR_RBRKD 0x00000008
166#define TXX9_SICISR_TRDY 0x00000004
167#define TXX9_SICISR_TXALS 0x00000002
168#define TXX9_SICISR_UBRKD 0x00000001
169
170/* SIFCR : FIFO Control */
171#define TXX9_SIFCR_SWRST 0x00008000
172#define TXX9_SIFCR_RDIL_MASK 0x00000180
173#define TXX9_SIFCR_RDIL_1 0x00000000
174#define TXX9_SIFCR_RDIL_4 0x00000080
175#define TXX9_SIFCR_RDIL_8 0x00000100
176#define TXX9_SIFCR_RDIL_12 0x00000180
177#define TXX9_SIFCR_RDIL_MAX 0x00000180
178#define TXX9_SIFCR_TDIL_MASK 0x00000018
179#define TXX9_SIFCR_TDIL_MASK 0x00000018
180#define TXX9_SIFCR_TDIL_1 0x00000000
181#define TXX9_SIFCR_TDIL_4 0x00000001
182#define TXX9_SIFCR_TDIL_8 0x00000010
183#define TXX9_SIFCR_TDIL_MAX 0x00000010
184#define TXX9_SIFCR_TFRST 0x00000004
185#define TXX9_SIFCR_RFRST 0x00000002
186#define TXX9_SIFCR_FRSTE 0x00000001
187#define TXX9_SIO_TX_FIFO 8
188#define TXX9_SIO_RX_FIFO 16
189
190/* SIFLCR : Flow Control */
191#define TXX9_SIFLCR_RCS 0x00001000
192#define TXX9_SIFLCR_TES 0x00000800
193#define TXX9_SIFLCR_RTSSC 0x00000200
194#define TXX9_SIFLCR_RSDE 0x00000100
195#define TXX9_SIFLCR_TSDE 0x00000080
196#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
197#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
198#define TXX9_SIFLCR_TBRK 0x00000001
199
200/* SIBGR : Baudrate Control */
201#define TXX9_SIBGR_BCLK_MASK 0x00000300
202#define TXX9_SIBGR_BCLK_T0 0x00000000
203#define TXX9_SIBGR_BCLK_T2 0x00000100
204#define TXX9_SIBGR_BCLK_T4 0x00000200
205#define TXX9_SIBGR_BCLK_T6 0x00000300
206#define TXX9_SIBGR_BRD_MASK 0x000000ff
207
208static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
209{
210 switch (up->port.iotype) {
211 default:
212 return *(volatile u32 *)(up->port.membase + offset);
213 case UPIO_PORT:
214 return inl(up->port.iobase + offset);
215 }
216}
217
218static inline void
219sio_out(struct uart_txx9_port *up, int offset, int value)
220{
221 switch (up->port.iotype) {
222 default:
223 *(volatile u32 *)(up->port.membase + offset) = value;
224 break;
225 case UPIO_PORT:
226 outl(value, up->port.iobase + offset);
227 break;
228 }
229}
230
231static inline void
232sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
233{
234 sio_out(up, offset, sio_in(up, offset) & ~value);
235}
236static inline void
237sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
238{
239 sio_out(up, offset, sio_in(up, offset) | value);
240}
241
242static inline void
243sio_quot_set(struct uart_txx9_port *up, int quot)
244{
245 quot >>= 1;
246 if (quot < 256)
247 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
248 else if (quot < (256 << 2))
249 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
250 else if (quot < (256 << 4))
251 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
252 else if (quot < (256 << 6))
253 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
254 else
255 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
256}
257
b129a8cc 258static void serial_txx9_stop_tx(struct uart_port *port)
1da177e4
LT		 259{
260 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
261 unsigned long flags;
262
263 spin_lock_irqsave(&up->port.lock, flags);
264 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
265 spin_unlock_irqrestore(&up->port.lock, flags);
266}
267
b129a8cc 268static void serial_txx9_start_tx(struct uart_port *port)
1da177e4
LT		 269{
270 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
271 unsigned long flags;
272
273 spin_lock_irqsave(&up->port.lock, flags);
274 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
275 spin_unlock_irqrestore(&up->port.lock, flags);
276}
277
278static void serial_txx9_stop_rx(struct uart_port *port)
279{
280 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
281 unsigned long flags;
282
283 spin_lock_irqsave(&up->port.lock, flags);
284 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
285#if 0
286 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
287#endif
288 spin_unlock_irqrestore(&up->port.lock, flags);
289}
290
291static void serial_txx9_enable_ms(struct uart_port *port)
292{
293 /* TXX9-SIO can not control DTR... */
294}
295
296static inline void
297receive_chars(struct uart_txx9_port *up, unsigned int *status, struct pt_regs *regs)
298{
299 struct tty_struct *tty = up->port.info->tty;
300 unsigned char ch;
301 unsigned int disr = *status;
302 int max_count = 256;
303 char flag;
304
305 do {
1da177e4
LT		 306 ch = sio_in(up, TXX9_SIRFIFO);
307 flag = TTY_NORMAL;
308 up->port.icount.rx++;
309
310 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
311 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
312 /*
313 * For statistics only
314 */
315 if (disr & TXX9_SIDISR_UBRK) {
316 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
317 up->port.icount.brk++;
318 /*
319 * We do the SysRQ and SAK checking
320 * here because otherwise the break
321 * may get masked by ignore_status_mask
322 * or read_status_mask.
323 */
324 if (uart_handle_break(&up->port))
325 goto ignore_char;
326 } else if (disr & TXX9_SIDISR_UPER)
327 up->port.icount.parity++;
328 else if (disr & TXX9_SIDISR_UFER)
329 up->port.icount.frame++;
330 if (disr & TXX9_SIDISR_UOER)
331 up->port.icount.overrun++;
332
333 /*
334 * Mask off conditions which should be ingored.
335 */
336 disr &= up->port.read_status_mask;
337
338 if (disr & TXX9_SIDISR_UBRK) {
339 flag = TTY_BREAK;
340 } else if (disr & TXX9_SIDISR_UPER)
341 flag = TTY_PARITY;
342 else if (disr & TXX9_SIDISR_UFER)
343 flag = TTY_FRAME;
344 }
345 if (uart_handle_sysrq_char(&up->port, ch, regs))
346 goto ignore_char;
05ab3014
RK		 347
348 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
349
1da177e4
LT		 350 ignore_char:
351 disr = sio_in(up, TXX9_SIDISR);
352 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
f5ee56cc 353 spin_unlock(&up->port.lock);
1da177e4 354 tty_flip_buffer_push(tty);
f5ee56cc 355 spin_lock(&up->port.lock);
1da177e4
LT		 356 *status = disr;
357}
358
359static inline void transmit_chars(struct uart_txx9_port *up)
360{
361 struct circ_buf *xmit = &up->port.info->xmit;
362 int count;
363
364 if (up->port.x_char) {
365 sio_out(up, TXX9_SITFIFO, up->port.x_char);
366 up->port.icount.tx++;
367 up->port.x_char = 0;
368 return;
369 }
370 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
b129a8cc 371 serial_txx9_stop_tx(&up->port);
1da177e4
LT		 372 return;
373 }
374
375 count = TXX9_SIO_TX_FIFO;
376 do {
377 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
378 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
379 up->port.icount.tx++;
380 if (uart_circ_empty(xmit))
381 break;
382 } while (--count > 0);
383
384 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
385 uart_write_wakeup(&up->port);
386
387 if (uart_circ_empty(xmit))
b129a8cc 388 serial_txx9_stop_tx(&up->port);
1da177e4
LT		 389}
390
391static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id, struct pt_regs *regs)
392{
393 int pass_counter = 0;
394 struct uart_txx9_port *up = dev_id;
395 unsigned int status;
396
397 while (1) {
398 spin_lock(&up->port.lock);
399 status = sio_in(up, TXX9_SIDISR);
400 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
401 status &= ~TXX9_SIDISR_TDIS;
402 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
403 TXX9_SIDISR_TOUT))) {
404 spin_unlock(&up->port.lock);
405 break;
406 }
407
408 if (status & TXX9_SIDISR_RDIS)
409 receive_chars(up, &status, regs);
410 if (status & TXX9_SIDISR_TDIS)
411 transmit_chars(up);
412 /* Clear TX/RX Int. Status */
413 sio_mask(up, TXX9_SIDISR,
414 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
415 TXX9_SIDISR_TOUT);
416 spin_unlock(&up->port.lock);
417
418 if (pass_counter++ > PASS_LIMIT)
419 break;
420 }
421
422 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
423}
424
425static unsigned int serial_txx9_tx_empty(struct uart_port *port)
426{
427 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
428 unsigned long flags;
429 unsigned int ret;
430
431 spin_lock_irqsave(&up->port.lock, flags);
432 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
433 spin_unlock_irqrestore(&up->port.lock, flags);
434
435 return ret;
436}
437
438static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
439{
440 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
1da177e4
LT		 441 unsigned int ret;
442
1da177e4
LT		 443 ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS)
444 | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS);
1da177e4
LT		 445
446 return ret;
447}
448
449static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
450{
451 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
452 unsigned long flags;
453
454 spin_lock_irqsave(&up->port.lock, flags);
455 if (mctrl & TIOCM_RTS)
456 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
457 else
458 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
459 spin_unlock_irqrestore(&up->port.lock, flags);
460}
461
462static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
463{
464 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
465 unsigned long flags;
466
467 spin_lock_irqsave(&up->port.lock, flags);
468 if (break_state == -1)
469 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
470 else
471 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
472 spin_unlock_irqrestore(&up->port.lock, flags);
473}
474
475static int serial_txx9_startup(struct uart_port *port)
476{
477 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
478 unsigned long flags;
479 int retval;
480
481 /*
482 * Clear the FIFO buffers and disable them.
483 * (they will be reeanbled in set_termios())
484 */
485 sio_set(up, TXX9_SIFCR,
486 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
487 /* clear reset */
488 sio_mask(up, TXX9_SIFCR,
489 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
490 sio_out(up, TXX9_SIDICR, 0);
491
492 /*
493 * Clear the interrupt registers.
494 */
495 sio_out(up, TXX9_SIDISR, 0);
496
497 retval = request_irq(up->port.irq, serial_txx9_interrupt,
498 SA_SHIRQ, "serial_txx9", up);
499 if (retval)
500 return retval;
501
502 /*
503 * Now, initialize the UART
504 */
505 spin_lock_irqsave(&up->port.lock, flags);
506 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
507 spin_unlock_irqrestore(&up->port.lock, flags);
508
509 /* Enable RX/TX */
510 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
511
512 /*
513 * Finally, enable interrupts.
514 */
515 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
516
517 return 0;
518}
519
520static void serial_txx9_shutdown(struct uart_port *port)
521{
522 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
523 unsigned long flags;
524
525 /*
526 * Disable interrupts from this port
527 */
528 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
529
530 spin_lock_irqsave(&up->port.lock, flags);
531 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
532 spin_unlock_irqrestore(&up->port.lock, flags);
533
534 /*
535 * Disable break condition
536 */
537 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
538
539#ifdef CONFIG_SERIAL_TXX9_CONSOLE
540 if (up->port.cons && up->port.line == up->port.cons->index) {
541 free_irq(up->port.irq, up);
542 return;
543 }
544#endif
545 /* reset FIFOs */
546 sio_set(up, TXX9_SIFCR,
547 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
548 /* clear reset */
549 sio_mask(up, TXX9_SIFCR,
550 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
551
552 /* Disable RX/TX */
553 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
554
555 free_irq(up->port.irq, up);
556}
557
558static void
559serial_txx9_set_termios(struct uart_port *port, struct termios *termios,
560 struct termios *old)
561{
562 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
563 unsigned int cval, fcr = 0;
564 unsigned long flags;
565 unsigned int baud, quot;
566
567 cval = sio_in(up, TXX9_SILCR);
568 /* byte size and parity */
569 cval &= ~TXX9_SILCR_UMODE_MASK;
570 switch (termios->c_cflag & CSIZE) {
571 case CS7:
572 cval |= TXX9_SILCR_UMODE_7BIT;
573 break;
574 default:
575 case CS5: /* not supported */
576 case CS6: /* not supported */
577 case CS8:
578 cval |= TXX9_SILCR_UMODE_8BIT;
579 break;
580 }
581
582 cval &= ~TXX9_SILCR_USBL_MASK;
583 if (termios->c_cflag & CSTOPB)
584 cval |= TXX9_SILCR_USBL_2BIT;
585 else
586 cval |= TXX9_SILCR_USBL_1BIT;
587 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
588 if (termios->c_cflag & PARENB)
589 cval |= TXX9_SILCR_UPEN;
590 if (!(termios->c_cflag & PARODD))
591 cval |= TXX9_SILCR_UEPS;
592
593 /*
594 * Ask the core to calculate the divisor for us.
595 */
596 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
597 quot = uart_get_divisor(port, baud);
598
599 /* Set up FIFOs */
600 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
601 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
602
603 /*
604 * Ok, we're now changing the port state. Do it with
605 * interrupts disabled.
606 */
607 spin_lock_irqsave(&up->port.lock, flags);
608
609 /*
610 * Update the per-port timeout.
611 */
612 uart_update_timeout(port, termios->c_cflag, baud);
613
614 up->port.read_status_mask = TXX9_SIDISR_UOER |
615 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
616 if (termios->c_iflag & INPCK)
617 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
618 if (termios->c_iflag & (BRKINT | PARMRK))
619 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
620
621 /*
622 * Characteres to ignore
623 */
624 up->port.ignore_status_mask = 0;
625 if (termios->c_iflag & IGNPAR)
626 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
627 if (termios->c_iflag & IGNBRK) {
628 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
629 /*
630 * If we're ignoring parity and break indicators,
631 * ignore overruns too (for real raw support).
632 */
633 if (termios->c_iflag & IGNPAR)
634 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
635 }
636
637 /*
638 * ignore all characters if CREAD is not set
639 */
640 if ((termios->c_cflag & CREAD) == 0)
641 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
642
643 /* CTS flow control flag */
644 if ((termios->c_cflag & CRTSCTS) &&
645 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
646 sio_set(up, TXX9_SIFLCR,
647 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
648 } else {
649 sio_mask(up, TXX9_SIFLCR,
650 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
651 }
652
653 sio_out(up, TXX9_SILCR, cval);
654 sio_quot_set(up, quot);
655 sio_out(up, TXX9_SIFCR, fcr);
656
657 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
658 spin_unlock_irqrestore(&up->port.lock, flags);
659}
660
661static void
662serial_txx9_pm(struct uart_port *port, unsigned int state,
663 unsigned int oldstate)
664{
665 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
f5ee56cc
RB		 666 if (up->pm)
667 up->pm(port, state, oldstate);
1da177e4
LT		 668}
669
670static int serial_txx9_request_resource(struct uart_txx9_port *up)
671{
672 unsigned int size = TXX9_REGION_SIZE;
673 int ret = 0;
674
675 switch (up->port.iotype) {
676 default:
677 if (!up->port.mapbase)
678 break;
679
680 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
681 ret = -EBUSY;
682 break;
683 }
684
685 if (up->port.flags & UPF_IOREMAP) {
686 up->port.membase = ioremap(up->port.mapbase, size);
687 if (!up->port.membase) {
688 release_mem_region(up->port.mapbase, size);
689 ret = -ENOMEM;
690 }
691 }
692 break;
693
694 case UPIO_PORT:
695 if (!request_region(up->port.iobase, size, "serial_txx9"))
696 ret = -EBUSY;
697 break;
698 }
699 return ret;
700}
701
702static void serial_txx9_release_resource(struct uart_txx9_port *up)
703{
704 unsigned int size = TXX9_REGION_SIZE;
705
706 switch (up->port.iotype) {
707 default:
708 if (!up->port.mapbase)
709 break;
710
711 if (up->port.flags & UPF_IOREMAP) {
712 iounmap(up->port.membase);
713 up->port.membase = NULL;
714 }
715
716 release_mem_region(up->port.mapbase, size);
717 break;
718
719 case UPIO_PORT:
720 release_region(up->port.iobase, size);
721 break;
722 }
723}
724
725static void serial_txx9_release_port(struct uart_port *port)
726{
727 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
728 serial_txx9_release_resource(up);
729}
730
731static int serial_txx9_request_port(struct uart_port *port)
732{
733 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
734 return serial_txx9_request_resource(up);
735}
736
737static void serial_txx9_config_port(struct uart_port *port, int uflags)
738{
739 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
740 unsigned long flags;
741 int ret;
742
743 /*
744 * Find the region that we can probe for. This in turn
745 * tells us whether we can probe for the type of port.
746 */
747 ret = serial_txx9_request_resource(up);
748 if (ret < 0)
749 return;
750 port->type = PORT_TXX9;
751 up->port.fifosize = TXX9_SIO_TX_FIFO;
752
753#ifdef CONFIG_SERIAL_TXX9_CONSOLE
754 if (up->port.line == up->port.cons->index)
755 return;
756#endif
757 spin_lock_irqsave(&up->port.lock, flags);
758 /*
759 * Reset the UART.
760 */
761 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
762#ifdef CONFIG_CPU_TX49XX
763 /* TX4925 BUG WORKAROUND. Accessing SIOC register
764 * immediately after soft reset causes bus error. */
765 iob();
766 udelay(1);
767#endif
768 while (sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST)
769 ;
770 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
771 sio_set(up, TXX9_SIFCR,
772 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
773 /* initial settings */
774 sio_out(up, TXX9_SILCR,
775 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
776 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
777 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
778 sio_quot_set(up, uart_get_divisor(port, 9600));
779 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
780 spin_unlock_irqrestore(&up->port.lock, flags);
781}
782
783static int
784serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
785{
786 if (ser->irq < 0 ||
787 ser->baud_base < 9600 || ser->type != PORT_TXX9)
788 return -EINVAL;
789 return 0;
790}
791
792static const char *
793serial_txx9_type(struct uart_port *port)
794{
795 return "txx9";
796}
797
798static struct uart_ops serial_txx9_pops = {
799 .tx_empty = serial_txx9_tx_empty,
800 .set_mctrl = serial_txx9_set_mctrl,
801 .get_mctrl = serial_txx9_get_mctrl,
802 .stop_tx = serial_txx9_stop_tx,
803 .start_tx = serial_txx9_start_tx,
804 .stop_rx = serial_txx9_stop_rx,
805 .enable_ms = serial_txx9_enable_ms,
806 .break_ctl = serial_txx9_break_ctl,
807 .startup = serial_txx9_startup,
808 .shutdown = serial_txx9_shutdown,
809 .set_termios = serial_txx9_set_termios,
810 .pm = serial_txx9_pm,
811 .type = serial_txx9_type,
812 .release_port = serial_txx9_release_port,
813 .request_port = serial_txx9_request_port,
814 .config_port = serial_txx9_config_port,
815 .verify_port = serial_txx9_verify_port,
816};
817
818static struct uart_txx9_port serial_txx9_ports[UART_NR];
819
820static void __init serial_txx9_register_ports(struct uart_driver *drv)
821{
822 int i;
823
824 for (i = 0; i < UART_NR; i++) {
825 struct uart_txx9_port *up = &serial_txx9_ports[i];
826
827 up->port.line = i;
828 up->port.ops = &serial_txx9_pops;
829 uart_add_one_port(drv, &up->port);
830 }
831}
832
833#ifdef CONFIG_SERIAL_TXX9_CONSOLE
834
835/*
836 * Wait for transmitter & holding register to empty
837 */
838static inline void wait_for_xmitr(struct uart_txx9_port *up)
839{
840 unsigned int tmout = 10000;
841
842 /* Wait up to 10ms for the character(s) to be sent. */
843 while (--tmout &&
844 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
845 udelay(1);
846
847 /* Wait up to 1s for flow control if necessary */
848 if (up->port.flags & UPF_CONS_FLOW) {
849 tmout = 1000000;
850 while (--tmout &&
851 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
852 udelay(1);
853 }
854}
855
856/*
857 * Print a string to the serial port trying not to disturb
858 * any possible real use of the port...
859 *
860 * The console_lock must be held when we get here.
861 */
862static void
863serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
864{
865 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
866 unsigned int ier, flcr;
867 int i;
868
869 /*
870 * First save the UER then disable the interrupts
871 */
872 ier = sio_in(up, TXX9_SIDICR);
873 sio_out(up, TXX9_SIDICR, 0);
874 /*
875 * Disable flow-control if enabled (and unnecessary)
876 */
877 flcr = sio_in(up, TXX9_SIFLCR);
878 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
879 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
880
881 /*
882 * Now, do each character
883 */
884 for (i = 0; i < count; i++, s++) {
885 wait_for_xmitr(up);
886
887 /*
888 * Send the character out.
889 * If a LF, also do CR...
890 */
891 sio_out(up, TXX9_SITFIFO, *s);
892 if (*s == 10) {
893 wait_for_xmitr(up);
894 sio_out(up, TXX9_SITFIFO, 13);
895 }
896 }
897
898 /*
899 * Finally, wait for transmitter to become empty
900 * and restore the IER
901 */
902 wait_for_xmitr(up);
903 sio_out(up, TXX9_SIFLCR, flcr);
904 sio_out(up, TXX9_SIDICR, ier);
905}
906
907static int serial_txx9_console_setup(struct console *co, char *options)
908{
909 struct uart_port *port;
910 struct uart_txx9_port *up;
911 int baud = 9600;
912 int bits = 8;
913 int parity = 'n';
914 int flow = 'n';
915
916 /*
917 * Check whether an invalid uart number has been specified, and
918 * if so, search for the first available port that does have
919 * console support.
920 */
921 if (co->index >= UART_NR)
922 co->index = 0;
923 up = &serial_txx9_ports[co->index];
924 port = &up->port;
925 if (!port->ops)
926 return -ENODEV;
927
928 /*
929 * Temporary fix.
930 */
931 spin_lock_init(&port->lock);
932
933 /*
934 * Disable UART interrupts, set DTR and RTS high
935 * and set speed.
936 */
937 sio_out(up, TXX9_SIDICR, 0);
938 /* initial settings */
939 sio_out(up, TXX9_SILCR,
940 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
941 ((port->flags & UPF_TXX9_USE_SCLK) ?
942 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
943 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
944
945 if (options)
946 uart_parse_options(options, &baud, &parity, &bits, &flow);
947
948 return uart_set_options(port, co, baud, parity, bits, flow);
949}
950
951static struct uart_driver serial_txx9_reg;
952static struct console serial_txx9_console = {
953 .name = TXX9_TTY_NAME,
954 .write = serial_txx9_console_write,
955 .device = uart_console_device,
956 .setup = serial_txx9_console_setup,
957 .flags = CON_PRINTBUFFER,
958 .index = -1,
959 .data = &serial_txx9_reg,
960};
961
962static int __init serial_txx9_console_init(void)
963{
964 register_console(&serial_txx9_console);
965 return 0;
966}
967console_initcall(serial_txx9_console_init);
968
1da177e4
LT		 969#define SERIAL_TXX9_CONSOLE &serial_txx9_console
970#else
971#define SERIAL_TXX9_CONSOLE NULL
972#endif
973
974static struct uart_driver serial_txx9_reg = {
975 .owner = THIS_MODULE,
976 .driver_name = "serial_txx9",
977 .devfs_name = TXX9_TTY_DEVFS_NAME,
978 .dev_name = TXX9_TTY_NAME,
979 .major = TXX9_TTY_MAJOR,
980 .minor = TXX9_TTY_MINOR_START,
981 .nr = UART_NR,
982 .cons = SERIAL_TXX9_CONSOLE,
983};
984
985int __init early_serial_txx9_setup(struct uart_port *port)
986{
987 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
988 return -ENODEV;
989
990 serial_txx9_ports[port->line].port = *port;
991 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
992 serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
993 return 0;
994}
995
996#ifdef ENABLE_SERIAL_TXX9_PCI
997/**
998 * serial_txx9_suspend_port - suspend one serial port
999 * @line: serial line number
1000 * @level: the level of port suspension, as per uart_suspend_port
1001 *
1002 * Suspend one serial port.
1003 */
1004static void serial_txx9_suspend_port(int line)
1005{
1006 uart_suspend_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
1007}
1008
1009/**
1010 * serial_txx9_resume_port - resume one serial port
1011 * @line: serial line number
1012 * @level: the level of port resumption, as per uart_resume_port
1013 *
1014 * Resume one serial port.
1015 */
1016static void serial_txx9_resume_port(int line)
1017{
1018 uart_resume_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
1019}
1020
f5ee56cc
RB		 1021static DECLARE_MUTEX(serial_txx9_sem);
1022
1023/**
1024 * serial_txx9_register_port - register a serial port
1025 * @port: serial port template
1026 *
1027 * Configure the serial port specified by the request.
1028 *
1029 * The port is then probed and if necessary the IRQ is autodetected
1030 * If this fails an error is returned.
1031 *
1032 * On success the port is ready to use and the line number is returned.
1033 */
1034static int __devinit serial_txx9_register_port(struct uart_port *port)
1035{
1036 int i;
1037 struct uart_txx9_port *uart;
1038 int ret = -ENOSPC;
1039
1040 down(&serial_txx9_sem);
1041 for (i = 0; i < UART_NR; i++) {
1042 uart = &serial_txx9_ports[i];
1043 if (uart->port.type == PORT_UNKNOWN)
1044 break;
1045 }
1046 if (i < UART_NR) {
1047 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1048 uart->port.iobase = port->iobase;
1049 uart->port.membase = port->membase;
1050 uart->port.irq = port->irq;
1051 uart->port.uartclk = port->uartclk;
1052 uart->port.iotype = port->iotype;
1053 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
1054 uart->port.mapbase = port->mapbase;
1055 if (port->dev)
1056 uart->port.dev = port->dev;
1057 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1058 if (ret == 0)
1059 ret = uart->port.line;
1060 }
1061 up(&serial_txx9_sem);
1062 return ret;
1063}
1064
1065/**
1066 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1067 * @line: serial line number
1068 *
1069 * Remove one serial port. This may not be called from interrupt
1070 * context. We hand the port back to the our control.
1071 */
1072static void __devexit serial_txx9_unregister_port(int line)
1073{
1074 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1075
1076 down(&serial_txx9_sem);
1077 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1078 uart->port.flags = 0;
1079 uart->port.type = PORT_UNKNOWN;
1080 uart->port.iobase = 0;
1081 uart->port.mapbase = 0;
1082 uart->port.membase = 0;
1083 uart->port.dev = NULL;
1084 uart_add_one_port(&serial_txx9_reg, &uart->port);
1085 up(&serial_txx9_sem);
1086}
1087
1da177e4
LT		 1088/*
1089 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1090 * to the arrangement of serial ports on a PCI card.
1091 */
1092static int __devinit
1093pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1094{
1095 struct uart_port port;
1096 int line;
1097 int rc;
1098
1099 rc = pci_enable_device(dev);
1100 if (rc)
1101 return rc;
1102
1103 memset(&port, 0, sizeof(port));
1104 port.ops = &serial_txx9_pops;
1da177e4
LT		 1105 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1106 port.uartclk = 66670000;
1107 port.irq = dev->irq;
1108 port.iotype = UPIO_PORT;
1109 port.iobase = pci_resource_start(dev, 1);
f5ee56cc
RB		 1110 port.dev = &dev->dev;
1111 line = serial_txx9_register_port(&port);
1da177e4
LT		 1112 if (line < 0) {
1113 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1114 }
1115 pci_set_drvdata(dev, (void *)(long)line);
1116
1117 return 0;
1118}
1119
1120static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1121{
1122 int line = (int)(long)pci_get_drvdata(dev);
1123
1124 pci_set_drvdata(dev, NULL);
1125
1126 if (line) {
f5ee56cc 1127 serial_txx9_unregister_port(line);
1da177e4
LT		 1128 pci_disable_device(dev);
1129 }
1130}
1131
0370affe 1132static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1da177e4
LT		 1133{
1134 int line = (int)(long)pci_get_drvdata(dev);
1135
1136 if (line)
1137 serial_txx9_suspend_port(line);
f5ee56cc
RB		 1138 pci_save_state(dev);
1139 pci_set_power_state(dev, pci_choose_state(dev, state));
1da177e4
LT		 1140 return 0;
1141}
1142
1143static int pciserial_txx9_resume_one(struct pci_dev *dev)
1144{
1145 int line = (int)(long)pci_get_drvdata(dev);
1146
f5ee56cc
RB		 1147 pci_set_power_state(dev, PCI_D0);
1148 pci_restore_state(dev);
1149
1150 if (line) {
1151 pci_enable_device(dev);
1da177e4 1152 serial_txx9_resume_port(line);
f5ee56cc 1153 }
1da177e4
LT		 1154 return 0;
1155}
1156
1157static struct pci_device_id serial_txx9_pci_tbl[] = {
1158 { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC,
1159 PCI_ANY_ID, PCI_ANY_ID,
1160 0, 0, 0 },
1161 { 0, }
1162};
1163
1164static struct pci_driver serial_txx9_pci_driver = {
1165 .name = "serial_txx9",
1166 .probe = pciserial_txx9_init_one,
1167 .remove = __devexit_p(pciserial_txx9_remove_one),
1168 .suspend = pciserial_txx9_suspend_one,
1169 .resume = pciserial_txx9_resume_one,
1170 .id_table = serial_txx9_pci_tbl,
1171};
1172
1173MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1174#endif /* ENABLE_SERIAL_TXX9_PCI */
1175
1176static int __init serial_txx9_init(void)
1177{
1178 int ret;
1179
1180 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1181
1182 ret = uart_register_driver(&serial_txx9_reg);
1183 if (ret >= 0) {
1184 serial_txx9_register_ports(&serial_txx9_reg);
1185
1186#ifdef ENABLE_SERIAL_TXX9_PCI
93b47684 1187 ret = pci_register_driver(&serial_txx9_pci_driver);
1da177e4
LT		 1188#endif
1189 }
1190 return ret;
1191}
1192
1193static void __exit serial_txx9_exit(void)
1194{
1195 int i;
1196
1197#ifdef ENABLE_SERIAL_TXX9_PCI
1198 pci_unregister_driver(&serial_txx9_pci_driver);
1199#endif
1200 for (i = 0; i < UART_NR; i++)
1201 uart_remove_one_port(&serial_txx9_reg, &serial_txx9_ports[i].port);
1202
1203 uart_unregister_driver(&serial_txx9_reg);
1204}
1205
1206module_init(serial_txx9_init);
1207module_exit(serial_txx9_exit);
1208
1209MODULE_LICENSE("GPL");
1210MODULE_DESCRIPTION("TX39/49 serial driver");
1211
1212MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
Linux kernel - Deliverables
This page took 0.161554 seconds and 5 git commands to generate.