Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/serial/sh-sci.c | |
3 | * | |
4 | * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO) | |
5 | * | |
7ff731ae | 6 | * Copyright (C) 2002 - 2008 Paul Mundt |
3ea6bc3d | 7 | * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007). |
1da177e4 LT |
8 | * |
9 | * based off of the old drivers/char/sh-sci.c by: | |
10 | * | |
11 | * Copyright (C) 1999, 2000 Niibe Yutaka | |
12 | * Copyright (C) 2000 Sugioka Toshinobu | |
13 | * Modified to support multiple serial ports. Stuart Menefy (May 2000). | |
14 | * Modified to support SecureEdge. David McCullough (2002) | |
15 | * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003). | |
d89ddd1c | 16 | * Removed SH7300 support (Jul 2007). |
1da177e4 LT |
17 | * |
18 | * This file is subject to the terms and conditions of the GNU General Public | |
19 | * License. See the file "COPYING" in the main directory of this archive | |
20 | * for more details. | |
21 | */ | |
0b3d4ef6 PM |
22 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
23 | #define SUPPORT_SYSRQ | |
24 | #endif | |
1da177e4 LT |
25 | |
26 | #undef DEBUG | |
27 | ||
1da177e4 LT |
28 | #include <linux/module.h> |
29 | #include <linux/errno.h> | |
1da177e4 LT |
30 | #include <linux/timer.h> |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/tty.h> | |
33 | #include <linux/tty_flip.h> | |
34 | #include <linux/serial.h> | |
35 | #include <linux/major.h> | |
36 | #include <linux/string.h> | |
37 | #include <linux/sysrq.h> | |
1da177e4 LT |
38 | #include <linux/ioport.h> |
39 | #include <linux/mm.h> | |
1da177e4 LT |
40 | #include <linux/init.h> |
41 | #include <linux/delay.h> | |
42 | #include <linux/console.h> | |
e108b2ca | 43 | #include <linux/platform_device.h> |
96de1a8f | 44 | #include <linux/serial_sci.h> |
1da177e4 LT |
45 | #include <linux/notifier.h> |
46 | #include <linux/cpufreq.h> | |
85f094ec | 47 | #include <linux/clk.h> |
fa5da2f7 | 48 | #include <linux/ctype.h> |
7ff731ae | 49 | #include <linux/err.h> |
e552de24 | 50 | #include <linux/list.h> |
85f094ec PM |
51 | |
52 | #ifdef CONFIG_SUPERH | |
b7a76e4b | 53 | #include <asm/clock.h> |
1da177e4 LT |
54 | #include <asm/sh_bios.h> |
55 | #endif | |
56 | ||
1da177e4 LT |
57 | #include "sh-sci.h" |
58 | ||
e108b2ca PM |
59 | struct sci_port { |
60 | struct uart_port port; | |
61 | ||
62 | /* Port type */ | |
63 | unsigned int type; | |
64 | ||
65 | /* Port IRQs: ERI, RXI, TXI, BRI (optional) */ | |
32351a28 | 66 | unsigned int irqs[SCIx_NR_IRQS]; |
e108b2ca | 67 | |
e108b2ca PM |
68 | /* Port enable callback */ |
69 | void (*enable)(struct uart_port *port); | |
70 | ||
71 | /* Port disable callback */ | |
72 | void (*disable)(struct uart_port *port); | |
73 | ||
74 | /* Break timer */ | |
75 | struct timer_list break_timer; | |
76 | int break_flag; | |
1534a3b3 | 77 | |
a2159b52 | 78 | #ifdef CONFIG_HAVE_CLK |
501b825d MD |
79 | /* Interface clock */ |
80 | struct clk *iclk; | |
81 | /* Data clock */ | |
82 | struct clk *dclk; | |
e552de24 MD |
83 | #endif |
84 | struct list_head node; | |
85 | }; | |
86 | ||
87 | struct sh_sci_priv { | |
88 | spinlock_t lock; | |
89 | struct list_head ports; | |
90 | ||
91 | #ifdef CONFIG_HAVE_CLK | |
92 | struct notifier_block clk_nb; | |
005a336e | 93 | #endif |
e108b2ca PM |
94 | }; |
95 | ||
1da177e4 | 96 | /* Function prototypes */ |
b129a8cc | 97 | static void sci_stop_tx(struct uart_port *port); |
1da177e4 | 98 | |
e108b2ca | 99 | #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS |
b7a76e4b | 100 | |
e108b2ca PM |
101 | static struct sci_port sci_ports[SCI_NPORTS]; |
102 | static struct uart_driver sci_uart_driver; | |
1da177e4 | 103 | |
e7c98dc7 MT |
104 | static inline struct sci_port * |
105 | to_sci_port(struct uart_port *uart) | |
106 | { | |
107 | return container_of(uart, struct sci_port, port); | |
108 | } | |
109 | ||
07d2a1a1 | 110 | #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE) |
1f6fd5c9 PM |
111 | |
112 | #ifdef CONFIG_CONSOLE_POLL | |
e108b2ca PM |
113 | static inline void handle_error(struct uart_port *port) |
114 | { | |
115 | /* Clear error flags */ | |
1da177e4 LT |
116 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); |
117 | } | |
118 | ||
07d2a1a1 | 119 | static int sci_poll_get_char(struct uart_port *port) |
1da177e4 | 120 | { |
1da177e4 LT |
121 | unsigned short status; |
122 | int c; | |
123 | ||
e108b2ca | 124 | do { |
1da177e4 LT |
125 | status = sci_in(port, SCxSR); |
126 | if (status & SCxSR_ERRORS(port)) { | |
127 | handle_error(port); | |
128 | continue; | |
129 | } | |
130 | } while (!(status & SCxSR_RDxF(port))); | |
07d2a1a1 | 131 | |
1da177e4 | 132 | c = sci_in(port, SCxRDR); |
07d2a1a1 | 133 | |
e7c98dc7 MT |
134 | /* Dummy read */ |
135 | sci_in(port, SCxSR); | |
1da177e4 | 136 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); |
1da177e4 LT |
137 | |
138 | return c; | |
139 | } | |
1f6fd5c9 | 140 | #endif |
1da177e4 | 141 | |
07d2a1a1 | 142 | static void sci_poll_put_char(struct uart_port *port, unsigned char c) |
1da177e4 | 143 | { |
1da177e4 LT |
144 | unsigned short status; |
145 | ||
1da177e4 LT |
146 | do { |
147 | status = sci_in(port, SCxSR); | |
148 | } while (!(status & SCxSR_TDxE(port))); | |
149 | ||
1da177e4 | 150 | sci_in(port, SCxSR); /* Dummy read */ |
973e5d52 | 151 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port)); |
272966c0 | 152 | sci_out(port, SCxTDR, c); |
1da177e4 | 153 | } |
07d2a1a1 | 154 | #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */ |
1da177e4 LT |
155 | |
156 | #if defined(__H8300S__) | |
157 | enum { sci_disable, sci_enable }; | |
158 | ||
e7c98dc7 | 159 | static void h8300_sci_config(struct uart_port *port, unsigned int ctrl) |
1da177e4 | 160 | { |
e7c98dc7 | 161 | volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL; |
1da177e4 LT |
162 | int ch = (port->mapbase - SMR0) >> 3; |
163 | unsigned char mask = 1 << (ch+1); | |
164 | ||
e7c98dc7 | 165 | if (ctrl == sci_disable) |
1da177e4 | 166 | *mstpcrl |= mask; |
e7c98dc7 | 167 | else |
1da177e4 | 168 | *mstpcrl &= ~mask; |
1da177e4 | 169 | } |
e108b2ca | 170 | |
501b825d | 171 | static void h8300_sci_enable(struct uart_port *port) |
e108b2ca PM |
172 | { |
173 | h8300_sci_config(port, sci_enable); | |
174 | } | |
175 | ||
501b825d | 176 | static void h8300_sci_disable(struct uart_port *port) |
e108b2ca PM |
177 | { |
178 | h8300_sci_config(port, sci_disable); | |
179 | } | |
1da177e4 LT |
180 | #endif |
181 | ||
15c73aaa | 182 | #if defined(__H8300H__) || defined(__H8300S__) |
d5701647 | 183 | static void sci_init_pins(struct uart_port *port, unsigned int cflag) |
1da177e4 LT |
184 | { |
185 | int ch = (port->mapbase - SMR0) >> 3; | |
186 | ||
187 | /* set DDR regs */ | |
e108b2ca PM |
188 | H8300_GPIO_DDR(h8300_sci_pins[ch].port, |
189 | h8300_sci_pins[ch].rx, | |
190 | H8300_GPIO_INPUT); | |
191 | H8300_GPIO_DDR(h8300_sci_pins[ch].port, | |
192 | h8300_sci_pins[ch].tx, | |
193 | H8300_GPIO_OUTPUT); | |
194 | ||
1da177e4 LT |
195 | /* tx mark output*/ |
196 | H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx; | |
197 | } | |
d5701647 PM |
198 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
199 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) | |
e108b2ca | 200 | { |
d5701647 PM |
201 | if (port->mapbase == 0xA4400000) { |
202 | __raw_writew(__raw_readw(PACR) & 0xffc0, PACR); | |
203 | __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR); | |
204 | } else if (port->mapbase == 0xA4410000) | |
205 | __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR); | |
9465a54f | 206 | } |
31a49c4b | 207 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721) |
d5701647 | 208 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
3ea6bc3d | 209 | { |
3ea6bc3d MB |
210 | unsigned short data; |
211 | ||
212 | if (cflag & CRTSCTS) { | |
213 | /* enable RTS/CTS */ | |
214 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ | |
215 | /* Clear PTCR bit 9-2; enable all scif pins but sck */ | |
d5701647 PM |
216 | data = __raw_readw(PORT_PTCR); |
217 | __raw_writew((data & 0xfc03), PORT_PTCR); | |
3ea6bc3d MB |
218 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ |
219 | /* Clear PVCR bit 9-2 */ | |
d5701647 PM |
220 | data = __raw_readw(PORT_PVCR); |
221 | __raw_writew((data & 0xfc03), PORT_PVCR); | |
3ea6bc3d | 222 | } |
3ea6bc3d MB |
223 | } else { |
224 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ | |
225 | /* Clear PTCR bit 5-2; enable only tx and rx */ | |
d5701647 PM |
226 | data = __raw_readw(PORT_PTCR); |
227 | __raw_writew((data & 0xffc3), PORT_PTCR); | |
3ea6bc3d MB |
228 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ |
229 | /* Clear PVCR bit 5-2 */ | |
d5701647 PM |
230 | data = __raw_readw(PORT_PVCR); |
231 | __raw_writew((data & 0xffc3), PORT_PVCR); | |
3ea6bc3d MB |
232 | } |
233 | } | |
3ea6bc3d | 234 | } |
b7a76e4b | 235 | #elif defined(CONFIG_CPU_SH3) |
e108b2ca | 236 | /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ |
d5701647 | 237 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
1da177e4 | 238 | { |
b7a76e4b PM |
239 | unsigned short data; |
240 | ||
241 | /* We need to set SCPCR to enable RTS/CTS */ | |
d5701647 | 242 | data = __raw_readw(SCPCR); |
b7a76e4b | 243 | /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ |
d5701647 | 244 | __raw_writew(data & 0x0fcf, SCPCR); |
1da177e4 | 245 | |
d5701647 | 246 | if (!(cflag & CRTSCTS)) { |
1da177e4 | 247 | /* We need to set SCPCR to enable RTS/CTS */ |
d5701647 | 248 | data = __raw_readw(SCPCR); |
1da177e4 LT |
249 | /* Clear out SCP7MD1,0, SCP4MD1,0, |
250 | Set SCP6MD1,0 = {01} (output) */ | |
d5701647 | 251 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); |
1da177e4 LT |
252 | |
253 | data = ctrl_inb(SCPDR); | |
254 | /* Set /RTS2 (bit6) = 0 */ | |
b7a76e4b | 255 | ctrl_outb(data & 0xbf, SCPDR); |
1da177e4 | 256 | } |
1da177e4 | 257 | } |
41504c39 | 258 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
d5701647 | 259 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
41504c39 | 260 | { |
346b7463 | 261 | unsigned short data; |
41504c39 | 262 | |
346b7463 | 263 | if (port->mapbase == 0xffe00000) { |
d5701647 | 264 | data = __raw_readw(PSCR); |
346b7463 | 265 | data &= ~0x03cf; |
d5701647 | 266 | if (!(cflag & CRTSCTS)) |
346b7463 | 267 | data |= 0x0340; |
41504c39 | 268 | |
d5701647 | 269 | __raw_writew(data, PSCR); |
41504c39 | 270 | } |
178dd0cd | 271 | } |
7d740a06 YS |
272 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ |
273 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | |
2b1bd1ac | 274 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
55ba99eb | 275 | defined(CONFIG_CPU_SUBTYPE_SH7786) || \ |
2b1bd1ac | 276 | defined(CONFIG_CPU_SUBTYPE_SHX3) |
d5701647 PM |
277 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
278 | { | |
279 | if (!(cflag & CRTSCTS)) | |
280 | __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */ | |
281 | } | |
b0c50ad7 | 282 | #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A) |
d5701647 PM |
283 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
284 | { | |
285 | if (!(cflag & CRTSCTS)) | |
286 | __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */ | |
287 | } | |
b7a76e4b | 288 | #else |
d5701647 PM |
289 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
290 | { | |
291 | /* Nothing to do */ | |
1da177e4 | 292 | } |
e108b2ca PM |
293 | #endif |
294 | ||
32351a28 PM |
295 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ |
296 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | |
55ba99eb KM |
297 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
298 | defined(CONFIG_CPU_SUBTYPE_SH7786) | |
e108b2ca PM |
299 | static inline int scif_txroom(struct uart_port *port) |
300 | { | |
cae167d3 | 301 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); |
e108b2ca PM |
302 | } |
303 | ||
304 | static inline int scif_rxroom(struct uart_port *port) | |
305 | { | |
cae167d3 | 306 | return sci_in(port, SCRFDR) & 0xff; |
e108b2ca | 307 | } |
c63847a3 NI |
308 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) |
309 | static inline int scif_txroom(struct uart_port *port) | |
310 | { | |
e7c98dc7 MT |
311 | if ((port->mapbase == 0xffe00000) || |
312 | (port->mapbase == 0xffe08000)) { | |
313 | /* SCIF0/1*/ | |
c63847a3 | 314 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); |
e7c98dc7 MT |
315 | } else { |
316 | /* SCIF2 */ | |
c63847a3 | 317 | return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); |
e7c98dc7 | 318 | } |
c63847a3 NI |
319 | } |
320 | ||
321 | static inline int scif_rxroom(struct uart_port *port) | |
322 | { | |
e7c98dc7 MT |
323 | if ((port->mapbase == 0xffe00000) || |
324 | (port->mapbase == 0xffe08000)) { | |
325 | /* SCIF0/1*/ | |
c63847a3 | 326 | return sci_in(port, SCRFDR) & 0xff; |
e7c98dc7 MT |
327 | } else { |
328 | /* SCIF2 */ | |
c63847a3 | 329 | return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; |
e7c98dc7 | 330 | } |
c63847a3 | 331 | } |
e108b2ca PM |
332 | #else |
333 | static inline int scif_txroom(struct uart_port *port) | |
334 | { | |
335 | return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); | |
336 | } | |
1da177e4 | 337 | |
e108b2ca PM |
338 | static inline int scif_rxroom(struct uart_port *port) |
339 | { | |
340 | return sci_in(port, SCFDR) & SCIF_RFDC_MASK; | |
341 | } | |
1da177e4 | 342 | #endif |
1da177e4 | 343 | |
e108b2ca PM |
344 | static inline int sci_txroom(struct uart_port *port) |
345 | { | |
e7c98dc7 | 346 | return (sci_in(port, SCxSR) & SCI_TDRE) != 0; |
e108b2ca PM |
347 | } |
348 | ||
349 | static inline int sci_rxroom(struct uart_port *port) | |
350 | { | |
e7c98dc7 | 351 | return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0; |
e108b2ca PM |
352 | } |
353 | ||
1da177e4 LT |
354 | /* ********************************************************************** * |
355 | * the interrupt related routines * | |
356 | * ********************************************************************** */ | |
357 | ||
358 | static void sci_transmit_chars(struct uart_port *port) | |
359 | { | |
360 | struct circ_buf *xmit = &port->info->xmit; | |
361 | unsigned int stopped = uart_tx_stopped(port); | |
1da177e4 LT |
362 | unsigned short status; |
363 | unsigned short ctrl; | |
e108b2ca | 364 | int count; |
1da177e4 LT |
365 | |
366 | status = sci_in(port, SCxSR); | |
367 | if (!(status & SCxSR_TDxE(port))) { | |
1da177e4 | 368 | ctrl = sci_in(port, SCSCR); |
e7c98dc7 | 369 | if (uart_circ_empty(xmit)) |
1da177e4 | 370 | ctrl &= ~SCI_CTRL_FLAGS_TIE; |
e7c98dc7 | 371 | else |
1da177e4 | 372 | ctrl |= SCI_CTRL_FLAGS_TIE; |
1da177e4 | 373 | sci_out(port, SCSCR, ctrl); |
1da177e4 LT |
374 | return; |
375 | } | |
376 | ||
1a22f08d | 377 | if (port->type == PORT_SCI) |
e108b2ca | 378 | count = sci_txroom(port); |
1a22f08d YS |
379 | else |
380 | count = scif_txroom(port); | |
1da177e4 LT |
381 | |
382 | do { | |
383 | unsigned char c; | |
384 | ||
385 | if (port->x_char) { | |
386 | c = port->x_char; | |
387 | port->x_char = 0; | |
388 | } else if (!uart_circ_empty(xmit) && !stopped) { | |
389 | c = xmit->buf[xmit->tail]; | |
390 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
391 | } else { | |
392 | break; | |
393 | } | |
394 | ||
395 | sci_out(port, SCxTDR, c); | |
396 | ||
397 | port->icount.tx++; | |
398 | } while (--count > 0); | |
399 | ||
400 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
401 | ||
402 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
403 | uart_write_wakeup(port); | |
404 | if (uart_circ_empty(xmit)) { | |
b129a8cc | 405 | sci_stop_tx(port); |
1da177e4 | 406 | } else { |
1da177e4 LT |
407 | ctrl = sci_in(port, SCSCR); |
408 | ||
1a22f08d | 409 | if (port->type != PORT_SCI) { |
1da177e4 LT |
410 | sci_in(port, SCxSR); /* Dummy read */ |
411 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
412 | } | |
1da177e4 LT |
413 | |
414 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
415 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
416 | } |
417 | } | |
418 | ||
419 | /* On SH3, SCIF may read end-of-break as a space->mark char */ | |
e7c98dc7 | 420 | #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); }) |
1da177e4 | 421 | |
7d12e780 | 422 | static inline void sci_receive_chars(struct uart_port *port) |
1da177e4 | 423 | { |
e7c98dc7 | 424 | struct sci_port *sci_port = to_sci_port(port); |
a88487c7 | 425 | struct tty_struct *tty = port->info->port.tty; |
1da177e4 LT |
426 | int i, count, copied = 0; |
427 | unsigned short status; | |
33f0f88f | 428 | unsigned char flag; |
1da177e4 LT |
429 | |
430 | status = sci_in(port, SCxSR); | |
431 | if (!(status & SCxSR_RDxF(port))) | |
432 | return; | |
433 | ||
434 | while (1) { | |
1a22f08d | 435 | if (port->type == PORT_SCI) |
e108b2ca | 436 | count = sci_rxroom(port); |
1a22f08d YS |
437 | else |
438 | count = scif_rxroom(port); | |
1da177e4 LT |
439 | |
440 | /* Don't copy more bytes than there is room for in the buffer */ | |
33f0f88f | 441 | count = tty_buffer_request_room(tty, count); |
1da177e4 LT |
442 | |
443 | /* If for any reason we can't copy more data, we're done! */ | |
444 | if (count == 0) | |
445 | break; | |
446 | ||
447 | if (port->type == PORT_SCI) { | |
448 | char c = sci_in(port, SCxRDR); | |
e7c98dc7 MT |
449 | if (uart_handle_sysrq_char(port, c) || |
450 | sci_port->break_flag) | |
1da177e4 | 451 | count = 0; |
e7c98dc7 | 452 | else |
e108b2ca | 453 | tty_insert_flip_char(tty, c, TTY_NORMAL); |
1da177e4 | 454 | } else { |
e7c98dc7 | 455 | for (i = 0; i < count; i++) { |
1da177e4 LT |
456 | char c = sci_in(port, SCxRDR); |
457 | status = sci_in(port, SCxSR); | |
458 | #if defined(CONFIG_CPU_SH3) | |
459 | /* Skip "chars" during break */ | |
e108b2ca | 460 | if (sci_port->break_flag) { |
1da177e4 LT |
461 | if ((c == 0) && |
462 | (status & SCxSR_FER(port))) { | |
463 | count--; i--; | |
464 | continue; | |
465 | } | |
e108b2ca | 466 | |
1da177e4 | 467 | /* Nonzero => end-of-break */ |
762c69e3 | 468 | dev_dbg(port->dev, "debounce<%02x>\n", c); |
e108b2ca PM |
469 | sci_port->break_flag = 0; |
470 | ||
1da177e4 LT |
471 | if (STEPFN(c)) { |
472 | count--; i--; | |
473 | continue; | |
474 | } | |
475 | } | |
476 | #endif /* CONFIG_CPU_SH3 */ | |
7d12e780 | 477 | if (uart_handle_sysrq_char(port, c)) { |
1da177e4 LT |
478 | count--; i--; |
479 | continue; | |
480 | } | |
481 | ||
482 | /* Store data and status */ | |
1da177e4 | 483 | if (status&SCxSR_FER(port)) { |
33f0f88f | 484 | flag = TTY_FRAME; |
762c69e3 | 485 | dev_notice(port->dev, "frame error\n"); |
1da177e4 | 486 | } else if (status&SCxSR_PER(port)) { |
33f0f88f | 487 | flag = TTY_PARITY; |
762c69e3 | 488 | dev_notice(port->dev, "parity error\n"); |
33f0f88f AC |
489 | } else |
490 | flag = TTY_NORMAL; | |
762c69e3 | 491 | |
33f0f88f | 492 | tty_insert_flip_char(tty, c, flag); |
1da177e4 LT |
493 | } |
494 | } | |
495 | ||
496 | sci_in(port, SCxSR); /* dummy read */ | |
497 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
498 | ||
1da177e4 LT |
499 | copied += count; |
500 | port->icount.rx += count; | |
501 | } | |
502 | ||
503 | if (copied) { | |
504 | /* Tell the rest of the system the news. New characters! */ | |
505 | tty_flip_buffer_push(tty); | |
506 | } else { | |
507 | sci_in(port, SCxSR); /* dummy read */ | |
508 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
509 | } | |
510 | } | |
511 | ||
512 | #define SCI_BREAK_JIFFIES (HZ/20) | |
513 | /* The sci generates interrupts during the break, | |
514 | * 1 per millisecond or so during the break period, for 9600 baud. | |
515 | * So dont bother disabling interrupts. | |
516 | * But dont want more than 1 break event. | |
517 | * Use a kernel timer to periodically poll the rx line until | |
518 | * the break is finished. | |
519 | */ | |
520 | static void sci_schedule_break_timer(struct sci_port *port) | |
521 | { | |
522 | port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES; | |
523 | add_timer(&port->break_timer); | |
524 | } | |
525 | /* Ensure that two consecutive samples find the break over. */ | |
526 | static void sci_break_timer(unsigned long data) | |
527 | { | |
e108b2ca PM |
528 | struct sci_port *port = (struct sci_port *)data; |
529 | ||
530 | if (sci_rxd_in(&port->port) == 0) { | |
1da177e4 | 531 | port->break_flag = 1; |
e108b2ca PM |
532 | sci_schedule_break_timer(port); |
533 | } else if (port->break_flag == 1) { | |
1da177e4 LT |
534 | /* break is over. */ |
535 | port->break_flag = 2; | |
e108b2ca PM |
536 | sci_schedule_break_timer(port); |
537 | } else | |
538 | port->break_flag = 0; | |
1da177e4 LT |
539 | } |
540 | ||
541 | static inline int sci_handle_errors(struct uart_port *port) | |
542 | { | |
543 | int copied = 0; | |
544 | unsigned short status = sci_in(port, SCxSR); | |
a88487c7 | 545 | struct tty_struct *tty = port->info->port.tty; |
1da177e4 | 546 | |
e108b2ca | 547 | if (status & SCxSR_ORER(port)) { |
1da177e4 | 548 | /* overrun error */ |
e108b2ca | 549 | if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) |
33f0f88f | 550 | copied++; |
762c69e3 PM |
551 | |
552 | dev_notice(port->dev, "overrun error"); | |
1da177e4 LT |
553 | } |
554 | ||
e108b2ca | 555 | if (status & SCxSR_FER(port)) { |
1da177e4 LT |
556 | if (sci_rxd_in(port) == 0) { |
557 | /* Notify of BREAK */ | |
e7c98dc7 | 558 | struct sci_port *sci_port = to_sci_port(port); |
e108b2ca PM |
559 | |
560 | if (!sci_port->break_flag) { | |
561 | sci_port->break_flag = 1; | |
562 | sci_schedule_break_timer(sci_port); | |
563 | ||
1da177e4 | 564 | /* Do sysrq handling. */ |
e108b2ca | 565 | if (uart_handle_break(port)) |
1da177e4 | 566 | return 0; |
762c69e3 PM |
567 | |
568 | dev_dbg(port->dev, "BREAK detected\n"); | |
569 | ||
e108b2ca | 570 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
e7c98dc7 MT |
571 | copied++; |
572 | } | |
573 | ||
e108b2ca | 574 | } else { |
1da177e4 | 575 | /* frame error */ |
e108b2ca | 576 | if (tty_insert_flip_char(tty, 0, TTY_FRAME)) |
33f0f88f | 577 | copied++; |
762c69e3 PM |
578 | |
579 | dev_notice(port->dev, "frame error\n"); | |
1da177e4 LT |
580 | } |
581 | } | |
582 | ||
e108b2ca | 583 | if (status & SCxSR_PER(port)) { |
1da177e4 | 584 | /* parity error */ |
e108b2ca PM |
585 | if (tty_insert_flip_char(tty, 0, TTY_PARITY)) |
586 | copied++; | |
762c69e3 PM |
587 | |
588 | dev_notice(port->dev, "parity error"); | |
1da177e4 LT |
589 | } |
590 | ||
33f0f88f | 591 | if (copied) |
1da177e4 | 592 | tty_flip_buffer_push(tty); |
1da177e4 LT |
593 | |
594 | return copied; | |
595 | } | |
596 | ||
d830fa45 PM |
597 | static inline int sci_handle_fifo_overrun(struct uart_port *port) |
598 | { | |
599 | struct tty_struct *tty = port->info->port.tty; | |
600 | int copied = 0; | |
601 | ||
602 | if (port->type != PORT_SCIF) | |
603 | return 0; | |
604 | ||
605 | if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) { | |
606 | sci_out(port, SCLSR, 0); | |
607 | ||
608 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
609 | tty_flip_buffer_push(tty); | |
610 | ||
611 | dev_notice(port->dev, "overrun error\n"); | |
612 | copied++; | |
613 | } | |
614 | ||
615 | return copied; | |
616 | } | |
617 | ||
1da177e4 LT |
618 | static inline int sci_handle_breaks(struct uart_port *port) |
619 | { | |
620 | int copied = 0; | |
621 | unsigned short status = sci_in(port, SCxSR); | |
a88487c7 | 622 | struct tty_struct *tty = port->info->port.tty; |
a5660ada | 623 | struct sci_port *s = to_sci_port(port); |
1da177e4 | 624 | |
0b3d4ef6 PM |
625 | if (uart_handle_break(port)) |
626 | return 0; | |
627 | ||
b7a76e4b | 628 | if (!s->break_flag && status & SCxSR_BRK(port)) { |
1da177e4 LT |
629 | #if defined(CONFIG_CPU_SH3) |
630 | /* Debounce break */ | |
631 | s->break_flag = 1; | |
632 | #endif | |
633 | /* Notify of BREAK */ | |
e108b2ca | 634 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
33f0f88f | 635 | copied++; |
762c69e3 PM |
636 | |
637 | dev_dbg(port->dev, "BREAK detected\n"); | |
1da177e4 LT |
638 | } |
639 | ||
33f0f88f | 640 | if (copied) |
1da177e4 | 641 | tty_flip_buffer_push(tty); |
e108b2ca | 642 | |
d830fa45 PM |
643 | copied += sci_handle_fifo_overrun(port); |
644 | ||
1da177e4 LT |
645 | return copied; |
646 | } | |
647 | ||
7d12e780 | 648 | static irqreturn_t sci_rx_interrupt(int irq, void *port) |
1da177e4 | 649 | { |
1da177e4 LT |
650 | /* I think sci_receive_chars has to be called irrespective |
651 | * of whether the I_IXOFF is set, otherwise, how is the interrupt | |
652 | * to be disabled? | |
653 | */ | |
7d12e780 | 654 | sci_receive_chars(port); |
1da177e4 LT |
655 | |
656 | return IRQ_HANDLED; | |
657 | } | |
658 | ||
7d12e780 | 659 | static irqreturn_t sci_tx_interrupt(int irq, void *ptr) |
1da177e4 LT |
660 | { |
661 | struct uart_port *port = ptr; | |
662 | ||
e108b2ca | 663 | spin_lock_irq(&port->lock); |
1da177e4 | 664 | sci_transmit_chars(port); |
e108b2ca | 665 | spin_unlock_irq(&port->lock); |
1da177e4 LT |
666 | |
667 | return IRQ_HANDLED; | |
668 | } | |
669 | ||
7d12e780 | 670 | static irqreturn_t sci_er_interrupt(int irq, void *ptr) |
1da177e4 LT |
671 | { |
672 | struct uart_port *port = ptr; | |
673 | ||
674 | /* Handle errors */ | |
675 | if (port->type == PORT_SCI) { | |
676 | if (sci_handle_errors(port)) { | |
677 | /* discard character in rx buffer */ | |
678 | sci_in(port, SCxSR); | |
679 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
680 | } | |
681 | } else { | |
d830fa45 | 682 | sci_handle_fifo_overrun(port); |
7d12e780 | 683 | sci_rx_interrupt(irq, ptr); |
1da177e4 LT |
684 | } |
685 | ||
686 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); | |
687 | ||
688 | /* Kick the transmission */ | |
7d12e780 | 689 | sci_tx_interrupt(irq, ptr); |
1da177e4 LT |
690 | |
691 | return IRQ_HANDLED; | |
692 | } | |
693 | ||
7d12e780 | 694 | static irqreturn_t sci_br_interrupt(int irq, void *ptr) |
1da177e4 LT |
695 | { |
696 | struct uart_port *port = ptr; | |
697 | ||
698 | /* Handle BREAKs */ | |
699 | sci_handle_breaks(port); | |
700 | sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port)); | |
701 | ||
702 | return IRQ_HANDLED; | |
703 | } | |
704 | ||
7d12e780 | 705 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) |
1da177e4 | 706 | { |
a8884e34 MT |
707 | unsigned short ssr_status, scr_status; |
708 | struct uart_port *port = ptr; | |
709 | irqreturn_t ret = IRQ_NONE; | |
1da177e4 | 710 | |
e7c98dc7 MT |
711 | ssr_status = sci_in(port, SCxSR); |
712 | scr_status = sci_in(port, SCSCR); | |
1da177e4 LT |
713 | |
714 | /* Tx Interrupt */ | |
a8884e34 MT |
715 | if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE)) |
716 | ret = sci_tx_interrupt(irq, ptr); | |
1da177e4 | 717 | /* Rx Interrupt */ |
a8884e34 MT |
718 | if ((ssr_status & 0x0002) && (scr_status & SCI_CTRL_FLAGS_RIE)) |
719 | ret = sci_rx_interrupt(irq, ptr); | |
1da177e4 | 720 | /* Error Interrupt */ |
a8884e34 MT |
721 | if ((ssr_status & 0x0080) && (scr_status & SCI_CTRL_FLAGS_REIE)) |
722 | ret = sci_er_interrupt(irq, ptr); | |
1da177e4 | 723 | /* Break Interrupt */ |
a8884e34 MT |
724 | if ((ssr_status & 0x0010) && (scr_status & SCI_CTRL_FLAGS_REIE)) |
725 | ret = sci_br_interrupt(irq, ptr); | |
1da177e4 | 726 | |
a8884e34 | 727 | return ret; |
1da177e4 LT |
728 | } |
729 | ||
027e6872 | 730 | #ifdef CONFIG_HAVE_CLK |
1da177e4 LT |
731 | /* |
732 | * Here we define a transistion notifier so that we can update all of our | |
733 | * ports' baud rate when the peripheral clock changes. | |
734 | */ | |
e108b2ca PM |
735 | static int sci_notifier(struct notifier_block *self, |
736 | unsigned long phase, void *p) | |
1da177e4 | 737 | { |
e552de24 MD |
738 | struct sh_sci_priv *priv = container_of(self, |
739 | struct sh_sci_priv, clk_nb); | |
740 | struct sci_port *sci_port; | |
741 | unsigned long flags; | |
1da177e4 LT |
742 | |
743 | if ((phase == CPUFREQ_POSTCHANGE) || | |
e552de24 MD |
744 | (phase == CPUFREQ_RESUMECHANGE)) { |
745 | spin_lock_irqsave(&priv->lock, flags); | |
746 | list_for_each_entry(sci_port, &priv->ports, node) | |
501b825d | 747 | sci_port->port.uartclk = clk_get_rate(sci_port->dclk); |
e552de24 MD |
748 | |
749 | spin_unlock_irqrestore(&priv->lock, flags); | |
750 | } | |
1da177e4 | 751 | |
1da177e4 LT |
752 | return NOTIFY_OK; |
753 | } | |
501b825d MD |
754 | |
755 | static void sci_clk_enable(struct uart_port *port) | |
756 | { | |
757 | struct sci_port *sci_port = to_sci_port(port); | |
758 | ||
759 | clk_enable(sci_port->dclk); | |
760 | sci_port->port.uartclk = clk_get_rate(sci_port->dclk); | |
761 | ||
762 | if (sci_port->iclk) | |
763 | clk_enable(sci_port->iclk); | |
764 | } | |
765 | ||
766 | static void sci_clk_disable(struct uart_port *port) | |
767 | { | |
768 | struct sci_port *sci_port = to_sci_port(port); | |
769 | ||
770 | if (sci_port->iclk) | |
771 | clk_disable(sci_port->iclk); | |
772 | ||
773 | clk_disable(sci_port->dclk); | |
774 | } | |
027e6872 | 775 | #endif |
1da177e4 LT |
776 | |
777 | static int sci_request_irq(struct sci_port *port) | |
778 | { | |
779 | int i; | |
7d12e780 | 780 | irqreturn_t (*handlers[4])(int irq, void *ptr) = { |
1da177e4 LT |
781 | sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt, |
782 | sci_br_interrupt, | |
783 | }; | |
784 | const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full", | |
785 | "SCI Transmit Data Empty", "SCI Break" }; | |
786 | ||
787 | if (port->irqs[0] == port->irqs[1]) { | |
762c69e3 | 788 | if (unlikely(!port->irqs[0])) |
1da177e4 | 789 | return -ENODEV; |
e108b2ca PM |
790 | |
791 | if (request_irq(port->irqs[0], sci_mpxed_interrupt, | |
35f3c518 | 792 | IRQF_DISABLED, "sci", port)) { |
762c69e3 | 793 | dev_err(port->port.dev, "Can't allocate IRQ\n"); |
1da177e4 LT |
794 | return -ENODEV; |
795 | } | |
796 | } else { | |
797 | for (i = 0; i < ARRAY_SIZE(handlers); i++) { | |
762c69e3 | 798 | if (unlikely(!port->irqs[i])) |
1da177e4 | 799 | continue; |
762c69e3 | 800 | |
e108b2ca | 801 | if (request_irq(port->irqs[i], handlers[i], |
35f3c518 | 802 | IRQF_DISABLED, desc[i], port)) { |
762c69e3 | 803 | dev_err(port->port.dev, "Can't allocate IRQ\n"); |
1da177e4 LT |
804 | return -ENODEV; |
805 | } | |
806 | } | |
807 | } | |
808 | ||
809 | return 0; | |
810 | } | |
811 | ||
812 | static void sci_free_irq(struct sci_port *port) | |
813 | { | |
814 | int i; | |
815 | ||
762c69e3 PM |
816 | if (port->irqs[0] == port->irqs[1]) |
817 | free_irq(port->irqs[0], port); | |
818 | else { | |
1da177e4 LT |
819 | for (i = 0; i < ARRAY_SIZE(port->irqs); i++) { |
820 | if (!port->irqs[i]) | |
821 | continue; | |
822 | ||
823 | free_irq(port->irqs[i], port); | |
824 | } | |
825 | } | |
826 | } | |
827 | ||
828 | static unsigned int sci_tx_empty(struct uart_port *port) | |
829 | { | |
830 | /* Can't detect */ | |
831 | return TIOCSER_TEMT; | |
832 | } | |
833 | ||
834 | static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
835 | { | |
836 | /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */ | |
837 | /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */ | |
838 | /* If you have signals for DTR and DCD, please implement here. */ | |
839 | } | |
840 | ||
841 | static unsigned int sci_get_mctrl(struct uart_port *port) | |
842 | { | |
843 | /* This routine is used for geting signals of: DTR, DCD, DSR, RI, | |
844 | and CTS/RTS */ | |
845 | ||
846 | return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; | |
847 | } | |
848 | ||
b129a8cc | 849 | static void sci_start_tx(struct uart_port *port) |
1da177e4 | 850 | { |
e108b2ca | 851 | unsigned short ctrl; |
1da177e4 | 852 | |
e108b2ca PM |
853 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ |
854 | ctrl = sci_in(port, SCSCR); | |
855 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
856 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
857 | } |
858 | ||
b129a8cc | 859 | static void sci_stop_tx(struct uart_port *port) |
1da177e4 | 860 | { |
1da177e4 LT |
861 | unsigned short ctrl; |
862 | ||
863 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
864 | ctrl = sci_in(port, SCSCR); |
865 | ctrl &= ~SCI_CTRL_FLAGS_TIE; | |
866 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
867 | } |
868 | ||
869 | static void sci_start_rx(struct uart_port *port, unsigned int tty_start) | |
870 | { | |
1da177e4 LT |
871 | unsigned short ctrl; |
872 | ||
873 | /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
874 | ctrl = sci_in(port, SCSCR); |
875 | ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE; | |
876 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
877 | } |
878 | ||
879 | static void sci_stop_rx(struct uart_port *port) | |
880 | { | |
1da177e4 LT |
881 | unsigned short ctrl; |
882 | ||
883 | /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
884 | ctrl = sci_in(port, SCSCR); |
885 | ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); | |
886 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
887 | } |
888 | ||
889 | static void sci_enable_ms(struct uart_port *port) | |
890 | { | |
891 | /* Nothing here yet .. */ | |
892 | } | |
893 | ||
894 | static void sci_break_ctl(struct uart_port *port, int break_state) | |
895 | { | |
896 | /* Nothing here yet .. */ | |
897 | } | |
898 | ||
899 | static int sci_startup(struct uart_port *port) | |
900 | { | |
a5660ada | 901 | struct sci_port *s = to_sci_port(port); |
1da177e4 | 902 | |
e108b2ca PM |
903 | if (s->enable) |
904 | s->enable(port); | |
1da177e4 LT |
905 | |
906 | sci_request_irq(s); | |
d656901b | 907 | sci_start_tx(port); |
1da177e4 LT |
908 | sci_start_rx(port, 1); |
909 | ||
910 | return 0; | |
911 | } | |
912 | ||
913 | static void sci_shutdown(struct uart_port *port) | |
914 | { | |
a5660ada | 915 | struct sci_port *s = to_sci_port(port); |
1da177e4 LT |
916 | |
917 | sci_stop_rx(port); | |
b129a8cc | 918 | sci_stop_tx(port); |
1da177e4 LT |
919 | sci_free_irq(s); |
920 | ||
e108b2ca PM |
921 | if (s->disable) |
922 | s->disable(port); | |
1da177e4 LT |
923 | } |
924 | ||
606d099c AC |
925 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, |
926 | struct ktermios *old) | |
1da177e4 | 927 | { |
1da177e4 | 928 | unsigned int status, baud, smr_val; |
a2159b52 | 929 | int t = -1; |
1da177e4 LT |
930 | |
931 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | |
a2159b52 PM |
932 | if (likely(baud)) |
933 | t = SCBRR_VALUE(baud, port->uartclk); | |
e108b2ca | 934 | |
1da177e4 LT |
935 | do { |
936 | status = sci_in(port, SCxSR); | |
937 | } while (!(status & SCxSR_TEND(port))); | |
938 | ||
939 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ | |
940 | ||
1a22f08d | 941 | if (port->type != PORT_SCI) |
1da177e4 | 942 | sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); |
1da177e4 LT |
943 | |
944 | smr_val = sci_in(port, SCSMR) & 3; | |
945 | if ((termios->c_cflag & CSIZE) == CS7) | |
946 | smr_val |= 0x40; | |
947 | if (termios->c_cflag & PARENB) | |
948 | smr_val |= 0x20; | |
949 | if (termios->c_cflag & PARODD) | |
950 | smr_val |= 0x30; | |
951 | if (termios->c_cflag & CSTOPB) | |
952 | smr_val |= 0x08; | |
953 | ||
954 | uart_update_timeout(port, termios->c_cflag, baud); | |
955 | ||
956 | sci_out(port, SCSMR, smr_val); | |
957 | ||
1da177e4 | 958 | if (t > 0) { |
e7c98dc7 | 959 | if (t >= 256) { |
1da177e4 LT |
960 | sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); |
961 | t >>= 2; | |
e7c98dc7 | 962 | } else |
1da177e4 | 963 | sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3); |
e7c98dc7 | 964 | |
1da177e4 LT |
965 | sci_out(port, SCBRR, t); |
966 | udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ | |
967 | } | |
968 | ||
d5701647 PM |
969 | sci_init_pins(port, termios->c_cflag); |
970 | sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0); | |
b7a76e4b | 971 | |
1da177e4 LT |
972 | sci_out(port, SCSCR, SCSCR_INIT(port)); |
973 | ||
974 | if ((termios->c_cflag & CREAD) != 0) | |
e7c98dc7 | 975 | sci_start_rx(port, 0); |
1da177e4 LT |
976 | } |
977 | ||
978 | static const char *sci_type(struct uart_port *port) | |
979 | { | |
980 | switch (port->type) { | |
e7c98dc7 MT |
981 | case PORT_IRDA: |
982 | return "irda"; | |
983 | case PORT_SCI: | |
984 | return "sci"; | |
985 | case PORT_SCIF: | |
986 | return "scif"; | |
987 | case PORT_SCIFA: | |
988 | return "scifa"; | |
1da177e4 LT |
989 | } |
990 | ||
fa43972f | 991 | return NULL; |
1da177e4 LT |
992 | } |
993 | ||
994 | static void sci_release_port(struct uart_port *port) | |
995 | { | |
996 | /* Nothing here yet .. */ | |
997 | } | |
998 | ||
999 | static int sci_request_port(struct uart_port *port) | |
1000 | { | |
1001 | /* Nothing here yet .. */ | |
1002 | return 0; | |
1003 | } | |
1004 | ||
1005 | static void sci_config_port(struct uart_port *port, int flags) | |
1006 | { | |
a5660ada | 1007 | struct sci_port *s = to_sci_port(port); |
1da177e4 LT |
1008 | |
1009 | port->type = s->type; | |
1010 | ||
08f8cb31 MD |
1011 | if (port->membase) |
1012 | return; | |
1013 | ||
1014 | if (port->flags & UPF_IOREMAP) { | |
7ff731ae | 1015 | port->membase = ioremap_nocache(port->mapbase, 0x40); |
08f8cb31 MD |
1016 | |
1017 | if (IS_ERR(port->membase)) | |
1018 | dev_err(port->dev, "can't remap port#%d\n", port->line); | |
1019 | } else { | |
1020 | /* | |
1021 | * For the simple (and majority of) cases where we don't | |
1022 | * need to do any remapping, just cast the cookie | |
1023 | * directly. | |
1024 | */ | |
1025 | port->membase = (void __iomem *)port->mapbase; | |
7ff731ae | 1026 | } |
1da177e4 LT |
1027 | } |
1028 | ||
1029 | static int sci_verify_port(struct uart_port *port, struct serial_struct *ser) | |
1030 | { | |
a5660ada | 1031 | struct sci_port *s = to_sci_port(port); |
1da177e4 | 1032 | |
a62c4133 | 1033 | if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs) |
1da177e4 LT |
1034 | return -EINVAL; |
1035 | if (ser->baud_base < 2400) | |
1036 | /* No paper tape reader for Mitch.. */ | |
1037 | return -EINVAL; | |
1038 | ||
1039 | return 0; | |
1040 | } | |
1041 | ||
1042 | static struct uart_ops sci_uart_ops = { | |
1043 | .tx_empty = sci_tx_empty, | |
1044 | .set_mctrl = sci_set_mctrl, | |
1045 | .get_mctrl = sci_get_mctrl, | |
1046 | .start_tx = sci_start_tx, | |
1047 | .stop_tx = sci_stop_tx, | |
1048 | .stop_rx = sci_stop_rx, | |
1049 | .enable_ms = sci_enable_ms, | |
1050 | .break_ctl = sci_break_ctl, | |
1051 | .startup = sci_startup, | |
1052 | .shutdown = sci_shutdown, | |
1053 | .set_termios = sci_set_termios, | |
1054 | .type = sci_type, | |
1055 | .release_port = sci_release_port, | |
1056 | .request_port = sci_request_port, | |
1057 | .config_port = sci_config_port, | |
1058 | .verify_port = sci_verify_port, | |
07d2a1a1 PM |
1059 | #ifdef CONFIG_CONSOLE_POLL |
1060 | .poll_get_char = sci_poll_get_char, | |
1061 | .poll_put_char = sci_poll_put_char, | |
1062 | #endif | |
1da177e4 LT |
1063 | }; |
1064 | ||
501b825d MD |
1065 | static void __devinit sci_init_single(struct platform_device *dev, |
1066 | struct sci_port *sci_port, | |
08f8cb31 MD |
1067 | unsigned int index, |
1068 | struct plat_sci_port *p) | |
e108b2ca | 1069 | { |
7ed7e071 MD |
1070 | sci_port->port.ops = &sci_uart_ops; |
1071 | sci_port->port.iotype = UPIO_MEM; | |
1072 | sci_port->port.line = index; | |
1073 | sci_port->port.fifosize = 1; | |
e108b2ca PM |
1074 | |
1075 | #if defined(__H8300H__) || defined(__H8300S__) | |
1076 | #ifdef __H8300S__ | |
7ed7e071 MD |
1077 | sci_port->enable = h8300_sci_enable; |
1078 | sci_port->disable = h8300_sci_disable; | |
e108b2ca | 1079 | #endif |
7ed7e071 | 1080 | sci_port->port.uartclk = CONFIG_CPU_CLOCK; |
a2159b52 | 1081 | #elif defined(CONFIG_HAVE_CLK) |
501b825d MD |
1082 | sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL; |
1083 | sci_port->dclk = clk_get(&dev->dev, "module_clk"); | |
1084 | sci_port->enable = sci_clk_enable; | |
1085 | sci_port->disable = sci_clk_disable; | |
a2159b52 PM |
1086 | #else |
1087 | #error "Need a valid uartclk" | |
1da177e4 | 1088 | #endif |
e108b2ca | 1089 | |
7ed7e071 MD |
1090 | sci_port->break_timer.data = (unsigned long)sci_port; |
1091 | sci_port->break_timer.function = sci_break_timer; | |
1092 | init_timer(&sci_port->break_timer); | |
1093 | ||
1094 | sci_port->port.mapbase = p->mapbase; | |
7ed7e071 MD |
1095 | sci_port->port.membase = p->membase; |
1096 | ||
1097 | sci_port->port.irq = p->irqs[SCIx_TXI_IRQ]; | |
1098 | sci_port->port.flags = p->flags; | |
501b825d | 1099 | sci_port->port.dev = &dev->dev; |
7ed7e071 MD |
1100 | sci_port->type = sci_port->port.type = p->type; |
1101 | ||
1102 | memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs)); | |
501b825d | 1103 | |
e108b2ca PM |
1104 | } |
1105 | ||
1da177e4 | 1106 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE |
dc8e6f5b MD |
1107 | static struct tty_driver *serial_console_device(struct console *co, int *index) |
1108 | { | |
1109 | struct uart_driver *p = &sci_uart_driver; | |
1110 | *index = co->index; | |
1111 | return p->tty_driver; | |
1112 | } | |
1113 | ||
1114 | static void serial_console_putchar(struct uart_port *port, int ch) | |
1115 | { | |
1116 | sci_poll_put_char(port, ch); | |
1117 | } | |
1118 | ||
1da177e4 LT |
1119 | /* |
1120 | * Print a string to the serial port trying not to disturb | |
1121 | * any possible real use of the port... | |
1122 | */ | |
1123 | static void serial_console_write(struct console *co, const char *s, | |
1124 | unsigned count) | |
1125 | { | |
dc8e6f5b | 1126 | struct uart_port *port = co->data; |
501b825d | 1127 | struct sci_port *sci_port = to_sci_port(port); |
973e5d52 | 1128 | unsigned short bits; |
07d2a1a1 | 1129 | |
501b825d MD |
1130 | if (sci_port->enable) |
1131 | sci_port->enable(port); | |
1132 | ||
1133 | uart_console_write(port, s, count, serial_console_putchar); | |
973e5d52 MD |
1134 | |
1135 | /* wait until fifo is empty and last bit has been transmitted */ | |
1136 | bits = SCxSR_TDxE(port) | SCxSR_TEND(port); | |
1137 | while ((sci_in(port, SCxSR) & bits) != bits) | |
1138 | cpu_relax(); | |
501b825d MD |
1139 | |
1140 | if (sci_port->disable); | |
1141 | sci_port->disable(port); | |
1da177e4 LT |
1142 | } |
1143 | ||
1144 | static int __init serial_console_setup(struct console *co, char *options) | |
1145 | { | |
dc8e6f5b | 1146 | struct sci_port *sci_port; |
1da177e4 LT |
1147 | struct uart_port *port; |
1148 | int baud = 115200; | |
1149 | int bits = 8; | |
1150 | int parity = 'n'; | |
1151 | int flow = 'n'; | |
1152 | int ret; | |
1153 | ||
e108b2ca PM |
1154 | /* |
1155 | * Check whether an invalid uart number has been specified, and | |
1156 | * if so, search for the first available port that does have | |
1157 | * console support. | |
1158 | */ | |
1159 | if (co->index >= SCI_NPORTS) | |
1160 | co->index = 0; | |
1161 | ||
dc8e6f5b MD |
1162 | sci_port = &sci_ports[co->index]; |
1163 | port = &sci_port->port; | |
1164 | co->data = port; | |
1da177e4 LT |
1165 | |
1166 | /* | |
e108b2ca PM |
1167 | * Also need to check port->type, we don't actually have any |
1168 | * UPIO_PORT ports, but uart_report_port() handily misreports | |
1169 | * it anyways if we don't have a port available by the time this is | |
1170 | * called. | |
1da177e4 | 1171 | */ |
e108b2ca PM |
1172 | if (!port->type) |
1173 | return -ENODEV; | |
e108b2ca | 1174 | |
08f8cb31 | 1175 | sci_config_port(port, 0); |
e108b2ca | 1176 | |
dc8e6f5b MD |
1177 | if (sci_port->enable) |
1178 | sci_port->enable(port); | |
b7a76e4b | 1179 | |
1da177e4 LT |
1180 | if (options) |
1181 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1182 | ||
1183 | ret = uart_set_options(port, co, baud, parity, bits, flow); | |
1184 | #if defined(__H8300H__) || defined(__H8300S__) | |
1185 | /* disable rx interrupt */ | |
1186 | if (ret == 0) | |
1187 | sci_stop_rx(port); | |
1188 | #endif | |
501b825d | 1189 | /* TODO: disable clock */ |
1da177e4 LT |
1190 | return ret; |
1191 | } | |
1192 | ||
1193 | static struct console serial_console = { | |
1194 | .name = "ttySC", | |
dc8e6f5b | 1195 | .device = serial_console_device, |
1da177e4 LT |
1196 | .write = serial_console_write, |
1197 | .setup = serial_console_setup, | |
fa5da2f7 | 1198 | .flags = CON_PRINTBUFFER, |
1da177e4 | 1199 | .index = -1, |
1da177e4 LT |
1200 | }; |
1201 | ||
1202 | static int __init sci_console_init(void) | |
1203 | { | |
1204 | register_console(&serial_console); | |
1205 | return 0; | |
1206 | } | |
1da177e4 LT |
1207 | console_initcall(sci_console_init); |
1208 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | |
1209 | ||
07d2a1a1 | 1210 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) |
e7c98dc7 | 1211 | #define SCI_CONSOLE (&serial_console) |
1da177e4 | 1212 | #else |
b7a76e4b | 1213 | #define SCI_CONSOLE 0 |
1da177e4 LT |
1214 | #endif |
1215 | ||
1216 | static char banner[] __initdata = | |
1217 | KERN_INFO "SuperH SCI(F) driver initialized\n"; | |
1218 | ||
1219 | static struct uart_driver sci_uart_driver = { | |
1220 | .owner = THIS_MODULE, | |
1221 | .driver_name = "sci", | |
1da177e4 LT |
1222 | .dev_name = "ttySC", |
1223 | .major = SCI_MAJOR, | |
1224 | .minor = SCI_MINOR_START, | |
e108b2ca | 1225 | .nr = SCI_NPORTS, |
1da177e4 LT |
1226 | .cons = SCI_CONSOLE, |
1227 | }; | |
1228 | ||
e552de24 MD |
1229 | |
1230 | static int __devexit sci_remove(struct platform_device *dev) | |
1231 | { | |
1232 | struct sh_sci_priv *priv = platform_get_drvdata(dev); | |
1233 | struct sci_port *p; | |
1234 | unsigned long flags; | |
1235 | ||
1236 | #ifdef CONFIG_HAVE_CLK | |
1237 | cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); | |
1238 | #endif | |
1239 | ||
1240 | spin_lock_irqsave(&priv->lock, flags); | |
1241 | list_for_each_entry(p, &priv->ports, node) | |
1242 | uart_remove_one_port(&sci_uart_driver, &p->port); | |
1243 | ||
1244 | spin_unlock_irqrestore(&priv->lock, flags); | |
1245 | ||
1246 | kfree(priv); | |
1247 | return 0; | |
1248 | } | |
1249 | ||
0ee70712 MD |
1250 | static int __devinit sci_probe_single(struct platform_device *dev, |
1251 | unsigned int index, | |
1252 | struct plat_sci_port *p, | |
1253 | struct sci_port *sciport) | |
1254 | { | |
1255 | struct sh_sci_priv *priv = platform_get_drvdata(dev); | |
1256 | unsigned long flags; | |
1257 | int ret; | |
1258 | ||
1259 | /* Sanity check */ | |
1260 | if (unlikely(index >= SCI_NPORTS)) { | |
1261 | dev_notice(&dev->dev, "Attempting to register port " | |
1262 | "%d when only %d are available.\n", | |
1263 | index+1, SCI_NPORTS); | |
1264 | dev_notice(&dev->dev, "Consider bumping " | |
1265 | "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); | |
1266 | return 0; | |
1267 | } | |
1268 | ||
501b825d | 1269 | sci_init_single(dev, sciport, index, p); |
0ee70712 MD |
1270 | |
1271 | ret = uart_add_one_port(&sci_uart_driver, &sciport->port); | |
08f8cb31 | 1272 | if (ret) |
0ee70712 | 1273 | return ret; |
0ee70712 MD |
1274 | |
1275 | INIT_LIST_HEAD(&sciport->node); | |
1276 | ||
1277 | spin_lock_irqsave(&priv->lock, flags); | |
1278 | list_add(&sciport->node, &priv->ports); | |
1279 | spin_unlock_irqrestore(&priv->lock, flags); | |
1280 | ||
1281 | return 0; | |
1282 | } | |
1283 | ||
e108b2ca PM |
1284 | /* |
1285 | * Register a set of serial devices attached to a platform device. The | |
1286 | * list is terminated with a zero flags entry, which means we expect | |
1287 | * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need | |
1288 | * remapping (such as sh64) should also set UPF_IOREMAP. | |
1289 | */ | |
1290 | static int __devinit sci_probe(struct platform_device *dev) | |
1da177e4 | 1291 | { |
e108b2ca | 1292 | struct plat_sci_port *p = dev->dev.platform_data; |
e552de24 | 1293 | struct sh_sci_priv *priv; |
7ff731ae | 1294 | int i, ret = -EINVAL; |
e552de24 MD |
1295 | |
1296 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
1297 | if (!priv) | |
1298 | return -ENOMEM; | |
1299 | ||
1300 | INIT_LIST_HEAD(&priv->ports); | |
1301 | spin_lock_init(&priv->lock); | |
1302 | platform_set_drvdata(dev, priv); | |
1303 | ||
1304 | #ifdef CONFIG_HAVE_CLK | |
1305 | priv->clk_nb.notifier_call = sci_notifier; | |
1306 | cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); | |
1307 | #endif | |
1da177e4 | 1308 | |
0ee70712 MD |
1309 | if (dev->id != -1) { |
1310 | ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]); | |
1311 | if (ret) | |
e552de24 | 1312 | goto err_unreg; |
0ee70712 MD |
1313 | } else { |
1314 | for (i = 0; p && p->flags != 0; p++, i++) { | |
1315 | ret = sci_probe_single(dev, i, p, &sci_ports[i]); | |
1316 | if (ret) | |
1317 | goto err_unreg; | |
e552de24 | 1318 | } |
e552de24 | 1319 | } |
1da177e4 LT |
1320 | |
1321 | #ifdef CONFIG_SH_STANDARD_BIOS | |
1322 | sh_bios_gdb_detach(); | |
1323 | #endif | |
1324 | ||
e108b2ca | 1325 | return 0; |
7ff731ae PM |
1326 | |
1327 | err_unreg: | |
e552de24 | 1328 | sci_remove(dev); |
7ff731ae | 1329 | return ret; |
1da177e4 LT |
1330 | } |
1331 | ||
e108b2ca | 1332 | static int sci_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 1333 | { |
e552de24 MD |
1334 | struct sh_sci_priv *priv = platform_get_drvdata(dev); |
1335 | struct sci_port *p; | |
1336 | unsigned long flags; | |
e108b2ca | 1337 | |
e552de24 MD |
1338 | spin_lock_irqsave(&priv->lock, flags); |
1339 | list_for_each_entry(p, &priv->ports, node) | |
1340 | uart_suspend_port(&sci_uart_driver, &p->port); | |
e108b2ca | 1341 | |
e552de24 | 1342 | spin_unlock_irqrestore(&priv->lock, flags); |
1da177e4 | 1343 | |
e108b2ca PM |
1344 | return 0; |
1345 | } | |
1da177e4 | 1346 | |
e108b2ca PM |
1347 | static int sci_resume(struct platform_device *dev) |
1348 | { | |
e552de24 MD |
1349 | struct sh_sci_priv *priv = platform_get_drvdata(dev); |
1350 | struct sci_port *p; | |
1351 | unsigned long flags; | |
e108b2ca | 1352 | |
e552de24 MD |
1353 | spin_lock_irqsave(&priv->lock, flags); |
1354 | list_for_each_entry(p, &priv->ports, node) | |
1355 | uart_resume_port(&sci_uart_driver, &p->port); | |
e108b2ca | 1356 | |
e552de24 | 1357 | spin_unlock_irqrestore(&priv->lock, flags); |
e108b2ca PM |
1358 | |
1359 | return 0; | |
1360 | } | |
1361 | ||
1362 | static struct platform_driver sci_driver = { | |
1363 | .probe = sci_probe, | |
1364 | .remove = __devexit_p(sci_remove), | |
1365 | .suspend = sci_suspend, | |
1366 | .resume = sci_resume, | |
1367 | .driver = { | |
1368 | .name = "sh-sci", | |
1369 | .owner = THIS_MODULE, | |
1370 | }, | |
1371 | }; | |
1372 | ||
1373 | static int __init sci_init(void) | |
1374 | { | |
1375 | int ret; | |
1376 | ||
1377 | printk(banner); | |
1378 | ||
e108b2ca PM |
1379 | ret = uart_register_driver(&sci_uart_driver); |
1380 | if (likely(ret == 0)) { | |
1381 | ret = platform_driver_register(&sci_driver); | |
1382 | if (unlikely(ret)) | |
1383 | uart_unregister_driver(&sci_uart_driver); | |
1384 | } | |
1385 | ||
1386 | return ret; | |
1387 | } | |
1388 | ||
1389 | static void __exit sci_exit(void) | |
1390 | { | |
1391 | platform_driver_unregister(&sci_driver); | |
1da177e4 LT |
1392 | uart_unregister_driver(&sci_uart_driver); |
1393 | } | |
1394 | ||
1395 | module_init(sci_init); | |
1396 | module_exit(sci_exit); | |
1397 | ||
e108b2ca | 1398 | MODULE_LICENSE("GPL"); |
e169c139 | 1399 | MODULE_ALIAS("platform:sh-sci"); |