Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/serial/sh-sci.c | |
3 | * | |
4 | * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO) | |
5 | * | |
e108b2ca | 6 | * Copyright (C) 2002 - 2006 Paul Mundt |
1da177e4 LT |
7 | * |
8 | * based off of the old drivers/char/sh-sci.c by: | |
9 | * | |
10 | * Copyright (C) 1999, 2000 Niibe Yutaka | |
11 | * Copyright (C) 2000 Sugioka Toshinobu | |
12 | * Modified to support multiple serial ports. Stuart Menefy (May 2000). | |
13 | * Modified to support SecureEdge. David McCullough (2002) | |
14 | * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003). | |
d89ddd1c | 15 | * Removed SH7300 support (Jul 2007). |
1da177e4 LT |
16 | * |
17 | * This file is subject to the terms and conditions of the GNU General Public | |
18 | * License. See the file "COPYING" in the main directory of this archive | |
19 | * for more details. | |
20 | */ | |
0b3d4ef6 PM |
21 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
22 | #define SUPPORT_SYSRQ | |
23 | #endif | |
1da177e4 LT |
24 | |
25 | #undef DEBUG | |
26 | ||
1da177e4 LT |
27 | #include <linux/module.h> |
28 | #include <linux/errno.h> | |
1da177e4 LT |
29 | #include <linux/timer.h> |
30 | #include <linux/interrupt.h> | |
31 | #include <linux/tty.h> | |
32 | #include <linux/tty_flip.h> | |
33 | #include <linux/serial.h> | |
34 | #include <linux/major.h> | |
35 | #include <linux/string.h> | |
36 | #include <linux/sysrq.h> | |
1da177e4 LT |
37 | #include <linux/ioport.h> |
38 | #include <linux/mm.h> | |
1da177e4 LT |
39 | #include <linux/init.h> |
40 | #include <linux/delay.h> | |
41 | #include <linux/console.h> | |
e108b2ca | 42 | #include <linux/platform_device.h> |
1da177e4 LT |
43 | |
44 | #ifdef CONFIG_CPU_FREQ | |
45 | #include <linux/notifier.h> | |
46 | #include <linux/cpufreq.h> | |
47 | #endif | |
48 | ||
b7a76e4b | 49 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) |
fa5da2f7 | 50 | #include <linux/ctype.h> |
b7a76e4b | 51 | #include <asm/clock.h> |
1da177e4 | 52 | #include <asm/sh_bios.h> |
e108b2ca | 53 | #include <asm/kgdb.h> |
1da177e4 LT |
54 | #endif |
55 | ||
e108b2ca | 56 | #include <asm/sci.h> |
1da177e4 LT |
57 | #include "sh-sci.h" |
58 | ||
e108b2ca PM |
59 | struct sci_port { |
60 | struct uart_port port; | |
61 | ||
62 | /* Port type */ | |
63 | unsigned int type; | |
64 | ||
65 | /* Port IRQs: ERI, RXI, TXI, BRI (optional) */ | |
32351a28 | 66 | unsigned int irqs[SCIx_NR_IRQS]; |
e108b2ca PM |
67 | |
68 | /* Port pin configuration */ | |
69 | void (*init_pins)(struct uart_port *port, | |
70 | unsigned int cflag); | |
1da177e4 | 71 | |
e108b2ca PM |
72 | /* Port enable callback */ |
73 | void (*enable)(struct uart_port *port); | |
74 | ||
75 | /* Port disable callback */ | |
76 | void (*disable)(struct uart_port *port); | |
77 | ||
78 | /* Break timer */ | |
79 | struct timer_list break_timer; | |
80 | int break_flag; | |
1534a3b3 | 81 | |
005a336e | 82 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) |
1534a3b3 | 83 | /* Port clock */ |
84 | struct clk *clk; | |
005a336e | 85 | #endif |
e108b2ca PM |
86 | }; |
87 | ||
88 | #ifdef CONFIG_SH_KGDB | |
1da177e4 | 89 | static struct sci_port *kgdb_sci_port; |
e108b2ca | 90 | #endif |
1da177e4 LT |
91 | |
92 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | |
e108b2ca PM |
93 | static struct sci_port *serial_console_port; |
94 | #endif | |
1da177e4 LT |
95 | |
96 | /* Function prototypes */ | |
b129a8cc | 97 | static void sci_stop_tx(struct uart_port *port); |
1da177e4 | 98 | |
e108b2ca | 99 | #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS |
b7a76e4b | 100 | |
e108b2ca PM |
101 | static struct sci_port sci_ports[SCI_NPORTS]; |
102 | static struct uart_driver sci_uart_driver; | |
1da177e4 | 103 | |
e108b2ca PM |
104 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \ |
105 | defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) | |
106 | static inline void handle_error(struct uart_port *port) | |
107 | { | |
108 | /* Clear error flags */ | |
1da177e4 LT |
109 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); |
110 | } | |
111 | ||
112 | static int get_char(struct uart_port *port) | |
113 | { | |
114 | unsigned long flags; | |
115 | unsigned short status; | |
116 | int c; | |
117 | ||
e108b2ca PM |
118 | spin_lock_irqsave(&port->lock, flags); |
119 | do { | |
1da177e4 LT |
120 | status = sci_in(port, SCxSR); |
121 | if (status & SCxSR_ERRORS(port)) { | |
122 | handle_error(port); | |
123 | continue; | |
124 | } | |
125 | } while (!(status & SCxSR_RDxF(port))); | |
126 | c = sci_in(port, SCxRDR); | |
127 | sci_in(port, SCxSR); /* Dummy read */ | |
128 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
e108b2ca | 129 | spin_unlock_irqrestore(&port->lock, flags); |
1da177e4 LT |
130 | |
131 | return c; | |
132 | } | |
1da177e4 LT |
133 | #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */ |
134 | ||
e108b2ca | 135 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB) |
1da177e4 LT |
136 | static void put_char(struct uart_port *port, char c) |
137 | { | |
138 | unsigned long flags; | |
139 | unsigned short status; | |
140 | ||
e108b2ca | 141 | spin_lock_irqsave(&port->lock, flags); |
1da177e4 LT |
142 | |
143 | do { | |
144 | status = sci_in(port, SCxSR); | |
145 | } while (!(status & SCxSR_TDxE(port))); | |
146 | ||
147 | sci_out(port, SCxTDR, c); | |
148 | sci_in(port, SCxSR); /* Dummy read */ | |
149 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
150 | ||
e108b2ca | 151 | spin_unlock_irqrestore(&port->lock, flags); |
1da177e4 | 152 | } |
e108b2ca | 153 | #endif |
1da177e4 | 154 | |
e108b2ca | 155 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE |
1da177e4 LT |
156 | static void put_string(struct sci_port *sci_port, const char *buffer, int count) |
157 | { | |
158 | struct uart_port *port = &sci_port->port; | |
159 | const unsigned char *p = buffer; | |
160 | int i; | |
161 | ||
162 | #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) | |
163 | int checksum; | |
164 | int usegdb=0; | |
165 | ||
166 | #ifdef CONFIG_SH_STANDARD_BIOS | |
b7a76e4b | 167 | /* This call only does a trap the first time it is |
1da177e4 LT |
168 | * called, and so is safe to do here unconditionally |
169 | */ | |
170 | usegdb |= sh_bios_in_gdb_mode(); | |
171 | #endif | |
172 | #ifdef CONFIG_SH_KGDB | |
fa5da2f7 | 173 | usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port)); |
1da177e4 LT |
174 | #endif |
175 | ||
176 | if (usegdb) { | |
177 | /* $<packet info>#<checksum>. */ | |
178 | do { | |
179 | unsigned char c; | |
180 | put_char(port, '$'); | |
181 | put_char(port, 'O'); /* 'O'utput to console */ | |
182 | checksum = 'O'; | |
183 | ||
184 | for (i=0; i<count; i++) { /* Don't use run length encoding */ | |
185 | int h, l; | |
186 | ||
187 | c = *p++; | |
188 | h = highhex(c); | |
189 | l = lowhex(c); | |
190 | put_char(port, h); | |
191 | put_char(port, l); | |
192 | checksum += h + l; | |
193 | } | |
194 | put_char(port, '#'); | |
195 | put_char(port, highhex(checksum)); | |
196 | put_char(port, lowhex(checksum)); | |
197 | } while (get_char(port) != '+'); | |
198 | } else | |
199 | #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */ | |
200 | for (i=0; i<count; i++) { | |
201 | if (*p == 10) | |
202 | put_char(port, '\r'); | |
203 | put_char(port, *p++); | |
204 | } | |
205 | } | |
206 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | |
207 | ||
1da177e4 | 208 | #ifdef CONFIG_SH_KGDB |
1da177e4 LT |
209 | static int kgdb_sci_getchar(void) |
210 | { | |
e108b2ca | 211 | int c; |
1da177e4 LT |
212 | |
213 | /* Keep trying to read a character, this could be neater */ | |
fa5da2f7 | 214 | while ((c = get_char(&kgdb_sci_port->port)) < 0) |
e108b2ca | 215 | cpu_relax(); |
1da177e4 LT |
216 | |
217 | return c; | |
218 | } | |
219 | ||
e108b2ca | 220 | static inline void kgdb_sci_putchar(int c) |
1da177e4 | 221 | { |
fa5da2f7 | 222 | put_char(&kgdb_sci_port->port, c); |
1da177e4 | 223 | } |
1da177e4 LT |
224 | #endif /* CONFIG_SH_KGDB */ |
225 | ||
226 | #if defined(__H8300S__) | |
227 | enum { sci_disable, sci_enable }; | |
228 | ||
e108b2ca | 229 | static void h8300_sci_config(struct uart_port* port, unsigned int ctrl) |
1da177e4 LT |
230 | { |
231 | volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL; | |
232 | int ch = (port->mapbase - SMR0) >> 3; | |
233 | unsigned char mask = 1 << (ch+1); | |
234 | ||
235 | if (ctrl == sci_disable) { | |
236 | *mstpcrl |= mask; | |
237 | } else { | |
238 | *mstpcrl &= ~mask; | |
239 | } | |
240 | } | |
e108b2ca PM |
241 | |
242 | static inline void h8300_sci_enable(struct uart_port *port) | |
243 | { | |
244 | h8300_sci_config(port, sci_enable); | |
245 | } | |
246 | ||
247 | static inline void h8300_sci_disable(struct uart_port *port) | |
248 | { | |
249 | h8300_sci_config(port, sci_disable); | |
250 | } | |
1da177e4 LT |
251 | #endif |
252 | ||
e108b2ca PM |
253 | #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \ |
254 | defined(__H8300H__) || defined(__H8300S__) | |
1da177e4 LT |
255 | static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag) |
256 | { | |
257 | int ch = (port->mapbase - SMR0) >> 3; | |
258 | ||
259 | /* set DDR regs */ | |
e108b2ca PM |
260 | H8300_GPIO_DDR(h8300_sci_pins[ch].port, |
261 | h8300_sci_pins[ch].rx, | |
262 | H8300_GPIO_INPUT); | |
263 | H8300_GPIO_DDR(h8300_sci_pins[ch].port, | |
264 | h8300_sci_pins[ch].tx, | |
265 | H8300_GPIO_OUTPUT); | |
266 | ||
1da177e4 LT |
267 | /* tx mark output*/ |
268 | H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx; | |
269 | } | |
e108b2ca PM |
270 | #else |
271 | #define sci_init_pins_sci NULL | |
272 | #endif | |
273 | ||
274 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) | |
275 | static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) | |
276 | { | |
277 | unsigned int fcr_val = 0; | |
278 | ||
279 | if (cflag & CRTSCTS) | |
280 | fcr_val |= SCFCR_MCE; | |
281 | ||
282 | sci_out(port, SCFCR, fcr_val); | |
283 | } | |
284 | #else | |
285 | #define sci_init_pins_irda NULL | |
1da177e4 | 286 | #endif |
e108b2ca PM |
287 | |
288 | #ifdef SCI_ONLY | |
289 | #define sci_init_pins_scif NULL | |
1da177e4 LT |
290 | #endif |
291 | ||
292 | #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) | |
d89ddd1c | 293 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
9465a54f NI |
294 | static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag) |
295 | { | |
296 | unsigned int fcr_val = 0; | |
297 | ||
298 | set_sh771x_scif_pfc(port); | |
299 | if (cflag & CRTSCTS) { | |
300 | fcr_val |= SCFCR_MCE; | |
301 | } | |
302 | sci_out(port, SCFCR, fcr_val); | |
303 | } | |
b7a76e4b | 304 | #elif defined(CONFIG_CPU_SH3) |
e108b2ca | 305 | /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ |
1da177e4 LT |
306 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) |
307 | { | |
308 | unsigned int fcr_val = 0; | |
b7a76e4b PM |
309 | unsigned short data; |
310 | ||
311 | /* We need to set SCPCR to enable RTS/CTS */ | |
312 | data = ctrl_inw(SCPCR); | |
313 | /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ | |
314 | ctrl_outw(data & 0x0fcf, SCPCR); | |
1da177e4 | 315 | |
1da177e4 LT |
316 | if (cflag & CRTSCTS) |
317 | fcr_val |= SCFCR_MCE; | |
318 | else { | |
1da177e4 LT |
319 | /* We need to set SCPCR to enable RTS/CTS */ |
320 | data = ctrl_inw(SCPCR); | |
321 | /* Clear out SCP7MD1,0, SCP4MD1,0, | |
322 | Set SCP6MD1,0 = {01} (output) */ | |
b7a76e4b | 323 | ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR); |
1da177e4 LT |
324 | |
325 | data = ctrl_inb(SCPDR); | |
326 | /* Set /RTS2 (bit6) = 0 */ | |
b7a76e4b | 327 | ctrl_outb(data & 0xbf, SCPDR); |
1da177e4 | 328 | } |
b7a76e4b | 329 | |
1da177e4 LT |
330 | sci_out(port, SCFCR, fcr_val); |
331 | } | |
41504c39 PM |
332 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
333 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | |
334 | { | |
335 | unsigned int fcr_val = 0; | |
336 | ||
337 | if (cflag & CRTSCTS) { | |
338 | fcr_val |= SCFCR_MCE; | |
339 | ||
340 | ctrl_outw(0x0000, PORT_PSCR); | |
341 | } else { | |
342 | unsigned short data; | |
343 | ||
344 | data = ctrl_inw(PORT_PSCR); | |
345 | data &= 0x033f; | |
346 | data |= 0x0400; | |
347 | ctrl_outw(data, PORT_PSCR); | |
348 | ||
349 | ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0); | |
350 | } | |
351 | ||
352 | sci_out(port, SCFCR, fcr_val); | |
353 | } | |
1da177e4 | 354 | #else |
1da177e4 LT |
355 | /* For SH7750 */ |
356 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | |
357 | { | |
358 | unsigned int fcr_val = 0; | |
359 | ||
360 | if (cflag & CRTSCTS) { | |
361 | fcr_val |= SCFCR_MCE; | |
362 | } else { | |
e108b2ca PM |
363 | #ifdef CONFIG_CPU_SUBTYPE_SH7343 |
364 | /* Nothing */ | |
2b1bd1ac PM |
365 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
366 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | |
367 | defined(CONFIG_CPU_SUBTYPE_SHX3) | |
b7a76e4b PM |
368 | ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ |
369 | #else | |
1da177e4 | 370 | ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */ |
b7a76e4b | 371 | #endif |
1da177e4 LT |
372 | } |
373 | sci_out(port, SCFCR, fcr_val); | |
374 | } | |
e108b2ca PM |
375 | #endif |
376 | ||
32351a28 PM |
377 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ |
378 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | |
379 | defined(CONFIG_CPU_SUBTYPE_SH7785) | |
e108b2ca PM |
380 | static inline int scif_txroom(struct uart_port *port) |
381 | { | |
382 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f); | |
383 | } | |
384 | ||
385 | static inline int scif_rxroom(struct uart_port *port) | |
386 | { | |
387 | return sci_in(port, SCRFDR) & 0x7f; | |
388 | } | |
389 | #else | |
390 | static inline int scif_txroom(struct uart_port *port) | |
391 | { | |
392 | return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); | |
393 | } | |
1da177e4 | 394 | |
e108b2ca PM |
395 | static inline int scif_rxroom(struct uart_port *port) |
396 | { | |
397 | return sci_in(port, SCFDR) & SCIF_RFDC_MASK; | |
398 | } | |
1da177e4 LT |
399 | #endif |
400 | #endif /* SCIF_ONLY || SCI_AND_SCIF */ | |
401 | ||
e108b2ca PM |
402 | static inline int sci_txroom(struct uart_port *port) |
403 | { | |
404 | return ((sci_in(port, SCxSR) & SCI_TDRE) != 0); | |
405 | } | |
406 | ||
407 | static inline int sci_rxroom(struct uart_port *port) | |
408 | { | |
409 | return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0); | |
410 | } | |
411 | ||
1da177e4 LT |
412 | /* ********************************************************************** * |
413 | * the interrupt related routines * | |
414 | * ********************************************************************** */ | |
415 | ||
416 | static void sci_transmit_chars(struct uart_port *port) | |
417 | { | |
418 | struct circ_buf *xmit = &port->info->xmit; | |
419 | unsigned int stopped = uart_tx_stopped(port); | |
1da177e4 LT |
420 | unsigned short status; |
421 | unsigned short ctrl; | |
e108b2ca | 422 | int count; |
1da177e4 LT |
423 | |
424 | status = sci_in(port, SCxSR); | |
425 | if (!(status & SCxSR_TDxE(port))) { | |
1da177e4 LT |
426 | ctrl = sci_in(port, SCSCR); |
427 | if (uart_circ_empty(xmit)) { | |
428 | ctrl &= ~SCI_CTRL_FLAGS_TIE; | |
429 | } else { | |
430 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
431 | } | |
432 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
433 | return; |
434 | } | |
435 | ||
e108b2ca PM |
436 | #ifndef SCI_ONLY |
437 | if (port->type == PORT_SCIF) | |
438 | count = scif_txroom(port); | |
439 | else | |
1da177e4 | 440 | #endif |
e108b2ca | 441 | count = sci_txroom(port); |
1da177e4 LT |
442 | |
443 | do { | |
444 | unsigned char c; | |
445 | ||
446 | if (port->x_char) { | |
447 | c = port->x_char; | |
448 | port->x_char = 0; | |
449 | } else if (!uart_circ_empty(xmit) && !stopped) { | |
450 | c = xmit->buf[xmit->tail]; | |
451 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
452 | } else { | |
453 | break; | |
454 | } | |
455 | ||
456 | sci_out(port, SCxTDR, c); | |
457 | ||
458 | port->icount.tx++; | |
459 | } while (--count > 0); | |
460 | ||
461 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
462 | ||
463 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
464 | uart_write_wakeup(port); | |
465 | if (uart_circ_empty(xmit)) { | |
b129a8cc | 466 | sci_stop_tx(port); |
1da177e4 | 467 | } else { |
1da177e4 LT |
468 | ctrl = sci_in(port, SCSCR); |
469 | ||
470 | #if !defined(SCI_ONLY) | |
471 | if (port->type == PORT_SCIF) { | |
472 | sci_in(port, SCxSR); /* Dummy read */ | |
473 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
474 | } | |
475 | #endif | |
476 | ||
477 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
478 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
479 | } |
480 | } | |
481 | ||
482 | /* On SH3, SCIF may read end-of-break as a space->mark char */ | |
483 | #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); }) | |
484 | ||
7d12e780 | 485 | static inline void sci_receive_chars(struct uart_port *port) |
1da177e4 | 486 | { |
e108b2ca | 487 | struct sci_port *sci_port = (struct sci_port *)port; |
1da177e4 LT |
488 | struct tty_struct *tty = port->info->tty; |
489 | int i, count, copied = 0; | |
490 | unsigned short status; | |
33f0f88f | 491 | unsigned char flag; |
1da177e4 LT |
492 | |
493 | status = sci_in(port, SCxSR); | |
494 | if (!(status & SCxSR_RDxF(port))) | |
495 | return; | |
496 | ||
497 | while (1) { | |
498 | #if !defined(SCI_ONLY) | |
e108b2ca PM |
499 | if (port->type == PORT_SCIF) |
500 | count = scif_rxroom(port); | |
501 | else | |
1da177e4 | 502 | #endif |
e108b2ca | 503 | count = sci_rxroom(port); |
1da177e4 LT |
504 | |
505 | /* Don't copy more bytes than there is room for in the buffer */ | |
33f0f88f | 506 | count = tty_buffer_request_room(tty, count); |
1da177e4 LT |
507 | |
508 | /* If for any reason we can't copy more data, we're done! */ | |
509 | if (count == 0) | |
510 | break; | |
511 | ||
512 | if (port->type == PORT_SCI) { | |
513 | char c = sci_in(port, SCxRDR); | |
7d12e780 | 514 | if (uart_handle_sysrq_char(port, c) || sci_port->break_flag) |
1da177e4 | 515 | count = 0; |
e108b2ca PM |
516 | else { |
517 | tty_insert_flip_char(tty, c, TTY_NORMAL); | |
1da177e4 LT |
518 | } |
519 | } else { | |
520 | for (i=0; i<count; i++) { | |
521 | char c = sci_in(port, SCxRDR); | |
522 | status = sci_in(port, SCxSR); | |
523 | #if defined(CONFIG_CPU_SH3) | |
524 | /* Skip "chars" during break */ | |
e108b2ca | 525 | if (sci_port->break_flag) { |
1da177e4 LT |
526 | if ((c == 0) && |
527 | (status & SCxSR_FER(port))) { | |
528 | count--; i--; | |
529 | continue; | |
530 | } | |
e108b2ca | 531 | |
1da177e4 LT |
532 | /* Nonzero => end-of-break */ |
533 | pr_debug("scif: debounce<%02x>\n", c); | |
e108b2ca PM |
534 | sci_port->break_flag = 0; |
535 | ||
1da177e4 LT |
536 | if (STEPFN(c)) { |
537 | count--; i--; | |
538 | continue; | |
539 | } | |
540 | } | |
541 | #endif /* CONFIG_CPU_SH3 */ | |
7d12e780 | 542 | if (uart_handle_sysrq_char(port, c)) { |
1da177e4 LT |
543 | count--; i--; |
544 | continue; | |
545 | } | |
546 | ||
547 | /* Store data and status */ | |
1da177e4 | 548 | if (status&SCxSR_FER(port)) { |
33f0f88f | 549 | flag = TTY_FRAME; |
1da177e4 LT |
550 | pr_debug("sci: frame error\n"); |
551 | } else if (status&SCxSR_PER(port)) { | |
33f0f88f | 552 | flag = TTY_PARITY; |
1da177e4 | 553 | pr_debug("sci: parity error\n"); |
33f0f88f AC |
554 | } else |
555 | flag = TTY_NORMAL; | |
556 | tty_insert_flip_char(tty, c, flag); | |
1da177e4 LT |
557 | } |
558 | } | |
559 | ||
560 | sci_in(port, SCxSR); /* dummy read */ | |
561 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
562 | ||
1da177e4 LT |
563 | copied += count; |
564 | port->icount.rx += count; | |
565 | } | |
566 | ||
567 | if (copied) { | |
568 | /* Tell the rest of the system the news. New characters! */ | |
569 | tty_flip_buffer_push(tty); | |
570 | } else { | |
571 | sci_in(port, SCxSR); /* dummy read */ | |
572 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
573 | } | |
574 | } | |
575 | ||
576 | #define SCI_BREAK_JIFFIES (HZ/20) | |
577 | /* The sci generates interrupts during the break, | |
578 | * 1 per millisecond or so during the break period, for 9600 baud. | |
579 | * So dont bother disabling interrupts. | |
580 | * But dont want more than 1 break event. | |
581 | * Use a kernel timer to periodically poll the rx line until | |
582 | * the break is finished. | |
583 | */ | |
584 | static void sci_schedule_break_timer(struct sci_port *port) | |
585 | { | |
586 | port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES; | |
587 | add_timer(&port->break_timer); | |
588 | } | |
589 | /* Ensure that two consecutive samples find the break over. */ | |
590 | static void sci_break_timer(unsigned long data) | |
591 | { | |
e108b2ca PM |
592 | struct sci_port *port = (struct sci_port *)data; |
593 | ||
594 | if (sci_rxd_in(&port->port) == 0) { | |
1da177e4 | 595 | port->break_flag = 1; |
e108b2ca PM |
596 | sci_schedule_break_timer(port); |
597 | } else if (port->break_flag == 1) { | |
1da177e4 LT |
598 | /* break is over. */ |
599 | port->break_flag = 2; | |
e108b2ca PM |
600 | sci_schedule_break_timer(port); |
601 | } else | |
602 | port->break_flag = 0; | |
1da177e4 LT |
603 | } |
604 | ||
605 | static inline int sci_handle_errors(struct uart_port *port) | |
606 | { | |
607 | int copied = 0; | |
608 | unsigned short status = sci_in(port, SCxSR); | |
609 | struct tty_struct *tty = port->info->tty; | |
610 | ||
e108b2ca | 611 | if (status & SCxSR_ORER(port)) { |
1da177e4 | 612 | /* overrun error */ |
e108b2ca | 613 | if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) |
33f0f88f | 614 | copied++; |
1da177e4 LT |
615 | pr_debug("sci: overrun error\n"); |
616 | } | |
617 | ||
e108b2ca | 618 | if (status & SCxSR_FER(port)) { |
1da177e4 LT |
619 | if (sci_rxd_in(port) == 0) { |
620 | /* Notify of BREAK */ | |
e108b2ca PM |
621 | struct sci_port *sci_port = (struct sci_port *)port; |
622 | ||
623 | if (!sci_port->break_flag) { | |
624 | sci_port->break_flag = 1; | |
625 | sci_schedule_break_timer(sci_port); | |
626 | ||
1da177e4 | 627 | /* Do sysrq handling. */ |
e108b2ca | 628 | if (uart_handle_break(port)) |
1da177e4 | 629 | return 0; |
1da177e4 | 630 | pr_debug("sci: BREAK detected\n"); |
e108b2ca | 631 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
33f0f88f | 632 | copied++; |
1da177e4 | 633 | } |
e108b2ca | 634 | } else { |
1da177e4 | 635 | /* frame error */ |
e108b2ca | 636 | if (tty_insert_flip_char(tty, 0, TTY_FRAME)) |
33f0f88f | 637 | copied++; |
1da177e4 LT |
638 | pr_debug("sci: frame error\n"); |
639 | } | |
640 | } | |
641 | ||
e108b2ca | 642 | if (status & SCxSR_PER(port)) { |
1da177e4 | 643 | /* parity error */ |
e108b2ca PM |
644 | if (tty_insert_flip_char(tty, 0, TTY_PARITY)) |
645 | copied++; | |
1da177e4 LT |
646 | pr_debug("sci: parity error\n"); |
647 | } | |
648 | ||
33f0f88f | 649 | if (copied) |
1da177e4 | 650 | tty_flip_buffer_push(tty); |
1da177e4 LT |
651 | |
652 | return copied; | |
653 | } | |
654 | ||
655 | static inline int sci_handle_breaks(struct uart_port *port) | |
656 | { | |
657 | int copied = 0; | |
658 | unsigned short status = sci_in(port, SCxSR); | |
659 | struct tty_struct *tty = port->info->tty; | |
660 | struct sci_port *s = &sci_ports[port->line]; | |
661 | ||
0b3d4ef6 PM |
662 | if (uart_handle_break(port)) |
663 | return 0; | |
664 | ||
b7a76e4b | 665 | if (!s->break_flag && status & SCxSR_BRK(port)) { |
1da177e4 LT |
666 | #if defined(CONFIG_CPU_SH3) |
667 | /* Debounce break */ | |
668 | s->break_flag = 1; | |
669 | #endif | |
670 | /* Notify of BREAK */ | |
e108b2ca | 671 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
33f0f88f | 672 | copied++; |
1da177e4 LT |
673 | pr_debug("sci: BREAK detected\n"); |
674 | } | |
675 | ||
676 | #if defined(SCIF_ORER) | |
677 | /* XXX: Handle SCIF overrun error */ | |
678 | if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) { | |
679 | sci_out(port, SCLSR, 0); | |
e108b2ca | 680 | if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) { |
1da177e4 | 681 | copied++; |
1da177e4 LT |
682 | pr_debug("sci: overrun error\n"); |
683 | } | |
684 | } | |
685 | #endif | |
686 | ||
33f0f88f | 687 | if (copied) |
1da177e4 | 688 | tty_flip_buffer_push(tty); |
e108b2ca | 689 | |
1da177e4 LT |
690 | return copied; |
691 | } | |
692 | ||
7d12e780 | 693 | static irqreturn_t sci_rx_interrupt(int irq, void *port) |
1da177e4 | 694 | { |
1da177e4 LT |
695 | /* I think sci_receive_chars has to be called irrespective |
696 | * of whether the I_IXOFF is set, otherwise, how is the interrupt | |
697 | * to be disabled? | |
698 | */ | |
7d12e780 | 699 | sci_receive_chars(port); |
1da177e4 LT |
700 | |
701 | return IRQ_HANDLED; | |
702 | } | |
703 | ||
7d12e780 | 704 | static irqreturn_t sci_tx_interrupt(int irq, void *ptr) |
1da177e4 LT |
705 | { |
706 | struct uart_port *port = ptr; | |
707 | ||
e108b2ca | 708 | spin_lock_irq(&port->lock); |
1da177e4 | 709 | sci_transmit_chars(port); |
e108b2ca | 710 | spin_unlock_irq(&port->lock); |
1da177e4 LT |
711 | |
712 | return IRQ_HANDLED; | |
713 | } | |
714 | ||
7d12e780 | 715 | static irqreturn_t sci_er_interrupt(int irq, void *ptr) |
1da177e4 LT |
716 | { |
717 | struct uart_port *port = ptr; | |
718 | ||
719 | /* Handle errors */ | |
720 | if (port->type == PORT_SCI) { | |
721 | if (sci_handle_errors(port)) { | |
722 | /* discard character in rx buffer */ | |
723 | sci_in(port, SCxSR); | |
724 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
725 | } | |
726 | } else { | |
727 | #if defined(SCIF_ORER) | |
728 | if((sci_in(port, SCLSR) & SCIF_ORER) != 0) { | |
729 | struct tty_struct *tty = port->info->tty; | |
730 | ||
731 | sci_out(port, SCLSR, 0); | |
33f0f88f AC |
732 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); |
733 | tty_flip_buffer_push(tty); | |
734 | pr_debug("scif: overrun error\n"); | |
1da177e4 LT |
735 | } |
736 | #endif | |
7d12e780 | 737 | sci_rx_interrupt(irq, ptr); |
1da177e4 LT |
738 | } |
739 | ||
740 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); | |
741 | ||
742 | /* Kick the transmission */ | |
7d12e780 | 743 | sci_tx_interrupt(irq, ptr); |
1da177e4 LT |
744 | |
745 | return IRQ_HANDLED; | |
746 | } | |
747 | ||
7d12e780 | 748 | static irqreturn_t sci_br_interrupt(int irq, void *ptr) |
1da177e4 LT |
749 | { |
750 | struct uart_port *port = ptr; | |
751 | ||
752 | /* Handle BREAKs */ | |
753 | sci_handle_breaks(port); | |
754 | sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port)); | |
755 | ||
756 | return IRQ_HANDLED; | |
757 | } | |
758 | ||
7d12e780 | 759 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) |
1da177e4 LT |
760 | { |
761 | unsigned short ssr_status, scr_status; | |
762 | struct uart_port *port = ptr; | |
763 | ||
764 | ssr_status = sci_in(port,SCxSR); | |
765 | scr_status = sci_in(port,SCSCR); | |
766 | ||
767 | /* Tx Interrupt */ | |
e108b2ca | 768 | if ((ssr_status & 0x0020) && (scr_status & 0x0080)) |
7d12e780 | 769 | sci_tx_interrupt(irq, ptr); |
1da177e4 | 770 | /* Rx Interrupt */ |
e108b2ca | 771 | if ((ssr_status & 0x0002) && (scr_status & 0x0040)) |
7d12e780 | 772 | sci_rx_interrupt(irq, ptr); |
1da177e4 | 773 | /* Error Interrupt */ |
e108b2ca | 774 | if ((ssr_status & 0x0080) && (scr_status & 0x0400)) |
7d12e780 | 775 | sci_er_interrupt(irq, ptr); |
1da177e4 | 776 | /* Break Interrupt */ |
e108b2ca | 777 | if ((ssr_status & 0x0010) && (scr_status & 0x0200)) |
7d12e780 | 778 | sci_br_interrupt(irq, ptr); |
1da177e4 LT |
779 | |
780 | return IRQ_HANDLED; | |
781 | } | |
782 | ||
783 | #ifdef CONFIG_CPU_FREQ | |
784 | /* | |
785 | * Here we define a transistion notifier so that we can update all of our | |
786 | * ports' baud rate when the peripheral clock changes. | |
787 | */ | |
e108b2ca PM |
788 | static int sci_notifier(struct notifier_block *self, |
789 | unsigned long phase, void *p) | |
1da177e4 LT |
790 | { |
791 | struct cpufreq_freqs *freqs = p; | |
792 | int i; | |
793 | ||
794 | if ((phase == CPUFREQ_POSTCHANGE) || | |
795 | (phase == CPUFREQ_RESUMECHANGE)){ | |
796 | for (i = 0; i < SCI_NPORTS; i++) { | |
797 | struct uart_port *port = &sci_ports[i].port; | |
b7a76e4b | 798 | struct clk *clk; |
1da177e4 LT |
799 | |
800 | /* | |
801 | * Update the uartclk per-port if frequency has | |
802 | * changed, since it will no longer necessarily be | |
803 | * consistent with the old frequency. | |
804 | * | |
805 | * Really we want to be able to do something like | |
806 | * uart_change_speed() or something along those lines | |
807 | * here to implicitly reset the per-port baud rate.. | |
808 | * | |
809 | * Clean this up later.. | |
810 | */ | |
1d118562 | 811 | clk = clk_get(NULL, "module_clk"); |
b7a76e4b PM |
812 | port->uartclk = clk_get_rate(clk) * 16; |
813 | clk_put(clk); | |
1da177e4 LT |
814 | } |
815 | ||
e108b2ca PM |
816 | printk(KERN_INFO "%s: got a postchange notification " |
817 | "for cpu %d (old %d, new %d)\n", | |
818 | __FUNCTION__, freqs->cpu, freqs->old, freqs->new); | |
1da177e4 LT |
819 | } |
820 | ||
821 | return NOTIFY_OK; | |
822 | } | |
823 | ||
824 | static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 }; | |
825 | #endif /* CONFIG_CPU_FREQ */ | |
826 | ||
827 | static int sci_request_irq(struct sci_port *port) | |
828 | { | |
829 | int i; | |
7d12e780 | 830 | irqreturn_t (*handlers[4])(int irq, void *ptr) = { |
1da177e4 LT |
831 | sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt, |
832 | sci_br_interrupt, | |
833 | }; | |
834 | const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full", | |
835 | "SCI Transmit Data Empty", "SCI Break" }; | |
836 | ||
837 | if (port->irqs[0] == port->irqs[1]) { | |
838 | if (!port->irqs[0]) { | |
839 | printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n"); | |
840 | return -ENODEV; | |
841 | } | |
e108b2ca PM |
842 | |
843 | if (request_irq(port->irqs[0], sci_mpxed_interrupt, | |
35f3c518 | 844 | IRQF_DISABLED, "sci", port)) { |
1da177e4 LT |
845 | printk(KERN_ERR "sci: Cannot allocate irq.\n"); |
846 | return -ENODEV; | |
847 | } | |
848 | } else { | |
849 | for (i = 0; i < ARRAY_SIZE(handlers); i++) { | |
850 | if (!port->irqs[i]) | |
851 | continue; | |
e108b2ca | 852 | if (request_irq(port->irqs[i], handlers[i], |
35f3c518 | 853 | IRQF_DISABLED, desc[i], port)) { |
1da177e4 LT |
854 | printk(KERN_ERR "sci: Cannot allocate irq.\n"); |
855 | return -ENODEV; | |
856 | } | |
857 | } | |
858 | } | |
859 | ||
860 | return 0; | |
861 | } | |
862 | ||
863 | static void sci_free_irq(struct sci_port *port) | |
864 | { | |
865 | int i; | |
866 | ||
867 | if (port->irqs[0] == port->irqs[1]) { | |
868 | if (!port->irqs[0]) | |
869 | printk("sci: sci_free_irq error\n"); | |
870 | else | |
871 | free_irq(port->irqs[0], port); | |
872 | } else { | |
873 | for (i = 0; i < ARRAY_SIZE(port->irqs); i++) { | |
874 | if (!port->irqs[i]) | |
875 | continue; | |
876 | ||
877 | free_irq(port->irqs[i], port); | |
878 | } | |
879 | } | |
880 | } | |
881 | ||
882 | static unsigned int sci_tx_empty(struct uart_port *port) | |
883 | { | |
884 | /* Can't detect */ | |
885 | return TIOCSER_TEMT; | |
886 | } | |
887 | ||
888 | static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
889 | { | |
890 | /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */ | |
891 | /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */ | |
892 | /* If you have signals for DTR and DCD, please implement here. */ | |
893 | } | |
894 | ||
895 | static unsigned int sci_get_mctrl(struct uart_port *port) | |
896 | { | |
897 | /* This routine is used for geting signals of: DTR, DCD, DSR, RI, | |
898 | and CTS/RTS */ | |
899 | ||
900 | return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; | |
901 | } | |
902 | ||
b129a8cc | 903 | static void sci_start_tx(struct uart_port *port) |
1da177e4 | 904 | { |
e108b2ca | 905 | unsigned short ctrl; |
1da177e4 | 906 | |
e108b2ca PM |
907 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ |
908 | ctrl = sci_in(port, SCSCR); | |
909 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
910 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
911 | } |
912 | ||
b129a8cc | 913 | static void sci_stop_tx(struct uart_port *port) |
1da177e4 | 914 | { |
1da177e4 LT |
915 | unsigned short ctrl; |
916 | ||
917 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
918 | ctrl = sci_in(port, SCSCR); |
919 | ctrl &= ~SCI_CTRL_FLAGS_TIE; | |
920 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
921 | } |
922 | ||
923 | static void sci_start_rx(struct uart_port *port, unsigned int tty_start) | |
924 | { | |
1da177e4 LT |
925 | unsigned short ctrl; |
926 | ||
927 | /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
928 | ctrl = sci_in(port, SCSCR); |
929 | ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE; | |
930 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
931 | } |
932 | ||
933 | static void sci_stop_rx(struct uart_port *port) | |
934 | { | |
1da177e4 LT |
935 | unsigned short ctrl; |
936 | ||
937 | /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
938 | ctrl = sci_in(port, SCSCR); |
939 | ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); | |
940 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
941 | } |
942 | ||
943 | static void sci_enable_ms(struct uart_port *port) | |
944 | { | |
945 | /* Nothing here yet .. */ | |
946 | } | |
947 | ||
948 | static void sci_break_ctl(struct uart_port *port, int break_state) | |
949 | { | |
950 | /* Nothing here yet .. */ | |
951 | } | |
952 | ||
953 | static int sci_startup(struct uart_port *port) | |
954 | { | |
955 | struct sci_port *s = &sci_ports[port->line]; | |
956 | ||
e108b2ca PM |
957 | if (s->enable) |
958 | s->enable(port); | |
1da177e4 | 959 | |
005a336e | 960 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) |
1534a3b3 | 961 | s->clk = clk_get(NULL, "module_clk"); |
005a336e | 962 | #endif |
1534a3b3 | 963 | |
1da177e4 | 964 | sci_request_irq(s); |
d656901b | 965 | sci_start_tx(port); |
1da177e4 LT |
966 | sci_start_rx(port, 1); |
967 | ||
968 | return 0; | |
969 | } | |
970 | ||
971 | static void sci_shutdown(struct uart_port *port) | |
972 | { | |
973 | struct sci_port *s = &sci_ports[port->line]; | |
974 | ||
975 | sci_stop_rx(port); | |
b129a8cc | 976 | sci_stop_tx(port); |
1da177e4 LT |
977 | sci_free_irq(s); |
978 | ||
e108b2ca PM |
979 | if (s->disable) |
980 | s->disable(port); | |
1534a3b3 | 981 | |
005a336e | 982 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) |
1534a3b3 | 983 | clk_put(s->clk); |
984 | s->clk = NULL; | |
005a336e | 985 | #endif |
1da177e4 LT |
986 | } |
987 | ||
606d099c AC |
988 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, |
989 | struct ktermios *old) | |
1da177e4 LT |
990 | { |
991 | struct sci_port *s = &sci_ports[port->line]; | |
992 | unsigned int status, baud, smr_val; | |
1da177e4 LT |
993 | int t; |
994 | ||
995 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | |
996 | ||
e108b2ca PM |
997 | switch (baud) { |
998 | case 0: | |
999 | t = -1; | |
1000 | break; | |
1001 | default: | |
1002 | { | |
1003 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) | |
1534a3b3 | 1004 | t = SCBRR_VALUE(baud, clk_get_rate(s->clk)); |
e108b2ca PM |
1005 | #else |
1006 | t = SCBRR_VALUE(baud); | |
1007 | #endif | |
e108b2ca | 1008 | break; |
fa5da2f7 | 1009 | } |
e108b2ca PM |
1010 | } |
1011 | ||
1da177e4 LT |
1012 | do { |
1013 | status = sci_in(port, SCxSR); | |
1014 | } while (!(status & SCxSR_TEND(port))); | |
1015 | ||
1016 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ | |
1017 | ||
1018 | #if !defined(SCI_ONLY) | |
e108b2ca | 1019 | if (port->type == PORT_SCIF) |
1da177e4 | 1020 | sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); |
1da177e4 LT |
1021 | #endif |
1022 | ||
1023 | smr_val = sci_in(port, SCSMR) & 3; | |
1024 | if ((termios->c_cflag & CSIZE) == CS7) | |
1025 | smr_val |= 0x40; | |
1026 | if (termios->c_cflag & PARENB) | |
1027 | smr_val |= 0x20; | |
1028 | if (termios->c_cflag & PARODD) | |
1029 | smr_val |= 0x30; | |
1030 | if (termios->c_cflag & CSTOPB) | |
1031 | smr_val |= 0x08; | |
1032 | ||
1033 | uart_update_timeout(port, termios->c_cflag, baud); | |
1034 | ||
1035 | sci_out(port, SCSMR, smr_val); | |
1036 | ||
1da177e4 LT |
1037 | if (t > 0) { |
1038 | if(t >= 256) { | |
1039 | sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); | |
1040 | t >>= 2; | |
1041 | } else { | |
1042 | sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3); | |
1043 | } | |
1044 | sci_out(port, SCBRR, t); | |
1045 | udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ | |
1046 | } | |
1047 | ||
b7a76e4b PM |
1048 | if (likely(s->init_pins)) |
1049 | s->init_pins(port, termios->c_cflag); | |
1050 | ||
1da177e4 LT |
1051 | sci_out(port, SCSCR, SCSCR_INIT(port)); |
1052 | ||
1053 | if ((termios->c_cflag & CREAD) != 0) | |
1054 | sci_start_rx(port,0); | |
1da177e4 LT |
1055 | } |
1056 | ||
1057 | static const char *sci_type(struct uart_port *port) | |
1058 | { | |
1059 | switch (port->type) { | |
1060 | case PORT_SCI: return "sci"; | |
1061 | case PORT_SCIF: return "scif"; | |
1062 | case PORT_IRDA: return "irda"; | |
1063 | } | |
1064 | ||
1065 | return 0; | |
1066 | } | |
1067 | ||
1068 | static void sci_release_port(struct uart_port *port) | |
1069 | { | |
1070 | /* Nothing here yet .. */ | |
1071 | } | |
1072 | ||
1073 | static int sci_request_port(struct uart_port *port) | |
1074 | { | |
1075 | /* Nothing here yet .. */ | |
1076 | return 0; | |
1077 | } | |
1078 | ||
1079 | static void sci_config_port(struct uart_port *port, int flags) | |
1080 | { | |
1081 | struct sci_port *s = &sci_ports[port->line]; | |
1082 | ||
1083 | port->type = s->type; | |
1084 | ||
e108b2ca PM |
1085 | switch (port->type) { |
1086 | case PORT_SCI: | |
1087 | s->init_pins = sci_init_pins_sci; | |
1088 | break; | |
1089 | case PORT_SCIF: | |
1090 | s->init_pins = sci_init_pins_scif; | |
1091 | break; | |
1092 | case PORT_IRDA: | |
1093 | s->init_pins = sci_init_pins_irda; | |
1094 | break; | |
1095 | } | |
1096 | ||
1da177e4 LT |
1097 | #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
1098 | if (port->mapbase == 0) | |
1099 | port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF"); | |
1100 | ||
e108b2ca | 1101 | port->membase = (void __iomem *)port->mapbase; |
1da177e4 LT |
1102 | #endif |
1103 | } | |
1104 | ||
1105 | static int sci_verify_port(struct uart_port *port, struct serial_struct *ser) | |
1106 | { | |
1107 | struct sci_port *s = &sci_ports[port->line]; | |
1108 | ||
1109 | if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS) | |
1110 | return -EINVAL; | |
1111 | if (ser->baud_base < 2400) | |
1112 | /* No paper tape reader for Mitch.. */ | |
1113 | return -EINVAL; | |
1114 | ||
1115 | return 0; | |
1116 | } | |
1117 | ||
1118 | static struct uart_ops sci_uart_ops = { | |
1119 | .tx_empty = sci_tx_empty, | |
1120 | .set_mctrl = sci_set_mctrl, | |
1121 | .get_mctrl = sci_get_mctrl, | |
1122 | .start_tx = sci_start_tx, | |
1123 | .stop_tx = sci_stop_tx, | |
1124 | .stop_rx = sci_stop_rx, | |
1125 | .enable_ms = sci_enable_ms, | |
1126 | .break_ctl = sci_break_ctl, | |
1127 | .startup = sci_startup, | |
1128 | .shutdown = sci_shutdown, | |
1129 | .set_termios = sci_set_termios, | |
1130 | .type = sci_type, | |
1131 | .release_port = sci_release_port, | |
1132 | .request_port = sci_request_port, | |
1133 | .config_port = sci_config_port, | |
1134 | .verify_port = sci_verify_port, | |
1135 | }; | |
1136 | ||
e108b2ca PM |
1137 | static void __init sci_init_ports(void) |
1138 | { | |
1139 | static int first = 1; | |
1140 | int i; | |
1141 | ||
1142 | if (!first) | |
1143 | return; | |
1144 | ||
1145 | first = 0; | |
1146 | ||
1147 | for (i = 0; i < SCI_NPORTS; i++) { | |
1148 | sci_ports[i].port.ops = &sci_uart_ops; | |
1149 | sci_ports[i].port.iotype = UPIO_MEM; | |
1150 | sci_ports[i].port.line = i; | |
1151 | sci_ports[i].port.fifosize = 1; | |
1152 | ||
1153 | #if defined(__H8300H__) || defined(__H8300S__) | |
1154 | #ifdef __H8300S__ | |
1155 | sci_ports[i].enable = h8300_sci_enable; | |
1156 | sci_ports[i].disable = h8300_sci_disable; | |
1157 | #endif | |
1158 | sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK; | |
1159 | #elif defined(CONFIG_SUPERH64) | |
1160 | sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16; | |
1da177e4 | 1161 | #else |
e108b2ca PM |
1162 | /* |
1163 | * XXX: We should use a proper SCI/SCIF clock | |
1164 | */ | |
1165 | { | |
1d118562 | 1166 | struct clk *clk = clk_get(NULL, "module_clk"); |
e108b2ca PM |
1167 | sci_ports[i].port.uartclk = clk_get_rate(clk) * 16; |
1168 | clk_put(clk); | |
1169 | } | |
1da177e4 | 1170 | #endif |
e108b2ca PM |
1171 | |
1172 | sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i]; | |
1173 | sci_ports[i].break_timer.function = sci_break_timer; | |
1174 | ||
1175 | init_timer(&sci_ports[i].break_timer); | |
1176 | } | |
1177 | } | |
1178 | ||
1179 | int __init early_sci_setup(struct uart_port *port) | |
1180 | { | |
1181 | if (unlikely(port->line > SCI_NPORTS)) | |
1182 | return -ENODEV; | |
1183 | ||
1184 | sci_init_ports(); | |
1185 | ||
1186 | sci_ports[port->line].port.membase = port->membase; | |
1187 | sci_ports[port->line].port.mapbase = port->mapbase; | |
1188 | sci_ports[port->line].port.type = port->type; | |
1189 | ||
1190 | return 0; | |
1191 | } | |
1da177e4 LT |
1192 | |
1193 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | |
1194 | /* | |
1195 | * Print a string to the serial port trying not to disturb | |
1196 | * any possible real use of the port... | |
1197 | */ | |
1198 | static void serial_console_write(struct console *co, const char *s, | |
1199 | unsigned count) | |
1200 | { | |
1201 | put_string(serial_console_port, s, count); | |
1202 | } | |
1203 | ||
1204 | static int __init serial_console_setup(struct console *co, char *options) | |
1205 | { | |
1206 | struct uart_port *port; | |
1207 | int baud = 115200; | |
1208 | int bits = 8; | |
1209 | int parity = 'n'; | |
1210 | int flow = 'n'; | |
1211 | int ret; | |
1212 | ||
e108b2ca PM |
1213 | /* |
1214 | * Check whether an invalid uart number has been specified, and | |
1215 | * if so, search for the first available port that does have | |
1216 | * console support. | |
1217 | */ | |
1218 | if (co->index >= SCI_NPORTS) | |
1219 | co->index = 0; | |
1220 | ||
1da177e4 LT |
1221 | serial_console_port = &sci_ports[co->index]; |
1222 | port = &serial_console_port->port; | |
1da177e4 LT |
1223 | |
1224 | /* | |
e108b2ca PM |
1225 | * Also need to check port->type, we don't actually have any |
1226 | * UPIO_PORT ports, but uart_report_port() handily misreports | |
1227 | * it anyways if we don't have a port available by the time this is | |
1228 | * called. | |
1da177e4 | 1229 | */ |
e108b2ca PM |
1230 | if (!port->type) |
1231 | return -ENODEV; | |
1232 | if (!port->membase || !port->mapbase) | |
1233 | return -ENODEV; | |
1234 | ||
e108b2ca PM |
1235 | port->type = serial_console_port->type; |
1236 | ||
005a336e PM |
1237 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) |
1238 | if (!serial_console_port->clk) | |
1239 | serial_console_port->clk = clk_get(NULL, "module_clk"); | |
1240 | #endif | |
1241 | ||
e108b2ca PM |
1242 | if (port->flags & UPF_IOREMAP) |
1243 | sci_config_port(port, 0); | |
1244 | ||
1245 | if (serial_console_port->enable) | |
1246 | serial_console_port->enable(port); | |
b7a76e4b | 1247 | |
1da177e4 LT |
1248 | if (options) |
1249 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1250 | ||
1251 | ret = uart_set_options(port, co, baud, parity, bits, flow); | |
1252 | #if defined(__H8300H__) || defined(__H8300S__) | |
1253 | /* disable rx interrupt */ | |
1254 | if (ret == 0) | |
1255 | sci_stop_rx(port); | |
1256 | #endif | |
1257 | return ret; | |
1258 | } | |
1259 | ||
1260 | static struct console serial_console = { | |
1261 | .name = "ttySC", | |
1262 | .device = uart_console_device, | |
1263 | .write = serial_console_write, | |
1264 | .setup = serial_console_setup, | |
fa5da2f7 | 1265 | .flags = CON_PRINTBUFFER, |
1da177e4 LT |
1266 | .index = -1, |
1267 | .data = &sci_uart_driver, | |
1268 | }; | |
1269 | ||
1270 | static int __init sci_console_init(void) | |
1271 | { | |
e108b2ca | 1272 | sci_init_ports(); |
1da177e4 LT |
1273 | register_console(&serial_console); |
1274 | return 0; | |
1275 | } | |
1da177e4 LT |
1276 | console_initcall(sci_console_init); |
1277 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | |
1278 | ||
1279 | #ifdef CONFIG_SH_KGDB | |
1280 | /* | |
1281 | * FIXME: Most of this can go away.. at the moment, we rely on | |
1282 | * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though | |
1283 | * most of that can easily be done here instead. | |
1284 | * | |
1285 | * For the time being, just accept the values that were parsed earlier.. | |
1286 | */ | |
1287 | static void __init kgdb_console_get_options(struct uart_port *port, int *baud, | |
1288 | int *parity, int *bits) | |
1289 | { | |
1290 | *baud = kgdb_baud; | |
1291 | *parity = tolower(kgdb_parity); | |
1292 | *bits = kgdb_bits - '0'; | |
1293 | } | |
1294 | ||
1295 | /* | |
1296 | * The naming here is somewhat misleading, since kgdb_console_setup() takes | |
1297 | * care of the early-on initialization for kgdb, regardless of whether we | |
1298 | * actually use kgdb as a console or not. | |
1299 | * | |
1300 | * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense. | |
1301 | */ | |
1302 | int __init kgdb_console_setup(struct console *co, char *options) | |
1303 | { | |
1304 | struct uart_port *port = &sci_ports[kgdb_portnum].port; | |
1305 | int baud = 38400; | |
1306 | int bits = 8; | |
1307 | int parity = 'n'; | |
1308 | int flow = 'n'; | |
1309 | ||
b7a76e4b | 1310 | if (co->index != kgdb_portnum) |
1da177e4 LT |
1311 | co->index = kgdb_portnum; |
1312 | ||
fa5da2f7 PM |
1313 | kgdb_sci_port = &sci_ports[co->index]; |
1314 | port = &kgdb_sci_port->port; | |
1315 | ||
1316 | /* | |
1317 | * Also need to check port->type, we don't actually have any | |
1318 | * UPIO_PORT ports, but uart_report_port() handily misreports | |
1319 | * it anyways if we don't have a port available by the time this is | |
1320 | * called. | |
1321 | */ | |
1322 | if (!port->type) | |
1323 | return -ENODEV; | |
1324 | if (!port->membase || !port->mapbase) | |
1325 | return -ENODEV; | |
1326 | ||
1da177e4 LT |
1327 | if (options) |
1328 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1329 | else | |
1330 | kgdb_console_get_options(port, &baud, &parity, &bits); | |
1331 | ||
1332 | kgdb_getchar = kgdb_sci_getchar; | |
1333 | kgdb_putchar = kgdb_sci_putchar; | |
1334 | ||
1335 | return uart_set_options(port, co, baud, parity, bits, flow); | |
1336 | } | |
1337 | #endif /* CONFIG_SH_KGDB */ | |
1338 | ||
1339 | #ifdef CONFIG_SH_KGDB_CONSOLE | |
1340 | static struct console kgdb_console = { | |
fa5da2f7 PM |
1341 | .name = "ttySC", |
1342 | .device = uart_console_device, | |
1343 | .write = kgdb_console_write, | |
1344 | .setup = kgdb_console_setup, | |
1345 | .flags = CON_PRINTBUFFER, | |
1346 | .index = -1, | |
1da177e4 LT |
1347 | .data = &sci_uart_driver, |
1348 | }; | |
1349 | ||
1350 | /* Register the KGDB console so we get messages (d'oh!) */ | |
1351 | static int __init kgdb_console_init(void) | |
1352 | { | |
e108b2ca | 1353 | sci_init_ports(); |
1da177e4 LT |
1354 | register_console(&kgdb_console); |
1355 | return 0; | |
1356 | } | |
1da177e4 LT |
1357 | console_initcall(kgdb_console_init); |
1358 | #endif /* CONFIG_SH_KGDB_CONSOLE */ | |
1359 | ||
1360 | #if defined(CONFIG_SH_KGDB_CONSOLE) | |
1361 | #define SCI_CONSOLE &kgdb_console | |
1362 | #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE) | |
1363 | #define SCI_CONSOLE &serial_console | |
1364 | #else | |
b7a76e4b | 1365 | #define SCI_CONSOLE 0 |
1da177e4 LT |
1366 | #endif |
1367 | ||
1368 | static char banner[] __initdata = | |
1369 | KERN_INFO "SuperH SCI(F) driver initialized\n"; | |
1370 | ||
1371 | static struct uart_driver sci_uart_driver = { | |
1372 | .owner = THIS_MODULE, | |
1373 | .driver_name = "sci", | |
1da177e4 LT |
1374 | .dev_name = "ttySC", |
1375 | .major = SCI_MAJOR, | |
1376 | .minor = SCI_MINOR_START, | |
e108b2ca | 1377 | .nr = SCI_NPORTS, |
1da177e4 LT |
1378 | .cons = SCI_CONSOLE, |
1379 | }; | |
1380 | ||
e108b2ca PM |
1381 | /* |
1382 | * Register a set of serial devices attached to a platform device. The | |
1383 | * list is terminated with a zero flags entry, which means we expect | |
1384 | * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need | |
1385 | * remapping (such as sh64) should also set UPF_IOREMAP. | |
1386 | */ | |
1387 | static int __devinit sci_probe(struct platform_device *dev) | |
1da177e4 | 1388 | { |
e108b2ca PM |
1389 | struct plat_sci_port *p = dev->dev.platform_data; |
1390 | int i; | |
1da177e4 | 1391 | |
32351a28 | 1392 | for (i = 0; p && p->flags != 0; p++, i++) { |
e108b2ca | 1393 | struct sci_port *sciport = &sci_ports[i]; |
1da177e4 | 1394 | |
32351a28 PM |
1395 | /* Sanity check */ |
1396 | if (unlikely(i == SCI_NPORTS)) { | |
1397 | dev_notice(&dev->dev, "Attempting to register port " | |
1398 | "%d when only %d are available.\n", | |
1399 | i+1, SCI_NPORTS); | |
1400 | dev_notice(&dev->dev, "Consider bumping " | |
1401 | "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); | |
1402 | break; | |
1403 | } | |
1404 | ||
e108b2ca | 1405 | sciport->port.mapbase = p->mapbase; |
b7a76e4b | 1406 | |
e108b2ca PM |
1407 | /* |
1408 | * For the simple (and majority of) cases where we don't need | |
1409 | * to do any remapping, just cast the cookie directly. | |
1410 | */ | |
1411 | if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP)) | |
1412 | p->membase = (void __iomem *)p->mapbase; | |
1da177e4 | 1413 | |
e108b2ca PM |
1414 | sciport->port.membase = p->membase; |
1415 | ||
1416 | sciport->port.irq = p->irqs[SCIx_TXI_IRQ]; | |
1417 | sciport->port.flags = p->flags; | |
1418 | sciport->port.dev = &dev->dev; | |
1419 | ||
1420 | sciport->type = sciport->port.type = p->type; | |
1421 | ||
1422 | memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs)); | |
1423 | ||
1424 | uart_add_one_port(&sci_uart_driver, &sciport->port); | |
1da177e4 LT |
1425 | } |
1426 | ||
fa5da2f7 PM |
1427 | #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE) |
1428 | kgdb_sci_port = &sci_ports[kgdb_portnum]; | |
1429 | kgdb_getchar = kgdb_sci_getchar; | |
1430 | kgdb_putchar = kgdb_sci_putchar; | |
1431 | #endif | |
1432 | ||
1da177e4 LT |
1433 | #ifdef CONFIG_CPU_FREQ |
1434 | cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER); | |
e289fd97 | 1435 | dev_info(&dev->dev, "CPU frequency notifier registered\n"); |
1da177e4 LT |
1436 | #endif |
1437 | ||
1438 | #ifdef CONFIG_SH_STANDARD_BIOS | |
1439 | sh_bios_gdb_detach(); | |
1440 | #endif | |
1441 | ||
e108b2ca | 1442 | return 0; |
1da177e4 LT |
1443 | } |
1444 | ||
e108b2ca PM |
1445 | static int __devexit sci_remove(struct platform_device *dev) |
1446 | { | |
1447 | int i; | |
1448 | ||
1449 | for (i = 0; i < SCI_NPORTS; i++) | |
1450 | uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port); | |
1451 | ||
1452 | return 0; | |
1453 | } | |
1454 | ||
1455 | static int sci_suspend(struct platform_device *dev, pm_message_t state) | |
1da177e4 | 1456 | { |
e108b2ca PM |
1457 | int i; |
1458 | ||
1459 | for (i = 0; i < SCI_NPORTS; i++) { | |
1460 | struct sci_port *p = &sci_ports[i]; | |
1461 | ||
1462 | if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev) | |
1463 | uart_suspend_port(&sci_uart_driver, &p->port); | |
1464 | } | |
1da177e4 | 1465 | |
e108b2ca PM |
1466 | return 0; |
1467 | } | |
1da177e4 | 1468 | |
e108b2ca PM |
1469 | static int sci_resume(struct platform_device *dev) |
1470 | { | |
1471 | int i; | |
1472 | ||
1473 | for (i = 0; i < SCI_NPORTS; i++) { | |
1474 | struct sci_port *p = &sci_ports[i]; | |
1475 | ||
1476 | if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev) | |
1477 | uart_resume_port(&sci_uart_driver, &p->port); | |
1478 | } | |
1479 | ||
1480 | return 0; | |
1481 | } | |
1482 | ||
1483 | static struct platform_driver sci_driver = { | |
1484 | .probe = sci_probe, | |
1485 | .remove = __devexit_p(sci_remove), | |
1486 | .suspend = sci_suspend, | |
1487 | .resume = sci_resume, | |
1488 | .driver = { | |
1489 | .name = "sh-sci", | |
1490 | .owner = THIS_MODULE, | |
1491 | }, | |
1492 | }; | |
1493 | ||
1494 | static int __init sci_init(void) | |
1495 | { | |
1496 | int ret; | |
1497 | ||
1498 | printk(banner); | |
1499 | ||
1500 | sci_init_ports(); | |
1501 | ||
1502 | ret = uart_register_driver(&sci_uart_driver); | |
1503 | if (likely(ret == 0)) { | |
1504 | ret = platform_driver_register(&sci_driver); | |
1505 | if (unlikely(ret)) | |
1506 | uart_unregister_driver(&sci_uart_driver); | |
1507 | } | |
1508 | ||
1509 | return ret; | |
1510 | } | |
1511 | ||
1512 | static void __exit sci_exit(void) | |
1513 | { | |
1514 | platform_driver_unregister(&sci_driver); | |
1da177e4 LT |
1515 | uart_unregister_driver(&sci_uart_driver); |
1516 | } | |
1517 | ||
1518 | module_init(sci_init); | |
1519 | module_exit(sci_exit); | |
1520 | ||
e108b2ca | 1521 | MODULE_LICENSE("GPL"); |